* eeschema netlist version 1.1 (spice format) creation date: wed jun 24 15:44:17 2015

.include half_adder.sub
x1 1 2 3 4 half_adder
* u1  a b 1 2 adc_bridge_2
* u2  3 4 sum cout dac_bridge_2
v1 a gnd  dc 5
v2 b gnd  dc 0
r1  gnd sum 1k
r2  gnd cout 1k
a1 [a b ] [1 2 ] u1
a2 [3 4 ] [sum cout ] u2
* Schematic Name: adc_bridge_2, NgSpice Name: adc_bridge
.model u1 adc_bridge(fall_delay=1.0e-9 in_high=2.0 rise_delay=1.0e-9 in_low=1.0 ) 
* Schematic Name: dac_bridge_2, NgSpice Name: dac_bridge
.model u2 dac_bridge(out_undef=0.5 out_low=0.0 out_high=5.0 t_rise=1.0e-9 t_fall=1.0e-9 input_load=1.0e-12 ) 
.tran 10e-03 100e-03 0e-03

* Control Statements 
.control
run
print allv > plot_data_v.txt
print alli > plot_data_i.txt
.endc
.end