From 206afcded42d55572509e3439d752c9a81c84785 Mon Sep 17 00:00:00 2001
From: Fahim
Date: Wed, 30 Dec 2015 12:31:05 +0530
Subject: Added : 1. Power Examples 2. eSim_Power.lib 3. DeviceModel for
 Powerdiode and Zenerdiode 4. Subcicuit for scr, diac, triac

---
 src/SubcircuitLibrary/scr/scr.cir | 20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)
 create mode 100644 src/SubcircuitLibrary/scr/scr.cir

(limited to 'src/SubcircuitLibrary/scr/scr.cir')

diff --git a/src/SubcircuitLibrary/scr/scr.cir b/src/SubcircuitLibrary/scr/scr.cir
new file mode 100644
index 00000000..4b279764
--- /dev/null
+++ b/src/SubcircuitLibrary/scr/scr.cir
@@ -0,0 +1,20 @@
+* /opt/eSim/src/SubcircuitLibrary/scr/scr.cir
+
+* EESchema Netlist Version 1.1 (Spice format) creation date: Tue Dec  8 15:47:20 2015
+
+* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N
+* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0
+
+* Sheet Name: /
+U2  3 7 1 PORT		
+F2  3 9 2 3 100		
+D1  5 2 D		
+C1  3 9 10u		
+F1  3 9 4 3 10		
+v1  8 4 dc		
+v2  6 5 dc		
+U1  9 1 6 aswitch		
+R1  7 8 50		
+R2  3 9 1		
+
+.end
-- 
cgit