From cb55e59de7ee4383c04edfae7c39ad9ae9552b36 Mon Sep 17 00:00:00 2001 From: rahulp13 Date: Fri, 14 Feb 2020 15:16:35 +0530 Subject: common code for Win and Linux, merged py2 changes --- src/SubcircuitLibrary/4to16_demux/3_and-cache.lib | 122 ++++---- src/SubcircuitLibrary/4to16_demux/3_and.cir | 26 +- src/SubcircuitLibrary/4to16_demux/3_and.cir.out | 40 +-- src/SubcircuitLibrary/4to16_demux/3_and.pro | 88 +++--- src/SubcircuitLibrary/4to16_demux/3_and.sch | 260 ++++++++-------- src/SubcircuitLibrary/4to16_demux/3_and.sub | 26 +- src/SubcircuitLibrary/4to16_demux/5_and-cache.lib | 158 +++++----- src/SubcircuitLibrary/4to16_demux/5_and.cir | 28 +- src/SubcircuitLibrary/4to16_demux/5_and.cir.out | 44 +-- src/SubcircuitLibrary/4to16_demux/5_and.pro | 100 +++---- src/SubcircuitLibrary/4to16_demux/5_and.sch | 342 +++++++++++----------- src/SubcircuitLibrary/4to16_demux/5_and.sub | 30 +- 12 files changed, 632 insertions(+), 632 deletions(-) (limited to 'src/SubcircuitLibrary/4to16_demux') diff --git a/src/SubcircuitLibrary/4to16_demux/3_and-cache.lib b/src/SubcircuitLibrary/4to16_demux/3_and-cache.lib index 0a3ccf7f..af058641 100644 --- a/src/SubcircuitLibrary/4to16_demux/3_and-cache.lib +++ b/src/SubcircuitLibrary/4to16_demux/3_and-cache.lib @@ -1,61 +1,61 @@ -EESchema-LIBRARY Version 2.3 -#encoding utf-8 -# -# PORT -# -DEF PORT U 0 40 Y Y 26 F N -F0 "U" 50 100 30 H V C CNN -F1 "PORT" 0 0 30 H V C CNN -F2 "" 0 0 60 H V C CNN -F3 "" 0 0 60 H V C CNN -DRAW -A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0 -A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50 -S -100 50 100 -50 0 1 0 N -X ~ 1 250 0 100 L 30 30 1 1 B -X ~ 2 250 0 100 L 30 30 2 1 B -X ~ 3 250 0 100 L 30 30 3 1 B -X ~ 4 250 0 100 L 30 30 4 1 B -X ~ 5 250 0 100 L 30 30 5 1 B -X ~ 6 250 0 100 L 30 30 6 1 B -X ~ 7 250 0 100 L 30 30 7 1 B -X ~ 8 250 0 100 L 30 30 8 1 B -X ~ 9 250 0 100 L 30 30 9 1 B -X ~ 10 250 0 100 L 30 30 10 1 B -X ~ 11 250 0 100 L 30 30 11 1 B -X ~ 12 250 0 100 L 30 30 12 1 B -X ~ 13 250 0 100 L 30 30 13 1 B -X ~ 14 250 0 100 L 30 30 14 1 B -X ~ 15 250 0 100 L 30 30 15 1 B -X ~ 16 250 0 100 L 30 30 16 1 B -X ~ 17 250 0 100 L 30 30 17 1 B -X ~ 18 250 0 100 L 30 30 18 1 B -X ~ 19 250 0 100 L 30 30 19 1 B -X ~ 20 250 0 100 L 30 30 20 1 B -X ~ 21 250 0 100 L 30 30 21 1 B -X ~ 22 250 0 100 L 30 30 22 1 B -X ~ 23 250 0 100 L 30 30 23 1 B -X ~ 24 250 0 100 L 30 30 24 1 B -X ~ 25 250 0 100 L 30 30 25 1 B -X ~ 26 250 0 100 L 30 30 26 1 B -ENDDRAW -ENDDEF -# -# d_and -# -DEF d_and U 0 40 Y Y 1 F N -F0 "U" 0 0 60 H V C CNN -F1 "d_and" 50 100 60 H V C CNN -F2 "" 0 0 60 H V C CNN -F3 "" 0 0 60 H V C CNN -DRAW -A 149 50 100 -894 0 0 1 0 N 150 -50 250 50 -A 150 49 100 6 900 0 1 0 N 250 50 150 150 -P 4 0 1 0 150 -50 -250 -50 -250 150 150 150 N -X IN1 1 -450 100 200 R 50 50 1 1 I -X IN2 2 -450 0 200 R 50 50 1 1 I -X OUT 3 450 50 200 L 50 50 1 1 O -ENDDRAW -ENDDEF -# -#End Library +EESchema-LIBRARY Version 2.3 +#encoding utf-8 +# +# PORT +# +DEF PORT U 0 40 Y Y 26 F N +F0 "U" 50 100 30 H V C CNN +F1 "PORT" 0 0 30 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0 +A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50 +S -100 50 100 -50 0 1 0 N +X ~ 1 250 0 100 L 30 30 1 1 B +X ~ 2 250 0 100 L 30 30 2 1 B +X ~ 3 250 0 100 L 30 30 3 1 B +X ~ 4 250 0 100 L 30 30 4 1 B +X ~ 5 250 0 100 L 30 30 5 1 B +X ~ 6 250 0 100 L 30 30 6 1 B +X ~ 7 250 0 100 L 30 30 7 1 B +X ~ 8 250 0 100 L 30 30 8 1 B +X ~ 9 250 0 100 L 30 30 9 1 B +X ~ 10 250 0 100 L 30 30 10 1 B +X ~ 11 250 0 100 L 30 30 11 1 B +X ~ 12 250 0 100 L 30 30 12 1 B +X ~ 13 250 0 100 L 30 30 13 1 B +X ~ 14 250 0 100 L 30 30 14 1 B +X ~ 15 250 0 100 L 30 30 15 1 B +X ~ 16 250 0 100 L 30 30 16 1 B +X ~ 17 250 0 100 L 30 30 17 1 B +X ~ 18 250 0 100 L 30 30 18 1 B +X ~ 19 250 0 100 L 30 30 19 1 B +X ~ 20 250 0 100 L 30 30 20 1 B +X ~ 21 250 0 100 L 30 30 21 1 B +X ~ 22 250 0 100 L 30 30 22 1 B +X ~ 23 250 0 100 L 30 30 23 1 B +X ~ 24 250 0 100 L 30 30 24 1 B +X ~ 25 250 0 100 L 30 30 25 1 B +X ~ 26 250 0 100 L 30 30 26 1 B +ENDDRAW +ENDDEF +# +# d_and +# +DEF d_and U 0 40 Y Y 1 F N +F0 "U" 0 0 60 H V C CNN +F1 "d_and" 50 100 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +A 149 50 100 -894 0 0 1 0 N 150 -50 250 50 +A 150 49 100 6 900 0 1 0 N 250 50 150 150 +P 4 0 1 0 150 -50 -250 -50 -250 150 150 150 N +X IN1 1 -450 100 200 R 50 50 1 1 I +X IN2 2 -450 0 200 R 50 50 1 1 I +X OUT 3 450 50 200 L 50 50 1 1 O +ENDDRAW +ENDDEF +# +#End Library diff --git a/src/SubcircuitLibrary/4to16_demux/3_and.cir b/src/SubcircuitLibrary/4to16_demux/3_and.cir index 15f8954d..ba296cf0 100644 --- a/src/SubcircuitLibrary/4to16_demux/3_and.cir +++ b/src/SubcircuitLibrary/4to16_demux/3_and.cir @@ -1,13 +1,13 @@ -* C:\Users\malli\eSim\src\SubcircuitLibrary\3_and\3_and.cir - -* EESchema Netlist Version 1.1 (Spice format) creation date: 03/26/19 18:42:57 - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -* Sheet Name: / -U2 Net-_U1-Pad1_ Net-_U1-Pad2_ Net-_U2-Pad3_ d_and -U3 Net-_U2-Pad3_ Net-_U1-Pad3_ Net-_U1-Pad4_ d_and -U1 Net-_U1-Pad1_ Net-_U1-Pad2_ Net-_U1-Pad3_ Net-_U1-Pad4_ PORT - -.end +* C:\Users\malli\eSim\src\SubcircuitLibrary\3_and\3_and.cir + +* EESchema Netlist Version 1.1 (Spice format) creation date: 03/26/19 18:42:57 + +* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N +* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +* Sheet Name: / +U2 Net-_U1-Pad1_ Net-_U1-Pad2_ Net-_U2-Pad3_ d_and +U3 Net-_U2-Pad3_ Net-_U1-Pad3_ Net-_U1-Pad4_ d_and +U1 Net-_U1-Pad1_ Net-_U1-Pad2_ Net-_U1-Pad3_ Net-_U1-Pad4_ PORT + +.end diff --git a/src/SubcircuitLibrary/4to16_demux/3_and.cir.out b/src/SubcircuitLibrary/4to16_demux/3_and.cir.out index e3c96645..d7cf79a0 100644 --- a/src/SubcircuitLibrary/4to16_demux/3_and.cir.out +++ b/src/SubcircuitLibrary/4to16_demux/3_and.cir.out @@ -1,20 +1,20 @@ -* c:\users\malli\esim\src\subcircuitlibrary\3_and\3_and.cir - -* u2 net-_u1-pad1_ net-_u1-pad2_ net-_u2-pad3_ d_and -* u3 net-_u2-pad3_ net-_u1-pad3_ net-_u1-pad4_ d_and -* u1 net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ port -a1 [net-_u1-pad1_ net-_u1-pad2_ ] net-_u2-pad3_ u2 -a2 [net-_u2-pad3_ net-_u1-pad3_ ] net-_u1-pad4_ u3 -* Schematic Name: d_and, NgSpice Name: d_and -.model u2 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) -* Schematic Name: d_and, NgSpice Name: d_and -.model u3 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) -.tran 0e-00 0e-00 0e-00 - -* Control Statements -.control -run -print allv > plot_data_v.txt -print alli > plot_data_i.txt -.endc -.end +* c:\users\malli\esim\src\subcircuitlibrary\3_and\3_and.cir + +* u2 net-_u1-pad1_ net-_u1-pad2_ net-_u2-pad3_ d_and +* u3 net-_u2-pad3_ net-_u1-pad3_ net-_u1-pad4_ d_and +* u1 net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ port +a1 [net-_u1-pad1_ net-_u1-pad2_ ] net-_u2-pad3_ u2 +a2 [net-_u2-pad3_ net-_u1-pad3_ ] net-_u1-pad4_ u3 +* Schematic Name: d_and, NgSpice Name: d_and +.model u2 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) +* Schematic Name: d_and, NgSpice Name: d_and +.model u3 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) +.tran 0e-00 0e-00 0e-00 + +* Control Statements +.control +run +print allv > plot_data_v.txt +print alli > plot_data_i.txt +.endc +.end diff --git a/src/SubcircuitLibrary/4to16_demux/3_and.pro b/src/SubcircuitLibrary/4to16_demux/3_and.pro index 0fdf4d25..76df4655 100644 --- a/src/SubcircuitLibrary/4to16_demux/3_and.pro +++ b/src/SubcircuitLibrary/4to16_demux/3_and.pro @@ -1,44 +1,44 @@ -update=05/31/19 15:26:09 -version=1 -last_client=eeschema -[general] -version=1 -RootSch= -BoardNm= -[pcbnew] -version=1 -LastNetListRead= -UseCmpFile=1 -PadDrill=0.600000000000 -PadDrillOvalY=0.600000000000 -PadSizeH=1.500000000000 -PadSizeV=1.500000000000 -PcbTextSizeV=1.500000000000 -PcbTextSizeH=1.500000000000 -PcbTextThickness=0.300000000000 -ModuleTextSizeV=1.000000000000 -ModuleTextSizeH=1.000000000000 -ModuleTextSizeThickness=0.150000000000 -SolderMaskClearance=0.000000000000 -SolderMaskMinWidth=0.000000000000 -DrawSegmentWidth=0.200000000000 -BoardOutlineThickness=0.100000000000 -ModuleOutlineThickness=0.150000000000 -[cvpcb] -version=1 -NetIExt=net -[eeschema] -version=1 -LibDir=../../../kicadSchematicLibrary -[eeschema/libraries] -LibName1=eSim_Analog -LibName2=eSim_Devices -LibName3=eSim_Digital -LibName4=eSim_Hybrid -LibName5=eSim_Miscellaneous -LibName6=eSim_Plot -LibName7=eSim_Power -LibName8=eSim_PSpice -LibName9=eSim_Sources -LibName10=eSim_Subckt -LibName11=eSim_User +update=05/31/19 15:26:09 +version=1 +last_client=eeschema +[general] +version=1 +RootSch= +BoardNm= +[pcbnew] +version=1 +LastNetListRead= +UseCmpFile=1 +PadDrill=0.600000000000 +PadDrillOvalY=0.600000000000 +PadSizeH=1.500000000000 +PadSizeV=1.500000000000 +PcbTextSizeV=1.500000000000 +PcbTextSizeH=1.500000000000 +PcbTextThickness=0.300000000000 +ModuleTextSizeV=1.000000000000 +ModuleTextSizeH=1.000000000000 +ModuleTextSizeThickness=0.150000000000 +SolderMaskClearance=0.000000000000 +SolderMaskMinWidth=0.000000000000 +DrawSegmentWidth=0.200000000000 +BoardOutlineThickness=0.100000000000 +ModuleOutlineThickness=0.150000000000 +[cvpcb] +version=1 +NetIExt=net +[eeschema] +version=1 +LibDir=../../../kicadSchematicLibrary +[eeschema/libraries] +LibName1=eSim_Analog +LibName2=eSim_Devices +LibName3=eSim_Digital +LibName4=eSim_Hybrid +LibName5=eSim_Miscellaneous +LibName6=eSim_Plot +LibName7=eSim_Power +LibName8=eSim_PSpice +LibName9=eSim_Sources +LibName10=eSim_Subckt +LibName11=eSim_User diff --git a/src/SubcircuitLibrary/4to16_demux/3_and.sch b/src/SubcircuitLibrary/4to16_demux/3_and.sch index c853bf49..d6ac89f9 100644 --- a/src/SubcircuitLibrary/4to16_demux/3_and.sch +++ b/src/SubcircuitLibrary/4to16_demux/3_and.sch @@ -1,130 +1,130 @@ -EESchema Schematic File Version 2 -LIBS:power -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:eSim_Analog -LIBS:eSim_Devices -LIBS:eSim_Digital -LIBS:eSim_Hybrid -LIBS:eSim_Miscellaneous -LIBS:eSim_Plot -LIBS:eSim_Power -LIBS:eSim_PSpice -LIBS:eSim_Sources -LIBS:eSim_Subckt -LIBS:eSim_User -LIBS:3_and-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11693 8268 -encoding utf-8 -Sheet 1 1 -Title "" -Date "" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -$Comp -L d_and U2 -U 1 1 5C9A24D8 -P 4250 2700 -F 0 "U2" H 4250 2700 60 0000 C CNN -F 1 "d_and" H 4300 2800 60 0000 C CNN -F 2 "" H 4250 2700 60 0000 C CNN -F 3 "" H 4250 2700 60 0000 C CNN - 1 4250 2700 - 1 0 0 -1 -$EndComp -$Comp -L d_and U3 -U 1 1 5C9A2538 -P 5150 2900 -F 0 "U3" H 5150 2900 60 0000 C CNN -F 1 "d_and" H 5200 3000 60 0000 C CNN -F 2 "" H 5150 2900 60 0000 C CNN -F 3 "" H 5150 2900 60 0000 C CNN - 1 5150 2900 - 1 0 0 -1 -$EndComp -$Comp -L PORT U1 -U 1 1 5C9A259A -P 3050 2600 -F 0 "U1" H 3100 2700 30 0000 C CNN -F 1 "PORT" H 3050 2600 30 0000 C CNN -F 2 "" H 3050 2600 60 0000 C CNN -F 3 "" H 3050 2600 60 0000 C CNN - 1 3050 2600 - 1 0 0 -1 -$EndComp -$Comp -L PORT U1 -U 2 1 5C9A25D9 -P 3050 2800 -F 0 "U1" H 3100 2900 30 0000 C CNN -F 1 "PORT" H 3050 2800 30 0000 C CNN -F 2 "" H 3050 2800 60 0000 C CNN -F 3 "" H 3050 2800 60 0000 C CNN - 2 3050 2800 - 1 0 0 -1 -$EndComp -$Comp -L PORT U1 -U 3 1 5C9A260A -P 3050 3100 -F 0 "U1" H 3100 3200 30 0000 C CNN -F 1 "PORT" H 3050 3100 30 0000 C CNN -F 2 "" H 3050 3100 60 0000 C CNN -F 3 "" H 3050 3100 60 0000 C CNN - 3 3050 3100 - 1 0 0 -1 -$EndComp -$Comp -L PORT U1 -U 4 1 5C9A2637 -P 6900 2850 -F 0 "U1" H 6950 2950 30 0000 C CNN -F 1 "PORT" H 6900 2850 30 0000 C CNN -F 2 "" H 6900 2850 60 0000 C CNN -F 3 "" H 6900 2850 60 0000 C CNN - 4 6900 2850 - -1 0 0 1 -$EndComp -Wire Wire Line - 4700 2650 4700 2800 -Wire Wire Line - 5600 2850 6650 2850 -Wire Wire Line - 3800 2600 3300 2600 -Wire Wire Line - 3800 2700 3300 2700 -Wire Wire Line - 3300 2700 3300 2800 -Wire Wire Line - 3300 3100 4700 3100 -Wire Wire Line - 4700 3100 4700 2900 -Text Notes 3500 2600 0 60 ~ 12 -in1 -Text Notes 3450 2800 0 60 ~ 12 -in2\n -Text Notes 3500 3100 0 60 ~ 12 -in3 -Text Notes 6100 2850 0 60 ~ 12 -out -$EndSCHEMATC +EESchema Schematic File Version 2 +LIBS:power +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:eSim_Analog +LIBS:eSim_Devices +LIBS:eSim_Digital +LIBS:eSim_Hybrid +LIBS:eSim_Miscellaneous +LIBS:eSim_Plot +LIBS:eSim_Power +LIBS:eSim_PSpice +LIBS:eSim_Sources +LIBS:eSim_Subckt +LIBS:eSim_User +LIBS:3_and-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11693 8268 +encoding utf-8 +Sheet 1 1 +Title "" +Date "" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +$Comp +L d_and U2 +U 1 1 5C9A24D8 +P 4250 2700 +F 0 "U2" H 4250 2700 60 0000 C CNN +F 1 "d_and" H 4300 2800 60 0000 C CNN +F 2 "" H 4250 2700 60 0000 C CNN +F 3 "" H 4250 2700 60 0000 C CNN + 1 4250 2700 + 1 0 0 -1 +$EndComp +$Comp +L d_and U3 +U 1 1 5C9A2538 +P 5150 2900 +F 0 "U3" H 5150 2900 60 0000 C CNN +F 1 "d_and" H 5200 3000 60 0000 C CNN +F 2 "" H 5150 2900 60 0000 C CNN +F 3 "" H 5150 2900 60 0000 C CNN + 1 5150 2900 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 1 1 5C9A259A +P 3050 2600 +F 0 "U1" H 3100 2700 30 0000 C CNN +F 1 "PORT" H 3050 2600 30 0000 C CNN +F 2 "" H 3050 2600 60 0000 C CNN +F 3 "" H 3050 2600 60 0000 C CNN + 1 3050 2600 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 2 1 5C9A25D9 +P 3050 2800 +F 0 "U1" H 3100 2900 30 0000 C CNN +F 1 "PORT" H 3050 2800 30 0000 C CNN +F 2 "" H 3050 2800 60 0000 C CNN +F 3 "" H 3050 2800 60 0000 C CNN + 2 3050 2800 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 3 1 5C9A260A +P 3050 3100 +F 0 "U1" H 3100 3200 30 0000 C CNN +F 1 "PORT" H 3050 3100 30 0000 C CNN +F 2 "" H 3050 3100 60 0000 C CNN +F 3 "" H 3050 3100 60 0000 C CNN + 3 3050 3100 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 4 1 5C9A2637 +P 6900 2850 +F 0 "U1" H 6950 2950 30 0000 C CNN +F 1 "PORT" H 6900 2850 30 0000 C CNN +F 2 "" H 6900 2850 60 0000 C CNN +F 3 "" H 6900 2850 60 0000 C CNN + 4 6900 2850 + -1 0 0 1 +$EndComp +Wire Wire Line + 4700 2650 4700 2800 +Wire Wire Line + 5600 2850 6650 2850 +Wire Wire Line + 3800 2600 3300 2600 +Wire Wire Line + 3800 2700 3300 2700 +Wire Wire Line + 3300 2700 3300 2800 +Wire Wire Line + 3300 3100 4700 3100 +Wire Wire Line + 4700 3100 4700 2900 +Text Notes 3500 2600 0 60 ~ 12 +in1 +Text Notes 3450 2800 0 60 ~ 12 +in2\n +Text Notes 3500 3100 0 60 ~ 12 +in3 +Text Notes 6100 2850 0 60 ~ 12 +out +$EndSCHEMATC diff --git a/src/SubcircuitLibrary/4to16_demux/3_and.sub b/src/SubcircuitLibrary/4to16_demux/3_and.sub index b949ae4f..3d9120bb 100644 --- a/src/SubcircuitLibrary/4to16_demux/3_and.sub +++ b/src/SubcircuitLibrary/4to16_demux/3_and.sub @@ -1,14 +1,14 @@ -* Subcircuit 3_and -.subckt 3_and net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ -* c:\users\malli\esim\src\subcircuitlibrary\3_and\3_and.cir -* u2 net-_u1-pad1_ net-_u1-pad2_ net-_u2-pad3_ d_and -* u3 net-_u2-pad3_ net-_u1-pad3_ net-_u1-pad4_ d_and -a1 [net-_u1-pad1_ net-_u1-pad2_ ] net-_u2-pad3_ u2 -a2 [net-_u2-pad3_ net-_u1-pad3_ ] net-_u1-pad4_ u3 -* Schematic Name: d_and, NgSpice Name: d_and -.model u2 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) -* Schematic Name: d_and, NgSpice Name: d_and -.model u3 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) -* Control Statements - +* Subcircuit 3_and +.subckt 3_and net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ +* c:\users\malli\esim\src\subcircuitlibrary\3_and\3_and.cir +* u2 net-_u1-pad1_ net-_u1-pad2_ net-_u2-pad3_ d_and +* u3 net-_u2-pad3_ net-_u1-pad3_ net-_u1-pad4_ d_and +a1 [net-_u1-pad1_ net-_u1-pad2_ ] net-_u2-pad3_ u2 +a2 [net-_u2-pad3_ net-_u1-pad3_ ] net-_u1-pad4_ u3 +* Schematic Name: d_and, NgSpice Name: d_and +.model u2 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) +* Schematic Name: d_and, NgSpice Name: d_and +.model u3 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) +* Control Statements + .ends 3_and \ No newline at end of file diff --git a/src/SubcircuitLibrary/4to16_demux/5_and-cache.lib b/src/SubcircuitLibrary/4to16_demux/5_and-cache.lib index 4cf915be..ac396288 100644 --- a/src/SubcircuitLibrary/4to16_demux/5_and-cache.lib +++ b/src/SubcircuitLibrary/4to16_demux/5_and-cache.lib @@ -1,79 +1,79 @@ -EESchema-LIBRARY Version 2.3 -#encoding utf-8 -# -# 3_and -# -DEF 3_and X 0 40 Y Y 1 F N -F0 "X" 900 300 60 H V C CNN -F1 "3_and" 950 500 60 H V C CNN -F2 "" 0 0 60 H V C CNN -F3 "" 0 0 60 H V C CNN -DRAW -A 950 400 158 716 -716 0 1 0 N 1000 550 1000 250 -P 2 0 1 0 650 550 1000 550 N -P 3 0 1 0 650 550 650 250 1000 250 N -X in1 1 450 500 200 R 50 50 1 1 I -X in2 2 450 400 200 R 50 50 1 1 I -X in3 3 450 300 200 R 50 50 1 1 I -X out 4 1300 400 200 L 50 50 1 1 O -ENDDRAW -ENDDEF -# -# PORT -# -DEF PORT U 0 40 Y Y 26 F N -F0 "U" 50 100 30 H V C CNN -F1 "PORT" 0 0 30 H V C CNN -F2 "" 0 0 60 H V C CNN -F3 "" 0 0 60 H V C CNN -DRAW -A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0 -A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50 -S -100 50 100 -50 0 1 0 N -X ~ 1 250 0 100 L 30 30 1 1 B -X ~ 2 250 0 100 L 30 30 2 1 B -X ~ 3 250 0 100 L 30 30 3 1 B -X ~ 4 250 0 100 L 30 30 4 1 B -X ~ 5 250 0 100 L 30 30 5 1 B -X ~ 6 250 0 100 L 30 30 6 1 B -X ~ 7 250 0 100 L 30 30 7 1 B -X ~ 8 250 0 100 L 30 30 8 1 B -X ~ 9 250 0 100 L 30 30 9 1 B -X ~ 10 250 0 100 L 30 30 10 1 B -X ~ 11 250 0 100 L 30 30 11 1 B -X ~ 12 250 0 100 L 30 30 12 1 B -X ~ 13 250 0 100 L 30 30 13 1 B -X ~ 14 250 0 100 L 30 30 14 1 B -X ~ 15 250 0 100 L 30 30 15 1 B -X ~ 16 250 0 100 L 30 30 16 1 B -X ~ 17 250 0 100 L 30 30 17 1 B -X ~ 18 250 0 100 L 30 30 18 1 B -X ~ 19 250 0 100 L 30 30 19 1 B -X ~ 20 250 0 100 L 30 30 20 1 B -X ~ 21 250 0 100 L 30 30 21 1 B -X ~ 22 250 0 100 L 30 30 22 1 B -X ~ 23 250 0 100 L 30 30 23 1 B -X ~ 24 250 0 100 L 30 30 24 1 B -X ~ 25 250 0 100 L 30 30 25 1 B -X ~ 26 250 0 100 L 30 30 26 1 B -ENDDRAW -ENDDEF -# -# d_and -# -DEF d_and U 0 40 Y Y 1 F N -F0 "U" 0 0 60 H V C CNN -F1 "d_and" 50 100 60 H V C CNN -F2 "" 0 0 60 H V C CNN -F3 "" 0 0 60 H V C CNN -DRAW -A 149 50 100 -894 0 0 1 0 N 150 -50 250 50 -A 150 49 100 6 900 0 1 0 N 250 50 150 150 -P 4 0 1 0 150 -50 -250 -50 -250 150 150 150 N -X IN1 1 -450 100 200 R 50 50 1 1 I -X IN2 2 -450 0 200 R 50 50 1 1 I -X OUT 3 450 50 200 L 50 50 1 1 O -ENDDRAW -ENDDEF -# -#End Library +EESchema-LIBRARY Version 2.3 +#encoding utf-8 +# +# 3_and +# +DEF 3_and X 0 40 Y Y 1 F N +F0 "X" 900 300 60 H V C CNN +F1 "3_and" 950 500 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +A 950 400 158 716 -716 0 1 0 N 1000 550 1000 250 +P 2 0 1 0 650 550 1000 550 N +P 3 0 1 0 650 550 650 250 1000 250 N +X in1 1 450 500 200 R 50 50 1 1 I +X in2 2 450 400 200 R 50 50 1 1 I +X in3 3 450 300 200 R 50 50 1 1 I +X out 4 1300 400 200 L 50 50 1 1 O +ENDDRAW +ENDDEF +# +# PORT +# +DEF PORT U 0 40 Y Y 26 F N +F0 "U" 50 100 30 H V C CNN +F1 "PORT" 0 0 30 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0 +A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50 +S -100 50 100 -50 0 1 0 N +X ~ 1 250 0 100 L 30 30 1 1 B +X ~ 2 250 0 100 L 30 30 2 1 B +X ~ 3 250 0 100 L 30 30 3 1 B +X ~ 4 250 0 100 L 30 30 4 1 B +X ~ 5 250 0 100 L 30 30 5 1 B +X ~ 6 250 0 100 L 30 30 6 1 B +X ~ 7 250 0 100 L 30 30 7 1 B +X ~ 8 250 0 100 L 30 30 8 1 B +X ~ 9 250 0 100 L 30 30 9 1 B +X ~ 10 250 0 100 L 30 30 10 1 B +X ~ 11 250 0 100 L 30 30 11 1 B +X ~ 12 250 0 100 L 30 30 12 1 B +X ~ 13 250 0 100 L 30 30 13 1 B +X ~ 14 250 0 100 L 30 30 14 1 B +X ~ 15 250 0 100 L 30 30 15 1 B +X ~ 16 250 0 100 L 30 30 16 1 B +X ~ 17 250 0 100 L 30 30 17 1 B +X ~ 18 250 0 100 L 30 30 18 1 B +X ~ 19 250 0 100 L 30 30 19 1 B +X ~ 20 250 0 100 L 30 30 20 1 B +X ~ 21 250 0 100 L 30 30 21 1 B +X ~ 22 250 0 100 L 30 30 22 1 B +X ~ 23 250 0 100 L 30 30 23 1 B +X ~ 24 250 0 100 L 30 30 24 1 B +X ~ 25 250 0 100 L 30 30 25 1 B +X ~ 26 250 0 100 L 30 30 26 1 B +ENDDRAW +ENDDEF +# +# d_and +# +DEF d_and U 0 40 Y Y 1 F N +F0 "U" 0 0 60 H V C CNN +F1 "d_and" 50 100 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +A 149 50 100 -894 0 0 1 0 N 150 -50 250 50 +A 150 49 100 6 900 0 1 0 N 250 50 150 150 +P 4 0 1 0 150 -50 -250 -50 -250 150 150 150 N +X IN1 1 -450 100 200 R 50 50 1 1 I +X IN2 2 -450 0 200 R 50 50 1 1 I +X OUT 3 450 50 200 L 50 50 1 1 O +ENDDRAW +ENDDEF +# +#End Library diff --git a/src/SubcircuitLibrary/4to16_demux/5_and.cir b/src/SubcircuitLibrary/4to16_demux/5_and.cir index ca1199bd..6a05b9b5 100644 --- a/src/SubcircuitLibrary/4to16_demux/5_and.cir +++ b/src/SubcircuitLibrary/4to16_demux/5_and.cir @@ -1,14 +1,14 @@ -* C:\Users\malli\eSim\src\SubcircuitLibrary\5_and\5_and.cir - -* EESchema Netlist Version 1.1 (Spice format) creation date: 03/26/19 18:53:13 - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -* Sheet Name: / -X1 Net-_U1-Pad1_ Net-_U1-Pad2_ Net-_U1-Pad3_ Net-_U3-Pad1_ 3_and -U2 Net-_U1-Pad4_ Net-_U1-Pad5_ Net-_U2-Pad3_ d_and -U3 Net-_U3-Pad1_ Net-_U2-Pad3_ Net-_U1-Pad6_ d_and -U1 Net-_U1-Pad1_ Net-_U1-Pad2_ Net-_U1-Pad3_ Net-_U1-Pad4_ Net-_U1-Pad5_ Net-_U1-Pad6_ PORT - -.end +* C:\Users\malli\eSim\src\SubcircuitLibrary\5_and\5_and.cir + +* EESchema Netlist Version 1.1 (Spice format) creation date: 03/26/19 18:53:13 + +* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N +* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +* Sheet Name: / +X1 Net-_U1-Pad1_ Net-_U1-Pad2_ Net-_U1-Pad3_ Net-_U3-Pad1_ 3_and +U2 Net-_U1-Pad4_ Net-_U1-Pad5_ Net-_U2-Pad3_ d_and +U3 Net-_U3-Pad1_ Net-_U2-Pad3_ Net-_U1-Pad6_ d_and +U1 Net-_U1-Pad1_ Net-_U1-Pad2_ Net-_U1-Pad3_ Net-_U1-Pad4_ Net-_U1-Pad5_ Net-_U1-Pad6_ PORT + +.end diff --git a/src/SubcircuitLibrary/4to16_demux/5_and.cir.out b/src/SubcircuitLibrary/4to16_demux/5_and.cir.out index 20d3f8a5..6a6b126a 100644 --- a/src/SubcircuitLibrary/4to16_demux/5_and.cir.out +++ b/src/SubcircuitLibrary/4to16_demux/5_and.cir.out @@ -1,22 +1,22 @@ -* c:\users\malli\esim\src\subcircuitlibrary\5_and\5_and.cir - -.include 3_and.sub -x1 net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u3-pad1_ 3_and -* u2 net-_u1-pad4_ net-_u1-pad5_ net-_u2-pad3_ d_and -* u3 net-_u3-pad1_ net-_u2-pad3_ net-_u1-pad6_ d_and -* u1 net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ net-_u1-pad5_ net-_u1-pad6_ port -a1 [net-_u1-pad4_ net-_u1-pad5_ ] net-_u2-pad3_ u2 -a2 [net-_u3-pad1_ net-_u2-pad3_ ] net-_u1-pad6_ u3 -* Schematic Name: d_and, NgSpice Name: d_and -.model u2 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) -* Schematic Name: d_and, NgSpice Name: d_and -.model u3 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) -.tran 0e-00 0e-00 0e-00 - -* Control Statements -.control -run -print allv > plot_data_v.txt -print alli > plot_data_i.txt -.endc -.end +* c:\users\malli\esim\src\subcircuitlibrary\5_and\5_and.cir + +.include 3_and.sub +x1 net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u3-pad1_ 3_and +* u2 net-_u1-pad4_ net-_u1-pad5_ net-_u2-pad3_ d_and +* u3 net-_u3-pad1_ net-_u2-pad3_ net-_u1-pad6_ d_and +* u1 net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ net-_u1-pad5_ net-_u1-pad6_ port +a1 [net-_u1-pad4_ net-_u1-pad5_ ] net-_u2-pad3_ u2 +a2 [net-_u3-pad1_ net-_u2-pad3_ ] net-_u1-pad6_ u3 +* Schematic Name: d_and, NgSpice Name: d_and +.model u2 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) +* Schematic Name: d_and, NgSpice Name: d_and +.model u3 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) +.tran 0e-00 0e-00 0e-00 + +* Control Statements +.control +run +print allv > plot_data_v.txt +print alli > plot_data_i.txt +.endc +.end diff --git a/src/SubcircuitLibrary/4to16_demux/5_and.pro b/src/SubcircuitLibrary/4to16_demux/5_and.pro index a9d6304f..7a2f090e 100644 --- a/src/SubcircuitLibrary/4to16_demux/5_and.pro +++ b/src/SubcircuitLibrary/4to16_demux/5_and.pro @@ -1,50 +1,50 @@ -update=06/01/19 11:31:03 -version=1 -last_client=eeschema -[general] -version=1 -RootSch= -BoardNm= -[pcbnew] -version=1 -LastNetListRead= -UseCmpFile=1 -PadDrill=0.600000000000 -PadDrillOvalY=0.600000000000 -PadSizeH=1.500000000000 -PadSizeV=1.500000000000 -PcbTextSizeV=1.500000000000 -PcbTextSizeH=1.500000000000 -PcbTextThickness=0.300000000000 -ModuleTextSizeV=1.000000000000 -ModuleTextSizeH=1.000000000000 -ModuleTextSizeThickness=0.150000000000 -SolderMaskClearance=0.000000000000 -SolderMaskMinWidth=0.000000000000 -DrawSegmentWidth=0.200000000000 -BoardOutlineThickness=0.100000000000 -ModuleOutlineThickness=0.150000000000 -[cvpcb] -version=1 -NetIExt=net -[eeschema] -version=1 -LibDir=../../../kicadSchematicLibrary -[eeschema/libraries] -LibName1=cypress -LibName2=siliconi -LibName3=opto -LibName4=atmel -LibName5=contrib -LibName6=valves -LibName7=eSim_Analog -LibName8=eSim_Devices -LibName9=eSim_Digital -LibName10=eSim_Hybrid -LibName11=eSim_Miscellaneous -LibName12=eSim_Plot -LibName13=eSim_Power -LibName14=eSim_PSpice -LibName15=eSim_Sources -LibName16=eSim_Subckt -LibName17=eSim_User +update=06/01/19 11:31:03 +version=1 +last_client=eeschema +[general] +version=1 +RootSch= +BoardNm= +[pcbnew] +version=1 +LastNetListRead= +UseCmpFile=1 +PadDrill=0.600000000000 +PadDrillOvalY=0.600000000000 +PadSizeH=1.500000000000 +PadSizeV=1.500000000000 +PcbTextSizeV=1.500000000000 +PcbTextSizeH=1.500000000000 +PcbTextThickness=0.300000000000 +ModuleTextSizeV=1.000000000000 +ModuleTextSizeH=1.000000000000 +ModuleTextSizeThickness=0.150000000000 +SolderMaskClearance=0.000000000000 +SolderMaskMinWidth=0.000000000000 +DrawSegmentWidth=0.200000000000 +BoardOutlineThickness=0.100000000000 +ModuleOutlineThickness=0.150000000000 +[cvpcb] +version=1 +NetIExt=net +[eeschema] +version=1 +LibDir=../../../kicadSchematicLibrary +[eeschema/libraries] +LibName1=cypress +LibName2=siliconi +LibName3=opto +LibName4=atmel +LibName5=contrib +LibName6=valves +LibName7=eSim_Analog +LibName8=eSim_Devices +LibName9=eSim_Digital +LibName10=eSim_Hybrid +LibName11=eSim_Miscellaneous +LibName12=eSim_Plot +LibName13=eSim_Power +LibName14=eSim_PSpice +LibName15=eSim_Sources +LibName16=eSim_Subckt +LibName17=eSim_User diff --git a/src/SubcircuitLibrary/4to16_demux/5_and.sch b/src/SubcircuitLibrary/4to16_demux/5_and.sch index 0d86cdec..e9eb58ee 100644 --- a/src/SubcircuitLibrary/4to16_demux/5_and.sch +++ b/src/SubcircuitLibrary/4to16_demux/5_and.sch @@ -1,171 +1,171 @@ -EESchema Schematic File Version 2 -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:eSim_Analog -LIBS:eSim_Devices -LIBS:eSim_Digital -LIBS:eSim_Hybrid -LIBS:eSim_Miscellaneous -LIBS:eSim_Plot -LIBS:eSim_Power -LIBS:eSim_PSpice -LIBS:eSim_Sources -LIBS:eSim_Subckt -LIBS:eSim_User -LIBS:5_and-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11693 8268 -encoding utf-8 -Sheet 1 1 -Title "" -Date "" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -$Comp -L 3_and X1 -U 1 1 5C9A2741 -P 3800 3350 -F 0 "X1" H 4700 3650 60 0000 C CNN -F 1 "3_and" H 4750 3850 60 0000 C CNN -F 2 "" H 3800 3350 60 0000 C CNN -F 3 "" H 3800 3350 60 0000 C CNN - 1 3800 3350 - 1 0 0 -1 -$EndComp -$Comp -L d_and U2 -U 1 1 5C9A2764 -P 4650 3400 -F 0 "U2" H 4650 3400 60 0000 C CNN -F 1 "d_and" H 4700 3500 60 0000 C CNN -F 2 "" H 4650 3400 60 0000 C CNN -F 3 "" H 4650 3400 60 0000 C CNN - 1 4650 3400 - 1 0 0 -1 -$EndComp -$Comp -L d_and U3 -U 1 1 5C9A2791 -P 5550 3200 -F 0 "U3" H 5550 3200 60 0000 C CNN -F 1 "d_and" H 5600 3300 60 0000 C CNN -F 2 "" H 5550 3200 60 0000 C CNN -F 3 "" H 5550 3200 60 0000 C CNN - 1 5550 3200 - 1 0 0 -1 -$EndComp -Wire Wire Line - 5100 3100 5100 2950 -Wire Wire Line - 5100 3200 5100 3350 -Wire Wire Line - 4250 2850 4250 2700 -Wire Wire Line - 4250 2700 3600 2700 -Wire Wire Line - 4250 2950 4150 2950 -Wire Wire Line - 4150 2950 4150 2900 -Wire Wire Line - 4150 2900 3600 2900 -Wire Wire Line - 4200 3300 3600 3300 -Wire Wire Line - 4250 3050 4250 3100 -Wire Wire Line - 4250 3100 3600 3100 -Wire Wire Line - 4200 3400 4200 3500 -Wire Wire Line - 4200 3500 3600 3500 -Wire Wire Line - 6000 3150 6500 3150 -$Comp -L PORT U1 -U 1 1 5C9A2865 -P 3350 2700 -F 0 "U1" H 3400 2800 30 0000 C CNN -F 1 "PORT" H 3350 2700 30 0000 C CNN -F 2 "" H 3350 2700 60 0000 C CNN -F 3 "" H 3350 2700 60 0000 C CNN - 1 3350 2700 - 1 0 0 -1 -$EndComp -$Comp -L PORT U1 -U 2 1 5C9A28B6 -P 3350 2900 -F 0 "U1" H 3400 3000 30 0000 C CNN -F 1 "PORT" H 3350 2900 30 0000 C CNN -F 2 "" H 3350 2900 60 0000 C CNN -F 3 "" H 3350 2900 60 0000 C CNN - 2 3350 2900 - 1 0 0 -1 -$EndComp -$Comp -L PORT U1 -U 3 1 5C9A28D9 -P 3350 3100 -F 0 "U1" H 3400 3200 30 0000 C CNN -F 1 "PORT" H 3350 3100 30 0000 C CNN -F 2 "" H 3350 3100 60 0000 C CNN -F 3 "" H 3350 3100 60 0000 C CNN - 3 3350 3100 - 1 0 0 -1 -$EndComp -$Comp -L PORT U1 -U 4 1 5C9A28FF -P 3350 3300 -F 0 "U1" H 3400 3400 30 0000 C CNN -F 1 "PORT" H 3350 3300 30 0000 C CNN -F 2 "" H 3350 3300 60 0000 C CNN -F 3 "" H 3350 3300 60 0000 C CNN - 4 3350 3300 - 1 0 0 -1 -$EndComp -$Comp -L PORT U1 -U 5 1 5C9A2928 -P 3350 3500 -F 0 "U1" H 3400 3600 30 0000 C CNN -F 1 "PORT" H 3350 3500 30 0000 C CNN -F 2 "" H 3350 3500 60 0000 C CNN -F 3 "" H 3350 3500 60 0000 C CNN - 5 3350 3500 - 1 0 0 -1 -$EndComp -$Comp -L PORT U1 -U 6 1 5C9A2958 -P 6750 3150 -F 0 "U1" H 6800 3250 30 0000 C CNN -F 1 "PORT" H 6750 3150 30 0000 C CNN -F 2 "" H 6750 3150 60 0000 C CNN -F 3 "" H 6750 3150 60 0000 C CNN - 6 6750 3150 - -1 0 0 1 -$EndComp -Text Notes 3800 2700 0 60 ~ 12 -in1 -Text Notes 3800 2900 0 60 ~ 12 -in2 -Text Notes 3800 3100 0 60 ~ 12 -in3 -Text Notes 3800 3300 0 60 ~ 12 -in4 -Text Notes 3800 3500 0 60 ~ 12 -in5 -Text Notes 6150 3150 0 60 ~ 12 -out -$EndSCHEMATC +EESchema Schematic File Version 2 +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:eSim_Analog +LIBS:eSim_Devices +LIBS:eSim_Digital +LIBS:eSim_Hybrid +LIBS:eSim_Miscellaneous +LIBS:eSim_Plot +LIBS:eSim_Power +LIBS:eSim_PSpice +LIBS:eSim_Sources +LIBS:eSim_Subckt +LIBS:eSim_User +LIBS:5_and-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11693 8268 +encoding utf-8 +Sheet 1 1 +Title "" +Date "" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +$Comp +L 3_and X1 +U 1 1 5C9A2741 +P 3800 3350 +F 0 "X1" H 4700 3650 60 0000 C CNN +F 1 "3_and" H 4750 3850 60 0000 C CNN +F 2 "" H 3800 3350 60 0000 C CNN +F 3 "" H 3800 3350 60 0000 C CNN + 1 3800 3350 + 1 0 0 -1 +$EndComp +$Comp +L d_and U2 +U 1 1 5C9A2764 +P 4650 3400 +F 0 "U2" H 4650 3400 60 0000 C CNN +F 1 "d_and" H 4700 3500 60 0000 C CNN +F 2 "" H 4650 3400 60 0000 C CNN +F 3 "" H 4650 3400 60 0000 C CNN + 1 4650 3400 + 1 0 0 -1 +$EndComp +$Comp +L d_and U3 +U 1 1 5C9A2791 +P 5550 3200 +F 0 "U3" H 5550 3200 60 0000 C CNN +F 1 "d_and" H 5600 3300 60 0000 C CNN +F 2 "" H 5550 3200 60 0000 C CNN +F 3 "" H 5550 3200 60 0000 C CNN + 1 5550 3200 + 1 0 0 -1 +$EndComp +Wire Wire Line + 5100 3100 5100 2950 +Wire Wire Line + 5100 3200 5100 3350 +Wire Wire Line + 4250 2850 4250 2700 +Wire Wire Line + 4250 2700 3600 2700 +Wire Wire Line + 4250 2950 4150 2950 +Wire Wire Line + 4150 2950 4150 2900 +Wire Wire Line + 4150 2900 3600 2900 +Wire Wire Line + 4200 3300 3600 3300 +Wire Wire Line + 4250 3050 4250 3100 +Wire Wire Line + 4250 3100 3600 3100 +Wire Wire Line + 4200 3400 4200 3500 +Wire Wire Line + 4200 3500 3600 3500 +Wire Wire Line + 6000 3150 6500 3150 +$Comp +L PORT U1 +U 1 1 5C9A2865 +P 3350 2700 +F 0 "U1" H 3400 2800 30 0000 C CNN +F 1 "PORT" H 3350 2700 30 0000 C CNN +F 2 "" H 3350 2700 60 0000 C CNN +F 3 "" H 3350 2700 60 0000 C CNN + 1 3350 2700 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 2 1 5C9A28B6 +P 3350 2900 +F 0 "U1" H 3400 3000 30 0000 C CNN +F 1 "PORT" H 3350 2900 30 0000 C CNN +F 2 "" H 3350 2900 60 0000 C CNN +F 3 "" H 3350 2900 60 0000 C CNN + 2 3350 2900 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 3 1 5C9A28D9 +P 3350 3100 +F 0 "U1" H 3400 3200 30 0000 C CNN +F 1 "PORT" H 3350 3100 30 0000 C CNN +F 2 "" H 3350 3100 60 0000 C CNN +F 3 "" H 3350 3100 60 0000 C CNN + 3 3350 3100 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 4 1 5C9A28FF +P 3350 3300 +F 0 "U1" H 3400 3400 30 0000 C CNN +F 1 "PORT" H 3350 3300 30 0000 C CNN +F 2 "" H 3350 3300 60 0000 C CNN +F 3 "" H 3350 3300 60 0000 C CNN + 4 3350 3300 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 5 1 5C9A2928 +P 3350 3500 +F 0 "U1" H 3400 3600 30 0000 C CNN +F 1 "PORT" H 3350 3500 30 0000 C CNN +F 2 "" H 3350 3500 60 0000 C CNN +F 3 "" H 3350 3500 60 0000 C CNN + 5 3350 3500 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 6 1 5C9A2958 +P 6750 3150 +F 0 "U1" H 6800 3250 30 0000 C CNN +F 1 "PORT" H 6750 3150 30 0000 C CNN +F 2 "" H 6750 3150 60 0000 C CNN +F 3 "" H 6750 3150 60 0000 C CNN + 6 6750 3150 + -1 0 0 1 +$EndComp +Text Notes 3800 2700 0 60 ~ 12 +in1 +Text Notes 3800 2900 0 60 ~ 12 +in2 +Text Notes 3800 3100 0 60 ~ 12 +in3 +Text Notes 3800 3300 0 60 ~ 12 +in4 +Text Notes 3800 3500 0 60 ~ 12 +in5 +Text Notes 6150 3150 0 60 ~ 12 +out +$EndSCHEMATC diff --git a/src/SubcircuitLibrary/4to16_demux/5_and.sub b/src/SubcircuitLibrary/4to16_demux/5_and.sub index 9d929fcb..35b10e17 100644 --- a/src/SubcircuitLibrary/4to16_demux/5_and.sub +++ b/src/SubcircuitLibrary/4to16_demux/5_and.sub @@ -1,16 +1,16 @@ -* Subcircuit 5_and -.subckt 5_and net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ net-_u1-pad5_ net-_u1-pad6_ -* c:\users\malli\esim\src\subcircuitlibrary\5_and\5_and.cir -.include 3_and.sub -x1 net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u3-pad1_ 3_and -* u2 net-_u1-pad4_ net-_u1-pad5_ net-_u2-pad3_ d_and -* u3 net-_u3-pad1_ net-_u2-pad3_ net-_u1-pad6_ d_and -a1 [net-_u1-pad4_ net-_u1-pad5_ ] net-_u2-pad3_ u2 -a2 [net-_u3-pad1_ net-_u2-pad3_ ] net-_u1-pad6_ u3 -* Schematic Name: d_and, NgSpice Name: d_and -.model u2 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) -* Schematic Name: d_and, NgSpice Name: d_and -.model u3 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) -* Control Statements - +* Subcircuit 5_and +.subckt 5_and net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ net-_u1-pad5_ net-_u1-pad6_ +* c:\users\malli\esim\src\subcircuitlibrary\5_and\5_and.cir +.include 3_and.sub +x1 net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u3-pad1_ 3_and +* u2 net-_u1-pad4_ net-_u1-pad5_ net-_u2-pad3_ d_and +* u3 net-_u3-pad1_ net-_u2-pad3_ net-_u1-pad6_ d_and +a1 [net-_u1-pad4_ net-_u1-pad5_ ] net-_u2-pad3_ u2 +a2 [net-_u3-pad1_ net-_u2-pad3_ ] net-_u1-pad6_ u3 +* Schematic Name: d_and, NgSpice Name: d_and +.model u2 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) +* Schematic Name: d_and, NgSpice Name: d_and +.model u3 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) +* Control Statements + .ends 5_and \ No newline at end of file -- cgit From 47d4daff2ab483c4cdfb82117ef0d25d53832214 Mon Sep 17 00:00:00 2001 From: rahulp13 Date: Fri, 21 Feb 2020 12:36:46 +0530 Subject: restructured eSim libraries --- src/SubcircuitLibrary/4to16_demux/3_and-cache.lib | 61 -- src/SubcircuitLibrary/4to16_demux/3_and.cir | 13 - src/SubcircuitLibrary/4to16_demux/3_and.cir.out | 20 - src/SubcircuitLibrary/4to16_demux/3_and.pro | 44 - src/SubcircuitLibrary/4to16_demux/3_and.sch | 130 --- src/SubcircuitLibrary/4to16_demux/3_and.sub | 14 - .../4to16_demux/3_and_Previous_Values.xml | 1 - .../4to16_demux/4to16_demux-cache.lib | 97 --- src/SubcircuitLibrary/4to16_demux/4to16_demux.cir | 32 - .../4to16_demux/4to16_demux.cir.out | 49 -- src/SubcircuitLibrary/4to16_demux/4to16_demux.pro | 43 - src/SubcircuitLibrary/4to16_demux/4to16_demux.sch | 889 --------------------- src/SubcircuitLibrary/4to16_demux/4to16_demux.sub | 43 - .../4to16_demux/4to16_demux_Previous_Values.xml | 1 - src/SubcircuitLibrary/4to16_demux/5_and-cache.lib | 79 -- src/SubcircuitLibrary/4to16_demux/5_and.cir | 14 - src/SubcircuitLibrary/4to16_demux/5_and.cir.out | 22 - src/SubcircuitLibrary/4to16_demux/5_and.pro | 50 -- src/SubcircuitLibrary/4to16_demux/5_and.sch | 171 ---- src/SubcircuitLibrary/4to16_demux/5_and.sub | 16 - .../4to16_demux/5_and_Previous_Values.xml | 1 - src/SubcircuitLibrary/4to16_demux/5_nand-cache.lib | 78 -- src/SubcircuitLibrary/4to16_demux/5_nand.cir | 13 - src/SubcircuitLibrary/4to16_demux/5_nand.cir.out | 18 - src/SubcircuitLibrary/4to16_demux/5_nand.pro | 83 -- src/SubcircuitLibrary/4to16_demux/5_nand.sch | 175 ---- src/SubcircuitLibrary/4to16_demux/5_nand.sub | 12 - .../4to16_demux/5_nand_Previous_Values.xml | 1 - src/SubcircuitLibrary/4to16_demux/analysis | 1 - 29 files changed, 2171 deletions(-) delete mode 100644 src/SubcircuitLibrary/4to16_demux/3_and-cache.lib delete mode 100644 src/SubcircuitLibrary/4to16_demux/3_and.cir delete mode 100644 src/SubcircuitLibrary/4to16_demux/3_and.cir.out delete mode 100644 src/SubcircuitLibrary/4to16_demux/3_and.pro delete mode 100644 src/SubcircuitLibrary/4to16_demux/3_and.sch delete mode 100644 src/SubcircuitLibrary/4to16_demux/3_and.sub delete mode 100644 src/SubcircuitLibrary/4to16_demux/3_and_Previous_Values.xml delete mode 100644 src/SubcircuitLibrary/4to16_demux/4to16_demux-cache.lib delete mode 100644 src/SubcircuitLibrary/4to16_demux/4to16_demux.cir delete mode 100644 src/SubcircuitLibrary/4to16_demux/4to16_demux.cir.out delete mode 100644 src/SubcircuitLibrary/4to16_demux/4to16_demux.pro delete mode 100644 src/SubcircuitLibrary/4to16_demux/4to16_demux.sch delete mode 100644 src/SubcircuitLibrary/4to16_demux/4to16_demux.sub delete mode 100644 src/SubcircuitLibrary/4to16_demux/4to16_demux_Previous_Values.xml delete mode 100644 src/SubcircuitLibrary/4to16_demux/5_and-cache.lib delete mode 100644 src/SubcircuitLibrary/4to16_demux/5_and.cir delete mode 100644 src/SubcircuitLibrary/4to16_demux/5_and.cir.out delete mode 100644 src/SubcircuitLibrary/4to16_demux/5_and.pro delete mode 100644 src/SubcircuitLibrary/4to16_demux/5_and.sch delete mode 100644 src/SubcircuitLibrary/4to16_demux/5_and.sub delete mode 100644 src/SubcircuitLibrary/4to16_demux/5_and_Previous_Values.xml delete mode 100644 src/SubcircuitLibrary/4to16_demux/5_nand-cache.lib delete mode 100644 src/SubcircuitLibrary/4to16_demux/5_nand.cir delete mode 100644 src/SubcircuitLibrary/4to16_demux/5_nand.cir.out delete mode 100644 src/SubcircuitLibrary/4to16_demux/5_nand.pro delete mode 100644 src/SubcircuitLibrary/4to16_demux/5_nand.sch delete mode 100644 src/SubcircuitLibrary/4to16_demux/5_nand.sub delete mode 100644 src/SubcircuitLibrary/4to16_demux/5_nand_Previous_Values.xml delete mode 100644 src/SubcircuitLibrary/4to16_demux/analysis (limited to 'src/SubcircuitLibrary/4to16_demux') diff --git a/src/SubcircuitLibrary/4to16_demux/3_and-cache.lib b/src/SubcircuitLibrary/4to16_demux/3_and-cache.lib deleted file mode 100644 index af058641..00000000 --- a/src/SubcircuitLibrary/4to16_demux/3_and-cache.lib +++ /dev/null @@ -1,61 +0,0 @@ -EESchema-LIBRARY Version 2.3 -#encoding utf-8 -# -# PORT -# -DEF PORT U 0 40 Y Y 26 F N -F0 "U" 50 100 30 H V C CNN -F1 "PORT" 0 0 30 H V C CNN -F2 "" 0 0 60 H V C CNN -F3 "" 0 0 60 H V C CNN -DRAW -A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0 -A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50 -S -100 50 100 -50 0 1 0 N -X ~ 1 250 0 100 L 30 30 1 1 B -X ~ 2 250 0 100 L 30 30 2 1 B -X ~ 3 250 0 100 L 30 30 3 1 B -X ~ 4 250 0 100 L 30 30 4 1 B -X ~ 5 250 0 100 L 30 30 5 1 B -X ~ 6 250 0 100 L 30 30 6 1 B -X ~ 7 250 0 100 L 30 30 7 1 B -X ~ 8 250 0 100 L 30 30 8 1 B -X ~ 9 250 0 100 L 30 30 9 1 B -X ~ 10 250 0 100 L 30 30 10 1 B -X ~ 11 250 0 100 L 30 30 11 1 B -X ~ 12 250 0 100 L 30 30 12 1 B -X ~ 13 250 0 100 L 30 30 13 1 B -X ~ 14 250 0 100 L 30 30 14 1 B -X ~ 15 250 0 100 L 30 30 15 1 B -X ~ 16 250 0 100 L 30 30 16 1 B -X ~ 17 250 0 100 L 30 30 17 1 B -X ~ 18 250 0 100 L 30 30 18 1 B -X ~ 19 250 0 100 L 30 30 19 1 B -X ~ 20 250 0 100 L 30 30 20 1 B -X ~ 21 250 0 100 L 30 30 21 1 B -X ~ 22 250 0 100 L 30 30 22 1 B -X ~ 23 250 0 100 L 30 30 23 1 B -X ~ 24 250 0 100 L 30 30 24 1 B -X ~ 25 250 0 100 L 30 30 25 1 B -X ~ 26 250 0 100 L 30 30 26 1 B -ENDDRAW -ENDDEF -# -# d_and -# -DEF d_and U 0 40 Y Y 1 F N -F0 "U" 0 0 60 H V C CNN -F1 "d_and" 50 100 60 H V C CNN -F2 "" 0 0 60 H V C CNN -F3 "" 0 0 60 H V C CNN -DRAW -A 149 50 100 -894 0 0 1 0 N 150 -50 250 50 -A 150 49 100 6 900 0 1 0 N 250 50 150 150 -P 4 0 1 0 150 -50 -250 -50 -250 150 150 150 N -X IN1 1 -450 100 200 R 50 50 1 1 I -X IN2 2 -450 0 200 R 50 50 1 1 I -X OUT 3 450 50 200 L 50 50 1 1 O -ENDDRAW -ENDDEF -# -#End Library diff --git a/src/SubcircuitLibrary/4to16_demux/3_and.cir b/src/SubcircuitLibrary/4to16_demux/3_and.cir deleted file mode 100644 index ba296cf0..00000000 --- a/src/SubcircuitLibrary/4to16_demux/3_and.cir +++ /dev/null @@ -1,13 +0,0 @@ -* C:\Users\malli\eSim\src\SubcircuitLibrary\3_and\3_and.cir - -* EESchema Netlist Version 1.1 (Spice format) creation date: 03/26/19 18:42:57 - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -* Sheet Name: / -U2 Net-_U1-Pad1_ Net-_U1-Pad2_ Net-_U2-Pad3_ d_and -U3 Net-_U2-Pad3_ Net-_U1-Pad3_ Net-_U1-Pad4_ d_and -U1 Net-_U1-Pad1_ Net-_U1-Pad2_ Net-_U1-Pad3_ Net-_U1-Pad4_ PORT - -.end diff --git a/src/SubcircuitLibrary/4to16_demux/3_and.cir.out b/src/SubcircuitLibrary/4to16_demux/3_and.cir.out deleted file mode 100644 index d7cf79a0..00000000 --- a/src/SubcircuitLibrary/4to16_demux/3_and.cir.out +++ /dev/null @@ -1,20 +0,0 @@ -* c:\users\malli\esim\src\subcircuitlibrary\3_and\3_and.cir - -* u2 net-_u1-pad1_ net-_u1-pad2_ net-_u2-pad3_ d_and -* u3 net-_u2-pad3_ net-_u1-pad3_ net-_u1-pad4_ d_and -* u1 net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ port -a1 [net-_u1-pad1_ net-_u1-pad2_ ] net-_u2-pad3_ u2 -a2 [net-_u2-pad3_ net-_u1-pad3_ ] net-_u1-pad4_ u3 -* Schematic Name: d_and, NgSpice Name: d_and -.model u2 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) -* Schematic Name: d_and, NgSpice Name: d_and -.model u3 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) -.tran 0e-00 0e-00 0e-00 - -* Control Statements -.control -run -print allv > plot_data_v.txt -print alli > plot_data_i.txt -.endc -.end diff --git a/src/SubcircuitLibrary/4to16_demux/3_and.pro b/src/SubcircuitLibrary/4to16_demux/3_and.pro deleted file mode 100644 index 76df4655..00000000 --- a/src/SubcircuitLibrary/4to16_demux/3_and.pro +++ /dev/null @@ -1,44 +0,0 @@ -update=05/31/19 15:26:09 -version=1 -last_client=eeschema -[general] -version=1 -RootSch= -BoardNm= -[pcbnew] -version=1 -LastNetListRead= -UseCmpFile=1 -PadDrill=0.600000000000 -PadDrillOvalY=0.600000000000 -PadSizeH=1.500000000000 -PadSizeV=1.500000000000 -PcbTextSizeV=1.500000000000 -PcbTextSizeH=1.500000000000 -PcbTextThickness=0.300000000000 -ModuleTextSizeV=1.000000000000 -ModuleTextSizeH=1.000000000000 -ModuleTextSizeThickness=0.150000000000 -SolderMaskClearance=0.000000000000 -SolderMaskMinWidth=0.000000000000 -DrawSegmentWidth=0.200000000000 -BoardOutlineThickness=0.100000000000 -ModuleOutlineThickness=0.150000000000 -[cvpcb] -version=1 -NetIExt=net -[eeschema] -version=1 -LibDir=../../../kicadSchematicLibrary -[eeschema/libraries] -LibName1=eSim_Analog -LibName2=eSim_Devices -LibName3=eSim_Digital -LibName4=eSim_Hybrid -LibName5=eSim_Miscellaneous -LibName6=eSim_Plot -LibName7=eSim_Power -LibName8=eSim_PSpice -LibName9=eSim_Sources -LibName10=eSim_Subckt -LibName11=eSim_User diff --git a/src/SubcircuitLibrary/4to16_demux/3_and.sch b/src/SubcircuitLibrary/4to16_demux/3_and.sch deleted file mode 100644 index d6ac89f9..00000000 --- a/src/SubcircuitLibrary/4to16_demux/3_and.sch +++ /dev/null @@ -1,130 +0,0 @@ -EESchema Schematic File Version 2 -LIBS:power -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:eSim_Analog -LIBS:eSim_Devices -LIBS:eSim_Digital -LIBS:eSim_Hybrid -LIBS:eSim_Miscellaneous -LIBS:eSim_Plot -LIBS:eSim_Power -LIBS:eSim_PSpice -LIBS:eSim_Sources -LIBS:eSim_Subckt -LIBS:eSim_User -LIBS:3_and-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11693 8268 -encoding utf-8 -Sheet 1 1 -Title "" -Date "" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -$Comp -L d_and U2 -U 1 1 5C9A24D8 -P 4250 2700 -F 0 "U2" H 4250 2700 60 0000 C CNN -F 1 "d_and" H 4300 2800 60 0000 C CNN -F 2 "" H 4250 2700 60 0000 C CNN -F 3 "" H 4250 2700 60 0000 C CNN - 1 4250 2700 - 1 0 0 -1 -$EndComp -$Comp -L d_and U3 -U 1 1 5C9A2538 -P 5150 2900 -F 0 "U3" H 5150 2900 60 0000 C CNN -F 1 "d_and" H 5200 3000 60 0000 C CNN -F 2 "" H 5150 2900 60 0000 C CNN -F 3 "" H 5150 2900 60 0000 C CNN - 1 5150 2900 - 1 0 0 -1 -$EndComp -$Comp -L PORT U1 -U 1 1 5C9A259A -P 3050 2600 -F 0 "U1" H 3100 2700 30 0000 C CNN -F 1 "PORT" H 3050 2600 30 0000 C CNN -F 2 "" H 3050 2600 60 0000 C CNN -F 3 "" H 3050 2600 60 0000 C CNN - 1 3050 2600 - 1 0 0 -1 -$EndComp -$Comp -L PORT U1 -U 2 1 5C9A25D9 -P 3050 2800 -F 0 "U1" H 3100 2900 30 0000 C CNN -F 1 "PORT" H 3050 2800 30 0000 C CNN -F 2 "" H 3050 2800 60 0000 C CNN -F 3 "" H 3050 2800 60 0000 C CNN - 2 3050 2800 - 1 0 0 -1 -$EndComp -$Comp -L PORT U1 -U 3 1 5C9A260A -P 3050 3100 -F 0 "U1" H 3100 3200 30 0000 C CNN -F 1 "PORT" H 3050 3100 30 0000 C CNN -F 2 "" H 3050 3100 60 0000 C CNN -F 3 "" H 3050 3100 60 0000 C CNN - 3 3050 3100 - 1 0 0 -1 -$EndComp -$Comp -L PORT U1 -U 4 1 5C9A2637 -P 6900 2850 -F 0 "U1" H 6950 2950 30 0000 C CNN -F 1 "PORT" H 6900 2850 30 0000 C CNN -F 2 "" H 6900 2850 60 0000 C CNN -F 3 "" H 6900 2850 60 0000 C CNN - 4 6900 2850 - -1 0 0 1 -$EndComp -Wire Wire Line - 4700 2650 4700 2800 -Wire Wire Line - 5600 2850 6650 2850 -Wire Wire Line - 3800 2600 3300 2600 -Wire Wire Line - 3800 2700 3300 2700 -Wire Wire Line - 3300 2700 3300 2800 -Wire Wire Line - 3300 3100 4700 3100 -Wire Wire Line - 4700 3100 4700 2900 -Text Notes 3500 2600 0 60 ~ 12 -in1 -Text Notes 3450 2800 0 60 ~ 12 -in2\n -Text Notes 3500 3100 0 60 ~ 12 -in3 -Text Notes 6100 2850 0 60 ~ 12 -out -$EndSCHEMATC diff --git a/src/SubcircuitLibrary/4to16_demux/3_and.sub b/src/SubcircuitLibrary/4to16_demux/3_and.sub deleted file mode 100644 index 3d9120bb..00000000 --- a/src/SubcircuitLibrary/4to16_demux/3_and.sub +++ /dev/null @@ -1,14 +0,0 @@ -* Subcircuit 3_and -.subckt 3_and net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ -* c:\users\malli\esim\src\subcircuitlibrary\3_and\3_and.cir -* u2 net-_u1-pad1_ net-_u1-pad2_ net-_u2-pad3_ d_and -* u3 net-_u2-pad3_ net-_u1-pad3_ net-_u1-pad4_ d_and -a1 [net-_u1-pad1_ net-_u1-pad2_ ] net-_u2-pad3_ u2 -a2 [net-_u2-pad3_ net-_u1-pad3_ ] net-_u1-pad4_ u3 -* Schematic Name: d_and, NgSpice Name: d_and -.model u2 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) -* Schematic Name: d_and, NgSpice Name: d_and -.model u3 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) -* Control Statements - -.ends 3_and \ No newline at end of file diff --git a/src/SubcircuitLibrary/4to16_demux/3_and_Previous_Values.xml b/src/SubcircuitLibrary/4to16_demux/3_and_Previous_Values.xml deleted file mode 100644 index abc5faaa..00000000 --- a/src/SubcircuitLibrary/4to16_demux/3_and_Previous_Values.xml +++ /dev/null @@ -1 +0,0 @@ -d_andd_andtruefalsefalseHzHz0Volts or AmperesVolts or AmperesVolts or AmperesVolts or AmperesVolts or AmperesVolts or AmperesSecSecSec \ No newline at end of file diff --git a/src/SubcircuitLibrary/4to16_demux/4to16_demux-cache.lib b/src/SubcircuitLibrary/4to16_demux/4to16_demux-cache.lib deleted file mode 100644 index 898ea926..00000000 --- a/src/SubcircuitLibrary/4to16_demux/4to16_demux-cache.lib +++ /dev/null @@ -1,97 +0,0 @@ -EESchema-LIBRARY Version 2.3 -#encoding utf-8 -# -# 5_nand -# -DEF 5_nand X 0 40 Y Y 1 F N -F0 "X" 50 -100 60 H V C CNN -F1 "5_nand" 100 150 60 H V C CNN -F2 "" 0 0 60 H V C CNN -F3 "" 0 0 60 H V C CNN -DRAW -A 100 0 255 787 -787 0 1 0 N 150 250 150 -250 -P 2 0 1 0 -250 250 150 250 N -P 3 0 1 0 -250 250 -250 -250 150 -250 N -X in1 1 -450 200 200 R 50 50 1 1 I -X in2 2 -450 100 200 R 50 50 1 1 I -X in3 3 -450 0 200 R 50 50 1 1 I -X in4 4 -450 -100 200 R 50 50 1 1 I -X in5 5 -450 -200 200 R 50 50 1 1 I -X out 6 550 0 200 L 50 50 1 1 O I -ENDDRAW -ENDDEF -# -# PORT -# -DEF PORT U 0 40 Y Y 26 F N -F0 "U" 50 100 30 H V C CNN -F1 "PORT" 0 0 30 H V C CNN -F2 "" 0 0 60 H V C CNN -F3 "" 0 0 60 H V C CNN -DRAW -A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0 -A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50 -S -100 50 100 -50 0 1 0 N -X ~ 1 250 0 100 L 30 30 1 1 B -X ~ 2 250 0 100 L 30 30 2 1 B -X ~ 3 250 0 100 L 30 30 3 1 B -X ~ 4 250 0 100 L 30 30 4 1 B -X ~ 5 250 0 100 L 30 30 5 1 B -X ~ 6 250 0 100 L 30 30 6 1 B -X ~ 7 250 0 100 L 30 30 7 1 B -X ~ 8 250 0 100 L 30 30 8 1 B -X ~ 9 250 0 100 L 30 30 9 1 B -X ~ 10 250 0 100 L 30 30 10 1 B -X ~ 11 250 0 100 L 30 30 11 1 B -X ~ 12 250 0 100 L 30 30 12 1 B -X ~ 13 250 0 100 L 30 30 13 1 B -X ~ 14 250 0 100 L 30 30 14 1 B -X ~ 15 250 0 100 L 30 30 15 1 B -X ~ 16 250 0 100 L 30 30 16 1 B -X ~ 17 250 0 100 L 30 30 17 1 B -X ~ 18 250 0 100 L 30 30 18 1 B -X ~ 19 250 0 100 L 30 30 19 1 B -X ~ 20 250 0 100 L 30 30 20 1 B -X ~ 21 250 0 100 L 30 30 21 1 B -X ~ 22 250 0 100 L 30 30 22 1 B -X ~ 23 250 0 100 L 30 30 23 1 B -X ~ 24 250 0 100 L 30 30 24 1 B -X ~ 25 250 0 100 L 30 30 25 1 B -X ~ 26 250 0 100 L 30 30 26 1 B -ENDDRAW -ENDDEF -# -# d_inverter -# -DEF d_inverter U 0 40 Y Y 1 F N -F0 "U" 0 -100 60 H V C CNN -F1 "d_inverter" 0 150 60 H V C CNN -F2 "" 50 -50 60 H V C CNN -F3 "" 50 -50 60 H V C CNN -DRAW -P 4 0 1 0 -100 50 -100 -50 100 0 -100 50 N -X ~ 1 -300 0 200 R 50 50 1 1 I -X ~ 2 300 0 200 L 50 50 1 1 O I -ENDDRAW -ENDDEF -# -# d_nor -# -DEF d_nor U 0 40 Y Y 1 F N -F0 "U" 0 0 60 H V C CNN -F1 "d_nor" 50 100 60 H V C CNN -F2 "" 0 0 60 H V C CNN -F3 "" 0 0 60 H V C CNN -DRAW -A -450 50 224 266 -266 0 1 0 N -250 150 -250 -50 -A -25 -124 325 574 323 0 1 0 N 150 150 250 50 -A 74 125 191 -665 -231 0 1 0 N 150 -50 250 50 -P 2 0 1 0 -250 -50 150 -50 N -P 2 0 1 0 -250 150 150 150 N -X IN1 1 -450 100 215 R 50 50 1 1 I -X IN2 2 -450 0 215 R 50 50 1 1 I -X OUT 3 450 50 200 L 50 50 1 1 O I -ENDDRAW -ENDDEF -# -#End Library diff --git a/src/SubcircuitLibrary/4to16_demux/4to16_demux.cir b/src/SubcircuitLibrary/4to16_demux/4to16_demux.cir deleted file mode 100644 index c97c2f8b..00000000 --- a/src/SubcircuitLibrary/4to16_demux/4to16_demux.cir +++ /dev/null @@ -1,32 +0,0 @@ -* /home/mallikarjuna/Downloads/eSim-1.1.2/src/SubcircuitLibrary/4to16_demux/4to16_demux.cir - -* EESchema Netlist Version 1.1 (Spice format) creation date: Fri Jun 21 17:01:07 2019 - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -* Sheet Name: / -U3 Net-_U1-Pad23_ Net-_U3-Pad2_ d_inverter -U4 Net-_U1-Pad22_ Net-_U4-Pad2_ d_inverter -U5 Net-_U1-Pad21_ Net-_U5-Pad2_ d_inverter -U6 Net-_U1-Pad20_ Net-_U6-Pad2_ d_inverter -U2 Net-_U1-Pad19_ Net-_U1-Pad18_ Net-_U2-Pad3_ d_nor -U1 Net-_U1-Pad1_ Net-_U1-Pad2_ Net-_U1-Pad3_ Net-_U1-Pad4_ Net-_U1-Pad5_ Net-_U1-Pad6_ Net-_U1-Pad7_ Net-_U1-Pad8_ Net-_U1-Pad9_ Net-_U1-Pad10_ Net-_U1-Pad11_ ? Net-_U1-Pad13_ Net-_U1-Pad14_ Net-_U1-Pad15_ Net-_U1-Pad16_ Net-_U1-Pad17_ Net-_U1-Pad18_ Net-_U1-Pad19_ Net-_U1-Pad20_ Net-_U1-Pad21_ Net-_U1-Pad22_ Net-_U1-Pad23_ ? PORT -X1 Net-_U3-Pad2_ Net-_U4-Pad2_ Net-_U5-Pad2_ Net-_U6-Pad2_ Net-_U2-Pad3_ Net-_U1-Pad1_ 5_nand -X2 Net-_U1-Pad23_ Net-_U4-Pad2_ Net-_U5-Pad2_ Net-_U6-Pad2_ Net-_U2-Pad3_ Net-_U1-Pad2_ 5_nand -X3 Net-_U3-Pad2_ Net-_U1-Pad22_ Net-_U5-Pad2_ Net-_U6-Pad2_ Net-_U2-Pad3_ Net-_U1-Pad3_ 5_nand -X4 Net-_U1-Pad23_ Net-_U1-Pad22_ Net-_U5-Pad2_ Net-_U6-Pad2_ Net-_U2-Pad3_ Net-_U1-Pad4_ 5_nand -X5 Net-_U3-Pad2_ Net-_U4-Pad2_ Net-_U1-Pad21_ Net-_U6-Pad2_ Net-_U2-Pad3_ Net-_U1-Pad5_ 5_nand -X6 Net-_U1-Pad23_ Net-_U4-Pad2_ Net-_U1-Pad21_ Net-_U6-Pad2_ Net-_U2-Pad3_ Net-_U1-Pad6_ 5_nand -X7 Net-_U3-Pad2_ Net-_U1-Pad22_ Net-_U1-Pad21_ Net-_U6-Pad2_ Net-_U2-Pad3_ Net-_U1-Pad7_ 5_nand -X8 Net-_U1-Pad23_ Net-_U1-Pad22_ Net-_U1-Pad21_ Net-_U6-Pad2_ Net-_U2-Pad3_ Net-_U1-Pad8_ 5_nand -X9 Net-_U3-Pad2_ Net-_U4-Pad2_ Net-_U5-Pad2_ Net-_U1-Pad20_ Net-_U2-Pad3_ Net-_U1-Pad9_ 5_nand -X10 Net-_U1-Pad23_ Net-_U4-Pad2_ Net-_U5-Pad2_ Net-_U1-Pad20_ Net-_U2-Pad3_ Net-_U1-Pad10_ 5_nand -X11 Net-_U3-Pad2_ Net-_U1-Pad22_ Net-_U5-Pad2_ Net-_U1-Pad20_ Net-_U2-Pad3_ Net-_U1-Pad11_ 5_nand -X12 Net-_U1-Pad23_ Net-_U1-Pad22_ Net-_U5-Pad2_ Net-_U1-Pad20_ Net-_U2-Pad3_ Net-_U1-Pad13_ 5_nand -X13 Net-_U3-Pad2_ Net-_U4-Pad2_ Net-_U1-Pad21_ Net-_U1-Pad20_ Net-_U2-Pad3_ Net-_U1-Pad14_ 5_nand -X14 Net-_U1-Pad23_ Net-_U4-Pad2_ Net-_U1-Pad21_ Net-_U1-Pad20_ Net-_U2-Pad3_ Net-_U1-Pad15_ 5_nand -X15 Net-_U3-Pad2_ Net-_U1-Pad22_ Net-_U1-Pad21_ Net-_U1-Pad20_ Net-_U2-Pad3_ Net-_U1-Pad16_ 5_nand -X16 Net-_U1-Pad23_ Net-_U1-Pad22_ Net-_U1-Pad21_ Net-_U1-Pad20_ Net-_U2-Pad3_ Net-_U1-Pad17_ 5_nand - -.end diff --git a/src/SubcircuitLibrary/4to16_demux/4to16_demux.cir.out b/src/SubcircuitLibrary/4to16_demux/4to16_demux.cir.out deleted file mode 100644 index eecdfb06..00000000 --- a/src/SubcircuitLibrary/4to16_demux/4to16_demux.cir.out +++ /dev/null @@ -1,49 +0,0 @@ -* /home/mallikarjuna/downloads/esim-1.1.2/src/subcircuitlibrary/4to16_demux/4to16_demux.cir - -.include 5_nand.sub -* u3 net-_u1-pad23_ net-_u3-pad2_ d_inverter -* u4 net-_u1-pad22_ net-_u4-pad2_ d_inverter -* u5 net-_u1-pad21_ net-_u5-pad2_ d_inverter -* u6 net-_u1-pad20_ net-_u6-pad2_ d_inverter -* u2 net-_u1-pad19_ net-_u1-pad18_ net-_u2-pad3_ d_nor -* u1 net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ net-_u1-pad5_ net-_u1-pad6_ net-_u1-pad7_ net-_u1-pad8_ net-_u1-pad9_ net-_u1-pad10_ net-_u1-pad11_ ? net-_u1-pad13_ net-_u1-pad14_ net-_u1-pad15_ net-_u1-pad16_ net-_u1-pad17_ net-_u1-pad18_ net-_u1-pad19_ net-_u1-pad20_ net-_u1-pad21_ net-_u1-pad22_ net-_u1-pad23_ ? port -x1 net-_u3-pad2_ net-_u4-pad2_ net-_u5-pad2_ net-_u6-pad2_ net-_u2-pad3_ net-_u1-pad1_ 5_nand -x2 net-_u1-pad23_ net-_u4-pad2_ net-_u5-pad2_ net-_u6-pad2_ net-_u2-pad3_ net-_u1-pad2_ 5_nand -x3 net-_u3-pad2_ net-_u1-pad22_ net-_u5-pad2_ net-_u6-pad2_ net-_u2-pad3_ net-_u1-pad3_ 5_nand -x4 net-_u1-pad23_ net-_u1-pad22_ net-_u5-pad2_ net-_u6-pad2_ net-_u2-pad3_ net-_u1-pad4_ 5_nand -x5 net-_u3-pad2_ net-_u4-pad2_ net-_u1-pad21_ net-_u6-pad2_ net-_u2-pad3_ net-_u1-pad5_ 5_nand -x6 net-_u1-pad23_ net-_u4-pad2_ net-_u1-pad21_ net-_u6-pad2_ net-_u2-pad3_ net-_u1-pad6_ 5_nand -x7 net-_u3-pad2_ net-_u1-pad22_ net-_u1-pad21_ net-_u6-pad2_ net-_u2-pad3_ net-_u1-pad7_ 5_nand -x8 net-_u1-pad23_ net-_u1-pad22_ net-_u1-pad21_ net-_u6-pad2_ net-_u2-pad3_ net-_u1-pad8_ 5_nand -x9 net-_u3-pad2_ net-_u4-pad2_ net-_u5-pad2_ net-_u1-pad20_ net-_u2-pad3_ net-_u1-pad9_ 5_nand -x10 net-_u1-pad23_ net-_u4-pad2_ net-_u5-pad2_ net-_u1-pad20_ net-_u2-pad3_ net-_u1-pad10_ 5_nand -x11 net-_u3-pad2_ net-_u1-pad22_ net-_u5-pad2_ net-_u1-pad20_ net-_u2-pad3_ net-_u1-pad11_ 5_nand -x12 net-_u1-pad23_ net-_u1-pad22_ net-_u5-pad2_ net-_u1-pad20_ net-_u2-pad3_ net-_u1-pad13_ 5_nand -x13 net-_u3-pad2_ net-_u4-pad2_ net-_u1-pad21_ net-_u1-pad20_ net-_u2-pad3_ net-_u1-pad14_ 5_nand -x14 net-_u1-pad23_ net-_u4-pad2_ net-_u1-pad21_ net-_u1-pad20_ net-_u2-pad3_ net-_u1-pad15_ 5_nand -x15 net-_u3-pad2_ net-_u1-pad22_ net-_u1-pad21_ net-_u1-pad20_ net-_u2-pad3_ net-_u1-pad16_ 5_nand -x16 net-_u1-pad23_ net-_u1-pad22_ net-_u1-pad21_ net-_u1-pad20_ net-_u2-pad3_ net-_u1-pad17_ 5_nand -a1 net-_u1-pad23_ net-_u3-pad2_ u3 -a2 net-_u1-pad22_ net-_u4-pad2_ u4 -a3 net-_u1-pad21_ net-_u5-pad2_ u5 -a4 net-_u1-pad20_ net-_u6-pad2_ u6 -a5 [net-_u1-pad19_ net-_u1-pad18_ ] net-_u2-pad3_ u2 -* Schematic Name: d_inverter, NgSpice Name: d_inverter -.model u3 d_inverter(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) -* Schematic Name: d_inverter, NgSpice Name: d_inverter -.model u4 d_inverter(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) -* Schematic Name: d_inverter, NgSpice Name: d_inverter -.model u5 d_inverter(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) -* Schematic Name: d_inverter, NgSpice Name: d_inverter -.model u6 d_inverter(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) -* Schematic Name: d_nor, NgSpice Name: d_nor -.model u2 d_nor(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) -.tran 0e-00 0e-00 0e-00 - -* Control Statements -.control -run -print allv > plot_data_v.txt -print alli > plot_data_i.txt -.endc -.end diff --git a/src/SubcircuitLibrary/4to16_demux/4to16_demux.pro b/src/SubcircuitLibrary/4to16_demux/4to16_demux.pro deleted file mode 100644 index 5a167cd9..00000000 --- a/src/SubcircuitLibrary/4to16_demux/4to16_demux.pro +++ /dev/null @@ -1,43 +0,0 @@ -update=Fri Jun 21 16:58:10 2019 -version=1 -last_client=eeschema -[general] -version=1 -RootSch= -BoardNm= -[pcbnew] -version=1 -LastNetListRead= -UseCmpFile=1 -PadDrill=0.600000000000 -PadDrillOvalY=0.600000000000 -PadSizeH=1.500000000000 -PadSizeV=1.500000000000 -PcbTextSizeV=1.500000000000 -PcbTextSizeH=1.500000000000 -PcbTextThickness=0.300000000000 -ModuleTextSizeV=1.000000000000 -ModuleTextSizeH=1.000000000000 -ModuleTextSizeThickness=0.150000000000 -SolderMaskClearance=0.000000000000 -SolderMaskMinWidth=0.000000000000 -DrawSegmentWidth=0.200000000000 -BoardOutlineThickness=0.100000000000 -ModuleOutlineThickness=0.150000000000 -[cvpcb] -version=1 -NetIExt=net -[eeschema] -version=1 -LibDir=../../../kicadSchematicLibrary -[eeschema/libraries] -LibName1=eSim_Analog -LibName2=eSim_Devices -LibName3=eSim_Digital -LibName4=eSim_Hybrid -LibName5=eSim_Miscellaneous -LibName6=eSim_Plot -LibName7=eSim_Power -LibName8=eSim_Sources -LibName9=eSim_User -LibName10=eSim_Subckt diff --git a/src/SubcircuitLibrary/4to16_demux/4to16_demux.sch b/src/SubcircuitLibrary/4to16_demux/4to16_demux.sch deleted file mode 100644 index c9142e27..00000000 --- a/src/SubcircuitLibrary/4to16_demux/4to16_demux.sch +++ /dev/null @@ -1,889 +0,0 @@ -EESchema Schematic File Version 2 -LIBS:eSim_Analog -LIBS:eSim_Devices -LIBS:eSim_Digital -LIBS:eSim_Hybrid -LIBS:eSim_Miscellaneous -LIBS:eSim_Plot -LIBS:eSim_Power -LIBS:eSim_Sources -LIBS:eSim_User -LIBS:eSim_Subckt -LIBS:4to16_demux-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11693 8268 -encoding utf-8 -Sheet 1 1 -Title "" -Date "" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -$Comp -L d_inverter U3 -U 1 1 5CF2315F -P 4700 1900 -F 0 "U3" H 4700 1800 60 0000 C CNN -F 1 "d_inverter" H 4700 2050 60 0000 C CNN -F 2 "" H 4750 1850 60 0000 C CNN -F 3 "" H 4750 1850 60 0000 C CNN - 1 4700 1900 - 0 1 1 0 -$EndComp -$Comp -L d_inverter U4 -U 1 1 5CF231D7 -P 5600 1850 -F 0 "U4" H 5600 1750 60 0000 C CNN -F 1 "d_inverter" H 5600 2000 60 0000 C CNN -F 2 "" H 5650 1800 60 0000 C CNN -F 3 "" H 5650 1800 60 0000 C CNN - 1 5600 1850 - 0 1 1 0 -$EndComp -$Comp -L d_inverter U5 -U 1 1 5CF23245 -P 6550 1850 -F 0 "U5" H 6550 1750 60 0000 C CNN -F 1 "d_inverter" H 6550 2000 60 0000 C CNN -F 2 "" H 6600 1800 60 0000 C CNN -F 3 "" H 6600 1800 60 0000 C CNN - 1 6550 1850 - 0 1 1 0 -$EndComp -$Comp -L d_inverter U6 -U 1 1 5CF232B2 -P 7500 1800 -F 0 "U6" H 7500 1700 60 0000 C CNN -F 1 "d_inverter" H 7500 1950 60 0000 C CNN -F 2 "" H 7550 1750 60 0000 C CNN -F 3 "" H 7550 1750 60 0000 C CNN - 1 7500 1800 - 0 1 1 0 -$EndComp -Text Notes 1300 5450 0 60 ~ 0 -~Y0 -Text Notes 1950 5450 0 60 ~ 0 -~Y1\n -Text Notes 2500 5450 0 60 ~ 0 -~Y2\n -Text Notes 3050 5450 0 60 ~ 0 -~Y3\n -Text Notes 3600 5450 0 60 ~ 0 -~Y4\n -Text Notes 4150 5500 0 60 ~ 0 -~Y5\n -Text Notes 4700 5500 0 60 ~ 0 -~Y6\n -Text Notes 5250 5500 0 60 ~ 0 -~Y7\n -Text Notes 5800 5500 0 60 ~ 0 -~Y8\n -Text Notes 6400 5500 0 60 ~ 0 -~Y9\n -Text Notes 6950 5500 0 60 ~ 0 -~Y10\n -Text Notes 7500 5500 0 60 ~ 0 -~Y11\n -Text Notes 8050 5500 0 60 ~ 0 -~Y12\n -Text Notes 8600 5500 0 60 ~ 0 -~Y13\n -Text Notes 9150 5500 0 60 ~ 0 -~Y14\n -Text Notes 9700 5500 0 60 ~ 0 -~Y15\n -Wire Wire Line - 4700 1250 4700 1600 -Wire Wire Line - 5600 1150 5600 1550 -Wire Wire Line - 6550 1100 6550 1550 -Wire Wire Line - 7500 1050 7500 1500 -Wire Wire Line - 1400 4400 1400 2950 -Wire Wire Line - 1400 2950 9700 2950 -Wire Wire Line - 1950 2950 1950 4400 -Wire Wire Line - 2500 2950 2500 4400 -Connection ~ 1950 2950 -Wire Wire Line - 3050 2950 3050 4400 -Connection ~ 2500 2950 -Wire Wire Line - 3600 2950 3600 4400 -Connection ~ 3050 2950 -Wire Wire Line - 4150 2950 4150 4400 -Connection ~ 3600 2950 -Wire Wire Line - 4700 2950 4700 4400 -Connection ~ 4150 2950 -Wire Wire Line - 5250 2950 5250 4400 -Connection ~ 4700 2950 -Wire Wire Line - 5800 2950 5800 4400 -Connection ~ 5250 2950 -Wire Wire Line - 6400 2950 6400 4400 -Connection ~ 5800 2950 -Wire Wire Line - 6950 2950 6950 4400 -Connection ~ 6400 2950 -Wire Wire Line - 7500 2950 7500 4400 -Connection ~ 6950 2950 -Wire Wire Line - 8050 2950 8050 4400 -Connection ~ 7500 2950 -Wire Wire Line - 8600 2950 8600 4400 -Connection ~ 8050 2950 -Wire Wire Line - 9150 2950 9150 4400 -Connection ~ 8600 2950 -Wire Wire Line - 9700 2950 9700 4400 -Connection ~ 9150 2950 -Wire Wire Line - 7500 2100 7500 2800 -Wire Wire Line - 7500 2800 7400 2800 -Wire Wire Line - 7400 2800 7400 3050 -Wire Wire Line - 7400 3050 1500 3050 -Wire Wire Line - 1500 3050 1500 4400 -Wire Wire Line - 2050 4400 2050 3050 -Connection ~ 2050 3050 -Wire Wire Line - 2600 4400 2600 3050 -Connection ~ 2600 3050 -Wire Wire Line - 3150 4400 3150 3050 -Connection ~ 3150 3050 -Wire Wire Line - 3700 4400 3700 3050 -Connection ~ 3700 3050 -Wire Wire Line - 4250 4400 4250 3050 -Connection ~ 4250 3050 -Wire Wire Line - 4800 4400 4800 3050 -Connection ~ 4800 3050 -Wire Wire Line - 5350 4400 5350 3050 -Connection ~ 5350 3050 -Wire Wire Line - 6550 3150 6550 2150 -Wire Wire Line - 1600 3150 7700 3150 -Wire Wire Line - 1600 3150 1600 4400 -Wire Wire Line - 2150 4400 2150 3150 -Connection ~ 2150 3150 -Wire Wire Line - 2700 4400 2700 3150 -Connection ~ 2700 3150 -Wire Wire Line - 3250 4400 3250 3150 -Connection ~ 3250 3150 -Wire Wire Line - 5600 3250 5600 2150 -Wire Wire Line - 1700 3250 8900 3250 -Wire Wire Line - 1700 3250 1700 4400 -Wire Wire Line - 2250 4400 2250 3250 -Connection ~ 2250 3250 -Wire Wire Line - 3900 4400 3900 3250 -Connection ~ 3900 3250 -Wire Wire Line - 4450 4400 4450 3250 -Connection ~ 4450 3250 -Wire Wire Line - 6100 3250 6100 4400 -Connection ~ 5600 3250 -Wire Wire Line - 6700 3250 6700 4400 -Connection ~ 6100 3250 -Wire Wire Line - 8350 3250 8350 4400 -Connection ~ 6700 3250 -Wire Wire Line - 8900 3250 8900 4400 -Connection ~ 8350 3250 -Wire Wire Line - 4700 2200 4700 2850 -Wire Wire Line - 4700 2850 4600 2850 -Wire Wire Line - 4600 2850 4600 3350 -Wire Wire Line - 1800 3350 1800 4400 -Wire Wire Line - 2900 4400 2900 3350 -Connection ~ 2900 3350 -Connection ~ 4600 3350 -Wire Wire Line - 2350 2650 2350 4400 -Wire Wire Line - 4000 3350 4000 4400 -Connection ~ 4000 3350 -Wire Wire Line - 5100 3350 5100 4400 -Connection ~ 5100 3350 -Wire Wire Line - 6200 3350 6200 4400 -Connection ~ 6200 3350 -Wire Wire Line - 7350 3350 7350 4400 -Connection ~ 7350 3350 -Wire Wire Line - 8450 3350 8450 4400 -Connection ~ 8450 3350 -Wire Wire Line - 1800 3350 9550 3350 -Wire Wire Line - 9550 3350 9550 4400 -Wire Wire Line - 2350 3450 10100 3450 -Wire Wire Line - 3450 3450 3450 4400 -Wire Wire Line - 4550 3450 4550 4400 -Connection ~ 3450 3450 -Wire Wire Line - 5650 3450 5650 4400 -Connection ~ 4550 3450 -Wire Wire Line - 6800 3450 6800 4400 -Connection ~ 5650 3450 -Wire Wire Line - 7900 3450 7900 4400 -Connection ~ 6800 3450 -Wire Wire Line - 9000 3450 9000 4400 -Connection ~ 7900 3450 -Wire Wire Line - 10100 3450 10100 4400 -Connection ~ 9000 3450 -Wire Wire Line - 10000 3550 10000 4400 -Wire Wire Line - 2800 3550 10000 3550 -Wire Wire Line - 9450 3550 9450 4400 -Wire Wire Line - 7800 3550 7800 4400 -Connection ~ 9450 3550 -Wire Wire Line - 7250 3550 7250 4400 -Connection ~ 7800 3550 -Wire Wire Line - 5550 3550 5550 4400 -Connection ~ 7250 3550 -Wire Wire Line - 5000 1400 5000 4400 -Connection ~ 5550 3550 -Wire Wire Line - 3350 3550 3350 4400 -Connection ~ 5000 3550 -Wire Wire Line - 2800 3550 2800 4400 -Connection ~ 3350 3550 -Wire Wire Line - 5000 1400 5600 1400 -Connection ~ 5600 1400 -Wire Wire Line - 9900 3700 9900 4400 -Wire Wire Line - 3800 3700 9900 3700 -Wire Wire Line - 9350 3700 9350 4400 -Wire Wire Line - 8800 3700 8800 4400 -Connection ~ 9350 3700 -Wire Wire Line - 8250 3700 8250 4400 -Connection ~ 8800 3700 -Wire Wire Line - 5450 3700 5450 4400 -Connection ~ 8250 3700 -Wire Wire Line - 4900 3700 4900 4400 -Connection ~ 5450 3700 -Wire Wire Line - 4350 3700 4350 4400 -Connection ~ 4900 3700 -Wire Wire Line - 3800 3700 3800 4400 -Connection ~ 4350 3700 -Wire Wire Line - 5950 3700 5950 1350 -Wire Wire Line - 5950 1350 6550 1350 -Connection ~ 6550 1350 -Connection ~ 5950 3700 -Wire Wire Line - 9800 3850 9800 4400 -Wire Wire Line - 5900 3850 9800 3850 -Wire Wire Line - 9250 3850 9250 4400 -Wire Wire Line - 8700 3850 8700 4400 -Connection ~ 9250 3850 -Wire Wire Line - 8150 3850 8150 4400 -Connection ~ 8700 3850 -Wire Wire Line - 7600 3850 7600 4400 -Connection ~ 8150 3850 -Wire Wire Line - 7050 1350 7050 4400 -Connection ~ 7600 3850 -Wire Wire Line - 6500 3850 6500 4400 -Connection ~ 7050 3850 -Wire Wire Line - 5900 3850 5900 4400 -Connection ~ 6500 3850 -Wire Wire Line - 7050 1350 7500 1350 -Connection ~ 7500 1350 -Wire Wire Line - 7700 3150 7700 4400 -Connection ~ 6550 3150 -Wire Wire Line - 7150 4400 7150 3150 -Connection ~ 7150 3150 -Wire Wire Line - 6600 3150 6600 4400 -Connection ~ 6600 3150 -Wire Wire Line - 6000 4400 6000 3150 -Connection ~ 6000 3150 -Connection ~ 2350 3450 -Connection ~ 4700 1450 -Wire Wire Line - 4000 1450 4700 1450 -Wire Wire Line - 2350 2650 4000 2650 -Wire Wire Line - 4000 2650 4000 1450 -$Comp -L d_nor U2 -U 1 1 5CF2CBDC -P 1600 2050 -F 0 "U2" H 1600 2050 60 0000 C CNN -F 1 "d_nor" H 1650 2150 60 0000 C CNN -F 2 "" H 1600 2050 60 0000 C CNN -F 3 "" H 1600 2050 60 0000 C CNN - 1 1600 2050 - 0 1 1 0 -$EndComp -Wire Wire Line - 1650 2500 1650 2950 -Connection ~ 1650 2950 -Wire Wire Line - 1700 1600 1700 1200 -Wire Wire Line - 1600 1600 1600 1200 -$Comp -L PORT U1 -U 18 1 5CF2D1A2 -P 1600 950 -F 0 "U1" H 1650 1050 30 0000 C CNN -F 1 "PORT" H 1600 950 30 0000 C CNN -F 2 "" H 1600 950 60 0000 C CNN -F 3 "" H 1600 950 60 0000 C CNN - 18 1600 950 - 0 1 1 0 -$EndComp -$Comp -L PORT U1 -U 19 1 5CF2D207 -P 1900 900 -F 0 "U1" H 1950 1000 30 0000 C CNN -F 1 "PORT" H 1900 900 30 0000 C CNN -F 2 "" H 1900 900 60 0000 C CNN -F 3 "" H 1900 900 60 0000 C CNN - 19 1900 900 - 0 1 1 0 -$EndComp -Wire Wire Line - 1900 1150 1900 1200 -Wire Wire Line - 1900 1200 1700 1200 -$Comp -L PORT U1 -U 23 1 5CF2D33A -P 4700 1000 -F 0 "U1" H 4750 1100 30 0000 C CNN -F 1 "PORT" H 4700 1000 30 0000 C CNN -F 2 "" H 4700 1000 60 0000 C CNN -F 3 "" H 4700 1000 60 0000 C CNN - 23 4700 1000 - 0 1 1 0 -$EndComp -$Comp -L PORT U1 -U 22 1 5CF2D510 -P 5600 900 -F 0 "U1" H 5650 1000 30 0000 C CNN -F 1 "PORT" H 5600 900 30 0000 C CNN -F 2 "" H 5600 900 60 0000 C CNN -F 3 "" H 5600 900 60 0000 C CNN - 22 5600 900 - 0 1 1 0 -$EndComp -$Comp -L PORT U1 -U 21 1 5CF2D57F -P 6550 850 -F 0 "U1" H 6600 950 30 0000 C CNN -F 1 "PORT" H 6550 850 30 0000 C CNN -F 2 "" H 6550 850 60 0000 C CNN -F 3 "" H 6550 850 60 0000 C CNN - 21 6550 850 - 0 1 1 0 -$EndComp -$Comp -L PORT U1 -U 20 1 5CF2D6A5 -P 7500 800 -F 0 "U1" H 7550 900 30 0000 C CNN -F 1 "PORT" H 7500 800 30 0000 C CNN -F 2 "" H 7500 800 60 0000 C CNN -F 3 "" H 7500 800 60 0000 C CNN - 20 7500 800 - 0 1 1 0 -$EndComp -Text Notes 7700 950 0 60 ~ 0 -A3\n -$Comp -L PORT U1 -U 1 1 5CF2DE5C -P 1600 6200 -F 0 "U1" H 1650 6300 30 0000 C CNN -F 1 "PORT" H 1600 6200 30 0000 C CNN -F 2 "" H 1600 6200 60 0000 C CNN -F 3 "" H 1600 6200 60 0000 C CNN - 1 1600 6200 - 0 -1 -1 0 -$EndComp -$Comp -L PORT U1 -U 2 1 5CF2E1AE -P 2150 6200 -F 0 "U1" H 2200 6300 30 0000 C CNN -F 1 "PORT" H 2150 6200 30 0000 C CNN -F 2 "" H 2150 6200 60 0000 C CNN -F 3 "" H 2150 6200 60 0000 C CNN - 2 2150 6200 - 0 -1 -1 0 -$EndComp -$Comp -L PORT U1 -U 3 1 5CF2E23B -P 2700 6200 -F 0 "U1" H 2750 6300 30 0000 C CNN -F 1 "PORT" H 2700 6200 30 0000 C CNN -F 2 "" H 2700 6200 60 0000 C CNN -F 3 "" H 2700 6200 60 0000 C CNN - 3 2700 6200 - 0 -1 -1 0 -$EndComp -$Comp -L PORT U1 -U 4 1 5CF2E2B3 -P 3250 6200 -F 0 "U1" H 3300 6300 30 0000 C CNN -F 1 "PORT" H 3250 6200 30 0000 C CNN -F 2 "" H 3250 6200 60 0000 C CNN -F 3 "" H 3250 6200 60 0000 C CNN - 4 3250 6200 - 0 -1 -1 0 -$EndComp -$Comp -L PORT U1 -U 5 1 5CF2E32C -P 3800 6200 -F 0 "U1" H 3850 6300 30 0000 C CNN -F 1 "PORT" H 3800 6200 30 0000 C CNN -F 2 "" H 3800 6200 60 0000 C CNN -F 3 "" H 3800 6200 60 0000 C CNN - 5 3800 6200 - 0 -1 -1 0 -$EndComp -$Comp -L PORT U1 -U 6 1 5CF2E3CE -P 4350 6200 -F 0 "U1" H 4400 6300 30 0000 C CNN -F 1 "PORT" H 4350 6200 30 0000 C CNN -F 2 "" H 4350 6200 60 0000 C CNN -F 3 "" H 4350 6200 60 0000 C CNN - 6 4350 6200 - 0 -1 -1 0 -$EndComp -$Comp -L PORT U1 -U 7 1 5CF2E4B6 -P 4900 6200 -F 0 "U1" H 4950 6300 30 0000 C CNN -F 1 "PORT" H 4900 6200 30 0000 C CNN -F 2 "" H 4900 6200 60 0000 C CNN -F 3 "" H 4900 6200 60 0000 C CNN - 7 4900 6200 - 0 -1 -1 0 -$EndComp -$Comp -L PORT U1 -U 8 1 5CF2E5CA -P 5450 6200 -F 0 "U1" H 5500 6300 30 0000 C CNN -F 1 "PORT" H 5450 6200 30 0000 C CNN -F 2 "" H 5450 6200 60 0000 C CNN -F 3 "" H 5450 6200 60 0000 C CNN - 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6000 5400 6000 5950 -Wire Wire Line - 5450 5400 5450 5950 -Wire Wire Line - 4900 5400 4900 5950 -Wire Wire Line - 4350 5400 4350 5950 -Wire Wire Line - 3800 5400 3800 5950 -Wire Wire Line - 3250 5400 3250 5950 -Wire Wire Line - 2700 5400 2700 5950 -Wire Wire Line - 2150 5400 2150 5950 -Wire Wire Line - 1600 5400 1600 5950 -$Comp -L PORT U1 -U 24 1 5CF327C1 -P 6500 6950 -F 0 "U1" H 6550 7050 30 0000 C CNN -F 1 "PORT" H 6500 6950 30 0000 C CNN -F 2 "" H 6500 6950 60 0000 C CNN -F 3 "" H 6500 6950 60 0000 C CNN - 24 6500 6950 - 0 -1 -1 0 -$EndComp -NoConn ~ 6500 6700 -$Comp -L PORT U1 -U 12 1 5CF33A86 -P 3400 900 -F 0 "U1" H 3450 1000 30 0000 C CNN -F 1 "PORT" H 3400 900 30 0000 C CNN -F 2 "" H 3400 900 60 0000 C CNN -F 3 "" H 3400 900 60 0000 C CNN - 12 3400 900 - 0 1 1 0 -$EndComp -NoConn ~ 3400 1150 -$Comp -L 5_nand X1 -U 1 1 5D0CC4BF -P 1600 4850 -F 0 "X1" H 1650 4750 60 0000 C CNN -F 1 "5_nand" H 1700 5000 60 0000 C CNN -F 2 "" H 1600 4850 60 0000 C CNN -F 3 "" H 1600 4850 60 0000 C CNN - 1 1600 4850 - 0 1 1 0 -$EndComp -$Comp -L 5_nand X2 -U 1 1 5D0CC967 -P 2150 4850 -F 0 "X2" H 2200 4750 60 0000 C CNN -F 1 "5_nand" H 2250 5000 60 0000 C CNN -F 2 "" H 2150 4850 60 0000 C CNN -F 3 "" H 2150 4850 60 0000 C CNN - 1 2150 4850 - 0 1 1 0 -$EndComp -$Comp -L 5_nand X3 -U 1 1 5D0CC9F8 -P 2700 4850 -F 0 "X3" H 2750 4750 60 0000 C CNN -F 1 "5_nand" H 2800 5000 60 0000 C CNN -F 2 "" H 2700 4850 60 0000 C CNN -F 3 "" H 2700 4850 60 0000 C CNN - 1 2700 4850 - 0 1 1 0 -$EndComp -$Comp -L 5_nand X4 -U 1 1 5D0CCA7E -P 3250 4850 -F 0 "X4" H 3300 4750 60 0000 C CNN -F 1 "5_nand" H 3350 5000 60 0000 C CNN -F 2 "" H 3250 4850 60 0000 C CNN -F 3 "" H 3250 4850 60 0000 C CNN - 1 3250 4850 - 0 1 1 0 -$EndComp -$Comp -L 5_nand X5 -U 1 1 5D0CCB6A -P 3800 4850 -F 0 "X5" H 3850 4750 60 0000 C CNN -F 1 "5_nand" H 3900 5000 60 0000 C CNN -F 2 "" H 3800 4850 60 0000 C CNN -F 3 "" H 3800 4850 60 0000 C CNN - 1 3800 4850 - 0 1 1 0 -$EndComp -$Comp -L 5_nand X6 -U 1 1 5D0CCBF6 -P 4350 4850 -F 0 "X6" H 4400 4750 60 0000 C CNN -F 1 "5_nand" H 4450 5000 60 0000 C CNN -F 2 "" H 4350 4850 60 0000 C CNN -F 3 "" H 4350 4850 60 0000 C CNN - 1 4350 4850 - 0 1 1 0 -$EndComp -$Comp -L 5_nand X7 -U 1 1 5D0CCC81 -P 4900 4850 -F 0 "X7" H 4950 4750 60 0000 C CNN -F 1 "5_nand" H 5000 5000 60 0000 C CNN -F 2 "" H 4900 4850 60 0000 C CNN -F 3 "" H 4900 4850 60 0000 C CNN - 1 4900 4850 - 0 1 1 0 -$EndComp -$Comp -L 5_nand X8 -U 1 1 5D0CCD0B -P 5450 4850 -F 0 "X8" H 5500 4750 60 0000 C CNN -F 1 "5_nand" H 5550 5000 60 0000 C CNN -F 2 "" H 5450 4850 60 0000 C CNN -F 3 "" H 5450 4850 60 0000 C CNN - 1 5450 4850 - 0 1 1 0 -$EndComp -$Comp -L 5_nand X9 -U 1 1 5D0CCE34 -P 6000 4850 -F 0 "X9" H 6050 4750 60 0000 C CNN -F 1 "5_nand" H 6100 5000 60 0000 C CNN -F 2 "" H 6000 4850 60 0000 C CNN -F 3 "" H 6000 4850 60 0000 C CNN - 1 6000 4850 - 0 1 1 0 -$EndComp -$Comp -L 5_nand X10 -U 1 1 5D0CCECA -P 6600 4850 -F 0 "X10" H 6650 4750 60 0000 C CNN -F 1 "5_nand" H 6700 5000 60 0000 C CNN -F 2 "" H 6600 4850 60 0000 C CNN -F 3 "" H 6600 4850 60 0000 C CNN - 1 6600 4850 - 0 1 1 0 -$EndComp -$Comp -L 5_nand X11 -U 1 1 5D0CCF63 -P 7150 4850 -F 0 "X11" H 7200 4750 60 0000 C CNN -F 1 "5_nand" H 7250 5000 60 0000 C CNN -F 2 "" H 7150 4850 60 0000 C CNN -F 3 "" H 7150 4850 60 0000 C CNN - 1 7150 4850 - 0 1 1 0 -$EndComp -$Comp -L 5_nand X12 -U 1 1 5D0CD07D -P 7700 4850 -F 0 "X12" H 7750 4750 60 0000 C CNN -F 1 "5_nand" H 7800 5000 60 0000 C CNN -F 2 "" H 7700 4850 60 0000 C CNN -F 3 "" H 7700 4850 60 0000 C CNN - 1 7700 4850 - 0 1 1 0 -$EndComp -$Comp -L 5_nand X13 -U 1 1 5D0CD124 -P 8250 4850 -F 0 "X13" H 8300 4750 60 0000 C CNN -F 1 "5_nand" H 8350 5000 60 0000 C CNN -F 2 "" H 8250 4850 60 0000 C CNN -F 3 "" H 8250 4850 60 0000 C CNN - 1 8250 4850 - 0 1 1 0 -$EndComp -$Comp -L 5_nand X14 -U 1 1 5D0CD1C6 -P 8800 4850 -F 0 "X14" H 8850 4750 60 0000 C CNN -F 1 "5_nand" H 8900 5000 60 0000 C CNN -F 2 "" H 8800 4850 60 0000 C CNN -F 3 "" H 8800 4850 60 0000 C CNN - 1 8800 4850 - 0 1 1 0 -$EndComp -$Comp -L 5_nand X15 -U 1 1 5D0CD348 -P 9350 4850 -F 0 "X15" H 9400 4750 60 0000 C CNN -F 1 "5_nand" H 9450 5000 60 0000 C CNN -F 2 "" H 9350 4850 60 0000 C CNN -F 3 "" H 9350 4850 60 0000 C CNN - 1 9350 4850 - 0 1 1 0 -$EndComp -$Comp -L 5_nand X16 -U 1 1 5D0CD3EE -P 9900 4850 -F 0 "X16" H 9950 4750 60 0000 C CNN -F 1 "5_nand" H 10000 5000 60 0000 C CNN -F 2 "" H 9900 4850 60 0000 C CNN -F 3 "" H 9900 4850 60 0000 C CNN - 1 9900 4850 - 0 1 1 0 -$EndComp -$EndSCHEMATC diff --git a/src/SubcircuitLibrary/4to16_demux/4to16_demux.sub b/src/SubcircuitLibrary/4to16_demux/4to16_demux.sub deleted file mode 100644 index 4f7595da..00000000 --- a/src/SubcircuitLibrary/4to16_demux/4to16_demux.sub +++ /dev/null @@ -1,43 +0,0 @@ -* Subcircuit 4to16_demux -.subckt 4to16_demux net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ net-_u1-pad5_ net-_u1-pad6_ net-_u1-pad7_ net-_u1-pad8_ net-_u1-pad9_ net-_u1-pad10_ net-_u1-pad11_ ? net-_u1-pad13_ net-_u1-pad14_ net-_u1-pad15_ net-_u1-pad16_ net-_u1-pad17_ net-_u1-pad18_ net-_u1-pad19_ net-_u1-pad20_ net-_u1-pad21_ net-_u1-pad22_ net-_u1-pad23_ ? -* /home/mallikarjuna/downloads/esim-1.1.2/src/subcircuitlibrary/4to16_demux/4to16_demux.cir -.include 5_nand.sub -* u3 net-_u1-pad23_ net-_u3-pad2_ d_inverter -* u4 net-_u1-pad22_ net-_u4-pad2_ d_inverter -* u5 net-_u1-pad21_ net-_u5-pad2_ d_inverter -* u6 net-_u1-pad20_ net-_u6-pad2_ d_inverter -* u2 net-_u1-pad19_ net-_u1-pad18_ net-_u2-pad3_ d_nor -x1 net-_u3-pad2_ net-_u4-pad2_ net-_u5-pad2_ net-_u6-pad2_ net-_u2-pad3_ net-_u1-pad1_ 5_nand -x2 net-_u1-pad23_ net-_u4-pad2_ net-_u5-pad2_ net-_u6-pad2_ net-_u2-pad3_ net-_u1-pad2_ 5_nand -x3 net-_u3-pad2_ net-_u1-pad22_ net-_u5-pad2_ net-_u6-pad2_ net-_u2-pad3_ net-_u1-pad3_ 5_nand -x4 net-_u1-pad23_ net-_u1-pad22_ net-_u5-pad2_ net-_u6-pad2_ net-_u2-pad3_ net-_u1-pad4_ 5_nand -x5 net-_u3-pad2_ net-_u4-pad2_ net-_u1-pad21_ net-_u6-pad2_ net-_u2-pad3_ net-_u1-pad5_ 5_nand -x6 net-_u1-pad23_ net-_u4-pad2_ net-_u1-pad21_ net-_u6-pad2_ net-_u2-pad3_ net-_u1-pad6_ 5_nand -x7 net-_u3-pad2_ net-_u1-pad22_ net-_u1-pad21_ net-_u6-pad2_ net-_u2-pad3_ net-_u1-pad7_ 5_nand -x8 net-_u1-pad23_ net-_u1-pad22_ net-_u1-pad21_ net-_u6-pad2_ net-_u2-pad3_ net-_u1-pad8_ 5_nand -x9 net-_u3-pad2_ net-_u4-pad2_ net-_u5-pad2_ net-_u1-pad20_ net-_u2-pad3_ net-_u1-pad9_ 5_nand -x10 net-_u1-pad23_ net-_u4-pad2_ net-_u5-pad2_ net-_u1-pad20_ net-_u2-pad3_ net-_u1-pad10_ 5_nand -x11 net-_u3-pad2_ net-_u1-pad22_ net-_u5-pad2_ net-_u1-pad20_ net-_u2-pad3_ net-_u1-pad11_ 5_nand -x12 net-_u1-pad23_ net-_u1-pad22_ net-_u5-pad2_ net-_u1-pad20_ net-_u2-pad3_ net-_u1-pad13_ 5_nand -x13 net-_u3-pad2_ net-_u4-pad2_ net-_u1-pad21_ net-_u1-pad20_ net-_u2-pad3_ net-_u1-pad14_ 5_nand -x14 net-_u1-pad23_ net-_u4-pad2_ net-_u1-pad21_ net-_u1-pad20_ net-_u2-pad3_ net-_u1-pad15_ 5_nand -x15 net-_u3-pad2_ net-_u1-pad22_ net-_u1-pad21_ net-_u1-pad20_ net-_u2-pad3_ net-_u1-pad16_ 5_nand -x16 net-_u1-pad23_ net-_u1-pad22_ net-_u1-pad21_ net-_u1-pad20_ net-_u2-pad3_ net-_u1-pad17_ 5_nand -a1 net-_u1-pad23_ net-_u3-pad2_ u3 -a2 net-_u1-pad22_ net-_u4-pad2_ u4 -a3 net-_u1-pad21_ net-_u5-pad2_ u5 -a4 net-_u1-pad20_ net-_u6-pad2_ u6 -a5 [net-_u1-pad19_ net-_u1-pad18_ ] net-_u2-pad3_ u2 -* Schematic Name: d_inverter, NgSpice Name: d_inverter -.model u3 d_inverter(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) -* Schematic Name: d_inverter, NgSpice Name: d_inverter -.model u4 d_inverter(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) -* Schematic Name: d_inverter, NgSpice Name: d_inverter -.model u5 d_inverter(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) -* Schematic Name: d_inverter, NgSpice Name: d_inverter -.model u6 d_inverter(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) -* Schematic Name: d_nor, NgSpice Name: d_nor -.model u2 d_nor(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) -* Control Statements - -.ends 4to16_demux \ No newline at end of file diff --git a/src/SubcircuitLibrary/4to16_demux/4to16_demux_Previous_Values.xml b/src/SubcircuitLibrary/4to16_demux/4to16_demux_Previous_Values.xml deleted file mode 100644 index 93c6f25a..00000000 --- a/src/SubcircuitLibrary/4to16_demux/4to16_demux_Previous_Values.xml +++ /dev/null @@ -1 +0,0 @@ -d_inverterd_inverterd_inverterd_inverterd_nor/home/mallikarjuna/Downloads/eSim-1.1.2/src/SubcircuitLibrary/5_nand/home/mallikarjuna/Downloads/eSim-1.1.2/src/SubcircuitLibrary/5_nand/home/mallikarjuna/Downloads/eSim-1.1.2/src/SubcircuitLibrary/5_nand/home/mallikarjuna/Downloads/eSim-1.1.2/src/SubcircuitLibrary/5_nand/home/mallikarjuna/Downloads/eSim-1.1.2/src/SubcircuitLibrary/5_nand/home/mallikarjuna/Downloads/eSim-1.1.2/src/SubcircuitLibrary/5_nand/home/mallikarjuna/Downloads/eSim-1.1.2/src/SubcircuitLibrary/5_nand/home/mallikarjuna/Downloads/eSim-1.1.2/src/SubcircuitLibrary/5_nand/home/mallikarjuna/Downloads/eSim-1.1.2/src/SubcircuitLibrary/5_nand/home/mallikarjuna/Downloads/eSim-1.1.2/src/SubcircuitLibrary/5_nand/home/mallikarjuna/Downloads/eSim-1.1.2/src/SubcircuitLibrary/5_nand/home/mallikarjuna/Downloads/eSim-1.1.2/src/SubcircuitLibrary/5_nand/home/mallikarjuna/Downloads/eSim-1.1.2/src/SubcircuitLibrary/5_nand/home/mallikarjuna/Downloads/eSim-1.1.2/src/SubcircuitLibrary/5_nand/home/mallikarjuna/Downloads/eSim-1.1.2/src/SubcircuitLibrary/5_nand/home/mallikarjuna/Downloads/eSim-1.1.2/src/SubcircuitLibrary/5_nandtruefalsefalseHzHz0Volts or AmperesVolts or AmperesVolts or AmperesVolts or AmperesVolts or AmperesVolts or AmperesSecSecSec \ No newline at end of file diff --git a/src/SubcircuitLibrary/4to16_demux/5_and-cache.lib b/src/SubcircuitLibrary/4to16_demux/5_and-cache.lib deleted file mode 100644 index ac396288..00000000 --- a/src/SubcircuitLibrary/4to16_demux/5_and-cache.lib +++ /dev/null @@ -1,79 +0,0 @@ -EESchema-LIBRARY Version 2.3 -#encoding utf-8 -# -# 3_and -# -DEF 3_and X 0 40 Y Y 1 F N -F0 "X" 900 300 60 H V C CNN -F1 "3_and" 950 500 60 H V C CNN -F2 "" 0 0 60 H V C CNN -F3 "" 0 0 60 H V C CNN -DRAW -A 950 400 158 716 -716 0 1 0 N 1000 550 1000 250 -P 2 0 1 0 650 550 1000 550 N -P 3 0 1 0 650 550 650 250 1000 250 N -X in1 1 450 500 200 R 50 50 1 1 I -X in2 2 450 400 200 R 50 50 1 1 I -X in3 3 450 300 200 R 50 50 1 1 I -X out 4 1300 400 200 L 50 50 1 1 O -ENDDRAW -ENDDEF -# -# PORT -# -DEF PORT U 0 40 Y Y 26 F N -F0 "U" 50 100 30 H V C CNN -F1 "PORT" 0 0 30 H V C CNN -F2 "" 0 0 60 H V C CNN -F3 "" 0 0 60 H V C CNN -DRAW -A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0 -A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50 -S -100 50 100 -50 0 1 0 N -X ~ 1 250 0 100 L 30 30 1 1 B -X ~ 2 250 0 100 L 30 30 2 1 B -X ~ 3 250 0 100 L 30 30 3 1 B -X ~ 4 250 0 100 L 30 30 4 1 B -X ~ 5 250 0 100 L 30 30 5 1 B -X ~ 6 250 0 100 L 30 30 6 1 B -X ~ 7 250 0 100 L 30 30 7 1 B -X ~ 8 250 0 100 L 30 30 8 1 B -X ~ 9 250 0 100 L 30 30 9 1 B -X ~ 10 250 0 100 L 30 30 10 1 B -X ~ 11 250 0 100 L 30 30 11 1 B -X ~ 12 250 0 100 L 30 30 12 1 B -X ~ 13 250 0 100 L 30 30 13 1 B -X ~ 14 250 0 100 L 30 30 14 1 B -X ~ 15 250 0 100 L 30 30 15 1 B -X ~ 16 250 0 100 L 30 30 16 1 B -X ~ 17 250 0 100 L 30 30 17 1 B -X ~ 18 250 0 100 L 30 30 18 1 B -X ~ 19 250 0 100 L 30 30 19 1 B -X ~ 20 250 0 100 L 30 30 20 1 B -X ~ 21 250 0 100 L 30 30 21 1 B -X ~ 22 250 0 100 L 30 30 22 1 B -X ~ 23 250 0 100 L 30 30 23 1 B -X ~ 24 250 0 100 L 30 30 24 1 B -X ~ 25 250 0 100 L 30 30 25 1 B -X ~ 26 250 0 100 L 30 30 26 1 B -ENDDRAW -ENDDEF -# -# d_and -# -DEF d_and U 0 40 Y Y 1 F N -F0 "U" 0 0 60 H V C CNN -F1 "d_and" 50 100 60 H V C CNN -F2 "" 0 0 60 H V C CNN -F3 "" 0 0 60 H V C CNN -DRAW -A 149 50 100 -894 0 0 1 0 N 150 -50 250 50 -A 150 49 100 6 900 0 1 0 N 250 50 150 150 -P 4 0 1 0 150 -50 -250 -50 -250 150 150 150 N -X IN1 1 -450 100 200 R 50 50 1 1 I -X IN2 2 -450 0 200 R 50 50 1 1 I -X OUT 3 450 50 200 L 50 50 1 1 O -ENDDRAW -ENDDEF -# -#End Library diff --git a/src/SubcircuitLibrary/4to16_demux/5_and.cir b/src/SubcircuitLibrary/4to16_demux/5_and.cir deleted file mode 100644 index 6a05b9b5..00000000 --- a/src/SubcircuitLibrary/4to16_demux/5_and.cir +++ /dev/null @@ -1,14 +0,0 @@ -* C:\Users\malli\eSim\src\SubcircuitLibrary\5_and\5_and.cir - -* EESchema Netlist Version 1.1 (Spice format) creation date: 03/26/19 18:53:13 - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -* Sheet Name: / -X1 Net-_U1-Pad1_ Net-_U1-Pad2_ Net-_U1-Pad3_ Net-_U3-Pad1_ 3_and -U2 Net-_U1-Pad4_ Net-_U1-Pad5_ Net-_U2-Pad3_ d_and -U3 Net-_U3-Pad1_ Net-_U2-Pad3_ Net-_U1-Pad6_ d_and -U1 Net-_U1-Pad1_ Net-_U1-Pad2_ Net-_U1-Pad3_ Net-_U1-Pad4_ Net-_U1-Pad5_ Net-_U1-Pad6_ PORT - -.end diff --git a/src/SubcircuitLibrary/4to16_demux/5_and.cir.out b/src/SubcircuitLibrary/4to16_demux/5_and.cir.out deleted file mode 100644 index 6a6b126a..00000000 --- a/src/SubcircuitLibrary/4to16_demux/5_and.cir.out +++ /dev/null @@ -1,22 +0,0 @@ -* c:\users\malli\esim\src\subcircuitlibrary\5_and\5_and.cir - -.include 3_and.sub -x1 net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u3-pad1_ 3_and -* u2 net-_u1-pad4_ net-_u1-pad5_ net-_u2-pad3_ d_and -* u3 net-_u3-pad1_ net-_u2-pad3_ net-_u1-pad6_ d_and -* u1 net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ net-_u1-pad5_ net-_u1-pad6_ port -a1 [net-_u1-pad4_ net-_u1-pad5_ ] net-_u2-pad3_ u2 -a2 [net-_u3-pad1_ net-_u2-pad3_ ] net-_u1-pad6_ u3 -* Schematic Name: d_and, NgSpice Name: d_and -.model u2 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) -* Schematic Name: d_and, NgSpice Name: d_and -.model u3 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) -.tran 0e-00 0e-00 0e-00 - -* Control Statements -.control -run -print allv > plot_data_v.txt -print alli > plot_data_i.txt -.endc -.end diff --git a/src/SubcircuitLibrary/4to16_demux/5_and.pro b/src/SubcircuitLibrary/4to16_demux/5_and.pro deleted file mode 100644 index 7a2f090e..00000000 --- a/src/SubcircuitLibrary/4to16_demux/5_and.pro +++ /dev/null @@ -1,50 +0,0 @@ -update=06/01/19 11:31:03 -version=1 -last_client=eeschema -[general] -version=1 -RootSch= -BoardNm= -[pcbnew] -version=1 -LastNetListRead= -UseCmpFile=1 -PadDrill=0.600000000000 -PadDrillOvalY=0.600000000000 -PadSizeH=1.500000000000 -PadSizeV=1.500000000000 -PcbTextSizeV=1.500000000000 -PcbTextSizeH=1.500000000000 -PcbTextThickness=0.300000000000 -ModuleTextSizeV=1.000000000000 -ModuleTextSizeH=1.000000000000 -ModuleTextSizeThickness=0.150000000000 -SolderMaskClearance=0.000000000000 -SolderMaskMinWidth=0.000000000000 -DrawSegmentWidth=0.200000000000 -BoardOutlineThickness=0.100000000000 -ModuleOutlineThickness=0.150000000000 -[cvpcb] -version=1 -NetIExt=net -[eeschema] -version=1 -LibDir=../../../kicadSchematicLibrary -[eeschema/libraries] -LibName1=cypress -LibName2=siliconi -LibName3=opto -LibName4=atmel -LibName5=contrib -LibName6=valves -LibName7=eSim_Analog -LibName8=eSim_Devices -LibName9=eSim_Digital -LibName10=eSim_Hybrid -LibName11=eSim_Miscellaneous -LibName12=eSim_Plot -LibName13=eSim_Power -LibName14=eSim_PSpice -LibName15=eSim_Sources -LibName16=eSim_Subckt -LibName17=eSim_User diff --git a/src/SubcircuitLibrary/4to16_demux/5_and.sch b/src/SubcircuitLibrary/4to16_demux/5_and.sch deleted file mode 100644 index e9eb58ee..00000000 --- a/src/SubcircuitLibrary/4to16_demux/5_and.sch +++ /dev/null @@ -1,171 +0,0 @@ -EESchema Schematic File Version 2 -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:eSim_Analog -LIBS:eSim_Devices -LIBS:eSim_Digital -LIBS:eSim_Hybrid -LIBS:eSim_Miscellaneous -LIBS:eSim_Plot -LIBS:eSim_Power -LIBS:eSim_PSpice -LIBS:eSim_Sources -LIBS:eSim_Subckt -LIBS:eSim_User -LIBS:5_and-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11693 8268 -encoding utf-8 -Sheet 1 1 -Title "" -Date "" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -$Comp -L 3_and X1 -U 1 1 5C9A2741 -P 3800 3350 -F 0 "X1" H 4700 3650 60 0000 C CNN -F 1 "3_and" H 4750 3850 60 0000 C CNN -F 2 "" H 3800 3350 60 0000 C CNN -F 3 "" H 3800 3350 60 0000 C CNN - 1 3800 3350 - 1 0 0 -1 -$EndComp -$Comp -L d_and U2 -U 1 1 5C9A2764 -P 4650 3400 -F 0 "U2" H 4650 3400 60 0000 C CNN -F 1 "d_and" H 4700 3500 60 0000 C CNN -F 2 "" H 4650 3400 60 0000 C CNN -F 3 "" H 4650 3400 60 0000 C CNN - 1 4650 3400 - 1 0 0 -1 -$EndComp -$Comp -L d_and U3 -U 1 1 5C9A2791 -P 5550 3200 -F 0 "U3" H 5550 3200 60 0000 C CNN -F 1 "d_and" H 5600 3300 60 0000 C CNN -F 2 "" H 5550 3200 60 0000 C CNN -F 3 "" H 5550 3200 60 0000 C CNN - 1 5550 3200 - 1 0 0 -1 -$EndComp -Wire Wire Line - 5100 3100 5100 2950 -Wire Wire Line - 5100 3200 5100 3350 -Wire Wire Line - 4250 2850 4250 2700 -Wire Wire Line - 4250 2700 3600 2700 -Wire Wire Line - 4250 2950 4150 2950 -Wire Wire Line - 4150 2950 4150 2900 -Wire Wire Line - 4150 2900 3600 2900 -Wire Wire Line - 4200 3300 3600 3300 -Wire Wire Line - 4250 3050 4250 3100 -Wire Wire Line - 4250 3100 3600 3100 -Wire Wire Line - 4200 3400 4200 3500 -Wire Wire Line - 4200 3500 3600 3500 -Wire Wire Line - 6000 3150 6500 3150 -$Comp -L PORT U1 -U 1 1 5C9A2865 -P 3350 2700 -F 0 "U1" H 3400 2800 30 0000 C CNN -F 1 "PORT" H 3350 2700 30 0000 C CNN -F 2 "" H 3350 2700 60 0000 C CNN -F 3 "" H 3350 2700 60 0000 C CNN - 1 3350 2700 - 1 0 0 -1 -$EndComp -$Comp -L PORT U1 -U 2 1 5C9A28B6 -P 3350 2900 -F 0 "U1" H 3400 3000 30 0000 C CNN -F 1 "PORT" H 3350 2900 30 0000 C CNN -F 2 "" H 3350 2900 60 0000 C CNN -F 3 "" H 3350 2900 60 0000 C CNN - 2 3350 2900 - 1 0 0 -1 -$EndComp -$Comp -L PORT U1 -U 3 1 5C9A28D9 -P 3350 3100 -F 0 "U1" H 3400 3200 30 0000 C CNN -F 1 "PORT" H 3350 3100 30 0000 C CNN -F 2 "" H 3350 3100 60 0000 C CNN -F 3 "" H 3350 3100 60 0000 C CNN - 3 3350 3100 - 1 0 0 -1 -$EndComp -$Comp -L PORT U1 -U 4 1 5C9A28FF -P 3350 3300 -F 0 "U1" H 3400 3400 30 0000 C CNN -F 1 "PORT" H 3350 3300 30 0000 C CNN -F 2 "" H 3350 3300 60 0000 C CNN -F 3 "" H 3350 3300 60 0000 C CNN - 4 3350 3300 - 1 0 0 -1 -$EndComp -$Comp -L PORT U1 -U 5 1 5C9A2928 -P 3350 3500 -F 0 "U1" H 3400 3600 30 0000 C CNN -F 1 "PORT" H 3350 3500 30 0000 C CNN -F 2 "" H 3350 3500 60 0000 C CNN -F 3 "" H 3350 3500 60 0000 C CNN - 5 3350 3500 - 1 0 0 -1 -$EndComp -$Comp -L PORT U1 -U 6 1 5C9A2958 -P 6750 3150 -F 0 "U1" H 6800 3250 30 0000 C CNN -F 1 "PORT" H 6750 3150 30 0000 C CNN -F 2 "" H 6750 3150 60 0000 C CNN -F 3 "" H 6750 3150 60 0000 C CNN - 6 6750 3150 - -1 0 0 1 -$EndComp -Text Notes 3800 2700 0 60 ~ 12 -in1 -Text Notes 3800 2900 0 60 ~ 12 -in2 -Text Notes 3800 3100 0 60 ~ 12 -in3 -Text Notes 3800 3300 0 60 ~ 12 -in4 -Text Notes 3800 3500 0 60 ~ 12 -in5 -Text Notes 6150 3150 0 60 ~ 12 -out -$EndSCHEMATC diff --git a/src/SubcircuitLibrary/4to16_demux/5_and.sub b/src/SubcircuitLibrary/4to16_demux/5_and.sub deleted file mode 100644 index 35b10e17..00000000 --- a/src/SubcircuitLibrary/4to16_demux/5_and.sub +++ /dev/null @@ -1,16 +0,0 @@ -* Subcircuit 5_and -.subckt 5_and net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ net-_u1-pad5_ net-_u1-pad6_ -* c:\users\malli\esim\src\subcircuitlibrary\5_and\5_and.cir -.include 3_and.sub -x1 net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u3-pad1_ 3_and -* u2 net-_u1-pad4_ net-_u1-pad5_ net-_u2-pad3_ d_and -* u3 net-_u3-pad1_ net-_u2-pad3_ net-_u1-pad6_ d_and -a1 [net-_u1-pad4_ net-_u1-pad5_ ] net-_u2-pad3_ u2 -a2 [net-_u3-pad1_ net-_u2-pad3_ ] net-_u1-pad6_ u3 -* Schematic Name: d_and, NgSpice Name: d_and -.model u2 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) -* Schematic Name: d_and, NgSpice Name: d_and -.model u3 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) -* Control Statements - -.ends 5_and \ No newline at end of file diff --git a/src/SubcircuitLibrary/4to16_demux/5_and_Previous_Values.xml b/src/SubcircuitLibrary/4to16_demux/5_and_Previous_Values.xml deleted file mode 100644 index ae2c08a7..00000000 --- a/src/SubcircuitLibrary/4to16_demux/5_and_Previous_Values.xml +++ /dev/null @@ -1 +0,0 @@ -d_andd_andC:\Users\malli\eSim\src\SubcircuitLibrary\3_andtruefalsefalseHzHz0Volts or AmperesVolts or AmperesVolts or AmperesVolts or AmperesVolts or AmperesVolts or AmperesSecSecSec \ No newline at end of file diff --git a/src/SubcircuitLibrary/4to16_demux/5_nand-cache.lib b/src/SubcircuitLibrary/4to16_demux/5_nand-cache.lib deleted file mode 100644 index cb517be1..00000000 --- a/src/SubcircuitLibrary/4to16_demux/5_nand-cache.lib +++ /dev/null @@ -1,78 +0,0 @@ -EESchema-LIBRARY Version 2.3 -#encoding utf-8 -# -# 5_and -# -DEF 5_and X 0 40 Y Y 1 F N -F0 "X" 50 -100 60 H V C CNN -F1 "5_and" 100 150 60 H V C CNN -F2 "" 0 0 60 H V C CNN -F3 "" 0 0 60 H V C CNN -DRAW -A 100 0 255 787 -787 0 1 0 N 150 250 150 -250 -P 2 0 1 0 -250 250 150 250 N -P 3 0 1 0 -250 250 -250 -250 150 -250 N -X in1 1 -450 200 200 R 50 50 1 1 I -X in2 2 -450 100 200 R 50 50 1 1 I -X in3 3 -450 0 200 R 50 50 1 1 I -X in4 4 -450 -100 200 R 50 50 1 1 I -X in5 5 -450 -200 200 R 50 50 1 1 I -X out 6 550 0 200 L 50 50 1 1 O -ENDDRAW -ENDDEF -# -# PORT -# -DEF PORT U 0 40 Y Y 26 F N -F0 "U" 50 100 30 H V C CNN -F1 "PORT" 0 0 30 H V C CNN -F2 "" 0 0 60 H V C CNN -F3 "" 0 0 60 H V C CNN -DRAW -A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0 -A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50 -S -100 50 100 -50 0 1 0 N -X ~ 1 250 0 100 L 30 30 1 1 B -X ~ 2 250 0 100 L 30 30 2 1 B -X ~ 3 250 0 100 L 30 30 3 1 B -X ~ 4 250 0 100 L 30 30 4 1 B -X ~ 5 250 0 100 L 30 30 5 1 B -X ~ 6 250 0 100 L 30 30 6 1 B -X ~ 7 250 0 100 L 30 30 7 1 B -X ~ 8 250 0 100 L 30 30 8 1 B -X ~ 9 250 0 100 L 30 30 9 1 B -X ~ 10 250 0 100 L 30 30 10 1 B -X ~ 11 250 0 100 L 30 30 11 1 B -X ~ 12 250 0 100 L 30 30 12 1 B -X ~ 13 250 0 100 L 30 30 13 1 B -X ~ 14 250 0 100 L 30 30 14 1 B -X ~ 15 250 0 100 L 30 30 15 1 B -X ~ 16 250 0 100 L 30 30 16 1 B -X ~ 17 250 0 100 L 30 30 17 1 B -X ~ 18 250 0 100 L 30 30 18 1 B -X ~ 19 250 0 100 L 30 30 19 1 B -X ~ 20 250 0 100 L 30 30 20 1 B -X ~ 21 250 0 100 L 30 30 21 1 B -X ~ 22 250 0 100 L 30 30 22 1 B -X ~ 23 250 0 100 L 30 30 23 1 B -X ~ 24 250 0 100 L 30 30 24 1 B -X ~ 25 250 0 100 L 30 30 25 1 B -X ~ 26 250 0 100 L 30 30 26 1 B -ENDDRAW -ENDDEF -# -# d_inverter -# -DEF d_inverter U 0 40 Y Y 1 F N -F0 "U" 0 -100 60 H V C CNN -F1 "d_inverter" 0 150 60 H V C CNN -F2 "" 50 -50 60 H V C CNN -F3 "" 50 -50 60 H V C CNN -DRAW -P 4 0 1 0 -100 50 -100 -50 100 0 -100 50 N -X ~ 1 -300 0 200 R 50 50 1 1 I -X ~ 2 300 0 200 L 50 50 1 1 O I -ENDDRAW -ENDDEF -# -#End Library diff --git a/src/SubcircuitLibrary/4to16_demux/5_nand.cir b/src/SubcircuitLibrary/4to16_demux/5_nand.cir deleted file mode 100644 index e833d0f4..00000000 --- a/src/SubcircuitLibrary/4to16_demux/5_nand.cir +++ /dev/null @@ -1,13 +0,0 @@ -* /home/mallikarjuna/Downloads/eSim-1.1.2/src/SubcircuitLibrary/5_nand/5_nand.cir - -* EESchema Netlist Version 1.1 (Spice format) creation date: Fri Jun 21 16:57:27 2019 - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -* Sheet Name: / -X1 Net-_U1-Pad1_ Net-_U1-Pad2_ Net-_U1-Pad3_ Net-_U1-Pad4_ Net-_U1-Pad5_ Net-_U2-Pad1_ 5_and -U2 Net-_U2-Pad1_ Net-_U1-Pad6_ d_inverter -U1 Net-_U1-Pad1_ Net-_U1-Pad2_ Net-_U1-Pad3_ Net-_U1-Pad4_ Net-_U1-Pad5_ Net-_U1-Pad6_ PORT - -.end diff --git a/src/SubcircuitLibrary/4to16_demux/5_nand.cir.out b/src/SubcircuitLibrary/4to16_demux/5_nand.cir.out deleted file mode 100644 index 164de911..00000000 --- a/src/SubcircuitLibrary/4to16_demux/5_nand.cir.out +++ /dev/null @@ -1,18 +0,0 @@ -* /home/mallikarjuna/downloads/esim-1.1.2/src/subcircuitlibrary/5_nand/5_nand.cir - -.include 5_and.sub -x1 net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ net-_u1-pad5_ net-_u2-pad1_ 5_and -* u2 net-_u2-pad1_ net-_u1-pad6_ d_inverter -* u1 net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ net-_u1-pad5_ net-_u1-pad6_ port -a1 net-_u2-pad1_ net-_u1-pad6_ u2 -* Schematic Name: d_inverter, NgSpice Name: d_inverter -.model u2 d_inverter(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) -.tran 0e-00 0e-00 0e-00 - -* Control Statements -.control -run -print allv > plot_data_v.txt -print alli > plot_data_i.txt -.endc -.end diff --git a/src/SubcircuitLibrary/4to16_demux/5_nand.pro b/src/SubcircuitLibrary/4to16_demux/5_nand.pro deleted file mode 100644 index b7d23f44..00000000 --- a/src/SubcircuitLibrary/4to16_demux/5_nand.pro +++ /dev/null @@ -1,83 +0,0 @@ -update=Fri Jun 21 16:46:10 2019 -version=1 -last_client=eeschema -[general] -version=1 -RootSch= -BoardNm= -[pcbnew] -version=1 -LastNetListRead= -UseCmpFile=1 -PadDrill=0.600000000000 -PadDrillOvalY=0.600000000000 -PadSizeH=1.500000000000 -PadSizeV=1.500000000000 -PcbTextSizeV=1.500000000000 -PcbTextSizeH=1.500000000000 -PcbTextThickness=0.300000000000 -ModuleTextSizeV=1.000000000000 -ModuleTextSizeH=1.000000000000 -ModuleTextSizeThickness=0.150000000000 -SolderMaskClearance=0.000000000000 -SolderMaskMinWidth=0.000000000000 -DrawSegmentWidth=0.200000000000 -BoardOutlineThickness=0.100000000000 -ModuleOutlineThickness=0.150000000000 -[cvpcb] -version=1 -NetIExt=net -[eeschema] -version=1 -LibDir=../../../kicadSchematicLibrary -[eeschema/libraries] -LibName1=adc-dac -LibName2=memory -LibName3=xilinx -LibName4=microcontrollers -LibName5=dsp -LibName6=microchip -LibName7=analog_switches -LibName8=motorola -LibName9=texas -LibName10=intel -LibName11=audio -LibName12=interface -LibName13=digital-audio -LibName14=philips -LibName15=display -LibName16=cypress -LibName17=siliconi -LibName18=opto -LibName19=atmel -LibName20=contrib -LibName21=power -LibName22=device -LibName23=transistors -LibName24=conn -LibName25=linear -LibName26=regul -LibName27=74xx -LibName28=cmos4000 -LibName29=eSim_Analog -LibName30=eSim_Devices -LibName31=eSim_Digital -LibName32=eSim_Hybrid -LibName33=eSim_Miscellaneous -LibName34=eSim_Power -LibName35=eSim_Sources -LibName36=eSim_Subckt -LibName37=eSim_User -LibName38=eSim_Plot -LibName39=eSim_PSpice -LibName40=/home/mallikarjuna/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_Analog -LibName41=/home/mallikarjuna/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_Devices -LibName42=/home/mallikarjuna/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_Digital -LibName43=/home/mallikarjuna/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_Hybrid -LibName44=/home/mallikarjuna/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_Miscellaneous -LibName45=/home/mallikarjuna/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_Plot -LibName46=/home/mallikarjuna/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_Power -LibName47=/home/mallikarjuna/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_Sources -LibName48=/home/mallikarjuna/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_Subckt -LibName49=/home/mallikarjuna/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_User - diff --git a/src/SubcircuitLibrary/4to16_demux/5_nand.sch b/src/SubcircuitLibrary/4to16_demux/5_nand.sch deleted file mode 100644 index 86379b08..00000000 --- a/src/SubcircuitLibrary/4to16_demux/5_nand.sch +++ /dev/null @@ -1,175 +0,0 @@ -EESchema Schematic File Version 2 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:eSim_Analog -LIBS:eSim_Devices -LIBS:eSim_Digital -LIBS:eSim_Hybrid -LIBS:eSim_Miscellaneous -LIBS:eSim_Power -LIBS:eSim_Sources -LIBS:eSim_Subckt -LIBS:eSim_User -LIBS:eSim_Plot -LIBS:eSim_PSpice -EELAYER 25 0 -EELAYER END -$Descr A4 11693 8268 -encoding utf-8 -Sheet 1 1 -Title "" -Date "" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -$Comp -L 5_and X1 -U 1 1 5D0CBD44 -P 4150 3700 -F 0 "X1" H 4200 3600 60 0000 C CNN -F 1 "5_and" H 4250 3850 60 0000 C CNN -F 2 "" H 4150 3700 60 0000 C CNN -F 3 "" H 4150 3700 60 0000 C CNN - 1 4150 3700 - 1 0 0 -1 -$EndComp -$Comp -L d_inverter U2 -U 1 1 5D0CBD97 -P 5150 3700 -F 0 "U2" H 5150 3600 60 0000 C CNN -F 1 "d_inverter" H 5150 3850 60 0000 C CNN -F 2 "" H 5200 3650 60 0000 C CNN -F 3 "" H 5200 3650 60 0000 C CNN - 1 5150 3700 - 1 0 0 -1 -$EndComp -$Comp -L PORT U1 -U 1 1 5D0CBDBE -P 2900 2900 -F 0 "U1" H 2950 3000 30 0000 C CNN -F 1 "PORT" H 2900 2900 30 0000 C CNN -F 2 "" H 2900 2900 60 0000 C CNN -F 3 "" H 2900 2900 60 0000 C CNN - 1 2900 2900 - 1 0 0 -1 -$EndComp -$Comp -L PORT U1 -U 2 1 5D0CBDF4 -P 2900 3150 -F 0 "U1" H 2950 3250 30 0000 C CNN -F 1 "PORT" H 2900 3150 30 0000 C CNN -F 2 "" H 2900 3150 60 0000 C CNN -F 3 "" H 2900 3150 60 0000 C CNN - 2 2900 3150 - 1 0 0 -1 -$EndComp -$Comp -L PORT U1 -U 3 1 5D0CBE16 -P 2900 3400 -F 0 "U1" H 2950 3500 30 0000 C CNN -F 1 "PORT" H 2900 3400 30 0000 C CNN -F 2 "" H 2900 3400 60 0000 C CNN -F 3 "" H 2900 3400 60 0000 C CNN - 3 2900 3400 - 1 0 0 -1 -$EndComp -$Comp -L PORT U1 -U 4 1 5D0CBE3F -P 2900 3750 -F 0 "U1" H 2950 3850 30 0000 C CNN -F 1 "PORT" H 2900 3750 30 0000 C CNN -F 2 "" H 2900 3750 60 0000 C CNN -F 3 "" H 2900 3750 60 0000 C CNN - 4 2900 3750 - 1 0 0 -1 -$EndComp -$Comp -L PORT U1 -U 5 1 5D0CBE6B -P 2900 4150 -F 0 "U1" H 2950 4250 30 0000 C CNN -F 1 "PORT" H 2900 4150 30 0000 C CNN -F 2 "" H 2900 4150 60 0000 C CNN -F 3 "" H 2900 4150 60 0000 C CNN - 5 2900 4150 - 1 0 0 -1 -$EndComp -$Comp -L PORT U1 -U 6 1 5D0CBE9C -P 6200 3700 -F 0 "U1" H 6250 3800 30 0000 C CNN -F 1 "PORT" H 6200 3700 30 0000 C CNN -F 2 "" H 6200 3700 60 0000 C CNN -F 3 "" H 6200 3700 60 0000 C CNN - 6 6200 3700 - -1 0 0 1 -$EndComp -Wire Wire Line - 3150 2900 3700 2900 -Wire Wire Line - 3700 2900 3700 3500 -Wire Wire Line - 3700 3600 3500 3600 -Wire Wire Line - 3500 3600 3500 3150 -Wire Wire Line - 3500 3150 3150 3150 -Wire Wire Line - 3150 3400 3350 3400 -Wire Wire Line - 3350 3400 3350 3700 -Wire Wire Line - 3350 3700 3700 3700 -Wire Wire Line - 3700 3800 3250 3800 -Wire Wire Line - 3250 3800 3250 3750 -Wire Wire Line - 3250 3750 3150 3750 -Wire Wire Line - 3150 4150 3350 4150 -Wire Wire Line - 3350 4150 3350 3900 -Wire Wire Line - 3350 3900 3700 3900 -Wire Wire Line - 4700 3700 4850 3700 -Wire Wire Line - 5450 3700 5950 3700 -$EndSCHEMATC diff --git a/src/SubcircuitLibrary/4to16_demux/5_nand.sub b/src/SubcircuitLibrary/4to16_demux/5_nand.sub deleted file mode 100644 index c3e041fa..00000000 --- a/src/SubcircuitLibrary/4to16_demux/5_nand.sub +++ /dev/null @@ -1,12 +0,0 @@ -* Subcircuit 5_nand -.subckt 5_nand net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ net-_u1-pad5_ net-_u1-pad6_ -* /home/mallikarjuna/downloads/esim-1.1.2/src/subcircuitlibrary/5_nand/5_nand.cir -.include 5_and.sub -x1 net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ net-_u1-pad5_ net-_u2-pad1_ 5_and -* u2 net-_u2-pad1_ net-_u1-pad6_ d_inverter -a1 net-_u2-pad1_ net-_u1-pad6_ u2 -* Schematic Name: d_inverter, NgSpice Name: d_inverter -.model u2 d_inverter(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) -* Control Statements - -.ends 5_nand \ No newline at end of file diff --git a/src/SubcircuitLibrary/4to16_demux/5_nand_Previous_Values.xml b/src/SubcircuitLibrary/4to16_demux/5_nand_Previous_Values.xml deleted file mode 100644 index c4b4cde2..00000000 --- a/src/SubcircuitLibrary/4to16_demux/5_nand_Previous_Values.xml +++ /dev/null @@ -1 +0,0 @@ -truefalsefalseHzHz0Volts or AmperesVolts or AmperesVolts or AmperesVolts or AmperesVolts or AmperesVolts or AmperesSecSecSecd_inverter/home/mallikarjuna/Downloads/eSim-1.1.2/src/SubcircuitLibrary/5_and \ No newline at end of file diff --git a/src/SubcircuitLibrary/4to16_demux/analysis b/src/SubcircuitLibrary/4to16_demux/analysis deleted file mode 100644 index ebd5c0a9..00000000 --- a/src/SubcircuitLibrary/4to16_demux/analysis +++ /dev/null @@ -1 +0,0 @@ -.tran 0e-00 0e-00 0e-00 \ No newline at end of file -- cgit