From b085a3df519debbc99acf4ded7e118a1690d6665 Mon Sep 17 00:00:00 2001 From: nilshah98 Date: Tue, 2 Jul 2019 16:42:20 +0530 Subject: Subcircuit added by ECE fellows 2019 --- .../2bit_upcounter/2bit_upcounter-cache.lib | 62 +++++++++ .../2bit_upcounter/2bit_upcounter.cir | 13 ++ .../2bit_upcounter/2bit_upcounter.cir.out | 20 +++ .../2bit_upcounter/2bit_upcounter.pro | 45 ++++++ .../2bit_upcounter/2bit_upcounter.sch | 151 +++++++++++++++++++++ .../2bit_upcounter/2bit_upcounter.sub | 14 ++ .../2bit_upcounter_Previous_Values.xml | 1 + src/SubcircuitLibrary/2bit_upcounter/analysis | 1 + 8 files changed, 307 insertions(+) create mode 100644 src/SubcircuitLibrary/2bit_upcounter/2bit_upcounter-cache.lib create mode 100644 src/SubcircuitLibrary/2bit_upcounter/2bit_upcounter.cir create mode 100644 src/SubcircuitLibrary/2bit_upcounter/2bit_upcounter.cir.out create mode 100644 src/SubcircuitLibrary/2bit_upcounter/2bit_upcounter.pro create mode 100644 src/SubcircuitLibrary/2bit_upcounter/2bit_upcounter.sch create mode 100644 src/SubcircuitLibrary/2bit_upcounter/2bit_upcounter.sub create mode 100644 src/SubcircuitLibrary/2bit_upcounter/2bit_upcounter_Previous_Values.xml create mode 100644 src/SubcircuitLibrary/2bit_upcounter/analysis (limited to 'src/SubcircuitLibrary/2bit_upcounter') diff --git a/src/SubcircuitLibrary/2bit_upcounter/2bit_upcounter-cache.lib b/src/SubcircuitLibrary/2bit_upcounter/2bit_upcounter-cache.lib new file mode 100644 index 00000000..b3857f54 --- /dev/null +++ b/src/SubcircuitLibrary/2bit_upcounter/2bit_upcounter-cache.lib @@ -0,0 +1,62 @@ +EESchema-LIBRARY Version 2.3 +#encoding utf-8 +# +# PORT +# +DEF PORT U 0 40 Y Y 26 F N +F0 "U" 50 100 30 H V C CNN +F1 "PORT" 0 0 30 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0 +A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50 +S -100 50 100 -50 0 1 0 N +X ~ 1 250 0 100 L 30 30 1 1 B +X ~ 2 250 0 100 L 30 30 2 1 B +X ~ 3 250 0 100 L 30 30 3 1 B +X ~ 4 250 0 100 L 30 30 4 1 B +X ~ 5 250 0 100 L 30 30 5 1 B +X ~ 6 250 0 100 L 30 30 6 1 B +X ~ 7 250 0 100 L 30 30 7 1 B +X ~ 8 250 0 100 L 30 30 8 1 B +X ~ 9 250 0 100 L 30 30 9 1 B +X ~ 10 250 0 100 L 30 30 10 1 B +X ~ 11 250 0 100 L 30 30 11 1 B +X ~ 12 250 0 100 L 30 30 12 1 B +X ~ 13 250 0 100 L 30 30 13 1 B +X ~ 14 250 0 100 L 30 30 14 1 B +X ~ 15 250 0 100 L 30 30 15 1 B +X ~ 16 250 0 100 L 30 30 16 1 B +X ~ 17 250 0 100 L 30 30 17 1 B +X ~ 18 250 0 100 L 30 30 18 1 B +X ~ 19 250 0 100 L 30 30 19 1 B +X ~ 20 250 0 100 L 30 30 20 1 B +X ~ 21 250 0 100 L 30 30 21 1 B +X ~ 22 250 0 100 L 30 30 22 1 B +X ~ 23 250 0 100 L 30 30 23 1 B +X ~ 24 250 0 100 L 30 30 24 1 B +X ~ 25 250 0 100 L 30 30 25 1 B +X ~ 26 250 0 100 L 30 30 26 1 B +ENDDRAW +ENDDEF +# +# d_dff +# +DEF d_dff U 0 40 Y Y 1 F N +F0 "U" 0 0 60 H V C CNN +F1 "d_dff" 0 150 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +S 350 450 -350 -400 0 1 0 N +X Din 1 -550 350 200 R 50 50 1 1 I +X Clk 2 -550 -300 200 R 50 50 1 1 I C +X Set 3 0 650 200 D 50 50 1 1 I +X Reset 4 0 -600 200 U 50 50 1 1 I +X Dout 5 550 350 200 L 50 50 1 1 O +X Ndout 6 550 -300 200 L 50 50 1 1 O I +ENDDRAW +ENDDEF +# +#End Library diff --git a/src/SubcircuitLibrary/2bit_upcounter/2bit_upcounter.cir b/src/SubcircuitLibrary/2bit_upcounter/2bit_upcounter.cir new file mode 100644 index 00000000..d5d8760a --- /dev/null +++ b/src/SubcircuitLibrary/2bit_upcounter/2bit_upcounter.cir @@ -0,0 +1,13 @@ +* /home/mallikarjuna/Downloads/eSim-1.1.2/src/SubcircuitLibrary/2bit_upcounter/2bit_upcounter.cir + +* EESchema Netlist Version 1.1 (Spice format) creation date: Sat Jun 22 11:44:38 2019 + +* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N +* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +* Sheet Name: / +U2 Net-_U2-Pad1_ Net-_U1-Pad1_ Net-_U1-Pad2_ Net-_U1-Pad2_ Net-_U1-Pad3_ Net-_U2-Pad1_ d_dff +U3 Net-_U3-Pad1_ Net-_U2-Pad1_ Net-_U1-Pad2_ Net-_U1-Pad2_ Net-_U1-Pad4_ Net-_U3-Pad1_ d_dff +U1 Net-_U1-Pad1_ Net-_U1-Pad2_ Net-_U1-Pad3_ Net-_U1-Pad4_ PORT + +.end diff --git a/src/SubcircuitLibrary/2bit_upcounter/2bit_upcounter.cir.out b/src/SubcircuitLibrary/2bit_upcounter/2bit_upcounter.cir.out new file mode 100644 index 00000000..4232f26a --- /dev/null +++ b/src/SubcircuitLibrary/2bit_upcounter/2bit_upcounter.cir.out @@ -0,0 +1,20 @@ +* /home/mallikarjuna/downloads/esim-1.1.2/src/subcircuitlibrary/2bit_upcounter/2bit_upcounter.cir + +* u2 net-_u2-pad1_ net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad2_ net-_u1-pad3_ net-_u2-pad1_ d_dff +* u3 net-_u3-pad1_ net-_u2-pad1_ net-_u1-pad2_ net-_u1-pad2_ net-_u1-pad4_ net-_u3-pad1_ d_dff +* u1 net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ port +a1 net-_u2-pad1_ net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad2_ net-_u1-pad3_ net-_u2-pad1_ u2 +a2 net-_u3-pad1_ net-_u2-pad1_ net-_u1-pad2_ net-_u1-pad2_ net-_u1-pad4_ net-_u3-pad1_ u3 +* Schematic Name: d_dff, NgSpice Name: d_dff +.model u2 d_dff(ic=0 set_delay=1.0e-9 set_load=1.0e-12 reset_load=1.0e-12 clk_delay=1.0e-9 clk_load=1.0e-12 reset_delay=1.0 data_load=1.0e-12 fall_delay=1.0e-9 rise_delay=1.0e-9 ) +* Schematic Name: d_dff, NgSpice Name: d_dff +.model u3 d_dff(ic=0 set_delay=1.0e-9 set_load=1.0e-12 reset_load=1.0e-12 clk_delay=1.0e-9 clk_load=1.0e-12 reset_delay=1.0 data_load=1.0e-12 fall_delay=1.0e-9 rise_delay=1.0e-9 ) +.tran 0e-00 0e-00 0e-00 + +* Control Statements +.control +run +print allv > plot_data_v.txt +print alli > plot_data_i.txt +.endc +.end diff --git a/src/SubcircuitLibrary/2bit_upcounter/2bit_upcounter.pro b/src/SubcircuitLibrary/2bit_upcounter/2bit_upcounter.pro new file mode 100644 index 00000000..7fc2f37d --- /dev/null +++ b/src/SubcircuitLibrary/2bit_upcounter/2bit_upcounter.pro @@ -0,0 +1,45 @@ +update=Sat Jun 22 11:40:56 2019 +version=1 +last_client=eeschema +[general] +version=1 +RootSch= +BoardNm= +[pcbnew] +version=1 +LastNetListRead= +UseCmpFile=1 +PadDrill=0.600000000000 +PadDrillOvalY=0.600000000000 +PadSizeH=1.500000000000 +PadSizeV=1.500000000000 +PcbTextSizeV=1.500000000000 +PcbTextSizeH=1.500000000000 +PcbTextThickness=0.300000000000 +ModuleTextSizeV=1.000000000000 +ModuleTextSizeH=1.000000000000 +ModuleTextSizeThickness=0.150000000000 +SolderMaskClearance=0.000000000000 +SolderMaskMinWidth=0.000000000000 +DrawSegmentWidth=0.200000000000 +BoardOutlineThickness=0.100000000000 +ModuleOutlineThickness=0.150000000000 +[cvpcb] +version=1 +NetIExt=net +[eeschema] +version=1 +LibDir=../../../kicadSchematicLibrary +[eeschema/libraries] +LibName1=power +LibName2=/home/mallikarjuna/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_Analog +LibName3=/home/mallikarjuna/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_Devices +LibName4=/home/mallikarjuna/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_Digital +LibName5=/home/mallikarjuna/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_Hybrid +LibName6=/home/mallikarjuna/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_Miscellaneous +LibName7=/home/mallikarjuna/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_Plot +LibName8=/home/mallikarjuna/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_Power +LibName9=/home/mallikarjuna/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_Sources +LibName10=/home/mallikarjuna/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_Subckt +LibName11=/home/mallikarjuna/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_User + diff --git a/src/SubcircuitLibrary/2bit_upcounter/2bit_upcounter.sch b/src/SubcircuitLibrary/2bit_upcounter/2bit_upcounter.sch new file mode 100644 index 00000000..45c6e1de --- /dev/null +++ b/src/SubcircuitLibrary/2bit_upcounter/2bit_upcounter.sch @@ -0,0 +1,151 @@ +EESchema Schematic File Version 2 +LIBS:power +LIBS:eSim_Analog +LIBS:eSim_Devices +LIBS:eSim_Digital +LIBS:eSim_Hybrid +LIBS:eSim_Miscellaneous +LIBS:eSim_Plot +LIBS:eSim_Power +LIBS:eSim_Sources +LIBS:eSim_Subckt +LIBS:eSim_User +LIBS:2bit-Up_counter-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11693 8268 +encoding utf-8 +Sheet 1 1 +Title "" +Date "" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +$Comp +L d_dff U2 +U 1 1 5D0DC6F1 +P 3900 3400 +F 0 "U2" H 3900 3400 60 0000 C CNN +F 1 "d_dff" H 3900 3550 60 0000 C CNN +F 2 "" H 3900 3400 60 0000 C CNN +F 3 "" H 3900 3400 60 0000 C CNN + 1 3900 3400 + 1 0 0 -1 +$EndComp +$Comp +L d_dff U3 +U 1 1 5D0DC6F2 +P 5750 3400 +F 0 "U3" H 5750 3400 60 0000 C CNN +F 1 "d_dff" H 5750 3550 60 0000 C CNN +F 2 "" H 5750 3400 60 0000 C CNN +F 3 "" H 5750 3400 60 0000 C CNN + 1 5750 3400 + 1 0 0 -1 +$EndComp +Wire Wire Line + 3900 2750 3900 2500 +Wire Wire Line + 3900 2500 5750 2500 +Wire Wire Line + 5750 2500 5750 2750 +Wire Wire Line + 3900 4000 3900 4300 +Wire Wire Line + 3900 4300 5750 4300 +Wire Wire Line + 5750 4300 5750 4000 +Wire Wire Line + 4850 2500 4850 4800 +Connection ~ 4850 4300 +Connection ~ 4850 2500 +Wire Wire Line + 4850 4800 5250 4800 +Wire Wire Line + 3350 3700 2600 3700 +Wire Wire Line + 3350 3050 3150 3050 +Wire Wire Line + 3150 3050 3150 2350 +Wire Wire Line + 3150 2350 4600 2350 +Wire Wire Line + 4600 2350 4600 3700 +Wire Wire Line + 4450 3700 5200 3700 +Connection ~ 4600 3700 +Wire Wire Line + 5000 3050 5200 3050 +Wire Wire Line + 5000 3050 5000 2350 +Wire Wire Line + 5000 2350 6450 2350 +Wire Wire Line + 6450 2350 6450 3700 +Wire Wire Line + 6450 3700 6300 3700 +Wire Wire Line + 4450 3050 4500 3050 +Wire Wire Line + 4500 3050 4500 2600 +Wire Wire Line + 4500 2600 6800 2600 +Wire Wire Line + 6300 3050 7050 3050 +$Comp +L PORT U1 +U 1 1 5D0DC6F3 +P 2350 3700 +F 0 "U1" H 2400 3800 30 0000 C CNN +F 1 "PORT" H 2350 3700 30 0000 C CNN +F 2 "" H 2350 3700 60 0000 C CNN +F 3 "" H 2350 3700 60 0000 C CNN + 1 2350 3700 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 2 1 5D0DC6F4 +P 5500 4800 +F 0 "U1" H 5550 4900 30 0000 C CNN +F 1 "PORT" H 5500 4800 30 0000 C CNN +F 2 "" H 5500 4800 60 0000 C CNN +F 3 "" H 5500 4800 60 0000 C CNN + 2 5500 4800 + -1 0 0 1 +$EndComp +$Comp +L PORT U1 +U 3 1 5D0DC6F5 +P 7050 2600 +F 0 "U1" H 7100 2700 30 0000 C CNN +F 1 "PORT" H 7050 2600 30 0000 C CNN +F 2 "" H 7050 2600 60 0000 C CNN +F 3 "" H 7050 2600 60 0000 C CNN + 3 7050 2600 + -1 0 0 1 +$EndComp +$Comp +L PORT U1 +U 4 1 5D0DC6F6 +P 7300 3050 +F 0 "U1" H 7350 3150 30 0000 C CNN +F 1 "PORT" H 7300 3050 30 0000 C CNN +F 2 "" H 7300 3050 60 0000 C CNN +F 3 "" H 7300 3050 60 0000 C CNN + 4 7300 3050 + -1 0 0 1 +$EndComp +Text Notes 2650 3650 0 60 ~ 0 +CLK +Text Notes 6600 2550 0 60 ~ 0 +O0 +Text Notes 6800 3000 0 60 ~ 0 +O1 +Text Notes 5050 4750 0 60 ~ 0 +EN\n +$EndSCHEMATC diff --git a/src/SubcircuitLibrary/2bit_upcounter/2bit_upcounter.sub b/src/SubcircuitLibrary/2bit_upcounter/2bit_upcounter.sub new file mode 100644 index 00000000..f888aa71 --- /dev/null +++ b/src/SubcircuitLibrary/2bit_upcounter/2bit_upcounter.sub @@ -0,0 +1,14 @@ +* Subcircuit 2bit_upcounter +.subckt 2bit_upcounter net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ +* /home/mallikarjuna/downloads/esim-1.1.2/src/subcircuitlibrary/2bit_upcounter/2bit_upcounter.cir +* u2 net-_u2-pad1_ net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad2_ net-_u1-pad3_ net-_u2-pad1_ d_dff +* u3 net-_u3-pad1_ net-_u2-pad1_ net-_u1-pad2_ net-_u1-pad2_ net-_u1-pad4_ net-_u3-pad1_ d_dff +a1 net-_u2-pad1_ net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad2_ net-_u1-pad3_ net-_u2-pad1_ u2 +a2 net-_u3-pad1_ net-_u2-pad1_ net-_u1-pad2_ net-_u1-pad2_ net-_u1-pad4_ net-_u3-pad1_ u3 +* Schematic Name: d_dff, NgSpice Name: d_dff +.model u2 d_dff(ic=0 set_delay=1.0e-9 set_load=1.0e-12 reset_load=1.0e-12 clk_delay=1.0e-9 clk_load=1.0e-12 reset_delay=1.0 data_load=1.0e-12 fall_delay=1.0e-9 rise_delay=1.0e-9 ) +* Schematic Name: d_dff, NgSpice Name: d_dff +.model u3 d_dff(ic=0 set_delay=1.0e-9 set_load=1.0e-12 reset_load=1.0e-12 clk_delay=1.0e-9 clk_load=1.0e-12 reset_delay=1.0 data_load=1.0e-12 fall_delay=1.0e-9 rise_delay=1.0e-9 ) +* Control Statements + +.ends 2bit_upcounter \ No newline at end of file diff --git a/src/SubcircuitLibrary/2bit_upcounter/2bit_upcounter_Previous_Values.xml b/src/SubcircuitLibrary/2bit_upcounter/2bit_upcounter_Previous_Values.xml new file mode 100644 index 00000000..2daa4f78 --- /dev/null +++ b/src/SubcircuitLibrary/2bit_upcounter/2bit_upcounter_Previous_Values.xml @@ -0,0 +1 @@ +d_dffd_dfftruefalsefalseHzHz0Volts or AmperesVolts or AmperesVolts or AmperesVolts or AmperesVolts or AmperesVolts or AmperesSecSecSec \ No newline at end of file diff --git a/src/SubcircuitLibrary/2bit_upcounter/analysis b/src/SubcircuitLibrary/2bit_upcounter/analysis new file mode 100644 index 00000000..ebd5c0a9 --- /dev/null +++ b/src/SubcircuitLibrary/2bit_upcounter/analysis @@ -0,0 +1 @@ +.tran 0e-00 0e-00 0e-00 \ No newline at end of file -- cgit