From e3d6e33a22a75efba2edbce316324836015190e7 Mon Sep 17 00:00:00 2001 From: AnkushECE Date: Wed, 24 Aug 2022 22:52:52 +0530 Subject: CD4070 is XNOR gate IC. --- .../SubcircuitLibrary/CD_4070/CD_4070-cache.lib | 100 ++ library/SubcircuitLibrary/CD_4070/CD_4070.cir | 67 + library/SubcircuitLibrary/CD_4070/CD_4070.cir.out | 70 + library/SubcircuitLibrary/CD_4070/CD_4070.pro | 71 + library/SubcircuitLibrary/CD_4070/CD_4070.sch | 1532 ++++++++++++++++++++ library/SubcircuitLibrary/CD_4070/CD_4070.sub | 64 + .../CD_4070/CD_4070_Previous_Values.xml | 1 + library/SubcircuitLibrary/CD_4070/NMOS-180nm.lib | 13 + library/SubcircuitLibrary/CD_4070/PMOS-180nm.lib | 11 + library/SubcircuitLibrary/CD_4070/README.md | 26 + library/SubcircuitLibrary/CD_4070/analysis | 1 + 11 files changed, 1956 insertions(+) create mode 100644 library/SubcircuitLibrary/CD_4070/CD_4070-cache.lib create mode 100644 library/SubcircuitLibrary/CD_4070/CD_4070.cir create mode 100644 library/SubcircuitLibrary/CD_4070/CD_4070.cir.out create mode 100644 library/SubcircuitLibrary/CD_4070/CD_4070.pro create mode 100644 library/SubcircuitLibrary/CD_4070/CD_4070.sch create mode 100644 library/SubcircuitLibrary/CD_4070/CD_4070.sub create mode 100644 library/SubcircuitLibrary/CD_4070/CD_4070_Previous_Values.xml create mode 100644 library/SubcircuitLibrary/CD_4070/NMOS-180nm.lib create mode 100644 library/SubcircuitLibrary/CD_4070/PMOS-180nm.lib create mode 100644 library/SubcircuitLibrary/CD_4070/README.md create mode 100644 library/SubcircuitLibrary/CD_4070/analysis (limited to 'library') diff --git a/library/SubcircuitLibrary/CD_4070/CD_4070-cache.lib b/library/SubcircuitLibrary/CD_4070/CD_4070-cache.lib new file mode 100644 index 00000000..6c512720 --- /dev/null +++ b/library/SubcircuitLibrary/CD_4070/CD_4070-cache.lib @@ -0,0 +1,100 @@ +EESchema-LIBRARY Version 2.3 +#encoding utf-8 +# +# PORT +# +DEF PORT U 0 40 Y Y 26 F N +F0 "U" 50 100 30 H V C CNN +F1 "PORT" 0 0 30 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0 +A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50 +S -100 50 100 -50 0 1 0 N +X ~ 1 250 0 100 L 30 30 1 1 B +X ~ 2 250 0 100 L 30 30 2 1 B +X ~ 3 250 0 100 L 30 30 3 1 B +X ~ 4 250 0 100 L 30 30 4 1 B +X ~ 5 250 0 100 L 30 30 5 1 B +X ~ 6 250 0 100 L 30 30 6 1 B +X ~ 7 250 0 100 L 30 30 7 1 B +X ~ 8 250 0 100 L 30 30 8 1 B +X ~ 9 250 0 100 L 30 30 9 1 B +X ~ 10 250 0 100 L 30 30 10 1 B +X ~ 11 250 0 100 L 30 30 11 1 B +X ~ 12 250 0 100 L 30 30 12 1 B +X ~ 13 250 0 100 L 30 30 13 1 B +X ~ 14 250 0 100 L 30 30 14 1 B +X ~ 15 250 0 100 L 30 30 15 1 B +X ~ 16 250 0 100 L 30 30 16 1 B +X ~ 17 250 0 100 L 30 30 17 1 B +X ~ 18 250 0 100 L 30 30 18 1 B +X ~ 19 250 0 100 L 30 30 19 1 B +X ~ 20 250 0 100 L 30 30 20 1 B +X ~ 21 250 0 100 L 30 30 21 1 B +X ~ 22 250 0 100 L 30 30 22 1 B +X ~ 23 250 0 100 L 30 30 23 1 B +X ~ 24 250 0 100 L 30 30 24 1 B +X ~ 25 250 0 100 L 30 30 25 1 B +X ~ 26 250 0 100 L 30 30 26 1 B +ENDDRAW +ENDDEF +# +# eSim_MOS_N +# +DEF eSim_MOS_N M 0 0 Y N 1 F N +F0 "M" 0 -150 50 H V R CNN +F1 "eSim_MOS_N" 100 -50 50 H V R CNN +F2 "" 300 -300 29 H V C CNN +F3 "" 100 -200 60 H V C CNN +ALIAS mosfet_n +DRAW +C 150 -200 111 0 1 10 N +P 2 0 1 10 130 -290 130 -250 N +P 2 0 1 0 130 -270 200 -270 N +P 2 0 1 10 130 -220 130 -180 N +P 2 0 1 0 130 -200 200 -200 N +P 2 0 1 10 130 -150 130 -110 N +P 2 0 1 0 130 -130 200 -130 N +P 2 0 1 0 200 -300 200 -270 N +P 2 0 1 0 200 -130 200 -100 N +P 3 0 1 10 110 -275 110 -125 110 -125 N +P 3 0 1 0 200 -200 300 -200 300 -250 N +P 4 0 1 0 140 -200 180 -215 180 -185 140 -200 F +X D 1 200 0 100 D 50 50 1 1 P +X G 2 -100 -200 210 R 50 50 1 1 P +X S 3 200 -400 100 U 50 50 1 1 P +X B 4 300 -350 98 U 47 47 1 1 P +ENDDRAW +ENDDEF +# +# eSim_MOS_P +# +DEF eSim_MOS_P M 0 0 Y N 1 F N +F0 "M" -50 50 50 H V R CNN +F1 "eSim_MOS_P" 50 150 50 H V R CNN +F2 "" 250 100 29 H V C CNN +F3 "" 50 0 60 H V C CNN +ALIAS mosfet_p +DRAW +C 100 0 111 0 1 10 N +P 2 0 1 0 80 -70 150 -70 N +P 2 0 1 10 80 -50 80 -90 N +P 2 0 1 0 80 0 150 0 N +P 2 0 1 10 80 20 80 -20 N +P 2 0 1 0 80 70 150 70 N +P 2 0 1 10 80 90 80 50 N +P 2 0 1 0 150 -70 150 -100 N +P 2 0 1 0 150 100 150 70 N +P 3 0 1 10 60 75 60 -75 60 -75 N +P 3 0 1 0 150 0 250 0 250 -50 N +P 4 0 1 0 140 0 100 -15 100 15 140 0 F +X D 1 150 200 100 D 50 50 1 1 P +X G 2 -150 0 210 R 50 50 1 1 P +X S 3 150 -200 100 U 50 50 1 1 P +X B 4 250 -150 100 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +#End Library diff --git a/library/SubcircuitLibrary/CD_4070/CD_4070.cir b/library/SubcircuitLibrary/CD_4070/CD_4070.cir new file mode 100644 index 00000000..8fa1881b --- /dev/null +++ b/library/SubcircuitLibrary/CD_4070/CD_4070.cir @@ -0,0 +1,67 @@ +* C:\FOSSEE\eSim\library\SubcircuitLibrary\CD_4070\CD_4070.cir + +* EESchema Netlist Version 1.1 (Spice format) creation date: 05/29/22 16:05:10 + +* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N +* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +* Sheet Name: / +M21 Net-_M13-Pad2_ Net-_M14-Pad2_ Net-_M11-Pad3_ Net-_M11-Pad3_ eSim_MOS_P +M25 Net-_M13-Pad2_ Net-_M14-Pad2_ Net-_M1-Pad3_ Net-_M1-Pad3_ eSim_MOS_N +M9 Net-_M10-Pad3_ Net-_M1-Pad2_ Net-_M11-Pad3_ Net-_M11-Pad3_ eSim_MOS_P +M13 Net-_M10-Pad3_ Net-_M13-Pad2_ Net-_M11-Pad3_ Net-_M11-Pad3_ eSim_MOS_P +M10 Net-_M10-Pad1_ Net-_M1-Pad1_ Net-_M10-Pad3_ Net-_M10-Pad3_ eSim_MOS_P +M14 Net-_M10-Pad1_ Net-_M14-Pad2_ Net-_M10-Pad3_ Net-_M10-Pad3_ eSim_MOS_P +M3 Net-_M1-Pad1_ Net-_M1-Pad2_ Net-_M11-Pad3_ Net-_M11-Pad3_ eSim_MOS_P +M1 Net-_M1-Pad1_ Net-_M1-Pad2_ Net-_M1-Pad3_ Net-_M1-Pad3_ eSim_MOS_N +M5 Net-_M10-Pad1_ Net-_M1-Pad2_ Net-_M5-Pad3_ Net-_M5-Pad3_ eSim_MOS_N +M6 Net-_M5-Pad3_ Net-_M13-Pad2_ Net-_M1-Pad3_ Net-_M1-Pad3_ eSim_MOS_N +M17 Net-_M10-Pad1_ Net-_M1-Pad1_ Net-_M17-Pad3_ Net-_M17-Pad3_ eSim_MOS_N +M18 Net-_M17-Pad3_ Net-_M14-Pad2_ Net-_M1-Pad3_ Net-_M1-Pad3_ eSim_MOS_N +M50 Net-_M34-Pad2_ Net-_M42-Pad2_ Net-_M11-Pad3_ Net-_M11-Pad3_ eSim_MOS_P +M54 Net-_M34-Pad2_ Net-_M42-Pad2_ Net-_M1-Pad3_ Net-_M1-Pad3_ eSim_MOS_N +M37 Net-_M37-Pad1_ Net-_M29-Pad2_ Net-_M11-Pad3_ Net-_M11-Pad3_ eSim_MOS_P +M41 Net-_M37-Pad1_ Net-_M34-Pad2_ Net-_M11-Pad3_ Net-_M11-Pad3_ eSim_MOS_P +M38 Net-_M33-Pad1_ Net-_M29-Pad1_ Net-_M37-Pad1_ Net-_M37-Pad1_ eSim_MOS_P +M42 Net-_M33-Pad1_ Net-_M42-Pad2_ Net-_M37-Pad1_ Net-_M37-Pad1_ eSim_MOS_P +M31 Net-_M29-Pad1_ Net-_M29-Pad2_ Net-_M11-Pad3_ Net-_M11-Pad3_ eSim_MOS_P +M29 Net-_M29-Pad1_ Net-_M29-Pad2_ Net-_M1-Pad3_ Net-_M1-Pad3_ eSim_MOS_N +M33 Net-_M33-Pad1_ Net-_M29-Pad2_ Net-_M33-Pad3_ Net-_M33-Pad3_ eSim_MOS_N +M34 Net-_M33-Pad3_ Net-_M34-Pad2_ Net-_M1-Pad3_ Net-_M1-Pad3_ eSim_MOS_N +M45 Net-_M33-Pad1_ Net-_M29-Pad1_ Net-_M45-Pad3_ Net-_M45-Pad3_ eSim_MOS_N +M46 Net-_M45-Pad3_ Net-_M42-Pad2_ Net-_M1-Pad3_ Net-_M1-Pad3_ eSim_MOS_N +M23 Net-_M15-Pad2_ Net-_M16-Pad2_ Net-_M11-Pad3_ Net-_M11-Pad3_ eSim_MOS_P +M27 Net-_M15-Pad2_ Net-_M16-Pad2_ Net-_M1-Pad3_ Net-_M1-Pad3_ eSim_MOS_N +M11 Net-_M11-Pad1_ Net-_M11-Pad2_ Net-_M11-Pad3_ Net-_M11-Pad3_ eSim_MOS_P +M15 Net-_M11-Pad1_ Net-_M15-Pad2_ Net-_M11-Pad3_ Net-_M11-Pad3_ eSim_MOS_P +M12 Net-_M12-Pad1_ Net-_M12-Pad2_ Net-_M11-Pad1_ Net-_M11-Pad1_ eSim_MOS_P +M16 Net-_M12-Pad1_ Net-_M16-Pad2_ Net-_M11-Pad1_ Net-_M11-Pad1_ eSim_MOS_P +M4 Net-_M12-Pad2_ Net-_M11-Pad2_ Net-_M11-Pad3_ Net-_M11-Pad3_ eSim_MOS_P +M2 Net-_M12-Pad2_ Net-_M11-Pad2_ Net-_M1-Pad3_ Net-_M1-Pad3_ eSim_MOS_N +M7 Net-_M12-Pad1_ Net-_M11-Pad2_ Net-_M7-Pad3_ Net-_M7-Pad3_ eSim_MOS_N +M8 Net-_M7-Pad3_ Net-_M15-Pad2_ Net-_M1-Pad3_ Net-_M1-Pad3_ eSim_MOS_N +M19 Net-_M12-Pad1_ Net-_M12-Pad2_ Net-_M19-Pad3_ Net-_M19-Pad3_ eSim_MOS_N +M20 Net-_M19-Pad3_ Net-_M16-Pad2_ Net-_M1-Pad3_ Net-_M1-Pad3_ eSim_MOS_N +M52 Net-_M36-Pad2_ Net-_M44-Pad2_ Net-_M11-Pad3_ Net-_M11-Pad3_ eSim_MOS_P +M56 Net-_M36-Pad2_ Net-_M44-Pad2_ Net-_M1-Pad3_ Net-_M1-Pad3_ eSim_MOS_N +M39 Net-_M39-Pad1_ Net-_M30-Pad2_ Net-_M11-Pad3_ Net-_M11-Pad3_ eSim_MOS_P +M43 Net-_M39-Pad1_ Net-_M36-Pad2_ Net-_M11-Pad3_ Net-_M11-Pad3_ eSim_MOS_P +M40 Net-_M35-Pad1_ Net-_M30-Pad1_ Net-_M39-Pad1_ Net-_M39-Pad1_ eSim_MOS_P +M44 Net-_M35-Pad1_ Net-_M44-Pad2_ Net-_M39-Pad1_ Net-_M39-Pad1_ eSim_MOS_P +M32 Net-_M30-Pad1_ Net-_M30-Pad2_ Net-_M11-Pad3_ Net-_M11-Pad3_ eSim_MOS_P +M30 Net-_M30-Pad1_ Net-_M30-Pad2_ Net-_M1-Pad3_ Net-_M1-Pad3_ eSim_MOS_N +M35 Net-_M35-Pad1_ Net-_M30-Pad2_ Net-_M35-Pad3_ Net-_M35-Pad3_ eSim_MOS_N +M36 Net-_M35-Pad3_ Net-_M36-Pad2_ Net-_M1-Pad3_ Net-_M1-Pad3_ eSim_MOS_N +M47 Net-_M35-Pad1_ Net-_M30-Pad1_ Net-_M47-Pad3_ Net-_M47-Pad3_ eSim_MOS_N +M48 Net-_M47-Pad3_ Net-_M44-Pad2_ Net-_M1-Pad3_ Net-_M1-Pad3_ eSim_MOS_N +M26 Net-_M22-Pad1_ Net-_M10-Pad1_ Net-_M11-Pad3_ Net-_M11-Pad3_ eSim_MOS_P +M22 Net-_M22-Pad1_ Net-_M10-Pad1_ Net-_M1-Pad3_ Net-_M1-Pad3_ eSim_MOS_N +M28 Net-_M24-Pad1_ Net-_M12-Pad1_ Net-_M11-Pad3_ Net-_M11-Pad3_ eSim_MOS_P +M24 Net-_M24-Pad1_ Net-_M12-Pad1_ Net-_M1-Pad3_ Net-_M1-Pad3_ eSim_MOS_N +M53 Net-_M49-Pad1_ Net-_M35-Pad1_ Net-_M11-Pad3_ Net-_M11-Pad3_ eSim_MOS_P +M49 Net-_M49-Pad1_ Net-_M35-Pad1_ Net-_M1-Pad3_ Net-_M1-Pad3_ eSim_MOS_N +M55 Net-_M51-Pad1_ Net-_M33-Pad1_ Net-_M11-Pad3_ Net-_M11-Pad3_ eSim_MOS_P +M51 Net-_M51-Pad1_ Net-_M33-Pad1_ Net-_M1-Pad3_ Net-_M1-Pad3_ eSim_MOS_N +U1 Net-_M11-Pad2_ Net-_M16-Pad2_ Net-_M24-Pad1_ Net-_M49-Pad1_ Net-_M30-Pad2_ Net-_M44-Pad2_ Net-_M1-Pad3_ Net-_M29-Pad2_ Net-_M42-Pad2_ Net-_M51-Pad1_ Net-_M22-Pad1_ Net-_M1-Pad2_ Net-_M14-Pad2_ Net-_M11-Pad3_ PORT + +.end diff --git a/library/SubcircuitLibrary/CD_4070/CD_4070.cir.out b/library/SubcircuitLibrary/CD_4070/CD_4070.cir.out new file mode 100644 index 00000000..8dd74c9b --- /dev/null +++ b/library/SubcircuitLibrary/CD_4070/CD_4070.cir.out @@ -0,0 +1,70 @@ +* c:\fossee\esim\library\subcircuitlibrary\cd_4070\cd_4070.cir + +.include NMOS-180nm.lib +.include PMOS-180nm.lib +m21 net-_m13-pad2_ net-_m14-pad2_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1 +m25 net-_m13-pad2_ net-_m14-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1 +m9 net-_m10-pad3_ net-_m1-pad2_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1 +m13 net-_m10-pad3_ net-_m13-pad2_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1 +m10 net-_m10-pad1_ net-_m1-pad1_ net-_m10-pad3_ net-_m10-pad3_ CMOSP W=100u L=100u M=1 +m14 net-_m10-pad1_ net-_m14-pad2_ net-_m10-pad3_ net-_m10-pad3_ CMOSP W=100u L=100u M=1 +m3 net-_m1-pad1_ net-_m1-pad2_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1 +m1 net-_m1-pad1_ net-_m1-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1 +m5 net-_m10-pad1_ net-_m1-pad2_ net-_m5-pad3_ net-_m5-pad3_ CMOSN W=100u L=100u M=1 +m6 net-_m5-pad3_ net-_m13-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1 +m17 net-_m10-pad1_ net-_m1-pad1_ net-_m17-pad3_ net-_m17-pad3_ CMOSN W=100u L=100u M=1 +m18 net-_m17-pad3_ net-_m14-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1 +m50 net-_m34-pad2_ net-_m42-pad2_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1 +m54 net-_m34-pad2_ net-_m42-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1 +m37 net-_m37-pad1_ net-_m29-pad2_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1 +m41 net-_m37-pad1_ net-_m34-pad2_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1 +m38 net-_m33-pad1_ net-_m29-pad1_ net-_m37-pad1_ net-_m37-pad1_ CMOSP W=100u L=100u M=1 +m42 net-_m33-pad1_ net-_m42-pad2_ net-_m37-pad1_ net-_m37-pad1_ CMOSP W=100u L=100u M=1 +m31 net-_m29-pad1_ net-_m29-pad2_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1 +m29 net-_m29-pad1_ net-_m29-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1 +m33 net-_m33-pad1_ net-_m29-pad2_ net-_m33-pad3_ net-_m33-pad3_ CMOSN W=100u L=100u M=1 +m34 net-_m33-pad3_ net-_m34-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1 +m45 net-_m33-pad1_ net-_m29-pad1_ net-_m45-pad3_ net-_m45-pad3_ CMOSN W=100u L=100u M=1 +m46 net-_m45-pad3_ net-_m42-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1 +m23 net-_m15-pad2_ net-_m16-pad2_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1 +m27 net-_m15-pad2_ net-_m16-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1 +m11 net-_m11-pad1_ net-_m11-pad2_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1 +m15 net-_m11-pad1_ net-_m15-pad2_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1 +m12 net-_m12-pad1_ net-_m12-pad2_ net-_m11-pad1_ net-_m11-pad1_ CMOSP W=100u L=100u M=1 +m16 net-_m12-pad1_ net-_m16-pad2_ net-_m11-pad1_ net-_m11-pad1_ CMOSP W=100u L=100u M=1 +m4 net-_m12-pad2_ net-_m11-pad2_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1 +m2 net-_m12-pad2_ net-_m11-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1 +m7 net-_m12-pad1_ net-_m11-pad2_ net-_m7-pad3_ net-_m7-pad3_ CMOSN W=100u L=100u M=1 +m8 net-_m7-pad3_ net-_m15-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1 +m19 net-_m12-pad1_ net-_m12-pad2_ net-_m19-pad3_ net-_m19-pad3_ CMOSN W=100u L=100u M=1 +m20 net-_m19-pad3_ net-_m16-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1 +m52 net-_m36-pad2_ net-_m44-pad2_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1 +m56 net-_m36-pad2_ net-_m44-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1 +m39 net-_m39-pad1_ net-_m30-pad2_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1 +m43 net-_m39-pad1_ net-_m36-pad2_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1 +m40 net-_m35-pad1_ net-_m30-pad1_ net-_m39-pad1_ net-_m39-pad1_ CMOSP W=100u L=100u M=1 +m44 net-_m35-pad1_ net-_m44-pad2_ net-_m39-pad1_ net-_m39-pad1_ CMOSP W=100u L=100u M=1 +m32 net-_m30-pad1_ net-_m30-pad2_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1 +m30 net-_m30-pad1_ net-_m30-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1 +m35 net-_m35-pad1_ net-_m30-pad2_ net-_m35-pad3_ net-_m35-pad3_ CMOSN W=100u L=100u M=1 +m36 net-_m35-pad3_ net-_m36-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1 +m47 net-_m35-pad1_ net-_m30-pad1_ net-_m47-pad3_ net-_m47-pad3_ CMOSN W=100u L=100u M=1 +m48 net-_m47-pad3_ net-_m44-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1 +m26 net-_m22-pad1_ net-_m10-pad1_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1 +m22 net-_m22-pad1_ net-_m10-pad1_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1 +m28 net-_m24-pad1_ net-_m12-pad1_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1 +m24 net-_m24-pad1_ net-_m12-pad1_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1 +m53 net-_m49-pad1_ net-_m35-pad1_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1 +m49 net-_m49-pad1_ net-_m35-pad1_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1 +m55 net-_m51-pad1_ net-_m33-pad1_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1 +m51 net-_m51-pad1_ net-_m33-pad1_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1 +* u1 net-_m11-pad2_ net-_m16-pad2_ net-_m24-pad1_ net-_m49-pad1_ net-_m30-pad2_ net-_m44-pad2_ net-_m1-pad3_ net-_m29-pad2_ net-_m42-pad2_ net-_m51-pad1_ net-_m22-pad1_ net-_m1-pad2_ net-_m14-pad2_ net-_m11-pad3_ port +.tran 0e-00 0e-00 0e-00 + +* Control Statements +.control +run +print allv > plot_data_v.txt +print alli > plot_data_i.txt +.endc +.end diff --git a/library/SubcircuitLibrary/CD_4070/CD_4070.pro b/library/SubcircuitLibrary/CD_4070/CD_4070.pro new file mode 100644 index 00000000..d7f78c3b --- /dev/null +++ b/library/SubcircuitLibrary/CD_4070/CD_4070.pro @@ -0,0 +1,71 @@ +update=22/05/2015 07:44:53 +version=1 +last_client=kicad +[general] +version=1 +RootSch= +BoardNm= +[pcbnew] +version=1 +LastNetListRead= +UseCmpFile=1 +PadDrill=0.600000000000 +PadDrillOvalY=0.600000000000 +PadSizeH=1.500000000000 +PadSizeV=1.500000000000 +PcbTextSizeV=1.500000000000 +PcbTextSizeH=1.500000000000 +PcbTextThickness=0.300000000000 +ModuleTextSizeV=1.000000000000 +ModuleTextSizeH=1.000000000000 +ModuleTextSizeThickness=0.150000000000 +SolderMaskClearance=0.000000000000 +SolderMaskMinWidth=0.000000000000 +DrawSegmentWidth=0.200000000000 +BoardOutlineThickness=0.100000000000 +ModuleOutlineThickness=0.150000000000 +[cvpcb] +version=1 +NetIExt=net +[eeschema] +version=1 +LibDir= +[eeschema/libraries] +LibName1=adc-dac +LibName2=memory +LibName3=xilinx +LibName4=microcontrollers +LibName5=dsp +LibName6=microchip +LibName7=analog_switches +LibName8=motorola +LibName9=texas +LibName10=intel +LibName11=audio +LibName12=interface +LibName13=digital-audio +LibName14=philips +LibName15=display +LibName16=cypress +LibName17=siliconi +LibName18=opto +LibName19=atmel +LibName20=contrib +LibName21=power +LibName22=eSim_Plot +LibName23=transistors +LibName24=conn +LibName25=eSim_User +LibName26=regul +LibName27=74xx +LibName28=cmos4000 +LibName29=eSim_Analog +LibName30=eSim_Devices +LibName31=eSim_Digital +LibName32=eSim_Hybrid +LibName33=eSim_Miscellaneous +LibName34=eSim_Power +LibName35=eSim_Sources +LibName36=eSim_Subckt +LibName37=eSim_Nghdl +LibName38=eSim_Ngveri diff --git a/library/SubcircuitLibrary/CD_4070/CD_4070.sch b/library/SubcircuitLibrary/CD_4070/CD_4070.sch new file mode 100644 index 00000000..3cb5f222 --- /dev/null +++ b/library/SubcircuitLibrary/CD_4070/CD_4070.sch @@ -0,0 +1,1532 @@ +EESchema Schematic File Version 2 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:power +LIBS:eSim_Plot +LIBS:transistors +LIBS:conn +LIBS:eSim_User +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:eSim_Analog +LIBS:eSim_Devices +LIBS:eSim_Digital +LIBS:eSim_Hybrid +LIBS:eSim_Miscellaneous +LIBS:eSim_Power +LIBS:eSim_Sources +LIBS:eSim_Subckt +LIBS:eSim_Nghdl +LIBS:eSim_Ngveri +LIBS:CD_4070-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11693 8268 +encoding utf-8 +Sheet 1 1 +Title "" +Date "" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +$Comp +L eSim_MOS_P M21 +U 1 1 629348CB +P 4750 1500 +F 0 "M21" H 4700 1550 50 0000 R CNN +F 1 "eSim_MOS_P" H 4800 1650 50 0000 R CNN +F 2 "" H 5000 1600 29 0000 C CNN +F 3 "" H 4800 1500 60 0000 C CNN + 1 4750 1500 + -1 0 0 1 +$EndComp +$Comp +L eSim_MOS_N M25 +U 1 1 629348CC +P 4800 1900 +F 0 "M25" H 4800 1750 50 0000 R CNN +F 1 "eSim_MOS_N" H 4900 1850 50 0000 R CNN +F 2 "" H 5100 1600 29 0000 C CNN +F 3 "" H 4900 1700 60 0000 C CNN + 1 4800 1900 + -1 0 0 -1 +$EndComp +$Comp +L eSim_MOS_P M9 +U 1 1 629348CD +P 2950 1500 +F 0 "M9" H 2900 1550 50 0000 R CNN +F 1 "eSim_MOS_P" H 3000 1650 50 0000 R CNN +F 2 "" H 3200 1600 29 0000 C CNN +F 3 "" H 3000 1500 60 0000 C CNN + 1 2950 1500 + 1 0 0 1 +$EndComp +$Comp +L eSim_MOS_P M13 +U 1 1 629348CE +P 3800 1500 +F 0 "M13" H 3750 1550 50 0000 R CNN +F 1 "eSim_MOS_P" H 3850 1650 50 0000 R CNN +F 2 "" H 4050 1600 29 0000 C CNN +F 3 "" H 3850 1500 60 0000 C CNN + 1 3800 1500 + -1 0 0 1 +$EndComp +$Comp +L eSim_MOS_P M10 +U 1 1 629348CF +P 2950 2050 +F 0 "M10" H 2900 2100 50 0000 R CNN +F 1 "eSim_MOS_P" H 3000 2200 50 0000 R CNN +F 2 "" H 3200 2150 29 0000 C CNN +F 3 "" H 3000 2050 60 0000 C CNN + 1 2950 2050 + 1 0 0 1 +$EndComp +$Comp +L eSim_MOS_P M14 +U 1 1 629348D0 +P 3800 2050 +F 0 "M14" H 3750 2100 50 0000 R CNN +F 1 "eSim_MOS_P" H 3850 2200 50 0000 R CNN +F 2 "" H 4050 2150 29 0000 C CNN +F 3 "" H 3850 2050 60 0000 C CNN + 1 3800 2050 + -1 0 0 1 +$EndComp +$Comp +L eSim_MOS_P M3 +U 1 1 629348D1 +P 1950 1500 +F 0 "M3" H 1900 1550 50 0000 R CNN +F 1 "eSim_MOS_P" H 2000 1650 50 0000 R CNN +F 2 "" H 2200 1600 29 0000 C CNN +F 3 "" H 2000 1500 60 0000 C CNN + 1 1950 1500 + 1 0 0 1 +$EndComp +$Comp +L eSim_MOS_N M1 +U 1 1 629348D2 +P 1900 1900 +F 0 "M1" H 1900 1750 50 0000 R CNN +F 1 "eSim_MOS_N" H 2000 1850 50 0000 R CNN +F 2 "" H 2200 1600 29 0000 C CNN +F 3 "" H 2000 1700 60 0000 C CNN + 1 1900 1900 + 1 0 0 -1 +$EndComp +$Comp +L eSim_MOS_N M5 +U 1 1 629348D3 +P 2900 2600 +F 0 "M5" H 2900 2450 50 0000 R CNN +F 1 "eSim_MOS_N" H 3000 2550 50 0000 R CNN +F 2 "" H 3200 2300 29 0000 C CNN +F 3 "" H 3000 2400 60 0000 C CNN + 1 2900 2600 + 1 0 0 -1 +$EndComp +$Comp +L eSim_MOS_N M6 +U 1 1 629348D4 +P 2900 3100 +F 0 "M6" H 2900 2950 50 0000 R CNN +F 1 "eSim_MOS_N" H 3000 3050 50 0000 R CNN +F 2 "" H 3200 2800 29 0000 C CNN +F 3 "" H 3000 2900 60 0000 C CNN + 1 2900 3100 + 1 0 0 -1 +$EndComp +$Comp +L eSim_MOS_N M17 +U 1 1 629348D5 +P 3850 2600 +F 0 "M17" H 3850 2450 50 0000 R CNN +F 1 "eSim_MOS_N" H 3950 2550 50 0000 R CNN +F 2 "" H 4150 2300 29 0000 C CNN +F 3 "" H 3950 2400 60 0000 C CNN + 1 3850 2600 + -1 0 0 -1 +$EndComp +$Comp +L eSim_MOS_N M18 +U 1 1 629348D6 +P 3850 3100 +F 0 "M18" H 3850 2950 50 0000 R CNN +F 1 "eSim_MOS_N" H 3950 3050 50 0000 R CNN +F 2 "" H 4150 2800 29 0000 C CNN +F 3 "" H 3950 2900 60 0000 C CNN + 1 3850 3100 + -1 0 0 -1 +$EndComp +$Comp +L eSim_MOS_P M50 +U 1 1 629348D7 +P 9750 1500 +F 0 "M50" H 9700 1550 50 0000 R CNN +F 1 "eSim_MOS_P" H 9800 1650 50 0000 R CNN +F 2 "" H 10000 1600 29 0000 C CNN +F 3 "" H 9800 1500 60 0000 C CNN + 1 9750 1500 + -1 0 0 1 +$EndComp +$Comp +L eSim_MOS_N M54 +U 1 1 629348D8 +P 9800 1900 +F 0 "M54" H 9800 1750 50 0000 R CNN +F 1 "eSim_MOS_N" H 9900 1850 50 0000 R CNN +F 2 "" H 10100 1600 29 0000 C CNN +F 3 "" H 9900 1700 60 0000 C CNN + 1 9800 1900 + -1 0 0 -1 +$EndComp +$Comp +L eSim_MOS_P M37 +U 1 1 629348D9 +P 7950 1500 +F 0 "M37" H 7900 1550 50 0000 R CNN +F 1 "eSim_MOS_P" H 8000 1650 50 0000 R CNN +F 2 "" H 8200 1600 29 0000 C CNN +F 3 "" H 8000 1500 60 0000 C CNN + 1 7950 1500 + 1 0 0 1 +$EndComp +$Comp +L eSim_MOS_P M41 +U 1 1 629348DA +P 8800 1500 +F 0 "M41" H 8750 1550 50 0000 R CNN +F 1 "eSim_MOS_P" H 8850 1650 50 0000 R CNN +F 2 "" H 9050 1600 29 0000 C CNN +F 3 "" H 8850 1500 60 0000 C CNN + 1 8800 1500 + -1 0 0 1 +$EndComp +$Comp +L eSim_MOS_P M38 +U 1 1 629348DB +P 7950 2050 +F 0 "M38" H 7900 2100 50 0000 R CNN +F 1 "eSim_MOS_P" H 8000 2200 50 0000 R CNN +F 2 "" H 8200 2150 29 0000 C CNN +F 3 "" H 8000 2050 60 0000 C CNN + 1 7950 2050 + 1 0 0 1 +$EndComp +$Comp +L eSim_MOS_P M42 +U 1 1 629348DC +P 8800 2050 +F 0 "M42" H 8750 2100 50 0000 R CNN +F 1 "eSim_MOS_P" H 8850 2200 50 0000 R CNN +F 2 "" H 9050 2150 29 0000 C CNN +F 3 "" H 8850 2050 60 0000 C CNN + 1 8800 2050 + -1 0 0 1 +$EndComp +$Comp +L eSim_MOS_P M31 +U 1 1 629348DD +P 6950 1500 +F 0 "M31" H 6900 1550 50 0000 R CNN +F 1 "eSim_MOS_P" H 7000 1650 50 0000 R CNN +F 2 "" H 7200 1600 29 0000 C CNN +F 3 "" H 7000 1500 60 0000 C CNN + 1 6950 1500 + 1 0 0 1 +$EndComp +$Comp +L eSim_MOS_N M29 +U 1 1 629348DE +P 6900 1900 +F 0 "M29" H 6900 1750 50 0000 R CNN +F 1 "eSim_MOS_N" H 7000 1850 50 0000 R CNN +F 2 "" H 7200 1600 29 0000 C CNN +F 3 "" H 7000 1700 60 0000 C CNN + 1 6900 1900 + 1 0 0 -1 +$EndComp +$Comp +L eSim_MOS_N M33 +U 1 1 629348DF +P 7900 2600 +F 0 "M33" H 7900 2450 50 0000 R CNN +F 1 "eSim_MOS_N" H 8000 2550 50 0000 R CNN +F 2 "" H 8200 2300 29 0000 C CNN +F 3 "" H 8000 2400 60 0000 C CNN + 1 7900 2600 + 1 0 0 -1 +$EndComp +$Comp +L eSim_MOS_N M34 +U 1 1 629348E0 +P 7900 3100 +F 0 "M34" H 7900 2950 50 0000 R CNN +F 1 "eSim_MOS_N" H 8000 3050 50 0000 R CNN +F 2 "" H 8200 2800 29 0000 C CNN +F 3 "" H 8000 2900 60 0000 C CNN + 1 7900 3100 + 1 0 0 -1 +$EndComp +$Comp +L eSim_MOS_N M45 +U 1 1 629348E1 +P 8850 2600 +F 0 "M45" H 8850 2450 50 0000 R CNN +F 1 "eSim_MOS_N" H 8950 2550 50 0000 R CNN +F 2 "" H 9150 2300 29 0000 C CNN +F 3 "" H 8950 2400 60 0000 C CNN + 1 8850 2600 + -1 0 0 -1 +$EndComp +$Comp +L eSim_MOS_N M46 +U 1 1 629348E2 +P 8850 3100 +F 0 "M46" H 8850 2950 50 0000 R CNN +F 1 "eSim_MOS_N" H 8950 3050 50 0000 R CNN +F 2 "" H 9150 2800 29 0000 C CNN +F 3 "" H 8950 2900 60 0000 C CNN + 1 8850 3100 + -1 0 0 -1 +$EndComp +$Comp +L eSim_MOS_P M23 +U 1 1 629348E3 +P 4750 4200 +F 0 "M23" H 4700 4250 50 0000 R CNN +F 1 "eSim_MOS_P" H 4800 4350 50 0000 R CNN +F 2 "" H 5000 4300 29 0000 C CNN +F 3 "" H 4800 4200 60 0000 C CNN + 1 4750 4200 + -1 0 0 1 +$EndComp +$Comp +L eSim_MOS_N M27 +U 1 1 629348E4 +P 4800 4600 +F 0 "M27" H 4800 4450 50 0000 R CNN +F 1 "eSim_MOS_N" H 4900 4550 50 0000 R CNN +F 2 "" H 5100 4300 29 0000 C CNN +F 3 "" H 4900 4400 60 0000 C CNN + 1 4800 4600 + -1 0 0 -1 +$EndComp +$Comp +L eSim_MOS_P M11 +U 1 1 629348E5 +P 2950 4200 +F 0 "M11" H 2900 4250 50 0000 R CNN +F 1 "eSim_MOS_P" H 3000 4350 50 0000 R CNN +F 2 "" H 3200 4300 29 0000 C CNN +F 3 "" H 3000 4200 60 0000 C CNN + 1 2950 4200 + 1 0 0 1 +$EndComp +$Comp +L eSim_MOS_P M15 +U 1 1 629348E6 +P 3800 4200 +F 0 "M15" H 3750 4250 50 0000 R CNN +F 1 "eSim_MOS_P" H 3850 4350 50 0000 R CNN +F 2 "" H 4050 4300 29 0000 C CNN +F 3 "" H 3850 4200 60 0000 C CNN + 1 3800 4200 + -1 0 0 1 +$EndComp +$Comp +L eSim_MOS_P M12 +U 1 1 629348E7 +P 2950 4750 +F 0 "M12" H 2900 4800 50 0000 R CNN +F 1 "eSim_MOS_P" H 3000 4900 50 0000 R CNN +F 2 "" H 3200 4850 29 0000 C CNN +F 3 "" H 3000 4750 60 0000 C CNN + 1 2950 4750 + 1 0 0 1 +$EndComp +$Comp +L eSim_MOS_P M16 +U 1 1 629348E8 +P 3800 4750 +F 0 "M16" H 3750 4800 50 0000 R CNN +F 1 "eSim_MOS_P" H 3850 4900 50 0000 R CNN +F 2 "" H 4050 4850 29 0000 C CNN +F 3 "" H 3850 4750 60 0000 C CNN + 1 3800 4750 + -1 0 0 1 +$EndComp +$Comp +L eSim_MOS_P M4 +U 1 1 629348E9 +P 1950 4200 +F 0 "M4" H 1900 4250 50 0000 R CNN +F 1 "eSim_MOS_P" H 2000 4350 50 0000 R CNN +F 2 "" H 2200 4300 29 0000 C CNN +F 3 "" H 2000 4200 60 0000 C CNN + 1 1950 4200 + 1 0 0 1 +$EndComp +$Comp +L eSim_MOS_N M2 +U 1 1 629348EA +P 1900 4600 +F 0 "M2" H 1900 4450 50 0000 R CNN +F 1 "eSim_MOS_N" H 2000 4550 50 0000 R CNN +F 2 "" H 2200 4300 29 0000 C CNN +F 3 "" H 2000 4400 60 0000 C CNN + 1 1900 4600 + 1 0 0 -1 +$EndComp +$Comp +L eSim_MOS_N M7 +U 1 1 629348EB +P 2900 5300 +F 0 "M7" H 2900 5150 50 0000 R CNN +F 1 "eSim_MOS_N" H 3000 5250 50 0000 R CNN +F 2 "" H 3200 5000 29 0000 C CNN +F 3 "" H 3000 5100 60 0000 C CNN + 1 2900 5300 + 1 0 0 -1 +$EndComp +$Comp +L eSim_MOS_N M8 +U 1 1 629348EC +P 2900 5800 +F 0 "M8" H 2900 5650 50 0000 R CNN +F 1 "eSim_MOS_N" H 3000 5750 50 0000 R CNN +F 2 "" H 3200 5500 29 0000 C CNN +F 3 "" H 3000 5600 60 0000 C CNN + 1 2900 5800 + 1 0 0 -1 +$EndComp +$Comp +L eSim_MOS_N M19 +U 1 1 629348ED +P 3850 5300 +F 0 "M19" H 3850 5150 50 0000 R CNN +F 1 "eSim_MOS_N" H 3950 5250 50 0000 R CNN +F 2 "" H 4150 5000 29 0000 C CNN +F 3 "" H 3950 5100 60 0000 C CNN + 1 3850 5300 + -1 0 0 -1 +$EndComp +$Comp +L eSim_MOS_N M20 +U 1 1 629348EE +P 3850 5800 +F 0 "M20" H 3850 5650 50 0000 R CNN +F 1 "eSim_MOS_N" H 3950 5750 50 0000 R CNN +F 2 "" H 4150 5500 29 0000 C CNN +F 3 "" H 3950 5600 60 0000 C CNN + 1 3850 5800 + -1 0 0 -1 +$EndComp +$Comp +L eSim_MOS_P M52 +U 1 1 629348EF +P 9750 4200 +F 0 "M52" H 9700 4250 50 0000 R CNN +F 1 "eSim_MOS_P" H 9800 4350 50 0000 R CNN +F 2 "" H 10000 4300 29 0000 C CNN +F 3 "" H 9800 4200 60 0000 C CNN + 1 9750 4200 + -1 0 0 1 +$EndComp +$Comp +L eSim_MOS_N M56 +U 1 1 629348F0 +P 9800 4600 +F 0 "M56" H 9800 4450 50 0000 R CNN +F 1 "eSim_MOS_N" H 9900 4550 50 0000 R CNN +F 2 "" H 10100 4300 29 0000 C CNN +F 3 "" H 9900 4400 60 0000 C CNN + 1 9800 4600 + -1 0 0 -1 +$EndComp +$Comp +L eSim_MOS_P M39 +U 1 1 629348F1 +P 7950 4200 +F 0 "M39" H 7900 4250 50 0000 R CNN +F 1 "eSim_MOS_P" H 8000 4350 50 0000 R CNN +F 2 "" H 8200 4300 29 0000 C CNN +F 3 "" H 8000 4200 60 0000 C CNN + 1 7950 4200 + 1 0 0 1 +$EndComp +$Comp +L eSim_MOS_P M43 +U 1 1 629348F2 +P 8800 4200 +F 0 "M43" H 8750 4250 50 0000 R CNN +F 1 "eSim_MOS_P" H 8850 4350 50 0000 R CNN +F 2 "" H 9050 4300 29 0000 C CNN +F 3 "" H 8850 4200 60 0000 C CNN + 1 8800 4200 + -1 0 0 1 +$EndComp +$Comp +L eSim_MOS_P M40 +U 1 1 629348F3 +P 7950 4750 +F 0 "M40" H 7900 4800 50 0000 R CNN +F 1 "eSim_MOS_P" H 8000 4900 50 0000 R CNN +F 2 "" H 8200 4850 29 0000 C CNN +F 3 "" H 8000 4750 60 0000 C CNN + 1 7950 4750 + 1 0 0 1 +$EndComp +$Comp +L eSim_MOS_P M44 +U 1 1 629348F4 +P 8800 4750 +F 0 "M44" H 8750 4800 50 0000 R CNN +F 1 "eSim_MOS_P" H 8850 4900 50 0000 R CNN +F 2 "" H 9050 4850 29 0000 C CNN +F 3 "" H 8850 4750 60 0000 C CNN + 1 8800 4750 + -1 0 0 1 +$EndComp +$Comp +L eSim_MOS_P M32 +U 1 1 629348F5 +P 6950 4200 +F 0 "M32" H 6900 4250 50 0000 R CNN +F 1 "eSim_MOS_P" H 7000 4350 50 0000 R CNN +F 2 "" H 7200 4300 29 0000 C CNN +F 3 "" H 7000 4200 60 0000 C CNN + 1 6950 4200 + 1 0 0 1 +$EndComp +$Comp +L eSim_MOS_N M30 +U 1 1 629348F6 +P 6900 4600 +F 0 "M30" H 6900 4450 50 0000 R CNN +F 1 "eSim_MOS_N" H 7000 4550 50 0000 R CNN +F 2 "" H 7200 4300 29 0000 C CNN +F 3 "" H 7000 4400 60 0000 C CNN + 1 6900 4600 + 1 0 0 -1 +$EndComp +$Comp +L eSim_MOS_N M35 +U 1 1 629348F7 +P 7900 5300 +F 0 "M35" H 7900 5150 50 0000 R CNN +F 1 "eSim_MOS_N" H 8000 5250 50 0000 R CNN +F 2 "" H 8200 5000 29 0000 C CNN +F 3 "" H 8000 5100 60 0000 C CNN + 1 7900 5300 + 1 0 0 -1 +$EndComp +$Comp +L eSim_MOS_N M36 +U 1 1 629348F8 +P 7900 5800 +F 0 "M36" H 7900 5650 50 0000 R CNN +F 1 "eSim_MOS_N" H 8000 5750 50 0000 R CNN +F 2 "" H 8200 5500 29 0000 C CNN +F 3 "" H 8000 5600 60 0000 C CNN + 1 7900 5800 + 1 0 0 -1 +$EndComp +$Comp +L eSim_MOS_N M47 +U 1 1 629348F9 +P 8850 5300 +F 0 "M47" H 8850 5150 50 0000 R CNN +F 1 "eSim_MOS_N" H 8950 5250 50 0000 R CNN +F 2 "" H 9150 5000 29 0000 C CNN +F 3 "" H 8950 5100 60 0000 C CNN + 1 8850 5300 + -1 0 0 -1 +$EndComp +$Comp +L eSim_MOS_N M48 +U 1 1 629348FA +P 8850 5800 +F 0 "M48" H 8850 5650 50 0000 R CNN +F 1 "eSim_MOS_N" H 8950 5750 50 0000 R CNN +F 2 "" H 9150 5500 29 0000 C CNN +F 3 "" H 8950 5600 60 0000 C CNN + 1 8850 5800 + -1 0 0 -1 +$EndComp +$Comp +L eSim_MOS_P M26 +U 1 1 62935D17 +P 4800 2450 +F 0 "M26" H 4750 2500 50 0000 R CNN +F 1 "eSim_MOS_P" H 4850 2600 50 0000 R CNN +F 2 "" H 5050 2550 29 0000 C CNN +F 3 "" H 4850 2450 60 0000 C CNN + 1 4800 2450 + 1 0 0 1 +$EndComp +$Comp +L eSim_MOS_N M22 +U 1 1 62935D1D +P 4750 2850 +F 0 "M22" H 4750 2700 50 0000 R CNN +F 1 "eSim_MOS_N" H 4850 2800 50 0000 R CNN +F 2 "" H 5050 2550 29 0000 C CNN +F 3 "" H 4850 2650 60 0000 C CNN + 1 4750 2850 + 1 0 0 -1 +$EndComp +Wire Wire Line + 4600 1700 4600 1900 +Wire Wire Line + 4900 1500 4900 2100 +Wire Wire Line + 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60 0000 C CNN + 1 9750 5150 + 1 0 0 1 +$EndComp +$Comp +L eSim_MOS_N M49 +U 1 1 62936A22 +P 9700 5550 +F 0 "M49" H 9700 5400 50 0000 R CNN +F 1 "eSim_MOS_N" H 9800 5500 50 0000 R CNN +F 2 "" H 10000 5250 29 0000 C CNN +F 3 "" H 9800 5350 60 0000 C CNN + 1 9700 5550 + 1 0 0 -1 +$EndComp +Wire Wire Line + 9900 5350 9900 5550 +Wire Wire Line + 9600 5150 9600 5750 +Wire Wire Line + 9900 5950 10000 5950 +Wire Wire Line + 10000 5950 10000 5900 +Wire Wire Line + 9900 4950 10000 4950 +Wire Wire Line + 10000 4950 10000 5000 +Wire Wire Line + 4400 2400 4400 2750 +Wire Wire Line + 4400 2750 4650 2750 +Connection ~ 4650 2750 +Wire Wire Line + 4950 2750 5300 2750 +Connection ~ 4950 2750 +$Comp +L eSim_MOS_P M55 +U 1 1 6293892C +P 9800 2450 +F 0 "M55" H 9750 2500 50 0000 R CNN +F 1 "eSim_MOS_P" H 9850 2600 50 0000 R CNN +F 2 "" H 10050 2550 29 0000 C CNN +F 3 "" H 9850 2450 60 0000 C CNN + 1 9800 2450 + 1 0 0 1 +$EndComp +$Comp +L eSim_MOS_N M51 +U 1 1 62938932 +P 9750 2850 +F 0 "M51" H 9750 2700 50 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0000 C CNN +F 1 "PORT" H 5200 6550 30 0000 C CNN +F 2 "" H 5200 6550 60 0000 C CNN +F 3 "" H 5200 6550 60 0000 C CNN + 7 5200 6550 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 8 1 6294598A +P 6050 1800 +F 0 "U1" H 6100 1900 30 0000 C CNN +F 1 "PORT" H 6050 1800 30 0000 C CNN +F 2 "" H 6050 1800 60 0000 C CNN +F 3 "" H 6050 1800 60 0000 C CNN + 8 6050 1800 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 9 1 62945A89 +P 10700 1750 +F 0 "U1" H 10750 1850 30 0000 C CNN +F 1 "PORT" H 10700 1750 30 0000 C CNN +F 2 "" H 10700 1750 60 0000 C CNN +F 3 "" H 10700 1750 60 0000 C CNN + 9 10700 1750 + -1 0 0 1 +$EndComp +$Comp +L PORT U1 +U 10 1 62945B96 +P 10650 2750 +F 0 "U1" H 10700 2850 30 0000 C CNN +F 1 "PORT" H 10650 2750 30 0000 C CNN +F 2 "" H 10650 2750 60 0000 C CNN +F 3 "" H 10650 2750 60 0000 C CNN + 10 10650 2750 + -1 0 0 1 +$EndComp +$Comp +L PORT U1 +U 11 1 62946EA2 +P 5550 2750 +F 0 "U1" H 5600 2850 30 0000 C CNN +F 1 "PORT" H 5550 2750 30 0000 C CNN +F 2 "" H 5550 2750 60 0000 C CNN +F 3 "" H 5550 2750 60 0000 C CNN + 11 5550 2750 + -1 0 0 1 +$EndComp +$Comp +L PORT U1 +U 12 1 62946F6D +P 1050 1800 +F 0 "U1" H 1100 1900 30 0000 C CNN +F 1 "PORT" H 1050 1800 30 0000 C CNN +F 2 "" H 1050 1800 60 0000 C CNN +F 3 "" H 1050 1800 60 0000 C CNN + 12 1050 1800 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 13 1 629481D4 +P 5700 1750 +F 0 "U1" H 5750 1850 30 0000 C CNN +F 1 "PORT" H 5700 1750 30 0000 C CNN +F 2 "" H 5700 1750 60 0000 C CNN +F 3 "" H 5700 1750 60 0000 C CNN + 13 5700 1750 + -1 0 0 1 +$EndComp +$Comp +L PORT U1 +U 14 1 6294829B +P 6300 800 +F 0 "U1" H 6350 900 30 0000 C CNN +F 1 "PORT" H 6300 800 30 0000 C CNN +F 2 "" H 6300 800 60 0000 C CNN +F 3 "" H 6300 800 60 0000 C CNN + 14 6300 800 + -1 0 0 1 +$EndComp +$EndSCHEMATC diff --git a/library/SubcircuitLibrary/CD_4070/CD_4070.sub b/library/SubcircuitLibrary/CD_4070/CD_4070.sub new file mode 100644 index 00000000..87dfeb51 --- /dev/null +++ b/library/SubcircuitLibrary/CD_4070/CD_4070.sub @@ -0,0 +1,64 @@ +* Subcircuit CD_4070 +.subckt CD_4070 net-_m11-pad2_ net-_m16-pad2_ net-_m24-pad1_ net-_m49-pad1_ net-_m30-pad2_ net-_m44-pad2_ net-_m1-pad3_ net-_m29-pad2_ net-_m42-pad2_ net-_m51-pad1_ net-_m22-pad1_ net-_m1-pad2_ net-_m14-pad2_ net-_m11-pad3_ +* c:\fossee\esim\library\subcircuitlibrary\cd_4070\cd_4070.cir +.include NMOS-180nm.lib +.include PMOS-180nm.lib +m21 net-_m13-pad2_ net-_m14-pad2_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1 +m25 net-_m13-pad2_ net-_m14-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1 +m9 net-_m10-pad3_ net-_m1-pad2_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1 +m13 net-_m10-pad3_ net-_m13-pad2_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1 +m10 net-_m10-pad1_ net-_m1-pad1_ net-_m10-pad3_ net-_m10-pad3_ CMOSP W=100u L=100u M=1 +m14 net-_m10-pad1_ net-_m14-pad2_ net-_m10-pad3_ net-_m10-pad3_ CMOSP W=100u L=100u M=1 +m3 net-_m1-pad1_ net-_m1-pad2_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1 +m1 net-_m1-pad1_ net-_m1-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1 +m5 net-_m10-pad1_ net-_m1-pad2_ net-_m5-pad3_ net-_m5-pad3_ CMOSN W=100u L=100u M=1 +m6 net-_m5-pad3_ net-_m13-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1 +m17 net-_m10-pad1_ net-_m1-pad1_ net-_m17-pad3_ net-_m17-pad3_ CMOSN W=100u L=100u M=1 +m18 net-_m17-pad3_ net-_m14-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1 +m50 net-_m34-pad2_ net-_m42-pad2_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1 +m54 net-_m34-pad2_ net-_m42-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1 +m37 net-_m37-pad1_ net-_m29-pad2_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1 +m41 net-_m37-pad1_ net-_m34-pad2_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1 +m38 net-_m33-pad1_ net-_m29-pad1_ net-_m37-pad1_ net-_m37-pad1_ CMOSP W=100u L=100u M=1 +m42 net-_m33-pad1_ net-_m42-pad2_ net-_m37-pad1_ net-_m37-pad1_ CMOSP W=100u L=100u M=1 +m31 net-_m29-pad1_ net-_m29-pad2_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1 +m29 net-_m29-pad1_ net-_m29-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1 +m33 net-_m33-pad1_ net-_m29-pad2_ net-_m33-pad3_ net-_m33-pad3_ CMOSN W=100u L=100u M=1 +m34 net-_m33-pad3_ net-_m34-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1 +m45 net-_m33-pad1_ net-_m29-pad1_ net-_m45-pad3_ net-_m45-pad3_ CMOSN W=100u L=100u M=1 +m46 net-_m45-pad3_ net-_m42-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1 +m23 net-_m15-pad2_ net-_m16-pad2_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1 +m27 net-_m15-pad2_ net-_m16-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1 +m11 net-_m11-pad1_ net-_m11-pad2_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1 +m15 net-_m11-pad1_ net-_m15-pad2_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1 +m12 net-_m12-pad1_ net-_m12-pad2_ net-_m11-pad1_ net-_m11-pad1_ CMOSP W=100u L=100u M=1 +m16 net-_m12-pad1_ net-_m16-pad2_ net-_m11-pad1_ net-_m11-pad1_ CMOSP W=100u L=100u M=1 +m4 net-_m12-pad2_ net-_m11-pad2_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1 +m2 net-_m12-pad2_ net-_m11-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1 +m7 net-_m12-pad1_ net-_m11-pad2_ net-_m7-pad3_ net-_m7-pad3_ CMOSN W=100u L=100u M=1 +m8 net-_m7-pad3_ net-_m15-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1 +m19 net-_m12-pad1_ net-_m12-pad2_ net-_m19-pad3_ net-_m19-pad3_ CMOSN W=100u L=100u M=1 +m20 net-_m19-pad3_ net-_m16-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1 +m52 net-_m36-pad2_ net-_m44-pad2_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1 +m56 net-_m36-pad2_ net-_m44-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1 +m39 net-_m39-pad1_ net-_m30-pad2_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1 +m43 net-_m39-pad1_ net-_m36-pad2_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1 +m40 net-_m35-pad1_ net-_m30-pad1_ net-_m39-pad1_ net-_m39-pad1_ CMOSP W=100u L=100u M=1 +m44 net-_m35-pad1_ net-_m44-pad2_ net-_m39-pad1_ net-_m39-pad1_ CMOSP W=100u L=100u M=1 +m32 net-_m30-pad1_ net-_m30-pad2_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1 +m30 net-_m30-pad1_ net-_m30-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1 +m35 net-_m35-pad1_ net-_m30-pad2_ net-_m35-pad3_ net-_m35-pad3_ CMOSN W=100u L=100u M=1 +m36 net-_m35-pad3_ net-_m36-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1 +m47 net-_m35-pad1_ net-_m30-pad1_ net-_m47-pad3_ net-_m47-pad3_ CMOSN W=100u L=100u M=1 +m48 net-_m47-pad3_ net-_m44-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1 +m26 net-_m22-pad1_ net-_m10-pad1_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1 +m22 net-_m22-pad1_ net-_m10-pad1_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1 +m28 net-_m24-pad1_ net-_m12-pad1_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1 +m24 net-_m24-pad1_ net-_m12-pad1_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1 +m53 net-_m49-pad1_ net-_m35-pad1_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1 +m49 net-_m49-pad1_ net-_m35-pad1_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1 +m55 net-_m51-pad1_ net-_m33-pad1_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1 +m51 net-_m51-pad1_ net-_m33-pad1_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1 +* Control Statements + +.ends CD_4070 \ No newline at end of file diff --git a/library/SubcircuitLibrary/CD_4070/CD_4070_Previous_Values.xml b/library/SubcircuitLibrary/CD_4070/CD_4070_Previous_Values.xml new file mode 100644 index 00000000..ae1f75df --- /dev/null +++ b/library/SubcircuitLibrary/CD_4070/CD_4070_Previous_Values.xml @@ -0,0 +1 @@ +truefalsefalseHzHz0Volts or AmperesVolts or AmperesVolts or AmperesVolts or AmperesVolts or AmperesVolts or AmperesSecSecSecC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib \ No newline at end of file diff --git a/library/SubcircuitLibrary/CD_4070/NMOS-180nm.lib b/library/SubcircuitLibrary/CD_4070/NMOS-180nm.lib new file mode 100644 index 00000000..51e9b119 --- /dev/null +++ b/library/SubcircuitLibrary/CD_4070/NMOS-180nm.lib @@ -0,0 +1,13 @@ +.model CMOSN NMOS (LEVEL=8 VERSION=3.2 TNOM=27 TOX=4.1E-9 XJ=1E-7 NCH=2.3549E17 VTH0=0.3823463 K1=0.5810697 ++ K2=4.774618E-3 K3=0.0431669 K3B=1.1498346 W0=1E-7 NLX=1.910552E-7 DVT0W=0 DVT1W=0 DVT2W=0 ++ DVT0=1.2894824 DVT1=0.3622063 DVT2=0.0713729 U0=280.633249 UA=-1.208537E-9 UB=2.158625E-18 ++ UC=5.342807E-11 VSAT=9.366802E4 A0=1.7593146 AGS=0.3939741 B0=-6.413949E-9 B1=-1E-7 KETA=-5.180424E-4 ++ A1=0 A2=1 RDSW=105.5517558 PRWG=0.5 PRWB=-0.1998871 WR=1 WINT=7.904732E-10 LINT=1.571424E-8 XL=0 ++ XW=-1E-8 DWG=1.297221E-9 DWB=1.479041E-9 VOFF=-0.0955434 NFACTOR=2.4358891 CIT=0 CDSC=2.4E-4 CDSCD=0 ++ CDSCB=0 ETA0=3.104851E-3 ETAB=-2.512384E-5 DSUB=0.0167075 PCLM=0.8073191 PDIBLC1=0.1666161 PDIBLC2=3.112892E-3 ++ PDIBLCB=-0.1 DROUT=0.7875618 PSCBE1=8E10 PSCBE2=9.213635E-10 PVAG=3.85243E-3 DELTA=0.01 RSH=6.7 MOBMOD=1 ++ PRT=0 UTE=-1.5 KT1=-0.11 KT1L=0 KT2=0.022 UA1=4.31E-9 UB1=-7.61E-18 UC1=-5.6E-11 AT=3.3E4 WL=0 WLN=1 ++ WW=0 WWN=1 WWL=0 LL=0 LLN=1 LW=0 LWN=1 LWL=0 CAPMOD=2 XPART=0.5 CGDO=7.08E-10 CGSO=7.08E-10 CGBO=1E-12 ++ CJ=9.68858E-4 PB=0.8 MJ=0.3864502 CJSW=2.512138E-10 PBSW=0.809286 MJSW=0.1060414 CJSWG=3.3E-10 PBSWG=0.809286 ++ MJSWG=0.1060414 CF=0 PVTH0=-1.192722E-3 PRDSW=-5 PK2=6.450505E-5 WKETA=-4.27294E-4 LKETA=-0.0104078 ++ PU0=6.3268729 PUA=2.226552E-11 PUB=0 PVSAT=969.1480157 PETA0=1E-4 PKETA=-1.049509E-3) diff --git a/library/SubcircuitLibrary/CD_4070/PMOS-180nm.lib b/library/SubcircuitLibrary/CD_4070/PMOS-180nm.lib new file mode 100644 index 00000000..032b5b95 --- /dev/null +++ b/library/SubcircuitLibrary/CD_4070/PMOS-180nm.lib @@ -0,0 +1,11 @@ +.model CMOSP PMOS (LEVEL=8 VERSION=3.2 TNOM=27 TOX=4.1E-9 XJ=1E-7 NCH=4.1589E17 VTH0=-0.3938813 K1=0.5479015 ++ K2=0.0360586 K3=0.0993095 K3B=5.7086622 W0=1E-6 NLX=1.313191E-7 DVT0W=0 DVT1W=0 DVT2W=0 DVT0=0.4911363 ++ DVT1=0.2227356 DVT2=0.1 U0=115.6852975 UA=1.505832E-9 UB=1E-21 UC=-1E-10 VSAT=1.329694E5 A0=1.7590478 ++ AGS=0.3641621 B0=3.427126E-7 B1=1.062928E-6 KETA=0.0134667 A1=0.6859506 A2=0.3506788 RDSW=168.5705677 ++ PRWG=0.5 PRWB=-0.4987371 WR=1 WINT=0 LINT=3.028832E-8 XL=0 XW=-1E-8 DWG=-2.349633E-8 DWB=-7.152486E-9 ++ VOFF=-0.0994037 NFACTOR=1.9424315 CIT=0 CDSC=2.4E-4 CDSCD=0 CDSCB=0 ETA0=0.0608072 ETAB=-0.0426148 ++ DSUB=0.7343015 PCLM=3.2579974 PDIBLC1=7.229527E-6 PDIBLC2=0.025389 PDIBLCB=-1E-3 DROUT=0 PSCBE1=1.454878E10 ++ PSCBE2=4.202027E-9 PVAG=15 DELTA=0.01 RSH=7.8 MOBMOD=1 PRT=0 UTE=-1.5 KT1=-0.11 KT1L=0 KT2=0.022 UA1=4.31E-9 ++ UB1=-7.61E-18 UC1=-5.6E-11 AT=3.3E4 WL=0 WLN=1 WW=0 WWN=1 WWL=0 LL=0 LLN=1 LW=0 LWN=1 LWL=0 CAPMOD=2 XPART=0.5 ++ CGDO=6.32E-10 CGSO=6.32E-10 CGBO=1E-12 CJ=1.172138E-3 PB=0.8421173 MJ=0.4109788 CJSW=2.242609E-10 PBSW=0.8 + MJSW=0.3752089 CJSWG=4.22E-10 PBSWG=0.8 MJSWG=0.3752089 CF=0 PVTH0=1.888482E-3 PRDSW=11.5315407 PK2=1.559399E-3 ++ WKETA=0.0319301 LKETA=2.955547E-3 PU0=-1.1105313 PUA=-4.62102E-11 PUB=1E-21 PVSAT=50 PETA0=1E-4 PKETA=-4.346368E-3) diff --git a/library/SubcircuitLibrary/CD_4070/README.md b/library/SubcircuitLibrary/CD_4070/README.md new file mode 100644 index 00000000..f27fd979 --- /dev/null +++ b/library/SubcircuitLibrary/CD_4070/README.md @@ -0,0 +1,26 @@ + +# CD4070 IC + +It is 2-input XOR Gate IC. CD4070 IC is designed with 180nm CMOS technology in eSim consisting four XOR Gates. It plays the role of odd 1’s detector. When both inputs are same, then output is LOW. It is also known as Special logic Gate. + +## Usage/Examples + +Logical Comparators + +Adders, Subtractors + +Parity Generators and Checkers +## Documentation + +To know the details of CD4070 IC please go through with the documentation : [CD4070_datasheet](https://www.ti.com/lit/gpn/cd4070b) + +## Comments/Notes + +Please note this is a complete digital IC. It works fine at the time of simulation. + +## Contributer + +Name: Ankush Mondal +Email: mondalankush369@gmail.com +Year: 2022 +Position: FOSSEE Summer Fellow 2022 \ No newline at end of file diff --git a/library/SubcircuitLibrary/CD_4070/analysis b/library/SubcircuitLibrary/CD_4070/analysis new file mode 100644 index 00000000..ebd5c0a9 --- /dev/null +++ b/library/SubcircuitLibrary/CD_4070/analysis @@ -0,0 +1 @@ +.tran 0e-00 0e-00 0e-00 \ No newline at end of file -- cgit