From 9c5e5f7676df9284cef1ec408b0b61faea7811a8 Mon Sep 17 00:00:00 2001 From: Manimaran K Date: Mon, 24 Feb 2025 15:35:07 +0000 Subject: Added SN74LS11 subcircuit --- library/SubcircuitLibrary/SN74LS11/D.lib | 2 + library/SubcircuitLibrary/SN74LS11/NPN.lib | 4 + .../SN74LS11/Subcircuit_SN74LS11-cache.lib | 164 +++ .../SN74LS11/Subcircuit_SN74LS11.cir | 77 ++ .../SN74LS11/Subcircuit_SN74LS11.cir.out | 143 +++ .../SN74LS11/Subcircuit_SN74LS11.pro | 73 ++ .../SN74LS11/Subcircuit_SN74LS11.sch | 1351 ++++++++++++++++++++ .../SN74LS11/Subcircuit_SN74LS11.sub | 137 ++ .../Subcircuit_SN74LS11_Previous_Values.xml | 1 + library/SubcircuitLibrary/SN74LS11/analysis | 1 + 10 files changed, 1953 insertions(+) create mode 100644 library/SubcircuitLibrary/SN74LS11/D.lib create mode 100644 library/SubcircuitLibrary/SN74LS11/NPN.lib create mode 100644 library/SubcircuitLibrary/SN74LS11/Subcircuit_SN74LS11-cache.lib create mode 100644 library/SubcircuitLibrary/SN74LS11/Subcircuit_SN74LS11.cir create mode 100644 library/SubcircuitLibrary/SN74LS11/Subcircuit_SN74LS11.cir.out create mode 100644 library/SubcircuitLibrary/SN74LS11/Subcircuit_SN74LS11.pro create mode 100644 library/SubcircuitLibrary/SN74LS11/Subcircuit_SN74LS11.sch create mode 100644 library/SubcircuitLibrary/SN74LS11/Subcircuit_SN74LS11.sub create mode 100644 library/SubcircuitLibrary/SN74LS11/Subcircuit_SN74LS11_Previous_Values.xml create mode 100644 library/SubcircuitLibrary/SN74LS11/analysis (limited to 'library') diff --git a/library/SubcircuitLibrary/SN74LS11/D.lib b/library/SubcircuitLibrary/SN74LS11/D.lib new file mode 100644 index 00000000..f53bf3e0 --- /dev/null +++ b/library/SubcircuitLibrary/SN74LS11/D.lib @@ -0,0 +1,2 @@ +.model 1N4148 D(is=2.495E-09 rs=4.755E-01 n=1.679E+00 tt=3.030E-09 cjo=1.700E-12 vj=1 m=1.959E-01 bv=1.000E+02 ibv=1.000E-04) + diff --git a/library/SubcircuitLibrary/SN74LS11/NPN.lib b/library/SubcircuitLibrary/SN74LS11/NPN.lib new file mode 100644 index 00000000..be5f3073 --- /dev/null +++ b/library/SubcircuitLibrary/SN74LS11/NPN.lib @@ -0,0 +1,4 @@ +.model Q2N2222 NPN( Is=14.34f Xti=3 Eg=1.11 Vaf=74.03 Bf=400 Ne=1.307 ++ Ise=14.34f Ikf=0.2847 Xtb=1.5 Br=6.092 Nc=2 Isc=0 Ikr=0 Rc=1 Cjc=7.306p ++ Mjc=0.3416 Vjc=0.75 Fc=0.5 Cje=22.01p Mje=0.377 Vje=0.75 Tr=46.91n Tf=411.1p ++ Itf=0.6 Vtf=1.7 Xtf=3 Rb=10) diff --git a/library/SubcircuitLibrary/SN74LS11/Subcircuit_SN74LS11-cache.lib b/library/SubcircuitLibrary/SN74LS11/Subcircuit_SN74LS11-cache.lib new file mode 100644 index 00000000..0d1f2ae8 --- /dev/null +++ b/library/SubcircuitLibrary/SN74LS11/Subcircuit_SN74LS11-cache.lib @@ -0,0 +1,164 @@ +EESchema-LIBRARY Version 2.3 +#encoding utf-8 +# +# GNDPWR +# +DEF GNDPWR #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 -200 50 H I C CNN +F1 "GNDPWR" 0 -130 50 H V C CNN +F2 "" 0 -50 50 H I C CNN +F3 "" 0 -50 50 H I C CNN +DRAW +P 2 0 1 0 0 -50 0 0 N +P 3 0 1 8 -40 -50 -50 -80 -50 -80 N +P 3 0 1 8 -20 -50 -30 -80 -30 -80 N +P 3 0 1 8 0 -50 -10 -80 -10 -80 N +P 3 0 1 8 20 -50 10 -80 10 -80 N +P 3 0 1 8 40 -50 -40 -50 -40 -50 N +P 4 0 1 8 40 -50 30 -80 30 -80 30 -80 N +X GNDPWR 1 0 0 0 U 50 50 1 1 W N +ENDDRAW +ENDDEF +# +# PORT +# +DEF PORT U 0 40 Y Y 26 F N +F0 "U" 50 100 30 H V C CNN +F1 "PORT" 0 0 30 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0 +A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50 +S -100 50 100 -50 0 1 0 N +X ~ 1 250 0 100 L 30 30 1 1 B +X ~ 2 250 0 100 L 30 30 2 1 B +X ~ 3 250 0 100 L 30 30 3 1 B +X ~ 4 250 0 100 L 30 30 4 1 B +X ~ 5 250 0 100 L 30 30 5 1 B +X ~ 6 250 0 100 L 30 30 6 1 B +X ~ 7 250 0 100 L 30 30 7 1 B +X ~ 8 250 0 100 L 30 30 8 1 B +X ~ 9 250 0 100 L 30 30 9 1 B +X ~ 10 250 0 100 L 30 30 10 1 B +X ~ 11 250 0 100 L 30 30 11 1 B +X ~ 12 250 0 100 L 30 30 12 1 B +X ~ 13 250 0 100 L 30 30 13 1 B +X ~ 14 250 0 100 L 30 30 14 1 B +X ~ 15 250 0 100 L 30 30 15 1 B +X ~ 16 250 0 100 L 30 30 16 1 B +X ~ 17 250 0 100 L 30 30 17 1 B +X ~ 18 250 0 100 L 30 30 18 1 B +X ~ 19 250 0 100 L 30 30 19 1 B +X ~ 20 250 0 100 L 30 30 20 1 B +X ~ 21 250 0 100 L 30 30 21 1 B +X ~ 22 250 0 100 L 30 30 22 1 B +X ~ 23 250 0 100 L 30 30 23 1 B +X ~ 24 250 0 100 L 30 30 24 1 B +X ~ 25 250 0 100 L 30 30 25 1 B +X ~ 26 250 0 100 L 30 30 26 1 B +ENDDRAW +ENDDEF +# +# eSim_CP1 +# +DEF eSim_CP1 C 0 10 N N 1 F N +F0 "C" 25 100 50 H V L CNN +F1 "eSim_CP1" 25 -100 50 H V L CNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +ALIAS capacitor_polarised +$FPLIST + CP_* +$ENDFPLIST +DRAW +A 0 -150 128 1287 513 0 1 20 N -80 -50 80 -50 +P 2 0 1 20 -80 30 80 30 N +P 2 0 1 0 -70 90 -30 90 N +P 2 0 1 0 -50 70 -50 110 N +X ~ 1 0 150 110 D 50 50 1 1 P +X ~ 2 0 -150 130 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# eSim_Diode +# +DEF eSim_Diode D 0 40 N N 1 F N +F0 "D" 0 100 50 H V C CNN +F1 "eSim_Diode" 0 -100 50 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +$FPLIST + TO-???* + *SingleDiode + *_Diode_* + *SingleDiode* + D_* +$ENDFPLIST +DRAW +T 0 -100 50 60 0 0 0 A Normal 0 C C +T 0 100 50 60 0 0 0 K Normal 0 C C +P 2 0 1 6 50 50 50 -50 N +P 3 0 1 0 -50 50 50 0 -50 -50 F +X A 1 -150 0 100 R 40 40 1 1 P +X K 2 150 0 100 L 40 40 1 1 P +ENDDRAW +ENDDEF +# +# eSim_NPN +# +DEF eSim_NPN Q 0 0 Y N 1 F N +F0 "Q" -100 50 50 H V R CNN +F1 "eSim_NPN" -50 150 50 H V R CNN +F2 "" 200 100 29 H V C CNN +F3 "" 0 0 60 H V C CNN +ALIAS BC547 Q2N2222 +DRAW +C 50 0 111 0 1 10 N +P 2 0 1 0 25 25 100 100 N +P 3 0 1 0 25 -25 100 -100 100 -100 N +P 3 0 1 20 25 75 25 -75 25 -75 N +P 5 0 1 0 50 -70 70 -50 90 -90 50 -70 50 -70 F +X C 1 100 200 100 D 50 50 1 1 P +X B 2 -200 0 225 R 50 50 1 1 P +X E 3 100 -200 100 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# eSim_R +# +DEF eSim_R R 0 0 N Y 1 F N +F0 "R" 50 130 50 H V C CNN +F1 "eSim_R" 50 -50 50 H V C CNN +F2 "" 50 -20 30 H V C CNN +F3 "" 50 50 30 V V C CNN +ALIAS resistor +$FPLIST + R_* + Resistor_* +$ENDFPLIST +DRAW +S 150 10 -50 90 0 1 10 N +X ~ 1 -100 50 50 R 60 60 1 1 P +X ~ 2 200 50 50 L 60 60 1 1 P +ENDDRAW +ENDDEF +# +# zener +# +DEF zener U 0 40 Y Y 1 F N +F0 "U" -50 -100 60 H V C CNN +F1 "zener" 0 100 60 H V C CNN +F2 "" 50 0 60 H V C CNN +F3 "" 50 0 60 H V C CNN +DRAW +P 2 0 1 0 100 -50 50 -100 N +P 2 0 1 0 100 50 100 -50 N +P 2 0 1 0 100 50 150 100 N +P 4 0 1 0 0 50 0 -50 100 0 0 50 N +X ~ IN -200 0 200 R 50 43 1 1 I +X ~ OUT 300 0 200 L 50 43 1 1 O +ENDDRAW +ENDDEF +# +#End Library diff --git a/library/SubcircuitLibrary/SN74LS11/Subcircuit_SN74LS11.cir b/library/SubcircuitLibrary/SN74LS11/Subcircuit_SN74LS11.cir new file mode 100644 index 00000000..e049f6b4 --- /dev/null +++ b/library/SubcircuitLibrary/SN74LS11/Subcircuit_SN74LS11.cir @@ -0,0 +1,77 @@ +* C:\FOSSEE\eSim\library\SubcircuitLibrary\Subcircuit_SN74LS11\Subcircuit_SN74LS11.cir + +* EESchema Netlist Version 1.1 (Spice format) creation date: 02/10/25 19:11:48 + +* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N +* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +* Sheet Name: / +R1 Net-_R1-Pad1_ Net-_Q1-Pad2_ 20k +R2 Net-_R1-Pad1_ Net-_Q1-Pad1_ 10k +Q1 Net-_Q1-Pad1_ Net-_Q1-Pad2_ Net-_D1-Pad1_ eSim_NPN +Q2 Net-_Q2-Pad1_ Net-_Q1-Pad1_ Net-_C1-Pad1_ eSim_NPN +Q4 Net-_Q4-Pad1_ Net-_Q2-Pad1_ Net-_Q4-Pad3_ eSim_NPN +R4 Net-_R1-Pad1_ Net-_Q2-Pad1_ 8k +R7 Net-_R1-Pad1_ Net-_Q4-Pad1_ 120 +U2 GNDPWR Net-_U1-Pad1_ zener +U3 GNDPWR Net-_U1-Pad2_ zener +U4 GNDPWR Net-_U1-Pad3_ zener +U7 Net-_Q1-Pad2_ Net-_U1-Pad3_ zener +U6 Net-_Q1-Pad2_ Net-_U1-Pad2_ zener +D1 Net-_D1-Pad1_ GNDPWR eSim_Diode +C1 Net-_C1-Pad1_ Net-_C1-Pad2_ 10pF +R3 Net-_C1-Pad1_ Net-_Q3-Pad2_ 1.5k +R5 Net-_C1-Pad1_ Net-_Q3-Pad1_ 3k +Q3 Net-_Q3-Pad1_ Net-_Q3-Pad2_ GNDPWR eSim_NPN +Q6 Net-_C1-Pad2_ Net-_C1-Pad1_ GNDPWR eSim_NPN +U9 Net-_R6-Pad2_ Net-_Q2-Pad1_ zener +R6 Net-_C1-Pad2_ Net-_R6-Pad2_ 5k +Q5 Net-_Q4-Pad1_ Net-_Q4-Pad3_ Net-_C1-Pad2_ eSim_NPN +U1 Net-_U1-Pad1_ Net-_U1-Pad2_ Net-_U1-Pad3_ Net-_U1-Pad4_ Net-_U1-Pad5_ Net-_U1-Pad6_ Net-_C1-Pad2_ Net-_R1-Pad1_ GNDPWR Net-_U1-Pad10_ Net-_U1-Pad11_ Net-_U1-Pad12_ Net-_C2-Pad2_ Net-_C3-Pad2_ PORT +U5 Net-_Q1-Pad2_ Net-_U1-Pad1_ zener +R15 Net-_R1-Pad1_ Net-_Q13-Pad2_ 20k +R16 Net-_R1-Pad1_ Net-_Q13-Pad1_ 10k +Q13 Net-_Q13-Pad1_ Net-_Q13-Pad2_ Net-_D3-Pad1_ eSim_NPN +Q14 Net-_Q14-Pad1_ Net-_Q13-Pad1_ Net-_C3-Pad1_ eSim_NPN +Q16 Net-_Q16-Pad1_ Net-_Q14-Pad1_ Net-_Q16-Pad3_ eSim_NPN +R18 Net-_R1-Pad1_ Net-_Q14-Pad1_ 8k +R21 Net-_R1-Pad1_ Net-_Q16-Pad1_ 120 +U16 GNDPWR Net-_U1-Pad10_ zener +U17 GNDPWR Net-_U1-Pad11_ zener +U18 GNDPWR Net-_U1-Pad12_ zener +U21 Net-_Q13-Pad2_ Net-_U1-Pad12_ zener +U20 Net-_Q13-Pad2_ Net-_U1-Pad11_ zener +D3 Net-_D3-Pad1_ GNDPWR eSim_Diode +C3 Net-_C3-Pad1_ Net-_C3-Pad2_ 10pF +R17 Net-_C3-Pad1_ Net-_Q15-Pad2_ 1.5k +R19 Net-_C3-Pad1_ Net-_Q15-Pad1_ 3k +Q15 Net-_Q15-Pad1_ Net-_Q15-Pad2_ GNDPWR eSim_NPN +Q18 Net-_C3-Pad2_ Net-_C3-Pad1_ GNDPWR eSim_NPN +U22 Net-_R20-Pad2_ Net-_Q14-Pad1_ zener +R20 Net-_C3-Pad2_ Net-_R20-Pad2_ 5k +Q17 Net-_Q16-Pad1_ Net-_Q16-Pad3_ Net-_C3-Pad2_ eSim_NPN +U19 Net-_Q13-Pad2_ Net-_U1-Pad10_ zener +R8 Net-_R1-Pad1_ Net-_Q7-Pad2_ 20k +R9 Net-_R1-Pad1_ Net-_Q7-Pad1_ 10k +Q7 Net-_Q7-Pad1_ Net-_Q7-Pad2_ Net-_D2-Pad1_ eSim_NPN +Q8 Net-_Q10-Pad2_ Net-_Q7-Pad1_ Net-_C2-Pad1_ eSim_NPN +Q10 Net-_Q10-Pad1_ Net-_Q10-Pad2_ Net-_Q10-Pad3_ eSim_NPN +R11 Net-_R1-Pad1_ Net-_Q10-Pad2_ 8k +R14 Net-_R1-Pad1_ Net-_Q10-Pad1_ 120 +U8 GNDPWR Net-_U1-Pad4_ zener +U10 GNDPWR Net-_U1-Pad5_ zener +U11 GNDPWR Net-_U1-Pad6_ zener +U14 Net-_Q7-Pad2_ Net-_U1-Pad6_ zener +U13 Net-_Q7-Pad2_ Net-_U1-Pad5_ zener +D2 Net-_D2-Pad1_ GNDPWR eSim_Diode +C2 Net-_C2-Pad1_ Net-_C2-Pad2_ 10pF +R10 Net-_C2-Pad1_ Net-_Q9-Pad2_ 1.5k +R12 Net-_C2-Pad1_ Net-_Q9-Pad1_ 3k +Q9 Net-_Q9-Pad1_ Net-_Q9-Pad2_ GNDPWR eSim_NPN +Q12 Net-_C2-Pad2_ Net-_C2-Pad1_ GNDPWR eSim_NPN +U15 Net-_R13-Pad2_ Net-_Q10-Pad2_ zener +R13 Net-_C2-Pad2_ Net-_R13-Pad2_ 5k +Q11 Net-_Q10-Pad1_ Net-_Q10-Pad3_ Net-_C2-Pad2_ eSim_NPN +U12 Net-_Q7-Pad2_ Net-_U1-Pad4_ zener + +.end diff --git a/library/SubcircuitLibrary/SN74LS11/Subcircuit_SN74LS11.cir.out b/library/SubcircuitLibrary/SN74LS11/Subcircuit_SN74LS11.cir.out new file mode 100644 index 00000000..a8250b0d --- /dev/null +++ b/library/SubcircuitLibrary/SN74LS11/Subcircuit_SN74LS11.cir.out @@ -0,0 +1,143 @@ +* c:\fossee\esim\library\subcircuitlibrary\subcircuit_sn74ls11\subcircuit_sn74ls11.cir + +.include D.lib +.include NPN.lib +r1 net-_r1-pad1_ net-_q1-pad2_ 20k +r2 net-_r1-pad1_ net-_q1-pad1_ 10k +q1 net-_q1-pad1_ net-_q1-pad2_ net-_d1-pad1_ Q2N2222 +q2 net-_q2-pad1_ net-_q1-pad1_ net-_c1-pad1_ Q2N2222 +q4 net-_q4-pad1_ net-_q2-pad1_ net-_q4-pad3_ Q2N2222 +r4 net-_r1-pad1_ net-_q2-pad1_ 8k +r7 net-_r1-pad1_ net-_q4-pad1_ 120 +* u2 gndpwr net-_u1-pad1_ zener +* u3 gndpwr net-_u1-pad2_ zener +* u4 gndpwr net-_u1-pad3_ zener +* u7 net-_q1-pad2_ net-_u1-pad3_ zener +* u6 net-_q1-pad2_ net-_u1-pad2_ zener +d1 net-_d1-pad1_ gndpwr 1N4148 +c1 net-_c1-pad1_ net-_c1-pad2_ 10pf +r3 net-_c1-pad1_ net-_q3-pad2_ 1.5k +r5 net-_c1-pad1_ net-_q3-pad1_ 3k +q3 net-_q3-pad1_ net-_q3-pad2_ gndpwr Q2N2222 +q6 net-_c1-pad2_ net-_c1-pad1_ gndpwr Q2N2222 +* u9 net-_r6-pad2_ net-_q2-pad1_ zener +r6 net-_c1-pad2_ net-_r6-pad2_ 5k +q5 net-_q4-pad1_ net-_q4-pad3_ net-_c1-pad2_ Q2N2222 +* u1 net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ net-_u1-pad5_ net-_u1-pad6_ net-_c1-pad2_ net-_r1-pad1_ gndpwr net-_u1-pad10_ net-_u1-pad11_ net-_u1-pad12_ net-_c2-pad2_ net-_c3-pad2_ port +* u5 net-_q1-pad2_ net-_u1-pad1_ zener +r15 net-_r1-pad1_ net-_q13-pad2_ 20k +r16 net-_r1-pad1_ net-_q13-pad1_ 10k +q13 net-_q13-pad1_ net-_q13-pad2_ net-_d3-pad1_ Q2N2222 +q14 net-_q14-pad1_ net-_q13-pad1_ net-_c3-pad1_ Q2N2222 +q16 net-_q16-pad1_ net-_q14-pad1_ net-_q16-pad3_ Q2N2222 +r18 net-_r1-pad1_ net-_q14-pad1_ 8k +r21 net-_r1-pad1_ net-_q16-pad1_ 120 +* u16 gndpwr net-_u1-pad10_ zener +* u17 gndpwr net-_u1-pad11_ zener +* u18 gndpwr net-_u1-pad12_ zener +* u21 net-_q13-pad2_ net-_u1-pad12_ zener +* u20 net-_q13-pad2_ net-_u1-pad11_ zener +d3 net-_d3-pad1_ gndpwr 1N4148 +c3 net-_c3-pad1_ net-_c3-pad2_ 10pf +r17 net-_c3-pad1_ net-_q15-pad2_ 1.5k +r19 net-_c3-pad1_ net-_q15-pad1_ 3k +q15 net-_q15-pad1_ net-_q15-pad2_ gndpwr Q2N2222 +q18 net-_c3-pad2_ net-_c3-pad1_ gndpwr Q2N2222 +* u22 net-_r20-pad2_ net-_q14-pad1_ zener +r20 net-_c3-pad2_ net-_r20-pad2_ 5k +q17 net-_q16-pad1_ net-_q16-pad3_ net-_c3-pad2_ Q2N2222 +* u19 net-_q13-pad2_ net-_u1-pad10_ zener +r8 net-_r1-pad1_ net-_q7-pad2_ 20k +r9 net-_r1-pad1_ net-_q7-pad1_ 10k +q7 net-_q7-pad1_ net-_q7-pad2_ net-_d2-pad1_ Q2N2222 +q8 net-_q10-pad2_ net-_q7-pad1_ net-_c2-pad1_ Q2N2222 +q10 net-_q10-pad1_ net-_q10-pad2_ net-_q10-pad3_ Q2N2222 +r11 net-_r1-pad1_ net-_q10-pad2_ 8k +r14 net-_r1-pad1_ net-_q10-pad1_ 120 +* u8 gndpwr net-_u1-pad4_ zener +* u10 gndpwr net-_u1-pad5_ zener +* u11 gndpwr net-_u1-pad6_ zener +* u14 net-_q7-pad2_ net-_u1-pad6_ zener +* u13 net-_q7-pad2_ net-_u1-pad5_ zener +d2 net-_d2-pad1_ gndpwr 1N4148 +c2 net-_c2-pad1_ net-_c2-pad2_ 10pf +r10 net-_c2-pad1_ net-_q9-pad2_ 1.5k +r12 net-_c2-pad1_ net-_q9-pad1_ 3k +q9 net-_q9-pad1_ net-_q9-pad2_ gndpwr Q2N2222 +q12 net-_c2-pad2_ net-_c2-pad1_ gndpwr Q2N2222 +* u15 net-_r13-pad2_ net-_q10-pad2_ zener +r13 net-_c2-pad2_ net-_r13-pad2_ 5k +q11 net-_q10-pad1_ net-_q10-pad3_ net-_c2-pad2_ Q2N2222 +* u12 net-_q7-pad2_ net-_u1-pad4_ zener +a1 gndpwr net-_u1-pad1_ u2 +a2 gndpwr net-_u1-pad2_ u3 +a3 gndpwr net-_u1-pad3_ u4 +a4 net-_q1-pad2_ net-_u1-pad3_ u7 +a5 net-_q1-pad2_ net-_u1-pad2_ u6 +a6 net-_r6-pad2_ net-_q2-pad1_ u9 +a7 net-_q1-pad2_ net-_u1-pad1_ u5 +a8 gndpwr net-_u1-pad10_ u16 +a9 gndpwr net-_u1-pad11_ u17 +a10 gndpwr net-_u1-pad12_ u18 +a11 net-_q13-pad2_ net-_u1-pad12_ u21 +a12 net-_q13-pad2_ net-_u1-pad11_ u20 +a13 net-_r20-pad2_ net-_q14-pad1_ u22 +a14 net-_q13-pad2_ net-_u1-pad10_ u19 +a15 gndpwr net-_u1-pad4_ u8 +a16 gndpwr net-_u1-pad5_ u10 +a17 gndpwr net-_u1-pad6_ u11 +a18 net-_q7-pad2_ net-_u1-pad6_ u14 +a19 net-_q7-pad2_ net-_u1-pad5_ u13 +a20 net-_r13-pad2_ net-_q10-pad2_ u15 +a21 net-_q7-pad2_ net-_u1-pad4_ u12 +* Schematic Name: zener, NgSpice Name: zener +.model u2 zener(v_breakdown=5.6 i_breakdown=2.0e-2 i_sat=1.0e-12 n_forward=1.0 limit_switch=FALSE ) +* Schematic Name: zener, NgSpice Name: zener +.model u3 zener(v_breakdown=5.6 i_breakdown=2.0e-2 i_sat=1.0e-12 n_forward=1.0 limit_switch=FALSE ) +* Schematic Name: zener, NgSpice Name: zener +.model u4 zener(v_breakdown=5.6 i_breakdown=2.0e-2 i_sat=1.0e-12 n_forward=1.0 limit_switch=FALSE ) +* Schematic Name: zener, NgSpice Name: zener +.model u7 zener(v_breakdown=5.6 i_breakdown=2.0e-2 i_sat=1.0e-12 n_forward=1.0 limit_switch=FALSE ) +* Schematic Name: zener, NgSpice Name: zener +.model u6 zener(v_breakdown=5.6 i_breakdown=2.0e-2 i_sat=1.0e-12 n_forward=1.0 limit_switch=FALSE ) +* Schematic Name: zener, NgSpice Name: zener +.model u9 zener(v_breakdown=5.6 i_breakdown=2.0e-2 i_sat=1.0e-12 n_forward=1.0 limit_switch=FALSE ) +* Schematic Name: zener, NgSpice Name: zener +.model u5 zener(v_breakdown=5.6 i_breakdown=2.0e-2 i_sat=1.0e-12 n_forward=1.0 limit_switch=FALSE ) +* Schematic Name: zener, NgSpice Name: zener +.model u16 zener(v_breakdown=5.6 i_breakdown=2.0e-2 i_sat=1.0e-12 n_forward=1.0 limit_switch=FALSE ) +* Schematic Name: zener, NgSpice Name: zener +.model u17 zener(v_breakdown=5.6 i_breakdown=2.0e-2 i_sat=1.0e-12 n_forward=1.0 limit_switch=FALSE ) +* Schematic Name: zener, NgSpice Name: zener +.model u18 zener(v_breakdown=5.6 i_breakdown=2.0e-2 i_sat=1.0e-12 n_forward=1.0 limit_switch=FALSE ) +* Schematic Name: zener, NgSpice Name: zener +.model u21 zener(v_breakdown=5.6 i_breakdown=2.0e-2 i_sat=1.0e-12 n_forward=1.0 limit_switch=FALSE ) +* Schematic Name: zener, NgSpice Name: zener +.model u20 zener(v_breakdown=5.6 i_breakdown=2.0e-2 i_sat=1.0e-12 n_forward=1.0 limit_switch=FALSE ) +* Schematic Name: zener, NgSpice Name: zener +.model u22 zener(v_breakdown=5.6 i_breakdown=2.0e-2 i_sat=1.0e-12 n_forward=1.0 limit_switch=FALSE ) +* Schematic Name: zener, NgSpice Name: zener +.model u19 zener(v_breakdown=5.6 i_breakdown=2.0e-2 i_sat=1.0e-12 n_forward=1.0 limit_switch=FALSE ) +* Schematic Name: zener, NgSpice Name: zener +.model u8 zener(v_breakdown=5.6 i_breakdown=2.0e-2 i_sat=1.0e-12 n_forward=1.0 limit_switch=FALSE ) +* Schematic Name: zener, NgSpice Name: zener +.model u10 zener(v_breakdown=5.6 i_breakdown=2.0e-2 i_sat=1.0e-12 n_forward=1.0 limit_switch=FALSE ) +* Schematic Name: zener, NgSpice Name: zener +.model u11 zener(v_breakdown=5.6 i_breakdown=2.0e-2 i_sat=1.0e-12 n_forward=1.0 limit_switch=FALSE ) +* Schematic Name: zener, NgSpice Name: zener +.model u14 zener(v_breakdown=5.6 i_breakdown=2.0e-2 i_sat=1.0e-12 n_forward=1.0 limit_switch=FALSE ) +* Schematic Name: zener, NgSpice Name: zener +.model u13 zener(v_breakdown=5.6 i_breakdown=2.0e-2 i_sat=1.0e-12 n_forward=1.0 limit_switch=FALSE ) +* Schematic Name: zener, NgSpice Name: zener +.model u15 zener(v_breakdown=5.6 i_breakdown=2.0e-2 i_sat=1.0e-12 n_forward=1.0 limit_switch=FALSE ) +* Schematic Name: zener, NgSpice Name: zener +.model u12 zener(v_breakdown=5.6 i_breakdown=2.0e-2 i_sat=1.0e-12 n_forward=1.0 limit_switch=FALSE ) +.tran 0e-00 0e-00 0e-00 + +* Control Statements +.control +run +print allv > plot_data_v.txt +print alli > plot_data_i.txt +.endc +.end diff --git a/library/SubcircuitLibrary/SN74LS11/Subcircuit_SN74LS11.pro b/library/SubcircuitLibrary/SN74LS11/Subcircuit_SN74LS11.pro new file mode 100644 index 00000000..e27a398b --- /dev/null +++ b/library/SubcircuitLibrary/SN74LS11/Subcircuit_SN74LS11.pro @@ -0,0 +1,73 @@ +update=22/05/2015 07:44:53 +version=1 +last_client=kicad +[general] +version=1 +RootSch= +BoardNm= +[pcbnew] +version=1 +LastNetListRead= +UseCmpFile=1 +PadDrill=0.600000000000 +PadDrillOvalY=0.600000000000 +PadSizeH=1.500000000000 +PadSizeV=1.500000000000 +PcbTextSizeV=1.500000000000 +PcbTextSizeH=1.500000000000 +PcbTextThickness=0.300000000000 +ModuleTextSizeV=1.000000000000 +ModuleTextSizeH=1.000000000000 +ModuleTextSizeThickness=0.150000000000 +SolderMaskClearance=0.000000000000 +SolderMaskMinWidth=0.000000000000 +DrawSegmentWidth=0.200000000000 +BoardOutlineThickness=0.100000000000 +ModuleOutlineThickness=0.150000000000 +[cvpcb] +version=1 +NetIExt=net +[eeschema] +version=1 +LibDir= +[eeschema/libraries] +LibName1=adc-dac +LibName2=memory +LibName3=xilinx +LibName4=microcontrollers +LibName5=dsp +LibName6=microchip +LibName7=analog_switches +LibName8=motorola +LibName9=texas +LibName10=intel +LibName11=audio +LibName12=interface +LibName13=digital-audio +LibName14=philips +LibName15=display +LibName16=cypress +LibName17=siliconi +LibName18=opto +LibName19=atmel +LibName20=contrib +LibName21=power +LibName22=eSim_Plot +LibName23=transistors +LibName24=conn +LibName25=eSim_User +LibName26=regul +LibName27=74xx +LibName28=cmos4000 +LibName29=eSim_Analog +LibName30=eSim_Devices +LibName31=eSim_Digital +LibName32=eSim_Hybrid +LibName33=eSim_Miscellaneous +LibName34=eSim_Power +LibName35=eSim_Sources +LibName36=eSim_Subckt +LibName37=eSim_Nghdl +LibName38=eSim_Ngveri +LibName39=eSim_SKY130 +LibName40=eSim_SKY130_Subckts diff --git a/library/SubcircuitLibrary/SN74LS11/Subcircuit_SN74LS11.sch b/library/SubcircuitLibrary/SN74LS11/Subcircuit_SN74LS11.sch new file mode 100644 index 00000000..0247342b --- /dev/null +++ b/library/SubcircuitLibrary/SN74LS11/Subcircuit_SN74LS11.sch @@ -0,0 +1,1351 @@ +EESchema Schematic File Version 2 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:power +LIBS:eSim_Plot +LIBS:transistors +LIBS:conn +LIBS:eSim_User +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:eSim_Analog +LIBS:eSim_Devices +LIBS:eSim_Digital +LIBS:eSim_Hybrid +LIBS:eSim_Miscellaneous +LIBS:eSim_Power +LIBS:eSim_Sources +LIBS:eSim_Subckt +LIBS:eSim_Nghdl +LIBS:eSim_Ngveri +LIBS:eSim_SKY130 +LIBS:eSim_SKY130_Subckts +EELAYER 25 0 +EELAYER END +$Descr A4 11693 8268 +encoding utf-8 +Sheet 1 1 +Title "" +Date "" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +$Comp +L resistor R1 +U 1 1 67A9FAFF +P 1980 1120 +F 0 "R1" H 2030 1250 50 0000 C CNN +F 1 "20k" H 2030 1070 50 0000 C CNN +F 2 "" H 2030 1100 30 0000 C CNN +F 3 "" V 2030 1170 30 0000 C CNN + 1 1980 1120 + 0 1 1 0 +$EndComp +$Comp +L resistor R2 +U 1 1 67A9FB42 +P 2500 1120 +F 0 "R2" H 2550 1250 50 0000 C CNN +F 1 "10k" H 2550 1070 50 0000 C CNN +F 2 "" H 2550 1100 30 0000 C CNN +F 3 "" V 2550 1170 30 0000 C CNN + 1 2500 1120 + 0 1 1 0 +$EndComp +$Comp +L eSim_NPN Q1 +U 1 1 67A9FB67 +P 2450 2560 +F 0 "Q1" H 2350 2610 50 0000 R CNN +F 1 "eSim_NPN" H 2400 2710 50 0000 R CNN +F 2 "" H 2650 2660 29 0000 C CNN +F 3 "" H 2450 2560 60 0000 C CNN + 1 2450 2560 + 1 0 0 -1 +$EndComp +$Comp +L eSim_NPN Q2 +U 1 1 67A9FBA3 +P 2830 2140 +F 0 "Q2" H 2730 2190 50 0000 R CNN +F 1 "eSim_NPN" H 2780 2290 50 0000 R CNN +F 2 "" H 3030 2240 29 0000 C CNN +F 3 "" H 2830 2140 60 0000 C CNN + 1 2830 2140 + 1 0 0 -1 +$EndComp +$Comp +L eSim_NPN Q4 +U 1 1 67A9FBD9 +P 3500 1690 +F 0 "Q4" H 3400 1740 50 0000 R CNN +F 1 "eSim_NPN" H 3450 1840 50 0000 R CNN +F 2 "" H 3700 1790 29 0000 C CNN +F 3 "" H 3500 1690 60 0000 C CNN + 1 3500 1690 + 1 0 0 -1 +$EndComp +$Comp +L resistor R4 +U 1 1 67A9FC1E +P 3140 1130 +F 0 "R4" H 3190 1260 50 0000 C CNN +F 1 "8k" H 3190 1080 50 0000 C CNN +F 2 "" H 3190 1110 30 0000 C CNN +F 3 "" V 3190 1180 30 0000 C CNN + 1 3140 1130 + 0 1 1 0 +$EndComp +$Comp +L resistor R7 +U 1 1 67A9FC6A +P 4310 1130 +F 0 "R7" H 4360 1260 50 0000 C CNN +F 1 "120" H 4360 1080 50 0000 C CNN +F 2 "" H 4360 1110 30 0000 C CNN +F 3 "" V 4360 1180 30 0000 C CNN + 1 4310 1130 + 0 1 1 0 +$EndComp +$Comp +L zener U2 +U 1 1 67A9FCCE +P 1020 3170 +F 0 "U2" H 970 3070 60 0000 C CNN +F 1 "zener" H 1020 3270 60 0000 C CNN +F 2 "" H 1070 3170 60 0000 C CNN +F 3 "" H 1070 3170 60 0000 C CNN + 1 1020 3170 + 0 1 -1 0 +$EndComp +$Comp +L zener U3 +U 1 1 67A9FD63 +P 1290 3170 +F 0 "U3" H 1240 3070 60 0000 C CNN +F 1 "zener" H 1290 3270 60 0000 C CNN +F 2 "" H 1340 3170 60 0000 C CNN +F 3 "" H 1340 3170 60 0000 C CNN + 1 1290 3170 + 0 1 -1 0 +$EndComp +$Comp +L zener U4 +U 1 1 67A9FDB0 +P 1500 3170 +F 0 "U4" H 1450 3070 60 0000 C CNN +F 1 "zener" H 1500 3270 60 0000 C CNN +F 2 "" H 1550 3170 60 0000 C CNN +F 3 "" H 1550 3170 60 0000 C CNN + 1 1500 3170 + 0 1 -1 0 +$EndComp +$Comp +L zener U7 +U 1 1 67A9FDFC +P 1830 2390 +F 0 "U7" H 1780 2290 60 0000 C CNN +F 1 "zener" H 1830 2490 60 0000 C CNN +F 2 "" H 1880 2390 60 0000 C CNN +F 3 "" H 1880 2390 60 0000 C CNN + 1 1830 2390 + -1 0 0 1 +$EndComp +$Comp +L zener U6 +U 1 1 67A9FE59 +P 1830 2140 +F 0 "U6" H 1780 2040 60 0000 C CNN +F 1 "zener" H 1830 2240 60 0000 C CNN +F 2 "" H 1880 2140 60 0000 C CNN +F 3 "" H 1880 2140 60 0000 C CNN + 1 1830 2140 + -1 0 0 1 +$EndComp +$Comp +L eSim_Diode D1 +U 1 1 67A9FEEB +P 2550 3230 +F 0 "D1" H 2550 3330 50 0000 C CNN +F 1 "eSim_Diode" H 2550 3130 50 0000 C CNN +F 2 "" H 2550 3230 60 0000 C CNN +F 3 "" H 2550 3230 60 0000 C CNN + 1 2550 3230 + 0 1 1 0 +$EndComp +$Comp +L capacitor_polarised C1 +U 1 1 67A9FF3E +P 3470 2690 +F 0 "C1" H 3495 2790 50 0000 L CNN +F 1 "10pF" H 3495 2590 50 0000 L CNN +F 2 "" H 3470 2690 50 0001 C CNN +F 3 "" H 3470 2690 50 0001 C CNN + 1 3470 2690 + 0 -1 -1 0 +$EndComp +$Comp +L resistor R3 +U 1 1 67A9FF79 +P 2880 3560 +F 0 "R3" H 2930 3690 50 0000 C CNN +F 1 "1.5k" H 2930 3510 50 0000 C CNN +F 2 "" H 2930 3540 30 0000 C CNN +F 3 "" V 2930 3610 30 0000 C CNN + 1 2880 3560 + 0 1 1 0 +$EndComp +$Comp +L resistor R5 +U 1 1 67A9FFCE +P 3420 3270 +F 0 "R5" H 3470 3400 50 0000 C CNN +F 1 "3k" H 3470 3220 50 0000 C CNN +F 2 "" H 3470 3250 30 0000 C CNN +F 3 "" V 3470 3320 30 0000 C CNN + 1 3420 3270 + 0 1 1 0 +$EndComp +$Comp +L eSim_NPN Q3 +U 1 1 67AA0018 +P 3370 3830 +F 0 "Q3" H 3270 3880 50 0000 R CNN +F 1 "eSim_NPN" H 3320 3980 50 0000 R CNN +F 2 "" H 3570 3930 29 0000 C CNN +F 3 "" H 3370 3830 60 0000 C CNN + 1 3370 3830 + 1 0 0 -1 +$EndComp +$Comp +L eSim_NPN Q6 +U 1 1 67AA0061 +P 4280 3120 +F 0 "Q6" H 4180 3170 50 0000 R CNN +F 1 "eSim_NPN" H 4230 3270 50 0000 R CNN +F 2 "" H 4480 3220 29 0000 C CNN +F 3 "" H 4280 3120 60 0000 C CNN + 1 4280 3120 + 1 0 0 -1 +$EndComp +$Comp +L zener U9 +U 1 1 67AA00E5 +P 3580 2350 +F 0 "U9" H 3530 2250 60 0000 C CNN +F 1 "zener" H 3580 2450 60 0000 C CNN +F 2 "" H 3630 2350 60 0000 C CNN +F 3 "" H 3630 2350 60 0000 C CNN + 1 3580 2350 + -1 0 0 1 +$EndComp +$Comp +L resistor R6 +U 1 1 67AA01B1 +P 4140 2300 +F 0 "R6" H 4190 2430 50 0000 C CNN +F 1 "5k" H 4190 2250 50 0000 C CNN +F 2 "" H 4190 2280 30 0000 C CNN +F 3 "" V 4190 2350 30 0000 C CNN + 1 4140 2300 + -1 0 0 1 +$EndComp +$Comp +L eSim_NPN Q5 +U 1 1 67AA023E +P 4260 1920 +F 0 "Q5" H 4160 1970 50 0000 R CNN +F 1 "eSim_NPN" H 4210 2070 50 0000 R CNN +F 2 "" H 4460 2020 29 0000 C CNN +F 3 "" H 4260 1920 60 0000 C CNN + 1 4260 1920 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 1 1 67AA192A +P 630 1900 +F 0 "U1" H 680 2000 30 0000 C CNN +F 1 "PORT" H 630 1900 30 0000 C CNN +F 2 "" H 630 1900 60 0000 C CNN +F 3 "" H 630 1900 60 0000 C CNN + 1 630 1900 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 2 1 67AA1BA4 +P 630 2140 +F 0 "U1" H 680 2240 30 0000 C CNN +F 1 "PORT" H 630 2140 30 0000 C CNN +F 2 "" H 630 2140 60 0000 C CNN +F 3 "" H 630 2140 60 0000 C CNN + 2 630 2140 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 3 1 67AA1D5E +P 630 2390 +F 0 "U1" H 680 2490 30 0000 C CNN +F 1 "PORT" H 630 2390 30 0000 C CNN +F 2 "" H 630 2390 60 0000 C CNN +F 3 "" H 630 2390 60 0000 C CNN + 3 630 2390 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 7 1 67AA1FEB +P 4780 2350 +F 0 "U1" H 4830 2450 30 0000 C CNN +F 1 "PORT" H 4780 2350 30 0000 C CNN +F 2 "" H 4780 2350 60 0000 C CNN +F 3 "" H 4780 2350 60 0000 C CNN + 7 4780 2350 + -1 0 0 1 +$EndComp +$Comp +L zener U5 +U 1 1 67AA3714 +P 1830 1900 +F 0 "U5" H 1780 1800 60 0000 C CNN +F 1 "zener" H 1830 2000 60 0000 C CNN +F 2 "" H 1880 1900 60 0000 C CNN +F 3 "" H 1880 1900 60 0000 C CNN + 1 1830 1900 + -1 0 0 1 +$EndComp +Wire Wire Line + 1530 2140 880 2140 +Wire Wire Line + 1530 2390 880 2390 +Wire Wire Line + 2030 1320 2030 2560 +Wire Wire Line + 1530 1900 880 1900 +Connection ~ 2030 2140 +Connection ~ 2030 1900 +Wire Wire Line + 2030 2560 2250 2560 +Connection ~ 2030 2390 +Wire Wire Line + 1500 2870 1500 2390 +Connection ~ 1500 2390 +Wire Wire Line + 1290 2870 1290 2140 +Connection ~ 1290 2140 +Wire Wire Line + 1020 2870 1020 1900 +Connection ~ 1020 1900 +$Comp +L GNDPWR #PWR01 +U 1 1 67AA4776 +P 3900 4160 +F 0 "#PWR01" H 3900 3960 50 0001 C CNN +F 1 "GNDPWR" H 3900 4030 50 0000 C CNN +F 2 "" H 3900 4110 50 0001 C CNN +F 3 "" H 3900 4110 50 0001 C CNN + 1 3900 4160 + 1 0 0 -1 +$EndComp +Wire Wire Line + 4380 4160 4380 3320 +Wire Wire Line + 1020 4160 4520 4160 +Wire Wire Line + 1500 4160 1500 3370 +Connection ~ 3900 4160 +Wire Wire Line + 1290 4160 1290 3370 +Connection ~ 1500 4160 +Wire Wire Line + 1020 4160 1020 3370 +Connection ~ 1290 4160 +Wire Wire Line + 2550 3380 2550 4160 +Connection ~ 2550 4160 +Wire Wire Line + 2550 2760 2550 3080 +Wire Wire Line + 2630 2140 2550 2140 +Wire Wire Line + 2550 1320 2550 2360 +Connection ~ 2550 2140 +Wire Wire Line + 2930 1940 2930 1690 +Wire Wire Line + 2930 1690 3300 1690 +Wire Wire Line + 3190 1330 3190 1690 +Connection ~ 3190 1690 +Wire Wire Line + 3280 2350 3070 2350 +Wire Wire Line + 3070 2350 3070 1690 +Connection ~ 3070 1690 +Wire Wire Line + 3320 2690 2930 2690 +Wire Wire Line + 2930 2340 2930 3460 +Connection ~ 2930 2690 +Wire Wire Line + 4080 3120 2930 3120 +Connection ~ 2930 3120 +Wire Wire Line + 3470 3170 3470 3120 +Connection ~ 3470 3120 +Wire Wire Line + 3170 3830 2930 3830 +Wire Wire Line + 2930 3830 2930 3760 +Wire Wire Line + 3470 3470 3470 3630 +Wire Wire Line + 3470 4030 3470 4160 +Connection ~ 3470 4160 +Wire Wire Line + 4060 1920 3600 1920 +Wire Wire Line + 3600 1920 3600 1890 +Wire Wire Line + 3940 2350 3780 2350 +Wire Wire Line + 4360 2120 4360 2410 +Wire Wire Line + 4240 2350 4530 2350 +Connection ~ 4360 2350 +Wire Wire Line + 4380 2920 4380 2410 +Wire Wire Line + 4380 2410 4360 2410 +Wire Wire Line + 4360 1720 4360 1330 +Wire Wire Line + 4360 1030 4360 910 +Wire Wire Line + 2030 910 5030 910 +Wire Wire Line + 2030 910 2030 1020 +Wire Wire Line + 2550 1020 2550 910 +Connection ~ 2550 910 +Wire Wire Line + 3190 1030 3190 910 +Connection ~ 3190 910 +Wire Wire Line + 3600 1490 4360 1490 +Connection ~ 4360 1490 +Wire Wire Line + 3620 2690 4380 2690 +Connection ~ 4380 2690 +$Comp +L resistor R15 +U 1 1 67AA7BED +P 8240 1370 +F 0 "R15" H 8290 1500 50 0000 C CNN +F 1 "20k" H 8290 1320 50 0000 C CNN +F 2 "" H 8290 1350 30 0000 C CNN +F 3 "" V 8290 1420 30 0000 C CNN + 1 8240 1370 + 0 1 1 0 +$EndComp +$Comp +L resistor R16 +U 1 1 67AA7BF3 +P 8760 1370 +F 0 "R16" H 8810 1500 50 0000 C CNN +F 1 "10k" H 8810 1320 50 0000 C CNN +F 2 "" H 8810 1350 30 0000 C CNN +F 3 "" V 8810 1420 30 0000 C CNN + 1 8760 1370 + 0 1 1 0 +$EndComp +$Comp +L eSim_NPN Q13 +U 1 1 67AA7BF9 +P 8710 2810 +F 0 "Q13" H 8610 2860 50 0000 R CNN +F 1 "eSim_NPN" H 8660 2960 50 0000 R CNN +F 2 "" H 8910 2910 29 0000 C CNN +F 3 "" H 8710 2810 60 0000 C CNN + 1 8710 2810 + 1 0 0 -1 +$EndComp +$Comp +L eSim_NPN Q14 +U 1 1 67AA7BFF +P 9090 2390 +F 0 "Q14" H 8990 2440 50 0000 R CNN +F 1 "eSim_NPN" H 9040 2540 50 0000 R CNN +F 2 "" H 9290 2490 29 0000 C CNN +F 3 "" H 9090 2390 60 0000 C CNN + 1 9090 2390 + 1 0 0 -1 +$EndComp +$Comp +L eSim_NPN Q16 +U 1 1 67AA7C05 +P 9760 1940 +F 0 "Q16" H 9660 1990 50 0000 R CNN +F 1 "eSim_NPN" H 9710 2090 50 0000 R CNN +F 2 "" H 9960 2040 29 0000 C CNN +F 3 "" H 9760 1940 60 0000 C CNN + 1 9760 1940 + 1 0 0 -1 +$EndComp +$Comp +L resistor R18 +U 1 1 67AA7C0B +P 9400 1380 +F 0 "R18" H 9450 1510 50 0000 C CNN +F 1 "8k" H 9450 1330 50 0000 C CNN +F 2 "" H 9450 1360 30 0000 C CNN +F 3 "" V 9450 1430 30 0000 C CNN + 1 9400 1380 + 0 1 1 0 +$EndComp +$Comp +L resistor R21 +U 1 1 67AA7C11 +P 10570 1380 +F 0 "R21" H 10620 1510 50 0000 C CNN +F 1 "120" H 10620 1330 50 0000 C CNN +F 2 "" H 10620 1360 30 0000 C CNN +F 3 "" V 10620 1430 30 0000 C CNN + 1 10570 1380 + 0 1 1 0 +$EndComp +$Comp +L zener U16 +U 1 1 67AA7C17 +P 7280 3420 +F 0 "U16" H 7230 3320 60 0000 C CNN +F 1 "zener" H 7280 3520 60 0000 C CNN +F 2 "" H 7330 3420 60 0000 C CNN +F 3 "" H 7330 3420 60 0000 C CNN + 1 7280 3420 + 0 1 -1 0 +$EndComp +$Comp +L zener U17 +U 1 1 67AA7C1D +P 7550 3420 +F 0 "U17" H 7500 3320 60 0000 C CNN +F 1 "zener" H 7550 3520 60 0000 C CNN +F 2 "" H 7600 3420 60 0000 C CNN +F 3 "" H 7600 3420 60 0000 C CNN + 1 7550 3420 + 0 1 -1 0 +$EndComp +$Comp +L zener U18 +U 1 1 67AA7C23 +P 7760 3420 +F 0 "U18" H 7710 3320 60 0000 C CNN +F 1 "zener" H 7760 3520 60 0000 C CNN +F 2 "" H 7810 3420 60 0000 C CNN +F 3 "" H 7810 3420 60 0000 C CNN + 1 7760 3420 + 0 1 -1 0 +$EndComp +$Comp +L zener U21 +U 1 1 67AA7C29 +P 8090 2640 +F 0 "U21" H 8040 2540 60 0000 C CNN +F 1 "zener" H 8090 2740 60 0000 C CNN +F 2 "" H 8140 2640 60 0000 C CNN +F 3 "" H 8140 2640 60 0000 C CNN + 1 8090 2640 + -1 0 0 1 +$EndComp +$Comp +L zener U20 +U 1 1 67AA7C2F +P 8090 2390 +F 0 "U20" H 8040 2290 60 0000 C CNN +F 1 "zener" H 8090 2490 60 0000 C CNN +F 2 "" H 8140 2390 60 0000 C CNN +F 3 "" H 8140 2390 60 0000 C CNN + 1 8090 2390 + -1 0 0 1 +$EndComp +$Comp +L eSim_Diode D3 +U 1 1 67AA7C35 +P 8810 3480 +F 0 "D3" H 8810 3580 50 0000 C CNN +F 1 "eSim_Diode" H 8810 3380 50 0000 C CNN +F 2 "" H 8810 3480 60 0000 C CNN +F 3 "" H 8810 3480 60 0000 C CNN + 1 8810 3480 + 0 1 1 0 +$EndComp +$Comp +L capacitor_polarised C3 +U 1 1 67AA7C3B +P 9730 2940 +F 0 "C3" H 9755 3040 50 0000 L CNN +F 1 "10pF" H 9755 2840 50 0000 L CNN +F 2 "" H 9730 2940 50 0001 C CNN +F 3 "" H 9730 2940 50 0001 C CNN + 1 9730 2940 + 0 -1 -1 0 +$EndComp +$Comp +L resistor R17 +U 1 1 67AA7C41 +P 9140 3810 +F 0 "R17" H 9190 3940 50 0000 C CNN +F 1 "1.5k" H 9190 3760 50 0000 C CNN +F 2 "" H 9190 3790 30 0000 C CNN +F 3 "" V 9190 3860 30 0000 C CNN + 1 9140 3810 + 0 1 1 0 +$EndComp +$Comp +L resistor R19 +U 1 1 67AA7C47 +P 9680 3520 +F 0 "R19" H 9730 3650 50 0000 C CNN +F 1 "3k" H 9730 3470 50 0000 C CNN +F 2 "" H 9730 3500 30 0000 C CNN +F 3 "" V 9730 3570 30 0000 C CNN + 1 9680 3520 + 0 1 1 0 +$EndComp +$Comp +L eSim_NPN Q15 +U 1 1 67AA7C4D +P 9630 4080 +F 0 "Q15" H 9530 4130 50 0000 R CNN +F 1 "eSim_NPN" H 9580 4230 50 0000 R CNN +F 2 "" H 9830 4180 29 0000 C CNN +F 3 "" H 9630 4080 60 0000 C CNN + 1 9630 4080 + 1 0 0 -1 +$EndComp +$Comp +L eSim_NPN Q18 +U 1 1 67AA7C53 +P 10540 3370 +F 0 "Q18" H 10440 3420 50 0000 R CNN +F 1 "eSim_NPN" H 10490 3520 50 0000 R CNN +F 2 "" H 10740 3470 29 0000 C CNN +F 3 "" H 10540 3370 60 0000 C CNN + 1 10540 3370 + 1 0 0 -1 +$EndComp +$Comp +L zener U22 +U 1 1 67AA7C59 +P 9840 2600 +F 0 "U22" H 9790 2500 60 0000 C CNN +F 1 "zener" H 9840 2700 60 0000 C CNN +F 2 "" H 9890 2600 60 0000 C CNN +F 3 "" H 9890 2600 60 0000 C CNN + 1 9840 2600 + -1 0 0 1 +$EndComp +$Comp +L resistor R20 +U 1 1 67AA7C5F +P 10400 2550 +F 0 "R20" H 10450 2680 50 0000 C CNN +F 1 "5k" H 10450 2500 50 0000 C CNN +F 2 "" H 10450 2530 30 0000 C CNN +F 3 "" V 10450 2600 30 0000 C CNN + 1 10400 2550 + -1 0 0 1 +$EndComp +$Comp +L eSim_NPN Q17 +U 1 1 67AA7C65 +P 10520 2170 +F 0 "Q17" H 10420 2220 50 0000 R CNN +F 1 "eSim_NPN" H 10470 2320 50 0000 R CNN +F 2 "" H 10720 2270 29 0000 C CNN +F 3 "" H 10520 2170 60 0000 C CNN + 1 10520 2170 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 10 1 67AA7C6B +P 6890 2150 +F 0 "U1" H 6940 2250 30 0000 C CNN +F 1 "PORT" H 6890 2150 30 0000 C CNN +F 2 "" H 6890 2150 60 0000 C CNN +F 3 "" H 6890 2150 60 0000 C CNN + 10 6890 2150 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 11 1 67AA7C71 +P 6890 2390 +F 0 "U1" H 6940 2490 30 0000 C CNN +F 1 "PORT" H 6890 2390 30 0000 C CNN +F 2 "" H 6890 2390 60 0000 C CNN +F 3 "" H 6890 2390 60 0000 C CNN + 11 6890 2390 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 12 1 67AA7C77 +P 6890 2640 +F 0 "U1" H 6940 2740 30 0000 C CNN +F 1 "PORT" H 6890 2640 30 0000 C CNN +F 2 "" H 6890 2640 60 0000 C CNN +F 3 "" H 6890 2640 60 0000 C CNN + 12 6890 2640 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 14 1 67AA7C7D +P 11040 2600 +F 0 "U1" H 11090 2700 30 0000 C CNN +F 1 "PORT" H 11040 2600 30 0000 C CNN +F 2 "" H 11040 2600 60 0000 C CNN +F 3 "" H 11040 2600 60 0000 C CNN + 14 11040 2600 + -1 0 0 1 +$EndComp +$Comp +L zener U19 +U 1 1 67AA7C83 +P 8090 2150 +F 0 "U19" H 8040 2050 60 0000 C CNN +F 1 "zener" H 8090 2250 60 0000 C CNN +F 2 "" H 8140 2150 60 0000 C CNN +F 3 "" H 8140 2150 60 0000 C CNN + 1 8090 2150 + -1 0 0 1 +$EndComp +Wire Wire Line + 7790 2390 7140 2390 +Wire Wire Line + 7790 2640 7140 2640 +Wire Wire Line + 8290 1570 8290 2810 +Wire Wire Line + 7790 2150 7140 2150 +Connection ~ 8290 2390 +Connection ~ 8290 2150 +Wire Wire Line + 8290 2810 8510 2810 +Connection ~ 8290 2640 +Wire Wire Line + 7760 3120 7760 2640 +Connection ~ 7760 2640 +Wire Wire Line + 7550 3120 7550 2390 +Connection ~ 7550 2390 +Wire Wire Line + 7280 3120 7280 2150 +Connection ~ 7280 2150 +$Comp +L GNDPWR #PWR02 +U 1 1 67AA7C97 +P 10160 4410 +F 0 "#PWR02" H 10160 4210 50 0001 C CNN +F 1 "GNDPWR" H 10160 4280 50 0000 C CNN +F 2 "" H 10160 4360 50 0001 C CNN +F 3 "" H 10160 4360 50 0001 C CNN + 1 10160 4410 + 1 0 0 -1 +$EndComp +Wire Wire Line + 10640 3570 10640 4750 +Wire Wire Line + 7280 4410 10640 4410 +Wire Wire Line + 7760 4410 7760 3620 +Connection ~ 10160 4410 +Wire Wire Line + 7550 4410 7550 3620 +Connection ~ 7760 4410 +Wire Wire Line + 7280 4410 7280 3620 +Connection ~ 7550 4410 +Wire Wire Line + 8810 3630 8810 4410 +Connection ~ 8810 4410 +Wire Wire Line + 8810 3010 8810 3330 +Wire Wire Line + 8890 2390 8810 2390 +Wire Wire Line + 8810 1570 8810 2610 +Connection ~ 8810 2390 +Wire Wire Line + 9190 2190 9190 1940 +Wire Wire Line + 9190 1940 9560 1940 +Wire Wire Line + 9450 1580 9450 1940 +Connection ~ 9450 1940 +Wire Wire Line + 9540 2600 9330 2600 +Wire Wire Line + 9330 2600 9330 1940 +Connection ~ 9330 1940 +Wire Wire Line + 9580 2940 9190 2940 +Wire Wire Line + 9190 2590 9190 3710 +Connection ~ 9190 2940 +Wire Wire Line + 10340 3370 9190 3370 +Connection ~ 9190 3370 +Wire Wire Line + 9730 3420 9730 3370 +Connection ~ 9730 3370 +Wire Wire Line + 9430 4080 9190 4080 +Wire Wire Line + 9190 4080 9190 4010 +Wire Wire Line + 9730 3720 9730 3880 +Wire Wire Line + 9730 4280 9730 4410 +Connection ~ 9730 4410 +Wire Wire Line + 10320 2170 9860 2170 +Wire Wire Line + 9860 2170 9860 2140 +Wire Wire Line + 10200 2600 10040 2600 +Wire Wire Line + 10620 2370 10620 2660 +Wire Wire Line + 10500 2600 10790 2600 +Connection ~ 10620 2600 +Wire Wire Line + 10640 3170 10640 2660 +Wire Wire Line + 10640 2660 10620 2660 +Wire Wire Line + 10620 1970 10620 1580 +Wire Wire Line + 10620 900 10620 1280 +Wire Wire Line + 10620 1160 8290 1160 +Wire Wire Line + 8290 1160 8290 1270 +Wire Wire Line + 8810 1270 8810 1160 +Connection ~ 8810 1160 +Wire Wire Line + 9450 1280 9450 1160 +Connection ~ 9450 1160 +Wire Wire Line + 9860 1740 10620 1740 +Connection ~ 10620 1740 +Wire Wire Line + 9880 2940 10640 2940 +Connection ~ 10640 2940 +$Comp +L resistor R8 +U 1 1 67AA90A0 +P 4520 4430 +F 0 "R8" H 4570 4560 50 0000 C CNN +F 1 "20k" H 4570 4380 50 0000 C CNN +F 2 "" H 4570 4410 30 0000 C CNN +F 3 "" V 4570 4480 30 0000 C CNN + 1 4520 4430 + 0 1 1 0 +$EndComp +$Comp +L resistor R9 +U 1 1 67AA90A6 +P 5040 4430 +F 0 "R9" H 5090 4560 50 0000 C CNN +F 1 "10k" H 5090 4380 50 0000 C CNN +F 2 "" H 5090 4410 30 0000 C CNN +F 3 "" V 5090 4480 30 0000 C CNN + 1 5040 4430 + 0 1 1 0 +$EndComp +$Comp +L eSim_NPN Q7 +U 1 1 67AA90AC +P 4990 5870 +F 0 "Q7" H 4890 5920 50 0000 R CNN +F 1 "eSim_NPN" H 4940 6020 50 0000 R CNN +F 2 "" H 5190 5970 29 0000 C CNN +F 3 "" H 4990 5870 60 0000 C CNN + 1 4990 5870 + 1 0 0 -1 +$EndComp +$Comp +L eSim_NPN Q8 +U 1 1 67AA90B2 +P 5370 5450 +F 0 "Q8" H 5270 5500 50 0000 R CNN +F 1 "eSim_NPN" H 5320 5600 50 0000 R CNN +F 2 "" H 5570 5550 29 0000 C CNN +F 3 "" H 5370 5450 60 0000 C CNN + 1 5370 5450 + 1 0 0 -1 +$EndComp +$Comp +L eSim_NPN Q10 +U 1 1 67AA90B8 +P 6040 5000 +F 0 "Q10" H 5940 5050 50 0000 R CNN +F 1 "eSim_NPN" H 5990 5150 50 0000 R CNN +F 2 "" H 6240 5100 29 0000 C CNN +F 3 "" H 6040 5000 60 0000 C CNN + 1 6040 5000 + 1 0 0 -1 +$EndComp +$Comp +L resistor R11 +U 1 1 67AA90BE +P 5680 4440 +F 0 "R11" H 5730 4570 50 0000 C CNN +F 1 "8k" H 5730 4390 50 0000 C CNN +F 2 "" H 5730 4420 30 0000 C CNN +F 3 "" V 5730 4490 30 0000 C CNN + 1 5680 4440 + 0 1 1 0 +$EndComp +$Comp +L resistor R14 +U 1 1 67AA90C4 +P 6850 4440 +F 0 "R14" H 6900 4570 50 0000 C CNN +F 1 "120" H 6900 4390 50 0000 C CNN +F 2 "" H 6900 4420 30 0000 C CNN +F 3 "" V 6900 4490 30 0000 C CNN + 1 6850 4440 + 0 1 1 0 +$EndComp +$Comp +L zener U8 +U 1 1 67AA90CA +P 3560 6480 +F 0 "U8" H 3510 6380 60 0000 C CNN +F 1 "zener" H 3560 6580 60 0000 C CNN +F 2 "" H 3610 6480 60 0000 C CNN +F 3 "" H 3610 6480 60 0000 C CNN + 1 3560 6480 + 0 1 -1 0 +$EndComp +$Comp +L zener U10 +U 1 1 67AA90D0 +P 3830 6480 +F 0 "U10" H 3780 6380 60 0000 C CNN +F 1 "zener" H 3830 6580 60 0000 C CNN +F 2 "" H 3880 6480 60 0000 C CNN +F 3 "" H 3880 6480 60 0000 C CNN + 1 3830 6480 + 0 1 -1 0 +$EndComp +$Comp +L zener U11 +U 1 1 67AA90D6 +P 4040 6480 +F 0 "U11" H 3990 6380 60 0000 C CNN +F 1 "zener" H 4040 6580 60 0000 C CNN +F 2 "" H 4090 6480 60 0000 C CNN +F 3 "" H 4090 6480 60 0000 C CNN + 1 4040 6480 + 0 1 -1 0 +$EndComp +$Comp +L zener U14 +U 1 1 67AA90DC +P 4370 5700 +F 0 "U14" H 4320 5600 60 0000 C CNN +F 1 "zener" H 4370 5800 60 0000 C CNN +F 2 "" H 4420 5700 60 0000 C CNN +F 3 "" H 4420 5700 60 0000 C CNN + 1 4370 5700 + -1 0 0 1 +$EndComp +$Comp +L zener U13 +U 1 1 67AA90E2 +P 4370 5450 +F 0 "U13" H 4320 5350 60 0000 C CNN +F 1 "zener" H 4370 5550 60 0000 C CNN +F 2 "" H 4420 5450 60 0000 C CNN +F 3 "" H 4420 5450 60 0000 C CNN + 1 4370 5450 + -1 0 0 1 +$EndComp +$Comp +L eSim_Diode D2 +U 1 1 67AA90E8 +P 5090 6540 +F 0 "D2" H 5090 6640 50 0000 C CNN +F 1 "eSim_Diode" H 5090 6440 50 0000 C CNN +F 2 "" H 5090 6540 60 0000 C CNN +F 3 "" H 5090 6540 60 0000 C CNN + 1 5090 6540 + 0 1 1 0 +$EndComp +$Comp +L capacitor_polarised C2 +U 1 1 67AA90EE +P 6010 6000 +F 0 "C2" H 6035 6100 50 0000 L CNN +F 1 "10pF" H 6035 5900 50 0000 L CNN +F 2 "" H 6010 6000 50 0001 C CNN +F 3 "" H 6010 6000 50 0001 C CNN + 1 6010 6000 + 0 -1 -1 0 +$EndComp +$Comp +L resistor R10 +U 1 1 67AA90F4 +P 5420 6870 +F 0 "R10" H 5470 7000 50 0000 C CNN +F 1 "1.5k" H 5470 6820 50 0000 C CNN +F 2 "" H 5470 6850 30 0000 C CNN +F 3 "" V 5470 6920 30 0000 C CNN + 1 5420 6870 + 0 1 1 0 +$EndComp +$Comp +L resistor R12 +U 1 1 67AA90FA +P 5960 6580 +F 0 "R12" H 6010 6710 50 0000 C CNN +F 1 "3k" H 6010 6530 50 0000 C CNN +F 2 "" H 6010 6560 30 0000 C CNN +F 3 "" V 6010 6630 30 0000 C CNN + 1 5960 6580 + 0 1 1 0 +$EndComp +$Comp +L eSim_NPN Q9 +U 1 1 67AA9100 +P 5910 7140 +F 0 "Q9" H 5810 7190 50 0000 R CNN +F 1 "eSim_NPN" H 5860 7290 50 0000 R CNN +F 2 "" H 6110 7240 29 0000 C CNN +F 3 "" H 5910 7140 60 0000 C CNN + 1 5910 7140 + 1 0 0 -1 +$EndComp +$Comp +L eSim_NPN Q12 +U 1 1 67AA9106 +P 6820 6430 +F 0 "Q12" H 6720 6480 50 0000 R CNN +F 1 "eSim_NPN" H 6770 6580 50 0000 R CNN +F 2 "" H 7020 6530 29 0000 C CNN +F 3 "" H 6820 6430 60 0000 C CNN + 1 6820 6430 + 1 0 0 -1 +$EndComp +$Comp +L zener U15 +U 1 1 67AA910C +P 6120 5660 +F 0 "U15" H 6070 5560 60 0000 C CNN +F 1 "zener" H 6120 5760 60 0000 C CNN +F 2 "" H 6170 5660 60 0000 C CNN +F 3 "" H 6170 5660 60 0000 C CNN + 1 6120 5660 + -1 0 0 1 +$EndComp +$Comp +L resistor R13 +U 1 1 67AA9112 +P 6680 5610 +F 0 "R13" H 6730 5740 50 0000 C CNN +F 1 "5k" H 6730 5560 50 0000 C CNN +F 2 "" H 6730 5590 30 0000 C CNN +F 3 "" V 6730 5660 30 0000 C CNN + 1 6680 5610 + -1 0 0 1 +$EndComp +$Comp +L eSim_NPN Q11 +U 1 1 67AA9118 +P 6800 5230 +F 0 "Q11" H 6700 5280 50 0000 R CNN +F 1 "eSim_NPN" H 6750 5380 50 0000 R CNN +F 2 "" H 7000 5330 29 0000 C CNN +F 3 "" H 6800 5230 60 0000 C CNN + 1 6800 5230 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 4 1 67AA911E +P 3170 5210 +F 0 "U1" H 3220 5310 30 0000 C CNN +F 1 "PORT" H 3170 5210 30 0000 C CNN +F 2 "" H 3170 5210 60 0000 C CNN +F 3 "" H 3170 5210 60 0000 C CNN + 4 3170 5210 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 5 1 67AA9124 +P 3170 5450 +F 0 "U1" H 3220 5550 30 0000 C CNN +F 1 "PORT" H 3170 5450 30 0000 C CNN +F 2 "" H 3170 5450 60 0000 C CNN +F 3 "" H 3170 5450 60 0000 C CNN + 5 3170 5450 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 6 1 67AA912A +P 3170 5700 +F 0 "U1" H 3220 5800 30 0000 C CNN +F 1 "PORT" H 3170 5700 30 0000 C CNN +F 2 "" H 3170 5700 60 0000 C CNN +F 3 "" H 3170 5700 60 0000 C CNN + 6 3170 5700 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 13 1 67AA9130 +P 7320 5660 +F 0 "U1" H 7370 5760 30 0000 C CNN +F 1 "PORT" H 7320 5660 30 0000 C CNN +F 2 "" H 7320 5660 60 0000 C CNN +F 3 "" H 7320 5660 60 0000 C CNN + 13 7320 5660 + -1 0 0 1 +$EndComp +$Comp +L zener U12 +U 1 1 67AA9136 +P 4370 5210 +F 0 "U12" H 4320 5110 60 0000 C CNN +F 1 "zener" H 4370 5310 60 0000 C CNN +F 2 "" H 4420 5210 60 0000 C CNN +F 3 "" H 4420 5210 60 0000 C CNN + 1 4370 5210 + -1 0 0 1 +$EndComp +Wire Wire Line + 4070 5450 3420 5450 +Wire Wire Line + 4070 5700 3420 5700 +Wire Wire Line + 4570 4630 4570 5870 +Wire Wire Line + 4070 5210 3420 5210 +Connection ~ 4570 5450 +Connection ~ 4570 5210 +Wire Wire Line + 4570 5870 4790 5870 +Connection ~ 4570 5700 +Wire Wire Line + 4040 6180 4040 5700 +Connection ~ 4040 5700 +Wire Wire Line + 3830 6180 3830 5450 +Connection ~ 3830 5450 +Wire Wire Line + 3560 6180 3560 5210 +Connection ~ 3560 5210 +$Comp +L GNDPWR #PWR03 +U 1 1 67AA914A +P 6440 7470 +F 0 "#PWR03" H 6440 7270 50 0001 C CNN +F 1 "GNDPWR" H 6440 7340 50 0000 C CNN +F 2 "" H 6440 7420 50 0001 C CNN +F 3 "" H 6440 7420 50 0001 C CNN + 1 6440 7470 + 1 0 0 -1 +$EndComp +Wire Wire Line + 6920 7470 6920 6630 +Wire Wire Line + 3560 7470 7600 7470 +Wire Wire Line + 4040 7470 4040 6680 +Connection ~ 6440 7470 +Wire Wire Line + 3830 7470 3830 6680 +Connection ~ 4040 7470 +Wire Wire Line + 3560 7470 3560 6680 +Connection ~ 3830 7470 +Wire Wire Line + 5090 6690 5090 7470 +Connection ~ 5090 7470 +Wire Wire Line + 5090 6070 5090 6390 +Wire Wire Line + 5170 5450 5090 5450 +Wire Wire Line + 5090 4630 5090 5670 +Connection ~ 5090 5450 +Wire Wire Line + 5470 5250 5470 5000 +Wire Wire Line + 5470 5000 5840 5000 +Wire Wire Line + 5730 4640 5730 5000 +Connection ~ 5730 5000 +Wire Wire Line + 5820 5660 5610 5660 +Wire Wire Line + 5610 5660 5610 5000 +Connection ~ 5610 5000 +Wire Wire Line + 5860 6000 5470 6000 +Wire Wire Line + 5470 5650 5470 6770 +Connection ~ 5470 6000 +Wire Wire Line + 6620 6430 5470 6430 +Connection ~ 5470 6430 +Wire Wire Line + 6010 6480 6010 6430 +Connection ~ 6010 6430 +Wire Wire Line + 5710 7140 5470 7140 +Wire Wire Line + 5470 7140 5470 7070 +Wire Wire Line + 6010 6780 6010 6940 +Wire Wire Line + 6010 7340 6010 7470 +Connection ~ 6010 7470 +Wire Wire Line + 6600 5230 6140 5230 +Wire Wire Line + 6140 5230 6140 5200 +Wire Wire Line + 6480 5660 6320 5660 +Wire Wire Line + 6900 5430 6900 5720 +Wire Wire Line + 6780 5660 7070 5660 +Connection ~ 6900 5660 +Wire Wire Line + 6920 6230 6920 5720 +Wire Wire Line + 6920 5720 6900 5720 +Wire Wire Line + 6900 5030 6900 4640 +Wire Wire Line + 6900 3620 6900 4340 +Wire Wire Line + 6900 4220 4570 4220 +Wire Wire Line + 4570 4220 4570 4330 +Wire Wire Line + 5090 4330 5090 4220 +Connection ~ 5090 4220 +Wire Wire Line + 5730 4340 5730 4220 +Connection ~ 5730 4220 +Wire Wire Line + 6140 4800 6900 4800 +Connection ~ 6900 4800 +Wire Wire Line + 6160 6000 6920 6000 +Connection ~ 6920 6000 +$Comp +L PORT U1 +U 8 1 67AAA48F +P 5330 830 +F 0 "U1" H 5380 930 30 0000 C CNN +F 1 "PORT" H 5330 830 30 0000 C CNN +F 2 "" H 5330 830 60 0000 C CNN +F 3 "" H 5330 830 60 0000 C CNN + 8 5330 830 + 0 1 1 0 +$EndComp +$Comp +L PORT U1 +U 9 1 67AAA999 +P 5920 830 +F 0 "U1" H 5970 930 30 0000 C CNN +F 1 "PORT" H 5920 830 30 0000 C CNN +F 2 "" H 5920 830 60 0000 C CNN +F 3 "" H 5920 830 60 0000 C CNN + 9 5920 830 + 0 1 1 0 +$EndComp +Wire Wire Line + 5030 910 5030 1300 +Wire Wire Line + 5030 1300 5480 1300 +Wire Wire Line + 5330 1080 5330 3620 +Connection ~ 4360 910 +Wire Wire Line + 5330 3620 6900 3620 +Connection ~ 5330 1300 +Connection ~ 6900 4220 +Wire Wire Line + 10620 900 7960 900 +Wire Wire Line + 7960 900 7960 1750 +Wire Wire Line + 7960 1750 5480 1750 +Wire Wire Line + 5480 1750 5480 1300 +Connection ~ 10620 1160 +Wire Wire Line + 4520 4160 4520 3860 +Wire Wire Line + 4520 3860 5920 3860 +Wire Wire Line + 5920 3860 5920 1080 +Connection ~ 4380 4160 +Wire Wire Line + 10640 4750 7050 4750 +Wire Wire Line + 7050 4750 7050 2950 +Wire Wire Line + 7050 2950 5690 2950 +Connection ~ 5920 2950 +Connection ~ 10640 4410 +Wire Wire Line + 7600 7470 7600 4640 +Wire Wire Line + 7600 4640 7150 4640 +Wire Wire Line + 7150 4640 7150 2790 +Wire Wire Line + 7150 2790 5690 2790 +Wire Wire Line + 5690 2790 5690 2950 +Connection ~ 6920 7470 +$EndSCHEMATC diff --git a/library/SubcircuitLibrary/SN74LS11/Subcircuit_SN74LS11.sub b/library/SubcircuitLibrary/SN74LS11/Subcircuit_SN74LS11.sub new file mode 100644 index 00000000..a2659577 --- /dev/null +++ b/library/SubcircuitLibrary/SN74LS11/Subcircuit_SN74LS11.sub @@ -0,0 +1,137 @@ +* Subcircuit Subcircuit_SN74LS11 +.subckt Subcircuit_SN74LS11 net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ net-_u1-pad5_ net-_u1-pad6_ net-_c1-pad2_ net-_r1-pad1_ gndpwr net-_u1-pad10_ net-_u1-pad11_ net-_u1-pad12_ net-_c2-pad2_ net-_c3-pad2_ +* c:\fossee\esim\library\subcircuitlibrary\subcircuit_sn74ls11\subcircuit_sn74ls11.cir +.include D.lib +.include NPN.lib +r1 net-_r1-pad1_ net-_q1-pad2_ 20k +r2 net-_r1-pad1_ net-_q1-pad1_ 10k +q1 net-_q1-pad1_ net-_q1-pad2_ net-_d1-pad1_ Q2N2222 +q2 net-_q2-pad1_ net-_q1-pad1_ net-_c1-pad1_ Q2N2222 +q4 net-_q4-pad1_ net-_q2-pad1_ net-_q4-pad3_ Q2N2222 +r4 net-_r1-pad1_ net-_q2-pad1_ 8k +r7 net-_r1-pad1_ net-_q4-pad1_ 120 +* u2 gndpwr net-_u1-pad1_ zener +* u3 gndpwr net-_u1-pad2_ zener +* u4 gndpwr net-_u1-pad3_ zener +* u7 net-_q1-pad2_ net-_u1-pad3_ zener +* u6 net-_q1-pad2_ net-_u1-pad2_ zener +d1 net-_d1-pad1_ gndpwr 1N4148 +c1 net-_c1-pad1_ net-_c1-pad2_ 10pf +r3 net-_c1-pad1_ net-_q3-pad2_ 1.5k +r5 net-_c1-pad1_ net-_q3-pad1_ 3k +q3 net-_q3-pad1_ net-_q3-pad2_ gndpwr Q2N2222 +q6 net-_c1-pad2_ net-_c1-pad1_ gndpwr Q2N2222 +* u9 net-_r6-pad2_ net-_q2-pad1_ zener +r6 net-_c1-pad2_ net-_r6-pad2_ 5k +q5 net-_q4-pad1_ net-_q4-pad3_ net-_c1-pad2_ Q2N2222 +* u5 net-_q1-pad2_ net-_u1-pad1_ zener +r15 net-_r1-pad1_ net-_q13-pad2_ 20k +r16 net-_r1-pad1_ net-_q13-pad1_ 10k +q13 net-_q13-pad1_ net-_q13-pad2_ net-_d3-pad1_ Q2N2222 +q14 net-_q14-pad1_ net-_q13-pad1_ net-_c3-pad1_ Q2N2222 +q16 net-_q16-pad1_ net-_q14-pad1_ net-_q16-pad3_ Q2N2222 +r18 net-_r1-pad1_ net-_q14-pad1_ 8k +r21 net-_r1-pad1_ net-_q16-pad1_ 120 +* u16 gndpwr net-_u1-pad10_ zener +* u17 gndpwr net-_u1-pad11_ zener +* u18 gndpwr net-_u1-pad12_ zener +* u21 net-_q13-pad2_ net-_u1-pad12_ zener +* u20 net-_q13-pad2_ net-_u1-pad11_ zener +d3 net-_d3-pad1_ gndpwr 1N4148 +c3 net-_c3-pad1_ net-_c3-pad2_ 10pf +r17 net-_c3-pad1_ net-_q15-pad2_ 1.5k +r19 net-_c3-pad1_ net-_q15-pad1_ 3k +q15 net-_q15-pad1_ net-_q15-pad2_ gndpwr Q2N2222 +q18 net-_c3-pad2_ net-_c3-pad1_ gndpwr Q2N2222 +* u22 net-_r20-pad2_ net-_q14-pad1_ zener +r20 net-_c3-pad2_ net-_r20-pad2_ 5k +q17 net-_q16-pad1_ net-_q16-pad3_ net-_c3-pad2_ Q2N2222 +* u19 net-_q13-pad2_ net-_u1-pad10_ zener +r8 net-_r1-pad1_ net-_q7-pad2_ 20k +r9 net-_r1-pad1_ net-_q7-pad1_ 10k +q7 net-_q7-pad1_ net-_q7-pad2_ net-_d2-pad1_ Q2N2222 +q8 net-_q10-pad2_ net-_q7-pad1_ net-_c2-pad1_ Q2N2222 +q10 net-_q10-pad1_ net-_q10-pad2_ net-_q10-pad3_ Q2N2222 +r11 net-_r1-pad1_ net-_q10-pad2_ 8k +r14 net-_r1-pad1_ net-_q10-pad1_ 120 +* u8 gndpwr net-_u1-pad4_ zener +* u10 gndpwr net-_u1-pad5_ zener +* u11 gndpwr net-_u1-pad6_ zener +* u14 net-_q7-pad2_ net-_u1-pad6_ zener +* u13 net-_q7-pad2_ net-_u1-pad5_ zener +d2 net-_d2-pad1_ gndpwr 1N4148 +c2 net-_c2-pad1_ net-_c2-pad2_ 10pf +r10 net-_c2-pad1_ net-_q9-pad2_ 1.5k +r12 net-_c2-pad1_ net-_q9-pad1_ 3k +q9 net-_q9-pad1_ net-_q9-pad2_ gndpwr Q2N2222 +q12 net-_c2-pad2_ net-_c2-pad1_ gndpwr Q2N2222 +* u15 net-_r13-pad2_ net-_q10-pad2_ zener +r13 net-_c2-pad2_ net-_r13-pad2_ 5k +q11 net-_q10-pad1_ net-_q10-pad3_ net-_c2-pad2_ Q2N2222 +* u12 net-_q7-pad2_ net-_u1-pad4_ zener +a1 gndpwr net-_u1-pad1_ u2 +a2 gndpwr net-_u1-pad2_ u3 +a3 gndpwr net-_u1-pad3_ u4 +a4 net-_q1-pad2_ net-_u1-pad3_ u7 +a5 net-_q1-pad2_ net-_u1-pad2_ u6 +a6 net-_r6-pad2_ net-_q2-pad1_ u9 +a7 net-_q1-pad2_ net-_u1-pad1_ u5 +a8 gndpwr net-_u1-pad10_ u16 +a9 gndpwr net-_u1-pad11_ u17 +a10 gndpwr net-_u1-pad12_ u18 +a11 net-_q13-pad2_ net-_u1-pad12_ u21 +a12 net-_q13-pad2_ net-_u1-pad11_ u20 +a13 net-_r20-pad2_ net-_q14-pad1_ u22 +a14 net-_q13-pad2_ net-_u1-pad10_ u19 +a15 gndpwr net-_u1-pad4_ u8 +a16 gndpwr net-_u1-pad5_ u10 +a17 gndpwr net-_u1-pad6_ u11 +a18 net-_q7-pad2_ net-_u1-pad6_ u14 +a19 net-_q7-pad2_ net-_u1-pad5_ u13 +a20 net-_r13-pad2_ net-_q10-pad2_ u15 +a21 net-_q7-pad2_ net-_u1-pad4_ u12 +* Schematic Name: zener, NgSpice Name: zener +.model u2 zener(v_breakdown=5.6 i_breakdown=2.0e-2 i_sat=1.0e-12 n_forward=1.0 limit_switch=FALSE ) +* Schematic Name: zener, NgSpice Name: zener +.model u3 zener(v_breakdown=5.6 i_breakdown=2.0e-2 i_sat=1.0e-12 n_forward=1.0 limit_switch=FALSE ) +* Schematic Name: zener, NgSpice Name: zener +.model u4 zener(v_breakdown=5.6 i_breakdown=2.0e-2 i_sat=1.0e-12 n_forward=1.0 limit_switch=FALSE ) +* Schematic Name: zener, NgSpice Name: zener +.model u7 zener(v_breakdown=5.6 i_breakdown=2.0e-2 i_sat=1.0e-12 n_forward=1.0 limit_switch=FALSE ) +* Schematic Name: zener, NgSpice Name: zener +.model u6 zener(v_breakdown=5.6 i_breakdown=2.0e-2 i_sat=1.0e-12 n_forward=1.0 limit_switch=FALSE ) +* Schematic Name: zener, NgSpice Name: zener +.model u9 zener(v_breakdown=5.6 i_breakdown=2.0e-2 i_sat=1.0e-12 n_forward=1.0 limit_switch=FALSE ) +* Schematic Name: zener, NgSpice Name: zener +.model u5 zener(v_breakdown=5.6 i_breakdown=2.0e-2 i_sat=1.0e-12 n_forward=1.0 limit_switch=FALSE ) +* Schematic Name: zener, NgSpice Name: zener +.model u16 zener(v_breakdown=5.6 i_breakdown=2.0e-2 i_sat=1.0e-12 n_forward=1.0 limit_switch=FALSE ) +* Schematic Name: zener, NgSpice Name: zener +.model u17 zener(v_breakdown=5.6 i_breakdown=2.0e-2 i_sat=1.0e-12 n_forward=1.0 limit_switch=FALSE ) +* Schematic Name: zener, NgSpice Name: zener +.model u18 zener(v_breakdown=5.6 i_breakdown=2.0e-2 i_sat=1.0e-12 n_forward=1.0 limit_switch=FALSE ) +* Schematic Name: zener, NgSpice Name: zener +.model u21 zener(v_breakdown=5.6 i_breakdown=2.0e-2 i_sat=1.0e-12 n_forward=1.0 limit_switch=FALSE ) +* Schematic Name: zener, NgSpice Name: zener +.model u20 zener(v_breakdown=5.6 i_breakdown=2.0e-2 i_sat=1.0e-12 n_forward=1.0 limit_switch=FALSE ) +* Schematic Name: zener, NgSpice Name: zener +.model u22 zener(v_breakdown=5.6 i_breakdown=2.0e-2 i_sat=1.0e-12 n_forward=1.0 limit_switch=FALSE ) +* Schematic Name: zener, NgSpice Name: zener +.model u19 zener(v_breakdown=5.6 i_breakdown=2.0e-2 i_sat=1.0e-12 n_forward=1.0 limit_switch=FALSE ) +* Schematic Name: zener, NgSpice Name: zener +.model u8 zener(v_breakdown=5.6 i_breakdown=2.0e-2 i_sat=1.0e-12 n_forward=1.0 limit_switch=FALSE ) +* Schematic Name: zener, NgSpice Name: zener +.model u10 zener(v_breakdown=5.6 i_breakdown=2.0e-2 i_sat=1.0e-12 n_forward=1.0 limit_switch=FALSE ) +* Schematic Name: zener, NgSpice Name: zener +.model u11 zener(v_breakdown=5.6 i_breakdown=2.0e-2 i_sat=1.0e-12 n_forward=1.0 limit_switch=FALSE ) +* Schematic Name: zener, NgSpice Name: zener +.model u14 zener(v_breakdown=5.6 i_breakdown=2.0e-2 i_sat=1.0e-12 n_forward=1.0 limit_switch=FALSE ) +* Schematic Name: zener, NgSpice Name: zener +.model u13 zener(v_breakdown=5.6 i_breakdown=2.0e-2 i_sat=1.0e-12 n_forward=1.0 limit_switch=FALSE ) +* Schematic Name: zener, NgSpice Name: zener +.model u15 zener(v_breakdown=5.6 i_breakdown=2.0e-2 i_sat=1.0e-12 n_forward=1.0 limit_switch=FALSE ) +* Schematic Name: zener, NgSpice Name: zener +.model u12 zener(v_breakdown=5.6 i_breakdown=2.0e-2 i_sat=1.0e-12 n_forward=1.0 limit_switch=FALSE ) +* Control Statements + +.ends Subcircuit_SN74LS11 \ No newline at end of file diff --git a/library/SubcircuitLibrary/SN74LS11/Subcircuit_SN74LS11_Previous_Values.xml b/library/SubcircuitLibrary/SN74LS11/Subcircuit_SN74LS11_Previous_Values.xml new file mode 100644 index 00000000..088a27f7 --- /dev/null +++ b/library/SubcircuitLibrary/SN74LS11/Subcircuit_SN74LS11_Previous_Values.xml @@ -0,0 +1 @@ +truefalsefalseHzHz0Volts or AmperesVolts or AmperesVolts or AmperesVolts or AmperesVolts or AmperesVolts or AmperessecsecseczenerzenerzenerzenerzenerzenerzenerzenerzenerzenerzenerzenerzenerzenerzenerzenerzenerzenerzenerzenerzenerC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libC:\FOSSEE\eSim\library\deviceModelLibrary\Diode\D.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libC:\FOSSEE\eSim\library\deviceModelLibrary\Diode\D.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libC:\FOSSEE\eSim\library\deviceModelLibrary\Diode\D.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib \ No newline at end of file diff --git a/library/SubcircuitLibrary/SN74LS11/analysis b/library/SubcircuitLibrary/SN74LS11/analysis new file mode 100644 index 00000000..ebd5c0a9 --- /dev/null +++ b/library/SubcircuitLibrary/SN74LS11/analysis @@ -0,0 +1 @@ +.tran 0e-00 0e-00 0e-00 \ No newline at end of file -- cgit