From 217be41eb59c8c87aabe788681de46f756e0b491 Mon Sep 17 00:00:00 2001 From: suprraja Date: Tue, 11 Mar 2025 02:53:06 +0000 Subject: Added lm205 subcircuit --- library/SubcircuitLibrary/lm205/NJF.lib | 4 + library/SubcircuitLibrary/lm205/NPN.lib | 4 + library/SubcircuitLibrary/lm205/PNP.lib | 4 + library/SubcircuitLibrary/lm205/analysis | 1 + library/SubcircuitLibrary/lm205/lm205-cache.lib | 158 +++++ library/SubcircuitLibrary/lm205/lm205.cir | 43 ++ library/SubcircuitLibrary/lm205/lm205.cir.out | 50 ++ library/SubcircuitLibrary/lm205/lm205.pro | 73 ++ library/SubcircuitLibrary/lm205/lm205.sch | 755 +++++++++++++++++++++ library/SubcircuitLibrary/lm205/lm205.sub | 44 ++ .../lm205/lm205_Previous_Values.xml | 1 + 11 files changed, 1137 insertions(+) create mode 100644 library/SubcircuitLibrary/lm205/NJF.lib create mode 100644 library/SubcircuitLibrary/lm205/NPN.lib create mode 100644 library/SubcircuitLibrary/lm205/PNP.lib create mode 100644 library/SubcircuitLibrary/lm205/analysis create mode 100644 library/SubcircuitLibrary/lm205/lm205-cache.lib create mode 100644 library/SubcircuitLibrary/lm205/lm205.cir create mode 100644 library/SubcircuitLibrary/lm205/lm205.cir.out create mode 100644 library/SubcircuitLibrary/lm205/lm205.pro create mode 100644 library/SubcircuitLibrary/lm205/lm205.sch create mode 100644 library/SubcircuitLibrary/lm205/lm205.sub create mode 100644 library/SubcircuitLibrary/lm205/lm205_Previous_Values.xml (limited to 'library/SubcircuitLibrary') diff --git a/library/SubcircuitLibrary/lm205/NJF.lib b/library/SubcircuitLibrary/lm205/NJF.lib new file mode 100644 index 00000000..dbb2cbae --- /dev/null +++ b/library/SubcircuitLibrary/lm205/NJF.lib @@ -0,0 +1,4 @@ +.model J2N3819 NJF(Beta=1.304m Betatce=-.5 Rd=1 Rs=1 Lambda=2.25m Vto=-3 ++ Vtotc=-2.5m Is=33.57f Isr=322.4f N=1 Nr=2 Xti=3 Alpha=311.7u ++ Vk=243.6 Cgd=1.6p M=.3622 Pb=1 Fc=.5 Cgs=2.414p Kf=9.882E-18 ++ Af=1) diff --git a/library/SubcircuitLibrary/lm205/NPN.lib b/library/SubcircuitLibrary/lm205/NPN.lib new file mode 100644 index 00000000..be5f3073 --- /dev/null +++ b/library/SubcircuitLibrary/lm205/NPN.lib @@ -0,0 +1,4 @@ +.model Q2N2222 NPN( Is=14.34f Xti=3 Eg=1.11 Vaf=74.03 Bf=400 Ne=1.307 ++ Ise=14.34f Ikf=0.2847 Xtb=1.5 Br=6.092 Nc=2 Isc=0 Ikr=0 Rc=1 Cjc=7.306p ++ Mjc=0.3416 Vjc=0.75 Fc=0.5 Cje=22.01p Mje=0.377 Vje=0.75 Tr=46.91n Tf=411.1p ++ Itf=0.6 Vtf=1.7 Xtf=3 Rb=10) diff --git a/library/SubcircuitLibrary/lm205/PNP.lib b/library/SubcircuitLibrary/lm205/PNP.lib new file mode 100644 index 00000000..7edda0ea --- /dev/null +++ b/library/SubcircuitLibrary/lm205/PNP.lib @@ -0,0 +1,4 @@ +.model Q2N2907A PNP(Is=650.6E-18 Xti=3 Eg=1.11 Vaf=115.7 Bf=231.7 Ne=1.829 ++ Ise=54.81f Ikf=1.079 Xtb=1.5 Br=3.563 Nc=2 Isc=0 Ikr=0 Rc=.715 ++ Cjc=14.76p Mjc=.5383 Vjc=.75 Fc=.5 Cje=19.82p Mje=.3357 Vje=.75 ++ Tr=111.3n Tf=603.7p Itf=.65 Vtf=5 Xtf=1.7 Rb=10) diff --git a/library/SubcircuitLibrary/lm205/analysis b/library/SubcircuitLibrary/lm205/analysis new file mode 100644 index 00000000..ebd5c0a9 --- /dev/null +++ b/library/SubcircuitLibrary/lm205/analysis @@ -0,0 +1 @@ +.tran 0e-00 0e-00 0e-00 \ No newline at end of file diff --git a/library/SubcircuitLibrary/lm205/lm205-cache.lib b/library/SubcircuitLibrary/lm205/lm205-cache.lib new file mode 100644 index 00000000..fc07b1b6 --- /dev/null +++ b/library/SubcircuitLibrary/lm205/lm205-cache.lib @@ -0,0 +1,158 @@ +EESchema-LIBRARY Version 2.3 +#encoding utf-8 +# +# PORT +# +DEF PORT U 0 40 Y Y 26 F N +F0 "U" 50 100 30 H V C CNN +F1 "PORT" 0 0 30 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0 +A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50 +S -100 50 100 -50 0 1 0 N +X ~ 1 250 0 100 L 30 30 1 1 B +X ~ 2 250 0 100 L 30 30 2 1 B +X ~ 3 250 0 100 L 30 30 3 1 B +X ~ 4 250 0 100 L 30 30 4 1 B +X ~ 5 250 0 100 L 30 30 5 1 B +X ~ 6 250 0 100 L 30 30 6 1 B +X ~ 7 250 0 100 L 30 30 7 1 B +X ~ 8 250 0 100 L 30 30 8 1 B +X ~ 9 250 0 100 L 30 30 9 1 B +X ~ 10 250 0 100 L 30 30 10 1 B +X ~ 11 250 0 100 L 30 30 11 1 B +X ~ 12 250 0 100 L 30 30 12 1 B +X ~ 13 250 0 100 L 30 30 13 1 B +X ~ 14 250 0 100 L 30 30 14 1 B +X ~ 15 250 0 100 L 30 30 15 1 B +X ~ 16 250 0 100 L 30 30 16 1 B +X ~ 17 250 0 100 L 30 30 17 1 B +X ~ 18 250 0 100 L 30 30 18 1 B +X ~ 19 250 0 100 L 30 30 19 1 B +X ~ 20 250 0 100 L 30 30 20 1 B +X ~ 21 250 0 100 L 30 30 21 1 B +X ~ 22 250 0 100 L 30 30 22 1 B +X ~ 23 250 0 100 L 30 30 23 1 B +X ~ 24 250 0 100 L 30 30 24 1 B +X ~ 25 250 0 100 L 30 30 25 1 B +X ~ 26 250 0 100 L 30 30 26 1 B +ENDDRAW +ENDDEF +# +# eSim_C +# +DEF eSim_C C 0 10 N Y 1 F N +F0 "C" 25 100 50 H V L CNN +F1 "eSim_C" 25 -100 50 H V L CNN +F2 "" 38 -150 30 H V C CNN +F3 "" 0 0 60 H V C CNN +ALIAS capacitor +$FPLIST + C_* +$ENDFPLIST +DRAW +P 2 0 1 20 -80 -30 80 -30 N +P 2 0 1 20 -80 30 80 30 N +X ~ 1 0 150 110 D 40 40 1 1 P +X ~ 2 0 -150 110 U 40 40 1 1 P +ENDDRAW +ENDDEF +# +# eSim_NJF +# +DEF eSim_NJF J 0 0 Y N 1 F N +F0 "J" -100 50 50 H V R CNN +F1 "eSim_NJF" -50 150 50 H V R CNN +F2 "" 200 100 29 H V C CNN +F3 "" 0 0 60 H V C CNN +ALIAS jfet_n +DRAW +C 50 0 111 0 1 10 N +P 3 0 1 10 10 75 10 -75 10 -75 N +P 3 0 1 0 100 -100 100 -50 10 -50 N +P 3 0 1 0 100 100 100 55 10 55 N +P 4 0 1 0 0 0 -40 15 -40 -15 0 0 F +X D 1 100 200 100 D 50 50 1 1 P +X G 2 -200 0 210 R 50 50 1 1 P +X S 3 100 -200 100 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# eSim_NPN +# +DEF eSim_NPN Q 0 0 Y N 1 F N +F0 "Q" -100 50 50 H V R CNN +F1 "eSim_NPN" -50 150 50 H V R CNN +F2 "" 200 100 29 H V C CNN +F3 "" 0 0 60 H V C CNN +ALIAS BC547 Q2N2222 +DRAW +C 50 0 111 0 1 10 N +P 2 0 1 0 25 25 100 100 N +P 3 0 1 0 25 -25 100 -100 100 -100 N +P 3 0 1 20 25 75 25 -75 25 -75 N +P 5 0 1 0 50 -70 70 -50 90 -90 50 -70 50 -70 F +X C 1 100 200 100 D 50 50 1 1 P +X B 2 -200 0 225 R 50 50 1 1 P +X E 3 100 -200 100 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# eSim_PNP +# +DEF eSim_PNP Q 0 0 Y N 1 F N +F0 "Q" -100 50 50 H V R CNN +F1 "eSim_PNP" -50 150 50 H V R CNN +F2 "" 200 100 29 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +C 50 0 111 0 1 10 N +P 2 0 1 0 25 25 100 100 N +P 3 0 1 0 25 -25 100 -100 100 -100 N +P 3 0 1 20 25 75 25 -75 25 -75 N +P 5 0 1 0 90 -70 70 -90 50 -50 90 -70 90 -70 F +X C 1 100 200 100 D 50 50 1 1 P +X B 2 -200 0 225 R 50 50 1 1 P +X E 3 100 -200 100 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# eSim_R +# +DEF eSim_R R 0 0 N Y 1 F N +F0 "R" 50 130 50 H V C CNN +F1 "eSim_R" 50 -50 50 H V C CNN +F2 "" 50 -20 30 H V C CNN +F3 "" 50 50 30 V V C CNN +ALIAS resistor +$FPLIST + R_* + Resistor_* +$ENDFPLIST +DRAW +S 150 10 -50 90 0 1 10 N +X ~ 1 -100 50 50 R 60 60 1 1 P +X ~ 2 200 50 50 L 60 60 1 1 P +ENDDRAW +ENDDEF +# +# zener +# +DEF zener U 0 40 Y Y 1 F N +F0 "U" -50 -100 60 H V C CNN +F1 "zener" 0 100 60 H V C CNN +F2 "" 50 0 60 H V C CNN +F3 "" 50 0 60 H V C CNN +DRAW +P 2 0 1 0 100 -50 50 -100 N +P 2 0 1 0 100 50 100 -50 N +P 2 0 1 0 100 50 150 100 N +P 4 0 1 0 0 50 0 -50 100 0 0 50 N +X ~ IN -200 0 200 R 50 43 1 1 I +X ~ OUT 300 0 200 L 50 43 1 1 O +ENDDRAW +ENDDEF +# +#End Library diff --git a/library/SubcircuitLibrary/lm205/lm205.cir b/library/SubcircuitLibrary/lm205/lm205.cir new file mode 100644 index 00000000..684260fe --- /dev/null +++ b/library/SubcircuitLibrary/lm205/lm205.cir @@ -0,0 +1,43 @@ +* D:\FOSSEE\eSim\library\SubcircuitLibrary\lm205\lm205.cir + +* EESchema Netlist Version 1.1 (Spice format) creation date: 02/18/25 19:55:06 + +* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N +* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +* Sheet Name: / +Q1 Net-_Q1-Pad1_ Net-_Q1-Pad2_ Net-_Q1-Pad3_ eSim_PNP +Q4 Net-_Q4-Pad1_ Net-_Q1-Pad2_ Net-_Q1-Pad3_ eSim_PNP +Q7 Net-_Q7-Pad1_ Net-_Q1-Pad2_ Net-_Q1-Pad3_ eSim_PNP +R1 Net-_Q1-Pad2_ Net-_Q4-Pad1_ 2.8k +R2 Net-_Q1-Pad3_ Net-_Q6-Pad1_ 600 +R3 Net-_Q2-Pad3_ Net-_Q10-Pad2_ 1.86k +R4 Net-_Q6-Pad3_ Net-_Q10-Pad2_ 1.32k +R6 Net-_Q11-Pad3_ Net-_Q17-Pad2_ 3k +R7 Net-_Q17-Pad2_ Net-_Q16-Pad3_ 6.8k +R8 Net-_Q16-Pad3_ Net-_Q20-Pad1_ 3k +Q3 Net-_Q1-Pad2_ Net-_Q1-Pad2_ Net-_J1-Pad1_ eSim_NPN +Q9 Net-_Q4-Pad1_ Net-_Q7-Pad1_ Net-_Q11-Pad2_ eSim_NPN +Q14 Net-_Q11-Pad2_ Net-_Q11-Pad2_ Net-_Q11-Pad3_ eSim_NPN +U2 Net-_C1-Pad2_ Net-_Q7-Pad1_ zener +Q5 Net-_Q1-Pad3_ Net-_Q4-Pad1_ Net-_J1-Pad1_ eSim_NPN +Q11 Net-_J1-Pad1_ Net-_Q11-Pad2_ Net-_Q11-Pad3_ eSim_NPN +Q12 Net-_J1-Pad1_ Net-_Q11-Pad2_ Net-_Q12-Pad3_ eSim_NPN +Q17 Net-_Q12-Pad3_ Net-_Q17-Pad2_ Net-_Q15-Pad3_ eSim_NPN +Q19 Net-_C1-Pad1_ Net-_Q16-Pad3_ Net-_Q18-Pad3_ eSim_NPN +C1 Net-_C1-Pad1_ Net-_C1-Pad2_ 5p +R9 Net-_Q18-Pad3_ Net-_C1-Pad2_ 2.2k +Q20 Net-_Q20-Pad1_ Net-_Q20-Pad1_ Net-_C1-Pad2_ eSim_NPN +J1 Net-_J1-Pad1_ Net-_C1-Pad2_ Net-_C1-Pad2_ jfet_n +Q2 Net-_Q1-Pad3_ Net-_Q1-Pad1_ Net-_Q2-Pad3_ eSim_NPN +Q10 Net-_Q1-Pad1_ Net-_Q10-Pad2_ Net-_Q10-Pad3_ eSim_NPN +Q15 Net-_Q13-Pad3_ Net-_C1-Pad1_ Net-_Q15-Pad3_ eSim_NPN +Q18 Net-_Q15-Pad3_ Net-_Q16-Pad2_ Net-_Q18-Pad3_ eSim_NPN +R5 Net-_Q8-Pad3_ Net-_C1-Pad1_ 4.4k +Q6 Net-_Q6-Pad1_ Net-_Q2-Pad3_ Net-_Q6-Pad3_ eSim_NPN +Q13 Net-_Q1-Pad1_ Net-_Q1-Pad1_ Net-_Q13-Pad3_ eSim_NPN +U1 Net-_Q1-Pad3_ Net-_Q6-Pad1_ Net-_Q6-Pad3_ Net-_Q10-Pad3_ Net-_Q13-Pad3_ Net-_Q16-Pad2_ Net-_Q16-Pad3_ Net-_C1-Pad2_ PORT +Q8 Net-_J1-Pad1_ Net-_Q11-Pad2_ Net-_Q8-Pad3_ eSim_NPN +Q16 Net-_Q13-Pad3_ Net-_Q16-Pad2_ Net-_Q16-Pad3_ eSim_NPN + +.end diff --git a/library/SubcircuitLibrary/lm205/lm205.cir.out b/library/SubcircuitLibrary/lm205/lm205.cir.out new file mode 100644 index 00000000..1f7ba49b --- /dev/null +++ b/library/SubcircuitLibrary/lm205/lm205.cir.out @@ -0,0 +1,50 @@ +* d:\fossee\esim\library\subcircuitlibrary\lm205\lm205.cir + +.include PNP.lib +.include NJF.lib +.include NPN.lib +q1 net-_q1-pad1_ net-_q1-pad2_ net-_q1-pad3_ Q2N2907A +q4 net-_q4-pad1_ net-_q1-pad2_ net-_q1-pad3_ Q2N2907A +q7 net-_q7-pad1_ net-_q1-pad2_ net-_q1-pad3_ Q2N2907A +r1 net-_q1-pad2_ net-_q4-pad1_ 2.8k +r2 net-_q1-pad3_ net-_q6-pad1_ 600 +r3 net-_q2-pad3_ net-_q10-pad2_ 1.86k +r4 net-_q6-pad3_ net-_q10-pad2_ 1.32k +r6 net-_q11-pad3_ net-_q17-pad2_ 3k +r7 net-_q17-pad2_ net-_q16-pad3_ 6.8k +r8 net-_q16-pad3_ net-_q20-pad1_ 3k +q3 net-_q1-pad2_ net-_q1-pad2_ net-_j1-pad1_ Q2N2222 +q9 net-_q4-pad1_ net-_q7-pad1_ net-_q11-pad2_ Q2N2222 +q14 net-_q11-pad2_ net-_q11-pad2_ net-_q11-pad3_ Q2N2222 +* u2 net-_c1-pad2_ net-_q7-pad1_ zener +q5 net-_q1-pad3_ net-_q4-pad1_ net-_j1-pad1_ Q2N2222 +q11 net-_j1-pad1_ net-_q11-pad2_ net-_q11-pad3_ Q2N2222 +q12 net-_j1-pad1_ net-_q11-pad2_ net-_q12-pad3_ Q2N2222 +q17 net-_q12-pad3_ net-_q17-pad2_ net-_q15-pad3_ Q2N2222 +q19 net-_c1-pad1_ net-_q16-pad3_ net-_q18-pad3_ Q2N2222 +c1 net-_c1-pad1_ net-_c1-pad2_ 5p +r9 net-_q18-pad3_ net-_c1-pad2_ 2.2k +q20 net-_q20-pad1_ net-_q20-pad1_ net-_c1-pad2_ Q2N2222 +j1 net-_j1-pad1_ net-_c1-pad2_ net-_c1-pad2_ J2N3819 +q2 net-_q1-pad3_ net-_q1-pad1_ net-_q2-pad3_ Q2N2222 +q10 net-_q1-pad1_ net-_q10-pad2_ net-_q10-pad3_ Q2N2222 +q15 net-_q13-pad3_ net-_c1-pad1_ net-_q15-pad3_ Q2N2222 +q18 net-_q15-pad3_ net-_q16-pad2_ net-_q18-pad3_ Q2N2222 +r5 net-_q8-pad3_ net-_c1-pad1_ 4.4k +q6 net-_q6-pad1_ net-_q2-pad3_ net-_q6-pad3_ Q2N2222 +q13 net-_q1-pad1_ net-_q1-pad1_ net-_q13-pad3_ Q2N2222 +* u1 net-_q1-pad3_ net-_q6-pad1_ net-_q6-pad3_ net-_q10-pad3_ net-_q13-pad3_ net-_q16-pad2_ net-_q16-pad3_ net-_c1-pad2_ port +q8 net-_j1-pad1_ net-_q11-pad2_ net-_q8-pad3_ Q2N2222 +q16 net-_q13-pad3_ net-_q16-pad2_ net-_q16-pad3_ Q2N2222 +a1 net-_c1-pad2_ net-_q7-pad1_ u2 +* Schematic Name: zener, NgSpice Name: zener +.model u2 zener(v_breakdown=5.6 i_breakdown=2.0e-2 i_sat=1.0e-12 n_forward=1.0 limit_switch=FALSE ) +.tran 0e-00 0e-00 0e-00 + +* Control Statements +.control +run +print allv > plot_data_v.txt +print alli > plot_data_i.txt +.endc +.end diff --git a/library/SubcircuitLibrary/lm205/lm205.pro b/library/SubcircuitLibrary/lm205/lm205.pro new file mode 100644 index 00000000..e27a398b --- /dev/null +++ b/library/SubcircuitLibrary/lm205/lm205.pro @@ -0,0 +1,73 @@ +update=22/05/2015 07:44:53 +version=1 +last_client=kicad +[general] +version=1 +RootSch= +BoardNm= +[pcbnew] +version=1 +LastNetListRead= +UseCmpFile=1 +PadDrill=0.600000000000 +PadDrillOvalY=0.600000000000 +PadSizeH=1.500000000000 +PadSizeV=1.500000000000 +PcbTextSizeV=1.500000000000 +PcbTextSizeH=1.500000000000 +PcbTextThickness=0.300000000000 +ModuleTextSizeV=1.000000000000 +ModuleTextSizeH=1.000000000000 +ModuleTextSizeThickness=0.150000000000 +SolderMaskClearance=0.000000000000 +SolderMaskMinWidth=0.000000000000 +DrawSegmentWidth=0.200000000000 +BoardOutlineThickness=0.100000000000 +ModuleOutlineThickness=0.150000000000 +[cvpcb] +version=1 +NetIExt=net +[eeschema] +version=1 +LibDir= +[eeschema/libraries] +LibName1=adc-dac +LibName2=memory +LibName3=xilinx +LibName4=microcontrollers +LibName5=dsp +LibName6=microchip +LibName7=analog_switches +LibName8=motorola +LibName9=texas +LibName10=intel +LibName11=audio +LibName12=interface +LibName13=digital-audio +LibName14=philips +LibName15=display +LibName16=cypress +LibName17=siliconi +LibName18=opto +LibName19=atmel +LibName20=contrib +LibName21=power +LibName22=eSim_Plot +LibName23=transistors +LibName24=conn +LibName25=eSim_User +LibName26=regul +LibName27=74xx +LibName28=cmos4000 +LibName29=eSim_Analog +LibName30=eSim_Devices +LibName31=eSim_Digital +LibName32=eSim_Hybrid +LibName33=eSim_Miscellaneous +LibName34=eSim_Power +LibName35=eSim_Sources +LibName36=eSim_Subckt +LibName37=eSim_Nghdl +LibName38=eSim_Ngveri +LibName39=eSim_SKY130 +LibName40=eSim_SKY130_Subckts diff --git a/library/SubcircuitLibrary/lm205/lm205.sch b/library/SubcircuitLibrary/lm205/lm205.sch new file mode 100644 index 00000000..890f2922 --- /dev/null +++ b/library/SubcircuitLibrary/lm205/lm205.sch @@ -0,0 +1,755 @@ +EESchema Schematic File Version 2 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:power +LIBS:eSim_Plot +LIBS:transistors +LIBS:conn +LIBS:eSim_User +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:eSim_Analog +LIBS:eSim_Devices +LIBS:eSim_Digital +LIBS:eSim_Hybrid +LIBS:eSim_Miscellaneous +LIBS:eSim_Power +LIBS:eSim_Sources +LIBS:eSim_Subckt +LIBS:eSim_Nghdl +LIBS:eSim_Ngveri +LIBS:eSim_SKY130 +LIBS:eSim_SKY130_Subckts +LIBS:lm205-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11693 8268 +encoding utf-8 +Sheet 1 1 +Title "" +Date "" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +$Comp +L eSim_PNP Q1 +U 1 1 67AF370C +P 2500 1750 +F 0 "Q1" H 2400 1800 50 0000 R CNN +F 1 "eSim_PNP" H 2450 1900 50 0000 R CNN +F 2 "" H 2700 1850 29 0000 C CNN +F 3 "" H 2500 1750 60 0000 C CNN + 1 2500 1750 + 1 0 0 1 +$EndComp +$Comp +L eSim_PNP Q4 +U 1 1 67AF378C +P 2700 2300 +F 0 "Q4" H 2600 2350 50 0000 R CNN +F 1 "eSim_PNP" H 2650 2450 50 0000 R CNN +F 2 "" H 2900 2400 29 0000 C CNN +F 3 "" H 2700 2300 60 0000 C CNN + 1 2700 2300 + 1 0 0 1 +$EndComp +$Comp +L eSim_PNP Q7 +U 1 1 67AF37C4 +P 3100 2800 +F 0 "Q7" H 3000 2850 50 0000 R CNN +F 1 "eSim_PNP" H 3050 2950 50 0000 R CNN +F 2 "" H 3300 2900 29 0000 C CNN +F 3 "" H 3100 2800 60 0000 C CNN + 1 3100 2800 + 1 0 0 1 +$EndComp +$Comp +L resistor R1 +U 1 1 67AF3814 +P 2950 1300 +F 0 "R1" V 3000 1430 50 0000 C CNN +F 1 "2.8k" H 3000 1250 50 0000 C CNN +F 2 "" H 3000 1280 30 0000 C CNN +F 3 "" V 3000 1350 30 0000 C CNN + 1 2950 1300 + 1 0 0 -1 +$EndComp +$Comp +L resistor R2 +U 1 1 67AF387D +P 7750 1400 +F 0 "R2" H 7800 1530 50 0000 C CNN +F 1 "600" H 7800 1350 50 0000 C CNN +F 2 "" H 7800 1380 30 0000 C CNN +F 3 "" V 7800 1450 30 0000 C CNN + 1 7750 1400 + 0 1 1 0 +$EndComp +$Comp +L resistor R3 +U 1 1 67AF3995 +P 7250 2750 +F 0 "R3" V 7300 2880 50 0000 C CNN +F 1 "1.86k" H 7300 2700 50 0000 C CNN +F 2 "" H 7300 2730 30 0000 C CNN +F 3 "" V 7300 2800 30 0000 C CNN + 1 7250 2750 + 0 1 1 0 +$EndComp +$Comp +L resistor R4 +U 1 1 67AF3AD7 +P 7800 3250 +F 0 "R4" V 7850 3380 50 0000 C CNN +F 1 "1.32k" H 7850 3200 50 0000 C CNN +F 2 "" H 7850 3230 30 0000 C CNN +F 3 "" V 7850 3300 30 0000 C CNN + 1 7800 3250 + -1 0 0 1 +$EndComp +$Comp +L resistor R6 +U 1 1 67AF3B48 +P 3600 5050 +F 0 "R6" V 3650 5180 50 0000 C CNN +F 1 "3k" H 3650 5000 50 0000 C CNN +F 2 "" H 3650 5030 30 0000 C CNN +F 3 "" V 3650 5100 30 0000 C CNN + 1 3600 5050 + 0 1 1 0 +$EndComp +$Comp +L resistor R7 +U 1 1 67AF3C64 +P 3600 5700 +F 0 "R7" V 3650 5830 50 0000 C CNN +F 1 "6.8k" H 3650 5650 50 0000 C CNN +F 2 "" H 3650 5680 30 0000 C CNN +F 3 "" V 3650 5750 30 0000 C CNN + 1 3600 5700 + 0 1 1 0 +$EndComp +$Comp +L resistor R8 +U 1 1 67AF3D16 +P 3600 6300 +F 0 "R8" V 3650 6430 50 0000 C CNN +F 1 "3k" H 3650 6250 50 0000 C CNN +F 2 "" H 3650 6280 30 0000 C CNN +F 3 "" V 3650 6350 30 0000 C CNN + 1 3600 6300 + 0 1 1 0 +$EndComp +$Comp +L eSim_NPN Q3 +U 1 1 67AF3F37 +P 1300 2300 +F 0 "Q3" H 1200 2350 50 0000 R CNN +F 1 "eSim_NPN" H 1250 2450 50 0000 R CNN +F 2 "" H 1500 2400 29 0000 C CNN +F 3 "" H 1300 2300 60 0000 C CNN + 1 1300 2300 + -1 0 0 -1 +$EndComp +$Comp +L eSim_NPN Q9 +U 1 1 67AF3FF0 +P 3550 3600 +F 0 "Q9" H 3450 3650 50 0000 R CNN +F 1 "eSim_NPN" H 3500 3750 50 0000 R CNN +F 2 "" H 3750 3700 29 0000 C CNN +F 3 "" H 3550 3600 60 0000 C CNN + 1 3550 3600 + 1 0 0 -1 +$EndComp +$Comp +L eSim_NPN Q14 +U 1 1 67AF41F0 +P 3550 4650 +F 0 "Q14" H 3450 4700 50 0000 R CNN +F 1 "eSim_NPN" H 3500 4800 50 0000 R CNN +F 2 "" H 3750 4750 29 0000 C CNN +F 3 "" H 3550 4650 60 0000 C CNN + 1 3550 4650 + 1 0 0 -1 +$EndComp +$Comp +L zener U2 +U 1 1 67AF4A12 +P 3200 5500 +F 0 "U2" H 3150 5400 60 0000 C CNN +F 1 "zener" H 3200 5600 60 0000 C CNN +F 2 "" H 3250 5500 60 0000 C CNN +F 3 "" H 3250 5500 60 0000 C CNN + 1 3200 5500 + 0 -1 -1 0 +$EndComp +$Comp +L eSim_NPN Q5 +U 1 1 67AF4D97 +P 3900 2450 +F 0 "Q5" H 3800 2500 50 0000 R CNN +F 1 "eSim_NPN" H 3850 2600 50 0000 R CNN +F 2 "" H 4100 2550 29 0000 C CNN +F 3 "" H 3900 2450 60 0000 C CNN + 1 3900 2450 + 1 0 0 -1 +$EndComp +$Comp +L eSim_NPN Q11 +U 1 1 67AF5153 +P 4400 4150 +F 0 "Q11" H 4300 4200 50 0000 R CNN +F 1 "eSim_NPN" H 4350 4300 50 0000 R CNN +F 2 "" H 4600 4250 29 0000 C CNN +F 3 "" H 4400 4150 60 0000 C CNN + 1 4400 4150 + -1 0 0 -1 +$EndComp +$Comp +L eSim_NPN Q12 +U 1 1 67AF51CB +P 4900 4150 +F 0 "Q12" H 4800 4200 50 0000 R CNN +F 1 "eSim_NPN" H 4850 4300 50 0000 R CNN +F 2 "" H 5100 4250 29 0000 C CNN +F 3 "" H 4900 4150 60 0000 C CNN + 1 4900 4150 + 1 0 0 -1 +$EndComp +$Comp +L eSim_NPN Q17 +U 1 1 67AF5639 +P 4400 5450 +F 0 "Q17" H 4300 5500 50 0000 R CNN +F 1 "eSim_NPN" H 4350 5600 50 0000 R CNN +F 2 "" H 4600 5550 29 0000 C CNN +F 3 "" H 4400 5450 60 0000 C CNN + 1 4400 5450 + 1 0 0 -1 +$EndComp +$Comp +L eSim_NPN Q19 +U 1 1 67AF56BB +P 5600 5900 +F 0 "Q19" H 5500 5950 50 0000 R CNN +F 1 "eSim_NPN" H 5550 6050 50 0000 R CNN +F 2 "" H 5800 6000 29 0000 C CNN +F 3 "" H 5600 5900 60 0000 C CNN + 1 5600 5900 + 1 0 0 -1 +$EndComp +$Comp +L capacitor C1 +U 1 1 67AF5725 +P 4700 6400 +F 0 "C1" H 4725 6500 50 0000 L CNN +F 1 "5p" H 4725 6300 50 0000 L CNN +F 2 "" H 4738 6250 30 0000 C CNN +F 3 "" H 4700 6400 60 0000 C CNN + 1 4700 6400 + 1 0 0 -1 +$EndComp +$Comp +L resistor R9 +U 1 1 67AF57FA +P 6150 6400 +F 0 "R9" V 6200 6530 50 0000 C CNN +F 1 "2.2k" H 6200 6350 50 0000 C CNN +F 2 "" H 6200 6380 30 0000 C CNN +F 3 "" V 6200 6450 30 0000 C CNN + 1 6150 6400 + 0 1 1 0 +$EndComp +$Comp +L eSim_NPN Q20 +U 1 1 67AF5893 +P 3550 6900 +F 0 "Q20" H 3450 6950 50 0000 R CNN +F 1 "eSim_NPN" H 3500 7050 50 0000 R CNN +F 2 "" H 3750 7000 29 0000 C CNN +F 3 "" H 3550 6900 60 0000 C CNN + 1 3550 6900 + 1 0 0 -1 +$EndComp +$Comp +L jfet_n J1 +U 1 1 67AF5913 +P 2150 6550 +F 0 "J1" H 2050 6600 50 0000 R CNN +F 1 "jfet_n" H 2100 6700 50 0000 R CNN +F 2 "" H 2350 6650 29 0000 C CNN +F 3 "" H 2150 6550 60 0000 C CNN + 1 2150 6550 + -1 0 0 -1 +$EndComp +$Comp +L eSim_NPN Q2 +U 1 1 67AF5ADC +P 6750 2200 +F 0 "Q2" H 6650 2250 50 0000 R CNN +F 1 "eSim_NPN" H 6700 2350 50 0000 R CNN +F 2 "" H 6950 2300 29 0000 C CNN +F 3 "" H 6750 2200 60 0000 C CNN + 1 6750 2200 + 1 0 0 -1 +$EndComp +$Comp +L eSim_NPN Q10 +U 1 1 67AF5DBC +P 7300 3700 +F 0 "Q10" H 7200 3750 50 0000 R CNN +F 1 "eSim_NPN" H 7250 3850 50 0000 R CNN +F 2 "" H 7500 3800 29 0000 C CNN +F 3 "" H 7300 3700 60 0000 C CNN + 1 7300 3700 + 0 -1 1 0 +$EndComp +$Comp +L eSim_NPN Q15 +U 1 1 67AF5F81 +P 6400 4850 +F 0 "Q15" H 6300 4900 50 0000 R CNN +F 1 "eSim_NPN" H 6350 5000 50 0000 R CNN +F 2 "" H 6600 4950 29 0000 C CNN +F 3 "" H 6400 4850 60 0000 C CNN + 1 6400 4850 + 1 0 0 -1 +$EndComp +$Comp +L eSim_NPN Q18 +U 1 1 67AF60C3 +P 6600 5850 +F 0 "Q18" H 6500 5900 50 0000 R CNN +F 1 "eSim_NPN" H 6550 6000 50 0000 R CNN +F 2 "" H 6800 5950 29 0000 C CNN +F 3 "" H 6600 5850 60 0000 C CNN + 1 6600 5850 + -1 0 0 -1 +$EndComp +$Comp +L resistor R5 +U 1 1 67AF61E4 +P 5650 3900 +F 0 "R5" V 5700 4030 50 0000 C CNN +F 1 "4.4k" H 5700 3850 50 0000 C CNN +F 2 "" H 5700 3880 30 0000 C CNN +F 3 "" V 5700 3950 30 0000 C CNN + 1 5650 3900 + 0 1 1 0 +$EndComp +$Comp +L eSim_NPN Q6 +U 1 1 67AF63B3 +P 7700 2600 +F 0 "Q6" H 7600 2650 50 0000 R CNN +F 1 "eSim_NPN" H 7650 2750 50 0000 R CNN +F 2 "" H 7900 2700 29 0000 C CNN +F 3 "" H 7700 2600 60 0000 C CNN + 1 7700 2600 + 1 0 0 -1 +$EndComp +$Comp +L eSim_NPN Q13 +U 1 1 67AF65E7 +P 6600 4150 +F 0 "Q13" H 6500 4200 50 0000 R CNN +F 1 "eSim_NPN" H 6550 4300 50 0000 R CNN +F 2 "" H 6800 4250 29 0000 C CNN +F 3 "" H 6600 4150 60 0000 C CNN + 1 6600 4150 + -1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 1 1 67AF8AC5 +P 9400 950 +F 0 "U1" H 9450 1050 30 0000 C CNN +F 1 "PORT" H 9400 950 30 0000 C CNN +F 2 "" H 9400 950 60 0000 C CNN +F 3 "" H 9400 950 60 0000 C CNN + 1 9400 950 + -1 0 0 1 +$EndComp +$Comp +L PORT U1 +U 2 1 67AF8C11 +P 9550 1950 +F 0 "U1" H 9600 2050 30 0000 C CNN +F 1 "PORT" H 9550 1950 30 0000 C CNN +F 2 "" H 9550 1950 60 0000 C CNN +F 3 "" H 9550 1950 60 0000 C CNN + 2 9550 1950 + -1 0 0 1 +$EndComp +$Comp +L PORT U1 +U 3 1 67AF8CCA +P 9450 3300 +F 0 "U1" H 9500 3400 30 0000 C CNN +F 1 "PORT" H 9450 3300 30 0000 C CNN +F 2 "" H 9450 3300 60 0000 C CNN +F 3 "" H 9450 3300 60 0000 C CNN + 3 9450 3300 + -1 0 0 1 +$EndComp +$Comp +L PORT U1 +U 4 1 67AF8D9E +P 9600 4050 +F 0 "U1" H 9650 4150 30 0000 C CNN +F 1 "PORT" H 9600 4050 30 0000 C CNN +F 2 "" H 9600 4050 60 0000 C CNN +F 3 "" H 9600 4050 60 0000 C CNN + 4 9600 4050 + -1 0 0 1 +$EndComp +$Comp +L PORT U1 +U 5 1 67AF8E43 +P 9600 4350 +F 0 "U1" H 9650 4450 30 0000 C CNN +F 1 "PORT" H 9600 4350 30 0000 C CNN +F 2 "" H 9600 4350 60 0000 C CNN +F 3 "" H 9600 4350 60 0000 C CNN + 5 9600 4350 + -1 0 0 1 +$EndComp +$Comp +L PORT U1 +U 6 1 67AF8EEB +P 9650 5750 +F 0 "U1" H 9700 5850 30 0000 C CNN +F 1 "PORT" H 9650 5750 30 0000 C CNN +F 2 "" H 9650 5750 60 0000 C CNN +F 3 "" H 9650 5750 60 0000 C CNN + 6 9650 5750 + -1 0 0 1 +$EndComp +$Comp +L PORT U1 +U 7 1 67AF8FAC +P 9750 6150 +F 0 "U1" H 9800 6250 30 0000 C CNN +F 1 "PORT" H 9750 6150 30 0000 C CNN +F 2 "" H 9750 6150 60 0000 C CNN +F 3 "" H 9750 6150 60 0000 C CNN + 7 9750 6150 + -1 0 0 1 +$EndComp +$Comp +L PORT U1 +U 8 1 67AF9046 +P 9750 6650 +F 0 "U1" H 9800 6750 30 0000 C CNN +F 1 "PORT" H 9750 6650 30 0000 C CNN +F 2 "" H 9750 6650 60 0000 C CNN +F 3 "" H 9750 6650 60 0000 C CNN + 8 9750 6650 + -1 0 0 1 +$EndComp +Wire Wire Line + 2300 1750 2300 2300 +Wire Wire Line + 2300 2300 2500 2300 +Wire Wire Line + 2500 2300 2500 2800 +Wire Wire Line + 2500 2800 2900 2800 +Wire Wire Line + 2600 1550 2800 1550 +Wire Wire Line + 2800 1550 2800 2100 +Wire Wire Line + 2800 2100 3200 2100 +Wire Wire Line + 3200 2100 3200 2600 +Wire Wire Line + 4600 4150 4700 4150 +Wire Wire Line + 4300 3950 5000 3950 +Wire Wire Line + 1200 2100 2300 2100 +Connection ~ 2300 2100 +Wire Wire Line + 1900 2300 1500 2300 +Wire Wire Line + 1900 1250 1900 2300 +Connection ~ 1900 2100 +Wire Wire Line + 1900 1250 2850 1250 +Wire Wire Line + 2600 1950 6550 1950 +Wire Wire Line + 6550 1950 6550 2200 +Wire Wire Line + 3150 1250 3650 1250 +Wire Wire Line + 3650 1250 3650 3400 +Wire Wire Line + 2800 2500 3700 2500 +Connection ~ 3650 2500 +Wire Wire Line + 3700 2500 3700 2450 +Wire Wire Line + 3200 3000 3200 5200 +Wire Wire Line + 3350 3600 3200 3600 +Connection ~ 3200 3600 +Wire Wire Line + 5400 3400 3950 3400 +Wire Wire Line + 3950 3400 3950 4000 +Wire Wire Line + 4650 4150 4650 4450 +Wire Wire Line + 4650 4450 3900 4450 +Wire Wire Line + 3900 4450 3900 4300 +Wire Wire Line + 3900 4300 3350 4300 +Wire Wire Line + 3350 4300 3350 4650 +Connection ~ 4650 4150 +Wire Wire Line + 3650 3800 3650 4450 +Connection ~ 3650 4300 +Wire Wire Line + 4000 2650 4550 2650 +Wire Wire Line + 4550 2650 4550 3950 +Connection ~ 4550 3950 +Wire Wire Line + 3650 4850 3650 4950 +Wire Wire Line + 3650 5250 3650 5600 +Wire Wire Line + 3650 5900 3650 6200 +Wire Wire Line + 3650 6500 3650 6700 +Connection ~ 3650 6600 +Wire Wire Line + 5400 5900 3850 5900 +Wire Wire Line + 3850 5900 3850 6050 +Wire Wire Line + 3850 6050 3650 6050 +Connection ~ 3650 6050 +Wire Wire Line + 4200 5450 3650 5450 +Connection ~ 3650 5450 +Wire Wire Line + 5000 4350 5000 5250 +Wire Wire Line + 5000 5250 4500 5250 +Wire Wire Line + 3650 4900 4300 4900 +Wire Wire Line + 4300 4900 4300 4350 +Connection ~ 3650 4900 +Wire Wire Line + 5700 4100 5700 5700 +Wire Wire Line + 7300 2950 7300 3500 +Wire Wire Line + 7300 3300 7600 3300 +Connection ~ 7300 3300 +Wire Wire Line + 7300 2650 7300 2600 +Wire Wire Line + 6850 2600 7500 2600 +Wire Wire Line + 6850 2400 6850 2600 +Connection ~ 7300 2600 +Wire Wire Line + 7800 1600 7800 2400 +Wire Wire Line + 5700 5350 4700 5350 +Wire Wire Line + 4700 5350 4700 6250 +Connection ~ 5700 5350 +Wire Wire Line + 5700 6100 6500 6100 +Wire Wire Line + 6500 6100 6500 6050 +Wire Wire Line + 6200 6100 6200 6300 +Connection ~ 6200 6100 +Wire Wire Line + 9150 950 2700 950 +Wire Wire Line + 2700 950 2700 1550 +Connection ~ 2700 1550 +Wire Wire Line + 4000 2250 4000 950 +Connection ~ 4000 950 +Wire Wire Line + 1200 2500 1200 6350 +Wire Wire Line + 1200 6350 2050 6350 +Wire Wire Line + 3350 6900 3350 6600 +Wire Wire Line + 3350 6600 3650 6600 +Wire Wire Line + 3200 5700 3200 7250 +Wire Wire Line + 3200 7050 2050 7050 +Wire Wire Line + 2050 7050 2050 6750 +Wire Wire Line + 2350 6550 2550 6550 +Wire Wire Line + 2550 6550 2550 7050 +Connection ~ 2550 7050 +Wire Wire Line + 3200 7250 9500 7250 +Wire Wire Line + 9500 7250 9500 6650 +Connection ~ 3200 7050 +Wire Wire Line + 6200 6600 6200 7250 +Connection ~ 6200 7250 +Wire Wire Line + 4700 6550 4700 7250 +Connection ~ 4700 7250 +Wire Wire Line + 3650 7100 3650 7250 +Connection ~ 3650 7250 +Wire Wire Line + 4250 5900 4250 6950 +Wire Wire Line + 4250 6950 6450 6950 +Wire Wire Line + 6450 6950 6450 6200 +Wire Wire Line + 6450 6200 9500 6200 +Wire Wire Line + 9500 6200 9500 6150 +Connection ~ 4250 5900 +Wire Wire Line + 6800 5850 9400 5850 +Wire Wire Line + 9400 5850 9400 5750 +Wire Wire Line + 6500 3950 6500 1950 +Connection ~ 6500 1950 +Wire Wire Line + 7100 3800 6500 3800 +Connection ~ 6500 3800 +Wire Wire Line + 6800 4150 6900 4150 +Wire Wire Line + 6900 4150 6900 3800 +Connection ~ 6900 3800 +Wire Wire Line + 6500 4350 6500 4650 +Wire Wire Line + 6500 5050 6500 5650 +Wire Wire Line + 6200 4850 5700 4850 +Connection ~ 5700 4850 +Wire Wire Line + 4500 5650 6400 5650 +Wire Wire Line + 6400 5650 6400 5500 +Wire Wire Line + 6400 5500 6500 5500 +Connection ~ 6500 5500 +$Comp +L eSim_NPN Q8 +U 1 1 67AF62F0 +P 5600 3400 +F 0 "Q8" H 5500 3450 50 0000 R CNN +F 1 "eSim_NPN" H 5550 3550 50 0000 R CNN +F 2 "" H 5800 3500 29 0000 C CNN +F 3 "" H 5600 3400 60 0000 C CNN + 1 5600 3400 + 1 0 0 -1 +$EndComp +Wire Wire Line + 5700 3800 5700 3600 +Wire Wire Line + 5700 2850 5700 3200 +Wire Wire Line + 4100 2850 5700 2850 +Connection ~ 4550 2850 +Wire Wire Line + 4100 2850 4100 3150 +Wire Wire Line + 4100 3150 1200 3150 +Connection ~ 1200 3150 +Wire Wire Line + 7800 2800 7900 2800 +Wire Wire Line + 7900 2800 7900 3300 +Wire Wire Line + 7900 3300 9200 3300 +Wire Wire Line + 7800 1300 7800 950 +Connection ~ 7800 950 +Wire Wire Line + 6850 2000 6850 950 +Connection ~ 6850 950 +Wire Wire Line + 9300 1950 7800 1950 +Connection ~ 7800 1950 +Wire Wire Line + 7500 3800 9350 3800 +Wire Wire Line + 9350 3800 9350 4050 +Wire Wire Line + 6500 4500 9350 4500 +Wire Wire Line + 9350 4500 9350 4350 +Connection ~ 6500 4500 +$Comp +L eSim_NPN Q16 +U 1 1 67AFCCFC +P 8150 5000 +F 0 "Q16" H 8050 5050 50 0000 R CNN +F 1 "eSim_NPN" H 8100 5150 50 0000 R CNN +F 2 "" H 8350 5100 29 0000 C CNN +F 3 "" H 8150 5000 60 0000 C CNN + 1 8150 5000 + -1 0 0 -1 +$EndComp +Wire Wire Line + 8050 4800 8050 4500 +Connection ~ 8050 4500 +Wire Wire Line + 8350 5000 8700 5000 +Wire Wire Line + 8700 5000 8700 5850 +Connection ~ 8700 5850 +Wire Wire Line + 8050 5200 8050 6200 +Connection ~ 8050 6200 +Wire Wire Line + 3950 4000 3650 4000 +Connection ~ 3650 4000 +$EndSCHEMATC diff --git a/library/SubcircuitLibrary/lm205/lm205.sub b/library/SubcircuitLibrary/lm205/lm205.sub new file mode 100644 index 00000000..7279b688 --- /dev/null +++ b/library/SubcircuitLibrary/lm205/lm205.sub @@ -0,0 +1,44 @@ +* Subcircuit lm205 +.subckt lm205 net-_q1-pad3_ net-_q6-pad1_ net-_q6-pad3_ net-_q10-pad3_ net-_q13-pad3_ net-_q16-pad2_ net-_q16-pad3_ net-_c1-pad2_ +* d:\fossee\esim\library\subcircuitlibrary\lm205\lm205.cir +.include PNP.lib +.include NJF.lib +.include NPN.lib +q1 net-_q1-pad1_ net-_q1-pad2_ net-_q1-pad3_ Q2N2907A +q4 net-_q4-pad1_ net-_q1-pad2_ net-_q1-pad3_ Q2N2907A +q7 net-_q7-pad1_ net-_q1-pad2_ net-_q1-pad3_ Q2N2907A +r1 net-_q1-pad2_ net-_q4-pad1_ 2.8k +r2 net-_q1-pad3_ net-_q6-pad1_ 600 +r3 net-_q2-pad3_ net-_q10-pad2_ 1.86k +r4 net-_q6-pad3_ net-_q10-pad2_ 1.32k +r6 net-_q11-pad3_ net-_q17-pad2_ 3k +r7 net-_q17-pad2_ net-_q16-pad3_ 6.8k +r8 net-_q16-pad3_ net-_q20-pad1_ 3k +q3 net-_q1-pad2_ net-_q1-pad2_ net-_j1-pad1_ Q2N2222 +q9 net-_q4-pad1_ net-_q7-pad1_ net-_q11-pad2_ Q2N2222 +q14 net-_q11-pad2_ net-_q11-pad2_ net-_q11-pad3_ Q2N2222 +* u2 net-_c1-pad2_ net-_q7-pad1_ zener +q5 net-_q1-pad3_ net-_q4-pad1_ net-_j1-pad1_ Q2N2222 +q11 net-_j1-pad1_ net-_q11-pad2_ net-_q11-pad3_ Q2N2222 +q12 net-_j1-pad1_ net-_q11-pad2_ net-_q12-pad3_ Q2N2222 +q17 net-_q12-pad3_ net-_q17-pad2_ net-_q15-pad3_ Q2N2222 +q19 net-_c1-pad1_ net-_q16-pad3_ net-_q18-pad3_ Q2N2222 +c1 net-_c1-pad1_ net-_c1-pad2_ 5p +r9 net-_q18-pad3_ net-_c1-pad2_ 2.2k +q20 net-_q20-pad1_ net-_q20-pad1_ net-_c1-pad2_ Q2N2222 +j1 net-_j1-pad1_ net-_c1-pad2_ net-_c1-pad2_ J2N3819 +q2 net-_q1-pad3_ net-_q1-pad1_ net-_q2-pad3_ Q2N2222 +q10 net-_q1-pad1_ net-_q10-pad2_ net-_q10-pad3_ Q2N2222 +q15 net-_q13-pad3_ net-_c1-pad1_ net-_q15-pad3_ Q2N2222 +q18 net-_q15-pad3_ net-_q16-pad2_ net-_q18-pad3_ Q2N2222 +r5 net-_q8-pad3_ net-_c1-pad1_ 4.4k +q6 net-_q6-pad1_ net-_q2-pad3_ net-_q6-pad3_ Q2N2222 +q13 net-_q1-pad1_ net-_q1-pad1_ net-_q13-pad3_ Q2N2222 +q8 net-_j1-pad1_ net-_q11-pad2_ net-_q8-pad3_ Q2N2222 +q16 net-_q13-pad3_ net-_q16-pad2_ net-_q16-pad3_ Q2N2222 +a1 net-_c1-pad2_ net-_q7-pad1_ u2 +* Schematic Name: zener, NgSpice Name: zener +.model u2 zener(v_breakdown=5.6 i_breakdown=2.0e-2 i_sat=1.0e-12 n_forward=1.0 limit_switch=FALSE ) +* Control Statements + +.ends lm205 \ No newline at end of file diff --git a/library/SubcircuitLibrary/lm205/lm205_Previous_Values.xml b/library/SubcircuitLibrary/lm205/lm205_Previous_Values.xml new file mode 100644 index 00000000..b3182738 --- /dev/null +++ b/library/SubcircuitLibrary/lm205/lm205_Previous_Values.xml @@ -0,0 +1 @@ +zenerD:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.libD:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.libD:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.libD:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libD:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libD:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libD:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libD:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libD:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libD:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libD:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libD:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libD:\FOSSEE\eSim\library\deviceModelLibrary\JFET\NJF.libD:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libD:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libD:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libD:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libD:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libD:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libD:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libD:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libtruefalsefalseHzHz0Volts or AmperesVolts or AmperesVolts or AmperesVolts or AmperesVolts or AmperesVolts or Amperessecsecsec \ No newline at end of file -- cgit