From 7f60ce39c1e72fff19153772e66a628f9678e5c9 Mon Sep 17 00:00:00 2001
From: Aditya Minocha
Date: Sun, 25 Aug 2024 21:34:06 +0530
Subject: SN54HC148 IC - 8:3 Priority Encoder

---
 library/SubcircuitLibrary/SN54HC148/NOT.cir | 13 +++++++++++++
 1 file changed, 13 insertions(+)
 create mode 100644 library/SubcircuitLibrary/SN54HC148/NOT.cir

(limited to 'library/SubcircuitLibrary/SN54HC148/NOT.cir')

diff --git a/library/SubcircuitLibrary/SN54HC148/NOT.cir b/library/SubcircuitLibrary/SN54HC148/NOT.cir
new file mode 100644
index 00000000..074b85b3
--- /dev/null
+++ b/library/SubcircuitLibrary/SN54HC148/NOT.cir
@@ -0,0 +1,13 @@
+* C:\FOSSEE\eSim\library\SubcircuitLibrary\NOT\NOT.cir
+
+* EESchema Netlist Version 1.1 (Spice format) creation date: 05/28/24 22:41:58
+
+* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N
+* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0
+
+* Sheet Name: /
+M1  Net-_M1-Pad1_ Net-_M1-Pad2_ Net-_M1-Pad3_ Net-_M1-Pad3_ mosfet_n		
+M2  Net-_M2-Pad1_ Net-_M1-Pad2_ Net-_M1-Pad1_ Net-_M2-Pad1_ mosfet_p		
+U1  Net-_M1-Pad2_ Net-_M1-Pad1_ Net-_M2-Pad1_ Net-_M1-Pad3_ PORT		
+
+.end
-- 
cgit