From 7b98810d458d8cf7a68ff62831ab8ea1cc5846f8 Mon Sep 17 00:00:00 2001
From: Aditya Minocha
Date: Sun, 25 Aug 2024 21:58:26 +0530
Subject: Logic Gates

---
 library/SubcircuitLibrary/Logic_Gates/XOR.cir.out | 26 +++++++++++++++++++++++
 1 file changed, 26 insertions(+)
 create mode 100644 library/SubcircuitLibrary/Logic_Gates/XOR.cir.out

(limited to 'library/SubcircuitLibrary/Logic_Gates/XOR.cir.out')

diff --git a/library/SubcircuitLibrary/Logic_Gates/XOR.cir.out b/library/SubcircuitLibrary/Logic_Gates/XOR.cir.out
new file mode 100644
index 00000000..dc618762
--- /dev/null
+++ b/library/SubcircuitLibrary/Logic_Gates/XOR.cir.out
@@ -0,0 +1,26 @@
+* c:\fossee\esim\library\subcircuitlibrary\xor\xor.cir
+
+.include NOT.sub
+.include NMOS-180nm.lib
+.include PMOS-180nm.lib
+m2 net-_m1-pad3_ net-_m2-pad2_ gnd gnd CMOSN W=100u L=100u M=1
+m8 net-_m7-pad3_ net-_m6-pad2_ gnd gnd CMOSN W=100u L=100u M=1
+m7 net-_m1-pad1_ net-_m4-pad2_ net-_m7-pad3_ net-_m7-pad3_ CMOSN W=100u L=100u M=1
+m1 net-_m1-pad1_ net-_m1-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1
+m4 net-_m3-pad3_ net-_m4-pad2_ net-_m1-pad1_ net-_m3-pad3_ CMOSP W=100u L=100u M=1
+m6 net-_m3-pad3_ net-_m6-pad2_ net-_m1-pad1_ net-_m3-pad3_ CMOSP W=100u L=100u M=1
+m3 net-_m3-pad1_ net-_m1-pad2_ net-_m3-pad3_ net-_m3-pad1_ CMOSP W=100u L=100u M=1
+m5 net-_m3-pad1_ net-_m2-pad2_ net-_m3-pad3_ net-_m3-pad1_ CMOSP W=100u L=100u M=1
+x1 net-_m1-pad2_ net-_m4-pad2_ NOT
+x2 net-_m2-pad2_ net-_m6-pad2_ NOT
+v1 net-_m3-pad1_ gnd  dc 1.8
+* u1  net-_m1-pad2_ net-_m2-pad2_ net-_m1-pad1_ port
+.tran 0e-00 0e-00 0e-00
+
+* Control Statements 
+.control
+run
+print allv > plot_data_v.txt
+print alli > plot_data_i.txt
+.endc
+.end
-- 
cgit