From f3276cef09f0ecb981e380adc268747b0ff2ac73 Mon Sep 17 00:00:00 2001
From: Eyantra698Sumanto
Date: Mon, 24 Jul 2023 14:06:16 +0530
Subject: INA823 is an Instrumentation Amplifier IC

---
 .../IC_INA823/IC_INA823-cache.lib                  |  83 +++
 library/SubcircuitLibrary/IC_INA823/IC_INA823.cir  |  20 +
 .../SubcircuitLibrary/IC_INA823/IC_INA823.cir.out  |  22 +
 library/SubcircuitLibrary/IC_INA823/IC_INA823.pro  |  71 +++
 library/SubcircuitLibrary/IC_INA823/IC_INA823.sch  | 347 ++++++++++
 library/SubcircuitLibrary/IC_INA823/IC_INA823.sub  |  16 +
 .../IC_INA823/IC_INA823_Previous_Values.xml        |   1 +
 library/SubcircuitLibrary/IC_INA823/NPN.lib        |   4 +
 library/SubcircuitLibrary/IC_INA823/PNP.lib        |   4 +
 library/SubcircuitLibrary/IC_INA823/README.md      |  16 +
 library/SubcircuitLibrary/IC_INA823/analysis       |   1 +
 .../SubcircuitLibrary/IC_INA823/lm_741-cache.lib   | 119 ++++
 .../SubcircuitLibrary/IC_INA823/lm_741-rescue.lib  |  42 ++
 library/SubcircuitLibrary/IC_INA823/lm_741.cir     |  43 ++
 library/SubcircuitLibrary/IC_INA823/lm_741.cir.out |  46 ++
 library/SubcircuitLibrary/IC_INA823/lm_741.pro     |  45 ++
 library/SubcircuitLibrary/IC_INA823/lm_741.sch     | 697 +++++++++++++++++++++
 library/SubcircuitLibrary/IC_INA823/lm_741.sub     |  40 ++
 .../IC_INA823/lm_741_Previous_Values.xml           |   1 +
 library/SubcircuitLibrary/IC_INA823/npn_1.lib      |  29 +
 library/SubcircuitLibrary/IC_INA823/pnp_1.lib      |  29 +
 21 files changed, 1676 insertions(+)
 create mode 100644 library/SubcircuitLibrary/IC_INA823/IC_INA823-cache.lib
 create mode 100644 library/SubcircuitLibrary/IC_INA823/IC_INA823.cir
 create mode 100644 library/SubcircuitLibrary/IC_INA823/IC_INA823.cir.out
 create mode 100644 library/SubcircuitLibrary/IC_INA823/IC_INA823.pro
 create mode 100644 library/SubcircuitLibrary/IC_INA823/IC_INA823.sch
 create mode 100644 library/SubcircuitLibrary/IC_INA823/IC_INA823.sub
 create mode 100644 library/SubcircuitLibrary/IC_INA823/IC_INA823_Previous_Values.xml
 create mode 100644 library/SubcircuitLibrary/IC_INA823/NPN.lib
 create mode 100644 library/SubcircuitLibrary/IC_INA823/PNP.lib
 create mode 100644 library/SubcircuitLibrary/IC_INA823/README.md
 create mode 100644 library/SubcircuitLibrary/IC_INA823/analysis
 create mode 100644 library/SubcircuitLibrary/IC_INA823/lm_741-cache.lib
 create mode 100644 library/SubcircuitLibrary/IC_INA823/lm_741-rescue.lib
 create mode 100644 library/SubcircuitLibrary/IC_INA823/lm_741.cir
 create mode 100644 library/SubcircuitLibrary/IC_INA823/lm_741.cir.out
 create mode 100644 library/SubcircuitLibrary/IC_INA823/lm_741.pro
 create mode 100644 library/SubcircuitLibrary/IC_INA823/lm_741.sch
 create mode 100644 library/SubcircuitLibrary/IC_INA823/lm_741.sub
 create mode 100644 library/SubcircuitLibrary/IC_INA823/lm_741_Previous_Values.xml
 create mode 100644 library/SubcircuitLibrary/IC_INA823/npn_1.lib
 create mode 100644 library/SubcircuitLibrary/IC_INA823/pnp_1.lib

(limited to 'library/SubcircuitLibrary/IC_INA823')

diff --git a/library/SubcircuitLibrary/IC_INA823/IC_INA823-cache.lib b/library/SubcircuitLibrary/IC_INA823/IC_INA823-cache.lib
new file mode 100644
index 00000000..752774e2
--- /dev/null
+++ b/library/SubcircuitLibrary/IC_INA823/IC_INA823-cache.lib
@@ -0,0 +1,83 @@
+EESchema-LIBRARY Version 2.3
+#encoding utf-8
+#
+# PORT
+#
+DEF PORT U 0 40 Y Y 26 F N
+F0 "U" 50 100 30 H V C CNN
+F1 "PORT" 0 0 30 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0
+A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50
+S -100 50 100 -50 0 1 0 N
+X ~ 1 250 0 100 L 30 30 1 1 B
+X ~ 2 250 0 100 L 30 30 2 1 B
+X ~ 3 250 0 100 L 30 30 3 1 B
+X ~ 4 250 0 100 L 30 30 4 1 B
+X ~ 5 250 0 100 L 30 30 5 1 B
+X ~ 6 250 0 100 L 30 30 6 1 B
+X ~ 7 250 0 100 L 30 30 7 1 B
+X ~ 8 250 0 100 L 30 30 8 1 B
+X ~ 9 250 0 100 L 30 30 9 1 B
+X ~ 10 250 0 100 L 30 30 10 1 B
+X ~ 11 250 0 100 L 30 30 11 1 B
+X ~ 12 250 0 100 L 30 30 12 1 B
+X ~ 13 250 0 100 L 30 30 13 1 B
+X ~ 14 250 0 100 L 30 30 14 1 B
+X ~ 15 250 0 100 L 30 30 15 1 B
+X ~ 16 250 0 100 L 30 30 16 1 B
+X ~ 17 250 0 100 L 30 30 17 1 B
+X ~ 18 250 0 100 L 30 30 18 1 B
+X ~ 19 250 0 100 L 30 30 19 1 B
+X ~ 20 250 0 100 L 30 30 20 1 B
+X ~ 21 250 0 100 L 30 30 21 1 B
+X ~ 22 250 0 100 L 30 30 22 1 B
+X ~ 23 250 0 100 L 30 30 23 1 B
+X ~ 24 250 0 100 L 30 30 24 1 B
+X ~ 25 250 0 100 L 30 30 25 1 B
+X ~ 26 250 0 100 L 30 30 26 1 B
+ENDDRAW
+ENDDEF
+#
+# eSim_R
+#
+DEF eSim_R R 0 0 N Y 1 F N
+F0 "R" 50 130 50 H V C CNN
+F1 "eSim_R" 50 -50 50 H V C CNN
+F2 "" 50 -20 30 H V C CNN
+F3 "" 50 50 30 V V C CNN
+ALIAS resistor
+$FPLIST
+ R_*
+ Resistor_*
+$ENDFPLIST
+DRAW
+S 150 10 -50 90 0 1 10 N
+X ~ 1 -100 50 50 R 60 60 1 1 P
+X ~ 2 200 50 50 L 60 60 1 1 P
+ENDDRAW
+ENDDEF
+#
+# lm_741
+#
+DEF lm_741 X 0 40 Y Y 1 F N
+F0 "X" -200 0 60 H V C CNN
+F1 "lm_741" -100 -250 60 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+P 4 0 1 0 -350 350 350 0 -350 -350 -350 350 N
+X off_null 1 -50 400 200 D 50 38 1 1 I
+X inv 2 -550 150 200 R 50 38 1 1 I
+X non_inv 3 -550 -100 200 R 50 38 1 1 I
+X v_neg 4 -150 -450 200 U 50 38 1 1 I
+X off_null 5 50 350 200 D 50 38 1 1 I
+X out 6 550 0 200 L 50 38 1 1 O
+X v_pos 7 -150 450 200 D 50 38 1 1 I
+X NC 8 150 -300 200 U 50 38 1 1 N
+ENDDRAW
+ENDDEF
+#
+#End Library
diff --git a/library/SubcircuitLibrary/IC_INA823/IC_INA823.cir b/library/SubcircuitLibrary/IC_INA823/IC_INA823.cir
new file mode 100644
index 00000000..1d8856ac
--- /dev/null
+++ b/library/SubcircuitLibrary/IC_INA823/IC_INA823.cir
@@ -0,0 +1,20 @@
+* C:\FOSSEE\eSim\library\SubcircuitLibrary\IC_INA823\IC_INA823.cir
+
+* EESchema Netlist Version 1.1 (Spice format) creation date: 02/19/23 23:14:06
+
+* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N
+* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0
+
+* Sheet Name: /
+X2  ? Net-_R1-Pad1_ Net-_U1-Pad1_ V- ? Net-_R1-Pad2_ V+ ? lm_741		
+X1  ? Net-_R2-Pad1_ Net-_U1-Pad4_ V- ? Net-_R2-Pad2_ V+ ? lm_741		
+X3  ? Net-_R4-Pad2_ Net-_R3-Pad2_ V- ? Net-_R6-Pad2_ V+ ? lm_741		
+R2  Net-_R2-Pad1_ Net-_R2-Pad2_ 50k		
+R1  Net-_R1-Pad1_ Net-_R1-Pad2_ 50k		
+R4  Net-_R1-Pad2_ Net-_R4-Pad2_ 50k		
+R3  Net-_R2-Pad2_ Net-_R3-Pad2_ 50k		
+R6  Net-_R4-Pad2_ Net-_R6-Pad2_ 50k		
+R5  Net-_R3-Pad2_ Net-_R5-Pad2_ 50k		
+U1  Net-_U1-Pad1_ Net-_R1-Pad1_ Net-_R2-Pad1_ Net-_U1-Pad4_ V+ Net-_R5-Pad2_ V- Net-_R6-Pad2_ PORT		
+
+.end
diff --git a/library/SubcircuitLibrary/IC_INA823/IC_INA823.cir.out b/library/SubcircuitLibrary/IC_INA823/IC_INA823.cir.out
new file mode 100644
index 00000000..bccc31c2
--- /dev/null
+++ b/library/SubcircuitLibrary/IC_INA823/IC_INA823.cir.out
@@ -0,0 +1,22 @@
+* c:\fossee\esim\library\subcircuitlibrary\ic_ina823\ic_ina823.cir
+
+.include lm_741.sub
+x2 ? net-_r1-pad1_ net-_u1-pad1_ v- ? net-_r1-pad2_ v+ ? lm_741
+x1 ? net-_r2-pad1_ net-_u1-pad4_ v- ? net-_r2-pad2_ v+ ? lm_741
+x3 ? net-_r4-pad2_ net-_r3-pad2_ v- ? net-_r6-pad2_ v+ ? lm_741
+r2  net-_r2-pad1_ net-_r2-pad2_ 50k
+r1  net-_r1-pad1_ net-_r1-pad2_ 50k
+r4  net-_r1-pad2_ net-_r4-pad2_ 50k
+r3  net-_r2-pad2_ net-_r3-pad2_ 50k
+r6  net-_r4-pad2_ net-_r6-pad2_ 50k
+r5  net-_r3-pad2_ net-_r5-pad2_ 50k
+* u1  net-_u1-pad1_ net-_r1-pad1_ net-_r2-pad1_ net-_u1-pad4_ v+ net-_r5-pad2_ v- net-_r6-pad2_ port
+.tran 0e-00 0e-00 0e-00
+
+* Control Statements 
+.control
+run
+print allv > plot_data_v.txt
+print alli > plot_data_i.txt
+.endc
+.end
diff --git a/library/SubcircuitLibrary/IC_INA823/IC_INA823.pro b/library/SubcircuitLibrary/IC_INA823/IC_INA823.pro
new file mode 100644
index 00000000..22f2d439
--- /dev/null
+++ b/library/SubcircuitLibrary/IC_INA823/IC_INA823.pro
@@ -0,0 +1,71 @@
+update=22/05/2015 07:44:53
+version=1
+last_client=kicad
+[general]
+version=1
+RootSch=
+BoardNm=
+[pcbnew]
+version=1
+LastNetListRead=
+UseCmpFile=1
+PadDrill=0.600000000000
+PadDrillOvalY=0.600000000000
+PadSizeH=1.500000000000
+PadSizeV=1.500000000000
+PcbTextSizeV=1.500000000000
+PcbTextSizeH=1.500000000000
+PcbTextThickness=0.300000000000
+ModuleTextSizeV=1.000000000000
+ModuleTextSizeH=1.000000000000
+ModuleTextSizeThickness=0.150000000000
+SolderMaskClearance=0.000000000000
+SolderMaskMinWidth=0.000000000000
+DrawSegmentWidth=0.200000000000
+BoardOutlineThickness=0.100000000000
+ModuleOutlineThickness=0.150000000000
+[cvpcb]
+version=1
+NetIExt=net
+[eeschema]
+version=1
+LibDir=
+[eeschema/libraries]
+LibName1=adc-dac
+LibName2=memory
+LibName3=xilinx
+LibName4=microcontrollers
+LibName5=dsp
+LibName6=microchip
+LibName7=analog_switches
+LibName8=motorola
+LibName9=texas
+LibName10=intel
+LibName11=audio
+LibName12=interface
+LibName13=digital-audio
+LibName14=philips
+LibName15=display
+LibName16=cypress
+LibName17=siliconi
+LibName18=opto
+LibName19=atmel
+LibName20=contrib
+LibName21=power
+LibName22=eSim_Plot
+LibName23=transistors
+LibName24=conn
+LibName25=eSim_User
+LibName26=regul
+LibName27=74xx
+LibName28=cmos4000
+LibName29=eSim_Analog
+LibName30=eSim_Devices
+LibName31=eSim_Digital
+LibName32=eSim_Hybrid
+LibName33=eSim_Miscellaneous
+LibName34=eSim_Power
+LibName35=eSim_Sources
+LibName36=eSim_Subckt
+LibName37=eSim_Nghdl
+LibName38=eSim_Ngveri
diff --git a/library/SubcircuitLibrary/IC_INA823/IC_INA823.sch b/library/SubcircuitLibrary/IC_INA823/IC_INA823.sch
new file mode 100644
index 00000000..b1e3e9c5
--- /dev/null
+++ b/library/SubcircuitLibrary/IC_INA823/IC_INA823.sch
@@ -0,0 +1,347 @@
+EESchema Schematic File Version 2
+LIBS:adc-dac
+LIBS:memory
+LIBS:xilinx
+LIBS:microcontrollers
+LIBS:dsp
+LIBS:microchip
+LIBS:analog_switches
+LIBS:motorola
+LIBS:texas
+LIBS:intel
+LIBS:audio
+LIBS:interface
+LIBS:digital-audio
+LIBS:philips
+LIBS:display
+LIBS:cypress
+LIBS:siliconi
+LIBS:opto
+LIBS:atmel
+LIBS:contrib
+LIBS:power
+LIBS:eSim_Plot
+LIBS:transistors
+LIBS:conn
+LIBS:eSim_User
+LIBS:regul
+LIBS:74xx
+LIBS:cmos4000
+LIBS:eSim_Analog
+LIBS:eSim_Devices
+LIBS:eSim_Digital
+LIBS:eSim_Hybrid
+LIBS:eSim_Miscellaneous
+LIBS:eSim_Power
+LIBS:eSim_Sources
+LIBS:eSim_Subckt
+LIBS:eSim_Nghdl
+LIBS:eSim_Ngveri
+LIBS:IC_INA823-cache
+EELAYER 25 0
+EELAYER END
+$Descr A4 11693 8268
+encoding utf-8
+Sheet 1 1
+Title ""
+Date ""
+Rev ""
+Comp ""
+Comment1 ""
+Comment2 ""
+Comment3 ""
+Comment4 ""
+$EndDescr
+$Comp
+L lm_741 X2
+U 1 1 63E9DF0B
+P 3150 1850
+F 0 "X2" H 2950 1850 60  0000 C CNN
+F 1 "lm_741" H 3050 1600 60  0000 C CNN
+F 2 "" H 3150 1850 60  0000 C CNN
+F 3 "" H 3150 1850 60  0000 C CNN
+	1    3150 1850
+	1    0    0    1   
+$EndComp
+$Comp
+L lm_741 X1
+U 1 1 63E9DF38
+P 3100 3750
+F 0 "X1" H 2900 3750 60  0000 C CNN
+F 1 "lm_741" H 3000 3500 60  0000 C CNN
+F 2 "" H 3100 3750 60  0000 C CNN
+F 3 "" H 3100 3750 60  0000 C CNN
+	1    3100 3750
+	1    0    0    -1  
+$EndComp
+$Comp
+L lm_741 X3
+U 1 1 63E9F328
+P 4850 2800
+F 0 "X3" H 4650 2800 60  0000 C CNN
+F 1 "lm_741" H 4750 2550 60  0000 C CNN
+F 2 "" H 4850 2800 60  0000 C CNN
+F 3 "" H 4850 2800 60  0000 C CNN
+	1    4850 2800
+	1    0    0    -1  
+$EndComp
+$Comp
+L resistor R2
+U 1 1 63E9F389
+P 3000 3050
+F 0 "R2" H 3050 3180 50  0000 C CNN
+F 1 "50k" H 3050 3000 50  0000 C CNN
+F 2 "" H 3050 3030 30  0000 C CNN
+F 3 "" V 3050 3100 30  0000 C CNN
+	1    3000 3050
+	1    0    0    -1  
+$EndComp
+$Comp
+L resistor R1
+U 1 1 63E9F3B0
+P 3000 2650
+F 0 "R1" H 3050 2780 50  0000 C CNN
+F 1 "50k" H 3050 2600 50  0000 C CNN
+F 2 "" H 3050 2630 30  0000 C CNN
+F 3 "" V 3050 2700 30  0000 C CNN
+	1    3000 2650
+	1    0    0    -1  
+$EndComp
+Wire Wire Line
+	2050 2000 2600 2000
+Wire Wire Line
+	2550 2000 2550 2600
+Wire Wire Line
+	2550 2600 2900 2600
+Wire Wire Line
+	3200 2600 3750 2600
+Wire Wire Line
+	3750 2600 3750 1850
+Wire Wire Line
+	3700 1850 3950 1850
+Wire Wire Line
+	2900 3000 2500 3000
+Wire Wire Line
+	2500 3000 2500 3600
+Wire Wire Line
+	2050 3600 2550 3600
+Wire Wire Line
+	3200 3000 3650 3000
+Wire Wire Line
+	3650 3000 3650 3750
+$Comp
+L resistor R4
+U 1 1 63E9F453
+P 4050 1900
+F 0 "R4" H 4100 2030 50  0000 C CNN
+F 1 "50k" H 4100 1850 50  0000 C CNN
+F 2 "" H 4100 1880 30  0000 C CNN
+F 3 "" V 4100 1950 30  0000 C CNN
+	1    4050 1900
+	1    0    0    -1  
+$EndComp
+$Comp
+L resistor R3
+U 1 1 63E9F476
+P 3950 3800
+F 0 "R3" H 4000 3930 50  0000 C CNN
+F 1 "50k" H 4000 3750 50  0000 C CNN
+F 2 "" H 4000 3780 30  0000 C CNN
+F 3 "" V 4000 3850 30  0000 C CNN
+	1    3950 3800
+	1    0    0    -1  
+$EndComp
+$Comp
+L resistor R6
+U 1 1 63E9F4AD
+P 4750 1900
+F 0 "R6" H 4800 2030 50  0000 C CNN
+F 1 "50k" H 4800 1850 50  0000 C CNN
+F 2 "" H 4800 1880 30  0000 C CNN
+F 3 "" V 4800 1950 30  0000 C CNN
+	1    4750 1900
+	1    0    0    -1  
+$EndComp
+$Comp
+L resistor R5
+U 1 1 63E9F4D4
+P 4650 3800
+F 0 "R5" H 4700 3930 50  0000 C CNN
+F 1 "50k" H 4700 3750 50  0000 C CNN
+F 2 "" H 4700 3780 30  0000 C CNN
+F 3 "" V 4700 3850 30  0000 C CNN
+	1    4650 3800
+	1    0    0    -1  
+$EndComp
+Wire Wire Line
+	4300 2650 4300 1850
+Wire Wire Line
+	4250 1850 4650 1850
+Wire Wire Line
+	3650 3750 3850 3750
+Connection ~ 3750 1850
+Connection ~ 4300 1850
+Wire Wire Line
+	4550 3750 4150 3750
+Wire Wire Line
+	4300 2900 4300 3750
+Connection ~ 4300 3750
+Wire Wire Line
+	4950 1850 5400 1850
+Wire Wire Line
+	5400 1850 5400 2800
+$Comp
+L PORT U1
+U 3 1 63E9F7D3
+P 1800 3600
+F 0 "U1" H 1850 3700 30  0000 C CNN
+F 1 "PORT" H 1800 3600 30  0000 C CNN
+F 2 "" H 1800 3600 60  0000 C CNN
+F 3 "" H 1800 3600 60  0000 C CNN
+	3    1800 3600
+	1    0    0    -1  
+$EndComp
+$Comp
+L PORT U1
+U 4 1 63E9F7FE
+P 1800 3900
+F 0 "U1" H 1850 4000 30  0000 C CNN
+F 1 "PORT" H 1800 3900 30  0000 C CNN
+F 2 "" H 1800 3900 60  0000 C CNN
+F 3 "" H 1800 3900 60  0000 C CNN
+	4    1800 3900
+	1    0    0    -1  
+$EndComp
+$Comp
+L PORT U1
+U 2 1 63E9FB83
+P 1800 2000
+F 0 "U1" H 1850 2100 30  0000 C CNN
+F 1 "PORT" H 1800 2000 30  0000 C CNN
+F 2 "" H 1800 2000 60  0000 C CNN
+F 3 "" H 1800 2000 60  0000 C CNN
+	2    1800 2000
+	1    0    0    -1  
+$EndComp
+$Comp
+L PORT U1
+U 1 1 63E9FBC2
+P 1800 1750
+F 0 "U1" H 1850 1850 30  0000 C CNN
+F 1 "PORT" H 1800 1750 30  0000 C CNN
+F 2 "" H 1800 1750 60  0000 C CNN
+F 3 "" H 1800 1750 60  0000 C CNN
+	1    1800 1750
+	1    0    0    -1  
+$EndComp
+Wire Wire Line
+	2050 1750 2600 1750
+Connection ~ 2550 2000
+Connection ~ 2500 3600
+Wire Wire Line
+	2050 3900 2550 3900
+Wire Wire Line
+	2550 3900 2550 3850
+$Comp
+L PORT U1
+U 5 1 63E9FD93
+P 3950 1450
+F 0 "U1" H 4000 1550 30  0000 C CNN
+F 1 "PORT" H 3950 1450 30  0000 C CNN
+F 2 "" H 3950 1450 60  0000 C CNN
+F 3 "" H 3950 1450 60  0000 C CNN
+	5    3950 1450
+	1    0    0    -1  
+$EndComp
+$Comp
+L PORT U1
+U 7 1 63E9FDEE
+P 5250 1450
+F 0 "U1" H 5300 1550 30  0000 C CNN
+F 1 "PORT" H 5250 1450 30  0000 C CNN
+F 2 "" H 5250 1450 60  0000 C CNN
+F 3 "" H 5250 1450 60  0000 C CNN
+	7    5250 1450
+	-1   0    0    1   
+$EndComp
+$Comp
+L PORT U1
+U 6 1 63E9FF0C
+P 5500 3750
+F 0 "U1" H 5550 3850 30  0000 C CNN
+F 1 "PORT" H 5500 3750 30  0000 C CNN
+F 2 "" H 5500 3750 60  0000 C CNN
+F 3 "" H 5500 3750 60  0000 C CNN
+	6    5500 3750
+	-1   0    0    1   
+$EndComp
+$Comp
+L PORT U1
+U 8 1 63E9FF8B
+P 5950 2800
+F 0 "U1" H 6000 2900 30  0000 C CNN
+F 1 "PORT" H 5950 2800 30  0000 C CNN
+F 2 "" H 5950 2800 60  0000 C CNN
+F 3 "" H 5950 2800 60  0000 C CNN
+	8    5950 2800
+	-1   0    0    1   
+$EndComp
+Wire Wire Line
+	4850 3750 5250 3750
+Wire Wire Line
+	5400 2800 5700 2800
+Text GLabel 4200 1200 0    60   Input ~ 0
+V+
+Text GLabel 4950 1200 2    60   Input ~ 0
+V-
+Wire Wire Line
+	4200 1200 4350 1200
+Wire Wire Line
+	4350 1200 4350 1450
+Connection ~ 4350 1450
+Wire Wire Line
+	4950 1200 4850 1200
+Wire Wire Line
+	4850 1200 4850 1450
+Connection ~ 4850 1450
+Text GLabel 3300 3250 2    60   Input ~ 0
+V+
+Text GLabel 3300 2450 2    60   Input ~ 0
+V+
+Text GLabel 4950 2200 2    60   Input ~ 0
+V+
+Text GLabel 3300 4350 2    60   Input ~ 0
+V-
+Text GLabel 3200 1150 2    60   Input ~ 0
+V-
+Text GLabel 4950 3400 2    60   Input ~ 0
+V-
+Wire Wire Line
+	3200 1150 3000 1150
+Wire Wire Line
+	3000 1150 3000 1400
+Wire Wire Line
+	3300 2450 3000 2450
+Wire Wire Line
+	3000 2450 3000 2300
+Wire Wire Line
+	3300 3250 2950 3250
+Wire Wire Line
+	2950 3250 2950 3300
+Wire Wire Line
+	4950 2200 4700 2200
+Wire Wire Line
+	4700 2200 4700 2350
+Wire Wire Line
+	4950 3400 4700 3400
+Wire Wire Line
+	4700 3400 4700 3250
+Wire Wire Line
+	3300 4350 2950 4350
+Wire Wire Line
+	2950 4350 2950 4200
+Wire Wire Line
+	4350 1450 4200 1450
+Wire Wire Line
+	4850 1450 5000 1450
+$EndSCHEMATC
diff --git a/library/SubcircuitLibrary/IC_INA823/IC_INA823.sub b/library/SubcircuitLibrary/IC_INA823/IC_INA823.sub
new file mode 100644
index 00000000..51efa4c5
--- /dev/null
+++ b/library/SubcircuitLibrary/IC_INA823/IC_INA823.sub
@@ -0,0 +1,16 @@
+* Subcircuit IC_INA823
+.subckt IC_INA823 net-_u1-pad1_ net-_r1-pad1_ net-_r2-pad1_ net-_u1-pad4_ v+ net-_r5-pad2_ v- net-_r6-pad2_ 
+* c:\fossee\esim\library\subcircuitlibrary\ic_ina823\ic_ina823.cir
+.include lm_741.sub
+x2 ? net-_r1-pad1_ net-_u1-pad1_ v- ? net-_r1-pad2_ v+ ? lm_741
+x1 ? net-_r2-pad1_ net-_u1-pad4_ v- ? net-_r2-pad2_ v+ ? lm_741
+x3 ? net-_r4-pad2_ net-_r3-pad2_ v- ? net-_r6-pad2_ v+ ? lm_741
+r2  net-_r2-pad1_ net-_r2-pad2_ 50k
+r1  net-_r1-pad1_ net-_r1-pad2_ 50k
+r4  net-_r1-pad2_ net-_r4-pad2_ 50k
+r3  net-_r2-pad2_ net-_r3-pad2_ 50k
+r6  net-_r4-pad2_ net-_r6-pad2_ 50k
+r5  net-_r3-pad2_ net-_r5-pad2_ 50k
+* Control Statements
+
+.ends IC_INA823
\ No newline at end of file
diff --git a/library/SubcircuitLibrary/IC_INA823/IC_INA823_Previous_Values.xml b/library/SubcircuitLibrary/IC_INA823/IC_INA823_Previous_Values.xml
new file mode 100644
index 00000000..f9d4a087
--- /dev/null
+++ b/library/SubcircuitLibrary/IC_INA823/IC_INA823_Previous_Values.xml
@@ -0,0 +1 @@
+<KicadtoNgspice><source /><model /><devicemodel /><subcircuit><x2><field>C:\FOSSEE\eSim\library\SubcircuitLibrary\lm_741</field></x2><x1><field>C:\FOSSEE\eSim\library\SubcircuitLibrary\lm_741</field></x1><x3><field>C:\FOSSEE\eSim\library\SubcircuitLibrary\lm_741</field></x3></subcircuit><analysis><ac><field1 name="Lin">true</field1><field2 name="Dec">false</field2><field3 name="Oct">false</field3><field4 name="Start Frequency" /><field5 name="Stop Frequency" /><field6 name="No. of points" /><field7 name="Start Fre Combo">Hz</field7><field8 name="Stop Fre Combo">Hz</field8></ac><dc><field1 name="Source 1" /><field2 name="Start" /><field3 name="Increment" /><field4 name="Stop" /><field5 name="Operating Point">0</field5><field6 name="Start Combo">Volts or Amperes</field6><field7 name="Increment Combo">Volts or Amperes</field7><field8 name="Stop Combo">Volts or Amperes</field8><field9 name="Source 2" /><field10 name="Start" /><field11 name="Increment" /><field12 name="Stop" /><field13 name="Start Combo">Volts or Amperes</field13><field14 name="Increment Combo">Volts or Amperes</field14><field15 name="Stop Combo">Volts or Amperes</field15></dc><tran><field1 name="Start Time" /><field2 name="Step Time" /><field3 name="Stop Time" /><field4 name="Start Combo">Sec</field4><field5 name="Step Combo">Sec</field5><field6 name="Stop Combo">Sec</field6></tran></analysis></KicadtoNgspice>
\ No newline at end of file
diff --git a/library/SubcircuitLibrary/IC_INA823/NPN.lib b/library/SubcircuitLibrary/IC_INA823/NPN.lib
new file mode 100644
index 00000000..7f2f0319
--- /dev/null
+++ b/library/SubcircuitLibrary/IC_INA823/NPN.lib
@@ -0,0 +1,4 @@
+.model Q2N2222  NPN( Is=14.34f Xti=3 Eg=1.11 Vaf=74.03 Bf=400 Ne=1.307 
++ Ise=14.34f Ikf=.2847 Xtb=1.5 Br=6.092 Nc=2 Isc=0 Ikr=0 Rc=1 Cjc=7.306p 
++ Mjc=.3416 Vjc=.75 Fc=.5 Cje=22.01p Mje=.377 Vje=.75 Tr=46.91n Tf=411.1p 
++ Itf=.6 Vtf=1.7 Xtf=3 Rb=10) 
diff --git a/library/SubcircuitLibrary/IC_INA823/PNP.lib b/library/SubcircuitLibrary/IC_INA823/PNP.lib
new file mode 100644
index 00000000..0eaa3e25
--- /dev/null
+++ b/library/SubcircuitLibrary/IC_INA823/PNP.lib
@@ -0,0 +1,4 @@
+.model Q2N2907A PNP(Is=650.6E-18 Xti=3 Eg=1.11 Vaf=115.7 Bf=231.7 Ne=1.829
++		Ise=54.81f Ikf=1.079 Xtb=1.5 Br=3.563 Nc=2 Isc=0 Ikr=0 Rc=.715
++		Cjc=14.76p Mjc=.5383 Vjc=.75 Fc=.5 Cje=19.82p Mje=.3357 Vje=.75
++		Tr=111.3n Tf=603.7p Itf=.65 Vtf=5 Xtf=1.7 Rb=10)
diff --git a/library/SubcircuitLibrary/IC_INA823/README.md b/library/SubcircuitLibrary/IC_INA823/README.md
new file mode 100644
index 00000000..5986e65b
--- /dev/null
+++ b/library/SubcircuitLibrary/IC_INA823/README.md
@@ -0,0 +1,16 @@
+
+# IC_INA823 IC
+
+It is an Instrumentation Amplifier IC.
+
+
+## Documentation
+
+To know the details of INA823 IC please go through with the documentation : [INA823_datasheet](https://www.ti.com/lit/ds/symlink/ina823.pdf?ts=1690187005232&ref_url=https%253A%252F%252Fwww.ti.com%252Fproduct%252FINA823%253Futm_source%253Dgoogle%2526utm_medium%253Dcpc%2526utm_campaign%253Dasc-null-null-GPN_EN-cpc-pf-google-wwe%2526utm_content%253DINA823%2526ds_k%253DINA823%2526DCM%253Dyes%2526gclid%253DCj0KCQjwwvilBhCFARIsADvYi7Kgs0updD5suYrFJ9Sr6wjuR8MVOhSZllX66pKD45ASCclMGW-jHQ8aAr9PEALw_wcB%2526gclsrc%253Daw.ds)
+
+
+## Contributer
+
+Name: Hrittika Ghosh
+Year: 2023
+Position: FOSSEE Winter Intern 2023
diff --git a/library/SubcircuitLibrary/IC_INA823/analysis b/library/SubcircuitLibrary/IC_INA823/analysis
new file mode 100644
index 00000000..ebd5c0a9
--- /dev/null
+++ b/library/SubcircuitLibrary/IC_INA823/analysis
@@ -0,0 +1 @@
+.tran 0e-00 0e-00 0e-00
\ No newline at end of file
diff --git a/library/SubcircuitLibrary/IC_INA823/lm_741-cache.lib b/library/SubcircuitLibrary/IC_INA823/lm_741-cache.lib
new file mode 100644
index 00000000..6e908886
--- /dev/null
+++ b/library/SubcircuitLibrary/IC_INA823/lm_741-cache.lib
@@ -0,0 +1,119 @@
+EESchema-LIBRARY Version 2.3
+#encoding utf-8
+#
+# PORT
+#
+DEF PORT U 0 40 Y Y 26 F N
+F0 "U" 50 100 30 H V C CNN
+F1 "PORT" 0 0 30 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0
+A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50
+S -100 50 100 -50 0 1 0 N
+X ~ 1 250 0 100 L 30 30 1 1 B
+X ~ 2 250 0 100 L 30 30 2 1 B
+X ~ 3 250 0 100 L 30 30 3 1 B
+X ~ 4 250 0 100 L 30 30 4 1 B
+X ~ 5 250 0 100 L 30 30 5 1 B
+X ~ 6 250 0 100 L 30 30 6 1 B
+X ~ 7 250 0 100 L 30 30 7 1 B
+X ~ 8 250 0 100 L 30 30 8 1 B
+X ~ 9 250 0 100 L 30 30 9 1 B
+X ~ 10 250 0 100 L 30 30 10 1 B
+X ~ 11 250 0 100 L 30 30 11 1 B
+X ~ 12 250 0 100 L 30 30 12 1 B
+X ~ 13 250 0 100 L 30 30 13 1 B
+X ~ 14 250 0 100 L 30 30 14 1 B
+X ~ 15 250 0 100 L 30 30 15 1 B
+X ~ 16 250 0 100 L 30 30 16 1 B
+X ~ 17 250 0 100 L 30 30 17 1 B
+X ~ 18 250 0 100 L 30 30 18 1 B
+X ~ 19 250 0 100 L 30 30 19 1 B
+X ~ 20 250 0 100 L 30 30 20 1 B
+X ~ 21 250 0 100 L 30 30 21 1 B
+X ~ 22 250 0 100 L 30 30 22 1 B
+X ~ 23 250 0 100 L 30 30 23 1 B
+X ~ 24 250 0 100 L 30 30 24 1 B
+X ~ 25 250 0 100 L 30 30 25 1 B
+X ~ 26 250 0 100 L 30 30 26 1 B
+ENDDRAW
+ENDDEF
+#
+# eSim_C
+#
+DEF eSim_C C 0 10 N Y 1 F N
+F0 "C" 25 100 50 H V L CNN
+F1 "eSim_C" 25 -100 50 H V L CNN
+F2 "" 38 -150 30 H V C CNN
+F3 "" 0 0 60 H V C CNN
+$FPLIST
+ C_*
+$ENDFPLIST
+DRAW
+P 2 0 1 20  -80 -30  80 -30 N
+P 2 0 1 20  -80 30  80 30 N
+X ~ 1 0 150 110 D 40 40 1 1 P
+X ~ 2 0 -150 110 U 40 40 1 1 P
+ENDDRAW
+ENDDEF
+#
+# eSim_NPN
+#
+DEF eSim_NPN Q 0 0 Y N 1 F N
+F0 "Q" -100 50 50 H V R CNN
+F1 "eSim_NPN" -50 150 50 H V R CNN
+F2 "" 200 100 29 H V C CNN
+F3 "" 0 0 60 H V C CNN
+ALIAS BC547 Q2N2222
+DRAW
+C 50 0 111 0 1 10 N
+P 2 0 1 0  25 25  100 100 N
+P 3 0 1 0  25 -25  100 -100  100 -100 N
+P 3 0 1 20  25 75  25 -75  25 -75 N
+P 5 0 1 0  50 -70  70 -50  90 -90  50 -70  50 -70 F
+X C 1 100 200 100 D 50 50 1 1 C
+X B 2 -200 0 225 R 50 50 1 1 I
+X E 3 100 -200 100 U 50 50 1 1 E
+ENDDRAW
+ENDDEF
+#
+# eSim_PNP
+#
+DEF eSim_PNP Q 0 0 Y N 1 F N
+F0 "Q" -100 50 50 H V R CNN
+F1 "eSim_PNP" -50 150 50 H V R CNN
+F2 "" 200 100 29 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+C 50 0 111 0 1 10 N
+P 2 0 1 0  25 25  100 100 N
+P 3 0 1 0  25 -25  100 -100  100 -100 N
+P 3 0 1 20  25 75  25 -75  25 -75 N
+P 5 0 1 0  90 -70  70 -90  50 -50  90 -70  90 -70 F
+X C 1 100 200 100 D 50 50 1 1 C
+X B 2 -200 0 225 R 50 50 1 1 I
+X E 3 100 -200 100 U 50 50 1 1 E
+ENDDRAW
+ENDDEF
+#
+# eSim_R
+#
+DEF eSim_R R 0 0 N Y 1 F N
+F0 "R" 50 130 50 H V C CNN
+F1 "eSim_R" 50 50 50 H V C CNN
+F2 "" 50 -20 30 H V C CNN
+F3 "" 50 50 30 V V C CNN
+$FPLIST
+ R_*
+ Resistor_*
+$ENDFPLIST
+DRAW
+S 150 10 -50 90 0 1 10 N
+X ~ 1 -100 50 50 R 60 60 1 1 P
+X ~ 2 200 50 50 L 60 60 1 1 P
+ENDDRAW
+ENDDEF
+#
+#End Library
diff --git a/library/SubcircuitLibrary/IC_INA823/lm_741-rescue.lib b/library/SubcircuitLibrary/IC_INA823/lm_741-rescue.lib
new file mode 100644
index 00000000..bf8e4bd7
--- /dev/null
+++ b/library/SubcircuitLibrary/IC_INA823/lm_741-rescue.lib
@@ -0,0 +1,42 @@
+EESchema-LIBRARY Version 2.3
+#encoding utf-8
+#
+# eSim_NPN-RESCUE-lm_741
+#
+DEF eSim_NPN-RESCUE-lm_741 Q 0 0 Y N 1 F N
+F0 "Q" -100 50 50 H V R CNN
+F1 "eSim_NPN-RESCUE-lm_741" -50 150 50 H V R CNN
+F2 "" 200 100 29 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+C 50 0 111 0 1 10 N
+P 2 0 1 0 25 25 100 100 N
+P 3 0 1 0 25 -25 100 -100 100 -100 N
+P 3 0 1 20 25 75 25 -75 25 -75 N
+P 5 0 1 0 50 -70 70 -50 90 -90 50 -70 50 -70 F
+X C 1 100 200 100 D 50 50 1 1 C
+X B 2 -200 0 225 R 50 50 1 1 I
+X E 3 100 -200 100 U 50 50 1 1 E
+ENDDRAW
+ENDDEF
+#
+# eSim_PNP-RESCUE-lm_741
+#
+DEF eSim_PNP-RESCUE-lm_741 Q 0 0 Y N 1 F N
+F0 "Q" -100 50 50 H V R CNN
+F1 "eSim_PNP-RESCUE-lm_741" -50 150 50 H V R CNN
+F2 "" 200 100 29 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+C 50 0 111 0 1 10 N
+P 2 0 1 0 25 25 100 100 N
+P 3 0 1 0 25 -25 100 -100 100 -100 N
+P 3 0 1 20 25 75 25 -75 25 -75 N
+P 5 0 1 0 90 -70 70 -90 50 -50 90 -70 90 -70 F
+X C 1 100 200 100 D 50 50 1 1 C
+X B 2 -200 0 225 R 50 50 1 1 I
+X E 3 100 -200 100 U 50 50 1 1 E
+ENDDRAW
+ENDDEF
+#
+#End Library
diff --git a/library/SubcircuitLibrary/IC_INA823/lm_741.cir b/library/SubcircuitLibrary/IC_INA823/lm_741.cir
new file mode 100644
index 00000000..b7989199
--- /dev/null
+++ b/library/SubcircuitLibrary/IC_INA823/lm_741.cir
@@ -0,0 +1,43 @@
+* C:\Users\malli\eSim\src\SubcircuitLibrary\lm_741\lm_741.cir
+
+* EESchema Netlist Version 1.1 (Spice format) creation date: 05/25/19 19:37:28
+
+* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N
+* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0
+
+* Sheet Name: /
+Q1  Net-_Q1-Pad1_ Net-_Q1-Pad2_ Net-_Q1-Pad3_ eSim_NPN		
+Q2  Net-_Q1-Pad1_ Net-_Q2-Pad2_ Net-_Q2-Pad3_ eSim_NPN		
+Q6  Net-_Q3-Pad2_ Net-_Q13-Pad1_ Net-_Q1-Pad3_ eSim_PNP		
+Q5  Net-_C1-Pad2_ Net-_Q13-Pad1_ Net-_Q2-Pad3_ eSim_PNP		
+Q3  Net-_Q10-Pad3_ Net-_Q3-Pad2_ Net-_Q3-Pad3_ eSim_NPN		
+Q4  Net-_Q1-Pad1_ Net-_Q1-Pad1_ Net-_Q10-Pad3_ eSim_PNP		
+Q9  Net-_Q13-Pad1_ Net-_Q1-Pad1_ Net-_Q10-Pad3_ eSim_PNP		
+Q8  Net-_C1-Pad2_ Net-_Q3-Pad3_ Net-_Q8-Pad3_ eSim_NPN		
+Q7  Net-_Q3-Pad2_ Net-_Q3-Pad3_ Net-_Q7-Pad3_ eSim_NPN		
+R1  Net-_Q7-Pad3_ Net-_Q12-Pad3_ 1k		
+R2  Net-_Q3-Pad3_ Net-_Q12-Pad3_ 50k		
+R3  Net-_Q8-Pad3_ Net-_Q12-Pad3_ 1k		
+Q12  Net-_Q12-Pad1_ Net-_Q12-Pad1_ Net-_Q12-Pad3_ eSim_NPN		
+Q13  Net-_Q13-Pad1_ Net-_Q12-Pad1_ Net-_Q13-Pad3_ eSim_NPN		
+R4  Net-_Q13-Pad3_ Net-_Q12-Pad3_ 5k		
+R11  Net-_Q10-Pad1_ Net-_Q12-Pad1_ 39k		
+Q10  Net-_Q10-Pad1_ Net-_Q10-Pad1_ Net-_Q10-Pad3_ eSim_PNP		
+Q11  Net-_C1-Pad1_ Net-_Q10-Pad1_ Net-_Q10-Pad3_ eSim_PNP		
+Q14  Net-_C1-Pad1_ Net-_Q14-Pad2_ Net-_Q14-Pad3_ eSim_NPN		
+R8  Net-_C1-Pad1_ Net-_Q14-Pad2_ 4.5k		
+R7  Net-_Q14-Pad3_ Net-_Q14-Pad2_ 7.5k		
+C1  Net-_C1-Pad1_ Net-_C1-Pad2_ 30p		
+Q16  Net-_Q14-Pad3_ Net-_C1-Pad2_ Net-_Q15-Pad2_ eSim_NPN		
+Q15  Net-_Q14-Pad3_ Net-_Q15-Pad2_ Net-_Q15-Pad3_ eSim_NPN		
+R5  Net-_Q15-Pad2_ Net-_Q12-Pad3_ 50k		
+R6  Net-_Q15-Pad3_ Net-_Q12-Pad3_ 50		
+Q17  Net-_C1-Pad2_ Net-_Q15-Pad3_ Net-_Q12-Pad3_ eSim_NPN		
+Q18  Net-_Q10-Pad3_ Net-_C1-Pad1_ Net-_Q18-Pad3_ eSim_NPN		
+Q20  Net-_C1-Pad1_ Net-_Q18-Pad3_ Net-_Q20-Pad3_ eSim_NPN		
+R9  Net-_Q18-Pad3_ Net-_Q20-Pad3_ 25		
+R10  Net-_Q20-Pad3_ Net-_Q19-Pad3_ 50		
+Q19  Net-_Q12-Pad3_ Net-_Q14-Pad3_ Net-_Q19-Pad3_ eSim_PNP		
+U1  Net-_Q7-Pad3_ Net-_Q2-Pad2_ Net-_Q1-Pad2_ Net-_Q12-Pad3_ Net-_Q8-Pad3_ Net-_Q20-Pad3_ Net-_Q10-Pad3_ ? PORT		
+
+.end
diff --git a/library/SubcircuitLibrary/IC_INA823/lm_741.cir.out b/library/SubcircuitLibrary/IC_INA823/lm_741.cir.out
new file mode 100644
index 00000000..01ede7ab
--- /dev/null
+++ b/library/SubcircuitLibrary/IC_INA823/lm_741.cir.out
@@ -0,0 +1,46 @@
+* c:\users\malli\esim\src\subcircuitlibrary\lm_741\lm_741.cir
+
+.include  npn_1.lib
+.include  pnp_1.lib
+q1  net-_q1-pad1_ net-_q1-pad2_ net-_q1-pad3_  npn_1
+q2  net-_q1-pad1_ net-_q2-pad2_ net-_q2-pad3_  npn_1
+q6  net-_q3-pad2_ net-_q13-pad1_ net-_q1-pad3_  pnp_1
+q5  net-_c1-pad2_ net-_q13-pad1_ net-_q2-pad3_  pnp_1
+q3  net-_q10-pad3_ net-_q3-pad2_ net-_q3-pad3_  npn_1
+q4  net-_q1-pad1_ net-_q1-pad1_ net-_q10-pad3_  pnp_1
+q9  net-_q13-pad1_ net-_q1-pad1_ net-_q10-pad3_  pnp_1
+q8  net-_c1-pad2_ net-_q3-pad3_ net-_q8-pad3_  npn_1
+q7  net-_q3-pad2_ net-_q3-pad3_ net-_q7-pad3_  npn_1
+r1  net-_q7-pad3_ net-_q12-pad3_ 1k
+r2  net-_q3-pad3_ net-_q12-pad3_ 50k
+r3  net-_q8-pad3_ net-_q12-pad3_ 1k
+q12  net-_q12-pad1_ net-_q12-pad1_ net-_q12-pad3_  npn_1
+q13  net-_q13-pad1_ net-_q12-pad1_ net-_q13-pad3_  npn_1
+r4  net-_q13-pad3_ net-_q12-pad3_ 5k
+r11  net-_q10-pad1_ net-_q12-pad1_ 39k
+q10  net-_q10-pad1_ net-_q10-pad1_ net-_q10-pad3_  pnp_1
+q11  net-_c1-pad1_ net-_q10-pad1_ net-_q10-pad3_  pnp_1
+q14  net-_c1-pad1_ net-_q14-pad2_ net-_q14-pad3_  npn_1
+r8  net-_c1-pad1_ net-_q14-pad2_ 4.5k
+r7  net-_q14-pad3_ net-_q14-pad2_ 7.5k
+c1  net-_c1-pad1_ net-_c1-pad2_ 30p
+q16  net-_q14-pad3_ net-_c1-pad2_ net-_q15-pad2_  npn_1
+q15  net-_q14-pad3_ net-_q15-pad2_ net-_q15-pad3_  npn_1
+r5  net-_q15-pad2_ net-_q12-pad3_ 50k
+r6  net-_q15-pad3_ net-_q12-pad3_ 50
+q17  net-_c1-pad2_ net-_q15-pad3_ net-_q12-pad3_  npn_1
+q18  net-_q10-pad3_ net-_c1-pad1_ net-_q18-pad3_  npn_1
+q20  net-_c1-pad1_ net-_q18-pad3_ net-_q20-pad3_  npn_1
+r9  net-_q18-pad3_ net-_q20-pad3_ 25
+r10  net-_q20-pad3_ net-_q19-pad3_ 50
+q19  net-_q12-pad3_ net-_q14-pad3_ net-_q19-pad3_  pnp_1
+* u1  net-_q7-pad3_ net-_q2-pad2_ net-_q1-pad2_ net-_q12-pad3_ net-_q8-pad3_ net-_q20-pad3_ net-_q10-pad3_ ? port
+.tran 0e-00 0e-00 0e-00
+
+* Control Statements 
+.control
+run
+print allv > plot_data_v.txt
+print alli > plot_data_i.txt
+.endc
+.end
diff --git a/library/SubcircuitLibrary/IC_INA823/lm_741.pro b/library/SubcircuitLibrary/IC_INA823/lm_741.pro
new file mode 100644
index 00000000..222fb5cb
--- /dev/null
+++ b/library/SubcircuitLibrary/IC_INA823/lm_741.pro
@@ -0,0 +1,45 @@
+update=02/07/23 21:24:54
+version=1
+last_client=eeschema
+[general]
+version=1
+RootSch=
+BoardNm=
+[pcbnew]
+version=1
+LastNetListRead=
+UseCmpFile=1
+PadDrill=0.600000000000
+PadDrillOvalY=0.600000000000
+PadSizeH=1.500000000000
+PadSizeV=1.500000000000
+PcbTextSizeV=1.500000000000
+PcbTextSizeH=1.500000000000
+PcbTextThickness=0.300000000000
+ModuleTextSizeV=1.000000000000
+ModuleTextSizeH=1.000000000000
+ModuleTextSizeThickness=0.150000000000
+SolderMaskClearance=0.000000000000
+SolderMaskMinWidth=0.000000000000
+DrawSegmentWidth=0.200000000000
+BoardOutlineThickness=0.100000000000
+ModuleOutlineThickness=0.150000000000
+[cvpcb]
+version=1
+NetIExt=net
+[eeschema]
+version=1
+LibDir=
+[eeschema/libraries]
+LibName1=lm_741-rescue
+LibName2=power
+LibName3=eSim_Analog
+LibName4=eSim_Devices
+LibName5=eSim_Digital
+LibName6=eSim_Hybrid
+LibName7=eSim_Miscellaneous
+LibName8=eSim_Plot
+LibName9=eSim_Power
+LibName10=eSim_User
+LibName11=eSim_Sources
+LibName12=eSim_Subckt
diff --git a/library/SubcircuitLibrary/IC_INA823/lm_741.sch b/library/SubcircuitLibrary/IC_INA823/lm_741.sch
new file mode 100644
index 00000000..6a74cf22
--- /dev/null
+++ b/library/SubcircuitLibrary/IC_INA823/lm_741.sch
@@ -0,0 +1,697 @@
+EESchema Schematic File Version 2
+LIBS:power
+LIBS:eSim_Analog
+LIBS:eSim_Devices
+LIBS:eSim_Digital
+LIBS:eSim_Hybrid
+LIBS:eSim_Miscellaneous
+LIBS:eSim_Plot
+LIBS:eSim_Power
+LIBS:eSim_PSpice
+LIBS:eSim_Sources
+LIBS:eSim_Subckt
+LIBS:eSim_User
+LIBS:lm_741-cache
+EELAYER 25 0
+EELAYER END
+$Descr A4 11693 8268
+encoding utf-8
+Sheet 1 1
+Title ""
+Date ""
+Rev ""
+Comp ""
+Comment1 ""
+Comment2 ""
+Comment3 ""
+Comment4 ""
+$EndDescr
+$Comp
+L eSim_NPN Q1
+U 1 1 5CE90A7B
+P 2650 2700
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+$Comp
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+	1    5400 4700
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+F 3 "" V 6400 2800 30  0000 C CNN
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+F 2 "" H 6700 2050 29  0000 C CNN
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+	1    7500 1950
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+F 3 "" V 7350 2650 30  0000 C CNN
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+F 1 "30p" H 6625 3100 50  0000 L CNN
+F 2 "" H 6638 3050 30  0000 C CNN
+F 3 "" H 6600 3200 60  0000 C CNN
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+F 2 "" H 7700 4400 29  0000 C CNN
+F 3 "" H 7500 4300 60  0000 C CNN
+	1    7500 4300
+	1    0    0    -1  
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+$Comp
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+F 1 "50k" H 7150 5100 50  0000 C CNN
+F 2 "" H 7150 5030 30  0000 C CNN
+F 3 "" V 7150 5100 30  0000 C CNN
+	1    7100 5050
+	0    1    1    0   
+$EndComp
+$Comp
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+F 1 "50" H 7600 5100 50  0000 C CNN
+F 2 "" H 7600 5030 30  0000 C CNN
+F 3 "" V 7600 5100 30  0000 C CNN
+	1    7550 5050
+	0    1    1    0   
+$EndComp
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+F 2 "" H 7000 4800 29  0000 C CNN
+F 3 "" H 6800 4700 60  0000 C CNN
+	1    6800 4700
+	-1   0    0    -1  
+$EndComp
+$Comp
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+U 1 1 5CE90A96
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+F 2 "" H 9000 2400 29  0000 C CNN
+F 3 "" H 8800 2300 60  0000 C CNN
+	1    8800 2300
+	1    0    0    -1  
+$EndComp
+$Comp
+L eSim_NPN Q20
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+F 1 "eSim_NPN" H 8350 2900 50  0000 R CNN
+F 2 "" H 8600 2850 29  0000 C CNN
+F 3 "" H 8400 2750 60  0000 C CNN
+	1    8400 2750
+	-1   0    0    -1  
+$EndComp
+$Comp
+L eSim_R R9
+U 1 1 5CE90A98
+P 8850 3000
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+F 1 "25" H 8900 3050 50  0000 C CNN
+F 2 "" H 8900 2980 30  0000 C CNN
+F 3 "" V 8900 3050 30  0000 C CNN
+	1    8850 3000
+	0    1    1    0   
+$EndComp
+$Comp
+L eSim_R R10
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+F 0 "R10" H 8900 3880 50  0000 C CNN
+F 1 "50" H 8900 3800 50  0000 C CNN
+F 2 "" H 8900 3730 30  0000 C CNN
+F 3 "" V 8900 3800 30  0000 C CNN
+	1    8850 3750
+	0    1    1    0   
+$EndComp
+$Comp
+L eSim_PNP Q19
+U 1 1 5CE90A9A
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+F 0 "Q19" H 8700 4650 50  0000 R CNN
+F 1 "eSim_PNP" H 8750 4750 50  0000 R CNN
+F 2 "" H 9000 4700 29  0000 C CNN
+F 3 "" H 8800 4600 60  0000 C CNN
+	1    8800 4600
+	1    0    0    1   
+$EndComp
+$Comp
+L PORT U1
+U 3 1 5CE90A9B
+P 1900 1200
+F 0 "U1" H 1950 1300 30  0000 C CNN
+F 1 "PORT" H 1900 1200 30  0000 C CNN
+F 2 "" H 1900 1200 60  0000 C CNN
+F 3 "" H 1900 1200 60  0000 C CNN
+	3    1900 1200
+	1    0    0    -1  
+$EndComp
+$Comp
+L PORT U1
+U 2 1 5CE90A9C
+P 4500 1050
+F 0 "U1" H 4550 1150 30  0000 C CNN
+F 1 "PORT" H 4500 1050 30  0000 C CNN
+F 2 "" H 4500 1050 60  0000 C CNN
+F 3 "" H 4500 1050 60  0000 C CNN
+	2    4500 1050
+	1    0    0    -1  
+$EndComp
+$Comp
+L PORT U1
+U 7 1 5CE90A9D
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+F 0 "U1" H 9800 1750 30  0000 C CNN
+F 1 "PORT" H 9750 1650 30  0000 C CNN
+F 2 "" H 9750 1650 60  0000 C CNN
+F 3 "" H 9750 1650 60  0000 C CNN
+	7    9750 1650
+	-1   0    0    1   
+$EndComp
+$Comp
+L PORT U1
+U 6 1 5CE90A9E
+P 9750 3500
+F 0 "U1" H 9800 3600 30  0000 C CNN
+F 1 "PORT" H 9750 3500 30  0000 C CNN
+F 2 "" H 9750 3500 60  0000 C CNN
+F 3 "" H 9750 3500 60  0000 C CNN
+	6    9750 3500
+	-1   0    0    1   
+$EndComp
+$Comp
+L PORT U1
+U 4 1 5CE90A9F
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+F 0 "U1" H 9750 5650 30  0000 C CNN
+F 1 "PORT" H 9700 5550 30  0000 C CNN
+F 2 "" H 9700 5550 60  0000 C CNN
+F 3 "" H 9700 5550 60  0000 C CNN
+	4    9700 5550
+	-1   0    0    1   
+$EndComp
+Wire Wire Line
+	3200 3200 3750 3200
+Wire Wire Line
+	2750 2900 2750 2950
+Wire Wire Line
+	2750 2950 2900 2950
+Wire Wire Line
+	2900 2950 2900 3000
+Wire Wire Line
+	4200 2900 4200 2950
+Wire Wire Line
+	4200 2950 4050 2950
+Wire Wire Line
+	4050 2950 4050 3000
+Wire Wire Line
+	2900 3400 2900 4400
+Wire Wire Line
+	2900 4000 3100 4000
+Wire Wire Line
+	4200 2000 4200 2500
+Wire Wire Line
+	4200 2350 2750 2350
+Wire Wire Line
+	2750 2350 2750 2500
+Wire Wire Line
+	5000 2000 4050 2000
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+Connection ~ 4200 2000
+Wire Wire Line
+	3750 2200 3750 2350
+Connection ~ 3750 2350
+Wire Wire Line
+	3750 1800 3750 1650
+Wire Wire Line
+	3400 1650 7600 1650
+Wire Wire Line
+	3400 1650 3400 3800
+Wire Wire Line
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+Wire Wire Line
+	5300 2200 5300 4500
+Wire Wire Line
+	5300 3500 3650 3500
+Wire Wire Line
+	3650 3500 3650 3200
+Connection ~ 3650 3200
+Connection ~ 2900 4000
+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
+	3200 4600 3750 4600
+Connection ~ 3400 4600
+Wire Wire Line
+	4050 5100 4050 4800
+Wire Wire Line
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+Connection ~ 3600 4600
+Wire Wire Line
+	2900 5100 2900 4800
+Wire Wire Line
+	2900 5400 2900 5550
+Wire Wire Line
+	2900 5550 9450 5550
+Wire Wire Line
+	4050 5550 4050 5400
+Wire Wire Line
+	3600 5400 3600 5550
+Connection ~ 3600 5550
+Wire Wire Line
+	6100 4700 5600 4700
+Wire Wire Line
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+Wire Wire Line
+	6400 4250 5900 4250
+Wire Wire Line
+	5900 4250 5900 4700
+Connection ~ 5900 4700
+Wire Wire Line
+	5300 5100 5300 4900
+Wire Wire Line
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+Wire Wire Line
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+Connection ~ 5300 3500
+Wire Wire Line
+	6400 1650 6400 1750
+Connection ~ 5300 1650
+Wire Wire Line
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+Connection ~ 6400 4250
+Wire Wire Line
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+Wire Wire Line
+	7000 1950 7000 2250
+Wire Wire Line
+	7000 2250 6400 2250
+Connection ~ 6400 2250
+Wire Wire Line
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+Connection ~ 6400 1650
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+Wire Wire Line
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+Wire Wire Line
+	7600 3450 7400 3450
+Wire Wire Line
+	6900 3450 7100 3450
+Wire Wire Line
+	6900 2650 6900 3450
+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
+	7600 2650 7400 2650
+Wire Wire Line
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+Connection ~ 7600 2650
+Wire Wire Line
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+Wire Wire Line
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+Connection ~ 7600 3450
+Wire Wire Line
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+Wire Wire Line
+	7150 3700 7150 3750
+Connection ~ 7600 3700
+Wire Wire Line
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+Wire Wire Line
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+Connection ~ 7600 2450
+Wire Wire Line
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+Wire Wire Line
+	4050 3950 6850 3950
+Wire Wire Line
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+Connection ~ 6700 3950
+Wire Wire Line
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+Connection ~ 6400 5550
+Connection ~ 7150 4300
+Wire Wire Line
+	7600 4950 7600 4500
+Wire Wire Line
+	7000 4700 7600 4700
+Connection ~ 7600 4700
+Wire Wire Line
+	7600 5550 7600 5250
+Connection ~ 6700 5550
+Wire Wire Line
+	7150 5250 7150 5550
+Connection ~ 7150 5550
+Wire Wire Line
+	7600 2300 8600 2300
+Wire Wire Line
+	8300 2300 8300 2550
+Connection ~ 8300 2300
+Connection ~ 7600 2300
+Wire Wire Line
+	8900 2100 8900 1650
+Wire Wire Line
+	7550 1650 9500 1650
+Connection ~ 7550 1650
+Connection ~ 8900 1650
+Wire Wire Line
+	8900 2500 8900 2900
+Wire Wire Line
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+Connection ~ 8900 2750
+Wire Wire Line
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+Wire Wire Line
+	8300 3350 8900 3350
+Wire Wire Line
+	8900 3200 8900 3650
+Wire Wire Line
+	8900 4400 8900 3950
+Connection ~ 8900 3350
+Wire Wire Line
+	8900 3500 9500 3500
+Connection ~ 8900 3500
+Wire Wire Line
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+Connection ~ 7600 5550
+Connection ~ 8900 5550
+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
+	8100 3850 7600 3850
+Connection ~ 7600 3850
+Connection ~ 4050 3950
+Connection ~ 6600 3950
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+Wire Wire Line
+	4750 2700 4750 1050
+Wire Wire Line
+	2450 2700 2150 2700
+Wire Wire Line
+	2150 2700 2150 1200
+$Comp
+L PORT U1
+U 5 1 5CE90AA0
+P 1850 4850
+F 0 "U1" H 1900 4950 30  0000 C CNN
+F 1 "PORT" H 1850 4850 30  0000 C CNN
+F 2 "" H 1850 4850 60  0000 C CNN
+F 3 "" H 1850 4850 60  0000 C CNN
+	5    1850 4850
+	1    0    0    -1  
+$EndComp
+$Comp
+L PORT U1
+U 1 1 5CE90AA1
+P 1850 5100
+F 0 "U1" H 1900 5200 30  0000 C CNN
+F 1 "PORT" H 1850 5100 30  0000 C CNN
+F 2 "" H 1850 5100 60  0000 C CNN
+F 3 "" H 1850 5100 60  0000 C CNN
+	1    1850 5100
+	1    0    0    -1  
+$EndComp
+Wire Wire Line
+	2100 5100 2700 5100
+Wire Wire Line
+	2700 5100 2700 5050
+Wire Wire Line
+	2700 5050 2900 5050
+Connection ~ 2900 5050
+Wire Wire Line
+	2100 4850 2550 4850
+Wire Wire Line
+	2550 4850 2550 4900
+Wire Wire Line
+	2550 4900 4050 4900
+Connection ~ 4050 4900
+$Comp
+L PORT U1
+U 8 1 5CE9368F
+P 9600 6050
+F 0 "U1" H 9650 6150 30  0000 C CNN
+F 1 "PORT" H 9600 6050 30  0000 C CNN
+F 2 "" H 9600 6050 60  0000 C CNN
+F 3 "" H 9600 6050 60  0000 C CNN
+	8    9600 6050
+	-1   0    0    1   
+$EndComp
+Wire Wire Line
+	9350 6050 9100 6050
+NoConn ~ 9100 6050
+$EndSCHEMATC
diff --git a/library/SubcircuitLibrary/IC_INA823/lm_741.sub b/library/SubcircuitLibrary/IC_INA823/lm_741.sub
new file mode 100644
index 00000000..4e4feca4
--- /dev/null
+++ b/library/SubcircuitLibrary/IC_INA823/lm_741.sub
@@ -0,0 +1,40 @@
+* Subcircuit lm_741
+.subckt lm_741 net-_q7-pad3_ net-_q2-pad2_ net-_q1-pad2_ net-_q12-pad3_ net-_q8-pad3_ net-_q20-pad3_ net-_q10-pad3_ ? 
+* c:\users\malli\esim\src\subcircuitlibrary\lm_741\lm_741.cir
+.include npn_1.lib
+.include pnp_1.lib
+q1  net-_q1-pad1_ net-_q1-pad2_ net-_q1-pad3_  npn_1
+q2  net-_q1-pad1_ net-_q2-pad2_ net-_q2-pad3_  npn_1
+q6  net-_q3-pad2_ net-_q13-pad1_ net-_q1-pad3_  pnp_1
+q5  net-_c1-pad2_ net-_q13-pad1_ net-_q2-pad3_  pnp_1
+q3  net-_q10-pad3_ net-_q3-pad2_ net-_q3-pad3_  npn_1
+q4  net-_q1-pad1_ net-_q1-pad1_ net-_q10-pad3_  pnp_1
+q9  net-_q13-pad1_ net-_q1-pad1_ net-_q10-pad3_  pnp_1
+q8  net-_c1-pad2_ net-_q3-pad3_ net-_q8-pad3_  npn_1
+q7  net-_q3-pad2_ net-_q3-pad3_ net-_q7-pad3_  npn_1
+r1  net-_q7-pad3_ net-_q12-pad3_ 1k
+r2  net-_q3-pad3_ net-_q12-pad3_ 50k
+r3  net-_q8-pad3_ net-_q12-pad3_ 1k
+q12  net-_q12-pad1_ net-_q12-pad1_ net-_q12-pad3_  npn_1
+q13  net-_q13-pad1_ net-_q12-pad1_ net-_q13-pad3_  npn_1
+r4  net-_q13-pad3_ net-_q12-pad3_ 5k
+r11  net-_q10-pad1_ net-_q12-pad1_ 39k
+q10  net-_q10-pad1_ net-_q10-pad1_ net-_q10-pad3_  pnp_1
+q11  net-_c1-pad1_ net-_q10-pad1_ net-_q10-pad3_  pnp_1
+q14  net-_c1-pad1_ net-_q14-pad2_ net-_q14-pad3_  npn_1
+r8  net-_c1-pad1_ net-_q14-pad2_ 4.5k
+r7  net-_q14-pad3_ net-_q14-pad2_ 7.5k
+c1  net-_c1-pad1_ net-_c1-pad2_ 30p
+q16  net-_q14-pad3_ net-_c1-pad2_ net-_q15-pad2_  npn_1
+q15  net-_q14-pad3_ net-_q15-pad2_ net-_q15-pad3_  npn_1
+r5  net-_q15-pad2_ net-_q12-pad3_ 50k
+r6  net-_q15-pad3_ net-_q12-pad3_ 50
+q17  net-_c1-pad2_ net-_q15-pad3_ net-_q12-pad3_  npn_1
+q18  net-_q10-pad3_ net-_c1-pad1_ net-_q18-pad3_  npn_1
+q20  net-_c1-pad1_ net-_q18-pad3_ net-_q20-pad3_  npn_1
+r9  net-_q18-pad3_ net-_q20-pad3_ 25
+r10  net-_q20-pad3_ net-_q19-pad3_ 50
+q19  net-_q12-pad3_ net-_q14-pad3_ net-_q19-pad3_  pnp_1
+* Control Statements
+
+.ends lm_741
\ No newline at end of file
diff --git a/library/SubcircuitLibrary/IC_INA823/lm_741_Previous_Values.xml b/library/SubcircuitLibrary/IC_INA823/lm_741_Previous_Values.xml
new file mode 100644
index 00000000..228572ce
--- /dev/null
+++ b/library/SubcircuitLibrary/IC_INA823/lm_741_Previous_Values.xml
@@ -0,0 +1 @@
+<KicadtoNgspice><source /><model /><devicemodel><q1><field /></q1><q2><field /></q2><q6><field /></q6><q5><field /></q5><q3><field /></q3><q4><field /></q4><q9><field /></q9><q8><field /></q8><q7><field /></q7><q12><field /></q12><q13><field /></q13><q10><field /></q10><q11><field /></q11><q14><field /></q14><q16><field /></q16><q15><field /></q15><q17><field /></q17><q18><field /></q18><q20><field /></q20><q19><field /></q19></devicemodel><subcircuit /><analysis><ac><field1 name="Lin">true</field1><field2 name="Dec">false</field2><field3 name="Oct">false</field3><field4 name="Start Frequency" /><field5 name="Stop Frequency" /><field6 name="No. of points" /><field7 name="Start Fre Combo">Hz</field7><field8 name="Stop Fre Combo">Hz</field8></ac><dc><field1 name="Source 1" /><field2 name="Start" /><field3 name="Increment" /><field4 name="Stop" /><field5 name="Operating Point">0</field5><field6 name="Start Combo">Volts or Amperes</field6><field7 name="Increment Combo">Volts or Amperes</field7><field8 name="Stop Combo">Volts or Amperes</field8><field9 name="Source 2" /><field10 name="Start" /><field11 name="Increment" /><field12 name="Stop" /><field13 name="Start Combo">Volts or Amperes</field13><field14 name="Increment Combo">Volts or Amperes</field14><field15 name="Stop Combo">Volts or Amperes</field15></dc><tran><field1 name="Start Time" /><field2 name="Step Time" /><field3 name="Stop Time" /><field4 name="Start Combo">Sec</field4><field5 name="Step Combo">Sec</field5><field6 name="Stop Combo">Sec</field6></tran></analysis></KicadtoNgspice>
\ No newline at end of file
diff --git a/library/SubcircuitLibrary/IC_INA823/npn_1.lib b/library/SubcircuitLibrary/IC_INA823/npn_1.lib
new file mode 100644
index 00000000..4a863e3e
--- /dev/null
+++ b/library/SubcircuitLibrary/IC_INA823/npn_1.lib
@@ -0,0 +1,29 @@
+.model npn_1 NPN(
++ Vtf=1.7 
++ Cjc=0.5p
++ Nc=2 
++ Tr=46.91n 
++ Ne=1.307 
++ Cje=0.5p
++ Isc=0 
++ Xtb=1.5 
++ Rb=500
++ Rc=1 
++ Tf=411.1p 
++ Xti=3 
++ Ikr=0 
++ Bf=125
++ Fc=.5 
++ Ise=14.34f 
++ Br=6.092 
++ Ikf=.2847 
++ Mje=.377 
++ Mjc=.3416 
++ Vaf=74.03 
++ Vjc=.75 
++ Vje=.75 
++ Xtf=3 
++ Itf=.6 
++ Is=14.34f 
++ Eg=1.11 
+)
\ No newline at end of file
diff --git a/library/SubcircuitLibrary/IC_INA823/pnp_1.lib b/library/SubcircuitLibrary/IC_INA823/pnp_1.lib
new file mode 100644
index 00000000..c486429f
--- /dev/null
+++ b/library/SubcircuitLibrary/IC_INA823/pnp_1.lib
@@ -0,0 +1,29 @@
+.model pnp_1 PNP(
++ Vtf=1.7 
++ Cjc=1.5p
++ Nc=2 
++ Tr=46.91n 
++ Ne=1.307 
++ Cje=0.3p
++ Isc=0 
++ Xtb=1.5 
++ Rb=250
++ Rc=1 
++ Tf=411.1p 
++ Xti=3 
++ Ikr=0 
++ Bf=25
++ Fc=.5 
++ Ise=14.34f 
++ Br=6.092 
++ Ikf=.2847 
++ Mje=.377 
++ Mjc=.3416 
++ Vaf=74.03 
++ Vjc=.75 
++ Vje=.75 
++ Xtf=3 
++ Itf=.6 
++ Is=14.34f 
++ Eg=1.11 
+)
\ No newline at end of file
-- 
cgit