From ec998692f698ceef68d8ccdb97c2132bd5bd1021 Mon Sep 17 00:00:00 2001
From: AnkushECE
Date: Wed, 24 Aug 2022 23:11:02 +0530
Subject: CD54HC151 is 8x1 Multiplexer IC.
---
.../CD54_HC_151/CD54_157-cache.lib | 100 ++
library/SubcircuitLibrary/CD54_HC_151/CD54_157.cir | 75 +
.../SubcircuitLibrary/CD54_HC_151/CD54_157.cir.out | 78 +
library/SubcircuitLibrary/CD54_HC_151/CD54_157.pro | 71 +
library/SubcircuitLibrary/CD54_HC_151/CD54_157.sch | 1721 ++++++++++++++++++++
library/SubcircuitLibrary/CD54_HC_151/CD54_157.sub | 72 +
.../CD54_HC_151/CD54_157_Previous_Values.xml | 1 +
.../CD54_HC_151/CD54_HC_151-cache.lib | 128 ++
.../SubcircuitLibrary/CD54_HC_151/CD54_HC_151.cir | 32 +
.../CD54_HC_151/CD54_HC_151.cir.out | 36 +
.../SubcircuitLibrary/CD54_HC_151/CD54_HC_151.pro | 71 +
.../SubcircuitLibrary/CD54_HC_151/CD54_HC_151.sch | 893 ++++++++++
.../SubcircuitLibrary/CD54_HC_151/CD54_HC_151.sub | 30 +
.../CD54_HC_151/CD54_HC_151_Previous_Values.xml | 1 +
.../SubcircuitLibrary/CD54_HC_151/NMOS-180nm.lib | 13 +
.../SubcircuitLibrary/CD54_HC_151/PMOS-180nm.lib | 11 +
library/SubcircuitLibrary/CD54_HC_151/README.md | 21 +
library/SubcircuitLibrary/CD54_HC_151/analysis | 1 +
18 files changed, 3355 insertions(+)
create mode 100644 library/SubcircuitLibrary/CD54_HC_151/CD54_157-cache.lib
create mode 100644 library/SubcircuitLibrary/CD54_HC_151/CD54_157.cir
create mode 100644 library/SubcircuitLibrary/CD54_HC_151/CD54_157.cir.out
create mode 100644 library/SubcircuitLibrary/CD54_HC_151/CD54_157.pro
create mode 100644 library/SubcircuitLibrary/CD54_HC_151/CD54_157.sch
create mode 100644 library/SubcircuitLibrary/CD54_HC_151/CD54_157.sub
create mode 100644 library/SubcircuitLibrary/CD54_HC_151/CD54_157_Previous_Values.xml
create mode 100644 library/SubcircuitLibrary/CD54_HC_151/CD54_HC_151-cache.lib
create mode 100644 library/SubcircuitLibrary/CD54_HC_151/CD54_HC_151.cir
create mode 100644 library/SubcircuitLibrary/CD54_HC_151/CD54_HC_151.cir.out
create mode 100644 library/SubcircuitLibrary/CD54_HC_151/CD54_HC_151.pro
create mode 100644 library/SubcircuitLibrary/CD54_HC_151/CD54_HC_151.sch
create mode 100644 library/SubcircuitLibrary/CD54_HC_151/CD54_HC_151.sub
create mode 100644 library/SubcircuitLibrary/CD54_HC_151/CD54_HC_151_Previous_Values.xml
create mode 100644 library/SubcircuitLibrary/CD54_HC_151/NMOS-180nm.lib
create mode 100644 library/SubcircuitLibrary/CD54_HC_151/PMOS-180nm.lib
create mode 100644 library/SubcircuitLibrary/CD54_HC_151/README.md
create mode 100644 library/SubcircuitLibrary/CD54_HC_151/analysis
(limited to 'library/SubcircuitLibrary/CD54_HC_151')
diff --git a/library/SubcircuitLibrary/CD54_HC_151/CD54_157-cache.lib b/library/SubcircuitLibrary/CD54_HC_151/CD54_157-cache.lib
new file mode 100644
index 00000000..6c512720
--- /dev/null
+++ b/library/SubcircuitLibrary/CD54_HC_151/CD54_157-cache.lib
@@ -0,0 +1,100 @@
+EESchema-LIBRARY Version 2.3
+#encoding utf-8
+#
+# PORT
+#
+DEF PORT U 0 40 Y Y 26 F N
+F0 "U" 50 100 30 H V C CNN
+F1 "PORT" 0 0 30 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0
+A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50
+S -100 50 100 -50 0 1 0 N
+X ~ 1 250 0 100 L 30 30 1 1 B
+X ~ 2 250 0 100 L 30 30 2 1 B
+X ~ 3 250 0 100 L 30 30 3 1 B
+X ~ 4 250 0 100 L 30 30 4 1 B
+X ~ 5 250 0 100 L 30 30 5 1 B
+X ~ 6 250 0 100 L 30 30 6 1 B
+X ~ 7 250 0 100 L 30 30 7 1 B
+X ~ 8 250 0 100 L 30 30 8 1 B
+X ~ 9 250 0 100 L 30 30 9 1 B
+X ~ 10 250 0 100 L 30 30 10 1 B
+X ~ 11 250 0 100 L 30 30 11 1 B
+X ~ 12 250 0 100 L 30 30 12 1 B
+X ~ 13 250 0 100 L 30 30 13 1 B
+X ~ 14 250 0 100 L 30 30 14 1 B
+X ~ 15 250 0 100 L 30 30 15 1 B
+X ~ 16 250 0 100 L 30 30 16 1 B
+X ~ 17 250 0 100 L 30 30 17 1 B
+X ~ 18 250 0 100 L 30 30 18 1 B
+X ~ 19 250 0 100 L 30 30 19 1 B
+X ~ 20 250 0 100 L 30 30 20 1 B
+X ~ 21 250 0 100 L 30 30 21 1 B
+X ~ 22 250 0 100 L 30 30 22 1 B
+X ~ 23 250 0 100 L 30 30 23 1 B
+X ~ 24 250 0 100 L 30 30 24 1 B
+X ~ 25 250 0 100 L 30 30 25 1 B
+X ~ 26 250 0 100 L 30 30 26 1 B
+ENDDRAW
+ENDDEF
+#
+# eSim_MOS_N
+#
+DEF eSim_MOS_N M 0 0 Y N 1 F N
+F0 "M" 0 -150 50 H V R CNN
+F1 "eSim_MOS_N" 100 -50 50 H V R CNN
+F2 "" 300 -300 29 H V C CNN
+F3 "" 100 -200 60 H V C CNN
+ALIAS mosfet_n
+DRAW
+C 150 -200 111 0 1 10 N
+P 2 0 1 10 130 -290 130 -250 N
+P 2 0 1 0 130 -270 200 -270 N
+P 2 0 1 10 130 -220 130 -180 N
+P 2 0 1 0 130 -200 200 -200 N
+P 2 0 1 10 130 -150 130 -110 N
+P 2 0 1 0 130 -130 200 -130 N
+P 2 0 1 0 200 -300 200 -270 N
+P 2 0 1 0 200 -130 200 -100 N
+P 3 0 1 10 110 -275 110 -125 110 -125 N
+P 3 0 1 0 200 -200 300 -200 300 -250 N
+P 4 0 1 0 140 -200 180 -215 180 -185 140 -200 F
+X D 1 200 0 100 D 50 50 1 1 P
+X G 2 -100 -200 210 R 50 50 1 1 P
+X S 3 200 -400 100 U 50 50 1 1 P
+X B 4 300 -350 98 U 47 47 1 1 P
+ENDDRAW
+ENDDEF
+#
+# eSim_MOS_P
+#
+DEF eSim_MOS_P M 0 0 Y N 1 F N
+F0 "M" -50 50 50 H V R CNN
+F1 "eSim_MOS_P" 50 150 50 H V R CNN
+F2 "" 250 100 29 H V C CNN
+F3 "" 50 0 60 H V C CNN
+ALIAS mosfet_p
+DRAW
+C 100 0 111 0 1 10 N
+P 2 0 1 0 80 -70 150 -70 N
+P 2 0 1 10 80 -50 80 -90 N
+P 2 0 1 0 80 0 150 0 N
+P 2 0 1 10 80 20 80 -20 N
+P 2 0 1 0 80 70 150 70 N
+P 2 0 1 10 80 90 80 50 N
+P 2 0 1 0 150 -70 150 -100 N
+P 2 0 1 0 150 100 150 70 N
+P 3 0 1 10 60 75 60 -75 60 -75 N
+P 3 0 1 0 150 0 250 0 250 -50 N
+P 4 0 1 0 140 0 100 -15 100 15 140 0 F
+X D 1 150 200 100 D 50 50 1 1 P
+X G 2 -150 0 210 R 50 50 1 1 P
+X S 3 150 -200 100 U 50 50 1 1 P
+X B 4 250 -150 100 U 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
+#End Library
diff --git a/library/SubcircuitLibrary/CD54_HC_151/CD54_157.cir b/library/SubcircuitLibrary/CD54_HC_151/CD54_157.cir
new file mode 100644
index 00000000..8a833fef
--- /dev/null
+++ b/library/SubcircuitLibrary/CD54_HC_151/CD54_157.cir
@@ -0,0 +1,75 @@
+* C:\FOSSEE\eSim\library\SubcircuitLibrary\CD54_157\CD54_157.cir
+
+* EESchema Netlist Version 1.1 (Spice format) creation date: 06/14/22 12:01:36
+
+* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N
+* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0
+
+* Sheet Name: /
+M55 Net-_M55-Pad1_ /i0_3 /vcc /vcc eSim_MOS_P
+M60 Net-_M55-Pad1_ Net-_M58-Pad2_ /vcc /vcc eSim_MOS_P
+M65 Net-_M55-Pad1_ Net-_M57-Pad2_ /vcc /vcc eSim_MOS_P
+M56 /y3_bar /i1_3 Net-_M55-Pad1_ Net-_M55-Pad1_ eSim_MOS_P
+M61 /y3_bar Net-_M58-Pad2_ Net-_M55-Pad1_ Net-_M55-Pad1_ eSim_MOS_P
+M66 /y3_bar /s Net-_M55-Pad1_ Net-_M55-Pad1_ eSim_MOS_P
+M57 /y3_bar Net-_M57-Pad2_ Net-_M57-Pad3_ Net-_M57-Pad3_ eSim_MOS_N
+M58 Net-_M57-Pad3_ Net-_M58-Pad2_ Net-_M58-Pad3_ Net-_M58-Pad3_ eSim_MOS_N
+M59 Net-_M58-Pad3_ /i0_3 Net-_M10-Pad3_ Net-_M10-Pad3_ eSim_MOS_N
+M62 /y3_bar /s Net-_M62-Pad3_ Net-_M62-Pad3_ eSim_MOS_N
+M63 Net-_M62-Pad3_ Net-_M58-Pad2_ Net-_M63-Pad3_ Net-_M63-Pad3_ eSim_MOS_N
+M64 Net-_M63-Pad3_ /i1_3 Net-_M10-Pad3_ Net-_M10-Pad3_ eSim_MOS_N
+M68 Net-_M57-Pad2_ /s Net-_M10-Pad3_ Net-_M10-Pad3_ eSim_MOS_N
+M67 Net-_M57-Pad2_ /s /vcc /vcc eSim_MOS_P
+M71 Net-_M58-Pad2_ /enable_bar /vcc /vcc eSim_MOS_P
+M72 Net-_M58-Pad2_ /enable_bar Net-_M10-Pad3_ Net-_M10-Pad3_ eSim_MOS_N
+M1 Net-_M1-Pad1_ /i0_1 /vcc /vcc eSim_MOS_P
+M11 Net-_M1-Pad1_ Net-_M11-Pad2_ /vcc /vcc eSim_MOS_P
+M18 Net-_M1-Pad1_ Net-_M18-Pad2_ /vcc /vcc eSim_MOS_P
+M2 /y1_bar /i1_1 Net-_M1-Pad1_ Net-_M1-Pad1_ eSim_MOS_P
+M12 /y1_bar Net-_M11-Pad2_ Net-_M1-Pad1_ Net-_M1-Pad1_ eSim_MOS_P
+M19 /y1_bar /s Net-_M1-Pad1_ Net-_M1-Pad1_ eSim_MOS_P
+M3 /y1_bar Net-_M18-Pad2_ Net-_M3-Pad3_ Net-_M3-Pad3_ eSim_MOS_N
+M4 Net-_M3-Pad3_ Net-_M11-Pad2_ Net-_M4-Pad3_ Net-_M4-Pad3_ eSim_MOS_N
+M5 Net-_M4-Pad3_ /i0_1 Net-_M10-Pad3_ Net-_M10-Pad3_ eSim_MOS_N
+M15 /y1_bar /s Net-_M15-Pad3_ Net-_M15-Pad3_ eSim_MOS_N
+M16 Net-_M15-Pad3_ Net-_M11-Pad2_ Net-_M16-Pad3_ Net-_M16-Pad3_ eSim_MOS_N
+M17 Net-_M16-Pad3_ /i1_1 Net-_M10-Pad3_ Net-_M10-Pad3_ eSim_MOS_N
+M26 Net-_M18-Pad2_ /s Net-_M10-Pad3_ Net-_M10-Pad3_ eSim_MOS_N
+M25 Net-_M18-Pad2_ /s /vcc /vcc eSim_MOS_P
+M33 Net-_M11-Pad2_ /enable_bar /vcc /vcc eSim_MOS_P
+M34 Net-_M11-Pad2_ /enable_bar Net-_M10-Pad3_ Net-_M10-Pad3_ eSim_MOS_N
+M6 Net-_M13-Pad1_ /i0_2 /vcc /vcc eSim_MOS_P
+M13 Net-_M13-Pad1_ Net-_M13-Pad2_ /vcc /vcc eSim_MOS_P
+M23 Net-_M13-Pad1_ Net-_M23-Pad2_ /vcc /vcc eSim_MOS_P
+M7 /y2_bar /i1_2 Net-_M13-Pad1_ Net-_M13-Pad1_ eSim_MOS_P
+M14 /y2_bar Net-_M13-Pad2_ Net-_M13-Pad1_ Net-_M13-Pad1_ eSim_MOS_P
+M24 /y2_bar /s Net-_M13-Pad1_ Net-_M13-Pad1_ eSim_MOS_P
+M8 /y2_bar Net-_M23-Pad2_ Net-_M8-Pad3_ Net-_M8-Pad3_ eSim_MOS_N
+M9 Net-_M8-Pad3_ Net-_M13-Pad2_ Net-_M10-Pad1_ Net-_M10-Pad1_ eSim_MOS_N
+M10 Net-_M10-Pad1_ /i0_2 Net-_M10-Pad3_ Net-_M10-Pad3_ eSim_MOS_N
+M20 /y2_bar /s Net-_M20-Pad3_ Net-_M20-Pad3_ eSim_MOS_N
+M21 Net-_M20-Pad3_ Net-_M13-Pad2_ Net-_M21-Pad3_ Net-_M21-Pad3_ eSim_MOS_N
+M22 Net-_M21-Pad3_ /i1_2 Net-_M10-Pad3_ Net-_M10-Pad3_ eSim_MOS_N
+M30 Net-_M23-Pad2_ /s Net-_M10-Pad3_ Net-_M10-Pad3_ eSim_MOS_N
+M29 Net-_M23-Pad2_ /s /vcc /vcc eSim_MOS_P
+M35 Net-_M13-Pad2_ /enable_bar /vcc /vcc eSim_MOS_P
+M36 Net-_M13-Pad2_ /enable_bar Net-_M10-Pad3_ Net-_M10-Pad3_ eSim_MOS_N
+M37 Net-_M37-Pad1_ /i0_4 /vcc /vcc eSim_MOS_P
+M42 Net-_M37-Pad1_ Net-_M40-Pad2_ /vcc /vcc eSim_MOS_P
+M47 Net-_M37-Pad1_ Net-_M39-Pad2_ /vcc /vcc eSim_MOS_P
+M38 /y4_bar /i1_4 Net-_M37-Pad1_ Net-_M37-Pad1_ eSim_MOS_P
+M43 /y4_bar Net-_M40-Pad2_ Net-_M37-Pad1_ Net-_M37-Pad1_ eSim_MOS_P
+M48 /y4_bar /s Net-_M37-Pad1_ Net-_M37-Pad1_ eSim_MOS_P
+M39 /y4_bar Net-_M39-Pad2_ Net-_M39-Pad3_ Net-_M39-Pad3_ eSim_MOS_N
+M40 Net-_M39-Pad3_ Net-_M40-Pad2_ Net-_M40-Pad3_ Net-_M40-Pad3_ eSim_MOS_N
+M41 Net-_M40-Pad3_ /i0_4 Net-_M10-Pad3_ Net-_M10-Pad3_ eSim_MOS_N
+M44 /y4_bar /s Net-_M44-Pad3_ Net-_M44-Pad3_ eSim_MOS_N
+M45 Net-_M44-Pad3_ Net-_M40-Pad2_ Net-_M45-Pad3_ Net-_M45-Pad3_ eSim_MOS_N
+M46 Net-_M45-Pad3_ /i1_4 Net-_M10-Pad3_ Net-_M10-Pad3_ eSim_MOS_N
+M50 Net-_M39-Pad2_ /s Net-_M10-Pad3_ Net-_M10-Pad3_ eSim_MOS_N
+M49 Net-_M39-Pad2_ /s /vcc /vcc eSim_MOS_P
+M53 Net-_M40-Pad2_ /enable_bar /vcc /vcc eSim_MOS_P
+M54 Net-_M40-Pad2_ /enable_bar Net-_M10-Pad3_ Net-_M10-Pad3_ eSim_MOS_N
+U1 /s /i0_1 /i1_1 /y1_bar /i0_2 /i1_2 /y2_bar Net-_M10-Pad3_ /y4_bar /i1_4 /i0_4 /y3_bar /i1_3 /i0_3 /enable_bar /vcc PORT
+
+.end
diff --git a/library/SubcircuitLibrary/CD54_HC_151/CD54_157.cir.out b/library/SubcircuitLibrary/CD54_HC_151/CD54_157.cir.out
new file mode 100644
index 00000000..1f4b4837
--- /dev/null
+++ b/library/SubcircuitLibrary/CD54_HC_151/CD54_157.cir.out
@@ -0,0 +1,78 @@
+* c:\fossee\esim\library\subcircuitlibrary\cd54_157\cd54_157.cir
+
+.include PMOS-180nm.lib
+.include NMOS-180nm.lib
+m55 net-_m55-pad1_ /i0_3 /vcc /vcc CMOSP W=100u L=100u M=1
+m60 net-_m55-pad1_ net-_m58-pad2_ /vcc /vcc CMOSP W=100u L=100u M=1
+m65 net-_m55-pad1_ net-_m57-pad2_ /vcc /vcc CMOSP W=100u L=100u M=1
+m56 /y3_bar /i1_3 net-_m55-pad1_ net-_m55-pad1_ CMOSP W=100u L=100u M=1
+m61 /y3_bar net-_m58-pad2_ net-_m55-pad1_ net-_m55-pad1_ CMOSP W=100u L=100u M=1
+m66 /y3_bar /s net-_m55-pad1_ net-_m55-pad1_ CMOSP W=100u L=100u M=1
+m57 /y3_bar net-_m57-pad2_ net-_m57-pad3_ net-_m57-pad3_ CMOSN W=100u L=100u M=1
+m58 net-_m57-pad3_ net-_m58-pad2_ net-_m58-pad3_ net-_m58-pad3_ CMOSN W=100u L=100u M=1
+m59 net-_m58-pad3_ /i0_3 net-_m10-pad3_ net-_m10-pad3_ CMOSN W=100u L=100u M=1
+m62 /y3_bar /s net-_m62-pad3_ net-_m62-pad3_ CMOSN W=100u L=100u M=1
+m63 net-_m62-pad3_ net-_m58-pad2_ net-_m63-pad3_ net-_m63-pad3_ CMOSN W=100u L=100u M=1
+m64 net-_m63-pad3_ /i1_3 net-_m10-pad3_ net-_m10-pad3_ CMOSN W=100u L=100u M=1
+m68 net-_m57-pad2_ /s net-_m10-pad3_ net-_m10-pad3_ CMOSN W=100u L=100u M=1
+m67 net-_m57-pad2_ /s /vcc /vcc CMOSP W=100u L=100u M=1
+m71 net-_m58-pad2_ /enable_bar /vcc /vcc CMOSP W=100u L=100u M=1
+m72 net-_m58-pad2_ /enable_bar net-_m10-pad3_ net-_m10-pad3_ CMOSN W=100u L=100u M=1
+m1 net-_m1-pad1_ /i0_1 /vcc /vcc CMOSP W=100u L=100u M=1
+m11 net-_m1-pad1_ net-_m11-pad2_ /vcc /vcc CMOSP W=100u L=100u M=1
+m18 net-_m1-pad1_ net-_m18-pad2_ /vcc /vcc CMOSP W=100u L=100u M=1
+m2 /y1_bar /i1_1 net-_m1-pad1_ net-_m1-pad1_ CMOSP W=100u L=100u M=1
+m12 /y1_bar net-_m11-pad2_ net-_m1-pad1_ net-_m1-pad1_ CMOSP W=100u L=100u M=1
+m19 /y1_bar /s net-_m1-pad1_ net-_m1-pad1_ CMOSP W=100u L=100u M=1
+m3 /y1_bar net-_m18-pad2_ net-_m3-pad3_ net-_m3-pad3_ CMOSN W=100u L=100u M=1
+m4 net-_m3-pad3_ net-_m11-pad2_ net-_m4-pad3_ net-_m4-pad3_ CMOSN W=100u L=100u M=1
+m5 net-_m4-pad3_ /i0_1 net-_m10-pad3_ net-_m10-pad3_ CMOSN W=100u L=100u M=1
+m15 /y1_bar /s net-_m15-pad3_ net-_m15-pad3_ CMOSN W=100u L=100u M=1
+m16 net-_m15-pad3_ net-_m11-pad2_ net-_m16-pad3_ net-_m16-pad3_ CMOSN W=100u L=100u M=1
+m17 net-_m16-pad3_ /i1_1 net-_m10-pad3_ net-_m10-pad3_ CMOSN W=100u L=100u M=1
+m26 net-_m18-pad2_ /s net-_m10-pad3_ net-_m10-pad3_ CMOSN W=100u L=100u M=1
+m25 net-_m18-pad2_ /s /vcc /vcc CMOSP W=100u L=100u M=1
+m33 net-_m11-pad2_ /enable_bar /vcc /vcc CMOSP W=100u L=100u M=1
+m34 net-_m11-pad2_ /enable_bar net-_m10-pad3_ net-_m10-pad3_ CMOSN W=100u L=100u M=1
+m6 net-_m13-pad1_ /i0_2 /vcc /vcc CMOSP W=100u L=100u M=1
+m13 net-_m13-pad1_ net-_m13-pad2_ /vcc /vcc CMOSP W=100u L=100u M=1
+m23 net-_m13-pad1_ net-_m23-pad2_ /vcc /vcc CMOSP W=100u L=100u M=1
+m7 /y2_bar /i1_2 net-_m13-pad1_ net-_m13-pad1_ CMOSP W=100u L=100u M=1
+m14 /y2_bar net-_m13-pad2_ net-_m13-pad1_ net-_m13-pad1_ CMOSP W=100u L=100u M=1
+m24 /y2_bar /s net-_m13-pad1_ net-_m13-pad1_ CMOSP W=100u L=100u M=1
+m8 /y2_bar net-_m23-pad2_ net-_m8-pad3_ net-_m8-pad3_ CMOSN W=100u L=100u M=1
+m9 net-_m8-pad3_ net-_m13-pad2_ net-_m10-pad1_ net-_m10-pad1_ CMOSN W=100u L=100u M=1
+m10 net-_m10-pad1_ /i0_2 net-_m10-pad3_ net-_m10-pad3_ CMOSN W=100u L=100u M=1
+m20 /y2_bar /s net-_m20-pad3_ net-_m20-pad3_ CMOSN W=100u L=100u M=1
+m21 net-_m20-pad3_ net-_m13-pad2_ net-_m21-pad3_ net-_m21-pad3_ CMOSN W=100u L=100u M=1
+m22 net-_m21-pad3_ /i1_2 net-_m10-pad3_ net-_m10-pad3_ CMOSN W=100u L=100u M=1
+m30 net-_m23-pad2_ /s net-_m10-pad3_ net-_m10-pad3_ CMOSN W=100u L=100u M=1
+m29 net-_m23-pad2_ /s /vcc /vcc CMOSP W=100u L=100u M=1
+m35 net-_m13-pad2_ /enable_bar /vcc /vcc CMOSP W=100u L=100u M=1
+m36 net-_m13-pad2_ /enable_bar net-_m10-pad3_ net-_m10-pad3_ CMOSN W=100u L=100u M=1
+m37 net-_m37-pad1_ /i0_4 /vcc /vcc CMOSP W=100u L=100u M=1
+m42 net-_m37-pad1_ net-_m40-pad2_ /vcc /vcc CMOSP W=100u L=100u M=1
+m47 net-_m37-pad1_ net-_m39-pad2_ /vcc /vcc CMOSP W=100u L=100u M=1
+m38 /y4_bar /i1_4 net-_m37-pad1_ net-_m37-pad1_ CMOSP W=100u L=100u M=1
+m43 /y4_bar net-_m40-pad2_ net-_m37-pad1_ net-_m37-pad1_ CMOSP W=100u L=100u M=1
+m48 /y4_bar /s net-_m37-pad1_ net-_m37-pad1_ CMOSP W=100u L=100u M=1
+m39 /y4_bar net-_m39-pad2_ net-_m39-pad3_ net-_m39-pad3_ CMOSN W=100u L=100u M=1
+m40 net-_m39-pad3_ net-_m40-pad2_ net-_m40-pad3_ net-_m40-pad3_ CMOSN W=100u L=100u M=1
+m41 net-_m40-pad3_ /i0_4 net-_m10-pad3_ net-_m10-pad3_ CMOSN W=100u L=100u M=1
+m44 /y4_bar /s net-_m44-pad3_ net-_m44-pad3_ CMOSN W=100u L=100u M=1
+m45 net-_m44-pad3_ net-_m40-pad2_ net-_m45-pad3_ net-_m45-pad3_ CMOSN W=100u L=100u M=1
+m46 net-_m45-pad3_ /i1_4 net-_m10-pad3_ net-_m10-pad3_ CMOSN W=100u L=100u M=1
+m50 net-_m39-pad2_ /s net-_m10-pad3_ net-_m10-pad3_ CMOSN W=100u L=100u M=1
+m49 net-_m39-pad2_ /s /vcc /vcc CMOSP W=100u L=100u M=1
+m53 net-_m40-pad2_ /enable_bar /vcc /vcc CMOSP W=100u L=100u M=1
+m54 net-_m40-pad2_ /enable_bar net-_m10-pad3_ net-_m10-pad3_ CMOSN W=100u L=100u M=1
+* u1 /s /i0_1 /i1_1 /y1_bar /i0_2 /i1_2 /y2_bar net-_m10-pad3_ /y4_bar /i1_4 /i0_4 /y3_bar /i1_3 /i0_3 /enable_bar /vcc port
+.tran 0e-00 0e-00 0e-00
+
+* Control Statements
+.control
+run
+print allv > plot_data_v.txt
+print alli > plot_data_i.txt
+.endc
+.end
diff --git a/library/SubcircuitLibrary/CD54_HC_151/CD54_157.pro b/library/SubcircuitLibrary/CD54_HC_151/CD54_157.pro
new file mode 100644
index 00000000..d7f78c3b
--- /dev/null
+++ b/library/SubcircuitLibrary/CD54_HC_151/CD54_157.pro
@@ -0,0 +1,71 @@
+update=22/05/2015 07:44:53
+version=1
+last_client=kicad
+[general]
+version=1
+RootSch=
+BoardNm=
+[pcbnew]
+version=1
+LastNetListRead=
+UseCmpFile=1
+PadDrill=0.600000000000
+PadDrillOvalY=0.600000000000
+PadSizeH=1.500000000000
+PadSizeV=1.500000000000
+PcbTextSizeV=1.500000000000
+PcbTextSizeH=1.500000000000
+PcbTextThickness=0.300000000000
+ModuleTextSizeV=1.000000000000
+ModuleTextSizeH=1.000000000000
+ModuleTextSizeThickness=0.150000000000
+SolderMaskClearance=0.000000000000
+SolderMaskMinWidth=0.000000000000
+DrawSegmentWidth=0.200000000000
+BoardOutlineThickness=0.100000000000
+ModuleOutlineThickness=0.150000000000
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+version=1
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+[eeschema/libraries]
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+LibName2=memory
+LibName3=xilinx
+LibName4=microcontrollers
+LibName5=dsp
+LibName6=microchip
+LibName7=analog_switches
+LibName8=motorola
+LibName9=texas
+LibName10=intel
+LibName11=audio
+LibName12=interface
+LibName13=digital-audio
+LibName14=philips
+LibName15=display
+LibName16=cypress
+LibName17=siliconi
+LibName18=opto
+LibName19=atmel
+LibName20=contrib
+LibName21=power
+LibName22=eSim_Plot
+LibName23=transistors
+LibName24=conn
+LibName25=eSim_User
+LibName26=regul
+LibName27=74xx
+LibName28=cmos4000
+LibName29=eSim_Analog
+LibName30=eSim_Devices
+LibName31=eSim_Digital
+LibName32=eSim_Hybrid
+LibName33=eSim_Miscellaneous
+LibName34=eSim_Power
+LibName35=eSim_Sources
+LibName36=eSim_Subckt
+LibName37=eSim_Nghdl
+LibName38=eSim_Ngveri
diff --git a/library/SubcircuitLibrary/CD54_HC_151/CD54_157.sch b/library/SubcircuitLibrary/CD54_HC_151/CD54_157.sch
new file mode 100644
index 00000000..1e92f660
--- /dev/null
+++ b/library/SubcircuitLibrary/CD54_HC_151/CD54_157.sch
@@ -0,0 +1,1721 @@
+EESchema Schematic File Version 2
+LIBS:adc-dac
+LIBS:memory
+LIBS:xilinx
+LIBS:microcontrollers
+LIBS:dsp
+LIBS:microchip
+LIBS:analog_switches
+LIBS:motorola
+LIBS:texas
+LIBS:intel
+LIBS:audio
+LIBS:interface
+LIBS:digital-audio
+LIBS:philips
+LIBS:display
+LIBS:cypress
+LIBS:siliconi
+LIBS:opto
+LIBS:atmel
+LIBS:contrib
+LIBS:power
+LIBS:eSim_Plot
+LIBS:transistors
+LIBS:conn
+LIBS:eSim_User
+LIBS:regul
+LIBS:74xx
+LIBS:cmos4000
+LIBS:eSim_Analog
+LIBS:eSim_Devices
+LIBS:eSim_Digital
+LIBS:eSim_Hybrid
+LIBS:eSim_Miscellaneous
+LIBS:eSim_Power
+LIBS:eSim_Sources
+LIBS:eSim_Subckt
+LIBS:eSim_Nghdl
+LIBS:eSim_Ngveri
+LIBS:CD54_157-cache
+EELAYER 25 0
+EELAYER END
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+Connection ~ 3200 4200
+Wire Wire Line
+ 3200 4200 3200 4250
+Connection ~ 2850 4200
+Wire Wire Line
+ 2850 4250 2850 4200
+Connection ~ 3300 4600
+Wire Wire Line
+ 2750 4600 3950 4600
+Connection ~ 3300 4200
+Wire Wire Line
+ 2750 4200 3950 4200
+Connection ~ 3300 4050
+Wire Wire Line
+ 2750 4050 3950 4050
+Connection ~ 3300 3650
+Connection ~ 5850 5600
+Wire Wire Line
+ 5750 6100 5850 6100
+Wire Wire Line
+ 6150 5350 6150 5900
+Wire Wire Line
+ 5850 5550 5850 5700
+Wire Wire Line
+ 5850 5150 5750 5150
+Wire Wire Line
+ 5750 3650 5750 5200
+Wire Wire Line
+ 5750 6100 5750 6050
+Wire Wire Line
+ 5800 6600 5800 6100
+Connection ~ 5800 6100
+Connection ~ 5750 5150
+Wire Wire Line
+ 11050 5600 6150 5600
+Connection ~ 6150 5600
+Wire Wire Line
+ 10750 250 10750 1600
+Wire Wire Line
+ -500 250 -500 4700
+Connection ~ -500 250
+Wire Wire Line
+ 6500 4150 6500 3050
+Wire Wire Line
+ 6500 3050 -500 3050
+Wire Wire Line
+ -1000 1700 -1000 7150
+Wire Wire Line
+ 11050 3050 11050 5600
+Wire Wire Line
+ 7250 5600 7250 7150
+Wire Wire Line
+ 7250 7150 -1000 7150
+Connection ~ -1000 6150
+Connection ~ 7250 5600
+Wire Wire Line
+ 11050 4450 12050 4450
+Connection ~ 11050 4450
+Wire Wire Line
+ 10750 1100 12050 1100
+Connection ~ 10750 1100
+Wire Wire Line
+ -8000 -500 -8000 3950
+Wire Wire Line
+ -8000 100 -8600 100
+Connection ~ -8000 100
+Wire Wire Line
+ 1450 -500 1450 3400
+Connection ~ -4650 -500
+Connection ~ 1450 850
+Wire Wire Line
+ -4600 3450 -200 3450
+Wire Wire Line
+ -200 3450 -200 7400
+Wire Wire Line
+ -4450 7400 7600 7400
+Connection ~ -200 7400
+Connection ~ 3350 7400
+Wire Wire Line
+ -1250 7400 -1250 7750
+Wire Wire Line
+ -1250 7750 -1700 7750
+Connection ~ -1250 7400
+Connection ~ -5800 4400
+Wire Wire Line
+ 2750 3650 5750 3650
+$Comp
+L PORT U1
+U 1 1 62AB0EBE
+P 12300 1100
+F 0 "U1" H 12350 1200 30 0000 C CNN
+F 1 "PORT" H 12300 1100 30 0000 C CNN
+F 2 "" H 12300 1100 60 0000 C CNN
+F 3 "" H 12300 1100 60 0000 C CNN
+ 1 12300 1100
+ -1 0 0 -1
+$EndComp
+$Comp
+L PORT U1
+U 2 1 62AB2486
+P -7700 -50
+F 0 "U1" H -7650 50 30 0000 C CNN
+F 1 "PORT" H -7700 -50 30 0000 C CNN
+F 2 "" H -7700 -50 60 0000 C CNN
+F 3 "" H -7700 -50 60 0000 C CNN
+ 2 -7700 -50
+ 1 0 0 -1
+$EndComp
+$Comp
+L PORT U1
+U 3 1 62AB255B
+P -7700 500
+F 0 "U1" H -7650 600 30 0000 C CNN
+F 1 "PORT" H -7700 500 30 0000 C CNN
+F 2 "" H -7700 500 60 0000 C CNN
+F 3 "" H -7700 500 60 0000 C CNN
+ 3 -7700 500
+ 1 0 0 -1
+$EndComp
+$Comp
+L PORT U1
+U 4 1 62AB264C
+P -2550 950
+F 0 "U1" H -2500 1050 30 0000 C CNN
+F 1 "PORT" H -2550 950 30 0000 C CNN
+F 2 "" H -2550 950 60 0000 C CNN
+F 3 "" H -2550 950 60 0000 C CNN
+ 4 -2550 950
+ -1 0 0 -1
+$EndComp
+$Comp
+L PORT U1
+U 5 1 62AB4A22
+P -8100 4400
+F 0 "U1" H -8050 4500 30 0000 C CNN
+F 1 "PORT" H -8100 4400 30 0000 C CNN
+F 2 "" H -8100 4400 60 0000 C CNN
+F 3 "" H -8100 4400 60 0000 C CNN
+ 5 -8100 4400
+ 1 0 0 -1
+$EndComp
+$Comp
+L PORT U1
+U 6 1 62AB4AFB
+P -8050 4950
+F 0 "U1" H -8000 5050 30 0000 C CNN
+F 1 "PORT" H -8050 4950 30 0000 C CNN
+F 2 "" H -8050 4950 60 0000 C CNN
+F 3 "" H -8050 4950 60 0000 C CNN
+ 6 -8050 4950
+ 1 0 0 -1
+$EndComp
+Connection ~ -500 3050
+$Comp
+L PORT U1
+U 7 1 62ABA04F
+P -2400 5400
+F 0 "U1" H -2350 5500 30 0000 C CNN
+F 1 "PORT" H -2400 5400 30 0000 C CNN
+F 2 "" H -2400 5400 60 0000 C CNN
+F 3 "" H -2400 5400 60 0000 C CNN
+ 7 -2400 5400
+ -1 0 0 -1
+$EndComp
+$Comp
+L PORT U1
+U 8 1 62ABD427
+P -1950 7750
+F 0 "U1" H -1900 7850 30 0000 C CNN
+F 1 "PORT" H -1950 7750 30 0000 C CNN
+F 2 "" H -1950 7750 60 0000 C CNN
+F 3 "" H -1950 7750 60 0000 C CNN
+ 8 -1950 7750
+ 1 0 0 -1
+$EndComp
+$Comp
+L PORT U1
+U 9 1 62AC19FC
+P 5400 4850
+F 0 "U1" H 5450 4950 30 0000 C CNN
+F 1 "PORT" H 5400 4850 30 0000 C CNN
+F 2 "" H 5400 4850 60 0000 C CNN
+F 3 "" H 5400 4850 60 0000 C CNN
+ 9 5400 4850
+ -1 0 0 -1
+$EndComp
+$Comp
+L PORT U1
+U 10 1 62AC2D09
+P 1100 4400
+F 0 "U1" H 1150 4500 30 0000 C CNN
+F 1 "PORT" H 1100 4400 30 0000 C CNN
+F 2 "" H 1100 4400 60 0000 C CNN
+F 3 "" H 1100 4400 60 0000 C CNN
+ 10 1100 4400
+ 1 0 0 -1
+$EndComp
+$Comp
+L PORT U1
+U 11 1 62AC2E02
+P 1100 3850
+F 0 "U1" H 1150 3950 30 0000 C CNN
+F 1 "PORT" H 1100 3850 30 0000 C CNN
+F 2 "" H 1100 3850 60 0000 C CNN
+F 3 "" H 1100 3850 60 0000 C CNN
+ 11 1100 3850
+ 1 0 0 -1
+$EndComp
+$Comp
+L PORT U1
+U 12 1 62AC91B4
+P 9650 2300
+F 0 "U1" H 9700 2400 30 0000 C CNN
+F 1 "PORT" H 9650 2300 30 0000 C CNN
+F 2 "" H 9650 2300 60 0000 C CNN
+F 3 "" H 9650 2300 60 0000 C CNN
+ 12 9650 2300
+ -1 0 0 -1
+$EndComp
+$Comp
+L PORT U1
+U 13 1 62ACABE8
+P 3600 1850
+F 0 "U1" H 3650 1950 30 0000 C CNN
+F 1 "PORT" H 3600 1850 30 0000 C CNN
+F 2 "" H 3600 1850 60 0000 C CNN
+F 3 "" H 3600 1850 60 0000 C CNN
+ 13 3600 1850
+ 1 0 0 -1
+$EndComp
+$Comp
+L PORT U1
+U 14 1 62ACACE3
+P 3600 1300
+F 0 "U1" H 3650 1400 30 0000 C CNN
+F 1 "PORT" H 3600 1300 30 0000 C CNN
+F 2 "" H 3600 1300 60 0000 C CNN
+F 3 "" H 3600 1300 60 0000 C CNN
+ 14 3600 1300
+ 1 0 0 -1
+$EndComp
+$Comp
+L PORT U1
+U 15 1 62ACADBC
+P 12300 4450
+F 0 "U1" H 12350 4550 30 0000 C CNN
+F 1 "PORT" H 12300 4450 30 0000 C CNN
+F 2 "" H 12300 4450 60 0000 C CNN
+F 3 "" H 12300 4450 60 0000 C CNN
+ 15 12300 4450
+ -1 0 0 -1
+$EndComp
+$Comp
+L PORT U1
+U 16 1 62AD09D5
+P -8850 100
+F 0 "U1" H -8800 200 30 0000 C CNN
+F 1 "PORT" H -8850 100 30 0000 C CNN
+F 2 "" H -8850 100 60 0000 C CNN
+F 3 "" H -8850 100 60 0000 C CNN
+ 16 -8850 100
+ 1 0 0 -1
+$EndComp
+Connection ~ -2100 1700
+Connection ~ -4300 1700
+Wire Wire Line
+ -4300 1700 -2100 1700
+$EndSCHEMATC
diff --git a/library/SubcircuitLibrary/CD54_HC_151/CD54_157.sub b/library/SubcircuitLibrary/CD54_HC_151/CD54_157.sub
new file mode 100644
index 00000000..9d85337b
--- /dev/null
+++ b/library/SubcircuitLibrary/CD54_HC_151/CD54_157.sub
@@ -0,0 +1,72 @@
+* Subcircuit CD54_157
+.subckt CD54_157 /s /i0_1 /i1_1 /y1_bar /i0_2 /i1_2 /y2_bar net-_m10-pad3_ /y4_bar /i1_4 /i0_4 /y3_bar /i1_3 /i0_3 /enable_bar /vcc
+* c:\fossee\esim\library\subcircuitlibrary\cd54_157\cd54_157.cir
+.include PMOS-180nm.lib
+.include NMOS-180nm.lib
+m55 net-_m55-pad1_ /i0_3 /vcc /vcc CMOSP W=100u L=100u M=1
+m60 net-_m55-pad1_ net-_m58-pad2_ /vcc /vcc CMOSP W=100u L=100u M=1
+m65 net-_m55-pad1_ net-_m57-pad2_ /vcc /vcc CMOSP W=100u L=100u M=1
+m56 /y3_bar /i1_3 net-_m55-pad1_ net-_m55-pad1_ CMOSP W=100u L=100u M=1
+m61 /y3_bar net-_m58-pad2_ net-_m55-pad1_ net-_m55-pad1_ CMOSP W=100u L=100u M=1
+m66 /y3_bar /s net-_m55-pad1_ net-_m55-pad1_ CMOSP W=100u L=100u M=1
+m57 /y3_bar net-_m57-pad2_ net-_m57-pad3_ net-_m57-pad3_ CMOSN W=100u L=100u M=1
+m58 net-_m57-pad3_ net-_m58-pad2_ net-_m58-pad3_ net-_m58-pad3_ CMOSN W=100u L=100u M=1
+m59 net-_m58-pad3_ /i0_3 net-_m10-pad3_ net-_m10-pad3_ CMOSN W=100u L=100u M=1
+m62 /y3_bar /s net-_m62-pad3_ net-_m62-pad3_ CMOSN W=100u L=100u M=1
+m63 net-_m62-pad3_ net-_m58-pad2_ net-_m63-pad3_ net-_m63-pad3_ CMOSN W=100u L=100u M=1
+m64 net-_m63-pad3_ /i1_3 net-_m10-pad3_ net-_m10-pad3_ CMOSN W=100u L=100u M=1
+m68 net-_m57-pad2_ /s net-_m10-pad3_ net-_m10-pad3_ CMOSN W=100u L=100u M=1
+m67 net-_m57-pad2_ /s /vcc /vcc CMOSP W=100u L=100u M=1
+m71 net-_m58-pad2_ /enable_bar /vcc /vcc CMOSP W=100u L=100u M=1
+m72 net-_m58-pad2_ /enable_bar net-_m10-pad3_ net-_m10-pad3_ CMOSN W=100u L=100u M=1
+m1 net-_m1-pad1_ /i0_1 /vcc /vcc CMOSP W=100u L=100u M=1
+m11 net-_m1-pad1_ net-_m11-pad2_ /vcc /vcc CMOSP W=100u L=100u M=1
+m18 net-_m1-pad1_ net-_m18-pad2_ /vcc /vcc CMOSP W=100u L=100u M=1
+m2 /y1_bar /i1_1 net-_m1-pad1_ net-_m1-pad1_ CMOSP W=100u L=100u M=1
+m12 /y1_bar net-_m11-pad2_ net-_m1-pad1_ net-_m1-pad1_ CMOSP W=100u L=100u M=1
+m19 /y1_bar /s net-_m1-pad1_ net-_m1-pad1_ CMOSP W=100u L=100u M=1
+m3 /y1_bar net-_m18-pad2_ net-_m3-pad3_ net-_m3-pad3_ CMOSN W=100u L=100u M=1
+m4 net-_m3-pad3_ net-_m11-pad2_ net-_m4-pad3_ net-_m4-pad3_ CMOSN W=100u L=100u M=1
+m5 net-_m4-pad3_ /i0_1 net-_m10-pad3_ net-_m10-pad3_ CMOSN W=100u L=100u M=1
+m15 /y1_bar /s net-_m15-pad3_ net-_m15-pad3_ CMOSN W=100u L=100u M=1
+m16 net-_m15-pad3_ net-_m11-pad2_ net-_m16-pad3_ net-_m16-pad3_ CMOSN W=100u L=100u M=1
+m17 net-_m16-pad3_ /i1_1 net-_m10-pad3_ net-_m10-pad3_ CMOSN W=100u L=100u M=1
+m26 net-_m18-pad2_ /s net-_m10-pad3_ net-_m10-pad3_ CMOSN W=100u L=100u M=1
+m25 net-_m18-pad2_ /s /vcc /vcc CMOSP W=100u L=100u M=1
+m33 net-_m11-pad2_ /enable_bar /vcc /vcc CMOSP W=100u L=100u M=1
+m34 net-_m11-pad2_ /enable_bar net-_m10-pad3_ net-_m10-pad3_ CMOSN W=100u L=100u M=1
+m6 net-_m13-pad1_ /i0_2 /vcc /vcc CMOSP W=100u L=100u M=1
+m13 net-_m13-pad1_ net-_m13-pad2_ /vcc /vcc CMOSP W=100u L=100u M=1
+m23 net-_m13-pad1_ net-_m23-pad2_ /vcc /vcc CMOSP W=100u L=100u M=1
+m7 /y2_bar /i1_2 net-_m13-pad1_ net-_m13-pad1_ CMOSP W=100u L=100u M=1
+m14 /y2_bar net-_m13-pad2_ net-_m13-pad1_ net-_m13-pad1_ CMOSP W=100u L=100u M=1
+m24 /y2_bar /s net-_m13-pad1_ net-_m13-pad1_ CMOSP W=100u L=100u M=1
+m8 /y2_bar net-_m23-pad2_ net-_m8-pad3_ net-_m8-pad3_ CMOSN W=100u L=100u M=1
+m9 net-_m8-pad3_ net-_m13-pad2_ net-_m10-pad1_ net-_m10-pad1_ CMOSN W=100u L=100u M=1
+m10 net-_m10-pad1_ /i0_2 net-_m10-pad3_ net-_m10-pad3_ CMOSN W=100u L=100u M=1
+m20 /y2_bar /s net-_m20-pad3_ net-_m20-pad3_ CMOSN W=100u L=100u M=1
+m21 net-_m20-pad3_ net-_m13-pad2_ net-_m21-pad3_ net-_m21-pad3_ CMOSN W=100u L=100u M=1
+m22 net-_m21-pad3_ /i1_2 net-_m10-pad3_ net-_m10-pad3_ CMOSN W=100u L=100u M=1
+m30 net-_m23-pad2_ /s net-_m10-pad3_ net-_m10-pad3_ CMOSN W=100u L=100u M=1
+m29 net-_m23-pad2_ /s /vcc /vcc CMOSP W=100u L=100u M=1
+m35 net-_m13-pad2_ /enable_bar /vcc /vcc CMOSP W=100u L=100u M=1
+m36 net-_m13-pad2_ /enable_bar net-_m10-pad3_ net-_m10-pad3_ CMOSN W=100u L=100u M=1
+m37 net-_m37-pad1_ /i0_4 /vcc /vcc CMOSP W=100u L=100u M=1
+m42 net-_m37-pad1_ net-_m40-pad2_ /vcc /vcc CMOSP W=100u L=100u M=1
+m47 net-_m37-pad1_ net-_m39-pad2_ /vcc /vcc CMOSP W=100u L=100u M=1
+m38 /y4_bar /i1_4 net-_m37-pad1_ net-_m37-pad1_ CMOSP W=100u L=100u M=1
+m43 /y4_bar net-_m40-pad2_ net-_m37-pad1_ net-_m37-pad1_ CMOSP W=100u L=100u M=1
+m48 /y4_bar /s net-_m37-pad1_ net-_m37-pad1_ CMOSP W=100u L=100u M=1
+m39 /y4_bar net-_m39-pad2_ net-_m39-pad3_ net-_m39-pad3_ CMOSN W=100u L=100u M=1
+m40 net-_m39-pad3_ net-_m40-pad2_ net-_m40-pad3_ net-_m40-pad3_ CMOSN W=100u L=100u M=1
+m41 net-_m40-pad3_ /i0_4 net-_m10-pad3_ net-_m10-pad3_ CMOSN W=100u L=100u M=1
+m44 /y4_bar /s net-_m44-pad3_ net-_m44-pad3_ CMOSN W=100u L=100u M=1
+m45 net-_m44-pad3_ net-_m40-pad2_ net-_m45-pad3_ net-_m45-pad3_ CMOSN W=100u L=100u M=1
+m46 net-_m45-pad3_ /i1_4 net-_m10-pad3_ net-_m10-pad3_ CMOSN W=100u L=100u M=1
+m50 net-_m39-pad2_ /s net-_m10-pad3_ net-_m10-pad3_ CMOSN W=100u L=100u M=1
+m49 net-_m39-pad2_ /s /vcc /vcc CMOSP W=100u L=100u M=1
+m53 net-_m40-pad2_ /enable_bar /vcc /vcc CMOSP W=100u L=100u M=1
+m54 net-_m40-pad2_ /enable_bar net-_m10-pad3_ net-_m10-pad3_ CMOSN W=100u L=100u M=1
+* Control Statements
+
+.ends CD54_157
\ No newline at end of file
diff --git a/library/SubcircuitLibrary/CD54_HC_151/CD54_157_Previous_Values.xml b/library/SubcircuitLibrary/CD54_HC_151/CD54_157_Previous_Values.xml
new file mode 100644
index 00000000..850ea0ff
--- /dev/null
+++ b/library/SubcircuitLibrary/CD54_HC_151/CD54_157_Previous_Values.xml
@@ -0,0 +1 @@
+C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.libtruefalsefalseHzHz0Volts or AmperesVolts or AmperesVolts or AmperesVolts or AmperesVolts or AmperesVolts or AmperesSecSecSec
\ No newline at end of file
diff --git a/library/SubcircuitLibrary/CD54_HC_151/CD54_HC_151-cache.lib b/library/SubcircuitLibrary/CD54_HC_151/CD54_HC_151-cache.lib
new file mode 100644
index 00000000..645582cd
--- /dev/null
+++ b/library/SubcircuitLibrary/CD54_HC_151/CD54_HC_151-cache.lib
@@ -0,0 +1,128 @@
+EESchema-LIBRARY Version 2.3
+#encoding utf-8
+#
+# CD_54157
+#
+DEF CD_54157 X 0 40 Y Y 1 F N
+F0 "X" 0 50 60 H V C CNN
+F1 "CD_54157" 0 -250 60 V V C CNN
+F2 "" 0 0 60 H I C CNN
+F3 "" 0 0 60 H I C CNN
+DRAW
+S -350 200 350 -600 0 1 0 N
+X Sel 1 -550 150 200 R 50 50 1 1 I
+X I0_1 2 -550 50 200 R 50 50 1 1 I
+X I1_1 3 -550 -50 200 R 50 50 1 1 I
+X Y1_bar 4 -550 -150 200 R 50 50 1 1 O
+X I0_2 5 -550 -250 200 R 50 50 1 1 I
+X I1_2 6 -550 -350 200 R 50 50 1 1 I
+X Y2_bar 7 -550 -450 200 R 50 50 1 1 O
+X GND 8 -550 -550 200 R 50 50 1 1 I
+X Y3_bar 9 550 -550 200 L 50 50 1 1 O
+X I1_3 10 550 -450 200 L 50 50 1 1 I
+X I0_3 11 550 -350 200 L 50 50 1 1 I
+X Y4_bar 12 550 -250 200 L 50 50 1 1 O
+X I1_4 13 550 -150 200 L 50 50 1 1 I
+X I0_4 14 550 -50 200 L 50 50 1 1 I
+X E_bar 15 550 50 200 L 50 50 1 1 I
+X VCC 16 550 150 200 L 50 50 1 1 I
+ENDDRAW
+ENDDEF
+#
+# PORT
+#
+DEF PORT U 0 40 Y Y 26 F N
+F0 "U" 50 100 30 H V C CNN
+F1 "PORT" 0 0 30 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0
+A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50
+S -100 50 100 -50 0 1 0 N
+X ~ 1 250 0 100 L 30 30 1 1 B
+X ~ 2 250 0 100 L 30 30 2 1 B
+X ~ 3 250 0 100 L 30 30 3 1 B
+X ~ 4 250 0 100 L 30 30 4 1 B
+X ~ 5 250 0 100 L 30 30 5 1 B
+X ~ 6 250 0 100 L 30 30 6 1 B
+X ~ 7 250 0 100 L 30 30 7 1 B
+X ~ 8 250 0 100 L 30 30 8 1 B
+X ~ 9 250 0 100 L 30 30 9 1 B
+X ~ 10 250 0 100 L 30 30 10 1 B
+X ~ 11 250 0 100 L 30 30 11 1 B
+X ~ 12 250 0 100 L 30 30 12 1 B
+X ~ 13 250 0 100 L 30 30 13 1 B
+X ~ 14 250 0 100 L 30 30 14 1 B
+X ~ 15 250 0 100 L 30 30 15 1 B
+X ~ 16 250 0 100 L 30 30 16 1 B
+X ~ 17 250 0 100 L 30 30 17 1 B
+X ~ 18 250 0 100 L 30 30 18 1 B
+X ~ 19 250 0 100 L 30 30 19 1 B
+X ~ 20 250 0 100 L 30 30 20 1 B
+X ~ 21 250 0 100 L 30 30 21 1 B
+X ~ 22 250 0 100 L 30 30 22 1 B
+X ~ 23 250 0 100 L 30 30 23 1 B
+X ~ 24 250 0 100 L 30 30 24 1 B
+X ~ 25 250 0 100 L 30 30 25 1 B
+X ~ 26 250 0 100 L 30 30 26 1 B
+ENDDRAW
+ENDDEF
+#
+# eSim_MOS_N
+#
+DEF eSim_MOS_N M 0 0 Y N 1 F N
+F0 "M" 0 -150 50 H V R CNN
+F1 "eSim_MOS_N" 100 -50 50 H V R CNN
+F2 "" 300 -300 29 H V C CNN
+F3 "" 100 -200 60 H V C CNN
+ALIAS mosfet_n
+DRAW
+C 150 -200 111 0 1 10 N
+P 2 0 1 10 130 -290 130 -250 N
+P 2 0 1 0 130 -270 200 -270 N
+P 2 0 1 10 130 -220 130 -180 N
+P 2 0 1 0 130 -200 200 -200 N
+P 2 0 1 10 130 -150 130 -110 N
+P 2 0 1 0 130 -130 200 -130 N
+P 2 0 1 0 200 -300 200 -270 N
+P 2 0 1 0 200 -130 200 -100 N
+P 3 0 1 10 110 -275 110 -125 110 -125 N
+P 3 0 1 0 200 -200 300 -200 300 -250 N
+P 4 0 1 0 140 -200 180 -215 180 -185 140 -200 F
+X D 1 200 0 100 D 50 50 1 1 P
+X G 2 -100 -200 210 R 50 50 1 1 P
+X S 3 200 -400 100 U 50 50 1 1 P
+X B 4 300 -350 98 U 47 47 1 1 P
+ENDDRAW
+ENDDEF
+#
+# eSim_MOS_P
+#
+DEF eSim_MOS_P M 0 0 Y N 1 F N
+F0 "M" -50 50 50 H V R CNN
+F1 "eSim_MOS_P" 50 150 50 H V R CNN
+F2 "" 250 100 29 H V C CNN
+F3 "" 50 0 60 H V C CNN
+ALIAS mosfet_p
+DRAW
+C 100 0 111 0 1 10 N
+P 2 0 1 0 80 -70 150 -70 N
+P 2 0 1 10 80 -50 80 -90 N
+P 2 0 1 0 80 0 150 0 N
+P 2 0 1 10 80 20 80 -20 N
+P 2 0 1 0 80 70 150 70 N
+P 2 0 1 10 80 90 80 50 N
+P 2 0 1 0 150 -70 150 -100 N
+P 2 0 1 0 150 100 150 70 N
+P 3 0 1 10 60 75 60 -75 60 -75 N
+P 3 0 1 0 150 0 250 0 250 -50 N
+P 4 0 1 0 140 0 100 -15 100 15 140 0 F
+X D 1 150 200 100 D 50 50 1 1 P
+X G 2 -150 0 210 R 50 50 1 1 P
+X S 3 150 -200 100 U 50 50 1 1 P
+X B 4 250 -150 100 U 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
+#End Library
diff --git a/library/SubcircuitLibrary/CD54_HC_151/CD54_HC_151.cir b/library/SubcircuitLibrary/CD54_HC_151/CD54_HC_151.cir
new file mode 100644
index 00000000..11a9f3b9
--- /dev/null
+++ b/library/SubcircuitLibrary/CD54_HC_151/CD54_HC_151.cir
@@ -0,0 +1,32 @@
+* C:\FOSSEE\eSim\library\SubcircuitLibrary\CD54_HC_151\CD54_HC_151.cir
+
+* EESchema Netlist Version 1.1 (Spice format) creation date: 06/28/22 12:24:35
+
+* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N
+* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0
+
+* Sheet Name: /
+X2 Net-_U1-Pad11_ ? ? ? ? ? ? Net-_M1-Pad3_ Net-_M1-Pad2_ Net-_U1-Pad1_ Net-_U1-Pad2_ ? ? ? Net-_U1-Pad7_ Net-_M11-Pad3_ CD_54157
+X1 Net-_U1-Pad11_ ? ? ? ? ? ? Net-_M1-Pad3_ Net-_M4-Pad2_ Net-_U1-Pad3_ Net-_U1-Pad4_ ? ? ? Net-_U1-Pad7_ Net-_M11-Pad3_ CD_54157
+X3 Net-_U1-Pad11_ ? ? ? ? ? ? Net-_M1-Pad3_ Net-_M2-Pad2_ Net-_U1-Pad14_ Net-_U1-Pad15_ ? ? ? Net-_U1-Pad7_ Net-_M11-Pad3_ CD_54157
+X4 Net-_U1-Pad11_ ? ? ? ? ? ? Net-_M1-Pad3_ Net-_M3-Pad2_ Net-_U1-Pad12_ Net-_U1-Pad13_ ? ? ? Net-_U1-Pad7_ Net-_M11-Pad3_ CD_54157
+X6 Net-_U1-Pad10_ ? ? ? ? ? ? Net-_M1-Pad3_ Net-_M10-Pad2_ Net-_M3-Pad1_ Net-_M2-Pad1_ ? ? ? Net-_U1-Pad7_ Net-_M11-Pad3_ CD_54157
+X5 Net-_U1-Pad10_ ? ? ? ? ? ? Net-_M1-Pad3_ Net-_M11-Pad2_ Net-_M1-Pad1_ Net-_M4-Pad1_ ? ? ? Net-_U1-Pad7_ Net-_M11-Pad3_ CD_54157
+X7 Net-_U1-Pad9_ ? ? ? Net-_M11-Pad1_ Net-_M10-Pad1_ Net-_M13-Pad2_ Net-_M1-Pad3_ ? ? ? ? ? ? Net-_U1-Pad7_ Net-_M11-Pad3_ CD_54157
+M8 Net-_M4-Pad1_ Net-_M4-Pad2_ Net-_M11-Pad3_ Net-_M11-Pad3_ eSim_MOS_P
+M4 Net-_M4-Pad1_ Net-_M4-Pad2_ Net-_M1-Pad3_ Net-_M1-Pad3_ eSim_MOS_N
+M5 Net-_M1-Pad1_ Net-_M1-Pad2_ Net-_M11-Pad3_ Net-_M11-Pad3_ eSim_MOS_P
+M1 Net-_M1-Pad1_ Net-_M1-Pad2_ Net-_M1-Pad3_ Net-_M1-Pad3_ eSim_MOS_N
+M6 Net-_M2-Pad1_ Net-_M2-Pad2_ Net-_M11-Pad3_ Net-_M11-Pad3_ eSim_MOS_P
+M2 Net-_M2-Pad1_ Net-_M2-Pad2_ Net-_M1-Pad3_ Net-_M1-Pad3_ eSim_MOS_N
+M7 Net-_M3-Pad1_ Net-_M3-Pad2_ Net-_M11-Pad3_ Net-_M11-Pad3_ eSim_MOS_P
+M3 Net-_M3-Pad1_ Net-_M3-Pad2_ Net-_M1-Pad3_ Net-_M1-Pad3_ eSim_MOS_N
+M11 Net-_M11-Pad1_ Net-_M11-Pad2_ Net-_M11-Pad3_ Net-_M11-Pad3_ eSim_MOS_P
+M9 Net-_M11-Pad1_ Net-_M11-Pad2_ Net-_M1-Pad3_ Net-_M1-Pad3_ eSim_MOS_N
+M12 Net-_M10-Pad1_ Net-_M10-Pad2_ Net-_M11-Pad3_ Net-_M11-Pad3_ eSim_MOS_P
+M10 Net-_M10-Pad1_ Net-_M10-Pad2_ Net-_M1-Pad3_ Net-_M1-Pad3_ eSim_MOS_N
+M14 Net-_M13-Pad1_ Net-_M13-Pad2_ Net-_M11-Pad3_ Net-_M11-Pad3_ eSim_MOS_P
+M13 Net-_M13-Pad1_ Net-_M13-Pad2_ Net-_M1-Pad3_ Net-_M1-Pad3_ eSim_MOS_N
+U1 Net-_U1-Pad1_ Net-_U1-Pad2_ Net-_U1-Pad3_ Net-_U1-Pad4_ Net-_M13-Pad2_ Net-_M13-Pad1_ Net-_U1-Pad7_ Net-_M1-Pad3_ Net-_U1-Pad9_ Net-_U1-Pad10_ Net-_U1-Pad11_ Net-_U1-Pad12_ Net-_U1-Pad13_ Net-_U1-Pad14_ Net-_U1-Pad15_ Net-_M11-Pad3_ PORT
+
+.end
diff --git a/library/SubcircuitLibrary/CD54_HC_151/CD54_HC_151.cir.out b/library/SubcircuitLibrary/CD54_HC_151/CD54_HC_151.cir.out
new file mode 100644
index 00000000..e598a9f9
--- /dev/null
+++ b/library/SubcircuitLibrary/CD54_HC_151/CD54_HC_151.cir.out
@@ -0,0 +1,36 @@
+* c:\fossee\esim\library\subcircuitlibrary\cd54_hc_151\cd54_hc_151.cir
+
+.include CD54_157.sub
+.include PMOS-180nm.lib
+.include NMOS-180nm.lib
+x2 net-_u1-pad11_ ? ? ? ? ? ? net-_m1-pad3_ net-_m1-pad2_ net-_u1-pad1_ net-_u1-pad2_ ? ? ? net-_u1-pad7_ net-_m11-pad3_ CD54_157
+x1 net-_u1-pad11_ ? ? ? ? ? ? net-_m1-pad3_ net-_m4-pad2_ net-_u1-pad3_ net-_u1-pad4_ ? ? ? net-_u1-pad7_ net-_m11-pad3_ CD54_157
+x3 net-_u1-pad11_ ? ? ? ? ? ? net-_m1-pad3_ net-_m2-pad2_ net-_u1-pad14_ net-_u1-pad15_ ? ? ? net-_u1-pad7_ net-_m11-pad3_ CD54_157
+x4 net-_u1-pad11_ ? ? ? ? ? ? net-_m1-pad3_ net-_m3-pad2_ net-_u1-pad12_ net-_u1-pad13_ ? ? ? net-_u1-pad7_ net-_m11-pad3_ CD54_157
+x6 net-_u1-pad10_ ? ? ? ? ? ? net-_m1-pad3_ net-_m10-pad2_ net-_m3-pad1_ net-_m2-pad1_ ? ? ? net-_u1-pad7_ net-_m11-pad3_ CD54_157
+x5 net-_u1-pad10_ ? ? ? ? ? ? net-_m1-pad3_ net-_m11-pad2_ net-_m1-pad1_ net-_m4-pad1_ ? ? ? net-_u1-pad7_ net-_m11-pad3_ CD54_157
+x7 net-_u1-pad9_ ? ? ? net-_m11-pad1_ net-_m10-pad1_ net-_m13-pad2_ net-_m1-pad3_ ? ? ? ? ? ? net-_u1-pad7_ net-_m11-pad3_ CD54_157
+m8 net-_m4-pad1_ net-_m4-pad2_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1
+m4 net-_m4-pad1_ net-_m4-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1
+m5 net-_m1-pad1_ net-_m1-pad2_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1
+m1 net-_m1-pad1_ net-_m1-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1
+m6 net-_m2-pad1_ net-_m2-pad2_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1
+m2 net-_m2-pad1_ net-_m2-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1
+m7 net-_m3-pad1_ net-_m3-pad2_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1
+m3 net-_m3-pad1_ net-_m3-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1
+m11 net-_m11-pad1_ net-_m11-pad2_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1
+m9 net-_m11-pad1_ net-_m11-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1
+m12 net-_m10-pad1_ net-_m10-pad2_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1
+m10 net-_m10-pad1_ net-_m10-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1
+m14 net-_m13-pad1_ net-_m13-pad2_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1
+m13 net-_m13-pad1_ net-_m13-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1
+* u1 net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ net-_m13-pad2_ net-_m13-pad1_ net-_u1-pad7_ net-_m1-pad3_ net-_u1-pad9_ net-_u1-pad10_ net-_u1-pad11_ net-_u1-pad12_ net-_u1-pad13_ net-_u1-pad14_ net-_u1-pad15_ net-_m11-pad3_ port
+.tran 0e-00 0e-00 0e-00
+
+* Control Statements
+.control
+run
+print allv > plot_data_v.txt
+print alli > plot_data_i.txt
+.endc
+.end
diff --git a/library/SubcircuitLibrary/CD54_HC_151/CD54_HC_151.pro b/library/SubcircuitLibrary/CD54_HC_151/CD54_HC_151.pro
new file mode 100644
index 00000000..d7f78c3b
--- /dev/null
+++ b/library/SubcircuitLibrary/CD54_HC_151/CD54_HC_151.pro
@@ -0,0 +1,71 @@
+update=22/05/2015 07:44:53
+version=1
+last_client=kicad
+[general]
+version=1
+RootSch=
+BoardNm=
+[pcbnew]
+version=1
+LastNetListRead=
+UseCmpFile=1
+PadDrill=0.600000000000
+PadDrillOvalY=0.600000000000
+PadSizeH=1.500000000000
+PadSizeV=1.500000000000
+PcbTextSizeV=1.500000000000
+PcbTextSizeH=1.500000000000
+PcbTextThickness=0.300000000000
+ModuleTextSizeV=1.000000000000
+ModuleTextSizeH=1.000000000000
+ModuleTextSizeThickness=0.150000000000
+SolderMaskClearance=0.000000000000
+SolderMaskMinWidth=0.000000000000
+DrawSegmentWidth=0.200000000000
+BoardOutlineThickness=0.100000000000
+ModuleOutlineThickness=0.150000000000
+[cvpcb]
+version=1
+NetIExt=net
+[eeschema]
+version=1
+LibDir=
+[eeschema/libraries]
+LibName1=adc-dac
+LibName2=memory
+LibName3=xilinx
+LibName4=microcontrollers
+LibName5=dsp
+LibName6=microchip
+LibName7=analog_switches
+LibName8=motorola
+LibName9=texas
+LibName10=intel
+LibName11=audio
+LibName12=interface
+LibName13=digital-audio
+LibName14=philips
+LibName15=display
+LibName16=cypress
+LibName17=siliconi
+LibName18=opto
+LibName19=atmel
+LibName20=contrib
+LibName21=power
+LibName22=eSim_Plot
+LibName23=transistors
+LibName24=conn
+LibName25=eSim_User
+LibName26=regul
+LibName27=74xx
+LibName28=cmos4000
+LibName29=eSim_Analog
+LibName30=eSim_Devices
+LibName31=eSim_Digital
+LibName32=eSim_Hybrid
+LibName33=eSim_Miscellaneous
+LibName34=eSim_Power
+LibName35=eSim_Sources
+LibName36=eSim_Subckt
+LibName37=eSim_Nghdl
+LibName38=eSim_Ngveri
diff --git a/library/SubcircuitLibrary/CD54_HC_151/CD54_HC_151.sch b/library/SubcircuitLibrary/CD54_HC_151/CD54_HC_151.sch
new file mode 100644
index 00000000..15f83455
--- /dev/null
+++ b/library/SubcircuitLibrary/CD54_HC_151/CD54_HC_151.sch
@@ -0,0 +1,893 @@
+EESchema Schematic File Version 2
+LIBS:adc-dac
+LIBS:memory
+LIBS:xilinx
+LIBS:microcontrollers
+LIBS:dsp
+LIBS:microchip
+LIBS:analog_switches
+LIBS:motorola
+LIBS:texas
+LIBS:intel
+LIBS:audio
+LIBS:interface
+LIBS:digital-audio
+LIBS:philips
+LIBS:display
+LIBS:cypress
+LIBS:siliconi
+LIBS:opto
+LIBS:atmel
+LIBS:contrib
+LIBS:power
+LIBS:eSim_Plot
+LIBS:transistors
+LIBS:conn
+LIBS:eSim_User
+LIBS:regul
+LIBS:74xx
+LIBS:cmos4000
+LIBS:eSim_Analog
+LIBS:eSim_Devices
+LIBS:eSim_Digital
+LIBS:eSim_Hybrid
+LIBS:eSim_Miscellaneous
+LIBS:eSim_Power
+LIBS:eSim_Sources
+LIBS:eSim_Subckt
+LIBS:eSim_Nghdl
+LIBS:eSim_Ngveri
+LIBS:CD54HC151-cache
+EELAYER 25 0
+EELAYER END
+$Descr A4 11693 8268
+encoding utf-8
+Sheet 1 1
+Title ""
+Date ""
+Rev ""
+Comp ""
+Comment1 ""
+Comment2 ""
+Comment3 ""
+Comment4 ""
+$EndDescr
+$Comp
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+U 1 1 62BAA15B
+P 3200 3150
+F 0 "X2" H 3200 3200 60 0000 C CNN
+F 1 "CD_54157" V 3200 2900 60 0000 C CNN
+F 2 "" H 3200 3150 60 0001 C CNN
+F 3 "" H 3200 3150 60 0001 C CNN
+ 1 3200 3150
+ 1 0 0 -1
+$EndComp
+$Comp
+L CD_54157 X1
+U 1 1 62BAA15C
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+F 0 "X1" H 3200 1950 60 0000 C CNN
+F 1 "CD_54157" V 3200 1650 60 0000 C CNN
+F 2 "" H 3200 1900 60 0001 C CNN
+F 3 "" H 3200 1900 60 0001 C CNN
+ 1 3200 1900
+ 1 0 0 -1
+$EndComp
+$Comp
+L CD_54157 X3
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+F 2 "" H 3200 4450 60 0001 C CNN
+F 3 "" H 3200 4450 60 0001 C CNN
+ 1 3200 4450
+ 1 0 0 -1
+$EndComp
+NoConn ~ 2650 4400
+NoConn ~ 2650 4500
+NoConn ~ 2650 4600
+$Comp
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+F 2 "" H 3200 5750 60 0001 C CNN
+F 3 "" H 3200 5750 60 0001 C CNN
+ 1 3200 5750
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+NoConn ~ 2650 5800
+NoConn ~ 2650 5900
+NoConn ~ 2650 6000
+NoConn ~ 3750 6000
+$Comp
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+F 1 "CD_54157" V 5750 4300 60 0000 C CNN
+F 2 "" H 5750 4550 60 0001 C CNN
+F 3 "" H 5750 4550 60 0001 C CNN
+ 1 5750 4550
+ 1 0 0 -1
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+$Comp
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+F 2 "" H 4800 2450 29 0000 C CNN
+F 3 "" H 4600 2550 60 0000 C CNN
+ 1 4500 2750
+ 1 0 0 -1
+$EndComp
+$Comp
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+F 2 "" H 4750 3650 29 0000 C CNN
+F 3 "" H 4550 3550 60 0000 C CNN
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+ 1 0 0 1
+$EndComp
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+ 1 0 0 -1
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+ 1 0 0 1
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+F 3 "" H 4550 5000 60 0000 C CNN
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+ 1 0 0 -1
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+F 2 "" H 4750 6100 29 0000 C CNN
+F 3 "" H 4550 6000 60 0000 C CNN
+ 1 4500 6000
+ 1 0 0 1
+$EndComp
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+U 1 1 62BAA169
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+F 3 "" H 4550 6100 60 0000 C CNN
+ 1 4450 6300
+ 1 0 0 -1
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+$Comp
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+F 3 "" H 7100 5000 60 0000 C CNN
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+F 2 "" H 7300 5000 29 0000 C CNN
+F 3 "" H 7100 5100 60 0000 C CNN
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+$Comp
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+Wire Wire Line
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+Connection ~ 4750 4700
+Connection ~ 4750 5800
+Connection ~ 5000 4700
+Connection ~ 4800 2250
+Connection ~ 5000 3350
+Connection ~ 5000 2250
+Connection ~ 7500 3450
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+Connection ~ 8950 5850
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+Wire Wire Line
+ 8000 1350 2050 1350
+Connection ~ 2500 1750
+Wire Wire Line
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+Connection ~ 5100 3150
+NoConn ~ 2650 1850
+NoConn ~ 2650 1950
+NoConn ~ 2650 2050
+NoConn ~ 2650 2150
+NoConn ~ 2650 2250
+NoConn ~ 2650 2350
+NoConn ~ 3750 1950
+NoConn ~ 3750 2050
+NoConn ~ 3750 2150
+NoConn ~ 6300 3350
+NoConn ~ 6300 3450
+NoConn ~ 6300 3550
+NoConn ~ 5200 3250
+NoConn ~ 5200 3350
+NoConn ~ 5200 3450
+NoConn ~ 5200 3550
+NoConn ~ 5200 3650
+NoConn ~ 5200 3750
+NoConn ~ 5200 4500
+NoConn ~ 5200 4600
+NoConn ~ 5200 4700
+NoConn ~ 5200 4800
+NoConn ~ 5200 4900
+NoConn ~ 5200 5000
+NoConn ~ 2650 4700
+NoConn ~ 2650 4800
+NoConn ~ 2650 4900
+NoConn ~ 2650 3600
+NoConn ~ 2650 3500
+NoConn ~ 2650 3400
+NoConn ~ 2650 3300
+NoConn ~ 2650 3200
+NoConn ~ 2650 3100
+NoConn ~ 2650 6100
+NoConn ~ 2650 6200
+NoConn ~ 2650 5700
+NoConn ~ 8000 3850
+NoConn ~ 8000 3950
+NoConn ~ 8000 4050
+NoConn ~ 9100 3950
+NoConn ~ 9100 4050
+NoConn ~ 9100 4150
+NoConn ~ 9100 4250
+NoConn ~ 9100 4350
+NoConn ~ 9100 4450
+Wire Wire Line
+ 2650 2450 2550 2450
+Wire Wire Line
+ 2550 2450 2550 6950
+Wire Wire Line
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+Wire Wire Line
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+Connection ~ 2550 3700
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+Wire Wire Line
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+Wire Wire Line
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+Connection ~ 6300 1750
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+P 1850 4100
+F 0 "U1" H 1900 4200 30 0000 C CNN
+F 1 "PORT" H 1850 4100 30 0000 C CNN
+F 2 "" H 1850 4100 60 0000 C CNN
+F 3 "" H 1850 4100 60 0000 C CNN
+ 1 1850 4100
+ 1 0 0 -1
+$EndComp
+$Comp
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+F 2 "" H 1850 3900 60 0000 C CNN
+F 3 "" H 1850 3900 60 0000 C CNN
+ 2 1850 3900
+ 1 0 0 -1
+$EndComp
+$Comp
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+F 1 "PORT" H 1800 2800 30 0000 C CNN
+F 2 "" H 1800 2800 60 0000 C CNN
+F 3 "" H 1800 2800 60 0000 C CNN
+ 3 1800 2800
+ 1 0 0 -1
+$EndComp
+$Comp
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+F 1 "PORT" H 1800 2550 30 0000 C CNN
+F 2 "" H 1800 2550 60 0000 C CNN
+F 3 "" H 1800 2550 60 0000 C CNN
+ 4 1800 2550
+ 1 0 0 -1
+$EndComp
+$Comp
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+F 2 "" H 9800 4800 60 0000 C CNN
+F 3 "" H 9800 4800 60 0000 C CNN
+ 5 9800 4800
+ -1 0 0 -1
+$EndComp
+$Comp
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+F 1 "PORT" H 9800 5400 30 0000 C CNN
+F 2 "" H 9800 5400 60 0000 C CNN
+F 3 "" H 9800 5400 60 0000 C CNN
+ 6 9800 5400
+ -1 0 0 -1
+$EndComp
+$Comp
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+F 1 "PORT" H 1650 1150 30 0000 C CNN
+F 2 "" H 1650 1150 60 0000 C CNN
+F 3 "" H 1650 1150 60 0000 C CNN
+ 7 1650 1150
+ 1 0 0 -1
+$EndComp
+Wire Wire Line
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+Connection ~ 6700 1850
+$Comp
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+F 1 "PORT" H 1950 6950 30 0000 C CNN
+F 2 "" H 1950 6950 60 0000 C CNN
+F 3 "" H 1950 6950 60 0000 C CNN
+ 8 1950 6950
+ 1 0 0 -1
+$EndComp
+$Comp
+L PORT U1
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+F 1 "PORT" H 1800 1350 30 0000 C CNN
+F 2 "" H 1800 1350 60 0000 C CNN
+F 3 "" H 1800 1350 60 0000 C CNN
+ 9 1800 1350
+ 1 0 0 -1
+$EndComp
+$Comp
+L PORT U1
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+F 0 "U1" H 1850 1650 30 0000 C CNN
+F 1 "PORT" H 1800 1550 30 0000 C CNN
+F 2 "" H 1800 1550 60 0000 C CNN
+F 3 "" H 1800 1550 60 0000 C CNN
+ 10 1800 1550
+ 1 0 0 -1
+$EndComp
+$Comp
+L PORT U1
+U 11 1 62BAC516
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+F 0 "U1" H 1850 1850 30 0000 C CNN
+F 1 "PORT" H 1800 1750 30 0000 C CNN
+F 2 "" H 1800 1750 60 0000 C CNN
+F 3 "" H 1800 1750 60 0000 C CNN
+ 11 1800 1750
+ 1 0 0 -1
+$EndComp
+$Comp
+L PORT U1
+U 12 1 62BAC7C5
+P 1950 6650
+F 0 "U1" H 2000 6750 30 0000 C CNN
+F 1 "PORT" H 1950 6650 30 0000 C CNN
+F 2 "" H 1950 6650 60 0000 C CNN
+F 3 "" H 1950 6650 60 0000 C CNN
+ 12 1950 6650
+ 1 0 0 -1
+$EndComp
+$Comp
+L PORT U1
+U 13 1 62BAC8FA
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+F 0 "U1" H 2000 6550 30 0000 C CNN
+F 1 "PORT" H 1950 6450 30 0000 C CNN
+F 2 "" H 1950 6450 60 0000 C CNN
+F 3 "" H 1950 6450 60 0000 C CNN
+ 13 1950 6450
+ 1 0 0 -1
+$EndComp
+$Comp
+L PORT U1
+U 14 1 62BACA31
+P 1900 5300
+F 0 "U1" H 1950 5400 30 0000 C CNN
+F 1 "PORT" H 1900 5300 30 0000 C CNN
+F 2 "" H 1900 5300 60 0000 C CNN
+F 3 "" H 1900 5300 60 0000 C CNN
+ 14 1900 5300
+ 1 0 0 -1
+$EndComp
+$Comp
+L PORT U1
+U 15 1 62BACB72
+P 1900 5100
+F 0 "U1" H 1950 5200 30 0000 C CNN
+F 1 "PORT" H 1900 5100 30 0000 C CNN
+F 2 "" H 1900 5100 60 0000 C CNN
+F 3 "" H 1900 5100 60 0000 C CNN
+ 15 1900 5100
+ 1 0 0 -1
+$EndComp
+$Comp
+L PORT U1
+U 16 1 62BACE4B
+P 1800 900
+F 0 "U1" H 1850 1000 30 0000 C CNN
+F 1 "PORT" H 1800 900 30 0000 C CNN
+F 2 "" H 1800 900 60 0000 C CNN
+F 3 "" H 1800 900 60 0000 C CNN
+ 16 1800 900
+ 1 0 0 -1
+$EndComp
+NoConn ~ 3750 3200
+NoConn ~ 3750 3300
+NoConn ~ 3750 3400
+NoConn ~ 3750 4500
+NoConn ~ 3750 4600
+NoConn ~ 3750 4700
+NoConn ~ 3750 5800
+NoConn ~ 3750 5900
+NoConn ~ 6300 4600
+NoConn ~ 6300 4700
+NoConn ~ 6300 4800
+$EndSCHEMATC
diff --git a/library/SubcircuitLibrary/CD54_HC_151/CD54_HC_151.sub b/library/SubcircuitLibrary/CD54_HC_151/CD54_HC_151.sub
new file mode 100644
index 00000000..22b9bf48
--- /dev/null
+++ b/library/SubcircuitLibrary/CD54_HC_151/CD54_HC_151.sub
@@ -0,0 +1,30 @@
+* Subcircuit CD54_HC_151
+.subckt CD54_HC_151 net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ net-_m13-pad2_ net-_m13-pad1_ net-_u1-pad7_ net-_m1-pad3_ net-_u1-pad9_ net-_u1-pad10_ net-_u1-pad11_ net-_u1-pad12_ net-_u1-pad13_ net-_u1-pad14_ net-_u1-pad15_ net-_m11-pad3_
+* c:\fossee\esim\library\subcircuitlibrary\cd54_hc_151\cd54_hc_151.cir
+.include CD54_157.sub
+.include PMOS-180nm.lib
+.include NMOS-180nm.lib
+x2 net-_u1-pad11_ ? ? ? ? ? ? net-_m1-pad3_ net-_m1-pad2_ net-_u1-pad1_ net-_u1-pad2_ ? ? ? net-_u1-pad7_ net-_m11-pad3_ CD54_157
+x1 net-_u1-pad11_ ? ? ? ? ? ? net-_m1-pad3_ net-_m4-pad2_ net-_u1-pad3_ net-_u1-pad4_ ? ? ? net-_u1-pad7_ net-_m11-pad3_ CD54_157
+x3 net-_u1-pad11_ ? ? ? ? ? ? net-_m1-pad3_ net-_m2-pad2_ net-_u1-pad14_ net-_u1-pad15_ ? ? ? net-_u1-pad7_ net-_m11-pad3_ CD54_157
+x4 net-_u1-pad11_ ? ? ? ? ? ? net-_m1-pad3_ net-_m3-pad2_ net-_u1-pad12_ net-_u1-pad13_ ? ? ? net-_u1-pad7_ net-_m11-pad3_ CD54_157
+x6 net-_u1-pad10_ ? ? ? ? ? ? net-_m1-pad3_ net-_m10-pad2_ net-_m3-pad1_ net-_m2-pad1_ ? ? ? net-_u1-pad7_ net-_m11-pad3_ CD54_157
+x5 net-_u1-pad10_ ? ? ? ? ? ? net-_m1-pad3_ net-_m11-pad2_ net-_m1-pad1_ net-_m4-pad1_ ? ? ? net-_u1-pad7_ net-_m11-pad3_ CD54_157
+x7 net-_u1-pad9_ ? ? ? net-_m11-pad1_ net-_m10-pad1_ net-_m13-pad2_ net-_m1-pad3_ ? ? ? ? ? ? net-_u1-pad7_ net-_m11-pad3_ CD54_157
+m8 net-_m4-pad1_ net-_m4-pad2_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1
+m4 net-_m4-pad1_ net-_m4-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1
+m5 net-_m1-pad1_ net-_m1-pad2_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1
+m1 net-_m1-pad1_ net-_m1-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1
+m6 net-_m2-pad1_ net-_m2-pad2_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1
+m2 net-_m2-pad1_ net-_m2-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1
+m7 net-_m3-pad1_ net-_m3-pad2_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1
+m3 net-_m3-pad1_ net-_m3-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1
+m11 net-_m11-pad1_ net-_m11-pad2_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1
+m9 net-_m11-pad1_ net-_m11-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1
+m12 net-_m10-pad1_ net-_m10-pad2_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1
+m10 net-_m10-pad1_ net-_m10-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1
+m14 net-_m13-pad1_ net-_m13-pad2_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1
+m13 net-_m13-pad1_ net-_m13-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1
+* Control Statements
+
+.ends CD54_HC_151
\ No newline at end of file
diff --git a/library/SubcircuitLibrary/CD54_HC_151/CD54_HC_151_Previous_Values.xml b/library/SubcircuitLibrary/CD54_HC_151/CD54_HC_151_Previous_Values.xml
new file mode 100644
index 00000000..df20a2c2
--- /dev/null
+++ b/library/SubcircuitLibrary/CD54_HC_151/CD54_HC_151_Previous_Values.xml
@@ -0,0 +1 @@
+truefalsefalseHzHz0Volts or AmperesVolts or AmperesVolts or AmperesVolts or AmperesVolts or AmperesVolts or AmperesSecSecSecC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.libC:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.libC:\FOSSEE\eSim\library\SubcircuitLibrary\CD54_157C:\FOSSEE\eSim\library\SubcircuitLibrary\CD54_157C:\FOSSEE\eSim\library\SubcircuitLibrary\CD54_157C:\FOSSEE\eSim\library\SubcircuitLibrary\CD54_157C:\FOSSEE\eSim\library\SubcircuitLibrary\CD54_157C:\FOSSEE\eSim\library\SubcircuitLibrary\CD54_157C:\FOSSEE\eSim\library\SubcircuitLibrary\CD54_157
\ No newline at end of file
diff --git a/library/SubcircuitLibrary/CD54_HC_151/NMOS-180nm.lib b/library/SubcircuitLibrary/CD54_HC_151/NMOS-180nm.lib
new file mode 100644
index 00000000..51e9b119
--- /dev/null
+++ b/library/SubcircuitLibrary/CD54_HC_151/NMOS-180nm.lib
@@ -0,0 +1,13 @@
+.model CMOSN NMOS (LEVEL=8 VERSION=3.2 TNOM=27 TOX=4.1E-9 XJ=1E-7 NCH=2.3549E17 VTH0=0.3823463 K1=0.5810697
++ K2=4.774618E-3 K3=0.0431669 K3B=1.1498346 W0=1E-7 NLX=1.910552E-7 DVT0W=0 DVT1W=0 DVT2W=0
++ DVT0=1.2894824 DVT1=0.3622063 DVT2=0.0713729 U0=280.633249 UA=-1.208537E-9 UB=2.158625E-18
++ UC=5.342807E-11 VSAT=9.366802E4 A0=1.7593146 AGS=0.3939741 B0=-6.413949E-9 B1=-1E-7 KETA=-5.180424E-4
++ A1=0 A2=1 RDSW=105.5517558 PRWG=0.5 PRWB=-0.1998871 WR=1 WINT=7.904732E-10 LINT=1.571424E-8 XL=0
++ XW=-1E-8 DWG=1.297221E-9 DWB=1.479041E-9 VOFF=-0.0955434 NFACTOR=2.4358891 CIT=0 CDSC=2.4E-4 CDSCD=0
++ CDSCB=0 ETA0=3.104851E-3 ETAB=-2.512384E-5 DSUB=0.0167075 PCLM=0.8073191 PDIBLC1=0.1666161 PDIBLC2=3.112892E-3
++ PDIBLCB=-0.1 DROUT=0.7875618 PSCBE1=8E10 PSCBE2=9.213635E-10 PVAG=3.85243E-3 DELTA=0.01 RSH=6.7 MOBMOD=1
++ PRT=0 UTE=-1.5 KT1=-0.11 KT1L=0 KT2=0.022 UA1=4.31E-9 UB1=-7.61E-18 UC1=-5.6E-11 AT=3.3E4 WL=0 WLN=1
++ WW=0 WWN=1 WWL=0 LL=0 LLN=1 LW=0 LWN=1 LWL=0 CAPMOD=2 XPART=0.5 CGDO=7.08E-10 CGSO=7.08E-10 CGBO=1E-12
++ CJ=9.68858E-4 PB=0.8 MJ=0.3864502 CJSW=2.512138E-10 PBSW=0.809286 MJSW=0.1060414 CJSWG=3.3E-10 PBSWG=0.809286
++ MJSWG=0.1060414 CF=0 PVTH0=-1.192722E-3 PRDSW=-5 PK2=6.450505E-5 WKETA=-4.27294E-4 LKETA=-0.0104078
++ PU0=6.3268729 PUA=2.226552E-11 PUB=0 PVSAT=969.1480157 PETA0=1E-4 PKETA=-1.049509E-3)
diff --git a/library/SubcircuitLibrary/CD54_HC_151/PMOS-180nm.lib b/library/SubcircuitLibrary/CD54_HC_151/PMOS-180nm.lib
new file mode 100644
index 00000000..032b5b95
--- /dev/null
+++ b/library/SubcircuitLibrary/CD54_HC_151/PMOS-180nm.lib
@@ -0,0 +1,11 @@
+.model CMOSP PMOS (LEVEL=8 VERSION=3.2 TNOM=27 TOX=4.1E-9 XJ=1E-7 NCH=4.1589E17 VTH0=-0.3938813 K1=0.5479015
++ K2=0.0360586 K3=0.0993095 K3B=5.7086622 W0=1E-6 NLX=1.313191E-7 DVT0W=0 DVT1W=0 DVT2W=0 DVT0=0.4911363
++ DVT1=0.2227356 DVT2=0.1 U0=115.6852975 UA=1.505832E-9 UB=1E-21 UC=-1E-10 VSAT=1.329694E5 A0=1.7590478
++ AGS=0.3641621 B0=3.427126E-7 B1=1.062928E-6 KETA=0.0134667 A1=0.6859506 A2=0.3506788 RDSW=168.5705677
++ PRWG=0.5 PRWB=-0.4987371 WR=1 WINT=0 LINT=3.028832E-8 XL=0 XW=-1E-8 DWG=-2.349633E-8 DWB=-7.152486E-9
++ VOFF=-0.0994037 NFACTOR=1.9424315 CIT=0 CDSC=2.4E-4 CDSCD=0 CDSCB=0 ETA0=0.0608072 ETAB=-0.0426148
++ DSUB=0.7343015 PCLM=3.2579974 PDIBLC1=7.229527E-6 PDIBLC2=0.025389 PDIBLCB=-1E-3 DROUT=0 PSCBE1=1.454878E10
++ PSCBE2=4.202027E-9 PVAG=15 DELTA=0.01 RSH=7.8 MOBMOD=1 PRT=0 UTE=-1.5 KT1=-0.11 KT1L=0 KT2=0.022 UA1=4.31E-9
++ UB1=-7.61E-18 UC1=-5.6E-11 AT=3.3E4 WL=0 WLN=1 WW=0 WWN=1 WWL=0 LL=0 LLN=1 LW=0 LWN=1 LWL=0 CAPMOD=2 XPART=0.5
++ CGDO=6.32E-10 CGSO=6.32E-10 CGBO=1E-12 CJ=1.172138E-3 PB=0.8421173 MJ=0.4109788 CJSW=2.242609E-10 PBSW=0.8 + MJSW=0.3752089 CJSWG=4.22E-10 PBSWG=0.8 MJSWG=0.3752089 CF=0 PVTH0=1.888482E-3 PRDSW=11.5315407 PK2=1.559399E-3
++ WKETA=0.0319301 LKETA=2.955547E-3 PU0=-1.1105313 PUA=-4.62102E-11 PUB=1E-21 PVSAT=50 PETA0=1E-4 PKETA=-4.346368E-3)
diff --git a/library/SubcircuitLibrary/CD54_HC_151/README.md b/library/SubcircuitLibrary/CD54_HC_151/README.md
new file mode 100644
index 00000000..cc739100
--- /dev/null
+++ b/library/SubcircuitLibrary/CD54_HC_151/README.md
@@ -0,0 +1,21 @@
+
+# CD54HC151 IC
+
+It is 8:1 Multiplexer IC. CD54151 IC is designed with 180nm CMOS technology in eSim. It is 16 pin IC. The output depends on the select lines.
+## Usage/Examples
+
+Multiplexers
+## Documentation
+
+To know the details of CD54HC151 IC please go through with the documentation : [CD54HC151_datasheet](https://www.ti.com/lit/gpn/cd54hc151)
+
+## Comments/Notes
+
+Please note this is a complete digital IC. It works fine at the time of simulation.
+
+## Contributer
+
+Name: Ankush Mondal
+Email: mondalankush369@gmail.com
+Year: 2022
+Position: FOSSEE Summer Fellow 2022
\ No newline at end of file
diff --git a/library/SubcircuitLibrary/CD54_HC_151/analysis b/library/SubcircuitLibrary/CD54_HC_151/analysis
new file mode 100644
index 00000000..ebd5c0a9
--- /dev/null
+++ b/library/SubcircuitLibrary/CD54_HC_151/analysis
@@ -0,0 +1 @@
+.tran 0e-00 0e-00 0e-00
\ No newline at end of file
--
cgit