From 47d4daff2ab483c4cdfb82117ef0d25d53832214 Mon Sep 17 00:00:00 2001
From: rahulp13
Date: Fri, 21 Feb 2020 12:36:46 +0530
Subject: restructured eSim libraries

---
 .../SubcircuitLibrary/4to16_demux/3_and-cache.lib  |  61 ++
 library/SubcircuitLibrary/4to16_demux/3_and.cir    |  13 +
 .../SubcircuitLibrary/4to16_demux/3_and.cir.out    |  20 +
 library/SubcircuitLibrary/4to16_demux/3_and.pro    |  44 +
 library/SubcircuitLibrary/4to16_demux/3_and.sch    | 130 +++
 library/SubcircuitLibrary/4to16_demux/3_and.sub    |  14 +
 .../4to16_demux/3_and_Previous_Values.xml          |   1 +
 .../4to16_demux/4to16_demux-cache.lib              |  97 +++
 .../SubcircuitLibrary/4to16_demux/4to16_demux.cir  |  32 +
 .../4to16_demux/4to16_demux.cir.out                |  49 ++
 .../SubcircuitLibrary/4to16_demux/4to16_demux.pro  |  43 +
 .../SubcircuitLibrary/4to16_demux/4to16_demux.sch  | 889 +++++++++++++++++++++
 .../SubcircuitLibrary/4to16_demux/4to16_demux.sub  |  43 +
 .../4to16_demux/4to16_demux_Previous_Values.xml    |   1 +
 .../SubcircuitLibrary/4to16_demux/5_and-cache.lib  |  79 ++
 library/SubcircuitLibrary/4to16_demux/5_and.cir    |  14 +
 .../SubcircuitLibrary/4to16_demux/5_and.cir.out    |  22 +
 library/SubcircuitLibrary/4to16_demux/5_and.pro    |  50 ++
 library/SubcircuitLibrary/4to16_demux/5_and.sch    | 171 ++++
 library/SubcircuitLibrary/4to16_demux/5_and.sub    |  16 +
 .../4to16_demux/5_and_Previous_Values.xml          |   1 +
 .../SubcircuitLibrary/4to16_demux/5_nand-cache.lib |  78 ++
 library/SubcircuitLibrary/4to16_demux/5_nand.cir   |  13 +
 .../SubcircuitLibrary/4to16_demux/5_nand.cir.out   |  18 +
 library/SubcircuitLibrary/4to16_demux/5_nand.pro   |  83 ++
 library/SubcircuitLibrary/4to16_demux/5_nand.sch   | 175 ++++
 library/SubcircuitLibrary/4to16_demux/5_nand.sub   |  12 +
 .../4to16_demux/5_nand_Previous_Values.xml         |   1 +
 library/SubcircuitLibrary/4to16_demux/analysis     |   1 +
 29 files changed, 2171 insertions(+)
 create mode 100644 library/SubcircuitLibrary/4to16_demux/3_and-cache.lib
 create mode 100644 library/SubcircuitLibrary/4to16_demux/3_and.cir
 create mode 100644 library/SubcircuitLibrary/4to16_demux/3_and.cir.out
 create mode 100644 library/SubcircuitLibrary/4to16_demux/3_and.pro
 create mode 100644 library/SubcircuitLibrary/4to16_demux/3_and.sch
 create mode 100644 library/SubcircuitLibrary/4to16_demux/3_and.sub
 create mode 100644 library/SubcircuitLibrary/4to16_demux/3_and_Previous_Values.xml
 create mode 100644 library/SubcircuitLibrary/4to16_demux/4to16_demux-cache.lib
 create mode 100644 library/SubcircuitLibrary/4to16_demux/4to16_demux.cir
 create mode 100644 library/SubcircuitLibrary/4to16_demux/4to16_demux.cir.out
 create mode 100644 library/SubcircuitLibrary/4to16_demux/4to16_demux.pro
 create mode 100644 library/SubcircuitLibrary/4to16_demux/4to16_demux.sch
 create mode 100644 library/SubcircuitLibrary/4to16_demux/4to16_demux.sub
 create mode 100644 library/SubcircuitLibrary/4to16_demux/4to16_demux_Previous_Values.xml
 create mode 100644 library/SubcircuitLibrary/4to16_demux/5_and-cache.lib
 create mode 100644 library/SubcircuitLibrary/4to16_demux/5_and.cir
 create mode 100644 library/SubcircuitLibrary/4to16_demux/5_and.cir.out
 create mode 100644 library/SubcircuitLibrary/4to16_demux/5_and.pro
 create mode 100644 library/SubcircuitLibrary/4to16_demux/5_and.sch
 create mode 100644 library/SubcircuitLibrary/4to16_demux/5_and.sub
 create mode 100644 library/SubcircuitLibrary/4to16_demux/5_and_Previous_Values.xml
 create mode 100644 library/SubcircuitLibrary/4to16_demux/5_nand-cache.lib
 create mode 100644 library/SubcircuitLibrary/4to16_demux/5_nand.cir
 create mode 100644 library/SubcircuitLibrary/4to16_demux/5_nand.cir.out
 create mode 100644 library/SubcircuitLibrary/4to16_demux/5_nand.pro
 create mode 100644 library/SubcircuitLibrary/4to16_demux/5_nand.sch
 create mode 100644 library/SubcircuitLibrary/4to16_demux/5_nand.sub
 create mode 100644 library/SubcircuitLibrary/4to16_demux/5_nand_Previous_Values.xml
 create mode 100644 library/SubcircuitLibrary/4to16_demux/analysis

(limited to 'library/SubcircuitLibrary/4to16_demux')

diff --git a/library/SubcircuitLibrary/4to16_demux/3_and-cache.lib b/library/SubcircuitLibrary/4to16_demux/3_and-cache.lib
new file mode 100644
index 00000000..af058641
--- /dev/null
+++ b/library/SubcircuitLibrary/4to16_demux/3_and-cache.lib
@@ -0,0 +1,61 @@
+EESchema-LIBRARY Version 2.3
+#encoding utf-8
+#
+# PORT
+#
+DEF PORT U 0 40 Y Y 26 F N
+F0 "U" 50 100 30 H V C CNN
+F1 "PORT" 0 0 30 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0
+A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50
+S -100 50 100 -50 0 1 0 N
+X ~ 1 250 0 100 L 30 30 1 1 B
+X ~ 2 250 0 100 L 30 30 2 1 B
+X ~ 3 250 0 100 L 30 30 3 1 B
+X ~ 4 250 0 100 L 30 30 4 1 B
+X ~ 5 250 0 100 L 30 30 5 1 B
+X ~ 6 250 0 100 L 30 30 6 1 B
+X ~ 7 250 0 100 L 30 30 7 1 B
+X ~ 8 250 0 100 L 30 30 8 1 B
+X ~ 9 250 0 100 L 30 30 9 1 B
+X ~ 10 250 0 100 L 30 30 10 1 B
+X ~ 11 250 0 100 L 30 30 11 1 B
+X ~ 12 250 0 100 L 30 30 12 1 B
+X ~ 13 250 0 100 L 30 30 13 1 B
+X ~ 14 250 0 100 L 30 30 14 1 B
+X ~ 15 250 0 100 L 30 30 15 1 B
+X ~ 16 250 0 100 L 30 30 16 1 B
+X ~ 17 250 0 100 L 30 30 17 1 B
+X ~ 18 250 0 100 L 30 30 18 1 B
+X ~ 19 250 0 100 L 30 30 19 1 B
+X ~ 20 250 0 100 L 30 30 20 1 B
+X ~ 21 250 0 100 L 30 30 21 1 B
+X ~ 22 250 0 100 L 30 30 22 1 B
+X ~ 23 250 0 100 L 30 30 23 1 B
+X ~ 24 250 0 100 L 30 30 24 1 B
+X ~ 25 250 0 100 L 30 30 25 1 B
+X ~ 26 250 0 100 L 30 30 26 1 B
+ENDDRAW
+ENDDEF
+#
+# d_and
+#
+DEF d_and U 0 40 Y Y 1 F N
+F0 "U" 0 0 60 H V C CNN
+F1 "d_and" 50 100 60 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+A 149 50 100 -894 0 0 1 0 N 150 -50 250 50
+A 150 49 100 6 900 0 1 0 N 250 50 150 150
+P 4 0 1 0  150 -50  -250 -50  -250 150  150 150 N
+X IN1 1 -450 100 200 R 50 50 1 1 I
+X IN2 2 -450 0 200 R 50 50 1 1 I
+X OUT 3 450 50 200 L 50 50 1 1 O
+ENDDRAW
+ENDDEF
+#
+#End Library
diff --git a/library/SubcircuitLibrary/4to16_demux/3_and.cir b/library/SubcircuitLibrary/4to16_demux/3_and.cir
new file mode 100644
index 00000000..ba296cf0
--- /dev/null
+++ b/library/SubcircuitLibrary/4to16_demux/3_and.cir
@@ -0,0 +1,13 @@
+* C:\Users\malli\eSim\src\SubcircuitLibrary\3_and\3_and.cir
+
+* EESchema Netlist Version 1.1 (Spice format) creation date: 03/26/19 18:42:57
+
+* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N
+* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0
+
+* Sheet Name: /
+U2  Net-_U1-Pad1_ Net-_U1-Pad2_ Net-_U2-Pad3_ d_and		
+U3  Net-_U2-Pad3_ Net-_U1-Pad3_ Net-_U1-Pad4_ d_and		
+U1  Net-_U1-Pad1_ Net-_U1-Pad2_ Net-_U1-Pad3_ Net-_U1-Pad4_ PORT		
+
+.end
diff --git a/library/SubcircuitLibrary/4to16_demux/3_and.cir.out b/library/SubcircuitLibrary/4to16_demux/3_and.cir.out
new file mode 100644
index 00000000..d7cf79a0
--- /dev/null
+++ b/library/SubcircuitLibrary/4to16_demux/3_and.cir.out
@@ -0,0 +1,20 @@
+* c:\users\malli\esim\src\subcircuitlibrary\3_and\3_and.cir
+
+* u2  net-_u1-pad1_ net-_u1-pad2_ net-_u2-pad3_ d_and
+* u3  net-_u2-pad3_ net-_u1-pad3_ net-_u1-pad4_ d_and
+* u1  net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ port
+a1 [net-_u1-pad1_ net-_u1-pad2_ ] net-_u2-pad3_ u2
+a2 [net-_u2-pad3_ net-_u1-pad3_ ] net-_u1-pad4_ u3
+* Schematic Name: d_and, NgSpice Name: d_and
+.model u2 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 
+* Schematic Name: d_and, NgSpice Name: d_and
+.model u3 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 
+.tran 0e-00 0e-00 0e-00
+
+* Control Statements 
+.control
+run
+print allv > plot_data_v.txt
+print alli > plot_data_i.txt
+.endc
+.end
diff --git a/library/SubcircuitLibrary/4to16_demux/3_and.pro b/library/SubcircuitLibrary/4to16_demux/3_and.pro
new file mode 100644
index 00000000..76df4655
--- /dev/null
+++ b/library/SubcircuitLibrary/4to16_demux/3_and.pro
@@ -0,0 +1,44 @@
+update=05/31/19 15:26:09
+version=1
+last_client=eeschema
+[general]
+version=1
+RootSch=
+BoardNm=
+[pcbnew]
+version=1
+LastNetListRead=
+UseCmpFile=1
+PadDrill=0.600000000000
+PadDrillOvalY=0.600000000000
+PadSizeH=1.500000000000
+PadSizeV=1.500000000000
+PcbTextSizeV=1.500000000000
+PcbTextSizeH=1.500000000000
+PcbTextThickness=0.300000000000
+ModuleTextSizeV=1.000000000000
+ModuleTextSizeH=1.000000000000
+ModuleTextSizeThickness=0.150000000000
+SolderMaskClearance=0.000000000000
+SolderMaskMinWidth=0.000000000000
+DrawSegmentWidth=0.200000000000
+BoardOutlineThickness=0.100000000000
+ModuleOutlineThickness=0.150000000000
+[cvpcb]
+version=1
+NetIExt=net
+[eeschema]
+version=1
+LibDir=../../../kicadSchematicLibrary
+[eeschema/libraries]
+LibName1=eSim_Analog
+LibName2=eSim_Devices
+LibName3=eSim_Digital
+LibName4=eSim_Hybrid
+LibName5=eSim_Miscellaneous
+LibName6=eSim_Plot
+LibName7=eSim_Power
+LibName8=eSim_PSpice
+LibName9=eSim_Sources
+LibName10=eSim_Subckt
+LibName11=eSim_User
diff --git a/library/SubcircuitLibrary/4to16_demux/3_and.sch b/library/SubcircuitLibrary/4to16_demux/3_and.sch
new file mode 100644
index 00000000..d6ac89f9
--- /dev/null
+++ b/library/SubcircuitLibrary/4to16_demux/3_and.sch
@@ -0,0 +1,130 @@
+EESchema Schematic File Version 2
+LIBS:power
+LIBS:texas
+LIBS:intel
+LIBS:audio
+LIBS:interface
+LIBS:digital-audio
+LIBS:philips
+LIBS:display
+LIBS:cypress
+LIBS:siliconi
+LIBS:opto
+LIBS:atmel
+LIBS:contrib
+LIBS:valves
+LIBS:eSim_Analog
+LIBS:eSim_Devices
+LIBS:eSim_Digital
+LIBS:eSim_Hybrid
+LIBS:eSim_Miscellaneous
+LIBS:eSim_Plot
+LIBS:eSim_Power
+LIBS:eSim_PSpice
+LIBS:eSim_Sources
+LIBS:eSim_Subckt
+LIBS:eSim_User
+LIBS:3_and-cache
+EELAYER 25 0
+EELAYER END
+$Descr A4 11693 8268
+encoding utf-8
+Sheet 1 1
+Title ""
+Date ""
+Rev ""
+Comp ""
+Comment1 ""
+Comment2 ""
+Comment3 ""
+Comment4 ""
+$EndDescr
+$Comp
+L d_and U2
+U 1 1 5C9A24D8
+P 4250 2700
+F 0 "U2" H 4250 2700 60  0000 C CNN
+F 1 "d_and" H 4300 2800 60  0000 C CNN
+F 2 "" H 4250 2700 60  0000 C CNN
+F 3 "" H 4250 2700 60  0000 C CNN
+	1    4250 2700
+	1    0    0    -1  
+$EndComp
+$Comp
+L d_and U3
+U 1 1 5C9A2538
+P 5150 2900
+F 0 "U3" H 5150 2900 60  0000 C CNN
+F 1 "d_and" H 5200 3000 60  0000 C CNN
+F 2 "" H 5150 2900 60  0000 C CNN
+F 3 "" H 5150 2900 60  0000 C CNN
+	1    5150 2900
+	1    0    0    -1  
+$EndComp
+$Comp
+L PORT U1
+U 1 1 5C9A259A
+P 3050 2600
+F 0 "U1" H 3100 2700 30  0000 C CNN
+F 1 "PORT" H 3050 2600 30  0000 C CNN
+F 2 "" H 3050 2600 60  0000 C CNN
+F 3 "" H 3050 2600 60  0000 C CNN
+	1    3050 2600
+	1    0    0    -1  
+$EndComp
+$Comp
+L PORT U1
+U 2 1 5C9A25D9
+P 3050 2800
+F 0 "U1" H 3100 2900 30  0000 C CNN
+F 1 "PORT" H 3050 2800 30  0000 C CNN
+F 2 "" H 3050 2800 60  0000 C CNN
+F 3 "" H 3050 2800 60  0000 C CNN
+	2    3050 2800
+	1    0    0    -1  
+$EndComp
+$Comp
+L PORT U1
+U 3 1 5C9A260A
+P 3050 3100
+F 0 "U1" H 3100 3200 30  0000 C CNN
+F 1 "PORT" H 3050 3100 30  0000 C CNN
+F 2 "" H 3050 3100 60  0000 C CNN
+F 3 "" H 3050 3100 60  0000 C CNN
+	3    3050 3100
+	1    0    0    -1  
+$EndComp
+$Comp
+L PORT U1
+U 4 1 5C9A2637
+P 6900 2850
+F 0 "U1" H 6950 2950 30  0000 C CNN
+F 1 "PORT" H 6900 2850 30  0000 C CNN
+F 2 "" H 6900 2850 60  0000 C CNN
+F 3 "" H 6900 2850 60  0000 C CNN
+	4    6900 2850
+	-1   0    0    1   
+$EndComp
+Wire Wire Line
+	4700 2650 4700 2800
+Wire Wire Line
+	5600 2850 6650 2850
+Wire Wire Line
+	3800 2600 3300 2600
+Wire Wire Line
+	3800 2700 3300 2700
+Wire Wire Line
+	3300 2700 3300 2800
+Wire Wire Line
+	3300 3100 4700 3100
+Wire Wire Line
+	4700 3100 4700 2900
+Text Notes 3500 2600 0    60   ~ 12
+in1
+Text Notes 3450 2800 0    60   ~ 12
+in2\n
+Text Notes 3500 3100 0    60   ~ 12
+in3
+Text Notes 6100 2850 0    60   ~ 12
+out
+$EndSCHEMATC
diff --git a/library/SubcircuitLibrary/4to16_demux/3_and.sub b/library/SubcircuitLibrary/4to16_demux/3_and.sub
new file mode 100644
index 00000000..3d9120bb
--- /dev/null
+++ b/library/SubcircuitLibrary/4to16_demux/3_and.sub
@@ -0,0 +1,14 @@
+* Subcircuit 3_and
+.subckt 3_and net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ 
+* c:\users\malli\esim\src\subcircuitlibrary\3_and\3_and.cir
+* u2  net-_u1-pad1_ net-_u1-pad2_ net-_u2-pad3_ d_and
+* u3  net-_u2-pad3_ net-_u1-pad3_ net-_u1-pad4_ d_and
+a1 [net-_u1-pad1_ net-_u1-pad2_ ] net-_u2-pad3_ u2
+a2 [net-_u2-pad3_ net-_u1-pad3_ ] net-_u1-pad4_ u3
+* Schematic Name: d_and, NgSpice Name: d_and
+.model u2 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )
+* Schematic Name: d_and, NgSpice Name: d_and
+.model u3 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )
+* Control Statements
+
+.ends 3_and
\ No newline at end of file
diff --git a/library/SubcircuitLibrary/4to16_demux/3_and_Previous_Values.xml b/library/SubcircuitLibrary/4to16_demux/3_and_Previous_Values.xml
new file mode 100644
index 00000000..abc5faaa
--- /dev/null
+++ b/library/SubcircuitLibrary/4to16_demux/3_and_Previous_Values.xml
@@ -0,0 +1 @@
+<KicadtoNgspice><source /><model><u2 name="type">d_and<field1 name="Enter Fall Delay (default=1.0e-9)" /><field2 name="Enter Input Load (default=1.0e-12)" /><field3 name="Enter Rise Delay (default=1.0e-9)" /></u2><u3 name="type">d_and<field4 name="Enter Fall Delay (default=1.0e-9)" /><field5 name="Enter Input Load (default=1.0e-12)" /><field6 name="Enter Rise Delay (default=1.0e-9)" /></u3></model><devicemodel /><subcircuit /><analysis><ac><field1 name="Lin">true</field1><field2 name="Dec">false</field2><field3 name="Oct">false</field3><field4 name="Start Frequency" /><field5 name="Stop Frequency" /><field6 name="No. of points" /><field7 name="Start Fre Combo">Hz</field7><field8 name="Stop Fre Combo">Hz</field8></ac><dc><field1 name="Source 1" /><field2 name="Start" /><field3 name="Increment" /><field4 name="Stop" /><field5 name="Operating Point">0</field5><field6 name="Start Combo">Volts or Amperes</field6><field7 name="Increment Combo">Volts or Amperes</field7><field8 name="Stop Combo">Volts or Amperes</field8><field9 name="Source 2" /><field10 name="Start" /><field11 name="Increment" /><field12 name="Stop" /><field13 name="Start Combo">Volts or Amperes</field13><field14 name="Increment Combo">Volts or Amperes</field14><field15 name="Stop Combo">Volts or Amperes</field15></dc><tran><field1 name="Start Time" /><field2 name="Step Time" /><field3 name="Stop Time" /><field4 name="Start Combo">Sec</field4><field5 name="Step Combo">Sec</field5><field6 name="Stop Combo">Sec</field6></tran></analysis></KicadtoNgspice>
\ No newline at end of file
diff --git a/library/SubcircuitLibrary/4to16_demux/4to16_demux-cache.lib b/library/SubcircuitLibrary/4to16_demux/4to16_demux-cache.lib
new file mode 100644
index 00000000..898ea926
--- /dev/null
+++ b/library/SubcircuitLibrary/4to16_demux/4to16_demux-cache.lib
@@ -0,0 +1,97 @@
+EESchema-LIBRARY Version 2.3
+#encoding utf-8
+#
+# 5_nand
+#
+DEF 5_nand X 0 40 Y Y 1 F N
+F0 "X" 50 -100 60 H V C CNN
+F1 "5_nand" 100 150 60 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+A 100 0 255 787 -787 0 1 0 N 150 250 150 -250
+P 2 0 1 0 -250 250 150 250 N
+P 3 0 1 0 -250 250 -250 -250 150 -250 N
+X in1 1 -450 200 200 R 50 50 1 1 I
+X in2 2 -450 100 200 R 50 50 1 1 I
+X in3 3 -450 0 200 R 50 50 1 1 I
+X in4 4 -450 -100 200 R 50 50 1 1 I
+X in5 5 -450 -200 200 R 50 50 1 1 I
+X out 6 550 0 200 L 50 50 1 1 O I
+ENDDRAW
+ENDDEF
+#
+# PORT
+#
+DEF PORT U 0 40 Y Y 26 F N
+F0 "U" 50 100 30 H V C CNN
+F1 "PORT" 0 0 30 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0
+A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50
+S -100 50 100 -50 0 1 0 N
+X ~ 1 250 0 100 L 30 30 1 1 B
+X ~ 2 250 0 100 L 30 30 2 1 B
+X ~ 3 250 0 100 L 30 30 3 1 B
+X ~ 4 250 0 100 L 30 30 4 1 B
+X ~ 5 250 0 100 L 30 30 5 1 B
+X ~ 6 250 0 100 L 30 30 6 1 B
+X ~ 7 250 0 100 L 30 30 7 1 B
+X ~ 8 250 0 100 L 30 30 8 1 B
+X ~ 9 250 0 100 L 30 30 9 1 B
+X ~ 10 250 0 100 L 30 30 10 1 B
+X ~ 11 250 0 100 L 30 30 11 1 B
+X ~ 12 250 0 100 L 30 30 12 1 B
+X ~ 13 250 0 100 L 30 30 13 1 B
+X ~ 14 250 0 100 L 30 30 14 1 B
+X ~ 15 250 0 100 L 30 30 15 1 B
+X ~ 16 250 0 100 L 30 30 16 1 B
+X ~ 17 250 0 100 L 30 30 17 1 B
+X ~ 18 250 0 100 L 30 30 18 1 B
+X ~ 19 250 0 100 L 30 30 19 1 B
+X ~ 20 250 0 100 L 30 30 20 1 B
+X ~ 21 250 0 100 L 30 30 21 1 B
+X ~ 22 250 0 100 L 30 30 22 1 B
+X ~ 23 250 0 100 L 30 30 23 1 B
+X ~ 24 250 0 100 L 30 30 24 1 B
+X ~ 25 250 0 100 L 30 30 25 1 B
+X ~ 26 250 0 100 L 30 30 26 1 B
+ENDDRAW
+ENDDEF
+#
+# d_inverter
+#
+DEF d_inverter U 0 40 Y Y 1 F N
+F0 "U" 0 -100 60 H V C CNN
+F1 "d_inverter" 0 150 60 H V C CNN
+F2 "" 50 -50 60 H V C CNN
+F3 "" 50 -50 60 H V C CNN
+DRAW
+P 4 0 1 0 -100 50 -100 -50 100 0 -100 50 N
+X ~ 1 -300 0 200 R 50 50 1 1 I
+X ~ 2 300 0 200 L 50 50 1 1 O I
+ENDDRAW
+ENDDEF
+#
+# d_nor
+#
+DEF d_nor U 0 40 Y Y 1 F N
+F0 "U" 0 0 60 H V C CNN
+F1 "d_nor" 50 100 60 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+A -450 50 224 266 -266 0 1 0 N -250 150 -250 -50
+A -25 -124 325 574 323 0 1 0 N 150 150 250 50
+A 74 125 191 -665 -231 0 1 0 N 150 -50 250 50
+P 2 0 1 0 -250 -50 150 -50 N
+P 2 0 1 0 -250 150 150 150 N
+X IN1 1 -450 100 215 R 50 50 1 1 I
+X IN2 2 -450 0 215 R 50 50 1 1 I
+X OUT 3 450 50 200 L 50 50 1 1 O I
+ENDDRAW
+ENDDEF
+#
+#End Library
diff --git a/library/SubcircuitLibrary/4to16_demux/4to16_demux.cir b/library/SubcircuitLibrary/4to16_demux/4to16_demux.cir
new file mode 100644
index 00000000..c97c2f8b
--- /dev/null
+++ b/library/SubcircuitLibrary/4to16_demux/4to16_demux.cir
@@ -0,0 +1,32 @@
+* /home/mallikarjuna/Downloads/eSim-1.1.2/src/SubcircuitLibrary/4to16_demux/4to16_demux.cir
+
+* EESchema Netlist Version 1.1 (Spice format) creation date: Fri Jun 21 17:01:07 2019
+
+* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N
+* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0
+
+* Sheet Name: /
+U3  Net-_U1-Pad23_ Net-_U3-Pad2_ d_inverter		
+U4  Net-_U1-Pad22_ Net-_U4-Pad2_ d_inverter		
+U5  Net-_U1-Pad21_ Net-_U5-Pad2_ d_inverter		
+U6  Net-_U1-Pad20_ Net-_U6-Pad2_ d_inverter		
+U2  Net-_U1-Pad19_ Net-_U1-Pad18_ Net-_U2-Pad3_ d_nor		
+U1  Net-_U1-Pad1_ Net-_U1-Pad2_ Net-_U1-Pad3_ Net-_U1-Pad4_ Net-_U1-Pad5_ Net-_U1-Pad6_ Net-_U1-Pad7_ Net-_U1-Pad8_ Net-_U1-Pad9_ Net-_U1-Pad10_ Net-_U1-Pad11_ ? Net-_U1-Pad13_ Net-_U1-Pad14_ Net-_U1-Pad15_ Net-_U1-Pad16_ Net-_U1-Pad17_ Net-_U1-Pad18_ Net-_U1-Pad19_ Net-_U1-Pad20_ Net-_U1-Pad21_ Net-_U1-Pad22_ Net-_U1-Pad23_ ? PORT		
+X1  Net-_U3-Pad2_ Net-_U4-Pad2_ Net-_U5-Pad2_ Net-_U6-Pad2_ Net-_U2-Pad3_ Net-_U1-Pad1_ 5_nand		
+X2  Net-_U1-Pad23_ Net-_U4-Pad2_ Net-_U5-Pad2_ Net-_U6-Pad2_ Net-_U2-Pad3_ Net-_U1-Pad2_ 5_nand		
+X3  Net-_U3-Pad2_ Net-_U1-Pad22_ Net-_U5-Pad2_ Net-_U6-Pad2_ Net-_U2-Pad3_ Net-_U1-Pad3_ 5_nand		
+X4  Net-_U1-Pad23_ Net-_U1-Pad22_ Net-_U5-Pad2_ Net-_U6-Pad2_ Net-_U2-Pad3_ Net-_U1-Pad4_ 5_nand		
+X5  Net-_U3-Pad2_ Net-_U4-Pad2_ Net-_U1-Pad21_ Net-_U6-Pad2_ Net-_U2-Pad3_ Net-_U1-Pad5_ 5_nand		
+X6  Net-_U1-Pad23_ Net-_U4-Pad2_ Net-_U1-Pad21_ Net-_U6-Pad2_ Net-_U2-Pad3_ Net-_U1-Pad6_ 5_nand		
+X7  Net-_U3-Pad2_ Net-_U1-Pad22_ Net-_U1-Pad21_ Net-_U6-Pad2_ Net-_U2-Pad3_ Net-_U1-Pad7_ 5_nand		
+X8  Net-_U1-Pad23_ Net-_U1-Pad22_ Net-_U1-Pad21_ Net-_U6-Pad2_ Net-_U2-Pad3_ Net-_U1-Pad8_ 5_nand		
+X9  Net-_U3-Pad2_ Net-_U4-Pad2_ Net-_U5-Pad2_ Net-_U1-Pad20_ Net-_U2-Pad3_ Net-_U1-Pad9_ 5_nand		
+X10  Net-_U1-Pad23_ Net-_U4-Pad2_ Net-_U5-Pad2_ Net-_U1-Pad20_ Net-_U2-Pad3_ Net-_U1-Pad10_ 5_nand		
+X11  Net-_U3-Pad2_ Net-_U1-Pad22_ Net-_U5-Pad2_ Net-_U1-Pad20_ Net-_U2-Pad3_ Net-_U1-Pad11_ 5_nand		
+X12  Net-_U1-Pad23_ Net-_U1-Pad22_ Net-_U5-Pad2_ Net-_U1-Pad20_ Net-_U2-Pad3_ Net-_U1-Pad13_ 5_nand		
+X13  Net-_U3-Pad2_ Net-_U4-Pad2_ Net-_U1-Pad21_ Net-_U1-Pad20_ Net-_U2-Pad3_ Net-_U1-Pad14_ 5_nand		
+X14  Net-_U1-Pad23_ Net-_U4-Pad2_ Net-_U1-Pad21_ Net-_U1-Pad20_ Net-_U2-Pad3_ Net-_U1-Pad15_ 5_nand		
+X15  Net-_U3-Pad2_ Net-_U1-Pad22_ Net-_U1-Pad21_ Net-_U1-Pad20_ Net-_U2-Pad3_ Net-_U1-Pad16_ 5_nand		
+X16  Net-_U1-Pad23_ Net-_U1-Pad22_ Net-_U1-Pad21_ Net-_U1-Pad20_ Net-_U2-Pad3_ Net-_U1-Pad17_ 5_nand		
+
+.end
diff --git a/library/SubcircuitLibrary/4to16_demux/4to16_demux.cir.out b/library/SubcircuitLibrary/4to16_demux/4to16_demux.cir.out
new file mode 100644
index 00000000..eecdfb06
--- /dev/null
+++ b/library/SubcircuitLibrary/4to16_demux/4to16_demux.cir.out
@@ -0,0 +1,49 @@
+* /home/mallikarjuna/downloads/esim-1.1.2/src/subcircuitlibrary/4to16_demux/4to16_demux.cir
+
+.include 5_nand.sub
+* u3  net-_u1-pad23_ net-_u3-pad2_ d_inverter
+* u4  net-_u1-pad22_ net-_u4-pad2_ d_inverter
+* u5  net-_u1-pad21_ net-_u5-pad2_ d_inverter
+* u6  net-_u1-pad20_ net-_u6-pad2_ d_inverter
+* u2  net-_u1-pad19_ net-_u1-pad18_ net-_u2-pad3_ d_nor
+* u1  net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ net-_u1-pad5_ net-_u1-pad6_ net-_u1-pad7_ net-_u1-pad8_ net-_u1-pad9_ net-_u1-pad10_ net-_u1-pad11_ ? net-_u1-pad13_ net-_u1-pad14_ net-_u1-pad15_ net-_u1-pad16_ net-_u1-pad17_ net-_u1-pad18_ net-_u1-pad19_ net-_u1-pad20_ net-_u1-pad21_ net-_u1-pad22_ net-_u1-pad23_ ? port
+x1 net-_u3-pad2_ net-_u4-pad2_ net-_u5-pad2_ net-_u6-pad2_ net-_u2-pad3_ net-_u1-pad1_ 5_nand
+x2 net-_u1-pad23_ net-_u4-pad2_ net-_u5-pad2_ net-_u6-pad2_ net-_u2-pad3_ net-_u1-pad2_ 5_nand
+x3 net-_u3-pad2_ net-_u1-pad22_ net-_u5-pad2_ net-_u6-pad2_ net-_u2-pad3_ net-_u1-pad3_ 5_nand
+x4 net-_u1-pad23_ net-_u1-pad22_ net-_u5-pad2_ net-_u6-pad2_ net-_u2-pad3_ net-_u1-pad4_ 5_nand
+x5 net-_u3-pad2_ net-_u4-pad2_ net-_u1-pad21_ net-_u6-pad2_ net-_u2-pad3_ net-_u1-pad5_ 5_nand
+x6 net-_u1-pad23_ net-_u4-pad2_ net-_u1-pad21_ net-_u6-pad2_ net-_u2-pad3_ net-_u1-pad6_ 5_nand
+x7 net-_u3-pad2_ net-_u1-pad22_ net-_u1-pad21_ net-_u6-pad2_ net-_u2-pad3_ net-_u1-pad7_ 5_nand
+x8 net-_u1-pad23_ net-_u1-pad22_ net-_u1-pad21_ net-_u6-pad2_ net-_u2-pad3_ net-_u1-pad8_ 5_nand
+x9 net-_u3-pad2_ net-_u4-pad2_ net-_u5-pad2_ net-_u1-pad20_ net-_u2-pad3_ net-_u1-pad9_ 5_nand
+x10 net-_u1-pad23_ net-_u4-pad2_ net-_u5-pad2_ net-_u1-pad20_ net-_u2-pad3_ net-_u1-pad10_ 5_nand
+x11 net-_u3-pad2_ net-_u1-pad22_ net-_u5-pad2_ net-_u1-pad20_ net-_u2-pad3_ net-_u1-pad11_ 5_nand
+x12 net-_u1-pad23_ net-_u1-pad22_ net-_u5-pad2_ net-_u1-pad20_ net-_u2-pad3_ net-_u1-pad13_ 5_nand
+x13 net-_u3-pad2_ net-_u4-pad2_ net-_u1-pad21_ net-_u1-pad20_ net-_u2-pad3_ net-_u1-pad14_ 5_nand
+x14 net-_u1-pad23_ net-_u4-pad2_ net-_u1-pad21_ net-_u1-pad20_ net-_u2-pad3_ net-_u1-pad15_ 5_nand
+x15 net-_u3-pad2_ net-_u1-pad22_ net-_u1-pad21_ net-_u1-pad20_ net-_u2-pad3_ net-_u1-pad16_ 5_nand
+x16 net-_u1-pad23_ net-_u1-pad22_ net-_u1-pad21_ net-_u1-pad20_ net-_u2-pad3_ net-_u1-pad17_ 5_nand
+a1 net-_u1-pad23_ net-_u3-pad2_ u3
+a2 net-_u1-pad22_ net-_u4-pad2_ u4
+a3 net-_u1-pad21_ net-_u5-pad2_ u5
+a4 net-_u1-pad20_ net-_u6-pad2_ u6
+a5 [net-_u1-pad19_ net-_u1-pad18_ ] net-_u2-pad3_ u2
+* Schematic Name: d_inverter, NgSpice Name: d_inverter
+.model u3 d_inverter(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 
+* Schematic Name: d_inverter, NgSpice Name: d_inverter
+.model u4 d_inverter(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 
+* Schematic Name: d_inverter, NgSpice Name: d_inverter
+.model u5 d_inverter(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 
+* Schematic Name: d_inverter, NgSpice Name: d_inverter
+.model u6 d_inverter(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 
+* Schematic Name: d_nor, NgSpice Name: d_nor
+.model u2 d_nor(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 
+.tran 0e-00 0e-00 0e-00
+
+* Control Statements 
+.control
+run
+print allv > plot_data_v.txt
+print alli > plot_data_i.txt
+.endc
+.end
diff --git a/library/SubcircuitLibrary/4to16_demux/4to16_demux.pro b/library/SubcircuitLibrary/4to16_demux/4to16_demux.pro
new file mode 100644
index 00000000..5a167cd9
--- /dev/null
+++ b/library/SubcircuitLibrary/4to16_demux/4to16_demux.pro
@@ -0,0 +1,43 @@
+update=Fri Jun 21 16:58:10 2019
+version=1
+last_client=eeschema
+[general]
+version=1
+RootSch=
+BoardNm=
+[pcbnew]
+version=1
+LastNetListRead=
+UseCmpFile=1
+PadDrill=0.600000000000
+PadDrillOvalY=0.600000000000
+PadSizeH=1.500000000000
+PadSizeV=1.500000000000
+PcbTextSizeV=1.500000000000
+PcbTextSizeH=1.500000000000
+PcbTextThickness=0.300000000000
+ModuleTextSizeV=1.000000000000
+ModuleTextSizeH=1.000000000000
+ModuleTextSizeThickness=0.150000000000
+SolderMaskClearance=0.000000000000
+SolderMaskMinWidth=0.000000000000
+DrawSegmentWidth=0.200000000000
+BoardOutlineThickness=0.100000000000
+ModuleOutlineThickness=0.150000000000
+[cvpcb]
+version=1
+NetIExt=net
+[eeschema]
+version=1
+LibDir=../../../kicadSchematicLibrary
+[eeschema/libraries]
+LibName1=eSim_Analog
+LibName2=eSim_Devices
+LibName3=eSim_Digital
+LibName4=eSim_Hybrid
+LibName5=eSim_Miscellaneous
+LibName6=eSim_Plot
+LibName7=eSim_Power
+LibName8=eSim_Sources
+LibName9=eSim_User
+LibName10=eSim_Subckt
diff --git a/library/SubcircuitLibrary/4to16_demux/4to16_demux.sch b/library/SubcircuitLibrary/4to16_demux/4to16_demux.sch
new file mode 100644
index 00000000..c9142e27
--- /dev/null
+++ b/library/SubcircuitLibrary/4to16_demux/4to16_demux.sch
@@ -0,0 +1,889 @@
+EESchema Schematic File Version 2
+LIBS:eSim_Analog
+LIBS:eSim_Devices
+LIBS:eSim_Digital
+LIBS:eSim_Hybrid
+LIBS:eSim_Miscellaneous
+LIBS:eSim_Plot
+LIBS:eSim_Power
+LIBS:eSim_Sources
+LIBS:eSim_User
+LIBS:eSim_Subckt
+LIBS:4to16_demux-cache
+EELAYER 25 0
+EELAYER END
+$Descr A4 11693 8268
+encoding utf-8
+Sheet 1 1
+Title ""
+Date ""
+Rev ""
+Comp ""
+Comment1 ""
+Comment2 ""
+Comment3 ""
+Comment4 ""
+$EndDescr
+$Comp
+L d_inverter U3
+U 1 1 5CF2315F
+P 4700 1900
+F 0 "U3" H 4700 1800 60  0000 C CNN
+F 1 "d_inverter" H 4700 2050 60  0000 C CNN
+F 2 "" H 4750 1850 60  0000 C CNN
+F 3 "" H 4750 1850 60  0000 C CNN
+	1    4700 1900
+	0    1    1    0   
+$EndComp
+$Comp
+L d_inverter U4
+U 1 1 5CF231D7
+P 5600 1850
+F 0 "U4" H 5600 1750 60  0000 C CNN
+F 1 "d_inverter" H 5600 2000 60  0000 C CNN
+F 2 "" H 5650 1800 60  0000 C CNN
+F 3 "" H 5650 1800 60  0000 C CNN
+	1    5600 1850
+	0    1    1    0   
+$EndComp
+$Comp
+L d_inverter U5
+U 1 1 5CF23245
+P 6550 1850
+F 0 "U5" H 6550 1750 60  0000 C CNN
+F 1 "d_inverter" H 6550 2000 60  0000 C CNN
+F 2 "" H 6600 1800 60  0000 C CNN
+F 3 "" H 6600 1800 60  0000 C CNN
+	1    6550 1850
+	0    1    1    0   
+$EndComp
+$Comp
+L d_inverter U6
+U 1 1 5CF232B2
+P 7500 1800
+F 0 "U6" H 7500 1700 60  0000 C CNN
+F 1 "d_inverter" H 7500 1950 60  0000 C CNN
+F 2 "" H 7550 1750 60  0000 C CNN
+F 3 "" H 7550 1750 60  0000 C CNN
+	1    7500 1800
+	0    1    1    0   
+$EndComp
+Text Notes 1300 5450 0    60   ~ 0
+~Y0
+Text Notes 1950 5450 0    60   ~ 0
+~Y1\n
+Text Notes 2500 5450 0    60   ~ 0
+~Y2\n
+Text Notes 3050 5450 0    60   ~ 0
+~Y3\n
+Text Notes 3600 5450 0    60   ~ 0
+~Y4\n
+Text Notes 4150 5500 0    60   ~ 0
+~Y5\n
+Text Notes 4700 5500 0    60   ~ 0
+~Y6\n
+Text Notes 5250 5500 0    60   ~ 0
+~Y7\n
+Text Notes 5800 5500 0    60   ~ 0
+~Y8\n
+Text Notes 6400 5500 0    60   ~ 0
+~Y9\n
+Text Notes 6950 5500 0    60   ~ 0
+~Y10\n
+Text Notes 7500 5500 0    60   ~ 0
+~Y11\n
+Text Notes 8050 5500 0    60   ~ 0
+~Y12\n
+Text Notes 8600 5500 0    60   ~ 0
+~Y13\n
+Text Notes 9150 5500 0    60   ~ 0
+~Y14\n
+Text Notes 9700 5500 0    60   ~ 0
+~Y15\n
+Wire Wire Line
+	4700 1250 4700 1600
+Wire Wire Line
+	5600 1150 5600 1550
+Wire Wire Line
+	6550 1100 6550 1550
+Wire Wire Line
+	7500 1050 7500 1500
+Wire Wire Line
+	1400 4400 1400 2950
+Wire Wire Line
+	1400 2950 9700 2950
+Wire Wire Line
+	1950 2950 1950 4400
+Wire Wire Line
+	2500 2950 2500 4400
+Connection ~ 1950 2950
+Wire Wire Line
+	3050 2950 3050 4400
+Connection ~ 2500 2950
+Wire Wire Line
+	3600 2950 3600 4400
+Connection ~ 3050 2950
+Wire Wire Line
+	4150 2950 4150 4400
+Connection ~ 3600 2950
+Wire Wire Line
+	4700 2950 4700 4400
+Connection ~ 4150 2950
+Wire Wire Line
+	5250 2950 5250 4400
+Connection ~ 4700 2950
+Wire Wire Line
+	5800 2950 5800 4400
+Connection ~ 5250 2950
+Wire Wire Line
+	6400 2950 6400 4400
+Connection ~ 5800 2950
+Wire Wire Line
+	6950 2950 6950 4400
+Connection ~ 6400 2950
+Wire Wire Line
+	7500 2950 7500 4400
+Connection ~ 6950 2950
+Wire Wire Line
+	8050 2950 8050 4400
+Connection ~ 7500 2950
+Wire Wire Line
+	8600 2950 8600 4400
+Connection ~ 8050 2950
+Wire Wire Line
+	9150 2950 9150 4400
+Connection ~ 8600 2950
+Wire Wire Line
+	9700 2950 9700 4400
+Connection ~ 9150 2950
+Wire Wire Line
+	7500 2100 7500 2800
+Wire Wire Line
+	7500 2800 7400 2800
+Wire Wire Line
+	7400 2800 7400 3050
+Wire Wire Line
+	7400 3050 1500 3050
+Wire Wire Line
+	1500 3050 1500 4400
+Wire Wire Line
+	2050 4400 2050 3050
+Connection ~ 2050 3050
+Wire Wire Line
+	2600 4400 2600 3050
+Connection ~ 2600 3050
+Wire Wire Line
+	3150 4400 3150 3050
+Connection ~ 3150 3050
+Wire Wire Line
+	3700 4400 3700 3050
+Connection ~ 3700 3050
+Wire Wire Line
+	4250 4400 4250 3050
+Connection ~ 4250 3050
+Wire Wire Line
+	4800 4400 4800 3050
+Connection ~ 4800 3050
+Wire Wire Line
+	5350 4400 5350 3050
+Connection ~ 5350 3050
+Wire Wire Line
+	6550 3150 6550 2150
+Wire Wire Line
+	1600 3150 7700 3150
+Wire Wire Line
+	1600 3150 1600 4400
+Wire Wire Line
+	2150 4400 2150 3150
+Connection ~ 2150 3150
+Wire Wire Line
+	2700 4400 2700 3150
+Connection ~ 2700 3150
+Wire Wire Line
+	3250 4400 3250 3150
+Connection ~ 3250 3150
+Wire Wire Line
+	5600 3250 5600 2150
+Wire Wire Line
+	1700 3250 8900 3250
+Wire Wire Line
+	1700 3250 1700 4400
+Wire Wire Line
+	2250 4400 2250 3250
+Connection ~ 2250 3250
+Wire Wire Line
+	3900 4400 3900 3250
+Connection ~ 3900 3250
+Wire Wire Line
+	4450 4400 4450 3250
+Connection ~ 4450 3250
+Wire Wire Line
+	6100 3250 6100 4400
+Connection ~ 5600 3250
+Wire Wire Line
+	6700 3250 6700 4400
+Connection ~ 6100 3250
+Wire Wire Line
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+Connection ~ 6700 3250
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+Connection ~ 5100 3350
+Wire Wire Line
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+Connection ~ 6200 3350
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+	7350 3350 7350 4400
+Connection ~ 7350 3350
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+Connection ~ 8450 3350
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+Wire Wire Line
+	9550 3350 9550 4400
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+Wire Wire Line
+	3450 3450 3450 4400
+Wire Wire Line
+	4550 3450 4550 4400
+Connection ~ 3450 3450
+Wire Wire Line
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+Connection ~ 4550 3450
+Wire Wire Line
+	6800 3450 6800 4400
+Connection ~ 5650 3450
+Wire Wire Line
+	7900 3450 7900 4400
+Connection ~ 6800 3450
+Wire Wire Line
+	9000 3450 9000 4400
+Connection ~ 7900 3450
+Wire Wire Line
+	10100 3450 10100 4400
+Connection ~ 9000 3450
+Wire Wire Line
+	10000 3550 10000 4400
+Wire Wire Line
+	2800 3550 10000 3550
+Wire Wire Line
+	9450 3550 9450 4400
+Wire Wire Line
+	7800 3550 7800 4400
+Connection ~ 9450 3550
+Wire Wire Line
+	7250 3550 7250 4400
+Connection ~ 7800 3550
+Wire Wire Line
+	5550 3550 5550 4400
+Connection ~ 7250 3550
+Wire Wire Line
+	5000 1400 5000 4400
+Connection ~ 5550 3550
+Wire Wire Line
+	3350 3550 3350 4400
+Connection ~ 5000 3550
+Wire Wire Line
+	2800 3550 2800 4400
+Connection ~ 3350 3550
+Wire Wire Line
+	5000 1400 5600 1400
+Connection ~ 5600 1400
+Wire Wire Line
+	9900 3700 9900 4400
+Wire Wire Line
+	3800 3700 9900 3700
+Wire Wire Line
+	9350 3700 9350 4400
+Wire Wire Line
+	8800 3700 8800 4400
+Connection ~ 9350 3700
+Wire Wire Line
+	8250 3700 8250 4400
+Connection ~ 8800 3700
+Wire Wire Line
+	5450 3700 5450 4400
+Connection ~ 8250 3700
+Wire Wire Line
+	4900 3700 4900 4400
+Connection ~ 5450 3700
+Wire Wire Line
+	4350 3700 4350 4400
+Connection ~ 4900 3700
+Wire Wire Line
+	3800 3700 3800 4400
+Connection ~ 4350 3700
+Wire Wire Line
+	5950 3700 5950 1350
+Wire Wire Line
+	5950 1350 6550 1350
+Connection ~ 6550 1350
+Connection ~ 5950 3700
+Wire Wire Line
+	9800 3850 9800 4400
+Wire Wire Line
+	5900 3850 9800 3850
+Wire Wire Line
+	9250 3850 9250 4400
+Wire Wire Line
+	8700 3850 8700 4400
+Connection ~ 9250 3850
+Wire Wire Line
+	8150 3850 8150 4400
+Connection ~ 8700 3850
+Wire Wire Line
+	7600 3850 7600 4400
+Connection ~ 8150 3850
+Wire Wire Line
+	7050 1350 7050 4400
+Connection ~ 7600 3850
+Wire Wire Line
+	6500 3850 6500 4400
+Connection ~ 7050 3850
+Wire Wire Line
+	5900 3850 5900 4400
+Connection ~ 6500 3850
+Wire Wire Line
+	7050 1350 7500 1350
+Connection ~ 7500 1350
+Wire Wire Line
+	7700 3150 7700 4400
+Connection ~ 6550 3150
+Wire Wire Line
+	7150 4400 7150 3150
+Connection ~ 7150 3150
+Wire Wire Line
+	6600 3150 6600 4400
+Connection ~ 6600 3150
+Wire Wire Line
+	6000 4400 6000 3150
+Connection ~ 6000 3150
+Connection ~ 2350 3450
+Connection ~ 4700 1450
+Wire Wire Line
+	4000 1450 4700 1450
+Wire Wire Line
+	2350 2650 4000 2650
+Wire Wire Line
+	4000 2650 4000 1450
+$Comp
+L d_nor U2
+U 1 1 5CF2CBDC
+P 1600 2050
+F 0 "U2" H 1600 2050 60  0000 C CNN
+F 1 "d_nor" H 1650 2150 60  0000 C CNN
+F 2 "" H 1600 2050 60  0000 C CNN
+F 3 "" H 1600 2050 60  0000 C CNN
+	1    1600 2050
+	0    1    1    0   
+$EndComp
+Wire Wire Line
+	1650 2500 1650 2950
+Connection ~ 1650 2950
+Wire Wire Line
+	1700 1600 1700 1200
+Wire Wire Line
+	1600 1600 1600 1200
+$Comp
+L PORT U1
+U 18 1 5CF2D1A2
+P 1600 950
+F 0 "U1" H 1650 1050 30  0000 C CNN
+F 1 "PORT" H 1600 950 30  0000 C CNN
+F 2 "" H 1600 950 60  0000 C CNN
+F 3 "" H 1600 950 60  0000 C CNN
+	18   1600 950 
+	0    1    1    0   
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diff --git a/library/SubcircuitLibrary/4to16_demux/4to16_demux.sub b/library/SubcircuitLibrary/4to16_demux/4to16_demux.sub
new file mode 100644
index 00000000..4f7595da
--- /dev/null
+++ b/library/SubcircuitLibrary/4to16_demux/4to16_demux.sub
@@ -0,0 +1,43 @@
+* Subcircuit 4to16_demux
+.subckt 4to16_demux net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ net-_u1-pad5_ net-_u1-pad6_ net-_u1-pad7_ net-_u1-pad8_ net-_u1-pad9_ net-_u1-pad10_ net-_u1-pad11_ ? net-_u1-pad13_ net-_u1-pad14_ net-_u1-pad15_ net-_u1-pad16_ net-_u1-pad17_ net-_u1-pad18_ net-_u1-pad19_ net-_u1-pad20_ net-_u1-pad21_ net-_u1-pad22_ net-_u1-pad23_ ? 
+* /home/mallikarjuna/downloads/esim-1.1.2/src/subcircuitlibrary/4to16_demux/4to16_demux.cir
+.include 5_nand.sub
+* u3  net-_u1-pad23_ net-_u3-pad2_ d_inverter
+* u4  net-_u1-pad22_ net-_u4-pad2_ d_inverter
+* u5  net-_u1-pad21_ net-_u5-pad2_ d_inverter
+* u6  net-_u1-pad20_ net-_u6-pad2_ d_inverter
+* u2  net-_u1-pad19_ net-_u1-pad18_ net-_u2-pad3_ d_nor
+x1 net-_u3-pad2_ net-_u4-pad2_ net-_u5-pad2_ net-_u6-pad2_ net-_u2-pad3_ net-_u1-pad1_ 5_nand
+x2 net-_u1-pad23_ net-_u4-pad2_ net-_u5-pad2_ net-_u6-pad2_ net-_u2-pad3_ net-_u1-pad2_ 5_nand
+x3 net-_u3-pad2_ net-_u1-pad22_ net-_u5-pad2_ net-_u6-pad2_ net-_u2-pad3_ net-_u1-pad3_ 5_nand
+x4 net-_u1-pad23_ net-_u1-pad22_ net-_u5-pad2_ net-_u6-pad2_ net-_u2-pad3_ net-_u1-pad4_ 5_nand
+x5 net-_u3-pad2_ net-_u4-pad2_ net-_u1-pad21_ net-_u6-pad2_ net-_u2-pad3_ net-_u1-pad5_ 5_nand
+x6 net-_u1-pad23_ net-_u4-pad2_ net-_u1-pad21_ net-_u6-pad2_ net-_u2-pad3_ net-_u1-pad6_ 5_nand
+x7 net-_u3-pad2_ net-_u1-pad22_ net-_u1-pad21_ net-_u6-pad2_ net-_u2-pad3_ net-_u1-pad7_ 5_nand
+x8 net-_u1-pad23_ net-_u1-pad22_ net-_u1-pad21_ net-_u6-pad2_ net-_u2-pad3_ net-_u1-pad8_ 5_nand
+x9 net-_u3-pad2_ net-_u4-pad2_ net-_u5-pad2_ net-_u1-pad20_ net-_u2-pad3_ net-_u1-pad9_ 5_nand
+x10 net-_u1-pad23_ net-_u4-pad2_ net-_u5-pad2_ net-_u1-pad20_ net-_u2-pad3_ net-_u1-pad10_ 5_nand
+x11 net-_u3-pad2_ net-_u1-pad22_ net-_u5-pad2_ net-_u1-pad20_ net-_u2-pad3_ net-_u1-pad11_ 5_nand
+x12 net-_u1-pad23_ net-_u1-pad22_ net-_u5-pad2_ net-_u1-pad20_ net-_u2-pad3_ net-_u1-pad13_ 5_nand
+x13 net-_u3-pad2_ net-_u4-pad2_ net-_u1-pad21_ net-_u1-pad20_ net-_u2-pad3_ net-_u1-pad14_ 5_nand
+x14 net-_u1-pad23_ net-_u4-pad2_ net-_u1-pad21_ net-_u1-pad20_ net-_u2-pad3_ net-_u1-pad15_ 5_nand
+x15 net-_u3-pad2_ net-_u1-pad22_ net-_u1-pad21_ net-_u1-pad20_ net-_u2-pad3_ net-_u1-pad16_ 5_nand
+x16 net-_u1-pad23_ net-_u1-pad22_ net-_u1-pad21_ net-_u1-pad20_ net-_u2-pad3_ net-_u1-pad17_ 5_nand
+a1 net-_u1-pad23_ net-_u3-pad2_ u3
+a2 net-_u1-pad22_ net-_u4-pad2_ u4
+a3 net-_u1-pad21_ net-_u5-pad2_ u5
+a4 net-_u1-pad20_ net-_u6-pad2_ u6
+a5 [net-_u1-pad19_ net-_u1-pad18_ ] net-_u2-pad3_ u2
+* Schematic Name: d_inverter, NgSpice Name: d_inverter
+.model u3 d_inverter(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )
+* Schematic Name: d_inverter, NgSpice Name: d_inverter
+.model u4 d_inverter(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )
+* Schematic Name: d_inverter, NgSpice Name: d_inverter
+.model u5 d_inverter(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )
+* Schematic Name: d_inverter, NgSpice Name: d_inverter
+.model u6 d_inverter(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )
+* Schematic Name: d_nor, NgSpice Name: d_nor
+.model u2 d_nor(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )
+* Control Statements
+
+.ends 4to16_demux
\ No newline at end of file
diff --git a/library/SubcircuitLibrary/4to16_demux/4to16_demux_Previous_Values.xml b/library/SubcircuitLibrary/4to16_demux/4to16_demux_Previous_Values.xml
new file mode 100644
index 00000000..93c6f25a
--- /dev/null
+++ b/library/SubcircuitLibrary/4to16_demux/4to16_demux_Previous_Values.xml
@@ -0,0 +1 @@
+<KicadtoNgspice><source /><model><u3 name="type">d_inverter<field1 name="Enter Fall Delay (default=1.0e-9)" /><field2 name="Enter Input Load (default=1.0e-12)" /><field3 name="Enter Rise Delay (default=1.0e-9)" /></u3><u4 name="type">d_inverter<field4 name="Enter Fall Delay (default=1.0e-9)" /><field5 name="Enter Input Load (default=1.0e-12)" /><field6 name="Enter Rise Delay (default=1.0e-9)" /></u4><u5 name="type">d_inverter<field7 name="Enter Fall Delay (default=1.0e-9)" /><field8 name="Enter Input Load (default=1.0e-12)" /><field9 name="Enter Rise Delay (default=1.0e-9)" /></u5><u6 name="type">d_inverter<field10 name="Enter Fall Delay (default=1.0e-9)" /><field11 name="Enter Input Load (default=1.0e-12)" /><field12 name="Enter Rise Delay (default=1.0e-9)" /></u6><u2 name="type">d_nor<field13 name="Enter Fall Delay (default=1.0e-9)" /><field14 name="Enter Input Load (default=1.0e-12)" /><field15 name="Enter Rise Delay (default=1.0e-9)" /></u2></model><devicemodel /><subcircuit><x13><field>/home/mallikarjuna/Downloads/eSim-1.1.2/src/SubcircuitLibrary/5_nand</field></x13><x14><field>/home/mallikarjuna/Downloads/eSim-1.1.2/src/SubcircuitLibrary/5_nand</field></x14><x15><field>/home/mallikarjuna/Downloads/eSim-1.1.2/src/SubcircuitLibrary/5_nand</field></x15><x10><field>/home/mallikarjuna/Downloads/eSim-1.1.2/src/SubcircuitLibrary/5_nand</field></x10><x8><field>/home/mallikarjuna/Downloads/eSim-1.1.2/src/SubcircuitLibrary/5_nand</field></x8><x9><field>/home/mallikarjuna/Downloads/eSim-1.1.2/src/SubcircuitLibrary/5_nand</field></x9><x16><field>/home/mallikarjuna/Downloads/eSim-1.1.2/src/SubcircuitLibrary/5_nand</field></x16><x11><field>/home/mallikarjuna/Downloads/eSim-1.1.2/src/SubcircuitLibrary/5_nand</field></x11><x2><field>/home/mallikarjuna/Downloads/eSim-1.1.2/src/SubcircuitLibrary/5_nand</field></x2><x3><field>/home/mallikarjuna/Downloads/eSim-1.1.2/src/SubcircuitLibrary/5_nand</field></x3><x12><field>/home/mallikarjuna/Downloads/eSim-1.1.2/src/SubcircuitLibrary/5_nand</field></x12><x1><field>/home/mallikarjuna/Downloads/eSim-1.1.2/src/SubcircuitLibrary/5_nand</field></x1><x6><field>/home/mallikarjuna/Downloads/eSim-1.1.2/src/SubcircuitLibrary/5_nand</field></x6><x7><field>/home/mallikarjuna/Downloads/eSim-1.1.2/src/SubcircuitLibrary/5_nand</field></x7><x4><field>/home/mallikarjuna/Downloads/eSim-1.1.2/src/SubcircuitLibrary/5_nand</field></x4><x5><field>/home/mallikarjuna/Downloads/eSim-1.1.2/src/SubcircuitLibrary/5_nand</field></x5></subcircuit><analysis><ac><field1 name="Lin">true</field1><field2 name="Dec">false</field2><field3 name="Oct">false</field3><field4 name="Start Frequency" /><field5 name="Stop Frequency" /><field6 name="No. of points" /><field7 name="Start Fre Combo">Hz</field7><field8 name="Stop Fre Combo">Hz</field8></ac><dc><field1 name="Source 1" /><field2 name="Start" /><field3 name="Increment" /><field4 name="Stop" /><field5 name="Operating Point">0</field5><field6 name="Start Combo">Volts or Amperes</field6><field7 name="Increment Combo">Volts or Amperes</field7><field8 name="Stop Combo">Volts or Amperes</field8><field9 name="Source 2" /><field10 name="Start" /><field11 name="Increment" /><field12 name="Stop" /><field13 name="Start Combo">Volts or Amperes</field13><field14 name="Increment Combo">Volts or Amperes</field14><field15 name="Stop Combo">Volts or Amperes</field15></dc><tran><field1 name="Start Time" /><field2 name="Step Time" /><field3 name="Stop Time" /><field4 name="Start Combo">Sec</field4><field5 name="Step Combo">Sec</field5><field6 name="Stop Combo">Sec</field6></tran></analysis></KicadtoNgspice>
\ No newline at end of file
diff --git a/library/SubcircuitLibrary/4to16_demux/5_and-cache.lib b/library/SubcircuitLibrary/4to16_demux/5_and-cache.lib
new file mode 100644
index 00000000..ac396288
--- /dev/null
+++ b/library/SubcircuitLibrary/4to16_demux/5_and-cache.lib
@@ -0,0 +1,79 @@
+EESchema-LIBRARY Version 2.3
+#encoding utf-8
+#
+# 3_and
+#
+DEF 3_and X 0 40 Y Y 1 F N
+F0 "X" 900 300 60 H V C CNN
+F1 "3_and" 950 500 60 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+A 950 400 158 716 -716 0 1 0 N 1000 550 1000 250
+P 2 0 1 0  650 550  1000 550 N
+P 3 0 1 0  650 550  650 250  1000 250 N
+X in1 1 450 500 200 R 50 50 1 1 I
+X in2 2 450 400 200 R 50 50 1 1 I
+X in3 3 450 300 200 R 50 50 1 1 I
+X out 4 1300 400 200 L 50 50 1 1 O
+ENDDRAW
+ENDDEF
+#
+# PORT
+#
+DEF PORT U 0 40 Y Y 26 F N
+F0 "U" 50 100 30 H V C CNN
+F1 "PORT" 0 0 30 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0
+A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50
+S -100 50 100 -50 0 1 0 N
+X ~ 1 250 0 100 L 30 30 1 1 B
+X ~ 2 250 0 100 L 30 30 2 1 B
+X ~ 3 250 0 100 L 30 30 3 1 B
+X ~ 4 250 0 100 L 30 30 4 1 B
+X ~ 5 250 0 100 L 30 30 5 1 B
+X ~ 6 250 0 100 L 30 30 6 1 B
+X ~ 7 250 0 100 L 30 30 7 1 B
+X ~ 8 250 0 100 L 30 30 8 1 B
+X ~ 9 250 0 100 L 30 30 9 1 B
+X ~ 10 250 0 100 L 30 30 10 1 B
+X ~ 11 250 0 100 L 30 30 11 1 B
+X ~ 12 250 0 100 L 30 30 12 1 B
+X ~ 13 250 0 100 L 30 30 13 1 B
+X ~ 14 250 0 100 L 30 30 14 1 B
+X ~ 15 250 0 100 L 30 30 15 1 B
+X ~ 16 250 0 100 L 30 30 16 1 B
+X ~ 17 250 0 100 L 30 30 17 1 B
+X ~ 18 250 0 100 L 30 30 18 1 B
+X ~ 19 250 0 100 L 30 30 19 1 B
+X ~ 20 250 0 100 L 30 30 20 1 B
+X ~ 21 250 0 100 L 30 30 21 1 B
+X ~ 22 250 0 100 L 30 30 22 1 B
+X ~ 23 250 0 100 L 30 30 23 1 B
+X ~ 24 250 0 100 L 30 30 24 1 B
+X ~ 25 250 0 100 L 30 30 25 1 B
+X ~ 26 250 0 100 L 30 30 26 1 B
+ENDDRAW
+ENDDEF
+#
+# d_and
+#
+DEF d_and U 0 40 Y Y 1 F N
+F0 "U" 0 0 60 H V C CNN
+F1 "d_and" 50 100 60 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+A 149 50 100 -894 0 0 1 0 N 150 -50 250 50
+A 150 49 100 6 900 0 1 0 N 250 50 150 150
+P 4 0 1 0  150 -50  -250 -50  -250 150  150 150 N
+X IN1 1 -450 100 200 R 50 50 1 1 I
+X IN2 2 -450 0 200 R 50 50 1 1 I
+X OUT 3 450 50 200 L 50 50 1 1 O
+ENDDRAW
+ENDDEF
+#
+#End Library
diff --git a/library/SubcircuitLibrary/4to16_demux/5_and.cir b/library/SubcircuitLibrary/4to16_demux/5_and.cir
new file mode 100644
index 00000000..6a05b9b5
--- /dev/null
+++ b/library/SubcircuitLibrary/4to16_demux/5_and.cir
@@ -0,0 +1,14 @@
+* C:\Users\malli\eSim\src\SubcircuitLibrary\5_and\5_and.cir
+
+* EESchema Netlist Version 1.1 (Spice format) creation date: 03/26/19 18:53:13
+
+* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N
+* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0
+
+* Sheet Name: /
+X1  Net-_U1-Pad1_ Net-_U1-Pad2_ Net-_U1-Pad3_ Net-_U3-Pad1_ 3_and		
+U2  Net-_U1-Pad4_ Net-_U1-Pad5_ Net-_U2-Pad3_ d_and		
+U3  Net-_U3-Pad1_ Net-_U2-Pad3_ Net-_U1-Pad6_ d_and		
+U1  Net-_U1-Pad1_ Net-_U1-Pad2_ Net-_U1-Pad3_ Net-_U1-Pad4_ Net-_U1-Pad5_ Net-_U1-Pad6_ PORT		
+
+.end
diff --git a/library/SubcircuitLibrary/4to16_demux/5_and.cir.out b/library/SubcircuitLibrary/4to16_demux/5_and.cir.out
new file mode 100644
index 00000000..6a6b126a
--- /dev/null
+++ b/library/SubcircuitLibrary/4to16_demux/5_and.cir.out
@@ -0,0 +1,22 @@
+* c:\users\malli\esim\src\subcircuitlibrary\5_and\5_and.cir
+
+.include 3_and.sub
+x1 net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u3-pad1_ 3_and
+* u2  net-_u1-pad4_ net-_u1-pad5_ net-_u2-pad3_ d_and
+* u3  net-_u3-pad1_ net-_u2-pad3_ net-_u1-pad6_ d_and
+* u1  net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ net-_u1-pad5_ net-_u1-pad6_ port
+a1 [net-_u1-pad4_ net-_u1-pad5_ ] net-_u2-pad3_ u2
+a2 [net-_u3-pad1_ net-_u2-pad3_ ] net-_u1-pad6_ u3
+* Schematic Name: d_and, NgSpice Name: d_and
+.model u2 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 
+* Schematic Name: d_and, NgSpice Name: d_and
+.model u3 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 
+.tran 0e-00 0e-00 0e-00
+
+* Control Statements 
+.control
+run
+print allv > plot_data_v.txt
+print alli > plot_data_i.txt
+.endc
+.end
diff --git a/library/SubcircuitLibrary/4to16_demux/5_and.pro b/library/SubcircuitLibrary/4to16_demux/5_and.pro
new file mode 100644
index 00000000..7a2f090e
--- /dev/null
+++ b/library/SubcircuitLibrary/4to16_demux/5_and.pro
@@ -0,0 +1,50 @@
+update=06/01/19 11:31:03
+version=1
+last_client=eeschema
+[general]
+version=1
+RootSch=
+BoardNm=
+[pcbnew]
+version=1
+LastNetListRead=
+UseCmpFile=1
+PadDrill=0.600000000000
+PadDrillOvalY=0.600000000000
+PadSizeH=1.500000000000
+PadSizeV=1.500000000000
+PcbTextSizeV=1.500000000000
+PcbTextSizeH=1.500000000000
+PcbTextThickness=0.300000000000
+ModuleTextSizeV=1.000000000000
+ModuleTextSizeH=1.000000000000
+ModuleTextSizeThickness=0.150000000000
+SolderMaskClearance=0.000000000000
+SolderMaskMinWidth=0.000000000000
+DrawSegmentWidth=0.200000000000
+BoardOutlineThickness=0.100000000000
+ModuleOutlineThickness=0.150000000000
+[cvpcb]
+version=1
+NetIExt=net
+[eeschema]
+version=1
+LibDir=../../../kicadSchematicLibrary
+[eeschema/libraries]
+LibName1=cypress
+LibName2=siliconi
+LibName3=opto
+LibName4=atmel
+LibName5=contrib
+LibName6=valves
+LibName7=eSim_Analog
+LibName8=eSim_Devices
+LibName9=eSim_Digital
+LibName10=eSim_Hybrid
+LibName11=eSim_Miscellaneous
+LibName12=eSim_Plot
+LibName13=eSim_Power
+LibName14=eSim_PSpice
+LibName15=eSim_Sources
+LibName16=eSim_Subckt
+LibName17=eSim_User
diff --git a/library/SubcircuitLibrary/4to16_demux/5_and.sch b/library/SubcircuitLibrary/4to16_demux/5_and.sch
new file mode 100644
index 00000000..e9eb58ee
--- /dev/null
+++ b/library/SubcircuitLibrary/4to16_demux/5_and.sch
@@ -0,0 +1,171 @@
+EESchema Schematic File Version 2
+LIBS:cypress
+LIBS:siliconi
+LIBS:opto
+LIBS:atmel
+LIBS:contrib
+LIBS:valves
+LIBS:eSim_Analog
+LIBS:eSim_Devices
+LIBS:eSim_Digital
+LIBS:eSim_Hybrid
+LIBS:eSim_Miscellaneous
+LIBS:eSim_Plot
+LIBS:eSim_Power
+LIBS:eSim_PSpice
+LIBS:eSim_Sources
+LIBS:eSim_Subckt
+LIBS:eSim_User
+LIBS:5_and-cache
+EELAYER 25 0
+EELAYER END
+$Descr A4 11693 8268
+encoding utf-8
+Sheet 1 1
+Title ""
+Date ""
+Rev ""
+Comp ""
+Comment1 ""
+Comment2 ""
+Comment3 ""
+Comment4 ""
+$EndDescr
+$Comp
+L 3_and X1
+U 1 1 5C9A2741
+P 3800 3350
+F 0 "X1" H 4700 3650 60  0000 C CNN
+F 1 "3_and" H 4750 3850 60  0000 C CNN
+F 2 "" H 3800 3350 60  0000 C CNN
+F 3 "" H 3800 3350 60  0000 C CNN
+	1    3800 3350
+	1    0    0    -1  
+$EndComp
+$Comp
+L d_and U2
+U 1 1 5C9A2764
+P 4650 3400
+F 0 "U2" H 4650 3400 60  0000 C CNN
+F 1 "d_and" H 4700 3500 60  0000 C CNN
+F 2 "" H 4650 3400 60  0000 C CNN
+F 3 "" H 4650 3400 60  0000 C CNN
+	1    4650 3400
+	1    0    0    -1  
+$EndComp
+$Comp
+L d_and U3
+U 1 1 5C9A2791
+P 5550 3200
+F 0 "U3" H 5550 3200 60  0000 C CNN
+F 1 "d_and" H 5600 3300 60  0000 C CNN
+F 2 "" H 5550 3200 60  0000 C CNN
+F 3 "" H 5550 3200 60  0000 C CNN
+	1    5550 3200
+	1    0    0    -1  
+$EndComp
+Wire Wire Line
+	5100 3100 5100 2950
+Wire Wire Line
+	5100 3200 5100 3350
+Wire Wire Line
+	4250 2850 4250 2700
+Wire Wire Line
+	4250 2700 3600 2700
+Wire Wire Line
+	4250 2950 4150 2950
+Wire Wire Line
+	4150 2950 4150 2900
+Wire Wire Line
+	4150 2900 3600 2900
+Wire Wire Line
+	4200 3300 3600 3300
+Wire Wire Line
+	4250 3050 4250 3100
+Wire Wire Line
+	4250 3100 3600 3100
+Wire Wire Line
+	4200 3400 4200 3500
+Wire Wire Line
+	4200 3500 3600 3500
+Wire Wire Line
+	6000 3150 6500 3150
+$Comp
+L PORT U1
+U 1 1 5C9A2865
+P 3350 2700
+F 0 "U1" H 3400 2800 30  0000 C CNN
+F 1 "PORT" H 3350 2700 30  0000 C CNN
+F 2 "" H 3350 2700 60  0000 C CNN
+F 3 "" H 3350 2700 60  0000 C CNN
+	1    3350 2700
+	1    0    0    -1  
+$EndComp
+$Comp
+L PORT U1
+U 2 1 5C9A28B6
+P 3350 2900
+F 0 "U1" H 3400 3000 30  0000 C CNN
+F 1 "PORT" H 3350 2900 30  0000 C CNN
+F 2 "" H 3350 2900 60  0000 C CNN
+F 3 "" H 3350 2900 60  0000 C CNN
+	2    3350 2900
+	1    0    0    -1  
+$EndComp
+$Comp
+L PORT U1
+U 3 1 5C9A28D9
+P 3350 3100
+F 0 "U1" H 3400 3200 30  0000 C CNN
+F 1 "PORT" H 3350 3100 30  0000 C CNN
+F 2 "" H 3350 3100 60  0000 C CNN
+F 3 "" H 3350 3100 60  0000 C CNN
+	3    3350 3100
+	1    0    0    -1  
+$EndComp
+$Comp
+L PORT U1
+U 4 1 5C9A28FF
+P 3350 3300
+F 0 "U1" H 3400 3400 30  0000 C CNN
+F 1 "PORT" H 3350 3300 30  0000 C CNN
+F 2 "" H 3350 3300 60  0000 C CNN
+F 3 "" H 3350 3300 60  0000 C CNN
+	4    3350 3300
+	1    0    0    -1  
+$EndComp
+$Comp
+L PORT U1
+U 5 1 5C9A2928
+P 3350 3500
+F 0 "U1" H 3400 3600 30  0000 C CNN
+F 1 "PORT" H 3350 3500 30  0000 C CNN
+F 2 "" H 3350 3500 60  0000 C CNN
+F 3 "" H 3350 3500 60  0000 C CNN
+	5    3350 3500
+	1    0    0    -1  
+$EndComp
+$Comp
+L PORT U1
+U 6 1 5C9A2958
+P 6750 3150
+F 0 "U1" H 6800 3250 30  0000 C CNN
+F 1 "PORT" H 6750 3150 30  0000 C CNN
+F 2 "" H 6750 3150 60  0000 C CNN
+F 3 "" H 6750 3150 60  0000 C CNN
+	6    6750 3150
+	-1   0    0    1   
+$EndComp
+Text Notes 3800 2700 0    60   ~ 12
+in1
+Text Notes 3800 2900 0    60   ~ 12
+in2
+Text Notes 3800 3100 0    60   ~ 12
+in3
+Text Notes 3800 3300 0    60   ~ 12
+in4
+Text Notes 3800 3500 0    60   ~ 12
+in5
+Text Notes 6150 3150 0    60   ~ 12
+out
+$EndSCHEMATC
diff --git a/library/SubcircuitLibrary/4to16_demux/5_and.sub b/library/SubcircuitLibrary/4to16_demux/5_and.sub
new file mode 100644
index 00000000..35b10e17
--- /dev/null
+++ b/library/SubcircuitLibrary/4to16_demux/5_and.sub
@@ -0,0 +1,16 @@
+* Subcircuit 5_and
+.subckt 5_and net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ net-_u1-pad5_ net-_u1-pad6_ 
+* c:\users\malli\esim\src\subcircuitlibrary\5_and\5_and.cir
+.include 3_and.sub
+x1 net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u3-pad1_ 3_and
+* u2  net-_u1-pad4_ net-_u1-pad5_ net-_u2-pad3_ d_and
+* u3  net-_u3-pad1_ net-_u2-pad3_ net-_u1-pad6_ d_and
+a1 [net-_u1-pad4_ net-_u1-pad5_ ] net-_u2-pad3_ u2
+a2 [net-_u3-pad1_ net-_u2-pad3_ ] net-_u1-pad6_ u3
+* Schematic Name: d_and, NgSpice Name: d_and
+.model u2 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )
+* Schematic Name: d_and, NgSpice Name: d_and
+.model u3 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )
+* Control Statements
+
+.ends 5_and
\ No newline at end of file
diff --git a/library/SubcircuitLibrary/4to16_demux/5_and_Previous_Values.xml b/library/SubcircuitLibrary/4to16_demux/5_and_Previous_Values.xml
new file mode 100644
index 00000000..ae2c08a7
--- /dev/null
+++ b/library/SubcircuitLibrary/4to16_demux/5_and_Previous_Values.xml
@@ -0,0 +1 @@
+<KicadtoNgspice><source /><model><u2 name="type">d_and<field1 name="Enter Fall Delay (default=1.0e-9)" /><field2 name="Enter Input Load (default=1.0e-12)" /><field3 name="Enter Rise Delay (default=1.0e-9)" /></u2><u3 name="type">d_and<field4 name="Enter Fall Delay (default=1.0e-9)" /><field5 name="Enter Input Load (default=1.0e-12)" /><field6 name="Enter Rise Delay (default=1.0e-9)" /></u3></model><devicemodel /><subcircuit><x1><field>C:\Users\malli\eSim\src\SubcircuitLibrary\3_and</field></x1></subcircuit><analysis><ac><field1 name="Lin">true</field1><field2 name="Dec">false</field2><field3 name="Oct">false</field3><field4 name="Start Frequency" /><field5 name="Stop Frequency" /><field6 name="No. of points" /><field7 name="Start Fre Combo">Hz</field7><field8 name="Stop Fre Combo">Hz</field8></ac><dc><field1 name="Source 1" /><field2 name="Start" /><field3 name="Increment" /><field4 name="Stop" /><field5 name="Operating Point">0</field5><field6 name="Start Combo">Volts or Amperes</field6><field7 name="Increment Combo">Volts or Amperes</field7><field8 name="Stop Combo">Volts or Amperes</field8><field9 name="Source 2" /><field10 name="Start" /><field11 name="Increment" /><field12 name="Stop" /><field13 name="Start Combo">Volts or Amperes</field13><field14 name="Increment Combo">Volts or Amperes</field14><field15 name="Stop Combo">Volts or Amperes</field15></dc><tran><field1 name="Start Time" /><field2 name="Step Time" /><field3 name="Stop Time" /><field4 name="Start Combo">Sec</field4><field5 name="Step Combo">Sec</field5><field6 name="Stop Combo">Sec</field6></tran></analysis></KicadtoNgspice>
\ No newline at end of file
diff --git a/library/SubcircuitLibrary/4to16_demux/5_nand-cache.lib b/library/SubcircuitLibrary/4to16_demux/5_nand-cache.lib
new file mode 100644
index 00000000..cb517be1
--- /dev/null
+++ b/library/SubcircuitLibrary/4to16_demux/5_nand-cache.lib
@@ -0,0 +1,78 @@
+EESchema-LIBRARY Version 2.3
+#encoding utf-8
+#
+# 5_and
+#
+DEF 5_and X 0 40 Y Y 1 F N
+F0 "X" 50 -100 60 H V C CNN
+F1 "5_and" 100 150 60 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+A 100 0 255 787 -787 0 1 0 N 150 250 150 -250
+P 2 0 1 0 -250 250 150 250 N
+P 3 0 1 0 -250 250 -250 -250 150 -250 N
+X in1 1 -450 200 200 R 50 50 1 1 I
+X in2 2 -450 100 200 R 50 50 1 1 I
+X in3 3 -450 0 200 R 50 50 1 1 I
+X in4 4 -450 -100 200 R 50 50 1 1 I
+X in5 5 -450 -200 200 R 50 50 1 1 I
+X out 6 550 0 200 L 50 50 1 1 O
+ENDDRAW
+ENDDEF
+#
+# PORT
+#
+DEF PORT U 0 40 Y Y 26 F N
+F0 "U" 50 100 30 H V C CNN
+F1 "PORT" 0 0 30 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0
+A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50
+S -100 50 100 -50 0 1 0 N
+X ~ 1 250 0 100 L 30 30 1 1 B
+X ~ 2 250 0 100 L 30 30 2 1 B
+X ~ 3 250 0 100 L 30 30 3 1 B
+X ~ 4 250 0 100 L 30 30 4 1 B
+X ~ 5 250 0 100 L 30 30 5 1 B
+X ~ 6 250 0 100 L 30 30 6 1 B
+X ~ 7 250 0 100 L 30 30 7 1 B
+X ~ 8 250 0 100 L 30 30 8 1 B
+X ~ 9 250 0 100 L 30 30 9 1 B
+X ~ 10 250 0 100 L 30 30 10 1 B
+X ~ 11 250 0 100 L 30 30 11 1 B
+X ~ 12 250 0 100 L 30 30 12 1 B
+X ~ 13 250 0 100 L 30 30 13 1 B
+X ~ 14 250 0 100 L 30 30 14 1 B
+X ~ 15 250 0 100 L 30 30 15 1 B
+X ~ 16 250 0 100 L 30 30 16 1 B
+X ~ 17 250 0 100 L 30 30 17 1 B
+X ~ 18 250 0 100 L 30 30 18 1 B
+X ~ 19 250 0 100 L 30 30 19 1 B
+X ~ 20 250 0 100 L 30 30 20 1 B
+X ~ 21 250 0 100 L 30 30 21 1 B
+X ~ 22 250 0 100 L 30 30 22 1 B
+X ~ 23 250 0 100 L 30 30 23 1 B
+X ~ 24 250 0 100 L 30 30 24 1 B
+X ~ 25 250 0 100 L 30 30 25 1 B
+X ~ 26 250 0 100 L 30 30 26 1 B
+ENDDRAW
+ENDDEF
+#
+# d_inverter
+#
+DEF d_inverter U 0 40 Y Y 1 F N
+F0 "U" 0 -100 60 H V C CNN
+F1 "d_inverter" 0 150 60 H V C CNN
+F2 "" 50 -50 60 H V C CNN
+F3 "" 50 -50 60 H V C CNN
+DRAW
+P 4 0 1 0 -100 50 -100 -50 100 0 -100 50 N
+X ~ 1 -300 0 200 R 50 50 1 1 I
+X ~ 2 300 0 200 L 50 50 1 1 O I
+ENDDRAW
+ENDDEF
+#
+#End Library
diff --git a/library/SubcircuitLibrary/4to16_demux/5_nand.cir b/library/SubcircuitLibrary/4to16_demux/5_nand.cir
new file mode 100644
index 00000000..e833d0f4
--- /dev/null
+++ b/library/SubcircuitLibrary/4to16_demux/5_nand.cir
@@ -0,0 +1,13 @@
+* /home/mallikarjuna/Downloads/eSim-1.1.2/src/SubcircuitLibrary/5_nand/5_nand.cir
+
+* EESchema Netlist Version 1.1 (Spice format) creation date: Fri Jun 21 16:57:27 2019
+
+* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N
+* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0
+
+* Sheet Name: /
+X1  Net-_U1-Pad1_ Net-_U1-Pad2_ Net-_U1-Pad3_ Net-_U1-Pad4_ Net-_U1-Pad5_ Net-_U2-Pad1_ 5_and		
+U2  Net-_U2-Pad1_ Net-_U1-Pad6_ d_inverter		
+U1  Net-_U1-Pad1_ Net-_U1-Pad2_ Net-_U1-Pad3_ Net-_U1-Pad4_ Net-_U1-Pad5_ Net-_U1-Pad6_ PORT		
+
+.end
diff --git a/library/SubcircuitLibrary/4to16_demux/5_nand.cir.out b/library/SubcircuitLibrary/4to16_demux/5_nand.cir.out
new file mode 100644
index 00000000..164de911
--- /dev/null
+++ b/library/SubcircuitLibrary/4to16_demux/5_nand.cir.out
@@ -0,0 +1,18 @@
+* /home/mallikarjuna/downloads/esim-1.1.2/src/subcircuitlibrary/5_nand/5_nand.cir
+
+.include 5_and.sub
+x1 net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ net-_u1-pad5_ net-_u2-pad1_ 5_and
+* u2  net-_u2-pad1_ net-_u1-pad6_ d_inverter
+* u1  net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ net-_u1-pad5_ net-_u1-pad6_ port
+a1 net-_u2-pad1_ net-_u1-pad6_ u2
+* Schematic Name: d_inverter, NgSpice Name: d_inverter
+.model u2 d_inverter(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 
+.tran 0e-00 0e-00 0e-00
+
+* Control Statements 
+.control
+run
+print allv > plot_data_v.txt
+print alli > plot_data_i.txt
+.endc
+.end
diff --git a/library/SubcircuitLibrary/4to16_demux/5_nand.pro b/library/SubcircuitLibrary/4to16_demux/5_nand.pro
new file mode 100644
index 00000000..b7d23f44
--- /dev/null
+++ b/library/SubcircuitLibrary/4to16_demux/5_nand.pro
@@ -0,0 +1,83 @@
+update=Fri Jun 21 16:46:10 2019
+version=1
+last_client=eeschema
+[general]
+version=1
+RootSch=
+BoardNm=
+[pcbnew]
+version=1
+LastNetListRead=
+UseCmpFile=1
+PadDrill=0.600000000000
+PadDrillOvalY=0.600000000000
+PadSizeH=1.500000000000
+PadSizeV=1.500000000000
+PcbTextSizeV=1.500000000000
+PcbTextSizeH=1.500000000000
+PcbTextThickness=0.300000000000
+ModuleTextSizeV=1.000000000000
+ModuleTextSizeH=1.000000000000
+ModuleTextSizeThickness=0.150000000000
+SolderMaskClearance=0.000000000000
+SolderMaskMinWidth=0.000000000000
+DrawSegmentWidth=0.200000000000
+BoardOutlineThickness=0.100000000000
+ModuleOutlineThickness=0.150000000000
+[cvpcb]
+version=1
+NetIExt=net
+[eeschema]
+version=1
+LibDir=../../../kicadSchematicLibrary
+[eeschema/libraries]
+LibName1=adc-dac
+LibName2=memory
+LibName3=xilinx
+LibName4=microcontrollers
+LibName5=dsp
+LibName6=microchip
+LibName7=analog_switches
+LibName8=motorola
+LibName9=texas
+LibName10=intel
+LibName11=audio
+LibName12=interface
+LibName13=digital-audio
+LibName14=philips
+LibName15=display
+LibName16=cypress
+LibName17=siliconi
+LibName18=opto
+LibName19=atmel
+LibName20=contrib
+LibName21=power
+LibName22=device
+LibName23=transistors
+LibName24=conn
+LibName25=linear
+LibName26=regul
+LibName27=74xx
+LibName28=cmos4000
+LibName29=eSim_Analog
+LibName30=eSim_Devices
+LibName31=eSim_Digital
+LibName32=eSim_Hybrid
+LibName33=eSim_Miscellaneous
+LibName34=eSim_Power
+LibName35=eSim_Sources
+LibName36=eSim_Subckt
+LibName37=eSim_User
+LibName38=eSim_Plot
+LibName39=eSim_PSpice
+LibName40=/home/mallikarjuna/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_Analog
+LibName41=/home/mallikarjuna/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_Devices
+LibName42=/home/mallikarjuna/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_Digital
+LibName43=/home/mallikarjuna/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_Hybrid
+LibName44=/home/mallikarjuna/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_Miscellaneous
+LibName45=/home/mallikarjuna/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_Plot
+LibName46=/home/mallikarjuna/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_Power
+LibName47=/home/mallikarjuna/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_Sources
+LibName48=/home/mallikarjuna/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_Subckt
+LibName49=/home/mallikarjuna/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_User
+
diff --git a/library/SubcircuitLibrary/4to16_demux/5_nand.sch b/library/SubcircuitLibrary/4to16_demux/5_nand.sch
new file mode 100644
index 00000000..86379b08
--- /dev/null
+++ b/library/SubcircuitLibrary/4to16_demux/5_nand.sch
@@ -0,0 +1,175 @@
+EESchema Schematic File Version 2
+LIBS:adc-dac
+LIBS:memory
+LIBS:xilinx
+LIBS:microcontrollers
+LIBS:dsp
+LIBS:microchip
+LIBS:analog_switches
+LIBS:motorola
+LIBS:texas
+LIBS:intel
+LIBS:audio
+LIBS:interface
+LIBS:digital-audio
+LIBS:philips
+LIBS:display
+LIBS:cypress
+LIBS:siliconi
+LIBS:opto
+LIBS:atmel
+LIBS:contrib
+LIBS:power
+LIBS:device
+LIBS:transistors
+LIBS:conn
+LIBS:linear
+LIBS:regul
+LIBS:74xx
+LIBS:cmos4000
+LIBS:eSim_Analog
+LIBS:eSim_Devices
+LIBS:eSim_Digital
+LIBS:eSim_Hybrid
+LIBS:eSim_Miscellaneous
+LIBS:eSim_Power
+LIBS:eSim_Sources
+LIBS:eSim_Subckt
+LIBS:eSim_User
+LIBS:eSim_Plot
+LIBS:eSim_PSpice
+EELAYER 25 0
+EELAYER END
+$Descr A4 11693 8268
+encoding utf-8
+Sheet 1 1
+Title ""
+Date ""
+Rev ""
+Comp ""
+Comment1 ""
+Comment2 ""
+Comment3 ""
+Comment4 ""
+$EndDescr
+$Comp
+L 5_and X1
+U 1 1 5D0CBD44
+P 4150 3700
+F 0 "X1" H 4200 3600 60  0000 C CNN
+F 1 "5_and" H 4250 3850 60  0000 C CNN
+F 2 "" H 4150 3700 60  0000 C CNN
+F 3 "" H 4150 3700 60  0000 C CNN
+	1    4150 3700
+	1    0    0    -1  
+$EndComp
+$Comp
+L d_inverter U2
+U 1 1 5D0CBD97
+P 5150 3700
+F 0 "U2" H 5150 3600 60  0000 C CNN
+F 1 "d_inverter" H 5150 3850 60  0000 C CNN
+F 2 "" H 5200 3650 60  0000 C CNN
+F 3 "" H 5200 3650 60  0000 C CNN
+	1    5150 3700
+	1    0    0    -1  
+$EndComp
+$Comp
+L PORT U1
+U 1 1 5D0CBDBE
+P 2900 2900
+F 0 "U1" H 2950 3000 30  0000 C CNN
+F 1 "PORT" H 2900 2900 30  0000 C CNN
+F 2 "" H 2900 2900 60  0000 C CNN
+F 3 "" H 2900 2900 60  0000 C CNN
+	1    2900 2900
+	1    0    0    -1  
+$EndComp
+$Comp
+L PORT U1
+U 2 1 5D0CBDF4
+P 2900 3150
+F 0 "U1" H 2950 3250 30  0000 C CNN
+F 1 "PORT" H 2900 3150 30  0000 C CNN
+F 2 "" H 2900 3150 60  0000 C CNN
+F 3 "" H 2900 3150 60  0000 C CNN
+	2    2900 3150
+	1    0    0    -1  
+$EndComp
+$Comp
+L PORT U1
+U 3 1 5D0CBE16
+P 2900 3400
+F 0 "U1" H 2950 3500 30  0000 C CNN
+F 1 "PORT" H 2900 3400 30  0000 C CNN
+F 2 "" H 2900 3400 60  0000 C CNN
+F 3 "" H 2900 3400 60  0000 C CNN
+	3    2900 3400
+	1    0    0    -1  
+$EndComp
+$Comp
+L PORT U1
+U 4 1 5D0CBE3F
+P 2900 3750
+F 0 "U1" H 2950 3850 30  0000 C CNN
+F 1 "PORT" H 2900 3750 30  0000 C CNN
+F 2 "" H 2900 3750 60  0000 C CNN
+F 3 "" H 2900 3750 60  0000 C CNN
+	4    2900 3750
+	1    0    0    -1  
+$EndComp
+$Comp
+L PORT U1
+U 5 1 5D0CBE6B
+P 2900 4150
+F 0 "U1" H 2950 4250 30  0000 C CNN
+F 1 "PORT" H 2900 4150 30  0000 C CNN
+F 2 "" H 2900 4150 60  0000 C CNN
+F 3 "" H 2900 4150 60  0000 C CNN
+	5    2900 4150
+	1    0    0    -1  
+$EndComp
+$Comp
+L PORT U1
+U 6 1 5D0CBE9C
+P 6200 3700
+F 0 "U1" H 6250 3800 30  0000 C CNN
+F 1 "PORT" H 6200 3700 30  0000 C CNN
+F 2 "" H 6200 3700 60  0000 C CNN
+F 3 "" H 6200 3700 60  0000 C CNN
+	6    6200 3700
+	-1   0    0    1   
+$EndComp
+Wire Wire Line
+	3150 2900 3700 2900
+Wire Wire Line
+	3700 2900 3700 3500
+Wire Wire Line
+	3700 3600 3500 3600
+Wire Wire Line
+	3500 3600 3500 3150
+Wire Wire Line
+	3500 3150 3150 3150
+Wire Wire Line
+	3150 3400 3350 3400
+Wire Wire Line
+	3350 3400 3350 3700
+Wire Wire Line
+	3350 3700 3700 3700
+Wire Wire Line
+	3700 3800 3250 3800
+Wire Wire Line
+	3250 3800 3250 3750
+Wire Wire Line
+	3250 3750 3150 3750
+Wire Wire Line
+	3150 4150 3350 4150
+Wire Wire Line
+	3350 4150 3350 3900
+Wire Wire Line
+	3350 3900 3700 3900
+Wire Wire Line
+	4700 3700 4850 3700
+Wire Wire Line
+	5450 3700 5950 3700
+$EndSCHEMATC
diff --git a/library/SubcircuitLibrary/4to16_demux/5_nand.sub b/library/SubcircuitLibrary/4to16_demux/5_nand.sub
new file mode 100644
index 00000000..c3e041fa
--- /dev/null
+++ b/library/SubcircuitLibrary/4to16_demux/5_nand.sub
@@ -0,0 +1,12 @@
+* Subcircuit 5_nand
+.subckt 5_nand net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ net-_u1-pad5_ net-_u1-pad6_ 
+* /home/mallikarjuna/downloads/esim-1.1.2/src/subcircuitlibrary/5_nand/5_nand.cir
+.include 5_and.sub
+x1 net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ net-_u1-pad5_ net-_u2-pad1_ 5_and
+* u2  net-_u2-pad1_ net-_u1-pad6_ d_inverter
+a1 net-_u2-pad1_ net-_u1-pad6_ u2
+* Schematic Name: d_inverter, NgSpice Name: d_inverter
+.model u2 d_inverter(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )
+* Control Statements
+
+.ends 5_nand
\ No newline at end of file
diff --git a/library/SubcircuitLibrary/4to16_demux/5_nand_Previous_Values.xml b/library/SubcircuitLibrary/4to16_demux/5_nand_Previous_Values.xml
new file mode 100644
index 00000000..c4b4cde2
--- /dev/null
+++ b/library/SubcircuitLibrary/4to16_demux/5_nand_Previous_Values.xml
@@ -0,0 +1 @@
+<KicadtoNgspice><analysis><ac><field1 name="Lin">true</field1><field2 name="Dec">false</field2><field3 name="Oct">false</field3><field4 name="Start Frequency" /><field5 name="Stop Frequency" /><field6 name="No. of points" /><field7 name="Start Fre Combo">Hz</field7><field8 name="Stop Fre Combo">Hz</field8></ac><dc><field1 name="Source 1" /><field2 name="Start" /><field3 name="Increment" /><field4 name="Stop" /><field5 name="Operating Point">0</field5><field6 name="Start Combo">Volts or Amperes</field6><field7 name="Increment Combo">Volts or Amperes</field7><field8 name="Stop Combo">Volts or Amperes</field8><field9 name="Source 2" /><field10 name="Start" /><field11 name="Increment" /><field12 name="Stop" /><field13 name="Start Combo">Volts or Amperes</field13><field14 name="Increment Combo">Volts or Amperes</field14><field15 name="Stop Combo">Volts or Amperes</field15></dc><tran><field1 name="Start Time" /><field2 name="Step Time" /><field3 name="Stop Time" /><field4 name="Start Combo">Sec</field4><field5 name="Step Combo">Sec</field5><field6 name="Stop Combo">Sec</field6></tran></analysis><source /><model><u2 name="type">d_inverter<field1 name="Enter Fall Delay (default=1.0e-9)" /><field2 name="Enter Input Load (default=1.0e-12)" /><field3 name="Enter Rise Delay (default=1.0e-9)" /></u2></model><devicemodel /><subcircuit><x1><field>/home/mallikarjuna/Downloads/eSim-1.1.2/src/SubcircuitLibrary/5_and</field></x1></subcircuit></KicadtoNgspice>
\ No newline at end of file
diff --git a/library/SubcircuitLibrary/4to16_demux/analysis b/library/SubcircuitLibrary/4to16_demux/analysis
new file mode 100644
index 00000000..ebd5c0a9
--- /dev/null
+++ b/library/SubcircuitLibrary/4to16_demux/analysis
@@ -0,0 +1 @@
+.tran 0e-00 0e-00 0e-00
\ No newline at end of file
-- 
cgit