From d25a2bf2d63442e3585479751f168b635fc5701e Mon Sep 17 00:00:00 2001
From: fossee
Date: Thu, 29 Aug 2019 12:00:06 +0530
Subject: changed Examples

---
 Examples/Halfwave_Rectifier/Halfwave_Rectifier.cir | 15 +++++++++++++++
 1 file changed, 15 insertions(+)
 create mode 100644 Examples/Halfwave_Rectifier/Halfwave_Rectifier.cir

(limited to 'Examples/Halfwave_Rectifier/Halfwave_Rectifier.cir')

diff --git a/Examples/Halfwave_Rectifier/Halfwave_Rectifier.cir b/Examples/Halfwave_Rectifier/Halfwave_Rectifier.cir
new file mode 100644
index 00000000..c3ba30c1
--- /dev/null
+++ b/Examples/Halfwave_Rectifier/Halfwave_Rectifier.cir
@@ -0,0 +1,15 @@
+* /home/saurabh/Downloads/eSim-1.1.2/Examples/Halfwave_Rectifier/Halfwave_Rectifier.cir
+
+* EESchema Netlist Version 1.1 (Spice format) creation date: Mon Nov 26 17:14:26 2018
+
+* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N
+* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0
+
+* Sheet Name: /
+D1  IN OUT D		
+R1  OUT GND 1k		
+v1  IN GND sine		
+U2  IN plot_v1		
+U3  OUT plot_v1		
+
+.end
-- 
cgit