From 5e116a4676854289fabeb6cce57f3d01ae8f5709 Mon Sep 17 00:00:00 2001 From: Sunil Shetye Date: Mon, 11 Mar 2019 12:11:24 +0530 Subject: remove temporary files --- Examples/Diac_Triac/.triac.s.swp | Bin 4096 -> 0 bytes Examples/Diac_Triac/.triac.sub.swp | Bin 12288 -> 0 bytes Examples/Diac_Triac/diac-cache.lib | 67 ------ Examples/Diac_Triac/diac.bak | 138 ------------ Examples/Diac_Triac/diac.cir.ckt | 9 - Examples/Diac_Triac/diac.cir.out~ | 24 -- Examples/Diac_Triac/diac.sub~ | 18 -- Examples/Diac_Triac/diac_Previous_Values.xml | 1 - Examples/Diac_Triac/triac.bak | 308 -------------------------- Examples/Diac_Triac/triac.cir.ckt | 26 --- Examples/Diac_Triac/triac.cir.out~ | 41 ---- Examples/Diac_Triac/triac.sub~ | 35 --- Examples/Diac_Triac/triac_Previous_Values.xml | 1 - 13 files changed, 668 deletions(-) delete mode 100644 Examples/Diac_Triac/.triac.s.swp delete mode 100644 Examples/Diac_Triac/.triac.sub.swp delete mode 100644 Examples/Diac_Triac/diac-cache.lib delete mode 100644 Examples/Diac_Triac/diac.bak delete mode 100644 Examples/Diac_Triac/diac.cir.ckt delete mode 100644 Examples/Diac_Triac/diac.cir.out~ delete mode 100644 Examples/Diac_Triac/diac.sub~ delete mode 100644 Examples/Diac_Triac/diac_Previous_Values.xml delete mode 100644 Examples/Diac_Triac/triac.bak delete mode 100644 Examples/Diac_Triac/triac.cir.ckt delete mode 100644 Examples/Diac_Triac/triac.cir.out~ delete mode 100644 Examples/Diac_Triac/triac.sub~ delete mode 100644 Examples/Diac_Triac/triac_Previous_Values.xml (limited to 'Examples/Diac_Triac') diff --git a/Examples/Diac_Triac/.triac.s.swp b/Examples/Diac_Triac/.triac.s.swp deleted file mode 100644 index 1a4c2d0e..00000000 Binary files a/Examples/Diac_Triac/.triac.s.swp and /dev/null differ diff --git a/Examples/Diac_Triac/.triac.sub.swp b/Examples/Diac_Triac/.triac.sub.swp deleted file mode 100644 index 521ce758..00000000 Binary files a/Examples/Diac_Triac/.triac.sub.swp and /dev/null differ diff --git a/Examples/Diac_Triac/diac-cache.lib b/Examples/Diac_Triac/diac-cache.lib deleted file mode 100644 index b15fdeec..00000000 --- a/Examples/Diac_Triac/diac-cache.lib +++ /dev/null @@ -1,67 +0,0 @@ -EESchema-LIBRARY Version 2.3 -#encoding utf-8 -# -# GND -# -DEF GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 -250 50 H I C CNN -F1 "GND" 0 -150 50 H V C CNN -F2 "" 0 0 60 H V C CNN -F3 "" 0 0 60 H V C CNN -DRAW -P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N -X GND 1 0 0 0 D 50 50 1 1 W N -ENDDRAW -ENDDEF -# -# PORT -# -DEF PORT U 0 40 Y Y 8 F N -F0 "U" 50 100 30 H V C CNN -F1 "PORT" 0 0 30 H V C CNN -F2 "" 0 0 60 H V C CNN -F3 "" 0 0 60 H V C CNN -DRAW -A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0 -A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50 -S -100 50 100 -50 0 1 0 N -X ~ 1 250 0 100 L 30 30 1 1 B -X ~ 2 250 0 100 L 30 30 2 1 B -X ~ 3 250 0 100 L 30 30 3 1 B -X ~ 4 250 0 100 L 30 30 4 1 B -X ~ 5 250 0 100 L 30 30 5 1 B -X ~ 6 250 0 100 L 30 30 6 1 B -X ~ 7 250 0 100 L 30 30 7 1 B -X ~ 8 250 0 100 L 30 30 8 1 B -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 95 50 H I C CNN -F1 "PWR_FLAG" 0 180 50 H V C CNN -F2 "" 0 0 60 H V C CNN -F3 "" 0 0 60 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 6 0 1 0 0 0 0 50 -75 100 0 150 75 100 0 50 N -ENDDRAW -ENDDEF -# -# aswitch -# -DEF aswitch U 0 40 Y Y 1 F N -F0 "U" 450 300 60 H V C CNN -F1 "aswitch" 450 200 60 H V C CNN -F2 "" 450 100 60 H V C CNN -F3 "" 450 100 60 H V C CNN -DRAW -S 200 250 650 100 0 1 0 N -X ~ 2 0 150 200 R 50 50 1 1 O -X ~ 3 850 150 200 L 50 50 1 1 O -X ~ 1_IN 450 -100 200 U 50 20 1 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/Examples/Diac_Triac/diac.bak b/Examples/Diac_Triac/diac.bak deleted file mode 100644 index 16009984..00000000 --- a/Examples/Diac_Triac/diac.bak +++ /dev/null @@ -1,138 +0,0 @@ -EESchema Schematic File Version 2 date 09/22/14 16:36:31 -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:diac-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "22 sep 2014" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Wire Wire Line - 4150 2750 4150 3450 -Connection ~ 4400 3750 -Wire Wire Line - 4900 4250 4900 4450 -Wire Wire Line - 4900 4450 4400 4450 -Wire Wire Line - 4400 4450 4400 3450 -Wire Wire Line - 5200 3400 5200 4050 -Connection ~ 4600 3400 -Wire Wire Line - 4600 4050 4600 2750 -Wire Wire Line - 4600 2750 4150 2750 -Wire Wire Line - 4150 3250 4150 3600 -Wire Wire Line - 4400 3450 4150 3450 -Connection ~ 4150 3450 -Wire Wire Line - 4400 3750 4900 3750 -Wire Wire Line - 4900 3750 4900 3600 -Wire Wire Line - 4150 4100 4150 4300 -$Comp -L PWR_FLAG #FLG01 -U 1 1 5417D647 -P 4150 4300 -F 0 "#FLG01" H 4150 4570 30 0001 C CNN -F 1 "PWR_FLAG" H 4150 4530 30 0000 C CNN - 1 4150 4300 - 0 1 1 0 -$EndComp -$Comp -L PORT U3 -U 2 1 5417D62C -P 5450 3400 -F 0 "U3" H 5450 3350 30 0000 C CNN -F 1 "PORT" H 5450 3400 30 0000 C CNN - 2 5450 3400 - -1 0 0 1 -$EndComp -$Comp -L PORT U3 -U 1 1 5417D624 -P 4150 2500 -F 0 "U3" H 4150 2450 30 0000 C CNN -F 1 "PORT" H 4150 2500 30 0000 C CNN - 1 4150 2500 - 0 1 1 0 -$EndComp -$Comp -L GND #PWR02 -U 1 1 5417D5DC -P 4150 4300 -F 0 "#PWR02" H 4150 4300 30 0001 C CNN -F 1 "GND" H 4150 4230 30 0001 C CNN - 1 4150 4300 - 1 0 0 -1 -$EndComp -$Comp -L ANALOGSWITCH U2 -U 1 1 5417D537 -P 4900 4050 -F 0 "U2" H 4700 4100 30 0000 C CNN -F 1 "ANALOGSWITCH" H 4900 4050 30 0000 C CNN - 1 4900 4050 - 1 0 0 -1 -$EndComp -$Comp -L ANALOGSWITCH U1 -U 1 1 5417D530 -P 4900 3400 -F 0 "U1" H 4700 3450 30 0000 C CNN -F 1 "ANALOGSWITCH" H 4900 3400 30 0000 C CNN - 1 4900 3400 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/Examples/Diac_Triac/diac.cir.ckt b/Examples/Diac_Triac/diac.cir.ckt deleted file mode 100644 index e89f9cfb..00000000 --- a/Examples/Diac_Triac/diac.cir.ckt +++ /dev/null @@ -1,9 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: 09/22/14 16:36:23 - -u3 1 2 port -* Analog Switch analogswitch -* Analog Switch analogswitch -a1 1 (1 2) u2 -.model u2 aswitch(cntl_on=-25 cntl_off=-0.1 r_on=0.0125 r_off=1000000) -a2 1 (1 2) u1 -.model u1 aswitch(cntl_on=25 cntl_off=0.1 r_on=0.0125 r_off=1000000) diff --git a/Examples/Diac_Triac/diac.cir.out~ b/Examples/Diac_Triac/diac.cir.out~ deleted file mode 100644 index 89cc8142..00000000 --- a/Examples/Diac_Triac/diac.cir.out~ +++ /dev/null @@ -1,24 +0,0 @@ -* /opt/esim/src/subcircuitlibrary/diac/diac.cir - -* u3 1 2 port -* u1 1 1 2 aswitch -* u2 1 1 2 aswitch -a1 1 [1 2 ] u1 -a2 1 [1 2 ] u2 -* Schematic Name: aswitch, NgSpice Name: aswitch -.model u1 aswitch(log=TRUE cntl_off=0.1 cntl_on=25 r_on=0.0125 r_off=1000000 ) -* Schematic Name: aswitch, NgSpice Name: aswitch -.model u2 aswitch(log=TRUE cntl_off=-0.1 cntl_on=-25 r_on=0.0125 r_off=1000000 ) -* Schematic Name: aswitch, NgSpice Name: aswitch -.model u1 aswitch(log=TRUE cntl_off=0.1 cntl_on=25 r_on=0.0125 r_off=1000000 ) -* Schematic Name: aswitch, NgSpice Name: aswitch -.model u2 aswitch(log=TRUE cntl_off=-0.1 cntl_on=-25 r_on=0.0125 r_off=1000000 ) -.tran 0e-00 0e-00 0e-00 - -* Control Statements -.control -run -print allv > plot_data_v.txt -print alli > plot_data_i.txt -.endc -.end diff --git a/Examples/Diac_Triac/diac.sub~ b/Examples/Diac_Triac/diac.sub~ deleted file mode 100644 index 43c2d279..00000000 --- a/Examples/Diac_Triac/diac.sub~ +++ /dev/null @@ -1,18 +0,0 @@ -* Subcircuit diac -.subckt diac 1 2 -* /opt/esim/src/subcircuitlibrary/diac/diac.cir -* u1 1 1 2 aswitch -* u2 1 1 2 aswitch -a1 1 [1 2 ] u1 -a2 1 [1 2 ] u2 -* Schematic Name: aswitch, NgSpice Name: aswitch -.model u1 aswitch(log=TRUE cntl_off=0.1 cntl_on=25 r_on=0.0125 r_off=1000000 ) -* Schematic Name: aswitch, NgSpice Name: aswitch -.model u2 aswitch(log=TRUE cntl_off=-0.1 cntl_on=-25 r_on=0.0125 r_off=1000000 ) -* Schematic Name: aswitch, NgSpice Name: aswitch -.model u1 aswitch(log=TRUE cntl_off=0.1 cntl_on=25 r_on=0.0125 r_off=1000000 ) -* Schematic Name: aswitch, NgSpice Name: aswitch -.model u2 aswitch(log=TRUE cntl_off=-0.1 cntl_on=-25 r_on=0.0125 r_off=1000000 ) -* Control Statements - -.ends diac \ No newline at end of file diff --git a/Examples/Diac_Triac/diac_Previous_Values.xml b/Examples/Diac_Triac/diac_Previous_Values.xml deleted file mode 100644 index 96df431c..00000000 --- a/Examples/Diac_Triac/diac_Previous_Values.xml +++ /dev/null @@ -1 +0,0 @@ -aswitch0.110000000.012525aswitch-0.110000000.0125-25truefalsefalseHzHz0Volts or AmperesVolts or AmperesVolts or AmperesSecSecSec \ No newline at end of file diff --git a/Examples/Diac_Triac/triac.bak b/Examples/Diac_Triac/triac.bak deleted file mode 100644 index f30533a0..00000000 --- a/Examples/Diac_Triac/triac.bak +++ /dev/null @@ -1,308 +0,0 @@ -EESchema Schematic File Version 2 -LIBS:eSim_Analog -LIBS:eSim_Devices -LIBS:eSim_Digital -LIBS:eSim_Hybrid -LIBS:eSim_Miscellaneous -LIBS:eSim_Sources -LIBS:eSim_Subckt -LIBS:eSim_User -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:triac-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11693 8268 -encoding utf-8 -Sheet 1 1 -Title "" -Date "22 sep 2014" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -$Comp -L PORT U3 -U 3 1 541D1606 -P 1250 1750 -F 0 "U3" H 1250 1700 30 0000 C CNN -F 1 "PORT" H 1250 1750 30 0000 C CNN -F 2 "" H 1250 1750 60 0001 C CNN -F 3 "" H 1250 1750 60 0001 C CNN - 3 1250 1750 - 1 0 0 -1 -$EndComp -$Comp -L PORT U3 -U 2 1 541D1601 -P 1300 900 -F 0 "U3" H 1300 850 30 0000 C CNN -F 1 "PORT" H 1300 900 30 0000 C CNN -F 2 "" H 1300 900 60 0001 C CNN -F 3 "" H 1300 900 60 0001 C CNN - 2 1300 900 - 1 0 0 -1 -$EndComp -$Comp -L PORT U3 -U 1 1 541D15F6 -P 1150 4050 -F 0 "U3" H 1150 4000 30 0000 C CNN -F 1 "PORT" H 1150 4050 30 0000 C CNN -F 2 "" H 1150 4050 60 0001 C CNN -F 3 "" H 1150 4050 60 0001 C CNN - 1 1150 4050 - 1 0 0 -1 -$EndComp -$Comp -L CCCS F3 -U 1 1 541D1417 -P 6250 3100 -F 0 "F3" H 6050 3200 50 0000 C CNN -F 1 "10" H 6050 3050 50 0000 C CNN -F 2 "" H 6250 3100 60 0001 C CNN -F 3 "" H 6250 3100 60 0001 C CNN - 1 6250 3100 - 0 1 1 0 -$EndComp -$Comp -L DC v3 -U 1 1 541D13FB -P 6050 1950 -F 0 "v3" H 5850 2050 60 0000 C CNN -F 1 "DC" H 5850 1900 60 0000 C CNN -F 2 "R1" H 5750 1950 60 0000 C CNN -F 3 "" H 6050 1950 60 0001 C CNN - 1 6050 1950 - -1 0 0 1 -$EndComp -$Comp -L CCCS F2 -U 1 1 541D13A3 -P 3900 2550 -F 0 "F2" H 3700 2650 50 0000 C CNN -F 1 "10" H 3700 2500 50 0000 C CNN -F 2 "" H 3900 2550 60 0001 C CNN -F 3 "" H 3900 2550 60 0001 C CNN - 1 3900 2550 - 0 1 1 0 -$EndComp -$Comp -L DC v2 -U 1 1 541D1398 -P 3700 1850 -F 0 "v2" H 3500 1950 60 0000 C CNN -F 1 "DC" H 3500 1800 60 0000 C CNN -F 2 "R1" H 3400 1850 60 0000 C CNN -F 3 "" H 3700 1850 60 0001 C CNN - 1 3700 1850 - 1 0 0 -1 -$EndComp -$Comp -L C C1 -U 1 1 541D137C -P 3300 4350 -F 0 "C1" H 3350 4450 50 0000 L CNN -F 1 "10u" H 3350 4250 50 0000 L CNN -F 2 "" H 3300 4350 60 0001 C CNN -F 3 "" H 3300 4350 60 0001 C CNN - 1 3300 4350 - 1 0 0 -1 -$EndComp -$Comp -L CCCS F1 -U 1 1 541D1363 -P 2100 3600 -F 0 "F1" H 1900 3700 50 0000 C CNN -F 1 "100" H 1900 3550 50 0000 C CNN -F 2 "" H 2100 3600 60 0001 C CNN -F 3 "" H 2100 3600 60 0001 C CNN - 1 2100 3600 - 0 1 1 0 -$EndComp -$Comp -L DC v1 -U 1 1 541D1357 -P 1900 2900 -F 0 "v1" H 1700 3000 60 0000 C CNN -F 1 "DC" H 1700 2850 60 0000 C CNN -F 2 "R1" H 1600 2900 60 0000 C CNN -F 3 "" H 1900 2900 60 0001 C CNN - 1 1900 2900 - 1 0 0 -1 -$EndComp -$Comp -L aswitch U1 -U 1 1 56669B8A -P 4600 1100 -F 0 "U1" H 5050 1400 60 0000 C CNN -F 1 "aswitch" H 5050 1300 60 0000 C CNN -F 2 "" H 5050 1200 60 0000 C CNN -F 3 "" H 5050 1200 60 0000 C CNN - 1 4600 1100 - -1 0 0 1 -$EndComp -$Comp -L aswitch U2 -U 1 1 56669DB5 -P 6400 1350 -F 0 "U2" H 6850 1650 60 0000 C CNN -F 1 "aswitch" H 6850 1550 60 0000 C CNN -F 2 "" H 6850 1450 60 0000 C CNN -F 3 "" H 6850 1450 60 0000 C CNN - 1 6400 1350 - 1 0 0 -1 -$EndComp -Connection ~ 4600 900 -Wire Wire Line - 4600 1250 4600 900 -Wire Wire Line - 1900 1750 1500 1750 -Connection ~ 6300 4900 -Wire Wire Line - 6300 3400 6300 4900 -Connection ~ 3950 4900 -Wire Wire Line - 3950 2850 3950 4900 -Connection ~ 2700 4050 -Wire Wire Line - 2700 3300 2700 4050 -Wire Wire Line - 2150 3300 2700 3300 -Connection ~ 3300 4900 -Wire Wire Line - 7450 4900 7450 700 -Connection ~ 3700 4050 -Wire Wire Line - 6050 4050 6050 3150 -Wire Wire Line - 6050 2400 6050 2500 -Wire Wire Line - 3700 1250 3750 1250 -Wire Wire Line - 3700 1400 3700 1250 -Wire Wire Line - 3700 2850 3700 2600 -Connection ~ 2750 4050 -Wire Wire Line - 2750 4050 2750 4150 -Wire Wire Line - 1900 3350 1900 3550 -Wire Wire Line - 1900 2450 1900 1750 -Wire Wire Line - 1900 4050 1900 3650 -Wire Wire Line - 3300 4050 3300 4200 -Wire Wire Line - 3700 3150 3700 4050 -Connection ~ 3300 4050 -Wire Wire Line - 3700 2500 3700 2300 -Wire Wire Line - 6050 1200 6050 1500 -Wire Wire Line - 6400 1200 6050 1200 -Wire Wire Line - 6050 2800 6050 3050 -Wire Wire Line - 2750 4450 2750 4900 -Wire Wire Line - 3300 4500 3300 4900 -Connection ~ 7450 1400 -Wire Wire Line - 2150 4900 2150 3900 -Wire Wire Line - 2150 4900 7450 4900 -Connection ~ 2750 4900 -Wire Wire Line - 4450 2250 3950 2250 -Wire Wire Line - 4450 4050 4450 2250 -Connection ~ 4450 4050 -Wire Wire Line - 6650 2800 6300 2800 -Wire Wire Line - 6650 4050 6650 2800 -Connection ~ 6050 4050 -Wire Wire Line - 1550 900 7250 900 -Wire Wire Line - 1400 4050 6650 4050 -Connection ~ 1900 4050 -Wire Wire Line - 7450 700 4150 700 -Wire Wire Line - 4150 700 4150 1000 -Wire Wire Line - 6850 1450 7350 1450 -Wire Wire Line - 7350 1450 7350 1400 -Wire Wire Line - 7350 1400 7450 1400 -Wire Wire Line - 7250 900 7250 1200 -$Comp -L R R1 -U 1 1 5666A886 -P 2700 4250 -F 0 "R1" H 2750 4380 50 0000 C CNN -F 1 "1" H 2750 4300 50 0000 C CNN -F 2 "" H 2750 4230 30 0000 C CNN -F 3 "" V 2750 4300 30 0000 C CNN - 1 2700 4250 - 0 1 1 0 -$EndComp -$Comp -L D D1 -U 1 1 5666A9A7 -P 3700 3000 -F 0 "D1" H 3700 3100 50 0000 C CNN -F 1 "D" H 3700 2900 50 0000 C CNN -F 2 "" H 3700 3000 60 0000 C CNN -F 3 "" H 3700 3000 60 0000 C CNN - 1 3700 3000 - 0 1 1 0 -$EndComp -$Comp -L D D2 -U 1 1 5666A9E4 -P 6050 2650 -F 0 "D2" H 6050 2750 50 0000 C CNN -F 1 "D" H 6050 2550 50 0000 C CNN -F 2 "" H 6050 2650 60 0000 C CNN -F 3 "" H 6050 2650 60 0000 C CNN - 1 6050 2650 - 0 -1 -1 0 -$EndComp -$EndSCHEMATC diff --git a/Examples/Diac_Triac/triac.cir.ckt b/Examples/Diac_Triac/triac.cir.ckt deleted file mode 100644 index 821b417b..00000000 --- a/Examples/Diac_Triac/triac.cir.ckt +++ /dev/null @@ -1,26 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: 09/20/14 11:23:24 -.include diode.lib - -u3 7 4 5 port -* f3 -d2 3 2 diode -v3 2 1 dc 0 -* Analog Switch analogswitch -d1 11 7 diode -* f2 -v2 8 10 dc 0 -* Analog Switch analogswitch -c1 7 9 10u -r1 7 9 1 -* f1 -v1 5 6 dc 0 -Vf3 3 7 0 -f3 7 9 Vf3 10 -Vf2 10 11 0 -f2 7 9 Vf2 10 -Vf1 6 7 0 -f1 7 9 Vf1 100 -a1 9 (1 4) u2 -.model u2 aswitch(cntl_on=-1 cntl_off=-0.1 r_on=0.0125 r_off=1000000) -a2 9 (4 8) u1 -.model u1 aswitch(cntl_on=1 cntl_off=0.1 r_on=0.0125 r_off=1000000) diff --git a/Examples/Diac_Triac/triac.cir.out~ b/Examples/Diac_Triac/triac.cir.out~ deleted file mode 100644 index 7bd15a7b..00000000 --- a/Examples/Diac_Triac/triac.cir.out~ +++ /dev/null @@ -1,41 +0,0 @@ -* /opt/esim/src/subcircuitlibrary/triac/triac.cir - -.include PowerDiode.lib -* u3 8 11 10 port -* f3 -v3 7 2 dc 0 -* f2 -v2 6 3 dc 0 -c1 8 9 10u -* f1 -v1 10 4 dc 0 -* u1 9 11 6 aswitch -* u2 9 2 11 aswitch -r1 8 9 1 -d1 5 8 PowerDiode -d2 1 7 PowerDiode -Vf3 1 8 0 -f3 8 9 Vf3 10 -Vf2 3 5 0 -f2 8 9 Vf2 10 -Vf1 4 8 0 -f1 8 9 Vf1 100 -a1 9 [11 6 ] u1 -a2 9 [2 11 ] u2 -* Schematic Name: aswitch, NgSpice Name: aswitch -.model u1 aswitch(log=TRUE cntl_off=0.1 cntl_on=1 r_on=0.0125 r_off=1000000 ) -* Schematic Name: aswitch, NgSpice Name: aswitch -.model u2 aswitch(log=TRUE cntl_off=-0.1 cntl_on=-1 r_on=0.0125 r_off=1000000 ) -* Schematic Name: aswitch, NgSpice Name: aswitch -.model u1 aswitch(log=TRUE cntl_off=0.1 cntl_on=1 r_on=0.0125 r_off=1000000 ) -* Schematic Name: aswitch, NgSpice Name: aswitch -.model u2 aswitch(log=TRUE cntl_off=-0.1 cntl_on=-1 r_on=0.0125 r_off=1000000 ) -.tran 0e-00 0e-00 0e-00 - -* Control Statements -.control -run -print allv > plot_data_v.txt -print alli > plot_data_i.txt -.endc -.end diff --git a/Examples/Diac_Triac/triac.sub~ b/Examples/Diac_Triac/triac.sub~ deleted file mode 100644 index ebbed05e..00000000 --- a/Examples/Diac_Triac/triac.sub~ +++ /dev/null @@ -1,35 +0,0 @@ -* Subcircuit triac -.subckt triac 8 11 10 -* /opt/esim/src/subcircuitlibrary/triac/triac.cir -.include PowerDiode.lib -* f3 -v3 7 2 dc 0 -* f2 -v2 6 3 dc 0 -c1 8 9 10u -* f1 -v1 10 4 dc 0 -* u1 9 11 6 aswitch -* u2 9 2 11 aswitch -r1 8 9 1 -d1 5 8 PowerDiode -d2 1 7 PowerDiode -Vf3 1 8 0 -f3 8 9 Vf3 10 -Vf2 3 5 0 -f2 8 9 Vf2 10 -Vf1 4 8 0 -f1 8 9 Vf1 100 -a1 9 [11 6 ] u1 -a2 9 [2 11 ] u2 -* Schematic Name: aswitch, NgSpice Name: aswitch -.model u1 aswitch(log=TRUE cntl_off=0.1 cntl_on=1 r_on=0.0125 r_off=1000000 ) -* Schematic Name: aswitch, NgSpice Name: aswitch -.model u2 aswitch(log=TRUE cntl_off=-0.1 cntl_on=-1 r_on=0.0125 r_off=1000000 ) -* Schematic Name: aswitch, NgSpice Name: aswitch -.model u1 aswitch(log=TRUE cntl_off=0.1 cntl_on=1 r_on=0.0125 r_off=1000000 ) -* Schematic Name: aswitch, NgSpice Name: aswitch -.model u2 aswitch(log=TRUE cntl_off=-0.1 cntl_on=-1 r_on=0.0125 r_off=1000000 ) -* Control Statements - -.ends triac \ No newline at end of file diff --git a/Examples/Diac_Triac/triac_Previous_Values.xml b/Examples/Diac_Triac/triac_Previous_Values.xml deleted file mode 100644 index 80da52b3..00000000 --- a/Examples/Diac_Triac/triac_Previous_Values.xml +++ /dev/null @@ -1 +0,0 @@ -dc0dc0dc0aswitch0.110000000.01251aswitch-0.110000000.0125-1/opt/eSim/src/deviceModelLibrary/Diode/PowerDiode.lib/opt/eSim/src/deviceModelLibrary/Diode/PowerDiode.libtruefalsefalseHzHz0Volts or AmperesVolts or AmperesVolts or AmperesSecSecSec \ No newline at end of file -- cgit From 7b559bc99379a475866479137f3ee2ed4dfbab86 Mon Sep 17 00:00:00 2001 From: Sunil Shetye Date: Tue, 12 Mar 2019 12:30:33 +0530 Subject: remove extra + at the start --- Examples/Diac_Triac/PowerDiode.lib | 21 +-------------------- 1 file changed, 1 insertion(+), 20 deletions(-) (limited to 'Examples/Diac_Triac') diff --git a/Examples/Diac_Triac/PowerDiode.lib b/Examples/Diac_Triac/PowerDiode.lib index a2f61dce..d6fb6469 100644 --- a/Examples/Diac_Triac/PowerDiode.lib +++ b/Examples/Diac_Triac/PowerDiode.lib @@ -1,20 +1 @@ -.MODEL PowerDiode D( -+ Vj=.75 -+ Nbvl=14.976 -+ Cjo=175p -+ Rs=.25 -+ Isr=1.859n -+ Eg=1.11 -+ M=.5516 -+ Nbv=1.6989 -+ N=1 -+ Tbv1=-21.277u -+ bv=1800 -+ Fc=.5 -+ Ikf=0 -+ Nr=2 -+ Ibv=20.245m -+ Is=2.2E-15 -+ Xti=3 -+ Ibvl=1.9556m -) \ No newline at end of file +.MODEL PowerDiode D( Vj=.75 Nbvl=14.976 Cjo=175p Rs=.25 Isr=1.859n Eg=1.11 M=.5516 Nbv=1.6989 N=1 Tbv1=-21.277u bv=1800 Fc=.5 Ikf=0 Nr=2 Ibv=20.245m Is=2.2E-15 Xti=3 Ibvl=1.9556m ) -- cgit