From 7b559bc99379a475866479137f3ee2ed4dfbab86 Mon Sep 17 00:00:00 2001
From: Sunil Shetye
Date: Tue, 12 Mar 2019 12:30:33 +0530
Subject: remove extra + at the start

---
 Examples/Diac_Triac/PowerDiode.lib | 21 +--------------------
 1 file changed, 1 insertion(+), 20 deletions(-)

(limited to 'Examples/Diac_Triac/PowerDiode.lib')

diff --git a/Examples/Diac_Triac/PowerDiode.lib b/Examples/Diac_Triac/PowerDiode.lib
index a2f61dce..d6fb6469 100644
--- a/Examples/Diac_Triac/PowerDiode.lib
+++ b/Examples/Diac_Triac/PowerDiode.lib
@@ -1,20 +1 @@
-.MODEL PowerDiode D(
-+ Vj=.75
-+ Nbvl=14.976
-+ Cjo=175p
-+ Rs=.25
-+ Isr=1.859n
-+ Eg=1.11
-+ M=.5516
-+ Nbv=1.6989
-+ N=1
-+ Tbv1=-21.277u
-+ bv=1800
-+ Fc=.5
-+ Ikf=0
-+ Nr=2
-+ Ibv=20.245m
-+ Is=2.2E-15
-+ Xti=3
-+ Ibvl=1.9556m
-)
\ No newline at end of file
+.MODEL PowerDiode D( Vj=.75 Nbvl=14.976 Cjo=175p Rs=.25 Isr=1.859n Eg=1.11 M=.5516 Nbv=1.6989 N=1 Tbv1=-21.277u bv=1800 Fc=.5 Ikf=0 Nr=2 Ibv=20.245m Is=2.2E-15 Xti=3 Ibvl=1.9556m )
-- 
cgit