From dc61eab5251234f02c0377ea328b929340b3604c Mon Sep 17 00:00:00 2001 From: saurabhb17 Date: Wed, 11 Mar 2020 14:59:48 +0530 Subject: cleanup part2 --- .../4073_test/4073.cir~fellowship2019-python3 | 14 ++++++++++++++ 1 file changed, 14 insertions(+) create mode 100644 Examples/Analysis_Of_Digital_IC/4073_test/4073.cir~fellowship2019-python3 (limited to 'Examples/Analysis_Of_Digital_IC/4073_test/4073.cir~fellowship2019-python3') diff --git a/Examples/Analysis_Of_Digital_IC/4073_test/4073.cir~fellowship2019-python3 b/Examples/Analysis_Of_Digital_IC/4073_test/4073.cir~fellowship2019-python3 new file mode 100644 index 00000000..e159f055 --- /dev/null +++ b/Examples/Analysis_Of_Digital_IC/4073_test/4073.cir~fellowship2019-python3 @@ -0,0 +1,14 @@ +* C:\Users\malli\eSim\src\SubcircuitLibrary\4073\4073.cir + +* EESchema Netlist Version 1.1 (Spice format) creation date: 05/31/19 16:41:15 + +* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N +* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +* Sheet Name: / +X1 Net-_U1-Pad1_ Net-_U1-Pad2_ Net-_U1-Pad8_ Net-_U1-Pad9_ 3_and +U1 Net-_U1-Pad1_ Net-_U1-Pad2_ Net-_U1-Pad3_ Net-_U1-Pad4_ Net-_U1-Pad5_ Net-_U1-Pad6_ ? Net-_U1-Pad8_ Net-_U1-Pad9_ Net-_U1-Pad10_ Net-_U1-Pad11_ Net-_U1-Pad12_ Net-_U1-Pad13_ ? PORT +X3 Net-_U1-Pad3_ Net-_U1-Pad4_ Net-_U1-Pad5_ Net-_U1-Pad6_ 3_and +X2 Net-_U1-Pad11_ Net-_U1-Pad12_ Net-_U1-Pad13_ Net-_U1-Pad10_ 3_and + +.end -- cgit