From cb55e59de7ee4383c04edfae7c39ad9ae9552b36 Mon Sep 17 00:00:00 2001
From: rahulp13
Date: Fri, 14 Feb 2020 15:16:35 +0530
Subject: common code for Win and Linux, merged py2 changes

---
 Examples/4_to_16_Decoder_using_74154IC/5_nand.cir.out | 18 ------------------
 1 file changed, 18 deletions(-)
 delete mode 100644 Examples/4_to_16_Decoder_using_74154IC/5_nand.cir.out

(limited to 'Examples/4_to_16_Decoder_using_74154IC/5_nand.cir.out')

diff --git a/Examples/4_to_16_Decoder_using_74154IC/5_nand.cir.out b/Examples/4_to_16_Decoder_using_74154IC/5_nand.cir.out
deleted file mode 100644
index 164de911..00000000
--- a/Examples/4_to_16_Decoder_using_74154IC/5_nand.cir.out
+++ /dev/null
@@ -1,18 +0,0 @@
-* /home/mallikarjuna/downloads/esim-1.1.2/src/subcircuitlibrary/5_nand/5_nand.cir
-
-.include 5_and.sub
-x1 net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ net-_u1-pad5_ net-_u2-pad1_ 5_and
-* u2  net-_u2-pad1_ net-_u1-pad6_ d_inverter
-* u1  net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ net-_u1-pad5_ net-_u1-pad6_ port
-a1 net-_u2-pad1_ net-_u1-pad6_ u2
-* Schematic Name: d_inverter, NgSpice Name: d_inverter
-.model u2 d_inverter(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 
-.tran 0e-00 0e-00 0e-00
-
-* Control Statements 
-.control
-run
-print allv > plot_data_v.txt
-print alli > plot_data_i.txt
-.endc
-.end
-- 
cgit