From d1fe0fbb27b6a34b64304bb8a3d36dccb855dfbf Mon Sep 17 00:00:00 2001 From: ajayboddu-2006 Date: Sun, 29 Jun 2025 21:50:28 +0530 Subject: SN74100 - 8-Bit Bistable Latch --- .../SubcircuitLibrary/SN74100/SN74100-cache.lib | 108 ++ library/SubcircuitLibrary/SN74100/SN74100.bck | 7 + library/SubcircuitLibrary/SN74100/SN74100.cir | 67 + library/SubcircuitLibrary/SN74100/SN74100.cir.out | 236 +++ library/SubcircuitLibrary/SN74100/SN74100.dcm | 7 + library/SubcircuitLibrary/SN74100/SN74100.lib | 1043 ++++++++++++ library/SubcircuitLibrary/SN74100/SN74100.pro | 73 + library/SubcircuitLibrary/SN74100/SN74100.sch | 1791 ++++++++++++++++++++ library/SubcircuitLibrary/SN74100/SN74100.sub | 230 +++ .../SN74100/SN74100_Previous_Values.xml | 1 + library/SubcircuitLibrary/SN74100/analysis | 1 + 11 files changed, 3564 insertions(+) create mode 100644 library/SubcircuitLibrary/SN74100/SN74100-cache.lib create mode 100644 library/SubcircuitLibrary/SN74100/SN74100.bck create mode 100644 library/SubcircuitLibrary/SN74100/SN74100.cir create mode 100644 library/SubcircuitLibrary/SN74100/SN74100.cir.out create mode 100644 library/SubcircuitLibrary/SN74100/SN74100.dcm create mode 100644 library/SubcircuitLibrary/SN74100/SN74100.lib create mode 100644 library/SubcircuitLibrary/SN74100/SN74100.pro create mode 100644 library/SubcircuitLibrary/SN74100/SN74100.sch create mode 100644 library/SubcircuitLibrary/SN74100/SN74100.sub create mode 100644 library/SubcircuitLibrary/SN74100/SN74100_Previous_Values.xml create mode 100644 library/SubcircuitLibrary/SN74100/analysis diff --git a/library/SubcircuitLibrary/SN74100/SN74100-cache.lib b/library/SubcircuitLibrary/SN74100/SN74100-cache.lib new file mode 100644 index 00000000..c315ee13 --- /dev/null +++ b/library/SubcircuitLibrary/SN74100/SN74100-cache.lib @@ -0,0 +1,108 @@ +EESchema-LIBRARY Version 2.3 +#encoding utf-8 +# +# PORT +# +DEF PORT U 0 40 Y Y 26 F N +F0 "U" 50 100 30 H V C CNN +F1 "PORT" 0 0 30 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0 +A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50 +S -100 50 100 -50 0 1 0 N +X ~ 1 250 0 100 L 30 30 1 1 B +X ~ 2 250 0 100 L 30 30 2 1 B +X ~ 3 250 0 100 L 30 30 3 1 B +X ~ 4 250 0 100 L 30 30 4 1 B +X ~ 5 250 0 100 L 30 30 5 1 B +X ~ 6 250 0 100 L 30 30 6 1 B +X ~ 7 250 0 100 L 30 30 7 1 B +X ~ 8 250 0 100 L 30 30 8 1 B +X ~ 9 250 0 100 L 30 30 9 1 B +X ~ 10 250 0 100 L 30 30 10 1 B +X ~ 11 250 0 100 L 30 30 11 1 B +X ~ 12 250 0 100 L 30 30 12 1 B +X ~ 13 250 0 100 L 30 30 13 1 B +X ~ 14 250 0 100 L 30 30 14 1 B +X ~ 15 250 0 100 L 30 30 15 1 B +X ~ 16 250 0 100 L 30 30 16 1 B +X ~ 17 250 0 100 L 30 30 17 1 B +X ~ 18 250 0 100 L 30 30 18 1 B +X ~ 19 250 0 100 L 30 30 19 1 B +X ~ 20 250 0 100 L 30 30 20 1 B +X ~ 21 250 0 100 L 30 30 21 1 B +X ~ 22 250 0 100 L 30 30 22 1 B +X ~ 23 250 0 100 L 30 30 23 1 B +X ~ 24 250 0 100 L 30 30 24 1 B +X ~ 25 250 0 100 L 30 30 25 1 B +X ~ 26 250 0 100 L 30 30 26 1 B +ENDDRAW +ENDDEF +# +# d_and +# +DEF d_and U 0 40 Y Y 1 F N +F0 "U" 0 0 60 H V C CNN +F1 "d_and" 50 100 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +A 149 50 100 -894 0 0 1 0 N 150 -50 250 50 +A 150 49 100 6 900 0 1 0 N 250 50 150 150 +P 4 0 1 0 150 -50 -250 -50 -250 150 150 150 N +X IN1 1 -450 100 200 R 50 50 1 1 I +X IN2 2 -450 0 200 R 50 50 1 1 I +X OUT 3 450 50 200 L 50 50 1 1 O +ENDDRAW +ENDDEF +# +# d_buffer +# +DEF d_buffer U 0 40 Y Y 1 F N +F0 "U" 0 -50 60 H V C CNN +F1 "d_buffer" 0 50 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 4 0 1 0 -300 200 -300 -200 450 0 -300 200 N +X IN 1 -500 0 200 R 50 50 1 1 I +X OUT 2 650 0 200 L 50 50 1 1 O +ENDDRAW +ENDDEF +# +# d_inverter +# +DEF d_inverter U 0 40 Y Y 1 F N +F0 "U" 0 -100 60 H V C CNN +F1 "d_inverter" 0 150 60 H V C CNN +F2 "" 50 -50 60 H V C CNN +F3 "" 50 -50 60 H V C CNN +DRAW +P 4 0 1 0 -100 50 -100 -50 100 0 -100 50 N +X ~ 1 -300 0 200 R 50 50 1 1 I +X ~ 2 300 0 200 L 50 50 1 1 O I +ENDDRAW +ENDDEF +# +# d_nor +# +DEF d_nor U 0 40 Y Y 1 F N +F0 "U" 0 0 60 H V C CNN +F1 "d_nor" 50 100 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +A -450 50 224 266 -266 0 1 0 N -250 150 -250 -50 +A -25 -124 325 574 323 0 1 0 N 150 150 250 50 +A 74 125 191 -665 -231 0 1 0 N 150 -50 250 50 +P 2 0 1 0 -250 -50 150 -50 N +P 2 0 1 0 -250 150 150 150 N +X IN1 1 -450 100 215 R 50 50 1 1 I +X IN2 2 -450 0 215 R 50 50 1 1 I +X OUT 3 450 50 200 L 50 50 1 1 O I +ENDDRAW +ENDDEF +# +#End Library diff --git a/library/SubcircuitLibrary/SN74100/SN74100.bck b/library/SubcircuitLibrary/SN74100/SN74100.bck new file mode 100644 index 00000000..1980d0d1 --- /dev/null +++ b/library/SubcircuitLibrary/SN74100/SN74100.bck @@ -0,0 +1,7 @@ +EESchema-DOCLIB Version 2.0 +# +$CMP SCR +D Thyristor +$ENDCMP +# +#End Doc Library diff --git a/library/SubcircuitLibrary/SN74100/SN74100.cir b/library/SubcircuitLibrary/SN74100/SN74100.cir new file mode 100644 index 00000000..1d4e5120 --- /dev/null +++ b/library/SubcircuitLibrary/SN74100/SN74100.cir @@ -0,0 +1,67 @@ +* C:\FOSSEE\eSim\library\SubcircuitLibrary\SN74100\SN74100.cir + +* EESchema Netlist Version 1.1 (Spice format) creation date: 06/02/25 11:52:06 + +* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N +* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +* Sheet Name: / +U5 Net-_U11-Pad2_ Net-_U3-Pad2_ d_inverter +U7 Net-_U11-Pad2_ Net-_U11-Pad23_ Net-_U7-Pad3_ d_and +U3 Net-_U11-Pad23_ Net-_U3-Pad2_ Net-_U2-Pad2_ d_and +U2 Net-_U2-Pad1_ Net-_U2-Pad2_ Net-_U11-Pad5_ d_nor +U4 Net-_U4-Pad1_ Net-_U2-Pad1_ d_buffer +U6 Net-_U11-Pad5_ Net-_U6-Pad2_ d_buffer +U8 Net-_U7-Pad3_ Net-_U6-Pad2_ Net-_U4-Pad1_ d_nor +U18 Net-_U11-Pad3_ Net-_U12-Pad2_ d_inverter +U24 Net-_U11-Pad3_ Net-_U11-Pad23_ Net-_U24-Pad3_ d_and +U12 Net-_U11-Pad23_ Net-_U12-Pad2_ Net-_U1-Pad2_ d_and +U1 Net-_U1-Pad1_ Net-_U1-Pad2_ Net-_U1-Pad3_ d_nor +U15 Net-_U15-Pad1_ Net-_U1-Pad1_ d_buffer +U21 Net-_U1-Pad3_ Net-_U21-Pad2_ d_buffer +U27 Net-_U24-Pad3_ Net-_U21-Pad2_ Net-_U15-Pad1_ d_nor +U42 Net-_U11-Pad11_ Net-_U34-Pad2_ d_inverter +U49 Net-_U11-Pad11_ Net-_U11-Pad12_ Net-_U49-Pad3_ d_and +U34 Net-_U11-Pad12_ Net-_U34-Pad2_ Net-_U30-Pad2_ d_and +U30 Net-_U30-Pad1_ Net-_U30-Pad2_ Net-_U11-Pad8_ d_nor +U38 Net-_U38-Pad1_ Net-_U30-Pad1_ d_buffer +U46 Net-_U11-Pad8_ Net-_U46-Pad2_ d_buffer +U54 Net-_U49-Pad3_ Net-_U46-Pad2_ Net-_U38-Pad1_ d_nor +U43 Net-_U11-Pad10_ Net-_U35-Pad2_ d_inverter +U51 Net-_U11-Pad10_ Net-_U11-Pad12_ Net-_U51-Pad3_ d_and +U35 Net-_U11-Pad12_ Net-_U35-Pad2_ Net-_U31-Pad2_ d_and +U31 Net-_U31-Pad1_ Net-_U31-Pad2_ Net-_U11-Pad9_ d_nor +U39 Net-_U39-Pad1_ Net-_U31-Pad1_ d_buffer +U47 Net-_U11-Pad9_ Net-_U47-Pad2_ d_buffer +U55 Net-_U51-Pad3_ Net-_U47-Pad2_ Net-_U39-Pad1_ d_nor +U19 Net-_U11-Pad22_ Net-_U13-Pad2_ d_inverter +U25 Net-_U11-Pad22_ Net-_U11-Pad23_ Net-_U25-Pad3_ d_and +U13 Net-_U11-Pad23_ Net-_U13-Pad2_ Net-_U13-Pad3_ d_and +U9 Net-_U16-Pad2_ Net-_U13-Pad3_ Net-_U11-Pad19_ d_nor +U16 Net-_U16-Pad1_ Net-_U16-Pad2_ d_buffer +U22 Net-_U11-Pad19_ Net-_U22-Pad2_ d_buffer +U28 Net-_U25-Pad3_ Net-_U22-Pad2_ Net-_U16-Pad1_ d_nor +U20 Net-_U11-Pad21_ Net-_U14-Pad2_ d_inverter +U26 Net-_U11-Pad21_ Net-_U11-Pad23_ Net-_U26-Pad3_ d_and +U14 Net-_U11-Pad23_ Net-_U14-Pad2_ Net-_U10-Pad2_ d_and +U10 Net-_U10-Pad1_ Net-_U10-Pad2_ Net-_U10-Pad3_ d_nor +U17 Net-_U17-Pad1_ Net-_U10-Pad1_ d_buffer +U23 Net-_U10-Pad3_ Net-_U23-Pad2_ d_buffer +U29 Net-_U26-Pad3_ Net-_U23-Pad2_ Net-_U17-Pad1_ d_nor +U44 Net-_U11-Pad15_ Net-_U36-Pad2_ d_inverter +U52 Net-_U11-Pad15_ Net-_U11-Pad12_ Net-_U52-Pad3_ d_and +U36 Net-_U11-Pad12_ Net-_U36-Pad2_ Net-_U32-Pad2_ d_and +U32 Net-_U32-Pad1_ Net-_U32-Pad2_ Net-_U11-Pad18_ d_nor +U40 Net-_U40-Pad1_ Net-_U32-Pad1_ d_buffer +U48 Net-_U11-Pad18_ Net-_U48-Pad2_ d_buffer +U56 Net-_U52-Pad3_ Net-_U48-Pad2_ Net-_U40-Pad1_ d_nor +U45 Net-_U11-Pad16_ Net-_U37-Pad2_ d_inverter +U53 Net-_U11-Pad16_ Net-_U11-Pad12_ Net-_U53-Pad3_ d_and +U37 Net-_U11-Pad12_ Net-_U37-Pad2_ Net-_U33-Pad2_ d_and +U33 Net-_U33-Pad1_ Net-_U33-Pad2_ Net-_U11-Pad17_ d_nor +U41 Net-_U41-Pad1_ Net-_U33-Pad1_ d_buffer +U50 Net-_U11-Pad17_ Net-_U50-Pad2_ d_buffer +U57 Net-_U53-Pad3_ Net-_U50-Pad2_ Net-_U41-Pad1_ d_nor +U11 ? Net-_U11-Pad2_ Net-_U11-Pad3_ Net-_U1-Pad3_ Net-_U11-Pad5_ ? ? Net-_U11-Pad8_ Net-_U11-Pad9_ Net-_U11-Pad10_ Net-_U11-Pad11_ Net-_U11-Pad12_ ? ? Net-_U11-Pad15_ Net-_U11-Pad16_ Net-_U11-Pad17_ Net-_U11-Pad18_ Net-_U11-Pad19_ Net-_U10-Pad3_ Net-_U11-Pad21_ Net-_U11-Pad22_ Net-_U11-Pad23_ ? PORT + +.end diff --git a/library/SubcircuitLibrary/SN74100/SN74100.cir.out b/library/SubcircuitLibrary/SN74100/SN74100.cir.out new file mode 100644 index 00000000..3bb5b968 --- /dev/null +++ b/library/SubcircuitLibrary/SN74100/SN74100.cir.out @@ -0,0 +1,236 @@ +* c:\fossee\esim\library\subcircuitlibrary\sn74100\sn74100.cir + +* u5 net-_u11-pad2_ net-_u3-pad2_ d_inverter +* u7 net-_u11-pad2_ net-_u11-pad23_ net-_u7-pad3_ d_and +* u3 net-_u11-pad23_ net-_u3-pad2_ net-_u2-pad2_ d_and +* u2 net-_u2-pad1_ net-_u2-pad2_ net-_u11-pad5_ d_nor +* u4 net-_u4-pad1_ net-_u2-pad1_ d_buffer +* u6 net-_u11-pad5_ net-_u6-pad2_ d_buffer +* u8 net-_u7-pad3_ net-_u6-pad2_ net-_u4-pad1_ d_nor +* u18 net-_u11-pad3_ net-_u12-pad2_ d_inverter +* u24 net-_u11-pad3_ net-_u11-pad23_ net-_u24-pad3_ d_and +* u12 net-_u11-pad23_ net-_u12-pad2_ net-_u1-pad2_ d_and +* u1 net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ d_nor +* u15 net-_u15-pad1_ net-_u1-pad1_ d_buffer +* u21 net-_u1-pad3_ net-_u21-pad2_ d_buffer +* u27 net-_u24-pad3_ net-_u21-pad2_ net-_u15-pad1_ d_nor +* u42 net-_u11-pad11_ net-_u34-pad2_ d_inverter +* u49 net-_u11-pad11_ net-_u11-pad12_ net-_u49-pad3_ d_and +* u34 net-_u11-pad12_ net-_u34-pad2_ net-_u30-pad2_ d_and +* u30 net-_u30-pad1_ net-_u30-pad2_ net-_u11-pad8_ d_nor +* u38 net-_u38-pad1_ net-_u30-pad1_ d_buffer +* u46 net-_u11-pad8_ net-_u46-pad2_ d_buffer +* u54 net-_u49-pad3_ net-_u46-pad2_ net-_u38-pad1_ d_nor +* u43 net-_u11-pad10_ net-_u35-pad2_ d_inverter +* u51 net-_u11-pad10_ net-_u11-pad12_ net-_u51-pad3_ d_and +* u35 net-_u11-pad12_ net-_u35-pad2_ net-_u31-pad2_ d_and +* u31 net-_u31-pad1_ net-_u31-pad2_ net-_u11-pad9_ d_nor +* u39 net-_u39-pad1_ net-_u31-pad1_ d_buffer +* u47 net-_u11-pad9_ net-_u47-pad2_ d_buffer +* u55 net-_u51-pad3_ net-_u47-pad2_ net-_u39-pad1_ d_nor +* u19 net-_u11-pad22_ net-_u13-pad2_ d_inverter +* u25 net-_u11-pad22_ net-_u11-pad23_ net-_u25-pad3_ d_and +* u13 net-_u11-pad23_ net-_u13-pad2_ net-_u13-pad3_ d_and +* u9 net-_u16-pad2_ net-_u13-pad3_ net-_u11-pad19_ d_nor +* u16 net-_u16-pad1_ net-_u16-pad2_ d_buffer +* u22 net-_u11-pad19_ net-_u22-pad2_ d_buffer +* u28 net-_u25-pad3_ net-_u22-pad2_ net-_u16-pad1_ d_nor +* u20 net-_u11-pad21_ net-_u14-pad2_ d_inverter +* u26 net-_u11-pad21_ net-_u11-pad23_ net-_u26-pad3_ d_and +* u14 net-_u11-pad23_ net-_u14-pad2_ net-_u10-pad2_ d_and +* u10 net-_u10-pad1_ net-_u10-pad2_ net-_u10-pad3_ d_nor +* u17 net-_u17-pad1_ net-_u10-pad1_ d_buffer +* u23 net-_u10-pad3_ net-_u23-pad2_ d_buffer +* u29 net-_u26-pad3_ net-_u23-pad2_ net-_u17-pad1_ d_nor +* u44 net-_u11-pad15_ net-_u36-pad2_ d_inverter +* u52 net-_u11-pad15_ net-_u11-pad12_ net-_u52-pad3_ d_and +* u36 net-_u11-pad12_ net-_u36-pad2_ net-_u32-pad2_ d_and +* u32 net-_u32-pad1_ net-_u32-pad2_ net-_u11-pad18_ d_nor +* u40 net-_u40-pad1_ net-_u32-pad1_ d_buffer +* u48 net-_u11-pad18_ net-_u48-pad2_ d_buffer +* u56 net-_u52-pad3_ net-_u48-pad2_ net-_u40-pad1_ d_nor +* u45 net-_u11-pad16_ net-_u37-pad2_ d_inverter +* u53 net-_u11-pad16_ net-_u11-pad12_ net-_u53-pad3_ d_and +* u37 net-_u11-pad12_ net-_u37-pad2_ net-_u33-pad2_ d_and +* u33 net-_u33-pad1_ net-_u33-pad2_ net-_u11-pad17_ d_nor +* u41 net-_u41-pad1_ net-_u33-pad1_ d_buffer +* u50 net-_u11-pad17_ net-_u50-pad2_ d_buffer +* u57 net-_u53-pad3_ net-_u50-pad2_ net-_u41-pad1_ d_nor +* u11 ? net-_u11-pad2_ net-_u11-pad3_ net-_u1-pad3_ net-_u11-pad5_ ? ? net-_u11-pad8_ net-_u11-pad9_ net-_u11-pad10_ net-_u11-pad11_ net-_u11-pad12_ ? ? net-_u11-pad15_ net-_u11-pad16_ net-_u11-pad17_ net-_u11-pad18_ net-_u11-pad19_ net-_u10-pad3_ net-_u11-pad21_ net-_u11-pad22_ net-_u11-pad23_ ? port +a1 net-_u11-pad2_ net-_u3-pad2_ u5 +a2 [net-_u11-pad2_ net-_u11-pad23_ ] net-_u7-pad3_ u7 +a3 [net-_u11-pad23_ net-_u3-pad2_ ] net-_u2-pad2_ u3 +a4 [net-_u2-pad1_ net-_u2-pad2_ ] net-_u11-pad5_ u2 +a5 net-_u4-pad1_ net-_u2-pad1_ u4 +a6 net-_u11-pad5_ net-_u6-pad2_ u6 +a7 [net-_u7-pad3_ net-_u6-pad2_ ] net-_u4-pad1_ u8 +a8 net-_u11-pad3_ net-_u12-pad2_ u18 +a9 [net-_u11-pad3_ net-_u11-pad23_ ] net-_u24-pad3_ u24 +a10 [net-_u11-pad23_ net-_u12-pad2_ ] net-_u1-pad2_ u12 +a11 [net-_u1-pad1_ net-_u1-pad2_ ] net-_u1-pad3_ u1 +a12 net-_u15-pad1_ net-_u1-pad1_ u15 +a13 net-_u1-pad3_ net-_u21-pad2_ u21 +a14 [net-_u24-pad3_ net-_u21-pad2_ ] net-_u15-pad1_ u27 +a15 net-_u11-pad11_ net-_u34-pad2_ u42 +a16 [net-_u11-pad11_ net-_u11-pad12_ ] net-_u49-pad3_ u49 +a17 [net-_u11-pad12_ net-_u34-pad2_ ] net-_u30-pad2_ u34 +a18 [net-_u30-pad1_ net-_u30-pad2_ ] net-_u11-pad8_ u30 +a19 net-_u38-pad1_ net-_u30-pad1_ u38 +a20 net-_u11-pad8_ net-_u46-pad2_ u46 +a21 [net-_u49-pad3_ net-_u46-pad2_ ] net-_u38-pad1_ u54 +a22 net-_u11-pad10_ net-_u35-pad2_ u43 +a23 [net-_u11-pad10_ net-_u11-pad12_ ] net-_u51-pad3_ u51 +a24 [net-_u11-pad12_ net-_u35-pad2_ ] net-_u31-pad2_ u35 +a25 [net-_u31-pad1_ net-_u31-pad2_ ] net-_u11-pad9_ u31 +a26 net-_u39-pad1_ net-_u31-pad1_ u39 +a27 net-_u11-pad9_ net-_u47-pad2_ u47 +a28 [net-_u51-pad3_ net-_u47-pad2_ ] net-_u39-pad1_ u55 +a29 net-_u11-pad22_ net-_u13-pad2_ u19 +a30 [net-_u11-pad22_ net-_u11-pad23_ ] net-_u25-pad3_ u25 +a31 [net-_u11-pad23_ net-_u13-pad2_ ] net-_u13-pad3_ u13 +a32 [net-_u16-pad2_ net-_u13-pad3_ ] net-_u11-pad19_ u9 +a33 net-_u16-pad1_ net-_u16-pad2_ u16 +a34 net-_u11-pad19_ net-_u22-pad2_ u22 +a35 [net-_u25-pad3_ net-_u22-pad2_ ] net-_u16-pad1_ u28 +a36 net-_u11-pad21_ net-_u14-pad2_ u20 +a37 [net-_u11-pad21_ net-_u11-pad23_ ] net-_u26-pad3_ u26 +a38 [net-_u11-pad23_ net-_u14-pad2_ ] net-_u10-pad2_ u14 +a39 [net-_u10-pad1_ net-_u10-pad2_ ] net-_u10-pad3_ u10 +a40 net-_u17-pad1_ net-_u10-pad1_ u17 +a41 net-_u10-pad3_ net-_u23-pad2_ u23 +a42 [net-_u26-pad3_ net-_u23-pad2_ ] net-_u17-pad1_ u29 +a43 net-_u11-pad15_ net-_u36-pad2_ u44 +a44 [net-_u11-pad15_ net-_u11-pad12_ ] net-_u52-pad3_ u52 +a45 [net-_u11-pad12_ net-_u36-pad2_ ] net-_u32-pad2_ u36 +a46 [net-_u32-pad1_ net-_u32-pad2_ ] net-_u11-pad18_ u32 +a47 net-_u40-pad1_ net-_u32-pad1_ u40 +a48 net-_u11-pad18_ net-_u48-pad2_ u48 +a49 [net-_u52-pad3_ net-_u48-pad2_ ] net-_u40-pad1_ u56 +a50 net-_u11-pad16_ net-_u37-pad2_ u45 +a51 [net-_u11-pad16_ net-_u11-pad12_ ] net-_u53-pad3_ u53 +a52 [net-_u11-pad12_ net-_u37-pad2_ ] net-_u33-pad2_ u37 +a53 [net-_u33-pad1_ net-_u33-pad2_ ] net-_u11-pad17_ u33 +a54 net-_u41-pad1_ net-_u33-pad1_ u41 +a55 net-_u11-pad17_ net-_u50-pad2_ u50 +a56 [net-_u53-pad3_ net-_u50-pad2_ ] net-_u41-pad1_ u57 +* Schematic Name: d_inverter, NgSpice Name: d_inverter +.model u5 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_and, NgSpice Name: d_and +.model u7 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_and, NgSpice Name: d_and +.model u3 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nor, NgSpice Name: d_nor +.model u2 d_nor(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_buffer, NgSpice Name: d_buffer +.model u4 d_buffer(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_buffer, NgSpice Name: d_buffer +.model u6 d_buffer(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nor, NgSpice Name: d_nor +.model u8 d_nor(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_inverter, NgSpice Name: d_inverter +.model u18 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_and, NgSpice Name: d_and +.model u24 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_and, NgSpice Name: d_and +.model u12 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nor, NgSpice Name: d_nor +.model u1 d_nor(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_buffer, NgSpice Name: d_buffer +.model u15 d_buffer(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_buffer, NgSpice Name: d_buffer +.model u21 d_buffer(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nor, NgSpice Name: d_nor +.model u27 d_nor(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_inverter, NgSpice Name: d_inverter +.model u42 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_and, NgSpice Name: d_and +.model u49 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_and, NgSpice Name: d_and +.model u34 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nor, NgSpice Name: d_nor +.model u30 d_nor(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_buffer, NgSpice Name: d_buffer +.model u38 d_buffer(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_buffer, NgSpice Name: d_buffer +.model u46 d_buffer(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nor, NgSpice Name: d_nor +.model u54 d_nor(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_inverter, NgSpice Name: d_inverter +.model u43 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_and, NgSpice Name: d_and +.model u51 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_and, NgSpice Name: d_and +.model u35 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nor, NgSpice Name: d_nor +.model u31 d_nor(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_buffer, NgSpice Name: d_buffer +.model u39 d_buffer(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_buffer, NgSpice Name: d_buffer +.model u47 d_buffer(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nor, NgSpice Name: d_nor +.model u55 d_nor(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_inverter, NgSpice Name: d_inverter +.model u19 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_and, NgSpice Name: d_and +.model u25 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_and, NgSpice Name: d_and +.model u13 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nor, NgSpice Name: d_nor +.model u9 d_nor(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_buffer, NgSpice Name: d_buffer +.model u16 d_buffer(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_buffer, NgSpice Name: d_buffer +.model u22 d_buffer(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nor, NgSpice Name: d_nor +.model u28 d_nor(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_inverter, NgSpice Name: d_inverter +.model u20 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_and, NgSpice Name: d_and +.model u26 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_and, NgSpice Name: d_and +.model u14 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nor, NgSpice Name: d_nor +.model u10 d_nor(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_buffer, NgSpice Name: d_buffer +.model u17 d_buffer(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_buffer, NgSpice Name: d_buffer +.model u23 d_buffer(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nor, NgSpice Name: d_nor +.model u29 d_nor(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_inverter, NgSpice Name: d_inverter +.model u44 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_and, NgSpice Name: d_and +.model u52 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_and, NgSpice Name: d_and +.model u36 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nor, NgSpice Name: d_nor +.model u32 d_nor(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_buffer, NgSpice Name: d_buffer +.model u40 d_buffer(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_buffer, NgSpice Name: d_buffer +.model u48 d_buffer(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nor, NgSpice Name: d_nor +.model u56 d_nor(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_inverter, NgSpice Name: d_inverter +.model u45 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_and, NgSpice Name: d_and +.model u53 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_and, NgSpice Name: d_and +.model u37 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nor, NgSpice Name: d_nor +.model u33 d_nor(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_buffer, NgSpice Name: d_buffer +.model u41 d_buffer(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_buffer, NgSpice Name: d_buffer +.model u50 d_buffer(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nor, NgSpice Name: d_nor +.model u57 d_nor(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +.tran 10e-03 5e-00 0e-00 + +* Control Statements +.control +run +print allv > plot_data_v.txt +print alli > plot_data_i.txt +.endc +.end diff --git a/library/SubcircuitLibrary/SN74100/SN74100.dcm b/library/SubcircuitLibrary/SN74100/SN74100.dcm new file mode 100644 index 00000000..1980d0d1 --- /dev/null +++ b/library/SubcircuitLibrary/SN74100/SN74100.dcm @@ -0,0 +1,7 @@ +EESchema-DOCLIB Version 2.0 +# +$CMP SCR +D Thyristor +$ENDCMP +# +#End Doc Library diff --git a/library/SubcircuitLibrary/SN74100/SN74100.lib b/library/SubcircuitLibrary/SN74100/SN74100.lib new file mode 100644 index 00000000..853b0892 --- /dev/null +++ b/library/SubcircuitLibrary/SN74100/SN74100.lib @@ -0,0 +1,1043 @@ +EESchema-LIBRARY Version 2.3 +#encoding utf-8 +# +# 10bitDAC +# +DEF 10bitDAC X 0 40 Y Y 1 F N +F0 "X" 0 50 60 H V C CNN +F1 "10bitDAC" -50 -50 60 H V C CNN +F2 "" 0 50 60 H I C CNN +F3 "" 0 50 60 H I C CNN +DRAW +S -500 500 400 -600 0 1 0 N +X D0 1 -700 -500 200 R 50 50 1 1 I +X D1 2 -700 -400 200 R 50 50 1 1 I +X D2 3 -700 -300 200 R 50 50 1 1 I +X D3 4 -700 -200 200 R 50 50 1 1 I +X D4 5 -700 -100 200 R 50 50 1 1 I +X D5 6 -700 0 200 R 50 50 1 1 I +X D6 7 -700 100 200 R 50 50 1 1 I +X D7 8 -700 200 200 R 50 50 1 1 I +X D8 9 -700 300 200 R 50 50 1 1 I +X D9 10 -700 400 200 R 50 50 1 1 I +X AnalogOut 11 600 350 200 L 50 50 1 1 O +ENDDRAW +ENDDEF +# +# 2BITMUL +# +DEF 2BITMUL X 0 40 Y Y 1 F N +F0 "X" 0 0 60 H V C CNN +F1 "2BITMUL" 0 0 60 H V C CNN +F2 "" 0 0 60 H I C CNN +F3 "" 0 0 60 H I C CNN +DRAW +S -300 400 300 -400 0 1 0 N +X A0 1 -500 300 200 R 50 50 1 1 I +X A1 2 -500 150 200 R 50 50 1 1 I +X B0 3 -500 -50 200 R 50 50 1 1 I +X B1 4 -500 -250 200 R 50 50 1 1 I +X M0 5 500 250 200 L 50 50 1 1 O +X M1 6 500 100 200 L 50 50 1 1 O +X M2 7 500 -50 200 L 50 50 1 1 O +X M3 8 500 -250 200 L 50 50 1 1 O +ENDDRAW +ENDDEF +# +# 3_and +# +DEF 3_and X 0 40 Y Y 1 F N +F0 "X" 100 -50 60 H V C CNN +F1 "3_and" 150 150 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +A 150 50 158 716 -716 0 1 0 N 200 200 200 -100 +P 2 0 1 0 -150 200 200 200 N +P 3 0 1 0 -150 200 -150 -100 200 -100 N +X in1 1 -350 150 200 R 50 50 1 1 I +X in2 2 -350 50 200 R 50 50 1 1 I +X in3 3 -350 -50 200 R 50 50 1 1 I +X out 4 500 50 200 L 50 50 1 1 O +ENDDRAW +ENDDEF +# +# 4_OR +# +DEF 4_OR X 0 40 Y Y 1 F N +F0 "X" 150 -100 60 H V C CNN +F1 "4_OR" 150 100 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +A -800 0 650 226 -226 0 1 0 N -200 250 -200 -250 +A -73 134 444 -599 -176 0 1 0 N 150 -250 350 0 +A -30 -99 393 627 146 0 1 0 N 150 250 350 0 +P 2 0 1 0 -200 -250 150 -250 N +P 2 0 1 0 -200 250 150 250 N +X in1 1 -350 150 200 R 50 50 1 1 I +X in2 2 -350 50 200 R 50 50 1 1 I +X in3 3 -350 -50 200 R 50 50 1 1 I +X in4 4 -350 -150 200 R 50 50 1 1 I +X out 5 550 0 200 L 50 50 1 1 O +ENDDRAW +ENDDEF +# +# 4_and +# +DEF 4_and X 0 40 Y Y 1 F N +F0 "X" 50 -50 60 H V C CNN +F1 "4_and" 100 100 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +A 100 0 206 760 -760 0 1 0 N 150 200 150 -200 +P 2 0 1 0 -200 200 150 200 N +P 4 0 1 0 -200 200 -200 -200 50 -200 150 -200 N +X in1 1 -400 150 200 R 50 50 1 1 I +X in2 2 -400 50 200 R 50 50 1 1 I +X in3 3 -400 -50 200 R 50 50 1 1 I +X in4 4 -400 -150 200 R 50 50 1 1 I +X out 5 500 0 200 L 50 50 1 1 O +ENDDRAW +ENDDEF +# +# 556 +# +DEF 556 X 0 40 Y Y 1 F N +F0 "X" 0 0 60 H V C CNN +F1 "556" 0 0 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +S -300 400 250 -550 0 1 0 N +X dis1 1 -500 150 200 R 50 50 1 1 I +X thr1 2 -500 -150 200 R 50 50 1 1 I +X cv1 3 -150 -750 200 U 50 50 1 1 I +X rst1 4 -200 600 200 D 50 50 1 1 I +X out1 5 -500 0 200 R 50 50 1 1 O +X trig1 6 -500 -300 200 R 50 50 1 1 I +X gnd 7 0 -750 200 U 50 50 1 1 I +X trig2 8 450 -300 200 L 50 50 1 1 I +X out2 9 450 0 200 L 50 50 1 1 O +X rst2 10 100 600 200 D 50 50 1 1 I +X cv2 11 150 -750 200 U 50 50 1 1 I +X thr2 12 450 -150 200 L 50 50 1 1 I +X dis2 13 450 150 200 L 50 50 1 1 I +X vcc 14 -50 600 200 D 50 50 1 1 I +ENDDRAW +ENDDEF +# +# 5_and +# +DEF 5_and X 0 40 Y Y 1 F N +F0 "X" 50 -100 60 H V C CNN +F1 "5_and" 100 150 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +A 100 0 255 787 -787 0 1 0 N 150 250 150 -250 +P 2 0 1 0 -250 250 150 250 N +P 3 0 1 0 -250 250 -250 -250 150 -250 N +X in1 1 -450 200 200 R 50 50 1 1 I +X in2 2 -450 100 200 R 50 50 1 1 I +X in3 3 -450 0 200 R 50 50 1 1 I +X in4 4 -450 -100 200 R 50 50 1 1 I +X in5 5 -450 -200 200 R 50 50 1 1 I +X out 6 550 0 200 L 50 50 1 1 O +ENDDRAW +ENDDEF +# +# 74HC194 +# +DEF 74HC194 X 0 40 Y Y 1 F N +F0 "X" 50 300 60 H V C CNN +F1 "74HC194" 50 550 60 H V C CNN +F2 "" 50 300 60 H I C CNN +F3 "" 50 300 60 H I C CNN +DRAW +A 0 1350 100 -1799 -1 0 1 0 N -100 1350 100 1350 +S -400 1350 450 -750 0 1 0 N +X MR_bar 1 -600 1200 200 R 50 50 1 1 I +X DSR 2 -600 950 200 R 50 50 1 1 I +X D0 3 -600 700 200 R 50 50 1 1 I +X D1 4 -600 450 200 R 50 50 1 1 I +X D2 5 -600 200 200 R 50 50 1 1 I +X D3 6 -600 -50 200 R 50 50 1 1 I +X DSL 7 -600 -300 200 R 50 50 1 1 I +X GND 8 -600 -550 200 R 50 50 1 1 I +X S0 9 650 -550 200 L 50 50 1 1 I +X S1 10 650 -300 200 L 50 50 1 1 I +X CP 11 650 -50 200 L 50 50 1 1 I +X Q3 12 650 200 200 L 50 50 1 1 O +X Q2 13 650 450 200 L 50 50 1 1 O +X Q1 14 650 700 200 L 50 50 1 1 O +X Q0 15 650 950 200 L 50 50 1 1 O +X VCC 16 650 1200 200 L 50 50 1 1 O +ENDDRAW +ENDDEF +# +# CD4048BMS +# +DEF CD4048BMS X 0 40 Y Y 1 F N +F0 "X" 0 300 60 H V C CNN +F1 "CD4048BMS" -50 950 60 H V C CNN +F2 "" -50 950 60 H I C CNN +F3 "" -50 950 60 H I C CNN +DRAW +S -450 900 400 -300 0 1 0 N +X J(O/P) 1 -650 800 200 R 50 50 1 1 O +X Kd 2 -650 650 200 R 50 50 1 1 I +X H 3 -650 500 200 R 50 50 1 1 I +X G 4 -650 350 200 R 50 50 1 1 I +X F 5 -650 200 200 R 50 50 1 1 I +X E 6 -650 50 200 R 50 50 1 1 I +X Kb 7 -650 -100 200 R 50 50 1 1 I +X VSS 8 -650 -250 200 R 50 50 1 1 I +X Kc 9 600 -250 200 L 50 50 1 1 I +X Ka 10 600 -100 200 L 50 50 1 1 I +X D 11 600 50 200 L 50 50 1 1 I +X C 12 600 200 200 L 50 50 1 1 I +X B 13 600 350 200 L 50 50 1 1 I +X A 14 600 500 200 L 50 50 1 1 I +X Expand 15 600 650 200 L 50 50 1 1 I +X VDD 16 600 800 200 L 50 50 1 1 I +ENDDRAW +ENDDEF +# +# CMOS_NAND +# +DEF CMOS_NAND X 0 40 Y Y 1 F N +F0 "X" -100 -150 60 H V C CNN +F1 "CMOS_NAND" 0 -50 60 H V C CNN +F2 "" 0 0 60 H I C CNN +F3 "" 0 0 60 H I C CNN +DRAW +A 150 -50 381 668 -668 0 1 0 N 300 300 300 -400 +C 550 0 50 0 1 0 N +P 2 0 1 0 -350 300 300 300 N +P 3 0 1 0 -350 300 -350 -400 300 -400 N +X in1 1 -550 250 200 R 50 50 1 1 I +X in2 2 -550 -300 200 R 50 50 1 1 I +X out 3 800 0 279 L 79 79 1 1 I +ENDDRAW +ENDDEF +# +# Clock_pulse_generator +# +DEF Clock_pulse_generator X 0 40 Y Y 1 F N +F0 "X" 0 0 60 H V C CNN +F1 "Clock_pulse_generator" 0 -100 60 H V C CNN +F2 "" 0 0 60 H I C CNN +F3 "" 0 0 60 H I C CNN +DRAW +S -550 200 600 -300 0 1 0 N +X Vdd 1 -750 100 200 R 50 50 1 1 I +X R 2 -750 -50 200 R 50 50 1 1 I +X C 3 -750 -200 200 R 50 50 1 1 I +X Clkout 4 800 0 200 L 50 50 1 1 O +ENDDRAW +ENDDEF +# +# DFF +# +DEF DFF X 0 40 Y Y 1 F N +F0 "X" 0 0 60 H V C CNN +F1 "DFF" 0 100 60 H V C CNN +F2 "" 0 0 60 H I C CNN +F3 "" 0 0 60 H I C CNN +DRAW +S -550 750 550 -500 0 1 0 N +X D 1 -750 550 200 R 50 50 1 1 I +X CLK 2 -750 -250 200 R 50 50 1 1 I +X SET 3 0 950 200 D 50 50 1 1 I +X RESET 4 0 -700 200 U 50 50 1 1 I +X Q 5 750 550 200 L 50 50 1 1 O +X Q_bar 6 750 -250 200 L 50 50 1 1 O +ENDDRAW +ENDDEF +# +# IC-LM3900 +# +DEF IC-LM3900 X 0 40 Y Y 1 F N +F0 "X" 0 -300 60 H V C CNN +F1 "IC-LM3900" 0 -200 60 H V C CNN +F2 "" 0 -200 60 H I C CNN +F3 "" 0 -200 60 H I C CNN +DRAW +A -1200 -100 150 -899 899 0 0 0 N -1200 -250 -1200 50 +T 0 -550 -500 60 0 0 0 + Normal 0 C C +T 0 -550 50 60 0 0 0 + Normal 0 C C +T 0 750 -300 60 0 0 0 + Normal 0 C C +T 0 750 250 60 0 0 0 + Normal 0 C C +T 0 -550 -250 60 0 0 0 - Normal 0 C C +T 0 -550 300 60 0 0 0 - Normal 0 C C +T 0 750 -500 60 0 0 0 - Normal 0 C C +T 0 750 50 60 0 0 0 - Normal 0 C C +T 0 650 -400 60 0 0 0 1 Normal 0 C C +T 0 -450 -400 60 0 0 0 2 Normal 0 C C +T 0 650 150 60 0 0 0 3 Normal 0 C C +T 0 -450 150 60 0 0 0 4 Normal 0 C C +S -1200 750 1150 -1050 0 0 0 N +P 3 0 0 0 -600 -550 -650 -550 -650 -800 N +P 3 0 0 0 -200 -400 50 -400 50 -800 N +P 3 0 0 0 400 -400 350 -400 350 -800 N +P 3 0 0 0 800 0 950 0 950 500 N +P 5 0 0 0 -600 -250 -800 -250 -800 -700 -300 -700 -300 -800 N +P 5 0 0 0 -600 0 -800 0 -800 400 -300 400 -300 500 N +P 5 0 0 0 -600 300 -700 300 -700 450 50 450 50 500 N +P 5 0 0 0 -200 150 150 150 150 450 350 450 350 500 N +P 5 0 0 0 400 150 250 150 250 400 650 400 650 500 N +P 5 0 0 0 800 -550 900 -550 900 -750 650 -750 650 -800 N +P 5 0 0 0 800 -250 950 -250 950 -650 -950 -650 -950 -800 N +P 6 0 0 0 800 300 1000 300 1000 -100 -1000 -100 -1000 500 -650 500 N +C -600 -400 71 0 1 0 N +C -600 150 71 0 1 0 N +C 800 -400 71 0 1 0 N +C 800 150 71 0 1 0 N +P 4 0 1 0 -650 -350 -600 -450 -550 -350 -650 -350 N +P 4 0 1 0 -650 200 -600 100 -550 200 -650 200 N +P 4 0 1 0 -600 -200 -600 -600 -200 -400 -600 -200 N +P 4 0 1 0 -600 350 -600 -50 -200 150 -600 350 N +P 4 0 1 0 800 -600 800 -200 400 -400 800 -600 N +P 4 0 1 0 800 -50 800 350 400 150 800 -50 N +P 4 0 1 0 850 -450 800 -350 750 -450 850 -450 N +P 4 0 1 0 850 100 800 200 750 100 850 100 N +X IN1+ 1 -950 -1250 200 U 50 50 1 1 I +X IN2+ 2 -650 -1250 200 U 50 50 1 1 I +X IN2- 3 -300 -1250 200 U 50 50 1 1 I +X OUT2 4 50 -1250 200 U 50 50 1 1 O +X OUT1 5 350 -1250 200 U 50 50 1 1 O +X IN1- 6 650 -1250 200 U 50 50 1 1 I +X GND 7 950 -1250 200 U 50 50 1 1 I +X IN3- 8 950 950 200 D 50 50 1 1 I +X OUT3 9 650 950 200 D 50 50 1 1 O +X OUT4 10 350 950 200 D 50 50 1 1 O +X IN4- 11 50 950 200 D 50 50 1 1 I +X IN4+ 12 -300 950 200 D 50 50 1 1 I +X IN3+ 13 -650 950 200 D 50 50 1 1 I +X VCC 14 -950 950 200 D 50 50 1 1 I +ENDDRAW +ENDDEF +# +# IC_4002 +# +DEF IC_4002 X 0 40 Y Y 1 F N +F0 "X" 0 150 60 H V C CNN +F1 "IC_4002" 0 0 60 H V C CNN +F2 "" 50 -150 60 H V C CNN +F3 "" 50 -150 60 H V C CNN +DRAW +S -250 350 250 -400 0 1 0 N +X 1Y 1 -450 250 200 R 50 50 1 1 O +X 1A 2 -450 150 200 R 50 50 1 1 I +X 1B 3 -450 50 200 R 50 50 1 1 I +X 1C 4 -450 -50 200 R 50 50 1 1 I +X 1D 5 -450 -150 200 R 50 50 1 1 I +X NC 6 -450 -250 200 R 50 50 1 1 I +X GND 7 -450 -350 200 R 50 50 1 1 I +X NC 8 450 -350 200 L 50 50 1 1 I +X 2A 9 450 -250 200 L 50 50 1 1 I +X 2B 10 450 -150 200 L 50 50 1 1 I +X 2C 11 450 -50 200 L 50 50 1 1 I +X 2D 12 450 50 200 L 50 50 1 1 I +X 2Y 13 450 150 200 L 50 50 1 1 O +X VCC 14 450 250 200 L 50 50 1 1 I +ENDDRAW +ENDDEF +# +# IC_4012 +# +DEF IC_4012 X 0 40 Y Y 1 F N +F0 "X" 0 0 60 H V C CNN +F1 "IC_4012" 0 200 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +S -300 400 350 -400 0 1 0 N +X Q1 1 -500 300 200 R 50 50 1 1 O +X A1 2 -500 200 200 R 50 50 1 1 I +X B1 3 -500 100 200 R 50 50 1 1 I +X C1 4 -500 0 200 R 50 50 1 1 I +X D1 5 -500 -100 200 R 50 50 1 1 I +X NC 6 -500 -200 200 R 50 50 1 1 N +X VSS 7 -500 -300 200 R 50 50 1 1 I +X NC 8 550 -300 200 L 50 50 1 1 N +X A2 9 550 -200 200 L 50 50 1 1 I +X B2 10 550 -100 200 L 50 50 1 1 I +X C2 11 550 0 200 L 50 50 1 1 I +X D2 12 550 100 200 L 50 50 1 1 I +X Q2 13 550 200 200 L 50 50 1 1 O +X VDD 14 550 300 200 L 50 50 1 1 I +ENDDRAW +ENDDEF +# +# IC_4017 +# +DEF IC_4017 X 0 40 Y Y 1 F N +F0 "X" 0 0 60 H V C CNN +F1 "IC_4017" 0 0 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +S -350 850 400 -850 0 1 0 N +X 1 1 600 650 200 L 50 50 1 1 O +X 2 2 600 500 200 L 50 50 1 1 O +X 3 3 600 350 200 L 50 50 1 1 O +X 4 4 600 200 200 L 50 50 1 1 O +X 5 5 600 50 200 L 50 50 1 1 O +X 6 6 600 -100 200 L 50 50 1 1 O +X 7 7 600 -250 200 L 50 50 1 1 O +X 8 8 600 -400 200 L 50 50 1 1 O +X 9 9 600 -600 200 L 50 50 1 1 O +X 10 10 600 -750 200 L 50 50 1 1 O +X RST 11 -550 -400 200 R 50 50 1 1 I +X CLK 12 -550 350 200 R 50 50 1 1 I +ENDDRAW +ENDDEF +# +# IC_4023 +# +DEF IC_4023 X 0 40 Y Y 1 F N +F0 "X" 0 -100 60 H V C CNN +F1 "IC_4023" 0 100 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +S -300 450 300 -450 0 1 0 N +X A1 1 -500 300 200 R 50 50 1 1 I +X B1 2 -500 200 200 R 50 50 1 1 I +X A2 3 -500 100 200 R 50 50 1 1 I +X B2 4 -500 0 200 R 50 50 1 1 I +X C2 5 -500 -100 200 R 50 50 1 1 I +X Q2 6 -500 -200 200 R 50 50 1 1 O +X Vss 7 -500 -300 200 R 50 50 1 1 I +X C1 8 500 -300 200 L 50 50 1 1 I +X Q1 9 500 -200 200 L 50 50 1 1 O +X Q3 10 500 -100 200 L 50 50 1 1 O +X C3 11 500 0 200 L 50 50 1 1 I +X B3 12 500 100 200 L 50 50 1 1 I +X A3 13 500 200 200 L 50 50 1 1 I +X Vdd 14 500 300 200 L 50 50 1 1 I +ENDDRAW +ENDDEF +# +# IC_4028 +# +DEF IC_4028 X 0 40 Y Y 1 F N +F0 "X" 0 -100 60 H V C CNN +F1 "IC_4028" 0 50 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +S -300 450 300 -450 0 1 0 N +X Q4 1 -500 350 200 R 50 50 1 1 O +X Q2 2 -500 250 200 R 50 50 1 1 O +X Q0 3 -500 150 200 R 50 50 1 1 O +X Q7 4 -500 50 200 R 50 50 1 1 O +X Q9 5 -500 -50 200 R 50 50 1 1 O +X Q5 6 -500 -150 200 R 50 50 1 1 O +X Q6 7 -500 -250 200 R 50 50 1 1 O +X Vss 8 -500 -350 200 R 50 50 1 1 I +X Q8 9 500 -350 200 L 50 50 1 1 O +X A0 10 500 -250 200 L 50 50 1 1 I +X A3 11 500 -150 200 L 50 50 1 1 I +X A2 12 500 -50 200 L 50 50 1 1 I +X A1 13 500 50 200 L 50 50 1 1 I +X Q1 14 500 150 200 L 50 50 1 1 O +X Q3 15 500 250 200 L 50 50 1 1 O +X Vdd 16 500 350 200 L 50 50 1 1 O +ENDDRAW +ENDDEF +# +# IC_4073 +# +DEF IC_4073 X 0 40 Y Y 1 F N +F0 "X" 0 -100 60 H V C CNN +F1 "IC_4073" 0 50 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +S -300 400 300 -400 0 1 0 N +X A1 1 -500 300 200 R 50 50 1 1 I +X B1 2 -500 200 200 R 50 50 1 1 I +X A2 3 -500 100 200 R 50 50 1 1 I +X B2 4 -500 0 200 R 50 50 1 1 I +X C2 5 -500 -100 200 R 50 50 1 1 I +X Q2 6 -500 -200 200 R 50 50 1 1 O +X Vss 7 -500 -300 200 R 50 50 1 1 I +X C1 8 500 -300 200 L 50 50 1 1 I +X Q1 9 500 -200 200 L 50 50 1 1 O +X Q3 10 500 -100 200 L 50 50 1 1 O +X A3 11 500 0 200 L 50 50 1 1 I +X B3 12 500 100 200 L 50 50 1 1 I +X C3 13 500 200 200 L 50 50 1 1 I +X Vdd 14 500 300 200 L 50 50 1 1 I +ENDDRAW +ENDDEF +# +# IC_74153 +# +DEF IC_74153 X 0 40 Y Y 1 F N +F0 "X" 100 50 60 H V C CNN +F1 "IC_74153" 100 150 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +T 0 100 -200 60 0 0 0 4:1 Normal 0 C C +T 0 100 -100 60 0 0 0 DUAL Normal 0 C C +T 0 100 -300 60 0 0 0 MUX Normal 0 C C +S -200 500 350 -550 0 1 0 N +X a0 1 -400 350 200 R 50 50 1 1 I +X a1 2 -400 250 200 R 50 50 1 1 I +X a2 3 -400 150 200 R 50 50 1 1 I +X a3 4 -400 50 200 R 50 50 1 1 I +X EA 5 0 700 200 D 50 50 1 1 I I +X b0 6 -400 -150 200 R 50 50 1 1 I +X b1 7 -400 -250 200 R 50 50 1 1 I +X b2 8 -400 -350 200 R 50 50 1 1 I +X b3 9 -400 -450 200 R 50 50 1 1 I +X EB 10 200 700 200 D 50 50 1 1 I I +X s1 11 50 -750 200 U 50 50 1 1 I +X s0 12 150 -750 200 U 50 50 1 1 I +X ya 13 550 250 200 L 50 50 1 1 O +X yb 14 550 -300 200 L 50 50 1 1 O +ENDDRAW +ENDDEF +# +# IC_74154 +# +DEF IC_74154 X 0 40 Y Y 1 F N +F0 "X" 0 -200 60 H V C CNN +F1 "IC_74154" 50 -50 60 H V C CNN +F2 "" 0 50 60 H V C CNN +F3 "" 0 50 60 H V C CNN +DRAW +T 0 0 400 60 0 0 0 4:16~ Normal 0 C C +T 0 0 250 60 0 0 0 decoder Normal 0 C C +S -350 700 400 -700 0 0 0 N +X ~Y0 1 -550 550 200 R 50 50 1 1 O I +X ~Y1 2 -550 450 200 R 50 50 1 1 O I +X ~Y2 3 -550 350 200 R 50 50 1 1 O I +X ~Y3 4 -550 250 200 R 50 50 1 1 O I +X ~Y4 5 -550 150 200 R 50 50 1 1 O I +X ~Y5 6 -550 50 200 R 50 50 1 1 O I +X ~Y6 7 -550 -50 200 R 50 50 1 1 O I +X ~Y7 8 -550 -150 200 R 50 50 1 1 O I +X ~Y8 9 -550 -250 200 R 50 50 1 1 O I +X ~Y9 10 -550 -350 200 R 50 50 1 1 O I +X A3 20 600 150 200 L 50 50 1 1 I +X ~Y10 11 -550 -450 200 R 50 50 1 1 O I +X A2 21 600 250 200 L 50 50 1 1 I +X GND 12 -550 -550 200 R 50 50 1 1 I +X A1 22 600 350 200 L 50 50 1 1 I +X ~Y11 13 600 -550 200 L 50 50 1 1 O I +X A0 23 600 450 200 L 50 50 1 1 I +X ~Y12 14 600 -450 200 L 50 50 1 1 O I +X Vcc 24 600 550 200 L 50 50 1 1 I +X ~Y13 15 600 -350 200 L 50 50 1 1 O I +X ~Y14 16 600 -250 200 L 50 50 1 1 O I +X ~Y15 17 600 -150 200 L 50 50 1 1 O I +X ~E0 18 600 -50 200 L 50 50 1 1 I I +X ~E1 19 600 50 200 L 50 50 1 1 I I +ENDDRAW +ENDDEF +# +# IC_74157 +# +DEF IC_74157 X 0 40 Y Y 1 F N +F0 "X" 50 -50 60 H V C CNN +F1 "IC_74157" 50 100 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +T 0 50 -300 60 0 0 0 2:1 Normal 0 C C +T 0 50 -400 60 0 0 0 MUX Normal 0 C C +T 0 50 -200 60 0 0 0 QUAD Normal 0 C C +S -350 550 400 -650 0 1 0 N +X a0 1 -550 450 200 R 50 50 1 1 I +X a1 2 -550 300 200 R 50 50 1 1 I +X b0 3 -550 200 200 R 50 50 1 1 I +X b1 4 -550 100 200 R 50 50 1 1 I +X c0 5 -550 0 200 R 50 50 1 1 I +X c1 6 -550 -100 200 R 50 50 1 1 I +X d0 7 -550 -200 200 R 50 50 1 1 I +X d1 8 -550 -300 200 R 50 50 1 1 I +X EN 9 -550 -550 200 R 50 50 1 1 I I +X S 10 -550 -450 200 R 50 50 1 1 I +X Yd 11 600 0 200 L 50 50 1 1 O +X Ya 12 600 300 200 L 50 50 1 1 O +X Yb 13 600 200 200 L 50 50 1 1 O +X Yc 14 600 100 200 L 50 50 1 1 O +ENDDRAW +ENDDEF +# +# IC_7485 +# +DEF IC_7485 X 0 40 Y Y 1 F N +F0 "X" -50 -100 60 H V C CNN +F1 "IC_7485" -50 50 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +T 0 0 550 60 0 0 0 4~BIT~comparator Normal 0 C C +S -350 450 400 -400 0 1 0 N +X AB(in) 3 600 -300 200 L 50 50 1 1 I +X A3 4 -550 100 200 R 50 50 1 1 I +X B3 5 -550 -350 200 R 50 50 1 1 I +X A2 6 -550 200 200 R 50 50 1 1 I +X B2 7 -550 -250 200 R 50 50 1 1 I +X A1 8 -550 300 200 R 50 50 1 1 I +X B1 9 -550 -150 200 R 50 50 1 1 I +X A0 10 -550 400 200 R 50 50 1 1 I +X B0 11 -550 -50 200 R 50 50 1 1 I +X A>B(out) 12 600 350 200 L 50 50 1 1 O +X A=B(out) 13 600 250 200 L 50 50 1 1 O +X Apulse050.01n0.01n0.01n10m5pulse050.01n0.01n0.01n0.31.2d_andd_andd_andd_andd_nord_nord_inverteric0ic5d_bufferd_bufferd_bufferd_bufferic0ic0dac_bridgeadc_bridged_ord_ord_inverterd_inverterd_andd_andd_inverteric0ic0d_bufferd_bufferd_inverterd_andd_andd_nord_bufferd_bufferd_nord_inverterd_andd_andd_nord_bufferd_bufferd_nord_inverterd_andd_andd_nord_bufferd_bufferd_nord_inverterd_andd_andd_nord_bufferd_bufferd_nord_inverterd_andd_andd_nord_bufferd_bufferd_nord_inverterd_andd_andd_nord_bufferd_bufferd_nord_inverterd_andd_andd_nord_bufferd_bufferd_nortruefalsefalseHzHz0Volts or AmperesVolts or AmperesVolts or AmperesVolts or AmperesVolts or AmperesVolts or Amperes0105secmssec \ No newline at end of file diff --git a/library/SubcircuitLibrary/SN74100/analysis b/library/SubcircuitLibrary/SN74100/analysis new file mode 100644 index 00000000..cea473fd --- /dev/null +++ b/library/SubcircuitLibrary/SN74100/analysis @@ -0,0 +1 @@ +.tran 10e-03 5e-00 0e-00 \ No newline at end of file -- cgit