From fc9ec2ae62600baa3e91128769c2ff603817d227 Mon Sep 17 00:00:00 2001 From: Arpit Sharma Date: Fri, 21 Oct 2022 23:07:05 +0530 Subject: eSim_Subckt.lib file --- eSim_Subckt.lib | 1085 +++++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 1085 insertions(+) create mode 100644 eSim_Subckt.lib diff --git a/eSim_Subckt.lib b/eSim_Subckt.lib new file mode 100644 index 00000000..076b3daf --- /dev/null +++ b/eSim_Subckt.lib @@ -0,0 +1,1085 @@ +EESchema-LIBRARY Version 2.3 +#encoding utf-8 +# +# 10bitDAC +# +DEF 10bitDAC X 0 40 Y Y 1 F N +F0 "X" 0 50 60 H V C CNN +F1 "10bitDAC" -50 -50 60 H V C CNN +F2 "" 0 50 60 H I C CNN +F3 "" 0 50 60 H I C CNN +DRAW +S -500 500 400 -600 0 1 0 N +X D0 1 -700 -500 200 R 50 50 1 1 I +X D1 2 -700 -400 200 R 50 50 1 1 I +X D2 3 -700 -300 200 R 50 50 1 1 I +X D3 4 -700 -200 200 R 50 50 1 1 I +X D4 5 -700 -100 200 R 50 50 1 1 I +X D5 6 -700 0 200 R 50 50 1 1 I +X D6 7 -700 100 200 R 50 50 1 1 I +X D7 8 -700 200 200 R 50 50 1 1 I +X D8 9 -700 300 200 R 50 50 1 1 I +X D9 10 -700 400 200 R 50 50 1 1 I +X AnalogOut 11 600 350 200 L 50 50 1 1 O +ENDDRAW +ENDDEF +# +# 2BITMUL +# +DEF 2BITMUL X 0 40 Y Y 1 F N +F0 "X" 0 0 60 H V C CNN +F1 "2BITMUL" 0 0 60 H V C CNN +F2 "" 0 0 60 H I C CNN +F3 "" 0 0 60 H I C CNN +DRAW +S -300 400 300 -400 0 1 0 N +X A0 1 -500 300 200 R 50 50 1 1 I +X A1 2 -500 150 200 R 50 50 1 1 I +X B0 3 -500 -50 200 R 50 50 1 1 I +X B1 4 -500 -250 200 R 50 50 1 1 I +X M0 5 500 250 200 L 50 50 1 1 O +X M1 6 500 100 200 L 50 50 1 1 O +X M2 7 500 -50 200 L 50 50 1 1 O +X M3 8 500 -250 200 L 50 50 1 1 O +ENDDRAW +ENDDEF +# +# 3_and +# +DEF 3_and X 0 40 Y Y 1 F N +F0 "X" 100 -50 60 H V C CNN +F1 "3_and" 150 150 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +A 150 50 158 716 -716 0 1 0 N 200 200 200 -100 +P 2 0 1 0 -150 200 200 200 N +P 3 0 1 0 -150 200 -150 -100 200 -100 N +X in1 1 -350 150 200 R 50 50 1 1 I +X in2 2 -350 50 200 R 50 50 1 1 I +X in3 3 -350 -50 200 R 50 50 1 1 I +X out 4 500 50 200 L 50 50 1 1 O +ENDDRAW +ENDDEF +# +# 4_OR +# +DEF 4_OR X 0 40 Y Y 1 F N +F0 "X" 150 -100 60 H V C CNN +F1 "4_OR" 150 100 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +A -800 0 650 226 -226 0 1 0 N -200 250 -200 -250 +A -73 134 444 -599 -176 0 1 0 N 150 -250 350 0 +A -30 -99 393 627 146 0 1 0 N 150 250 350 0 +P 2 0 1 0 -200 -250 150 -250 N +P 2 0 1 0 -200 250 150 250 N +X in1 1 -350 150 200 R 50 50 1 1 I +X in2 2 -350 50 200 R 50 50 1 1 I +X in3 3 -350 -50 200 R 50 50 1 1 I +X in4 4 -350 -150 200 R 50 50 1 1 I +X out 5 550 0 200 L 50 50 1 1 O +ENDDRAW +ENDDEF +# +# 4_and +# +DEF 4_and X 0 40 Y Y 1 F N +F0 "X" 50 -50 60 H V C CNN +F1 "4_and" 100 100 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +A 100 0 206 760 -760 0 1 0 N 150 200 150 -200 +P 2 0 1 0 -200 200 150 200 N +P 4 0 1 0 -200 200 -200 -200 50 -200 150 -200 N +X in1 1 -400 150 200 R 50 50 1 1 I +X in2 2 -400 50 200 R 50 50 1 1 I +X in3 3 -400 -50 200 R 50 50 1 1 I +X in4 4 -400 -150 200 R 50 50 1 1 I +X out 5 500 0 200 L 50 50 1 1 O +ENDDRAW +ENDDEF +# +# 556 +# +DEF 556 X 0 40 Y Y 1 F N +F0 "X" 0 0 60 H V C CNN +F1 "556" 0 0 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +S -300 400 250 -550 0 1 0 N +X dis1 1 -500 150 200 R 50 50 1 1 I +X thr1 2 -500 -150 200 R 50 50 1 1 I +X cv1 3 -150 -750 200 U 50 50 1 1 I +X rst1 4 -200 600 200 D 50 50 1 1 I +X out1 5 -500 0 200 R 50 50 1 1 O +X trig1 6 -500 -300 200 R 50 50 1 1 I +X gnd 7 0 -750 200 U 50 50 1 1 I +X trig2 8 450 -300 200 L 50 50 1 1 I +X out2 9 450 0 200 L 50 50 1 1 O +X rst2 10 100 600 200 D 50 50 1 1 I +X cv2 11 150 -750 200 U 50 50 1 1 I +X thr2 12 450 -150 200 L 50 50 1 1 I +X dis2 13 450 150 200 L 50 50 1 1 I +X vcc 14 -50 600 200 D 50 50 1 1 I +ENDDRAW +ENDDEF +# +# 5_and +# +DEF 5_and X 0 40 Y Y 1 F N +F0 "X" 50 -100 60 H V C CNN +F1 "5_and" 100 150 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +A 100 0 255 787 -787 0 1 0 N 150 250 150 -250 +P 2 0 1 0 -250 250 150 250 N +P 3 0 1 0 -250 250 -250 -250 150 -250 N +X in1 1 -450 200 200 R 50 50 1 1 I +X in2 2 -450 100 200 R 50 50 1 1 I +X in3 3 -450 0 200 R 50 50 1 1 I +X in4 4 -450 -100 200 R 50 50 1 1 I +X in5 5 -450 -200 200 R 50 50 1 1 I +X out 6 550 0 200 L 50 50 1 1 O +ENDDRAW +ENDDEF +# +# CMOS_NAND +# +DEF CMOS_NAND X 0 40 Y Y 1 F N +F0 "X" -100 -150 60 H V C CNN +F1 "CMOS_NAND" 0 -50 60 H V C CNN +F2 "" 0 0 60 H I C CNN +F3 "" 0 0 60 H I C CNN +DRAW +A 150 -50 381 668 -668 0 1 0 N 300 300 300 -400 +C 550 0 50 0 1 0 N +P 2 0 1 0 -350 300 300 300 N +P 3 0 1 0 -350 300 -350 -400 300 -400 N +X in1 1 -550 250 200 R 50 50 1 1 I +X in2 2 -550 -300 200 R 50 50 1 1 I +X out 3 800 0 279 L 79 79 1 1 I +ENDDRAW +ENDDEF +# +# Clock_pulse_generator +# +DEF Clock_pulse_generator X 0 40 Y Y 1 F N +F0 "X" 0 0 60 H V C CNN +F1 "Clock_pulse_generator" 0 -100 60 H V C CNN +F2 "" 0 0 60 H I C CNN +F3 "" 0 0 60 H I C CNN +DRAW +S -550 200 600 -300 0 1 0 N +X Vdd 1 -750 100 200 R 50 50 1 1 I +X R 2 -750 -50 200 R 50 50 1 1 I +X C 3 -750 -200 200 R 50 50 1 1 I +X Clkout 4 800 0 200 L 50 50 1 1 O +ENDDRAW +ENDDEF +# +# ICL8038 +# +DEF ICL8038 X 0 40 N Y 1 F N +F0 "X" 0 200 60 H V C CNN +F1 "ICL8038" 0 -100 60 V V C CNN +F2 "" 0 200 60 H I C CNN +F3 "" 0 200 60 H I C CNN +DRAW +A 0 400 50 -1799 -1 0 1 0 N -50 400 50 400 +S -300 400 300 -400 0 1 0 N +X 9 1 500 -200 200 L 50 50 1 1 O +X 7 2 -500 -300 200 R 50 50 1 1 I +X 8 3 500 -300 200 L 50 50 1 1 I +X 5 4 -500 -100 200 R 50 50 1 1 I +X 4 5 -500 0 200 R 50 50 1 1 I +X 10 6 500 -100 200 L 50 50 1 1 I +X 11 7 500 0 200 L 50 50 1 1 I +X 3 8 -500 100 200 R 50 50 1 1 O +X 2 9 -500 200 200 R 50 50 1 1 O +X 6 10 -500 -200 200 R 50 50 1 1 I +X 1 11 -500 300 200 R 50 50 1 1 I +X 12 12 500 100 200 L 50 50 1 1 I +X 13 13 500 200 200 L 50 50 1 1 N +X 14 14 500 300 200 L 50 50 1 1 N +ENDDRAW +ENDDEF +# +# IC_4002 +# +DEF IC_4002 X 0 40 Y Y 1 F N +F0 "X" 0 150 60 H V C CNN +F1 "IC_4002" 0 0 60 H V C CNN +F2 "" 50 -150 60 H V C CNN +F3 "" 50 -150 60 H V C CNN +DRAW +S -250 350 250 -400 0 1 0 N +X 1Y 1 -450 250 200 R 50 50 1 1 O +X 1A 2 -450 150 200 R 50 50 1 1 I +X 1B 3 -450 50 200 R 50 50 1 1 I +X 1C 4 -450 -50 200 R 50 50 1 1 I +X 1D 5 -450 -150 200 R 50 50 1 1 I +X NC 6 -450 -250 200 R 50 50 1 1 I +X GND 7 -450 -350 200 R 50 50 1 1 I +X NC 8 450 -350 200 L 50 50 1 1 I +X 2A 9 450 -250 200 L 50 50 1 1 I +X 2B 10 450 -150 200 L 50 50 1 1 I +X 2C 11 450 -50 200 L 50 50 1 1 I +X 2D 12 450 50 200 L 50 50 1 1 I +X 2Y 13 450 150 200 L 50 50 1 1 O +X VCC 14 450 250 200 L 50 50 1 1 I +ENDDRAW +ENDDEF +# +# IC_4012 +# +DEF IC_4012 X 0 40 Y Y 1 F N +F0 "X" 0 0 60 H V C CNN +F1 "IC_4012" 0 200 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +S -300 400 350 -400 0 1 0 N +X Q1 1 -500 300 200 R 50 50 1 1 O +X A1 2 -500 200 200 R 50 50 1 1 I +X B1 3 -500 100 200 R 50 50 1 1 I +X C1 4 -500 0 200 R 50 50 1 1 I +X D1 5 -500 -100 200 R 50 50 1 1 I +X NC 6 -500 -200 200 R 50 50 1 1 N +X VSS 7 -500 -300 200 R 50 50 1 1 I +X NC 8 550 -300 200 L 50 50 1 1 N +X A2 9 550 -200 200 L 50 50 1 1 I +X B2 10 550 -100 200 L 50 50 1 1 I +X C2 11 550 0 200 L 50 50 1 1 I +X D2 12 550 100 200 L 50 50 1 1 I +X Q2 13 550 200 200 L 50 50 1 1 O +X VDD 14 550 300 200 L 50 50 1 1 I +ENDDRAW +ENDDEF +# +# IC_4017 +# +DEF IC_4017 X 0 40 Y Y 1 F N +F0 "X" 0 0 60 H V C CNN +F1 "IC_4017" 0 0 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +S -350 850 400 -850 0 1 0 N +X 1 1 600 650 200 L 50 50 1 1 O +X 2 2 600 500 200 L 50 50 1 1 O +X 3 3 600 350 200 L 50 50 1 1 O +X 4 4 600 200 200 L 50 50 1 1 O +X 5 5 600 50 200 L 50 50 1 1 O +X 6 6 600 -100 200 L 50 50 1 1 O +X 7 7 600 -250 200 L 50 50 1 1 O +X 8 8 600 -400 200 L 50 50 1 1 O +X 9 9 600 -600 200 L 50 50 1 1 O +X 10 10 600 -750 200 L 50 50 1 1 O +X RST 11 -550 -400 200 R 50 50 1 1 I +X CLK 12 -550 350 200 R 50 50 1 1 I +ENDDRAW +ENDDEF +# +# IC_4023 +# +DEF IC_4023 X 0 40 Y Y 1 F N +F0 "X" 0 -100 60 H V C CNN +F1 "IC_4023" 0 100 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +S -300 450 300 -450 0 1 0 N +X A1 1 -500 300 200 R 50 50 1 1 I +X B1 2 -500 200 200 R 50 50 1 1 I +X A2 3 -500 100 200 R 50 50 1 1 I +X B2 4 -500 0 200 R 50 50 1 1 I +X C2 5 -500 -100 200 R 50 50 1 1 I +X Q2 6 -500 -200 200 R 50 50 1 1 O +X Vss 7 -500 -300 200 R 50 50 1 1 I +X C1 8 500 -300 200 L 50 50 1 1 I +X Q1 9 500 -200 200 L 50 50 1 1 O +X Q3 10 500 -100 200 L 50 50 1 1 O +X C3 11 500 0 200 L 50 50 1 1 I +X B3 12 500 100 200 L 50 50 1 1 I +X A3 13 500 200 200 L 50 50 1 1 I +X Vdd 14 500 300 200 L 50 50 1 1 I +ENDDRAW +ENDDEF +# +# IC_4028 +# +DEF IC_4028 X 0 40 Y Y 1 F N +F0 "X" 0 -100 60 H V C CNN +F1 "IC_4028" 0 50 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +S -300 450 300 -450 0 1 0 N +X Q4 1 -500 350 200 R 50 50 1 1 O +X Q2 2 -500 250 200 R 50 50 1 1 O +X Q0 3 -500 150 200 R 50 50 1 1 O +X Q7 4 -500 50 200 R 50 50 1 1 O +X Q9 5 -500 -50 200 R 50 50 1 1 O +X Q5 6 -500 -150 200 R 50 50 1 1 O +X Q6 7 -500 -250 200 R 50 50 1 1 O +X Vss 8 -500 -350 200 R 50 50 1 1 I +X Q8 9 500 -350 200 L 50 50 1 1 O +X A0 10 500 -250 200 L 50 50 1 1 I +X A3 11 500 -150 200 L 50 50 1 1 I +X A2 12 500 -50 200 L 50 50 1 1 I +X A1 13 500 50 200 L 50 50 1 1 I +X Q1 14 500 150 200 L 50 50 1 1 O +X Q3 15 500 250 200 L 50 50 1 1 O +X Vdd 16 500 350 200 L 50 50 1 1 O +ENDDRAW +ENDDEF +# +# IC_4073 +# +DEF IC_4073 X 0 40 Y Y 1 F N +F0 "X" 0 -100 60 H V C CNN +F1 "IC_4073" 0 50 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +S -300 400 300 -400 0 1 0 N +X A1 1 -500 300 200 R 50 50 1 1 I +X B1 2 -500 200 200 R 50 50 1 1 I +X A2 3 -500 100 200 R 50 50 1 1 I +X B2 4 -500 0 200 R 50 50 1 1 I +X C2 5 -500 -100 200 R 50 50 1 1 I +X Q2 6 -500 -200 200 R 50 50 1 1 O +X Vss 7 -500 -300 200 R 50 50 1 1 I +X C1 8 500 -300 200 L 50 50 1 1 I +X Q1 9 500 -200 200 L 50 50 1 1 O +X Q3 10 500 -100 200 L 50 50 1 1 O +X A3 11 500 0 200 L 50 50 1 1 I +X B3 12 500 100 200 L 50 50 1 1 I +X C3 13 500 200 200 L 50 50 1 1 I +X Vdd 14 500 300 200 L 50 50 1 1 I +ENDDRAW +ENDDEF +# +# IC_74153 +# +DEF IC_74153 X 0 40 Y Y 1 F N +F0 "X" 100 50 60 H V C CNN +F1 "IC_74153" 100 150 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +T 0 100 -200 60 0 0 0 4:1 Normal 0 C C +T 0 100 -100 60 0 0 0 DUAL Normal 0 C C +T 0 100 -300 60 0 0 0 MUX Normal 0 C C +S -200 500 350 -550 0 1 0 N +X a0 1 -400 350 200 R 50 50 1 1 I +X a1 2 -400 250 200 R 50 50 1 1 I +X a2 3 -400 150 200 R 50 50 1 1 I +X a3 4 -400 50 200 R 50 50 1 1 I +X EA 5 0 700 200 D 50 50 1 1 I I +X b0 6 -400 -150 200 R 50 50 1 1 I +X b1 7 -400 -250 200 R 50 50 1 1 I +X b2 8 -400 -350 200 R 50 50 1 1 I +X b3 9 -400 -450 200 R 50 50 1 1 I +X EB 10 200 700 200 D 50 50 1 1 I I +X s1 11 50 -750 200 U 50 50 1 1 I +X s0 12 150 -750 200 U 50 50 1 1 I +X ya 13 550 250 200 L 50 50 1 1 O +X yb 14 550 -300 200 L 50 50 1 1 O +ENDDRAW +ENDDEF +# +# IC_74154 +# +DEF IC_74154 X 0 40 Y Y 1 F N +F0 "X" 0 -200 60 H V C CNN +F1 "IC_74154" 50 -50 60 H V C CNN +F2 "" 0 50 60 H V C CNN +F3 "" 0 50 60 H V C CNN +DRAW +T 0 0 400 60 0 0 0 4:16~ Normal 0 C C +T 0 0 250 60 0 0 0 decoder Normal 0 C C +S -350 700 400 -700 0 0 0 N +X ~Y0 1 -550 550 200 R 50 50 1 1 O I +X ~Y1 2 -550 450 200 R 50 50 1 1 O I +X ~Y2 3 -550 350 200 R 50 50 1 1 O I +X ~Y3 4 -550 250 200 R 50 50 1 1 O I +X ~Y4 5 -550 150 200 R 50 50 1 1 O I +X ~Y5 6 -550 50 200 R 50 50 1 1 O I +X ~Y6 7 -550 -50 200 R 50 50 1 1 O I +X ~Y7 8 -550 -150 200 R 50 50 1 1 O I +X ~Y8 9 -550 -250 200 R 50 50 1 1 O I +X ~Y9 10 -550 -350 200 R 50 50 1 1 O I +X A3 20 600 150 200 L 50 50 1 1 I +X ~Y10 11 -550 -450 200 R 50 50 1 1 O I +X A2 21 600 250 200 L 50 50 1 1 I +X GND 12 -550 -550 200 R 50 50 1 1 I +X A1 22 600 350 200 L 50 50 1 1 I +X ~Y11 13 600 -550 200 L 50 50 1 1 O I +X A0 23 600 450 200 L 50 50 1 1 I +X ~Y12 14 600 -450 200 L 50 50 1 1 O I +X Vcc 24 600 550 200 L 50 50 1 1 I +X ~Y13 15 600 -350 200 L 50 50 1 1 O I +X ~Y14 16 600 -250 200 L 50 50 1 1 O I +X ~Y15 17 600 -150 200 L 50 50 1 1 O I +X ~E0 18 600 -50 200 L 50 50 1 1 I I +X ~E1 19 600 50 200 L 50 50 1 1 I I +ENDDRAW +ENDDEF +# +# IC_74157 +# +DEF IC_74157 X 0 40 Y Y 1 F N +F0 "X" 50 -50 60 H V C CNN +F1 "IC_74157" 50 100 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +T 0 50 -300 60 0 0 0 2:1 Normal 0 C C +T 0 50 -400 60 0 0 0 MUX Normal 0 C C +T 0 50 -200 60 0 0 0 QUAD Normal 0 C C +S -350 550 400 -650 0 1 0 N +X a0 1 -550 450 200 R 50 50 1 1 I +X a1 2 -550 300 200 R 50 50 1 1 I +X b0 3 -550 200 200 R 50 50 1 1 I +X b1 4 -550 100 200 R 50 50 1 1 I +X c0 5 -550 0 200 R 50 50 1 1 I +X c1 6 -550 -100 200 R 50 50 1 1 I +X d0 7 -550 -200 200 R 50 50 1 1 I +X d1 8 -550 -300 200 R 50 50 1 1 I +X EN 9 -550 -550 200 R 50 50 1 1 I I +X S 10 -550 -450 200 R 50 50 1 1 I +X Yd 11 600 0 200 L 50 50 1 1 O +X Ya 12 600 300 200 L 50 50 1 1 O +X Yb 13 600 200 200 L 50 50 1 1 O +X Yc 14 600 100 200 L 50 50 1 1 O +ENDDRAW +ENDDEF +# +# IC_7485 +# +DEF IC_7485 X 0 40 Y Y 1 F N +F0 "X" -50 -100 60 H V C CNN +F1 "IC_7485" -50 50 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +T 0 0 550 60 0 0 0 4~BIT~comparator Normal 0 C C +S -350 450 400 -400 0 1 0 N +X AB(in) 3 600 -300 200 L 50 50 1 1 I +X A3 4 -550 100 200 R 50 50 1 1 I +X B3 5 -550 -350 200 R 50 50 1 1 I +X A2 6 -550 200 200 R 50 50 1 1 I +X B2 7 -550 -250 200 R 50 50 1 1 I +X A1 8 -550 300 200 R 50 50 1 1 I +X B1 9 -550 -150 200 R 50 50 1 1 I +X A0 10 -550 400 200 R 50 50 1 1 I +X B0 11 -550 -50 200 R 50 50 1 1 I +X A>B(out) 12 600 350 200 L 50 50 1 1 O +X A=B(out) 13 600 250 200 L 50 50 1 1 O +X A plot_data_v.txt +print alli > plot_data_i.txt +.endc +.end diff --git a/library/SubcircuitLibrary/LM13700/LM13700.pro b/library/SubcircuitLibrary/LM13700/LM13700.pro new file mode 100644 index 00000000..b4c76509 --- /dev/null +++ b/library/SubcircuitLibrary/LM13700/LM13700.pro @@ -0,0 +1,81 @@ +update=09/24/22 18:32:27 +version=1 +last_client=eeschema +[general] +version=1 +RootSch= +BoardNm= +[pcbnew] +version=1 +LastNetListRead= +UseCmpFile=1 +PadDrill=0.600000000000 +PadDrillOvalY=0.600000000000 +PadSizeH=1.500000000000 +PadSizeV=1.500000000000 +PcbTextSizeV=1.500000000000 +PcbTextSizeH=1.500000000000 +PcbTextThickness=0.300000000000 +ModuleTextSizeV=1.000000000000 +ModuleTextSizeH=1.000000000000 +ModuleTextSizeThickness=0.150000000000 +SolderMaskClearance=0.000000000000 +SolderMaskMinWidth=0.000000000000 +DrawSegmentWidth=0.200000000000 +BoardOutlineThickness=0.100000000000 +ModuleOutlineThickness=0.150000000000 +[cvpcb] +version=1 +NetIExt=net +[eeschema] +version=1 +LibDir= +[eeschema/libraries] +LibName1=adc-dac +LibName2=memory +LibName3=xilinx +LibName4=microcontrollers +LibName5=dsp +LibName6=microchip +LibName7=analog_switches +LibName8=motorola +LibName9=texas +LibName10=intel +LibName11=audio +LibName12=interface +LibName13=digital-audio +LibName14=philips +LibName15=display +LibName16=cypress +LibName17=siliconi +LibName18=opto +LibName19=atmel +LibName20=contrib +LibName21=power +LibName22=eSim_Plot +LibName23=transistors +LibName24=conn +LibName25=eSim_User +LibName26=regul +LibName27=74xx +LibName28=cmos4000 +LibName29=eSim_Analog +LibName30=eSim_Devices +LibName31=eSim_Digital +LibName32=eSim_Hybrid +LibName33=eSim_Miscellaneous +LibName34=eSim_Power +LibName35=eSim_Sources +LibName36=eSim_Subckt +LibName37=eSim_Nghdl +LibName38=eSim_Ngveri +[schematic_editor] +version=1 +PageLayoutDescrFile= +PlotDirectoryName= +SubpartIdSeparator=0 +SubpartFirstId=65 +NetFmtName= +SpiceForceRefPrefix=0 +SpiceUseNetNumbers=0 +LabSize=60 diff --git a/library/SubcircuitLibrary/LM13700/LM13700.sch b/library/SubcircuitLibrary/LM13700/LM13700.sch new file mode 100644 index 00000000..cf335372 --- /dev/null +++ b/library/SubcircuitLibrary/LM13700/LM13700.sch @@ -0,0 +1,991 @@ +EESchema Schematic File Version 2 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:power +LIBS:eSim_Plot +LIBS:transistors +LIBS:conn +LIBS:eSim_User +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:eSim_Analog +LIBS:eSim_Devices +LIBS:eSim_Digital +LIBS:eSim_Hybrid +LIBS:eSim_Miscellaneous +LIBS:eSim_Power +LIBS:eSim_Sources +LIBS:eSim_Subckt +LIBS:eSim_Nghdl +LIBS:eSim_Ngveri +LIBS:LM13700-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11693 8268 +encoding utf-8 +Sheet 1 1 +Title "" +Date "" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +$Comp +L eSim_PNP Q3 +U 1 1 62C1C504 +P 2500 1700 +F 0 "Q3" H 2400 1750 50 0000 R CNN +F 1 "eSim_PNP" H 2450 1850 50 0000 R CNN +F 2 "" H 2700 1800 29 0000 C CNN +F 3 "" H 2500 1700 60 0000 C CNN + 1 2500 1700 + -1 0 0 1 +$EndComp +$Comp +L eSim_Diode D4 +U 1 1 62C1C505 +P 3200 1450 +F 0 "D4" H 3200 1550 50 0000 C CNN +F 1 "eSim_Diode" H 3200 1350 50 0000 C CNN +F 2 "" H 3200 1450 60 0000 C CNN +F 3 "" H 3200 1450 60 0000 C CNN + 1 3200 1450 + 0 1 1 0 +$EndComp +$Comp +L eSim_PNP Q6 +U 1 1 62C1C506 +P 3100 2250 +F 0 "Q6" H 3000 2300 50 0000 R CNN +F 1 "eSim_PNP" H 3050 2400 50 0000 R CNN +F 2 "" H 3300 2350 29 0000 C CNN +F 3 "" H 3100 2250 60 0000 C CNN + 1 3100 2250 + 1 0 0 1 +$EndComp +$Comp +L eSim_PNP Q7 +U 1 1 62C1C507 +P 3800 1700 +F 0 "Q7" H 3700 1750 50 0000 R CNN +F 1 "eSim_PNP" H 3750 1850 50 0000 R CNN +F 2 "" H 4000 1800 29 0000 C CNN +F 3 "" H 3800 1700 60 0000 C CNN + 1 3800 1700 + -1 0 0 1 +$EndComp +$Comp +L eSim_Diode D5 +U 1 1 62C1C508 +P 4500 1450 +F 0 "D5" H 4500 1550 50 0000 C CNN +F 1 "eSim_Diode" H 4500 1350 50 0000 C CNN +F 2 "" H 4500 1450 60 0000 C CNN +F 3 "" H 4500 1450 60 0000 C CNN + 1 4500 1450 + 0 1 1 0 +$EndComp +$Comp +L eSim_PNP Q9 +U 1 1 62C1C509 +P 4400 2250 +F 0 "Q9" H 4300 2300 50 0000 R CNN +F 1 "eSim_PNP" H 4350 2400 50 0000 R CNN +F 2 "" H 4600 2350 29 0000 C CNN +F 3 "" H 4400 2250 60 0000 C CNN + 1 4400 2250 + 1 0 0 1 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"D3" H 3200 3150 50 0000 C CNN +F 1 "eSim_Diode" H 3200 2950 50 0000 C CNN +F 2 "" H 3200 3050 60 0000 C CNN +F 3 "" H 3200 3050 60 0000 C CNN + 1 3200 3050 + 0 1 1 0 +$EndComp +$Comp +L eSim_Diode D1 +U 1 1 62C1C50F +P 2000 3050 +F 0 "D1" H 2000 3150 50 0000 C CNN +F 1 "eSim_Diode" H 2000 2950 50 0000 C CNN +F 2 "" H 2000 3050 60 0000 C CNN +F 3 "" H 2000 3050 60 0000 C CNN + 1 2000 3050 + 0 1 1 0 +$EndComp +$Comp +L eSim_NPN Q4 +U 1 1 62C1C510 +P 2500 4250 +F 0 "Q4" H 2400 4300 50 0000 R CNN +F 1 "eSim_NPN" H 2450 4400 50 0000 R CNN +F 2 "" H 2700 4350 29 0000 C CNN +F 3 "" H 2500 4250 60 0000 C CNN + 1 2500 4250 + 1 0 0 -1 +$EndComp +$Comp +L eSim_NPN Q1 +U 1 1 62C1C511 +P 2150 4750 +F 0 "Q1" H 2050 4800 50 0000 R CNN +F 1 "eSim_NPN" H 2100 4900 50 0000 R CNN +F 2 "" H 2350 4850 29 0000 C CNN +F 3 "" H 2150 4750 60 0000 C CNN + 1 2150 4750 + -1 0 0 -1 +$EndComp +$Comp +L eSim_Diode D2 +U 1 1 62C1C512 +P 2600 5150 +F 0 "D2" H 2600 5250 50 0000 C CNN +F 1 "eSim_Diode" H 2600 5050 50 0000 C CNN +F 2 "" H 2600 5150 60 0000 C CNN +F 3 "" H 2600 5150 60 0000 C CNN + 1 2600 5150 + 0 1 1 0 +$EndComp +$Comp +L eSim_NPN Q10 +U 1 1 62C1C513 +P 4400 4050 +F 0 "Q10" H 4300 4100 50 0000 R CNN +F 1 "eSim_NPN" H 4350 4200 50 0000 R CNN +F 2 "" H 4600 4150 29 0000 C CNN +F 3 "" H 4400 4050 60 0000 C CNN + 1 4400 4050 + 1 0 0 -1 +$EndComp +$Comp +L eSim_NPN Q8 +U 1 1 62C1C514 +P 3800 4700 +F 0 "Q8" H 3700 4750 50 0000 R CNN +F 1 "eSim_NPN" H 3750 4850 50 0000 R CNN +F 2 "" H 4000 4800 29 0000 C CNN +F 3 "" H 3800 4700 60 0000 C CNN + 1 3800 4700 + -1 0 0 -1 +$EndComp +$Comp +L eSim_Diode D6 +U 1 1 62C1C515 +P 4500 5150 +F 0 "D6" H 4500 5250 50 0000 C CNN +F 1 "eSim_Diode" H 4500 5050 50 0000 C CNN +F 2 "" H 4500 5150 60 0000 C CNN +F 3 "" H 4500 5150 60 0000 C CNN + 1 4500 5150 + 0 1 1 0 +$EndComp +$Comp +L eSim_PNP Q15 +U 1 1 62C1C516 +P 6650 1700 +F 0 "Q15" H 6550 1750 50 0000 R CNN +F 1 "eSim_PNP" H 6600 1850 50 0000 R CNN +F 2 "" H 6850 1800 29 0000 C CNN +F 3 "" H 6650 1700 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C CNN + 11 5050 4250 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 14 1 62C1D719 +P 9450 3250 +F 0 "U1" H 9500 3350 30 0000 C CNN +F 1 "PORT" H 9450 3250 30 0000 C CNN +F 2 "" H 9450 3250 60 0000 C CNN +F 3 "" H 9450 3250 60 0000 C CNN + 14 9450 3250 + -1 0 0 1 +$EndComp +$Comp +L PORT U1 +U 15 1 62C1D7AC +P 9950 2100 +F 0 "U1" H 10000 2200 30 0000 C CNN +F 1 "PORT" H 9950 2100 30 0000 C CNN +F 2 "" H 9950 2100 60 0000 C CNN +F 3 "" H 9950 2100 60 0000 C CNN + 15 9950 2100 + -1 0 0 1 +$EndComp +$Comp +L PORT U1 +U 16 1 62C1D875 +P 9700 2450 +F 0 "U1" H 9750 2550 30 0000 C CNN +F 1 "PORT" H 9700 2450 30 0000 C CNN +F 2 "" H 9700 2450 60 0000 C CNN +F 3 "" H 9700 2450 60 0000 C CNN + 16 9700 2450 + -1 0 0 1 +$EndComp +Wire Wire Line + 9600 2100 9600 1950 +Wire Wire Line + 7350 2800 7350 2900 +Wire Wire Line + 3200 2800 3200 2900 +$EndSCHEMATC diff --git a/library/SubcircuitLibrary/LM13700/LM13700.sub b/library/SubcircuitLibrary/LM13700/LM13700.sub new file mode 100644 index 00000000..81d11235 --- /dev/null +++ b/library/SubcircuitLibrary/LM13700/LM13700.sub @@ -0,0 +1,45 @@ +* Subcircuit LM13700 +.subckt LM13700 /v+ /diode_bias /input- /input+ /amp_bias_input /v- /output /diode_bias /input- /input+ /amp_bias_input /buffer_output /buffer_input /output /buffer_output /bufer_input +* c:\fossee\esim\library\subcircuitlibrary\lm13700\lm13700.cir +.include D.lib +.include PNP.lib +.include NPN.lib +q3 net-_q2-pad1_ net-_d4-pad2_ /v+ Q2N2907A +d4 /v+ net-_d4-pad2_ 1N4148 +q6 net-_q10-pad2_ net-_q2-pad1_ net-_d4-pad2_ Q2N2907A +q7 net-_q5-pad1_ net-_d5-pad2_ /v+ Q2N2907A +d5 /v+ net-_d5-pad2_ 1N4148 +q9 /output net-_q5-pad1_ net-_d5-pad2_ Q2N2907A +q11 /v+ /buffer_input net-_q11-pad3_ Q2N2222 +q12 /v+ net-_q11-pad3_ /buffer_output Q2N2222 +q2 net-_q2-pad1_ /input- net-_q2-pad3_ Q2N2222 +q5 net-_q5-pad1_ /input+ net-_q2-pad3_ Q2N2222 +d3 /diode_bias /input+ 1N4148 +d1 /diode_bias /input- 1N4148 +q4 net-_q2-pad3_ /amp_bias_input net-_d2-pad1_ Q2N2222 +q1 /amp_bias_input net-_d2-pad1_ /v- Q2N2222 +d2 net-_d2-pad1_ /v- 1N4148 +q10 /output net-_q10-pad2_ net-_d6-pad1_ Q2N2222 +q8 net-_q10-pad2_ net-_d6-pad1_ /v- Q2N2222 +d6 net-_d6-pad1_ /v- 1N4148 +q15 net-_q14-pad1_ net-_d10-pad2_ /v+ Q2N2907A +d10 /v+ net-_d10-pad2_ 1N4148 +q18 net-_q18-pad1_ net-_q14-pad1_ net-_d10-pad2_ Q2N2907A +q19 net-_q17-pad1_ net-_d11-pad2_ /v+ Q2N2907A +d11 /v+ net-_d11-pad2_ 1N4148 +q21 /output net-_q17-pad1_ net-_d11-pad2_ Q2N2907A +q23 /v+ /bufer_input net-_q23-pad3_ Q2N2222 +q24 /v+ net-_q23-pad3_ /buffer_output Q2N2222 +q14 net-_q14-pad1_ /input- net-_q14-pad3_ Q2N2222 +q17 net-_q17-pad1_ /input+ net-_q14-pad3_ Q2N2222 +d9 /diode_bias /input+ 1N4148 +d7 /diode_bias /input- 1N4148 +q16 net-_q14-pad3_ /amp_bias_input net-_d8-pad1_ Q2N2222 +q13 /amp_bias_input net-_d8-pad1_ /v- Q2N2222 +d8 net-_d8-pad1_ /v- 1N4148 +q22 /output net-_q18-pad1_ net-_d12-pad1_ Q2N2222 +q20 net-_q18-pad1_ net-_d12-pad1_ /v- Q2N2222 +d12 net-_d12-pad1_ /v- 1N4148 +* Control Statements + +.ends LM13700 \ No newline at end of file diff --git a/library/SubcircuitLibrary/LM13700/LM13700_Previous_Values.xml b/library/SubcircuitLibrary/LM13700/LM13700_Previous_Values.xml new file mode 100644 index 00000000..68f6df1f --- /dev/null +++ b/library/SubcircuitLibrary/LM13700/LM13700_Previous_Values.xml @@ -0,0 +1 @@ +C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.libC:\FOSSEE\eSim\library\deviceModelLibrary\Diode\D.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.libC:\FOSSEE\eSim\library\deviceModelLibrary\Diode\D.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libC:\FOSSEE\eSim\library\deviceModelLibrary\Diode\D.libC:\FOSSEE\eSim\library\deviceModelLibrary\Diode\D.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libC:\FOSSEE\eSim\library\deviceModelLibrary\Diode\D.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libC:\FOSSEE\eSim\library\deviceModelLibrary\Diode\D.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.libC:\FOSSEE\eSim\library\deviceModelLibrary\Diode\D.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.libC:\FOSSEE\eSim\library\deviceModelLibrary\Diode\D.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libC:\FOSSEE\eSim\library\deviceModelLibrary\Diode\D.libC:\FOSSEE\eSim\library\deviceModelLibrary\Diode\D.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libC:\FOSSEE\eSim\library\deviceModelLibrary\Diode\D.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libC:\FOSSEE\eSim\library\deviceModelLibrary\Diode\D.libtruefalsefalseHzHz0Volts or AmperesVolts or AmperesVolts or AmperesVolts or AmperesVolts or AmperesVolts or AmperesSecSecSec \ No newline at end of file diff --git a/library/SubcircuitLibrary/LM13700/NPN.lib b/library/SubcircuitLibrary/LM13700/NPN.lib new file mode 100644 index 00000000..be5f3073 --- /dev/null +++ b/library/SubcircuitLibrary/LM13700/NPN.lib @@ -0,0 +1,4 @@ +.model Q2N2222 NPN( Is=14.34f Xti=3 Eg=1.11 Vaf=74.03 Bf=400 Ne=1.307 ++ Ise=14.34f Ikf=0.2847 Xtb=1.5 Br=6.092 Nc=2 Isc=0 Ikr=0 Rc=1 Cjc=7.306p ++ Mjc=0.3416 Vjc=0.75 Fc=0.5 Cje=22.01p Mje=0.377 Vje=0.75 Tr=46.91n Tf=411.1p ++ Itf=0.6 Vtf=1.7 Xtf=3 Rb=10) diff --git a/library/SubcircuitLibrary/LM13700/PNP.lib b/library/SubcircuitLibrary/LM13700/PNP.lib new file mode 100644 index 00000000..7edda0ea --- /dev/null +++ b/library/SubcircuitLibrary/LM13700/PNP.lib @@ -0,0 +1,4 @@ +.model Q2N2907A PNP(Is=650.6E-18 Xti=3 Eg=1.11 Vaf=115.7 Bf=231.7 Ne=1.829 ++ Ise=54.81f Ikf=1.079 Xtb=1.5 Br=3.563 Nc=2 Isc=0 Ikr=0 Rc=.715 ++ Cjc=14.76p Mjc=.5383 Vjc=.75 Fc=.5 Cje=19.82p Mje=.3357 Vje=.75 ++ Tr=111.3n Tf=603.7p Itf=.65 Vtf=5 Xtf=1.7 Rb=10) diff --git a/library/SubcircuitLibrary/LM13700/README.md b/library/SubcircuitLibrary/LM13700/README.md new file mode 100644 index 00000000..cca1cfed --- /dev/null +++ b/library/SubcircuitLibrary/LM13700/README.md @@ -0,0 +1,34 @@ + +# LM13700 Operational Transconductance Amplifier IC + +The LM13700 is a current controlled, additional output buffer-equipped, differential input, transconductance amplifier with two channels. The two amplifiers operate independently, sharing a common supply. It makes use of linearizing diodes, using which higher input levels are permitted with less distortion. It has improved SNR also. + + +## Usage/Examples + +VCA (Voltage Controlled Amplifier) + +ACG (Automatic Gain Contol) Amplifier + +VCO (Voltage controlled Oscillator) + +PLL (Phase Locked loop) + +Four Quadrant Multiplier + +Amplitude Modulator + +## Documentation + +To know the details of LM13700 IC please refer to this link [LM13700_datasheet.](https://www.ti.com/lit/ds/symlink/lm13700.pdf) + +## Comments/Notes + +Please note this is a complete analog IC. Due to the improper modeling of Darlington pair at the output terminals, this IC is producing improper output. The shape of the output waveform is fine but the output is highly DC shifted & also it's peak to peak value is very low. Therefore it is suggested to use this IC only after replacing the subcircuit with a proper working Darlington pair. + +## Contributor + +Name: Arpit Sharma +Email: arpitniraliya306@gmail.com +Year: 2022 +Position: FOSSEE Summer Fellowship Intern 2022 diff --git a/library/SubcircuitLibrary/LM13700/analysis b/library/SubcircuitLibrary/LM13700/analysis new file mode 100644 index 00000000..ebd5c0a9 --- /dev/null +++ b/library/SubcircuitLibrary/LM13700/analysis @@ -0,0 +1 @@ +.tran 0e-00 0e-00 0e-00 \ No newline at end of file -- cgit From 28d78148e25db0a5cac9b7896184f191f8355217 Mon Sep 17 00:00:00 2001 From: Arpit Sharma Date: Fri, 21 Oct 2022 23:08:46 +0530 Subject: LM321 Op-Amp IC --- library/SubcircuitLibrary/LM321/LM321-cache.lib | 141 + library/SubcircuitLibrary/LM321/LM321.cir | 48 + library/SubcircuitLibrary/LM321/LM321.cir.out | 52 + library/SubcircuitLibrary/LM321/LM321.pro | 81 + library/SubcircuitLibrary/LM321/LM321.sch | 821 ++ library/SubcircuitLibrary/LM321/LM321.sch.svg | 10007 +++++++++++++++++++ library/SubcircuitLibrary/LM321/LM321.sub | 46 + .../LM321/LM321_Previous_Values.xml | 1 + library/SubcircuitLibrary/LM321/NJF.lib | 4 + library/SubcircuitLibrary/LM321/NPN.lib | 4 + library/SubcircuitLibrary/LM321/PNP.lib | 4 + library/SubcircuitLibrary/LM321/README.md | 35 + library/SubcircuitLibrary/LM321/analysis | 1 + 13 files changed, 11245 insertions(+) create mode 100644 library/SubcircuitLibrary/LM321/LM321-cache.lib create mode 100644 library/SubcircuitLibrary/LM321/LM321.cir create mode 100644 library/SubcircuitLibrary/LM321/LM321.cir.out create mode 100644 library/SubcircuitLibrary/LM321/LM321.pro create mode 100644 library/SubcircuitLibrary/LM321/LM321.sch create mode 100644 library/SubcircuitLibrary/LM321/LM321.sch.svg create mode 100644 library/SubcircuitLibrary/LM321/LM321.sub create mode 100644 library/SubcircuitLibrary/LM321/LM321_Previous_Values.xml create mode 100644 library/SubcircuitLibrary/LM321/NJF.lib create mode 100644 library/SubcircuitLibrary/LM321/NPN.lib create mode 100644 library/SubcircuitLibrary/LM321/PNP.lib create mode 100644 library/SubcircuitLibrary/LM321/README.md create mode 100644 library/SubcircuitLibrary/LM321/analysis diff --git a/library/SubcircuitLibrary/LM321/LM321-cache.lib b/library/SubcircuitLibrary/LM321/LM321-cache.lib new file mode 100644 index 00000000..7eda2392 --- /dev/null +++ b/library/SubcircuitLibrary/LM321/LM321-cache.lib @@ -0,0 +1,141 @@ +EESchema-LIBRARY Version 2.3 +#encoding utf-8 +# +# PORT +# +DEF PORT U 0 40 Y Y 26 F N +F0 "U" 50 100 30 H V C CNN +F1 "PORT" 0 0 30 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0 +A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50 +S -100 50 100 -50 0 1 0 N +X ~ 1 250 0 100 L 30 30 1 1 B +X ~ 2 250 0 100 L 30 30 2 1 B +X ~ 3 250 0 100 L 30 30 3 1 B +X ~ 4 250 0 100 L 30 30 4 1 B +X ~ 5 250 0 100 L 30 30 5 1 B +X ~ 6 250 0 100 L 30 30 6 1 B +X ~ 7 250 0 100 L 30 30 7 1 B +X ~ 8 250 0 100 L 30 30 8 1 B +X ~ 9 250 0 100 L 30 30 9 1 B +X ~ 10 250 0 100 L 30 30 10 1 B +X ~ 11 250 0 100 L 30 30 11 1 B +X ~ 12 250 0 100 L 30 30 12 1 B +X ~ 13 250 0 100 L 30 30 13 1 B +X ~ 14 250 0 100 L 30 30 14 1 B +X ~ 15 250 0 100 L 30 30 15 1 B +X ~ 16 250 0 100 L 30 30 16 1 B +X ~ 17 250 0 100 L 30 30 17 1 B +X ~ 18 250 0 100 L 30 30 18 1 B +X ~ 19 250 0 100 L 30 30 19 1 B +X ~ 20 250 0 100 L 30 30 20 1 B +X ~ 21 250 0 100 L 30 30 21 1 B +X ~ 22 250 0 100 L 30 30 22 1 B +X ~ 23 250 0 100 L 30 30 23 1 B +X ~ 24 250 0 100 L 30 30 24 1 B +X ~ 25 250 0 100 L 30 30 25 1 B +X ~ 26 250 0 100 L 30 30 26 1 B +ENDDRAW +ENDDEF +# +# eSim_C +# +DEF eSim_C C 0 10 N Y 1 F N +F0 "C" 25 100 50 H V L CNN +F1 "eSim_C" 25 -100 50 H V L CNN +F2 "" 38 -150 30 H V C CNN +F3 "" 0 0 60 H V C CNN +ALIAS capacitor +$FPLIST + C_* +$ENDFPLIST +DRAW +P 2 0 1 20 -80 -30 80 -30 N +P 2 0 1 20 -80 30 80 30 N +X ~ 1 0 150 110 D 40 40 1 1 P +X ~ 2 0 -150 110 U 40 40 1 1 P +ENDDRAW +ENDDEF +# +# eSim_NJF +# +DEF eSim_NJF J 0 0 Y N 1 F N +F0 "J" -100 50 50 H V R CNN +F1 "eSim_NJF" -50 150 50 H V R CNN +F2 "" 200 100 29 H V C CNN +F3 "" 0 0 60 H V C CNN +ALIAS jfet_n +DRAW +C 50 0 111 0 1 10 N +P 3 0 1 10 10 75 10 -75 10 -75 N +P 3 0 1 0 100 -100 100 -50 10 -50 N +P 3 0 1 0 100 100 100 55 10 55 N +P 4 0 1 0 0 0 -40 15 -40 -15 0 0 F +X D 1 100 200 100 D 50 50 1 1 P +X G 2 -200 0 210 R 50 50 1 1 P +X S 3 100 -200 100 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# eSim_NPN +# +DEF eSim_NPN Q 0 0 Y N 1 F N +F0 "Q" -100 50 50 H V R CNN +F1 "eSim_NPN" -50 150 50 H V R CNN +F2 "" 200 100 29 H V C CNN +F3 "" 0 0 60 H V C CNN +ALIAS BC547 Q2N2222 +DRAW +C 50 0 111 0 1 10 N +P 2 0 1 0 25 25 100 100 N +P 3 0 1 0 25 -25 100 -100 100 -100 N +P 3 0 1 20 25 75 25 -75 25 -75 N +P 5 0 1 0 50 -70 70 -50 90 -90 50 -70 50 -70 F +X C 1 100 200 100 D 50 50 1 1 P +X B 2 -200 0 225 R 50 50 1 1 P +X E 3 100 -200 100 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# eSim_PNP +# +DEF eSim_PNP Q 0 0 Y N 1 F N +F0 "Q" -100 50 50 H V R CNN +F1 "eSim_PNP" -50 150 50 H V R CNN +F2 "" 200 100 29 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +C 50 0 111 0 1 10 N +P 2 0 1 0 25 25 100 100 N +P 3 0 1 0 25 -25 100 -100 100 -100 N +P 3 0 1 20 25 75 25 -75 25 -75 N +P 5 0 1 0 90 -70 70 -90 50 -50 90 -70 90 -70 F +X C 1 100 200 100 D 50 50 1 1 P +X B 2 -200 0 225 R 50 50 1 1 P +X E 3 100 -200 100 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# eSim_R +# +DEF eSim_R R 0 0 N Y 1 F N +F0 "R" 50 130 50 H V C CNN +F1 "eSim_R" 50 -50 50 H V C CNN +F2 "" 50 -20 30 H V C CNN +F3 "" 50 50 30 V V C CNN +ALIAS resistor +$FPLIST + R_* + Resistor_* +$ENDFPLIST +DRAW +S 150 10 -50 90 0 1 10 N +X ~ 1 -100 50 50 R 60 60 1 1 P +X ~ 2 200 50 50 L 60 60 1 1 P +ENDDRAW +ENDDEF +# +#End Library diff --git a/library/SubcircuitLibrary/LM321/LM321.cir b/library/SubcircuitLibrary/LM321/LM321.cir new file mode 100644 index 00000000..365f931d --- /dev/null +++ b/library/SubcircuitLibrary/LM321/LM321.cir @@ -0,0 +1,48 @@ +* C:\FOSSEE\eSim\library\SubcircuitLibrary\LM321\LM321.cir + +* EESchema Netlist Version 1.1 (Spice format) creation date: 08/04/22 16:17:25 + +* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N +* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +* Sheet Name: / +U1 Net-_Q12-Pad2_ Net-_Q3-Pad2_ Net-_J1-Pad1_ Net-_Q24-Pad3_ Net-_J1-Pad2_ PORT +Q1 Net-_Q1-Pad1_ Net-_Q1-Pad2_ Net-_J1-Pad1_ eSim_PNP +Q14 Net-_Q14-Pad1_ Net-_Q1-Pad2_ Net-_J1-Pad1_ eSim_PNP +Q19 Net-_Q1-Pad2_ Net-_Q1-Pad2_ Net-_J1-Pad1_ eSim_PNP +Q4 Net-_Q3-Pad3_ Net-_Q3-Pad3_ Net-_Q11-Pad3_ eSim_PNP +Q11 Net-_Q11-Pad1_ Net-_Q11-Pad1_ Net-_Q11-Pad3_ eSim_PNP +Q3 Net-_J1-Pad2_ Net-_Q3-Pad2_ Net-_Q3-Pad3_ eSim_PNP +Q12 Net-_J1-Pad2_ Net-_Q12-Pad2_ Net-_Q11-Pad1_ eSim_PNP +Q2 Net-_J1-Pad2_ Net-_Q2-Pad2_ Net-_Q1-Pad1_ eSim_PNP +Q9 Net-_C1-Pad2_ Net-_Q2-Pad2_ Net-_J1-Pad2_ eSim_NPN +Q5 Net-_Q2-Pad2_ Net-_Q2-Pad2_ Net-_J1-Pad2_ eSim_NPN +Q13 Net-_J1-Pad2_ Net-_C1-Pad2_ Net-_Q10-Pad1_ eSim_PNP +Q15 Net-_Q14-Pad1_ Net-_Q10-Pad1_ Net-_Q15-Pad3_ eSim_NPN +Q17 Net-_Q15-Pad3_ Net-_Q16-Pad1_ Net-_J1-Pad2_ eSim_NPN +Q18 Net-_J1-Pad2_ Net-_Q16-Pad1_ Net-_Q14-Pad1_ eSim_PNP +Q20 Net-_Q16-Pad1_ Net-_Q16-Pad1_ Net-_J1-Pad2_ eSim_NPN +Q21 Net-_C1-Pad1_ Net-_Q15-Pad3_ Net-_J1-Pad2_ eSim_NPN +C1 Net-_C1-Pad1_ Net-_C1-Pad2_ 5p +Q24 Net-_C1-Pad1_ Net-_Q24-Pad2_ Net-_Q24-Pad3_ eSim_NPN +R1 Net-_Q23-Pad3_ Net-_Q24-Pad2_ 40k +Q23 Net-_J1-Pad1_ Net-_C1-Pad1_ Net-_Q23-Pad3_ eSim_NPN +Q25 Net-_J1-Pad1_ Net-_Q23-Pad3_ Net-_Q24-Pad2_ eSim_NPN +R2 Net-_Q24-Pad2_ Net-_Q24-Pad3_ 25 +Q26 Net-_J1-Pad2_ Net-_C1-Pad1_ Net-_Q24-Pad3_ eSim_PNP +Q27 Net-_Q24-Pad3_ Net-_Q16-Pad1_ Net-_J1-Pad2_ eSim_NPN +Q28 Net-_Q1-Pad2_ Net-_Q28-Pad2_ Net-_Q28-Pad3_ eSim_NPN +R3 Net-_Q28-Pad3_ Net-_J1-Pad2_ 2k +J1 Net-_J1-Pad1_ Net-_J1-Pad2_ Net-_J1-Pad3_ jfet_n +Q31 Net-_J1-Pad1_ Net-_J1-Pad3_ Net-_Q30-Pad2_ eSim_NPN +Q29 Net-_J1-Pad3_ Net-_J1-Pad3_ Net-_Q28-Pad2_ eSim_NPN +Q30 Net-_Q28-Pad2_ Net-_Q30-Pad2_ Net-_J1-Pad2_ eSim_NPN +R4 Net-_Q30-Pad2_ Net-_J1-Pad2_ 2.4k +Q7 Net-_Q11-Pad3_ Net-_Q1-Pad2_ Net-_J1-Pad1_ eSim_PNP +Q10 Net-_Q10-Pad1_ Net-_Q1-Pad2_ Net-_J1-Pad1_ eSim_PNP +Q16 Net-_Q16-Pad1_ Net-_Q1-Pad2_ Net-_J1-Pad1_ eSim_PNP +Q6 Net-_Q2-Pad2_ Net-_Q3-Pad3_ Net-_Q11-Pad3_ eSim_PNP +Q8 Net-_C1-Pad2_ Net-_Q11-Pad1_ Net-_Q11-Pad3_ eSim_PNP +Q22 Net-_C1-Pad1_ Net-_Q1-Pad2_ Net-_J1-Pad1_ eSim_PNP + +.end diff --git a/library/SubcircuitLibrary/LM321/LM321.cir.out b/library/SubcircuitLibrary/LM321/LM321.cir.out new file mode 100644 index 00000000..17548c8f --- /dev/null +++ b/library/SubcircuitLibrary/LM321/LM321.cir.out @@ -0,0 +1,52 @@ +* c:\fossee\esim\library\subcircuitlibrary\lm321\lm321.cir + +.include PNP.lib +.include NPN.lib +.include NJF.lib +* u1 net-_q12-pad2_ net-_q3-pad2_ net-_j1-pad1_ net-_q24-pad3_ net-_j1-pad2_ port +q1 net-_q1-pad1_ net-_q1-pad2_ net-_j1-pad1_ Q2N2907A +q14 net-_q14-pad1_ net-_q1-pad2_ net-_j1-pad1_ Q2N2907A +q19 net-_q1-pad2_ net-_q1-pad2_ net-_j1-pad1_ Q2N2907A +q4 net-_q3-pad3_ net-_q3-pad3_ net-_q11-pad3_ Q2N2907A +q11 net-_q11-pad1_ net-_q11-pad1_ net-_q11-pad3_ Q2N2907A +q3 net-_j1-pad2_ net-_q3-pad2_ net-_q3-pad3_ Q2N2907A +q12 net-_j1-pad2_ net-_q12-pad2_ net-_q11-pad1_ Q2N2907A +q2 net-_j1-pad2_ net-_q2-pad2_ net-_q1-pad1_ Q2N2907A +q9 net-_c1-pad2_ net-_q2-pad2_ net-_j1-pad2_ Q2N2222 +q5 net-_q2-pad2_ net-_q2-pad2_ net-_j1-pad2_ Q2N2222 +q13 net-_j1-pad2_ net-_c1-pad2_ net-_q10-pad1_ Q2N2907A +q15 net-_q14-pad1_ net-_q10-pad1_ net-_q15-pad3_ Q2N2222 +q17 net-_q15-pad3_ net-_q16-pad1_ net-_j1-pad2_ Q2N2222 +q18 net-_j1-pad2_ net-_q16-pad1_ net-_q14-pad1_ Q2N2907A +q20 net-_q16-pad1_ net-_q16-pad1_ net-_j1-pad2_ Q2N2222 +q21 net-_c1-pad1_ net-_q15-pad3_ net-_j1-pad2_ Q2N2222 +c1 net-_c1-pad1_ net-_c1-pad2_ 5p +q24 net-_c1-pad1_ net-_q24-pad2_ net-_q24-pad3_ Q2N2222 +r1 net-_q23-pad3_ net-_q24-pad2_ 40k +q23 net-_j1-pad1_ net-_c1-pad1_ net-_q23-pad3_ Q2N2222 +q25 net-_j1-pad1_ net-_q23-pad3_ net-_q24-pad2_ Q2N2222 +r2 net-_q24-pad2_ net-_q24-pad3_ 25 +q26 net-_j1-pad2_ net-_c1-pad1_ net-_q24-pad3_ Q2N2907A +q27 net-_q24-pad3_ net-_q16-pad1_ net-_j1-pad2_ Q2N2222 +q28 net-_q1-pad2_ net-_q28-pad2_ net-_q28-pad3_ Q2N2222 +r3 net-_q28-pad3_ net-_j1-pad2_ 2k +j1 net-_j1-pad1_ net-_j1-pad2_ net-_j1-pad3_ J2N3819 +q31 net-_j1-pad1_ net-_j1-pad3_ net-_q30-pad2_ Q2N2222 +q29 net-_j1-pad3_ net-_j1-pad3_ net-_q28-pad2_ Q2N2222 +q30 net-_q28-pad2_ net-_q30-pad2_ net-_j1-pad2_ Q2N2222 +r4 net-_q30-pad2_ net-_j1-pad2_ 2.4k +q7 net-_q11-pad3_ net-_q1-pad2_ net-_j1-pad1_ Q2N2907A +q10 net-_q10-pad1_ net-_q1-pad2_ net-_j1-pad1_ Q2N2907A +q16 net-_q16-pad1_ net-_q1-pad2_ net-_j1-pad1_ Q2N2907A +q6 net-_q2-pad2_ net-_q3-pad3_ net-_q11-pad3_ Q2N2907A +q8 net-_c1-pad2_ net-_q11-pad1_ net-_q11-pad3_ Q2N2907A +q22 net-_c1-pad1_ net-_q1-pad2_ net-_j1-pad1_ Q2N2907A +.tran 0e-00 0e-00 0e-00 + +* Control Statements +.control +run +print allv > plot_data_v.txt +print alli > plot_data_i.txt +.endc +.end diff --git a/library/SubcircuitLibrary/LM321/LM321.pro b/library/SubcircuitLibrary/LM321/LM321.pro new file mode 100644 index 00000000..ef711b9b --- /dev/null +++ b/library/SubcircuitLibrary/LM321/LM321.pro @@ -0,0 +1,81 @@ +update=09/24/22 18:32:10 +version=1 +last_client=eeschema +[general] +version=1 +RootSch= +BoardNm= +[pcbnew] +version=1 +LastNetListRead= +UseCmpFile=1 +PadDrill=0.600000000000 +PadDrillOvalY=0.600000000000 +PadSizeH=1.500000000000 +PadSizeV=1.500000000000 +PcbTextSizeV=1.500000000000 +PcbTextSizeH=1.500000000000 +PcbTextThickness=0.300000000000 +ModuleTextSizeV=1.000000000000 +ModuleTextSizeH=1.000000000000 +ModuleTextSizeThickness=0.150000000000 +SolderMaskClearance=0.000000000000 +SolderMaskMinWidth=0.000000000000 +DrawSegmentWidth=0.200000000000 +BoardOutlineThickness=0.100000000000 +ModuleOutlineThickness=0.150000000000 +[cvpcb] +version=1 +NetIExt=net +[eeschema] +version=1 +LibDir= +[eeschema/libraries] +LibName1=adc-dac +LibName2=memory +LibName3=xilinx +LibName4=microcontrollers +LibName5=dsp +LibName6=microchip +LibName7=analog_switches +LibName8=motorola +LibName9=texas +LibName10=intel +LibName11=audio +LibName12=interface +LibName13=digital-audio +LibName14=philips +LibName15=display +LibName16=cypress +LibName17=siliconi +LibName18=opto +LibName19=atmel +LibName20=contrib +LibName21=power +LibName22=eSim_Plot +LibName23=transistors +LibName24=conn +LibName25=eSim_User +LibName26=regul +LibName27=74xx +LibName28=cmos4000 +LibName29=eSim_Analog +LibName30=eSim_Devices +LibName31=eSim_Digital +LibName32=eSim_Hybrid +LibName33=eSim_Miscellaneous +LibName34=eSim_Power +LibName35=eSim_Sources +LibName36=eSim_Subckt +LibName37=eSim_Nghdl +LibName38=eSim_Ngveri +[schematic_editor] +version=1 +PageLayoutDescrFile= +PlotDirectoryName= +SubpartIdSeparator=0 +SubpartFirstId=65 +NetFmtName= +SpiceForceRefPrefix=0 +SpiceUseNetNumbers=0 +LabSize=60 diff --git a/library/SubcircuitLibrary/LM321/LM321.sch b/library/SubcircuitLibrary/LM321/LM321.sch new file mode 100644 index 00000000..b7b73924 --- /dev/null +++ b/library/SubcircuitLibrary/LM321/LM321.sch @@ -0,0 +1,821 @@ +EESchema Schematic File Version 2 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:power +LIBS:eSim_Plot +LIBS:transistors +LIBS:conn +LIBS:eSim_User +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:eSim_Analog +LIBS:eSim_Devices +LIBS:eSim_Digital +LIBS:eSim_Hybrid +LIBS:eSim_Miscellaneous +LIBS:eSim_Power +LIBS:eSim_Sources +LIBS:eSim_Subckt +LIBS:eSim_Nghdl +LIBS:eSim_Ngveri +LIBS:LM321-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11693 8268 +encoding utf-8 +Sheet 1 1 +Title "" +Date "" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +$Comp +L PORT U1 +U 3 1 62DAF186 +P 10300 950 +F 0 "U1" H 10350 1050 30 0000 C CNN +F 1 "PORT" H 10300 950 30 0000 C CNN +F 2 "" H 10300 950 60 0000 C CNN +F 3 "" H 10300 950 60 0000 C CNN + 3 10300 950 + -1 0 0 1 +$EndComp +$Comp +L PORT U1 +U 4 1 62DAF1ED +P 10300 3200 +F 0 "U1" H 10350 3300 30 0000 C CNN +F 1 "PORT" H 10300 3200 30 0000 C CNN +F 2 "" H 10300 3200 60 0000 C CNN +F 3 "" H 10300 3200 60 0000 C CNN + 4 10300 3200 + -1 0 0 1 +$EndComp +$Comp +L PORT U1 +U 5 1 62DAF4F7 +P 10350 6000 +F 0 "U1" H 10400 6100 30 0000 C CNN +F 1 "PORT" H 10350 6000 30 0000 C CNN +F 2 "" H 10350 6000 60 0000 C CNN +F 3 "" H 10350 6000 60 0000 C CNN + 5 10350 6000 + -1 0 0 1 +$EndComp +$Comp +L PORT U1 +U 1 1 62DAF744 +P 850 3600 +F 0 "U1" H 900 3700 30 0000 C CNN +F 1 "PORT" H 850 3600 30 0000 C CNN +F 2 "" H 850 3600 60 0000 C CNN +F 3 "" H 850 3600 60 0000 C CNN + 1 850 3600 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 2 1 62DAF7B7 +P 850 4550 +F 0 "U1" H 900 4650 30 0000 C CNN +F 1 "PORT" H 850 4550 30 0000 C CNN +F 2 "" H 850 4550 60 0000 C CNN +F 3 "" H 850 4550 60 0000 C CNN + 2 850 4550 + 1 0 0 -1 +$EndComp +$Comp +L eSim_PNP Q1 +U 1 1 62E060F9 +P 1450 1650 +F 0 "Q1" H 1350 1700 50 0000 R CNN +F 1 "eSim_PNP" H 1400 1800 50 0000 R CNN +F 2 "" H 1650 1750 29 0000 C CNN +F 3 "" H 1450 1650 60 0000 C CNN + 1 1450 1650 + 1 0 0 1 +$EndComp +$Comp +L eSim_PNP Q14 +U 1 1 62E060FA +P 3950 1450 +F 0 "Q14" H 3850 1500 50 0000 R CNN +F 1 "eSim_PNP" H 3900 1600 50 0000 R CNN +F 2 "" H 4150 1550 29 0000 C CNN +F 3 "" H 3950 1450 60 0000 C CNN + 1 3950 1450 + 1 0 0 1 +$EndComp +$Comp +L eSim_PNP Q19 +U 1 1 62E060FB +P 6100 1400 +F 0 "Q19" H 6000 1450 50 0000 R CNN +F 1 "eSim_PNP" H 6050 1550 50 0000 R CNN +F 2 "" H 6300 1500 29 0000 C CNN +F 3 "" H 6100 1400 60 0000 C CNN + 1 6100 1400 + 1 0 0 1 +$EndComp +$Comp +L eSim_PNP Q4 +U 1 1 62E060FC +P 2300 3950 +F 0 "Q4" H 2200 4000 50 0000 R CNN +F 1 "eSim_PNP" H 2250 4100 50 0000 R CNN +F 2 "" H 2500 4050 29 0000 C CNN +F 3 "" H 2300 3950 60 0000 C CNN + 1 2300 3950 + 1 0 0 1 +$EndComp +$Comp +L eSim_PNP Q11 +U 1 1 62E060FD +P 3100 3950 +F 0 "Q11" H 3000 4000 50 0000 R CNN +F 1 "eSim_PNP" H 3050 4100 50 0000 R CNN +F 2 "" H 3300 4050 29 0000 C CNN +F 3 "" H 3100 3950 60 0000 C CNN + 1 3100 3950 + -1 0 0 1 +$EndComp +$Comp +L eSim_PNP Q3 +U 1 1 62E060FE +P 1900 4550 +F 0 "Q3" H 1800 4600 50 0000 R CNN +F 1 "eSim_PNP" H 1850 4700 50 0000 R CNN +F 2 "" H 2100 4650 29 0000 C CNN +F 3 "" H 1900 4550 60 0000 C CNN + 1 1900 4550 + 1 0 0 1 +$EndComp +$Comp +L eSim_PNP Q12 +U 1 1 62E060FF +P 3450 4650 +F 0 "Q12" H 3350 4700 50 0000 R CNN +F 1 "eSim_PNP" H 3400 4800 50 0000 R CNN +F 2 "" H 3650 4750 29 0000 C CNN +F 3 "" H 3450 4650 60 0000 C CNN + 1 3450 4650 + -1 0 0 1 +$EndComp +$Comp +L eSim_PNP Q2 +U 1 1 62E06100 +P 1650 5000 +F 0 "Q2" H 1550 5050 50 0000 R CNN +F 1 "eSim_PNP" H 1600 5150 50 0000 R CNN +F 2 "" H 1850 5100 29 0000 C CNN +F 3 "" H 1650 5000 60 0000 C CNN + 1 1650 5000 + -1 0 0 1 +$EndComp +$Comp +L eSim_NPN Q9 +U 1 1 62E06101 +P 3000 5500 +F 0 "Q9" H 2900 5550 50 0000 R CNN +F 1 "eSim_NPN" H 2950 5650 50 0000 R CNN +F 2 "" H 3200 5600 29 0000 C CNN +F 3 "" H 3000 5500 60 0000 C CNN + 1 3000 5500 + 1 0 0 -1 +$EndComp +$Comp +L eSim_NPN Q5 +U 1 1 62E06102 +P 2400 5500 +F 0 "Q5" H 2300 5550 50 0000 R CNN +F 1 "eSim_NPN" H 2350 5650 50 0000 R CNN +F 2 "" H 2600 5600 29 0000 C CNN +F 3 "" H 2400 5500 60 0000 C CNN + 1 2400 5500 + -1 0 0 -1 +$EndComp +$Comp +L eSim_PNP Q13 +U 1 1 62E06103 +P 3900 5000 +F 0 "Q13" H 3800 5050 50 0000 R CNN +F 1 "eSim_PNP" H 3850 5150 50 0000 R CNN +F 2 "" H 4100 5100 29 0000 C CNN +F 3 "" H 3900 5000 60 0000 C CNN + 1 3900 5000 + 1 0 0 1 +$EndComp +$Comp +L eSim_NPN Q15 +U 1 1 62E06104 +P 4500 4700 +F 0 "Q15" H 4400 4750 50 0000 R CNN +F 1 "eSim_NPN" H 4450 4850 50 0000 R CNN +F 2 "" H 4700 4800 29 0000 C CNN +F 3 "" H 4500 4700 60 0000 C CNN + 1 4500 4700 + 1 0 0 -1 +$EndComp +$Comp +L eSim_NPN Q17 +U 1 1 62E06105 +P 4700 5450 +F 0 "Q17" H 4600 5500 50 0000 R CNN +F 1 "eSim_NPN" H 4650 5600 50 0000 R CNN +F 2 "" H 4900 5550 29 0000 C CNN +F 3 "" H 4700 5450 60 0000 C CNN + 1 4700 5450 + -1 0 0 -1 +$EndComp +$Comp +L eSim_PNP Q18 +U 1 1 62E06106 +P 5400 4700 +F 0 "Q18" H 5300 4750 50 0000 R CNN +F 1 "eSim_PNP" H 5350 4850 50 0000 R CNN +F 2 "" H 5600 4800 29 0000 C CNN +F 3 "" H 5400 4700 60 0000 C CNN + 1 5400 4700 + -1 0 0 1 +$EndComp +$Comp +L eSim_NPN Q20 +U 1 1 62E06107 +P 6100 5200 +F 0 "Q20" H 6000 5250 50 0000 R CNN +F 1 "eSim_NPN" H 6050 5350 50 0000 R CNN +F 2 "" H 6300 5300 29 0000 C CNN +F 3 "" H 6100 5200 60 0000 C CNN + 1 6100 5200 + -1 0 0 -1 +$EndComp +$Comp +L eSim_NPN Q21 +U 1 1 62E06108 +P 6300 4150 +F 0 "Q21" H 6200 4200 50 0000 R CNN +F 1 "eSim_NPN" H 6250 4300 50 0000 R CNN +F 2 "" H 6500 4250 29 0000 C CNN +F 3 "" H 6300 4150 60 0000 C CNN + 1 6300 4150 + 1 0 0 -1 +$EndComp +$Comp +L capacitor C1 +U 1 1 62E06109 +P 4400 2950 +F 0 "C1" H 4425 3050 50 0000 L CNN +F 1 "5p" H 4425 2850 50 0000 L CNN +F 2 "" H 4438 2800 30 0000 C CNN +F 3 "" H 4400 2950 60 0000 C CNN + 1 4400 2950 + 0 1 1 0 +$EndComp +$Comp +L eSim_NPN Q24 +U 1 1 62E0610A +P 7200 2650 +F 0 "Q24" H 7100 2700 50 0000 R CNN +F 1 "eSim_NPN" H 7150 2800 50 0000 R CNN +F 2 "" H 7400 2750 29 0000 C CNN +F 3 "" H 7200 2650 60 0000 C CNN + 1 7200 2650 + -1 0 0 -1 +$EndComp +$Comp +L resistor R1 +U 1 1 62E0610B +P 7500 2100 +F 0 "R1" H 7550 2230 50 0000 C CNN +F 1 "40k" H 7550 2050 50 0000 C CNN +F 2 "" H 7550 2080 30 0000 C CNN +F 3 "" V 7550 2150 30 0000 C CNN + 1 7500 2100 + 0 1 1 0 +$EndComp +$Comp +L eSim_NPN Q23 +U 1 1 62E0610C +P 7000 1550 +F 0 "Q23" H 6900 1600 50 0000 R CNN +F 1 "eSim_NPN" H 6950 1700 50 0000 R CNN +F 2 "" H 7200 1650 29 0000 C CNN +F 3 "" H 7000 1550 60 0000 C CNN + 1 7000 1550 + 1 0 0 -1 +$EndComp +$Comp +L eSim_NPN Q25 +U 1 1 62E0610D +P 7800 1900 +F 0 "Q25" H 7700 1950 50 0000 R CNN +F 1 "eSim_NPN" H 7750 2050 50 0000 R CNN +F 2 "" H 8000 2000 29 0000 C CNN +F 3 "" H 7800 1900 60 0000 C CNN + 1 7800 1900 + 1 0 0 -1 +$EndComp +$Comp +L resistor R2 +U 1 1 62E0610E +P 7850 2850 +F 0 "R2" H 7900 2980 50 0000 C CNN +F 1 "25" H 7900 2800 50 0000 C CNN +F 2 "" H 7900 2830 30 0000 C CNN +F 3 "" V 7900 2900 30 0000 C CNN + 1 7850 2850 + 0 1 1 0 +$EndComp +$Comp +L eSim_PNP Q26 +U 1 1 62E0610F +P 7800 3850 +F 0 "Q26" H 7700 3900 50 0000 R CNN +F 1 "eSim_PNP" H 7750 4000 50 0000 R CNN +F 2 "" H 8000 3950 29 0000 C CNN +F 3 "" H 7800 3850 60 0000 C CNN + 1 7800 3850 + 1 0 0 1 +$EndComp +$Comp +L eSim_NPN Q27 +U 1 1 62E06110 +P 8050 5200 +F 0 "Q27" H 7950 5250 50 0000 R CNN +F 1 "eSim_NPN" H 8000 5350 50 0000 R CNN +F 2 "" H 8250 5300 29 0000 C CNN +F 3 "" H 8050 5200 60 0000 C CNN + 1 8050 5200 + 1 0 0 -1 +$EndComp +$Comp +L eSim_NPN Q28 +U 1 1 62E06111 +P 8650 3800 +F 0 "Q28" H 8550 3850 50 0000 R CNN +F 1 "eSim_NPN" H 8600 3950 50 0000 R CNN +F 2 "" H 8850 3900 29 0000 C CNN +F 3 "" H 8650 3800 60 0000 C CNN + 1 8650 3800 + -1 0 0 -1 +$EndComp +$Comp +L resistor R3 +U 1 1 62E06112 +P 8500 4500 +F 0 "R3" H 8550 4630 50 0000 C CNN +F 1 "2k" H 8550 4450 50 0000 C CNN +F 2 "" H 8550 4480 30 0000 C CNN +F 3 "" V 8550 4550 30 0000 C CNN + 1 8500 4500 + 0 1 1 0 +$EndComp +$Comp +L jfet_n J1 +U 1 1 62E06113 +P 9100 1400 +F 0 "J1" H 9000 1450 50 0000 R CNN +F 1 "jfet_n" H 9050 1550 50 0000 R CNN +F 2 "" H 9300 1500 29 0000 C CNN +F 3 "" H 9100 1400 60 0000 C CNN + 1 9100 1400 + -1 0 0 -1 +$EndComp +$Comp +L eSim_NPN Q31 +U 1 1 62E06114 +P 9550 2350 +F 0 "Q31" H 9450 2400 50 0000 R CNN +F 1 "eSim_NPN" H 9500 2500 50 0000 R CNN +F 2 "" H 9750 2450 29 0000 C CNN +F 3 "" H 9550 2350 60 0000 C CNN + 1 9550 2350 + 1 0 0 -1 +$EndComp +$Comp +L eSim_NPN Q29 +U 1 1 62E06115 +P 9100 2350 +F 0 "Q29" H 9000 2400 50 0000 R CNN +F 1 "eSim_NPN" H 9050 2500 50 0000 R CNN +F 2 "" H 9300 2450 29 0000 C CNN +F 3 "" H 9100 2350 60 0000 C CNN + 1 9100 2350 + -1 0 0 -1 +$EndComp +$Comp +L eSim_NPN Q30 +U 1 1 62E06116 +P 9100 4550 +F 0 "Q30" H 9000 4600 50 0000 R CNN +F 1 "eSim_NPN" H 9050 4700 50 0000 R CNN +F 2 "" H 9300 4650 29 0000 C CNN +F 3 "" H 9100 4550 60 0000 C CNN + 1 9100 4550 + -1 0 0 -1 +$EndComp +$Comp +L resistor R4 +U 1 1 62E06117 +P 9600 5350 +F 0 "R4" H 9650 5480 50 0000 C CNN +F 1 "2.4k" H 9650 5300 50 0000 C CNN +F 2 "" H 9650 5330 30 0000 C CNN +F 3 "" V 9650 5400 30 0000 C CNN + 1 9600 5350 + 0 1 1 0 +$EndComp +$Comp +L eSim_PNP Q7 +U 1 1 62E06118 +P 2600 1600 +F 0 "Q7" H 2500 1650 50 0000 R CNN +F 1 "eSim_PNP" H 2550 1750 50 0000 R CNN +F 2 "" H 2800 1700 29 0000 C CNN +F 3 "" H 2600 1600 60 0000 C CNN + 1 2600 1600 + 1 0 0 1 +$EndComp +$Comp +L eSim_PNP Q10 +U 1 1 62E06119 +P 3050 1650 +F 0 "Q10" H 2950 1700 50 0000 R CNN +F 1 "eSim_PNP" H 3000 1800 50 0000 R CNN +F 2 "" H 3250 1750 29 0000 C CNN +F 3 "" H 3050 1650 60 0000 C CNN + 1 3050 1650 + 1 0 0 1 +$EndComp +$Comp +L eSim_PNP Q16 +U 1 1 62E0611A +P 4550 1400 +F 0 "Q16" H 4450 1450 50 0000 R CNN +F 1 "eSim_PNP" H 4500 1550 50 0000 R CNN +F 2 "" H 4750 1500 29 0000 C CNN +F 3 "" H 4550 1400 60 0000 C CNN + 1 4550 1400 + 1 0 0 1 +$EndComp +Wire Wire Line + 1550 950 10050 950 +Wire Wire Line + 4050 1250 4050 950 +Connection ~ 4050 950 +Wire Wire Line + 6200 1200 6200 950 +Connection ~ 6200 950 +Wire Wire Line + 7100 1350 7100 950 +Connection ~ 7100 950 +Wire Wire Line + 7900 1700 7900 950 +Connection ~ 7900 950 +Wire Wire Line + 3750 1200 6300 1200 +Wire Wire Line + 7100 1750 7100 1900 +Wire Wire Line + 7100 1900 7600 1900 +Wire Wire Line + 2400 3750 3000 3750 +Wire Wire Line + 1550 1850 1550 4800 +Connection ~ 2700 3750 +Wire Wire Line + 2100 3950 2000 3950 +Wire Wire Line + 2000 3950 2000 4350 +Wire Wire Line + 1100 4550 1700 4550 +Wire Wire Line + 2000 4200 2400 4200 +Connection ~ 2000 4200 +Wire Wire Line + 2800 2950 2800 5000 +Wire Wire Line + 2800 2950 4250 2950 +Wire Wire Line + 3000 4200 3350 4200 +Wire Wire Line + 3300 3950 3350 3950 +Wire Wire Line + 3350 3950 3350 4450 +Wire Wire Line + 3000 4200 3000 4150 +Connection ~ 3350 4200 +Wire Wire Line + 2600 5500 2800 5500 +Wire Wire Line + 2400 4200 2400 4150 +Wire Wire Line + 2600 4500 2600 5500 +Connection ~ 2600 5500 +Wire Wire Line + 1850 5000 2600 5000 +Connection ~ 2600 5000 +Wire Wire Line + 2300 5300 2300 5000 +Connection ~ 2300 5000 +Wire Wire Line + 2000 4750 2000 6000 +Wire Wire Line + 1550 5200 1550 6000 +Wire Wire Line + 2300 6000 2300 5700 +Wire Wire Line + 3100 6000 3100 5700 +Wire Wire Line + 2800 5000 3700 5000 +Wire Wire Line + 3350 6000 3350 4850 +Wire Wire Line + 3100 5300 3100 5000 +Connection ~ 3100 5000 +Wire Wire Line + 3650 4650 3750 4650 +Wire Wire Line + 3750 4650 3750 3600 +Wire Wire Line + 3750 3600 1100 3600 +Wire Wire Line + 4000 2200 4000 4800 +Wire Wire Line + 4000 4700 4300 4700 +Wire Wire Line + 6700 2950 4550 2950 +Wire Wire Line + 4000 6000 4000 5200 +Wire Wire Line + 4600 4450 5300 4450 +Connection ~ 4000 4700 +Wire Wire Line + 4600 6000 4600 5650 +Wire Wire Line + 4600 4900 4600 5250 +Wire Wire Line + 5300 4450 5300 4500 +Wire Wire Line + 4600 4500 4600 4450 +Wire Wire Line + 5300 6000 5300 4900 +Wire Wire Line + 4750 1750 4750 4450 +Connection ~ 4750 4450 +Wire Wire Line + 4600 5000 5000 5000 +Wire Wire Line + 5000 5000 5000 4150 +Wire Wire Line + 5000 4150 6100 4150 +Connection ~ 4600 5000 +Wire Wire Line + 6000 4700 6000 5000 +Wire Wire Line + 5600 4700 6300 4700 +Wire Wire Line + 6000 6000 6000 5400 +Wire Wire Line + 6300 4700 6300 5200 +Connection ~ 6000 4700 +Wire Wire Line + 6300 5200 7850 5200 +Wire Wire Line + 6400 6000 6400 4350 +Wire Wire Line + 6400 3850 7600 3850 +Wire Wire Line + 6700 1550 6700 3850 +Connection ~ 6700 1550 +Wire Wire Line + 7100 2450 7100 2400 +Wire Wire Line + 7100 2400 6700 2400 +Wire Wire Line + 7100 2850 7100 3200 +Wire Wire Line + 7100 3200 10050 3200 +Wire Wire Line + 8150 3200 8150 5000 +Wire Wire Line + 7900 2100 7900 2750 +Wire Wire Line + 7900 2650 7400 2650 +Wire Wire Line + 7550 2000 7550 1900 +Connection ~ 7550 1900 +Wire Wire Line + 7550 2300 7550 2350 +Wire Wire Line + 7550 2350 7900 2350 +Connection ~ 7900 2350 +Connection ~ 7900 2650 +Wire Wire Line + 7900 3050 7900 3650 +Connection ~ 7900 3200 +Connection ~ 6700 3850 +Connection ~ 6700 2400 +Connection ~ 6700 2950 +Wire Wire Line + 6400 3850 6400 3950 +Wire Wire Line + 7900 6000 7900 4050 +Wire Wire Line + 8150 6000 8150 5400 +Connection ~ 8150 3200 +Wire Wire Line + 1550 6000 10100 6000 +Connection ~ 2000 6000 +Connection ~ 2300 6000 +Connection ~ 3100 6000 +Connection ~ 3350 6000 +Connection ~ 4000 6000 +Connection ~ 4600 6000 +Connection ~ 5300 6000 +Connection ~ 6000 6000 +Connection ~ 6400 6000 +Connection ~ 7900 6000 +Connection ~ 8150 6000 +Wire Wire Line + 8550 3450 8550 3600 +Wire Wire Line + 8550 4400 8550 4000 +Wire Wire Line + 8550 4700 8550 6000 +Connection ~ 8550 6000 +Wire Wire Line + 8850 3800 9000 3800 +Wire Wire Line + 9000 1200 9000 950 +Connection ~ 9000 950 +Wire Wire Line + 9000 1600 9000 2150 +Wire Wire Line + 9300 2350 9350 2350 +Wire Wire Line + 9650 2150 9650 950 +Connection ~ 9650 950 +Wire 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62E0611C +P 3000 4350 +F 0 "Q8" H 2900 4400 50 0000 R CNN +F 1 "eSim_PNP" H 2950 4500 50 0000 R CNN +F 2 "" H 3200 4450 29 0000 C CNN +F 3 "" H 3000 4350 60 0000 C CNN + 1 3000 4350 + -1 0 0 1 +$EndComp +Wire Wire Line + 3200 4350 3350 4350 +Connection ~ 3350 4350 +Wire Wire Line + 2900 4150 2900 3750 +Connection ~ 2900 3750 +Wire Wire Line + 2900 4550 2800 4550 +Connection ~ 2800 4550 +Connection ~ 5850 1200 +$Comp +L eSim_PNP Q22 +U 1 1 62E0611D +P 6500 1200 +F 0 "Q22" H 6400 1250 50 0000 R CNN +F 1 "eSim_PNP" H 6450 1350 50 0000 R CNN +F 2 "" H 6700 1300 29 0000 C CNN +F 3 "" H 6500 1200 60 0000 C CNN + 1 6500 1200 + 1 0 0 1 +$EndComp +Wire Wire Line + 1150 1350 1150 1650 +Wire Wire Line + 1150 1650 1250 1650 +Wire Wire Line + 5650 1600 5650 5450 +Connection ~ 5650 4700 +Wire Wire Line + 6200 1600 6200 3450 +$EndSCHEMATC diff --git a/library/SubcircuitLibrary/LM321/LM321.sch.svg b/library/SubcircuitLibrary/LM321/LM321.sch.svg new file mode 100644 index 00000000..57b9fbc2 --- /dev/null +++ b/library/SubcircuitLibrary/LM321/LM321.sch.svg @@ -0,0 +1,10007 @@ + + + +SVG Picture created as LM321.sch.svg date 2022/09/24 18:05:04 + Picture generated by Eeschema-SVG + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + 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+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/library/SubcircuitLibrary/LM321/LM321.sub b/library/SubcircuitLibrary/LM321/LM321.sub new file mode 100644 index 00000000..4a888591 --- /dev/null +++ b/library/SubcircuitLibrary/LM321/LM321.sub @@ -0,0 +1,46 @@ +* Subcircuit LM321 +.subckt LM321 net-_q12-pad2_ net-_q3-pad2_ net-_j1-pad1_ net-_q24-pad3_ net-_j1-pad2_ +* c:\fossee\esim\library\subcircuitlibrary\lm321\lm321.cir +.include PNP.lib +.include NPN.lib +.include NJF.lib +q1 net-_q1-pad1_ net-_q1-pad2_ net-_j1-pad1_ Q2N2907A +q14 net-_q14-pad1_ net-_q1-pad2_ net-_j1-pad1_ Q2N2907A +q19 net-_q1-pad2_ net-_q1-pad2_ net-_j1-pad1_ Q2N2907A +q4 net-_q3-pad3_ net-_q3-pad3_ net-_q11-pad3_ Q2N2907A +q11 net-_q11-pad1_ net-_q11-pad1_ net-_q11-pad3_ Q2N2907A +q3 net-_j1-pad2_ net-_q3-pad2_ net-_q3-pad3_ Q2N2907A +q12 net-_j1-pad2_ net-_q12-pad2_ net-_q11-pad1_ Q2N2907A +q2 net-_j1-pad2_ net-_q2-pad2_ net-_q1-pad1_ Q2N2907A +q9 net-_c1-pad2_ net-_q2-pad2_ net-_j1-pad2_ Q2N2222 +q5 net-_q2-pad2_ net-_q2-pad2_ net-_j1-pad2_ Q2N2222 +q13 net-_j1-pad2_ net-_c1-pad2_ net-_q10-pad1_ Q2N2907A +q15 net-_q14-pad1_ net-_q10-pad1_ net-_q15-pad3_ Q2N2222 +q17 net-_q15-pad3_ net-_q16-pad1_ net-_j1-pad2_ Q2N2222 +q18 net-_j1-pad2_ net-_q16-pad1_ net-_q14-pad1_ Q2N2907A +q20 net-_q16-pad1_ net-_q16-pad1_ net-_j1-pad2_ Q2N2222 +q21 net-_c1-pad1_ net-_q15-pad3_ net-_j1-pad2_ Q2N2222 +c1 net-_c1-pad1_ net-_c1-pad2_ 5p +q24 net-_c1-pad1_ net-_q24-pad2_ net-_q24-pad3_ Q2N2222 +r1 net-_q23-pad3_ net-_q24-pad2_ 40k +q23 net-_j1-pad1_ net-_c1-pad1_ net-_q23-pad3_ Q2N2222 +q25 net-_j1-pad1_ net-_q23-pad3_ net-_q24-pad2_ Q2N2222 +r2 net-_q24-pad2_ net-_q24-pad3_ 25 +q26 net-_j1-pad2_ net-_c1-pad1_ net-_q24-pad3_ Q2N2907A +q27 net-_q24-pad3_ net-_q16-pad1_ net-_j1-pad2_ Q2N2222 +q28 net-_q1-pad2_ net-_q28-pad2_ net-_q28-pad3_ Q2N2222 +r3 net-_q28-pad3_ net-_j1-pad2_ 2k +j1 net-_j1-pad1_ net-_j1-pad2_ net-_j1-pad3_ J2N3819 +q31 net-_j1-pad1_ net-_j1-pad3_ net-_q30-pad2_ Q2N2222 +q29 net-_j1-pad3_ net-_j1-pad3_ net-_q28-pad2_ Q2N2222 +q30 net-_q28-pad2_ net-_q30-pad2_ net-_j1-pad2_ Q2N2222 +r4 net-_q30-pad2_ net-_j1-pad2_ 2.4k +q7 net-_q11-pad3_ net-_q1-pad2_ net-_j1-pad1_ Q2N2907A +q10 net-_q10-pad1_ net-_q1-pad2_ net-_j1-pad1_ Q2N2907A +q16 net-_q16-pad1_ net-_q1-pad2_ net-_j1-pad1_ Q2N2907A +q6 net-_q2-pad2_ net-_q3-pad3_ net-_q11-pad3_ Q2N2907A +q8 net-_c1-pad2_ net-_q11-pad1_ net-_q11-pad3_ Q2N2907A +q22 net-_c1-pad1_ net-_q1-pad2_ net-_j1-pad1_ Q2N2907A +* Control Statements + +.ends LM321 \ No newline at end of file diff --git a/library/SubcircuitLibrary/LM321/LM321_Previous_Values.xml b/library/SubcircuitLibrary/LM321/LM321_Previous_Values.xml new file mode 100644 index 00000000..8b38814c --- /dev/null +++ b/library/SubcircuitLibrary/LM321/LM321_Previous_Values.xml @@ -0,0 +1 @@ +C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libC:\FOSSEE\eSim\library\deviceModelLibrary\JFET\NJF.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.libtruefalsefalseHzHz0Volts or AmperesVolts or AmperesVolts or AmperesVolts or AmperesVolts or AmperesVolts or AmperesSecSecSec \ No newline at end of file diff --git a/library/SubcircuitLibrary/LM321/NJF.lib b/library/SubcircuitLibrary/LM321/NJF.lib new file mode 100644 index 00000000..dbb2cbae --- /dev/null +++ b/library/SubcircuitLibrary/LM321/NJF.lib @@ -0,0 +1,4 @@ +.model J2N3819 NJF(Beta=1.304m Betatce=-.5 Rd=1 Rs=1 Lambda=2.25m Vto=-3 ++ Vtotc=-2.5m Is=33.57f Isr=322.4f N=1 Nr=2 Xti=3 Alpha=311.7u ++ Vk=243.6 Cgd=1.6p M=.3622 Pb=1 Fc=.5 Cgs=2.414p Kf=9.882E-18 ++ Af=1) diff --git a/library/SubcircuitLibrary/LM321/NPN.lib b/library/SubcircuitLibrary/LM321/NPN.lib new file mode 100644 index 00000000..be5f3073 --- /dev/null +++ b/library/SubcircuitLibrary/LM321/NPN.lib @@ -0,0 +1,4 @@ +.model Q2N2222 NPN( Is=14.34f Xti=3 Eg=1.11 Vaf=74.03 Bf=400 Ne=1.307 ++ Ise=14.34f Ikf=0.2847 Xtb=1.5 Br=6.092 Nc=2 Isc=0 Ikr=0 Rc=1 Cjc=7.306p ++ Mjc=0.3416 Vjc=0.75 Fc=0.5 Cje=22.01p Mje=0.377 Vje=0.75 Tr=46.91n Tf=411.1p ++ Itf=0.6 Vtf=1.7 Xtf=3 Rb=10) diff --git a/library/SubcircuitLibrary/LM321/PNP.lib b/library/SubcircuitLibrary/LM321/PNP.lib new file mode 100644 index 00000000..7edda0ea --- /dev/null +++ b/library/SubcircuitLibrary/LM321/PNP.lib @@ -0,0 +1,4 @@ +.model Q2N2907A PNP(Is=650.6E-18 Xti=3 Eg=1.11 Vaf=115.7 Bf=231.7 Ne=1.829 ++ Ise=54.81f Ikf=1.079 Xtb=1.5 Br=3.563 Nc=2 Isc=0 Ikr=0 Rc=.715 ++ Cjc=14.76p Mjc=.5383 Vjc=.75 Fc=.5 Cje=19.82p Mje=.3357 Vje=.75 ++ Tr=111.3n Tf=603.7p Itf=.65 Vtf=5 Xtf=1.7 Rb=10) diff --git a/library/SubcircuitLibrary/LM321/README.md b/library/SubcircuitLibrary/LM321/README.md new file mode 100644 index 00000000..ad011f2a --- /dev/null +++ b/library/SubcircuitLibrary/LM321/README.md @@ -0,0 +1,35 @@ + +# LM321 Operational Amplifier IC + +LM321 is a 5 pin Op-Amp IC. It has differential input, is internally compensated. Supply voltage ranges from 3V to 32V. Output is short circuit protected. Its output stage is class B, comprising of push-pull transistors. Hence output contains crossover distortion near mid-rail where neither push or pull transistor is conducting. + + +## Usage/Examples + +Inverting/Non-Inverting Amplifier + +Integrator/Summer + +Differential Amplifier + +Differentiator + +Schmitt Trigger + +Comparators + + +## Documentation + +To know the details of LM321 IC please refer to this link [LM321_datasheet.](https://www.onsemi.com/pdf/datasheet/lm321-d.pdf) + +## Comments/Notes + +Please note this is a complete analog IC. It works fine at the time of simulation. + +## Contributor + +Name: Arpit Sharma +Email: arpitniraliya306@gmail.com +Year: 2022 +Position: FOSSEE Summer Fellowship Intern 2022 diff --git a/library/SubcircuitLibrary/LM321/analysis b/library/SubcircuitLibrary/LM321/analysis new file mode 100644 index 00000000..ebd5c0a9 --- /dev/null +++ b/library/SubcircuitLibrary/LM321/analysis @@ -0,0 +1 @@ +.tran 0e-00 0e-00 0e-00 \ No newline at end of file -- cgit From a939d001f0acea4b750eb7e9aae4e15c3fce46bd Mon Sep 17 00:00:00 2001 From: Arpit Sharma Date: Fri, 21 Oct 2022 23:09:22 +0530 Subject: LM393 Analog Comparator IC --- library/SubcircuitLibrary/LM393/D.lib | 2 + library/SubcircuitLibrary/LM393/LM393-cache.lib | 146 +++ library/SubcircuitLibrary/LM393/LM393.cir | 61 ++ library/SubcircuitLibrary/LM393/LM393.cir.out | 66 ++ library/SubcircuitLibrary/LM393/LM393.pro | 81 ++ library/SubcircuitLibrary/LM393/LM393.sch | 1033 ++++++++++++++++++++ library/SubcircuitLibrary/LM393/LM393.sub | 60 ++ .../LM393/LM393_Previous_Values.xml | 1 + library/SubcircuitLibrary/LM393/NJF.lib | 4 + library/SubcircuitLibrary/LM393/NPN.lib | 4 + library/SubcircuitLibrary/LM393/PNP.lib | 4 + library/SubcircuitLibrary/LM393/README.md | 35 + library/SubcircuitLibrary/LM393/analysis | 1 + 13 files changed, 1498 insertions(+) create mode 100644 library/SubcircuitLibrary/LM393/D.lib create mode 100644 library/SubcircuitLibrary/LM393/LM393-cache.lib create mode 100644 library/SubcircuitLibrary/LM393/LM393.cir create mode 100644 library/SubcircuitLibrary/LM393/LM393.cir.out create mode 100644 library/SubcircuitLibrary/LM393/LM393.pro create mode 100644 library/SubcircuitLibrary/LM393/LM393.sch create mode 100644 library/SubcircuitLibrary/LM393/LM393.sub create mode 100644 library/SubcircuitLibrary/LM393/LM393_Previous_Values.xml create mode 100644 library/SubcircuitLibrary/LM393/NJF.lib create mode 100644 library/SubcircuitLibrary/LM393/NPN.lib create mode 100644 library/SubcircuitLibrary/LM393/PNP.lib create mode 100644 library/SubcircuitLibrary/LM393/README.md create mode 100644 library/SubcircuitLibrary/LM393/analysis diff --git a/library/SubcircuitLibrary/LM393/D.lib b/library/SubcircuitLibrary/LM393/D.lib new file mode 100644 index 00000000..f53bf3e0 --- /dev/null +++ b/library/SubcircuitLibrary/LM393/D.lib @@ -0,0 +1,2 @@ +.model 1N4148 D(is=2.495E-09 rs=4.755E-01 n=1.679E+00 tt=3.030E-09 cjo=1.700E-12 vj=1 m=1.959E-01 bv=1.000E+02 ibv=1.000E-04) + diff --git a/library/SubcircuitLibrary/LM393/LM393-cache.lib b/library/SubcircuitLibrary/LM393/LM393-cache.lib new file mode 100644 index 00000000..8ff65b6b --- /dev/null +++ b/library/SubcircuitLibrary/LM393/LM393-cache.lib @@ -0,0 +1,146 @@ +EESchema-LIBRARY Version 2.3 +#encoding utf-8 +# +# PORT +# +DEF PORT U 0 40 Y Y 26 F N +F0 "U" 50 100 30 H V C CNN +F1 "PORT" 0 0 30 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0 +A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50 +S -100 50 100 -50 0 1 0 N +X ~ 1 250 0 100 L 30 30 1 1 B +X ~ 2 250 0 100 L 30 30 2 1 B +X ~ 3 250 0 100 L 30 30 3 1 B +X ~ 4 250 0 100 L 30 30 4 1 B +X ~ 5 250 0 100 L 30 30 5 1 B +X ~ 6 250 0 100 L 30 30 6 1 B +X ~ 7 250 0 100 L 30 30 7 1 B +X ~ 8 250 0 100 L 30 30 8 1 B +X ~ 9 250 0 100 L 30 30 9 1 B +X ~ 10 250 0 100 L 30 30 10 1 B +X ~ 11 250 0 100 L 30 30 11 1 B +X ~ 12 250 0 100 L 30 30 12 1 B +X ~ 13 250 0 100 L 30 30 13 1 B +X ~ 14 250 0 100 L 30 30 14 1 B +X ~ 15 250 0 100 L 30 30 15 1 B +X ~ 16 250 0 100 L 30 30 16 1 B +X ~ 17 250 0 100 L 30 30 17 1 B +X ~ 18 250 0 100 L 30 30 18 1 B +X ~ 19 250 0 100 L 30 30 19 1 B +X ~ 20 250 0 100 L 30 30 20 1 B +X ~ 21 250 0 100 L 30 30 21 1 B +X ~ 22 250 0 100 L 30 30 22 1 B +X ~ 23 250 0 100 L 30 30 23 1 B +X ~ 24 250 0 100 L 30 30 24 1 B +X ~ 25 250 0 100 L 30 30 25 1 B +X ~ 26 250 0 100 L 30 30 26 1 B +ENDDRAW +ENDDEF +# +# eSim_Diode +# +DEF eSim_Diode D 0 40 N N 1 F N +F0 "D" 0 100 50 H V C CNN +F1 "eSim_Diode" 0 -100 50 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +$FPLIST + TO-???* + *SingleDiode + *_Diode_* + *SingleDiode* + D_* +$ENDFPLIST +DRAW +T 0 -100 50 60 0 0 0 A Normal 0 C C +T 0 100 50 60 0 0 0 K Normal 0 C C +P 2 0 1 6 50 50 50 -50 N +P 3 0 1 0 -50 50 50 0 -50 -50 F +X A 1 -150 0 100 R 40 40 1 1 P +X K 2 150 0 100 L 40 40 1 1 P +ENDDRAW +ENDDEF +# +# eSim_NJF +# +DEF eSim_NJF J 0 0 Y N 1 F N +F0 "J" -100 50 50 H V R CNN +F1 "eSim_NJF" -50 150 50 H V R CNN +F2 "" 200 100 29 H V C CNN +F3 "" 0 0 60 H V C CNN +ALIAS jfet_n +DRAW +C 50 0 111 0 1 10 N +P 3 0 1 10 10 75 10 -75 10 -75 N +P 3 0 1 0 100 -100 100 -50 10 -50 N +P 3 0 1 0 100 100 100 55 10 55 N +P 4 0 1 0 0 0 -40 15 -40 -15 0 0 F +X D 1 100 200 100 D 50 50 1 1 P +X G 2 -200 0 210 R 50 50 1 1 P +X S 3 100 -200 100 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# eSim_NPN +# +DEF eSim_NPN Q 0 0 Y N 1 F N +F0 "Q" -100 50 50 H V R CNN +F1 "eSim_NPN" -50 150 50 H V R CNN +F2 "" 200 100 29 H V C CNN +F3 "" 0 0 60 H V C CNN +ALIAS BC547 Q2N2222 +DRAW +C 50 0 111 0 1 10 N +P 2 0 1 0 25 25 100 100 N +P 3 0 1 0 25 -25 100 -100 100 -100 N +P 3 0 1 20 25 75 25 -75 25 -75 N +P 5 0 1 0 50 -70 70 -50 90 -90 50 -70 50 -70 F +X C 1 100 200 100 D 50 50 1 1 P +X B 2 -200 0 225 R 50 50 1 1 P +X E 3 100 -200 100 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# eSim_PNP +# +DEF eSim_PNP Q 0 0 Y N 1 F N +F0 "Q" -100 50 50 H V R CNN +F1 "eSim_PNP" -50 150 50 H V R CNN +F2 "" 200 100 29 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +C 50 0 111 0 1 10 N +P 2 0 1 0 25 25 100 100 N +P 3 0 1 0 25 -25 100 -100 100 -100 N +P 3 0 1 20 25 75 25 -75 25 -75 N +P 5 0 1 0 90 -70 70 -90 50 -50 90 -70 90 -70 F +X C 1 100 200 100 D 50 50 1 1 P +X B 2 -200 0 225 R 50 50 1 1 P +X E 3 100 -200 100 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# eSim_R +# +DEF eSim_R R 0 0 N Y 1 F N +F0 "R" 50 130 50 H V C CNN +F1 "eSim_R" 50 -50 50 H V C CNN +F2 "" 50 -20 30 H V C CNN +F3 "" 50 50 30 V V C CNN +ALIAS resistor +$FPLIST + R_* + Resistor_* +$ENDFPLIST +DRAW +S 150 10 -50 90 0 1 10 N +X ~ 1 -100 50 50 R 60 60 1 1 P +X ~ 2 200 50 50 L 60 60 1 1 P +ENDDRAW +ENDDEF +# +#End Library diff --git a/library/SubcircuitLibrary/LM393/LM393.cir b/library/SubcircuitLibrary/LM393/LM393.cir new file mode 100644 index 00000000..4d9c6b46 --- /dev/null +++ b/library/SubcircuitLibrary/LM393/LM393.cir @@ -0,0 +1,61 @@ +* C:\FOSSEE\eSim\library\SubcircuitLibrary\LM393\LM393.cir + +* EESchema Netlist Version 1.1 (Spice format) creation date: 08/29/22 20:35:27 + +* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N +* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +* Sheet Name: / +Q1 Net-_Q1-Pad1_ Net-_Q1-Pad2_ Net-_J1-Pad1_ eSim_PNP +R2 Net-_Q1-Pad2_ Net-_Q1-Pad1_ 2k +Q4 Net-_J1-Pad3_ Net-_Q1-Pad1_ Net-_J1-Pad1_ eSim_PNP +Q5 Net-_Q2-Pad3_ Net-_Q1-Pad1_ Net-_J1-Pad1_ eSim_PNP +Q8 Net-_D4-Pad1_ Net-_Q1-Pad1_ Net-_Q7-Pad3_ eSim_PNP +Q10 Net-_Q10-Pad1_ Net-_Q1-Pad1_ Net-_J1-Pad1_ eSim_PNP +Q14 Net-_Q14-Pad1_ Net-_Q1-Pad1_ Net-_J1-Pad1_ eSim_PNP +Q2 Net-_Q1-Pad1_ Net-_J1-Pad3_ Net-_Q2-Pad3_ eSim_NPN +R1 Net-_Q2-Pad3_ Net-_D3-Pad2_ 4.6k +J1 Net-_J1-Pad1_ Net-_D3-Pad2_ Net-_J1-Pad3_ jfet_n +Q3 Net-_J1-Pad3_ Net-_Q2-Pad3_ Net-_D3-Pad2_ eSim_NPN +D2 Net-_D2-Pad1_ Net-_D1-Pad2_ eSim_Diode +D1 Net-_D1-Pad1_ Net-_D1-Pad2_ eSim_Diode +Q6 Net-_D3-Pad2_ Net-_D1-Pad1_ Net-_D1-Pad2_ eSim_PNP +Q9 Net-_D3-Pad1_ Net-_D1-Pad2_ Net-_Q10-Pad1_ eSim_PNP +Q12 Net-_Q11-Pad1_ Net-_D4-Pad2_ Net-_Q10-Pad1_ eSim_PNP +D3 Net-_D3-Pad1_ Net-_D3-Pad2_ eSim_Diode +Q11 Net-_Q11-Pad1_ Net-_D3-Pad1_ Net-_D3-Pad2_ eSim_NPN +D4 Net-_D4-Pad1_ Net-_D4-Pad2_ eSim_Diode +Q13 Net-_D3-Pad2_ Net-_D5-Pad1_ Net-_D4-Pad2_ eSim_PNP +D5 Net-_D5-Pad1_ Net-_D4-Pad2_ eSim_Diode +Q15 Net-_Q14-Pad1_ Net-_Q11-Pad1_ Net-_D3-Pad2_ eSim_NPN +Q16 Net-_Q16-Pad1_ Net-_Q14-Pad1_ Net-_D3-Pad2_ eSim_NPN +R3 Net-_J1-Pad1_ Net-_Q7-Pad3_ 2.1k +U1 Net-_J1-Pad1_ Net-_D1-Pad1_ Net-_D5-Pad1_ Net-_Q16-Pad1_ Net-_D3-Pad2_ Net-_D6-Pad1_ Net-_D10-Pad1_ Net-_Q32-Pad1_ PORT +Q7 Net-_D2-Pad1_ Net-_Q1-Pad1_ Net-_Q7-Pad3_ eSim_PNP +Q17 Net-_Q17-Pad1_ Net-_Q17-Pad2_ Net-_J1-Pad1_ eSim_PNP +R5 Net-_Q17-Pad2_ Net-_Q17-Pad1_ 2k +Q20 Net-_J2-Pad3_ Net-_Q17-Pad1_ Net-_J1-Pad1_ eSim_PNP +Q21 Net-_Q18-Pad3_ Net-_Q17-Pad1_ Net-_J1-Pad1_ eSim_PNP +Q24 Net-_D9-Pad1_ Net-_Q17-Pad1_ Net-_Q23-Pad3_ eSim_PNP +Q26 Net-_Q25-Pad3_ Net-_Q17-Pad1_ Net-_J1-Pad1_ eSim_PNP +Q30 Net-_Q30-Pad1_ Net-_Q17-Pad1_ Net-_J1-Pad1_ eSim_PNP +Q18 Net-_Q17-Pad1_ Net-_J2-Pad3_ Net-_Q18-Pad3_ eSim_NPN +R4 Net-_Q18-Pad3_ Net-_D3-Pad2_ 4.6k +J2 Net-_J1-Pad1_ Net-_D3-Pad2_ Net-_J2-Pad3_ jfet_n +Q19 Net-_J2-Pad3_ Net-_Q18-Pad3_ Net-_D3-Pad2_ eSim_NPN +D7 Net-_D7-Pad1_ Net-_D6-Pad2_ eSim_Diode +D6 Net-_D6-Pad1_ Net-_D6-Pad2_ eSim_Diode +Q22 Net-_D3-Pad2_ Net-_D6-Pad1_ Net-_D6-Pad2_ eSim_PNP +Q25 Net-_D8-Pad1_ Net-_D6-Pad2_ Net-_Q25-Pad3_ eSim_PNP +Q28 Net-_Q27-Pad1_ Net-_D10-Pad2_ Net-_Q25-Pad3_ eSim_PNP +D8 Net-_D8-Pad1_ Net-_D3-Pad2_ eSim_Diode +Q27 Net-_Q27-Pad1_ Net-_D8-Pad1_ Net-_D3-Pad2_ eSim_NPN +D9 Net-_D9-Pad1_ Net-_D10-Pad2_ eSim_Diode +Q29 Net-_D3-Pad2_ Net-_D10-Pad1_ Net-_D10-Pad2_ eSim_PNP +D10 Net-_D10-Pad1_ Net-_D10-Pad2_ eSim_Diode +Q31 Net-_Q30-Pad1_ Net-_Q27-Pad1_ Net-_D3-Pad2_ eSim_NPN +Q32 Net-_Q32-Pad1_ Net-_Q30-Pad1_ Net-_D3-Pad2_ eSim_NPN +R6 Net-_J1-Pad1_ Net-_Q23-Pad3_ 2.1k +Q23 Net-_D7-Pad1_ Net-_Q17-Pad1_ Net-_Q23-Pad3_ eSim_PNP + +.end diff --git a/library/SubcircuitLibrary/LM393/LM393.cir.out b/library/SubcircuitLibrary/LM393/LM393.cir.out new file mode 100644 index 00000000..57a7fed1 --- /dev/null +++ b/library/SubcircuitLibrary/LM393/LM393.cir.out @@ -0,0 +1,66 @@ +* c:\fossee\esim\library\subcircuitlibrary\lm393\lm393.cir + +.include PNP.lib +.include NPN.lib +.include NJF.lib +.include D.lib +q1 net-_q1-pad1_ net-_q1-pad2_ net-_j1-pad1_ Q2N2907A +r2 net-_q1-pad2_ net-_q1-pad1_ 2k +q4 net-_j1-pad3_ net-_q1-pad1_ net-_j1-pad1_ Q2N2907A +q5 net-_q2-pad3_ net-_q1-pad1_ net-_j1-pad1_ Q2N2907A +q8 net-_d4-pad1_ net-_q1-pad1_ net-_q7-pad3_ Q2N2907A +q10 net-_q10-pad1_ net-_q1-pad1_ net-_j1-pad1_ Q2N2907A +q14 net-_q14-pad1_ net-_q1-pad1_ net-_j1-pad1_ Q2N2907A +q2 net-_q1-pad1_ net-_j1-pad3_ net-_q2-pad3_ Q2N2222 +r1 net-_q2-pad3_ net-_d3-pad2_ 4.6k +j1 net-_j1-pad1_ net-_d3-pad2_ net-_j1-pad3_ J2N3819 +q3 net-_j1-pad3_ net-_q2-pad3_ net-_d3-pad2_ Q2N2222 +d2 net-_d2-pad1_ net-_d1-pad2_ 1N4148 +d1 net-_d1-pad1_ net-_d1-pad2_ 1N4148 +q6 net-_d3-pad2_ net-_d1-pad1_ net-_d1-pad2_ Q2N2907A +q9 net-_d3-pad1_ net-_d1-pad2_ net-_q10-pad1_ Q2N2907A +q12 net-_q11-pad1_ net-_d4-pad2_ net-_q10-pad1_ Q2N2907A +d3 net-_d3-pad1_ net-_d3-pad2_ 1N4148 +q11 net-_q11-pad1_ net-_d3-pad1_ net-_d3-pad2_ Q2N2222 +d4 net-_d4-pad1_ net-_d4-pad2_ 1N4148 +q13 net-_d3-pad2_ net-_d5-pad1_ net-_d4-pad2_ Q2N2907A +d5 net-_d5-pad1_ net-_d4-pad2_ 1N4148 +q15 net-_q14-pad1_ net-_q11-pad1_ net-_d3-pad2_ Q2N2222 +q16 net-_q16-pad1_ net-_q14-pad1_ net-_d3-pad2_ Q2N2222 +r3 net-_j1-pad1_ net-_q7-pad3_ 2.1k +* u1 net-_j1-pad1_ net-_d1-pad1_ net-_d5-pad1_ net-_q16-pad1_ net-_d3-pad2_ net-_d6-pad1_ net-_d10-pad1_ net-_q32-pad1_ port +q7 net-_d2-pad1_ net-_q1-pad1_ net-_q7-pad3_ Q2N2907A +q17 net-_q17-pad1_ net-_q17-pad2_ net-_j1-pad1_ Q2N2907A +r5 net-_q17-pad2_ net-_q17-pad1_ 2k +q20 net-_j2-pad3_ net-_q17-pad1_ net-_j1-pad1_ Q2N2907A +q21 net-_q18-pad3_ net-_q17-pad1_ net-_j1-pad1_ Q2N2907A +q24 net-_d9-pad1_ net-_q17-pad1_ net-_q23-pad3_ Q2N2907A +q26 net-_q25-pad3_ net-_q17-pad1_ net-_j1-pad1_ Q2N2907A +q30 net-_q30-pad1_ net-_q17-pad1_ net-_j1-pad1_ Q2N2907A +q18 net-_q17-pad1_ net-_j2-pad3_ net-_q18-pad3_ Q2N2222 +r4 net-_q18-pad3_ net-_d3-pad2_ 4.6k +j2 net-_j1-pad1_ net-_d3-pad2_ net-_j2-pad3_ J2N3819 +q19 net-_j2-pad3_ net-_q18-pad3_ net-_d3-pad2_ Q2N2222 +d7 net-_d7-pad1_ net-_d6-pad2_ 1N4148 +d6 net-_d6-pad1_ net-_d6-pad2_ 1N4148 +q22 net-_d3-pad2_ net-_d6-pad1_ net-_d6-pad2_ Q2N2907A +q25 net-_d8-pad1_ net-_d6-pad2_ net-_q25-pad3_ Q2N2907A +q28 net-_q27-pad1_ net-_d10-pad2_ net-_q25-pad3_ Q2N2907A +d8 net-_d8-pad1_ net-_d3-pad2_ 1N4148 +q27 net-_q27-pad1_ net-_d8-pad1_ net-_d3-pad2_ Q2N2222 +d9 net-_d9-pad1_ net-_d10-pad2_ 1N4148 +q29 net-_d3-pad2_ net-_d10-pad1_ net-_d10-pad2_ Q2N2907A +d10 net-_d10-pad1_ net-_d10-pad2_ 1N4148 +q31 net-_q30-pad1_ net-_q27-pad1_ net-_d3-pad2_ Q2N2222 +q32 net-_q32-pad1_ net-_q30-pad1_ net-_d3-pad2_ Q2N2222 +r6 net-_j1-pad1_ net-_q23-pad3_ 2.1k +q23 net-_d7-pad1_ net-_q17-pad1_ net-_q23-pad3_ Q2N2907A +.tran 0e-00 0e-00 0e-00 + +* Control Statements +.control +run +print allv > plot_data_v.txt +print alli > plot_data_i.txt +.endc +.end diff --git a/library/SubcircuitLibrary/LM393/LM393.pro b/library/SubcircuitLibrary/LM393/LM393.pro new file mode 100644 index 00000000..fd0582ba --- /dev/null +++ b/library/SubcircuitLibrary/LM393/LM393.pro @@ -0,0 +1,81 @@ +update=09/24/22 18:31:43 +version=1 +last_client=eeschema +[general] +version=1 +RootSch= +BoardNm= +[pcbnew] +version=1 +LastNetListRead= +UseCmpFile=1 +PadDrill=0.600000000000 +PadDrillOvalY=0.600000000000 +PadSizeH=1.500000000000 +PadSizeV=1.500000000000 +PcbTextSizeV=1.500000000000 +PcbTextSizeH=1.500000000000 +PcbTextThickness=0.300000000000 +ModuleTextSizeV=1.000000000000 +ModuleTextSizeH=1.000000000000 +ModuleTextSizeThickness=0.150000000000 +SolderMaskClearance=0.000000000000 +SolderMaskMinWidth=0.000000000000 +DrawSegmentWidth=0.200000000000 +BoardOutlineThickness=0.100000000000 +ModuleOutlineThickness=0.150000000000 +[cvpcb] +version=1 +NetIExt=net +[eeschema] +version=1 +LibDir= +[eeschema/libraries] +LibName1=adc-dac +LibName2=memory +LibName3=xilinx +LibName4=microcontrollers +LibName5=dsp +LibName6=microchip +LibName7=analog_switches +LibName8=motorola +LibName9=texas +LibName10=intel +LibName11=audio +LibName12=interface +LibName13=digital-audio +LibName14=philips +LibName15=display +LibName16=cypress +LibName17=siliconi +LibName18=opto +LibName19=atmel +LibName20=contrib +LibName21=power +LibName22=eSim_Plot +LibName23=transistors +LibName24=conn +LibName25=eSim_User +LibName26=regul +LibName27=74xx +LibName28=cmos4000 +LibName29=eSim_Analog +LibName30=eSim_Devices +LibName31=eSim_Digital +LibName32=eSim_Hybrid +LibName33=eSim_Miscellaneous +LibName34=eSim_Power +LibName35=eSim_Sources +LibName36=eSim_Subckt +LibName37=eSim_Nghdl +LibName38=eSim_Ngveri +[schematic_editor] +version=1 +PageLayoutDescrFile= +PlotDirectoryName= +SubpartIdSeparator=0 +SubpartFirstId=65 +NetFmtName= +SpiceForceRefPrefix=0 +SpiceUseNetNumbers=0 +LabSize=60 diff --git a/library/SubcircuitLibrary/LM393/LM393.sch b/library/SubcircuitLibrary/LM393/LM393.sch new file mode 100644 index 00000000..5fe92798 --- /dev/null +++ b/library/SubcircuitLibrary/LM393/LM393.sch @@ -0,0 +1,1033 @@ +EESchema Schematic File Version 2 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:power +LIBS:eSim_Plot +LIBS:transistors +LIBS:conn +LIBS:eSim_User +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:eSim_Analog +LIBS:eSim_Devices +LIBS:eSim_Digital +LIBS:eSim_Hybrid +LIBS:eSim_Miscellaneous +LIBS:eSim_Power +LIBS:eSim_Sources +LIBS:eSim_Subckt +LIBS:eSim_Nghdl +LIBS:eSim_Ngveri +LIBS:LM393-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11693 8268 +encoding utf-8 +Sheet 1 1 +Title "" +Date "" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Wire Wire Line + 450 5800 11150 5800 +Wire Wire Line + 6000 5800 6000 6300 +$Comp +L PORT U1 +U 5 1 62EFFD91 +P 5750 6300 +F 0 "U1" H 5800 6400 30 0000 C CNN +F 1 "PORT" H 5750 6300 30 0000 C CNN +F 2 "" H 5750 6300 60 0000 C CNN +F 3 "" H 5750 6300 60 0000 C CNN + 5 5750 6300 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 1 1 62EFFD92 +P 350 1900 +F 0 "U1" H 400 2000 30 0000 C CNN +F 1 "PORT" H 350 1900 30 0000 C CNN +F 2 "" H 350 1900 60 0000 C CNN +F 3 "" H 350 1900 60 0000 C CNN + 1 350 1900 + 0 -1 -1 0 +$EndComp +$Comp +L eSim_PNP Q17 +U 1 1 630DA5A7 +P 6450 2000 +F 0 "Q17" H 6350 2050 50 0000 R CNN +F 1 "eSim_PNP" H 6400 2150 50 0000 R CNN +F 2 "" H 6650 2100 29 0000 C CNN +F 3 "" H 6450 2000 60 0000 C CNN + 1 6450 2000 + -1 0 0 1 +$EndComp +$Comp +L resistor R5 +U 1 1 630DA5AD +P 6750 2050 +F 0 "R5" H 6800 2180 50 0000 C CNN +F 1 "2k" H 6800 2000 50 0000 C CNN +F 2 "" H 6800 2030 30 0000 C CNN +F 3 "" V 6800 2100 30 0000 C CNN + 1 6750 2050 + 1 0 0 -1 +$EndComp +$Comp +L eSim_PNP Q20 +U 1 1 630DA5B3 +P 7100 2550 +F 0 "Q20" H 7000 2600 50 0000 R CNN +F 1 "eSim_PNP" H 7050 2700 50 0000 R CNN +F 2 "" H 7300 2650 29 0000 C CNN +F 3 "" H 7100 2550 60 0000 C CNN + 1 7100 2550 + -1 0 0 1 +$EndComp +$Comp +L eSim_PNP Q21 +U 1 1 630DA5B9 +P 7600 2550 +F 0 "Q21" H 7500 2600 50 0000 R CNN +F 1 "eSim_PNP" H 7900 2800 50 0000 R CNN +F 2 "" H 7800 2650 29 0000 C CNN +F 3 "" H 7600 2550 60 0000 C CNN + 1 7600 2550 + 1 0 0 1 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H 2250 1500 30 0000 C CNN +F 1 "PORT" H 2200 1400 30 0000 C CNN +F 2 "" H 2200 1400 60 0000 C CNN +F 3 "" H 2200 1400 60 0000 C CNN + 1 2200 1400 + 1 0 0 -1 +$EndComp +$Comp +L PORT U? +U 1 1 632F6D13 +P 4850 1400 +F 0 "U?" H 4900 1500 30 0000 C CNN +F 1 "PORT" H 4850 1400 30 0000 C CNN +F 2 "" H 4850 1400 60 0000 C CNN +F 3 "" H 4850 1400 60 0000 C CNN + 1 4850 1400 + 1 0 0 -1 +$EndComp +$Comp +L PORT U? +U 1 1 632F6D19 +P 5750 1250 +F 0 "U?" H 5800 1350 30 0000 C CNN +F 1 "PORT" H 5750 1250 30 0000 C CNN +F 2 "" H 5750 1250 60 0000 C CNN +F 3 "" H 5750 1250 60 0000 C CNN + 1 5750 1250 + 0 1 1 0 +$EndComp +Wire Wire Line + 1600 2350 1600 1900 +Wire Wire Line + 1600 1900 2300 1900 +Wire Wire Line + 2300 1900 2300 2350 +Wire Wire Line + 2000 1900 2000 1650 +Connection ~ 2000 1650 +Connection ~ 2000 1900 +Wire Wire Line + 1900 2550 2000 2550 +Wire Wire Line + 1550 2150 1950 2150 +Wire Wire Line + 1950 2150 1950 2550 +Connection ~ 1950 2550 +Connection ~ 1550 2150 +$Comp +L eSim_PNP Q? +U 1 1 632F6D2D +P 3000 2550 +F 0 "Q?" H 2900 2600 50 0000 R CNN +F 1 "eSim_PNP" H 3300 2800 50 0000 R CNN +F 2 "" H 3200 2650 29 0000 C CNN +F 3 "" H 3000 2550 60 0000 C CNN + 1 3000 2550 + -1 0 0 1 +$EndComp +Wire Wire Line + 3200 2550 3300 2550 +Wire Wire Line + 1950 2300 5050 2300 +Wire Wire Line + 3250 2300 3250 2550 +Connection ~ 3250 2550 +Connection ~ 1950 2300 +Wire Wire Line + 3300 1800 3300 1650 +Connection ~ 3300 1650 +Wire Wire Line + 2900 2350 2900 2200 +Wire Wire Line + 2900 2200 3600 2200 +Wire Wire Line + 3600 2200 3600 2350 +Wire Wire Line + 3300 2200 3300 2100 +Connection ~ 3300 2200 +Wire Wire Line + 4500 2900 3600 2900 +Wire Wire Line + 3600 2900 3600 2750 +Wire Wire Line + 3700 2300 3700 2550 +Connection ~ 3250 2300 +Connection ~ 3700 2300 +Connection ~ 5350 1650 +Connection ~ 5750 5800 +Connection ~ 6000 5800 +$EndSCHEMATC diff --git a/library/SubcircuitLibrary/LM393/LM393.sub b/library/SubcircuitLibrary/LM393/LM393.sub new file mode 100644 index 00000000..b854038f --- /dev/null +++ b/library/SubcircuitLibrary/LM393/LM393.sub @@ -0,0 +1,60 @@ +* Subcircuit LM393 +.subckt LM393 net-_j1-pad1_ net-_d1-pad1_ net-_d5-pad1_ net-_q16-pad1_ net-_d3-pad2_ net-_d6-pad1_ net-_d10-pad1_ net-_q32-pad1_ +* c:\fossee\esim\library\subcircuitlibrary\lm393\lm393.cir +.include PNP.lib +.include NPN.lib +.include NJF.lib +.include D.lib +q1 net-_q1-pad1_ net-_q1-pad2_ net-_j1-pad1_ Q2N2907A +r2 net-_q1-pad2_ net-_q1-pad1_ 2k +q4 net-_j1-pad3_ net-_q1-pad1_ net-_j1-pad1_ Q2N2907A +q5 net-_q2-pad3_ net-_q1-pad1_ net-_j1-pad1_ Q2N2907A +q8 net-_d4-pad1_ net-_q1-pad1_ net-_q7-pad3_ Q2N2907A +q10 net-_q10-pad1_ net-_q1-pad1_ net-_j1-pad1_ Q2N2907A +q14 net-_q14-pad1_ net-_q1-pad1_ net-_j1-pad1_ Q2N2907A +q2 net-_q1-pad1_ net-_j1-pad3_ net-_q2-pad3_ Q2N2222 +r1 net-_q2-pad3_ net-_d3-pad2_ 4.6k +j1 net-_j1-pad1_ net-_d3-pad2_ net-_j1-pad3_ J2N3819 +q3 net-_j1-pad3_ net-_q2-pad3_ net-_d3-pad2_ Q2N2222 +d2 net-_d2-pad1_ net-_d1-pad2_ 1N4148 +d1 net-_d1-pad1_ net-_d1-pad2_ 1N4148 +q6 net-_d3-pad2_ net-_d1-pad1_ net-_d1-pad2_ Q2N2907A +q9 net-_d3-pad1_ net-_d1-pad2_ net-_q10-pad1_ Q2N2907A +q12 net-_q11-pad1_ net-_d4-pad2_ net-_q10-pad1_ Q2N2907A +d3 net-_d3-pad1_ net-_d3-pad2_ 1N4148 +q11 net-_q11-pad1_ net-_d3-pad1_ net-_d3-pad2_ Q2N2222 +d4 net-_d4-pad1_ net-_d4-pad2_ 1N4148 +q13 net-_d3-pad2_ net-_d5-pad1_ net-_d4-pad2_ Q2N2907A +d5 net-_d5-pad1_ net-_d4-pad2_ 1N4148 +q15 net-_q14-pad1_ net-_q11-pad1_ net-_d3-pad2_ Q2N2222 +q16 net-_q16-pad1_ net-_q14-pad1_ net-_d3-pad2_ Q2N2222 +r3 net-_j1-pad1_ net-_q7-pad3_ 2.1k +q7 net-_d2-pad1_ net-_q1-pad1_ net-_q7-pad3_ Q2N2907A +q17 net-_q17-pad1_ net-_q17-pad2_ net-_j1-pad1_ Q2N2907A +r5 net-_q17-pad2_ net-_q17-pad1_ 2k +q20 net-_j2-pad3_ net-_q17-pad1_ net-_j1-pad1_ Q2N2907A +q21 net-_q18-pad3_ net-_q17-pad1_ net-_j1-pad1_ Q2N2907A +q24 net-_d9-pad1_ net-_q17-pad1_ net-_q23-pad3_ Q2N2907A +q26 net-_q25-pad3_ net-_q17-pad1_ net-_j1-pad1_ Q2N2907A +q30 net-_q30-pad1_ net-_q17-pad1_ net-_j1-pad1_ Q2N2907A +q18 net-_q17-pad1_ net-_j2-pad3_ net-_q18-pad3_ Q2N2222 +r4 net-_q18-pad3_ net-_d3-pad2_ 4.6k +j2 net-_j1-pad1_ net-_d3-pad2_ net-_j2-pad3_ J2N3819 +q19 net-_j2-pad3_ net-_q18-pad3_ net-_d3-pad2_ Q2N2222 +d7 net-_d7-pad1_ net-_d6-pad2_ 1N4148 +d6 net-_d6-pad1_ net-_d6-pad2_ 1N4148 +q22 net-_d3-pad2_ net-_d6-pad1_ net-_d6-pad2_ Q2N2907A +q25 net-_d8-pad1_ net-_d6-pad2_ net-_q25-pad3_ Q2N2907A +q28 net-_q27-pad1_ net-_d10-pad2_ net-_q25-pad3_ Q2N2907A +d8 net-_d8-pad1_ net-_d3-pad2_ 1N4148 +q27 net-_q27-pad1_ net-_d8-pad1_ net-_d3-pad2_ Q2N2222 +d9 net-_d9-pad1_ net-_d10-pad2_ 1N4148 +q29 net-_d3-pad2_ net-_d10-pad1_ net-_d10-pad2_ Q2N2907A +d10 net-_d10-pad1_ net-_d10-pad2_ 1N4148 +q31 net-_q30-pad1_ net-_q27-pad1_ net-_d3-pad2_ Q2N2222 +q32 net-_q32-pad1_ net-_q30-pad1_ net-_d3-pad2_ Q2N2222 +r6 net-_j1-pad1_ net-_q23-pad3_ 2.1k +q23 net-_d7-pad1_ net-_q17-pad1_ net-_q23-pad3_ Q2N2907A +* Control Statements + +.ends LM393 \ No newline at end of file diff --git a/library/SubcircuitLibrary/LM393/LM393_Previous_Values.xml b/library/SubcircuitLibrary/LM393/LM393_Previous_Values.xml new file mode 100644 index 00000000..babb60e4 --- /dev/null +++ b/library/SubcircuitLibrary/LM393/LM393_Previous_Values.xml @@ -0,0 +1 @@ +C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libC:\FOSSEE\eSim\library\deviceModelLibrary\JFET\NJF.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libC:\FOSSEE\eSim\library\deviceModelLibrary\Diode\D.libC:\FOSSEE\eSim\library\deviceModelLibrary\Diode\D.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.libC:\FOSSEE\eSim\library\deviceModelLibrary\Diode\D.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libC:\FOSSEE\eSim\library\deviceModelLibrary\Diode\D.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.libC:\FOSSEE\eSim\library\deviceModelLibrary\Diode\D.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libC:\FOSSEE\eSim\library\deviceModelLibrary\JFET\NJF.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libC:\FOSSEE\eSim\library\deviceModelLibrary\Diode\D.libC:\FOSSEE\eSim\library\deviceModelLibrary\Diode\D.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.libC:\FOSSEE\eSim\library\deviceModelLibrary\Diode\D.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libC:\FOSSEE\eSim\library\deviceModelLibrary\Diode\D.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.libC:\FOSSEE\eSim\library\deviceModelLibrary\Diode\D.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.libtruefalsefalseHzHz0Volts or AmperesVolts or AmperesVolts or AmperesVolts or AmperesVolts or AmperesVolts or AmperesSecSecSec \ No newline at end of file diff --git a/library/SubcircuitLibrary/LM393/NJF.lib b/library/SubcircuitLibrary/LM393/NJF.lib new file mode 100644 index 00000000..dbb2cbae --- /dev/null +++ b/library/SubcircuitLibrary/LM393/NJF.lib @@ -0,0 +1,4 @@ +.model J2N3819 NJF(Beta=1.304m Betatce=-.5 Rd=1 Rs=1 Lambda=2.25m Vto=-3 ++ Vtotc=-2.5m Is=33.57f Isr=322.4f N=1 Nr=2 Xti=3 Alpha=311.7u ++ Vk=243.6 Cgd=1.6p M=.3622 Pb=1 Fc=.5 Cgs=2.414p Kf=9.882E-18 ++ Af=1) diff --git a/library/SubcircuitLibrary/LM393/NPN.lib b/library/SubcircuitLibrary/LM393/NPN.lib new file mode 100644 index 00000000..be5f3073 --- /dev/null +++ b/library/SubcircuitLibrary/LM393/NPN.lib @@ -0,0 +1,4 @@ +.model Q2N2222 NPN( Is=14.34f Xti=3 Eg=1.11 Vaf=74.03 Bf=400 Ne=1.307 ++ Ise=14.34f Ikf=0.2847 Xtb=1.5 Br=6.092 Nc=2 Isc=0 Ikr=0 Rc=1 Cjc=7.306p ++ Mjc=0.3416 Vjc=0.75 Fc=0.5 Cje=22.01p Mje=0.377 Vje=0.75 Tr=46.91n Tf=411.1p ++ Itf=0.6 Vtf=1.7 Xtf=3 Rb=10) diff --git a/library/SubcircuitLibrary/LM393/PNP.lib b/library/SubcircuitLibrary/LM393/PNP.lib new file mode 100644 index 00000000..7edda0ea --- /dev/null +++ b/library/SubcircuitLibrary/LM393/PNP.lib @@ -0,0 +1,4 @@ +.model Q2N2907A PNP(Is=650.6E-18 Xti=3 Eg=1.11 Vaf=115.7 Bf=231.7 Ne=1.829 ++ Ise=54.81f Ikf=1.079 Xtb=1.5 Br=3.563 Nc=2 Isc=0 Ikr=0 Rc=.715 ++ Cjc=14.76p Mjc=.5383 Vjc=.75 Fc=.5 Cje=19.82p Mje=.3357 Vje=.75 ++ Tr=111.3n Tf=603.7p Itf=.65 Vtf=5 Xtf=1.7 Rb=10) diff --git a/library/SubcircuitLibrary/LM393/README.md b/library/SubcircuitLibrary/LM393/README.md new file mode 100644 index 00000000..d0b0abaf --- /dev/null +++ b/library/SubcircuitLibrary/LM393/README.md @@ -0,0 +1,35 @@ + +# LM393 Comparator IC + +LM393 is a Low power, low offset voltage comparator IC. It has two channels sharing common biasing. It is a high precision comparator with a low offset voltage of 2 mV. It has various applications such as in limit comparators, A/D convertors, wave shaping circuits etc. + + +## Usage/Examples + +Basic Comparator + +CMOS/TTL Driver + +Pulse Train Generator + +Crystal Controlled Oscillator + +Positive/Negative Floating Regulator + +Two-Decade High Frequency VCO + + +## Documentation + +To know the details of LM393 IC please refer to this link [LM393_datasheet.](https://www.ti.com/lit/ds/symlink/lm393-n.pdf?ts=1665939843518&ref_url=https%253A%252F%252Fwww.google.com%252F) + +## Comments/Notes + +Please note this is a complete analog IC. It works fine at the time of simulation. + +## Contributor + +Name: Arpit Sharma +Email: arpitniraliya306@gmail.com +Year: 2022 +Position: FOSSEE Summer Fellowship Intern 2022 diff --git a/library/SubcircuitLibrary/LM393/analysis b/library/SubcircuitLibrary/LM393/analysis new file mode 100644 index 00000000..ebd5c0a9 --- /dev/null +++ b/library/SubcircuitLibrary/LM393/analysis @@ -0,0 +1 @@ +.tran 0e-00 0e-00 0e-00 \ No newline at end of file -- cgit From 8bea2eb6540f75495e26b430c0dc6373489641e5 Mon Sep 17 00:00:00 2001 From: Arpit Sharma Date: Fri, 21 Oct 2022 23:09:53 +0530 Subject: LM723 Adjustable Voltage Regulator IC --- library/SubcircuitLibrary/LM723/D.lib | 2 + library/SubcircuitLibrary/LM723/LM723-cache.lib | 182 +++ library/SubcircuitLibrary/LM723/LM723.cir | 69 + library/SubcircuitLibrary/LM723/LM723.cir.out | 83 ++ library/SubcircuitLibrary/LM723/LM723.pro | 81 ++ library/SubcircuitLibrary/LM723/LM723.sch | 1388 ++++++++++++++++++++ library/SubcircuitLibrary/LM723/LM723.sub | 77 ++ .../LM723/LM723_Previous_Values.xml | 1 + library/SubcircuitLibrary/LM723/NJF.lib | 4 + library/SubcircuitLibrary/LM723/NMOS-180nm.lib | 13 + library/SubcircuitLibrary/LM723/NPN.lib | 4 + library/SubcircuitLibrary/LM723/PNP.lib | 4 + library/SubcircuitLibrary/LM723/README.md | 36 + library/SubcircuitLibrary/LM723/analysis | 1 + 14 files changed, 1945 insertions(+) create mode 100644 library/SubcircuitLibrary/LM723/D.lib create mode 100644 library/SubcircuitLibrary/LM723/LM723-cache.lib create mode 100644 library/SubcircuitLibrary/LM723/LM723.cir create mode 100644 library/SubcircuitLibrary/LM723/LM723.cir.out create mode 100644 library/SubcircuitLibrary/LM723/LM723.pro create mode 100644 library/SubcircuitLibrary/LM723/LM723.sch create mode 100644 library/SubcircuitLibrary/LM723/LM723.sub create mode 100644 library/SubcircuitLibrary/LM723/LM723_Previous_Values.xml create mode 100644 library/SubcircuitLibrary/LM723/NJF.lib create mode 100644 library/SubcircuitLibrary/LM723/NMOS-180nm.lib create mode 100644 library/SubcircuitLibrary/LM723/NPN.lib create mode 100644 library/SubcircuitLibrary/LM723/PNP.lib create mode 100644 library/SubcircuitLibrary/LM723/README.md create mode 100644 library/SubcircuitLibrary/LM723/analysis diff --git a/library/SubcircuitLibrary/LM723/D.lib b/library/SubcircuitLibrary/LM723/D.lib new file mode 100644 index 00000000..f53bf3e0 --- /dev/null +++ b/library/SubcircuitLibrary/LM723/D.lib @@ -0,0 +1,2 @@ +.model 1N4148 D(is=2.495E-09 rs=4.755E-01 n=1.679E+00 tt=3.030E-09 cjo=1.700E-12 vj=1 m=1.959E-01 bv=1.000E+02 ibv=1.000E-04) + diff --git a/library/SubcircuitLibrary/LM723/LM723-cache.lib b/library/SubcircuitLibrary/LM723/LM723-cache.lib new file mode 100644 index 00000000..3dddd3f6 --- /dev/null +++ b/library/SubcircuitLibrary/LM723/LM723-cache.lib @@ -0,0 +1,182 @@ +EESchema-LIBRARY Version 2.3 +#encoding utf-8 +# +# PORT +# +DEF PORT U 0 40 Y Y 26 F N +F0 "U" 50 100 30 H V C CNN +F1 "PORT" 0 0 30 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0 +A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50 +S -100 50 100 -50 0 1 0 N +X ~ 1 250 0 100 L 30 30 1 1 B +X ~ 2 250 0 100 L 30 30 2 1 B +X ~ 3 250 0 100 L 30 30 3 1 B +X ~ 4 250 0 100 L 30 30 4 1 B +X ~ 5 250 0 100 L 30 30 5 1 B +X ~ 6 250 0 100 L 30 30 6 1 B +X ~ 7 250 0 100 L 30 30 7 1 B +X ~ 8 250 0 100 L 30 30 8 1 B +X ~ 9 250 0 100 L 30 30 9 1 B +X ~ 10 250 0 100 L 30 30 10 1 B +X ~ 11 250 0 100 L 30 30 11 1 B +X ~ 12 250 0 100 L 30 30 12 1 B +X ~ 13 250 0 100 L 30 30 13 1 B +X ~ 14 250 0 100 L 30 30 14 1 B +X ~ 15 250 0 100 L 30 30 15 1 B +X ~ 16 250 0 100 L 30 30 16 1 B +X ~ 17 250 0 100 L 30 30 17 1 B +X ~ 18 250 0 100 L 30 30 18 1 B +X ~ 19 250 0 100 L 30 30 19 1 B +X ~ 20 250 0 100 L 30 30 20 1 B +X ~ 21 250 0 100 L 30 30 21 1 B +X ~ 22 250 0 100 L 30 30 22 1 B +X ~ 23 250 0 100 L 30 30 23 1 B +X ~ 24 250 0 100 L 30 30 24 1 B +X ~ 25 250 0 100 L 30 30 25 1 B +X ~ 26 250 0 100 L 30 30 26 1 B +ENDDRAW +ENDDEF +# +# eSim_C +# +DEF eSim_C C 0 10 N Y 1 F N +F0 "C" 25 100 50 H V L CNN +F1 "eSim_C" 25 -100 50 H V L CNN +F2 "" 38 -150 30 H V C CNN +F3 "" 0 0 60 H V C CNN +ALIAS capacitor +$FPLIST + C_* +$ENDFPLIST +DRAW +P 2 0 1 20 -80 -30 80 -30 N +P 2 0 1 20 -80 30 80 30 N +X ~ 1 0 150 110 D 40 40 1 1 P +X ~ 2 0 -150 110 U 40 40 1 1 P +ENDDRAW +ENDDEF +# +# eSim_Diode +# +DEF eSim_Diode D 0 40 N N 1 F N +F0 "D" 0 100 50 H V C CNN +F1 "eSim_Diode" 0 -100 50 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +$FPLIST + TO-???* + *SingleDiode + *_Diode_* + *SingleDiode* + D_* +$ENDFPLIST +DRAW +T 0 -100 50 60 0 0 0 A Normal 0 C C +T 0 100 50 60 0 0 0 K Normal 0 C C +P 2 0 1 6 50 50 50 -50 N +P 3 0 1 0 -50 50 50 0 -50 -50 F +X A 1 -150 0 100 R 40 40 1 1 P +X K 2 150 0 100 L 40 40 1 1 P +ENDDRAW +ENDDEF +# +# eSim_NJF +# +DEF eSim_NJF J 0 0 Y N 1 F N +F0 "J" -100 50 50 H V R CNN +F1 "eSim_NJF" -50 150 50 H V R CNN +F2 "" 200 100 29 H V C CNN +F3 "" 0 0 60 H V C CNN +ALIAS jfet_n +DRAW +C 50 0 111 0 1 10 N +P 3 0 1 10 10 75 10 -75 10 -75 N +P 3 0 1 0 100 -100 100 -50 10 -50 N +P 3 0 1 0 100 100 100 55 10 55 N +P 4 0 1 0 0 0 -40 15 -40 -15 0 0 F +X D 1 100 200 100 D 50 50 1 1 P +X G 2 -200 0 210 R 50 50 1 1 P +X S 3 100 -200 100 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# eSim_NPN +# +DEF eSim_NPN Q 0 0 Y N 1 F N +F0 "Q" -100 50 50 H V R CNN +F1 "eSim_NPN" -50 150 50 H V R CNN +F2 "" 200 100 29 H V C CNN +F3 "" 0 0 60 H V C CNN +ALIAS BC547 Q2N2222 +DRAW +C 50 0 111 0 1 10 N +P 2 0 1 0 25 25 100 100 N +P 3 0 1 0 25 -25 100 -100 100 -100 N +P 3 0 1 20 25 75 25 -75 25 -75 N +P 5 0 1 0 50 -70 70 -50 90 -90 50 -70 50 -70 F +X C 1 100 200 100 D 50 50 1 1 P +X B 2 -200 0 225 R 50 50 1 1 P +X E 3 100 -200 100 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# eSim_PNP +# +DEF eSim_PNP Q 0 0 Y N 1 F N +F0 "Q" -100 50 50 H V R CNN +F1 "eSim_PNP" -50 150 50 H V R CNN +F2 "" 200 100 29 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +C 50 0 111 0 1 10 N +P 2 0 1 0 25 25 100 100 N +P 3 0 1 0 25 -25 100 -100 100 -100 N +P 3 0 1 20 25 75 25 -75 25 -75 N +P 5 0 1 0 90 -70 70 -90 50 -50 90 -70 90 -70 F +X C 1 100 200 100 D 50 50 1 1 P +X B 2 -200 0 225 R 50 50 1 1 P +X E 3 100 -200 100 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# eSim_R +# +DEF eSim_R R 0 0 N Y 1 F N +F0 "R" 50 130 50 H V C CNN +F1 "eSim_R" 50 -50 50 H V C CNN +F2 "" 50 -20 30 H V C CNN +F3 "" 50 50 30 V V C CNN +ALIAS resistor +$FPLIST + R_* + Resistor_* +$ENDFPLIST +DRAW +S 150 10 -50 90 0 1 10 N +X ~ 1 -100 50 50 R 60 60 1 1 P +X ~ 2 200 50 50 L 60 60 1 1 P +ENDDRAW +ENDDEF +# +# zener +# +DEF zener U 0 40 Y Y 1 F N +F0 "U" -50 -100 60 H V C CNN +F1 "zener" 0 100 60 H V C CNN +F2 "" 50 0 60 H V C CNN +F3 "" 50 0 60 H V C CNN +DRAW +P 2 0 1 0 100 -50 50 -100 N +P 2 0 1 0 100 50 100 -50 N +P 2 0 1 0 100 50 150 100 N +P 4 0 1 0 0 50 0 -50 100 0 0 50 N +X ~ IN -200 0 200 R 50 43 1 1 I +X ~ OUT 300 0 200 L 50 43 1 1 O +ENDDRAW +ENDDEF +# +#End Library diff --git a/library/SubcircuitLibrary/LM723/LM723.cir b/library/SubcircuitLibrary/LM723/LM723.cir new file mode 100644 index 00000000..d513ed3e --- /dev/null +++ b/library/SubcircuitLibrary/LM723/LM723.cir @@ -0,0 +1,69 @@ +* C:\FOSSEE\eSim\library\SubcircuitLibrary\LM723\LM723.cir + +* EESchema Netlist Version 1.1 (Spice format) creation date: 07/28/22 22:27:49 + +* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N +* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +* Sheet Name: / +U1 Net-_J1-Pad3_ /V+ zener +R2 /V+ Net-_Q4-Pad3_ 900 +R5 Net-_Q25-Pad3_ /V+ 550 +Q4 Net-_Q14-Pad2_ Net-_Q14-Pad2_ Net-_Q4-Pad3_ eSim_PNP +Q5 Net-_C1-Pad2_ Net-_Q14-Pad2_ Net-_Q25-Pad3_ eSim_PNP +R3 Net-_Q14-Pad2_ Net-_J1-Pad3_ 22k +Q8 /V+ Net-_C1-Pad2_ /Vref eSim_NPN +Q2 /V- Net-_D1-Pad1_ Net-_Q2-Pad3_ eSim_PNP +D1 Net-_D1-Pad1_ Net-_D1-Pad2_ eSim_Diode +Q7 /V- Net-_C1-Pad1_ Net-_D1-Pad2_ eSim_PNP +Q9 Net-_C1-Pad1_ Net-_Q11-Pad1_ /Vref eSim_PNP +Q11 Net-_Q11-Pad1_ Net-_C2-Pad1_ /Vref eSim_PNP +R8 Net-_Q11-Pad1_ Net-_C2-Pad1_ 1.8k +C1 Net-_C1-Pad1_ Net-_C1-Pad2_ 10p +C2 Net-_C2-Pad1_ Net-_C1-Pad2_ 5p +U2 /V- Net-_C1-Pad2_ zener +R16 /V+ Net-_Q14-Pad3_ 1.8k +R18 Net-_Q16-Pad3_ /V+ 1.8k +Q14 Net-_Q14-Pad1_ Net-_Q14-Pad2_ Net-_Q14-Pad3_ eSim_PNP +Q16 /Compensation Net-_Q14-Pad2_ Net-_Q16-Pad3_ eSim_PNP +Q19 /V+ /Compensation Net-_Q19-Pad3_ eSim_NPN +Q23 /Vc Net-_Q19-Pad3_ /Vout eSim_NPN +R21 Net-_Q19-Pad3_ /Vout 15k +U3 /Vz /Vout zener +Q12 Net-_Q11-Pad1_ Net-_D2-Pad2_ Net-_Q12-Pad3_ eSim_NPN +Q10 Net-_C1-Pad1_ Net-_D2-Pad2_ Net-_D2-Pad1_ eSim_NPN +D2 Net-_D2-Pad1_ Net-_D2-Pad2_ eSim_Diode +R9 Net-_D2-Pad1_ Net-_Q12-Pad3_ 2k +R6 Net-_D2-Pad1_ Net-_R6-Pad2_ 11k +R7 Net-_R6-Pad2_ /V- 1k +Q6 Net-_J1-Pad3_ Net-_Q17-Pad2_ Net-_Q6-Pad3_ eSim_NPN +Q3 Net-_J1-Pad3_ Net-_J1-Pad1_ Net-_Q1-Pad2_ eSim_NPN +Q1 Net-_J1-Pad1_ Net-_Q1-Pad2_ /V- eSim_NPN +R1 Net-_Q1-Pad2_ /V- 2.4k +R4 Net-_Q6-Pad3_ /V- 160 +R10 /Vref Net-_Q13-Pad1_ 409 +R11 Net-_Q13-Pad1_ Net-_D2-Pad2_ 11.89k +R12 Net-_D2-Pad2_ Net-_Q15-Pad2_ 1.1k +R13 Net-_Q15-Pad2_ Net-_Q13-Pad2_ 380 +R14 Net-_Q13-Pad2_ /V- 1.1k +Q15 Net-_Q13-Pad1_ Net-_Q15-Pad2_ Net-_Q15-Pad3_ eSim_NPN +R17 Net-_Q15-Pad3_ /V- 1.1k +Q13 Net-_Q13-Pad1_ Net-_Q13-Pad2_ Net-_Q13-Pad3_ eSim_NPN +R15 Net-_Q13-Pad3_ /V- 1.7k +Q17 Net-_Q14-Pad1_ Net-_Q17-Pad2_ Net-_Q17-Pad3_ eSim_NPN +R19 Net-_Q17-Pad3_ /V- 300 +Q18 /Vref Net-_Q14-Pad1_ Net-_Q17-Pad2_ eSim_NPN +R20 Net-_Q17-Pad2_ /V- 10k +Q24 /Compensation Net-_Q24-Pad2_ /Current_sense eSim_NPN +R24 /Current_limit Net-_Q24-Pad2_ 400 +Q22 /Compensation /Inverting_input Net-_Q20-Pad3_ eSim_NPN +Q20 /Vref /Non-inverting_input Net-_Q20-Pad3_ eSim_NPN +Q21 Net-_Q20-Pad3_ Net-_Q17-Pad2_ Net-_Q21-Pad3_ eSim_NPN +R22 Net-_Q21-Pad3_ /V- 300 +R23 Net-_Q26-Pad3_ /V- 300 +U4 /V+ /Vc /Vout /Vz /Vref /Compensation /Current_limit /Current_sense /Inverting_input /Non-inverting_input ? ? ? /V- PORT +J1 Net-_J1-Pad1_ /V- Net-_J1-Pad3_ jfet_n +Q25 Net-_Q2-Pad3_ Net-_Q14-Pad2_ Net-_Q25-Pad3_ eSim_PNP +Q26 Net-_Q20-Pad3_ Net-_Q17-Pad2_ Net-_Q26-Pad3_ eSim_NPN + +.end diff --git a/library/SubcircuitLibrary/LM723/LM723.cir.out b/library/SubcircuitLibrary/LM723/LM723.cir.out new file mode 100644 index 00000000..6530b650 --- /dev/null +++ b/library/SubcircuitLibrary/LM723/LM723.cir.out @@ -0,0 +1,83 @@ +* c:\fossee\esim\library\subcircuitlibrary\lm723\lm723.cir + +.include D.lib +.include PNP.lib +.include NJF.lib +.include NPN.lib +* u1 net-_j1-pad3_ /v+ zener +r2 /v+ net-_q4-pad3_ 900 +r5 net-_q25-pad3_ /v+ 550 +q4 net-_q14-pad2_ net-_q14-pad2_ net-_q4-pad3_ Q2N2907A +q5 net-_c1-pad2_ net-_q14-pad2_ net-_q25-pad3_ Q2N2907A +r3 net-_q14-pad2_ net-_j1-pad3_ 22k +q8 /v+ net-_c1-pad2_ /vref Q2N2222 +q2 /v- net-_d1-pad1_ net-_q2-pad3_ Q2N2907A +d1 net-_d1-pad1_ net-_d1-pad2_ 1N4148 +q7 /v- net-_c1-pad1_ net-_d1-pad2_ Q2N2907A +q9 net-_c1-pad1_ net-_q11-pad1_ /vref Q2N2907A +q11 net-_q11-pad1_ net-_c2-pad1_ /vref Q2N2907A +r8 net-_q11-pad1_ net-_c2-pad1_ 1.8k +c1 net-_c1-pad1_ net-_c1-pad2_ 10p +c2 net-_c2-pad1_ net-_c1-pad2_ 5p +* u2 /v- net-_c1-pad2_ zener +r16 /v+ net-_q14-pad3_ 1.8k +r18 net-_q16-pad3_ /v+ 1.8k +q14 net-_q14-pad1_ net-_q14-pad2_ net-_q14-pad3_ Q2N2907A +q16 /compensation net-_q14-pad2_ net-_q16-pad3_ Q2N2907A +q19 /v+ /compensation net-_q19-pad3_ Q2N2222 +q23 /vc net-_q19-pad3_ /vout Q2N2222 +r21 net-_q19-pad3_ /vout 15k +* u3 /vz /vout zener +q12 net-_q11-pad1_ net-_d2-pad2_ net-_q12-pad3_ Q2N2222 +q10 net-_c1-pad1_ net-_d2-pad2_ net-_d2-pad1_ Q2N2222 +d2 net-_d2-pad1_ net-_d2-pad2_ 1N4148 +r9 net-_d2-pad1_ net-_q12-pad3_ 2k +r6 net-_d2-pad1_ net-_r6-pad2_ 11k +r7 net-_r6-pad2_ /v- 1k +q6 net-_j1-pad3_ net-_q17-pad2_ net-_q6-pad3_ Q2N2222 +q3 net-_j1-pad3_ net-_j1-pad1_ net-_q1-pad2_ Q2N2222 +q1 net-_j1-pad1_ net-_q1-pad2_ /v- Q2N2222 +r1 net-_q1-pad2_ /v- 2.4k +r4 net-_q6-pad3_ /v- 160 +r10 /vref net-_q13-pad1_ 409 +r11 net-_q13-pad1_ net-_d2-pad2_ 11.89k +r12 net-_d2-pad2_ net-_q15-pad2_ 1.1k +r13 net-_q15-pad2_ net-_q13-pad2_ 380 +r14 net-_q13-pad2_ /v- 1.1k +q15 net-_q13-pad1_ net-_q15-pad2_ net-_q15-pad3_ Q2N2222 +r17 net-_q15-pad3_ /v- 1.1k +q13 net-_q13-pad1_ net-_q13-pad2_ net-_q13-pad3_ Q2N2222 +r15 net-_q13-pad3_ /v- 1.7k +q17 net-_q14-pad1_ net-_q17-pad2_ net-_q17-pad3_ Q2N2222 +r19 net-_q17-pad3_ /v- 300 +q18 /vref net-_q14-pad1_ net-_q17-pad2_ Q2N2222 +r20 net-_q17-pad2_ /v- 10k +q24 /compensation net-_q24-pad2_ /current_sense Q2N2222 +r24 /current_limit net-_q24-pad2_ 400 +q22 /compensation /inverting_input net-_q20-pad3_ Q2N2222 +q20 /vref /non-inverting_input net-_q20-pad3_ Q2N2222 +q21 net-_q20-pad3_ net-_q17-pad2_ net-_q21-pad3_ Q2N2222 +r22 net-_q21-pad3_ /v- 300 +r23 net-_q26-pad3_ /v- 300 +* u4 /v+ /vc /vout /vz /vref /compensation /current_limit /current_sense /inverting_input /non-inverting_input ? ? ? /v- port +j1 net-_j1-pad1_ /v- net-_j1-pad3_ J2N3819 +q25 net-_q2-pad3_ net-_q14-pad2_ net-_q25-pad3_ Q2N2907A +q26 net-_q20-pad3_ net-_q17-pad2_ net-_q26-pad3_ Q2N2222 +a1 net-_j1-pad3_ /v+ u1 +a2 /v- net-_c1-pad2_ u2 +a3 /vz /vout u3 +* Schematic Name: zener, NgSpice Name: zener +.model u1 zener(v_breakdown=6.2 i_breakdown=2.0e-2 i_sat=1.0e-12 n_forward=1.0 limit_switch=FALSE ) +* Schematic Name: zener, NgSpice Name: zener +.model u2 zener(v_breakdown=5.7 i_breakdown=2.0e-2 i_sat=1.0e-12 n_forward=1.0 limit_switch=FALSE ) +* Schematic Name: zener, NgSpice Name: zener +.model u3 zener(v_breakdown=5.6 i_breakdown=2.0e-2 i_sat=1.0e-12 n_forward=1.0 limit_switch=FALSE ) +.tran 0e-00 0e-00 0e-00 + +* Control Statements +.control +run +print allv > plot_data_v.txt +print alli > plot_data_i.txt +.endc +.end diff --git a/library/SubcircuitLibrary/LM723/LM723.pro b/library/SubcircuitLibrary/LM723/LM723.pro new file mode 100644 index 00000000..b033facd --- /dev/null +++ b/library/SubcircuitLibrary/LM723/LM723.pro @@ -0,0 +1,81 @@ +update=09/24/22 18:28:26 +version=1 +last_client=eeschema +[general] +version=1 +RootSch= +BoardNm= +[pcbnew] +version=1 +LastNetListRead= +UseCmpFile=1 +PadDrill=0.600000000000 +PadDrillOvalY=0.600000000000 +PadSizeH=1.500000000000 +PadSizeV=1.500000000000 +PcbTextSizeV=1.500000000000 +PcbTextSizeH=1.500000000000 +PcbTextThickness=0.300000000000 +ModuleTextSizeV=1.000000000000 +ModuleTextSizeH=1.000000000000 +ModuleTextSizeThickness=0.150000000000 +SolderMaskClearance=0.000000000000 +SolderMaskMinWidth=0.000000000000 +DrawSegmentWidth=0.200000000000 +BoardOutlineThickness=0.100000000000 +ModuleOutlineThickness=0.150000000000 +[cvpcb] +version=1 +NetIExt=net +[eeschema] +version=1 +LibDir= +[eeschema/libraries] +LibName1=adc-dac +LibName2=memory +LibName3=xilinx +LibName4=microcontrollers +LibName5=dsp +LibName6=microchip +LibName7=analog_switches +LibName8=motorola +LibName9=texas +LibName10=intel +LibName11=audio +LibName12=interface +LibName13=digital-audio +LibName14=philips +LibName15=display +LibName16=cypress +LibName17=siliconi +LibName18=opto +LibName19=atmel +LibName20=contrib +LibName21=power +LibName22=eSim_Plot +LibName23=transistors +LibName24=conn +LibName25=eSim_User +LibName26=regul +LibName27=74xx +LibName28=cmos4000 +LibName29=eSim_Analog +LibName30=eSim_Devices +LibName31=eSim_Digital +LibName32=eSim_Hybrid +LibName33=eSim_Miscellaneous +LibName34=eSim_Power +LibName35=eSim_Sources +LibName36=eSim_Subckt +LibName37=eSim_Nghdl +LibName38=eSim_Ngveri +[schematic_editor] +version=1 +PageLayoutDescrFile= +PlotDirectoryName= +SubpartIdSeparator=0 +SubpartFirstId=65 +NetFmtName= +SpiceForceRefPrefix=0 +SpiceUseNetNumbers=0 +LabSize=60 diff --git a/library/SubcircuitLibrary/LM723/LM723.sch b/library/SubcircuitLibrary/LM723/LM723.sch new file mode 100644 index 00000000..98e57d33 --- /dev/null +++ b/library/SubcircuitLibrary/LM723/LM723.sch @@ -0,0 +1,1388 @@ +EESchema Schematic File Version 2 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:power +LIBS:eSim_Plot +LIBS:transistors +LIBS:conn +LIBS:eSim_User +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:eSim_Analog +LIBS:eSim_Devices +LIBS:eSim_Digital +LIBS:eSim_Hybrid +LIBS:eSim_Miscellaneous +LIBS:eSim_Power +LIBS:eSim_Sources +LIBS:eSim_Subckt +LIBS:eSim_Nghdl +LIBS:eSim_Ngveri +LIBS:LM723-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11693 8268 +encoding utf-8 +Sheet 1 1 +Title "" +Date "" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +$Comp +L zener U1 +U 1 1 62BC8919 +P 900 1400 +F 0 "U1" H 850 1300 60 0000 C CNN +F 1 "zener" H 900 1500 60 0000 C CNN +F 2 "" H 950 1400 60 0000 C CNN +F 3 "" H 950 1400 60 0000 C CNN + 1 900 1400 + 0 -1 -1 0 +$EndComp +$Comp +L resistor R2 +U 1 1 62BC891A +P 1550 800 +F 0 "R2" H 1600 930 50 0000 C CNN +F 1 "900" H 1600 750 50 0000 C CNN +F 2 "" H 1600 780 30 0000 C CNN +F 3 "" V 1600 850 30 0000 C CNN + 1 1550 800 + 0 1 1 0 +$EndComp +$Comp +L resistor R5 +U 1 1 62BC891B +P 2650 900 +F 0 "R5" H 2700 1030 50 0000 C CNN +F 1 "550" H 2700 850 50 0000 C CNN +F 2 "" H 2700 880 30 0000 C CNN +F 3 "" V 2700 950 30 0000 C CNN + 1 2650 900 + 0 -1 -1 0 +$EndComp +$Comp +L eSim_PNP Q4 +U 1 1 62BC891C +P 1700 1400 +F 0 "Q4" H 1600 1450 50 0000 R CNN +F 1 "eSim_PNP" H 1650 1550 50 0000 R CNN +F 2 "" H 1900 1500 29 0000 C CNN +F 3 "" H 1700 1400 60 0000 C CNN + 1 1700 1400 + -1 0 0 1 +$EndComp +$Comp +L eSim_PNP Q5 +U 1 1 62BC891D +P 2500 1400 +F 0 "Q5" H 2400 1450 50 0000 R CNN +F 1 "eSim_PNP" H 2450 1550 50 0000 R CNN +F 2 "" H 2700 1500 29 0000 C CNN +F 3 "" H 2500 1400 60 0000 C CNN + 1 2500 1400 + 1 0 0 1 +$EndComp +$Comp +L resistor R3 +U 1 1 62BC891E +P 1550 1800 +F 0 "R3" H 1600 1930 50 0000 C CNN +F 1 "22k" H 1600 1750 50 0000 C CNN +F 2 "" H 1600 1780 30 0000 C CNN +F 3 "" V 1600 1850 30 0000 C CNN + 1 1550 1800 + 0 1 1 0 +$EndComp +$Comp +L eSim_NPN Q8 +U 1 1 62BC891F +P 3000 1650 +F 0 "Q8" H 2900 1700 50 0000 R CNN +F 1 "eSim_NPN" H 2950 1800 50 0000 R CNN +F 2 "" H 3200 1750 29 0000 C CNN +F 3 "" H 3000 1650 60 0000 C CNN + 1 3000 1650 + 1 0 0 -1 +$EndComp +$Comp +L eSim_PNP Q2 +U 1 1 62BC8920 +P 1300 2500 +F 0 "Q2" H 1200 2550 50 0000 R CNN +F 1 "eSim_PNP" H 1250 2650 50 0000 R CNN +F 2 "" H 1500 2600 29 0000 C CNN +F 3 "" H 1300 2500 60 0000 C CNN + 1 1300 2500 + -1 0 0 1 +$EndComp +$Comp +L eSim_Diode D1 +U 1 1 62BC8921 +P 1900 2500 +F 0 "D1" H 1900 2600 50 0000 C CNN +F 1 "eSim_Diode" H 1900 2400 50 0000 C CNN +F 2 "" H 1900 2500 60 0000 C CNN +F 3 "" H 1900 2500 60 0000 C CNN + 1 1900 2500 + 1 0 0 -1 +$EndComp +$Comp +L eSim_PNP Q7 +U 1 1 62BC8922 +P 2700 2750 +F 0 "Q7" H 2600 2800 50 0000 R CNN +F 1 "eSim_PNP" H 2650 2900 50 0000 R CNN +F 2 "" H 2900 2850 29 0000 C CNN +F 3 "" H 2700 2750 60 0000 C CNN + 1 2700 2750 + -1 0 0 1 +$EndComp +$Comp +L eSim_PNP Q9 +U 1 1 62BC8923 +P 3550 2150 +F 0 "Q9" H 3450 2200 50 0000 R CNN +F 1 "eSim_PNP" H 3500 2300 50 0000 R CNN +F 2 "" H 3750 2250 29 0000 C CNN +F 3 "" H 3550 2150 60 0000 C CNN + 1 3550 2150 + -1 0 0 1 +$EndComp +$Comp +L eSim_PNP Q11 +U 1 1 62BC8924 +P 4500 2150 +F 0 "Q11" H 4400 2200 50 0000 R CNN +F 1 "eSim_PNP" H 4450 2300 50 0000 R CNN +F 2 "" H 4700 2250 29 0000 C CNN +F 3 "" H 4500 2150 60 0000 C CNN + 1 4500 2150 + 1 0 0 1 +$EndComp +$Comp +L resistor R8 +U 1 1 62BC8925 +P 4000 2200 +F 0 "R8" H 4050 2330 50 0000 C CNN +F 1 "1.8k" H 4050 2150 50 0000 C CNN +F 2 "" H 4050 2180 30 0000 C CNN +F 3 "" V 4050 2250 30 0000 C CNN + 1 4000 2200 + 1 0 0 -1 +$EndComp +$Comp +L capacitor C1 +U 1 1 62BC8926 +P 3250 2900 +F 0 "C1" H 3275 3000 50 0000 L CNN +F 1 "10p" H 3275 2800 50 0000 L CNN +F 2 "" H 3288 2750 30 0000 C CNN +F 3 "" H 3250 2900 60 0000 C CNN + 1 3250 2900 + 1 0 0 -1 +$EndComp +$Comp +L capacitor C2 +U 1 1 62BC8927 +P 4300 2900 +F 0 "C2" H 4325 3000 50 0000 L CNN +F 1 "5p" H 4325 2800 50 0000 L CNN +F 2 "" H 4338 2750 30 0000 C CNN +F 3 "" H 4300 2900 60 0000 C CNN + 1 4300 2900 + 1 0 0 -1 +$EndComp +$Comp +L zener U2 +U 1 1 62BC8928 +P 2900 3500 +F 0 "U2" H 2850 3400 60 0000 C CNN +F 1 "zener" H 2900 3600 60 0000 C CNN +F 2 "" H 2950 3500 60 0000 C CNN +F 3 "" H 2950 3500 60 0000 C CNN + 1 2900 3500 + 0 -1 -1 0 +$EndComp +$Comp +L resistor R16 +U 1 1 62BC8929 +P 6050 800 +F 0 "R16" H 6100 930 50 0000 C CNN +F 1 "1.8k" H 6100 750 50 0000 C CNN +F 2 "" H 6100 780 30 0000 C CNN +F 3 "" V 6100 850 30 0000 C CNN + 1 6050 800 + 0 1 1 0 +$EndComp +$Comp +L resistor R18 +U 1 1 62BC892A +P 6950 900 +F 0 "R18" H 7000 1030 50 0000 C CNN +F 1 "1.8k" H 7000 850 50 0000 C CNN +F 2 "" H 7000 880 30 0000 C CNN +F 3 "" V 7000 950 30 0000 C CNN + 1 6950 900 + 0 -1 -1 0 +$EndComp +$Comp +L eSim_PNP Q14 +U 1 1 62BC892B +P 6000 1350 +F 0 "Q14" H 5900 1400 50 0000 R CNN +F 1 "eSim_PNP" H 5950 1500 50 0000 R CNN +F 2 "" H 6200 1450 29 0000 C CNN +F 3 "" H 6000 1350 60 0000 C CNN + 1 6000 1350 + 1 0 0 1 +$EndComp +$Comp +L eSim_PNP Q16 +U 1 1 62BC892C +P 6800 1350 +F 0 "Q16" H 6700 1400 50 0000 R CNN +F 1 "eSim_PNP" H 6750 1500 50 0000 R CNN +F 2 "" H 7000 1450 29 0000 C CNN +F 3 "" H 6800 1350 60 0000 C CNN + 1 6800 1350 + 1 0 0 1 +$EndComp +$Comp +L eSim_NPN Q19 +U 1 1 62BC892D +P 7750 1350 +F 0 "Q19" H 7650 1400 50 0000 R CNN +F 1 "eSim_NPN" H 7700 1500 50 0000 R CNN +F 2 "" H 7950 1450 29 0000 C CNN +F 3 "" H 7750 1350 60 0000 C CNN + 1 7750 1350 + 1 0 0 -1 +$EndComp +$Comp +L eSim_NPN Q23 +U 1 1 62BC892E +P 8700 1350 +F 0 "Q23" H 8600 1400 50 0000 R CNN +F 1 "eSim_NPN" H 8650 1500 50 0000 R CNN +F 2 "" H 8900 1450 29 0000 C CNN +F 3 "" H 8700 1350 60 0000 C CNN + 1 8700 1350 + 1 0 0 -1 +$EndComp +$Comp +L resistor R21 +U 1 1 62BC892F +P 7800 1900 +F 0 "R21" H 7850 2030 50 0000 C CNN +F 1 "15k" H 7850 1850 50 0000 C CNN +F 2 "" H 7850 1880 30 0000 C CNN +F 3 "" V 7850 1950 30 0000 C CNN + 1 7800 1900 + 0 1 1 0 +$EndComp +$Comp +L zener U3 +U 1 1 62BC8930 +P 8850 2150 +F 0 "U3" H 8800 2050 60 0000 C CNN +F 1 "zener" H 8850 2250 60 0000 C CNN +F 2 "" H 8900 2150 60 0000 C CNN +F 3 "" H 8900 2150 60 0000 C CNN + 1 8850 2150 + 0 -1 -1 0 +$EndComp +$Comp +L eSim_NPN Q12 +U 1 1 62BC8931 +P 4700 4500 +F 0 "Q12" H 4600 4550 50 0000 R CNN +F 1 "eSim_NPN" H 4650 4650 50 0000 R CNN +F 2 "" H 4900 4600 29 0000 C CNN +F 3 "" H 4700 4500 60 0000 C CNN + 1 4700 4500 + -1 0 0 -1 +$EndComp +$Comp +L eSim_NPN Q10 +U 1 1 62BC8932 +P 3550 4500 +F 0 "Q10" H 3450 4550 50 0000 R CNN +F 1 "eSim_NPN" H 3500 4650 50 0000 R CNN +F 2 "" H 3750 4600 29 0000 C CNN +F 3 "" H 3550 4500 60 0000 C CNN + 1 3550 4500 + -1 0 0 -1 +$EndComp +$Comp +L eSim_Diode D2 +U 1 1 62BC8933 +P 3850 4800 +F 0 "D2" H 3850 4900 50 0000 C CNN +F 1 "eSim_Diode" H 3850 4700 50 0000 C CNN +F 2 "" H 3850 4800 60 0000 C CNN +F 3 "" H 3850 4800 60 0000 C CNN + 1 3850 4800 + 0 -1 -1 0 +$EndComp +$Comp +L resistor R9 +U 1 1 62BC8934 +P 4200 5000 +F 0 "R9" H 4250 5130 50 0000 C CNN +F 1 "2k" H 4250 4950 50 0000 C CNN +F 2 "" H 4250 4980 30 0000 C CNN +F 3 "" V 4250 5050 30 0000 C CNN + 1 4200 5000 + 1 0 0 -1 +$EndComp +$Comp +L resistor R6 +U 1 1 62BC8935 +P 3400 5250 +F 0 "R6" H 3450 5380 50 0000 C CNN +F 1 "11k" H 3450 5200 50 0000 C CNN +F 2 "" H 3450 5230 30 0000 C CNN +F 3 "" V 3450 5300 30 0000 C CNN + 1 3400 5250 + 0 1 1 0 +$EndComp +$Comp +L resistor R7 +U 1 1 62BC8936 +P 3400 6050 +F 0 "R7" H 3450 6180 50 0000 C CNN +F 1 "1k" H 3450 6000 50 0000 C CNN +F 2 "" H 3450 6030 30 0000 C CNN +F 3 "" V 3450 6100 30 0000 C CNN + 1 3400 6050 + 0 1 1 0 +$EndComp +$Comp +L eSim_NPN Q6 +U 1 1 62BC8937 +P 2600 5600 +F 0 "Q6" H 2500 5650 50 0000 R CNN +F 1 "eSim_NPN" H 2550 5750 50 0000 R CNN +F 2 "" H 2800 5700 29 0000 C CNN +F 3 "" H 2600 5600 60 0000 C CNN + 1 2600 5600 + -1 0 0 -1 +$EndComp +$Comp +L eSim_NPN Q3 +U 1 1 62BC8938 +P 1650 5400 +F 0 "Q3" H 1550 5450 50 0000 R CNN +F 1 "eSim_NPN" H 1600 5550 50 0000 R CNN +F 2 "" H 1850 5500 29 0000 C CNN +F 3 "" H 1650 5400 60 0000 C CNN + 1 1650 5400 + -1 0 0 -1 +$EndComp +$Comp +L eSim_NPN Q1 +U 1 1 62BC8939 +P 1000 5800 +F 0 "Q1" H 900 5850 50 0000 R CNN +F 1 "eSim_NPN" H 950 5950 50 0000 R CNN +F 2 "" H 1200 5900 29 0000 C CNN +F 3 "" H 1000 5800 60 0000 C CNN + 1 1000 5800 + -1 0 0 -1 +$EndComp +$Comp +L resistor R1 +U 1 1 62BC893B +P 1500 6050 +F 0 "R1" H 1550 6180 50 0000 C CNN +F 1 "2.4k" H 1550 6000 50 0000 C CNN +F 2 "" H 1550 6030 30 0000 C CNN +F 3 "" V 1550 6100 30 0000 C CNN + 1 1500 6050 + 0 1 1 0 +$EndComp +$Comp +L resistor R4 +U 1 1 62BC893C +P 2450 6050 +F 0 "R4" H 2500 6180 50 0000 C CNN +F 1 "160" H 2500 6000 50 0000 C CNN +F 2 "" H 2500 6030 30 0000 C CNN +F 3 "" V 2500 6100 30 0000 C CNN + 1 2450 6050 + 0 1 1 0 +$EndComp +$Comp +L resistor R10 +U 1 1 62BC893D +P 5250 3150 +F 0 "R10" H 5300 3280 50 0000 C CNN +F 1 "409" H 5300 3100 50 0000 C CNN +F 2 "" H 5300 3130 30 0000 C CNN +F 3 "" V 5300 3200 30 0000 C CNN + 1 5250 3150 + 0 1 1 0 +$EndComp +$Comp +L resistor R11 +U 1 1 62BC893E +P 5250 3650 +F 0 "R11" H 5300 3780 50 0000 C CNN +F 1 "11.89k" H 5300 3600 50 0000 C CNN +F 2 "" H 5300 3630 30 0000 C CNN +F 3 "" V 5300 3700 30 0000 C CNN + 1 5250 3650 + 0 1 1 0 +$EndComp +$Comp +L resistor R12 +U 1 1 62BC893F +P 5250 4650 +F 0 "R12" H 5300 4780 50 0000 C CNN +F 1 "1.1k" H 5300 4600 50 0000 C CNN +F 2 "" H 5300 4630 30 0000 C CNN +F 3 "" V 5300 4700 30 0000 C CNN + 1 5250 4650 + 0 1 1 0 +$EndComp +$Comp +L resistor R13 +U 1 1 62BC8940 +P 5250 5250 +F 0 "R13" H 5300 5380 50 0000 C CNN +F 1 "380" H 5300 5200 50 0000 C CNN +F 2 "" H 5300 5230 30 0000 C CNN +F 3 "" V 5300 5300 30 0000 C CNN + 1 5250 5250 + 0 1 1 0 +$EndComp +$Comp +L resistor R14 +U 1 1 62BC8941 +P 5250 6000 +F 0 "R14" H 5300 6130 50 0000 C CNN +F 1 "1.1k" H 5300 5950 50 0000 C CNN +F 2 "" H 5300 5980 30 0000 C CNN +F 3 "" V 5300 6050 30 0000 C CNN + 1 5250 6000 + 0 1 1 0 +$EndComp +$Comp +L eSim_NPN Q15 +U 1 1 62BC8942 +P 6450 5000 +F 0 "Q15" H 6350 5050 50 0000 R CNN +F 1 "eSim_NPN" H 6400 5150 50 0000 R CNN +F 2 "" H 6650 5100 29 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CNN +F 3 "" H 9950 1850 60 0000 C CNN + 3 9950 1850 + -1 0 0 1 +$EndComp +$Comp +L PORT U4 +U 4 1 62BC8954 +P 9950 2400 +F 0 "U4" H 10000 2500 30 0000 C CNN +F 1 "PORT" H 9950 2400 30 0000 C CNN +F 2 "" H 9950 2400 60 0000 C CNN +F 3 "" H 9950 2400 60 0000 C CNN + 4 9950 2400 + -1 0 0 1 +$EndComp +$Comp +L PORT U4 +U 5 1 62BC8955 +P 9950 2900 +F 0 "U4" H 10000 3000 30 0000 C CNN +F 1 "PORT" H 9950 2900 30 0000 C CNN +F 2 "" H 9950 2900 60 0000 C CNN +F 3 "" H 9950 2900 60 0000 C CNN + 5 9950 2900 + -1 0 0 1 +$EndComp +$Comp +L PORT U4 +U 6 1 62BC8956 +P 9950 3250 +F 0 "U4" H 10000 3350 30 0000 C CNN +F 1 "PORT" H 9950 3250 30 0000 C CNN +F 2 "" H 9950 3250 60 0000 C CNN +F 3 "" H 9950 3250 60 0000 C CNN + 6 9950 3250 + -1 0 0 1 +$EndComp +$Comp +L PORT U4 +U 7 1 62BC8957 +P 9950 3650 +F 0 "U4" H 10000 3750 30 0000 C CNN +F 1 "PORT" H 9950 3650 30 0000 C CNN +F 2 "" H 9950 3650 60 0000 C CNN +F 3 "" H 9950 3650 60 0000 C CNN + 7 9950 3650 + -1 0 0 1 +$EndComp +$Comp +L PORT U4 +U 8 1 62BC8958 +P 9950 3950 +F 0 "U4" H 10000 4050 30 0000 C CNN +F 1 "PORT" H 9950 3950 30 0000 C CNN +F 2 "" H 9950 3950 60 0000 C CNN +F 3 "" H 9950 3950 60 0000 C CNN + 8 9950 3950 + -1 0 0 1 +$EndComp +$Comp +L PORT U4 +U 9 1 62BC8959 +P 9950 4250 +F 0 "U4" H 10000 4350 30 0000 C CNN +F 1 "PORT" H 9950 4250 30 0000 C CNN +F 2 "" H 9950 4250 60 0000 C CNN +F 3 "" H 9950 4250 60 0000 C CNN + 9 9950 4250 + -1 0 0 1 +$EndComp +$Comp +L PORT U4 +U 10 1 62BC895A +P 9950 4600 +F 0 "U4" H 10000 4700 30 0000 C CNN +F 1 "PORT" H 9950 4600 30 0000 C CNN +F 2 "" H 9950 4600 60 0000 C CNN +F 3 "" H 9950 4600 60 0000 C CNN + 10 9950 4600 + -1 0 0 1 +$EndComp +$Comp +L PORT U4 +U 11 1 62BC895B +P 9950 5000 +F 0 "U4" H 10000 5100 30 0000 C CNN +F 1 "PORT" H 9950 5000 30 0000 C CNN +F 2 "" H 9950 5000 60 0000 C CNN +F 3 "" H 9950 5000 60 0000 C CNN + 11 9950 5000 + -1 0 0 1 +$EndComp +$Comp +L PORT U4 +U 12 1 62BC895C +P 9950 5300 +F 0 "U4" H 10000 5400 30 0000 C CNN +F 1 "PORT" H 9950 5300 30 0000 C CNN +F 2 "" H 9950 5300 60 0000 C CNN +F 3 "" H 9950 5300 60 0000 C CNN + 12 9950 5300 + -1 0 0 1 +$EndComp +$Comp +L PORT U4 +U 13 1 62BC895D +P 9950 5600 +F 0 "U4" H 10000 5700 30 0000 C CNN +F 1 "PORT" H 9950 5600 30 0000 C CNN +F 2 "" H 9950 5600 60 0000 C CNN +F 3 "" H 9950 5600 60 0000 C CNN + 13 9950 5600 + -1 0 0 1 +$EndComp +$Comp +L PORT U4 +U 14 1 62BC895E +P 9950 6450 +F 0 "U4" H 10000 6550 30 0000 C CNN +F 1 "PORT" H 9950 6450 30 0000 C CNN +F 2 "" H 9950 6450 60 0000 C CNN +F 3 "" H 9950 6450 60 0000 C CNN + 14 9950 6450 + -1 0 0 1 +$EndComp +$Comp +L jfet_n J1 +U 1 1 62BE9EF0 +P 1800 4550 +F 0 "J1" H 1700 4600 50 0000 R CNN +F 1 "jfet_n" H 1750 4700 50 0000 R CNN +F 2 "" H 2000 4650 29 0000 C CNN +F 3 "" H 1800 4550 60 0000 C CNN + 1 1800 4550 + -1 0 0 1 +$EndComp +Wire Wire Line + 1600 2150 900 2150 +Connection ~ 900 2150 +$Comp +L eSim_PNP Q25 +U 1 1 62E05DAD +P 2250 1850 +F 0 "Q25" H 2150 1900 50 0000 R CNN +F 1 "eSim_PNP" H 2200 2000 50 0000 R CNN +F 2 "" H 2450 1950 29 0000 C CNN +F 3 "" H 2250 1850 60 0000 C CNN + 1 2250 1850 + 1 0 0 1 +$EndComp +Wire Wire Line + 2350 1650 2350 1100 +Wire Wire Line + 2350 1100 2600 1100 +Connection ~ 2600 1100 +Wire Wire Line + 2050 1850 2050 1400 +Connection ~ 2050 1400 +Wire Wire Line + 2350 2050 2350 2250 +Wire Wire Line + 2350 2250 1200 2250 +$Comp +L eSim_NPN Q26 +U 1 1 62E06C82 +P 8700 5150 +F 0 "Q26" H 8600 5200 50 0000 R CNN +F 1 "eSim_NPN" H 8650 5300 50 0000 R CNN +F 2 "" H 8900 5250 29 0000 C CNN +F 3 "" H 8700 5150 60 0000 C CNN + 1 8700 5150 + 1 0 0 -1 +$EndComp +Wire Wire Line + 7900 5150 7900 5500 +Connection ~ 7900 5500 +Wire Wire Line + 8800 4950 8250 4950 +Connection ~ 8250 4950 +Wire Wire Line + 7900 5150 8500 5150 +NoConn ~ 9700 5000 +NoConn ~ 9700 5300 +NoConn ~ 9700 5600 +$EndSCHEMATC diff --git a/library/SubcircuitLibrary/LM723/LM723.sub b/library/SubcircuitLibrary/LM723/LM723.sub new file mode 100644 index 00000000..2d8b199b --- /dev/null +++ b/library/SubcircuitLibrary/LM723/LM723.sub @@ -0,0 +1,77 @@ +* Subcircuit LM723 +.subckt LM723 /v+ /vc /vout /vz /vref /compensation /current_limit /current_sense /inverting_input /non-inverting_input ? ? ? /v- +* c:\fossee\esim\library\subcircuitlibrary\lm723\lm723.cir +.include D.lib +.include PNP.lib +.include NJF.lib +.include NPN.lib +* u1 net-_j1-pad3_ /v+ zener +r2 /v+ net-_q4-pad3_ 900 +r5 net-_q25-pad3_ /v+ 550 +q4 net-_q14-pad2_ net-_q14-pad2_ net-_q4-pad3_ Q2N2907A +q5 net-_c1-pad2_ net-_q14-pad2_ net-_q25-pad3_ Q2N2907A +r3 net-_q14-pad2_ net-_j1-pad3_ 22k +q8 /v+ net-_c1-pad2_ /vref Q2N2222 +q2 /v- net-_d1-pad1_ net-_q2-pad3_ Q2N2907A +d1 net-_d1-pad1_ net-_d1-pad2_ 1N4148 +q7 /v- net-_c1-pad1_ net-_d1-pad2_ Q2N2907A +q9 net-_c1-pad1_ net-_q11-pad1_ /vref Q2N2907A +q11 net-_q11-pad1_ net-_c2-pad1_ /vref Q2N2907A +r8 net-_q11-pad1_ net-_c2-pad1_ 1.8k +c1 net-_c1-pad1_ net-_c1-pad2_ 10p +c2 net-_c2-pad1_ net-_c1-pad2_ 5p +* u2 /v- net-_c1-pad2_ zener +r16 /v+ net-_q14-pad3_ 1.8k +r18 net-_q16-pad3_ /v+ 1.8k +q14 net-_q14-pad1_ net-_q14-pad2_ net-_q14-pad3_ Q2N2907A +q16 /compensation net-_q14-pad2_ net-_q16-pad3_ Q2N2907A +q19 /v+ /compensation net-_q19-pad3_ Q2N2222 +q23 /vc net-_q19-pad3_ /vout Q2N2222 +r21 net-_q19-pad3_ /vout 15k +* u3 /vz /vout zener +q12 net-_q11-pad1_ net-_d2-pad2_ net-_q12-pad3_ Q2N2222 +q10 net-_c1-pad1_ net-_d2-pad2_ net-_d2-pad1_ Q2N2222 +d2 net-_d2-pad1_ net-_d2-pad2_ 1N4148 +r9 net-_d2-pad1_ net-_q12-pad3_ 2k +r6 net-_d2-pad1_ net-_r6-pad2_ 11k +r7 net-_r6-pad2_ /v- 1k +q6 net-_j1-pad3_ net-_q17-pad2_ net-_q6-pad3_ Q2N2222 +q3 net-_j1-pad3_ net-_j1-pad1_ net-_q1-pad2_ Q2N2222 +q1 net-_j1-pad1_ net-_q1-pad2_ /v- Q2N2222 +r1 net-_q1-pad2_ /v- 2.4k +r4 net-_q6-pad3_ /v- 160 +r10 /vref net-_q13-pad1_ 409 +r11 net-_q13-pad1_ net-_d2-pad2_ 11.89k +r12 net-_d2-pad2_ net-_q15-pad2_ 1.1k +r13 net-_q15-pad2_ net-_q13-pad2_ 380 +r14 net-_q13-pad2_ /v- 1.1k +q15 net-_q13-pad1_ net-_q15-pad2_ net-_q15-pad3_ Q2N2222 +r17 net-_q15-pad3_ /v- 1.1k +q13 net-_q13-pad1_ net-_q13-pad2_ net-_q13-pad3_ Q2N2222 +r15 net-_q13-pad3_ /v- 1.7k +q17 net-_q14-pad1_ net-_q17-pad2_ net-_q17-pad3_ Q2N2222 +r19 net-_q17-pad3_ /v- 300 +q18 /vref net-_q14-pad1_ net-_q17-pad2_ Q2N2222 +r20 net-_q17-pad2_ /v- 10k +q24 /compensation net-_q24-pad2_ /current_sense Q2N2222 +r24 /current_limit net-_q24-pad2_ 400 +q22 /compensation /inverting_input net-_q20-pad3_ Q2N2222 +q20 /vref /non-inverting_input net-_q20-pad3_ Q2N2222 +q21 net-_q20-pad3_ net-_q17-pad2_ net-_q21-pad3_ Q2N2222 +r22 net-_q21-pad3_ /v- 300 +r23 net-_q26-pad3_ /v- 300 +j1 net-_j1-pad1_ /v- net-_j1-pad3_ J2N3819 +q25 net-_q2-pad3_ net-_q14-pad2_ net-_q25-pad3_ Q2N2907A +q26 net-_q20-pad3_ net-_q17-pad2_ net-_q26-pad3_ Q2N2222 +a1 net-_j1-pad3_ /v+ u1 +a2 /v- net-_c1-pad2_ u2 +a3 /vz /vout u3 +* Schematic Name: zener, NgSpice Name: zener +.model u1 zener(v_breakdown=6.2 i_breakdown=2.0e-2 i_sat=1.0e-12 n_forward=1.0 limit_switch=FALSE ) +* Schematic Name: zener, NgSpice Name: zener +.model u2 zener(v_breakdown=5.7 i_breakdown=2.0e-2 i_sat=1.0e-12 n_forward=1.0 limit_switch=FALSE ) +* Schematic Name: zener, NgSpice Name: zener +.model u3 zener(v_breakdown=5.6 i_breakdown=2.0e-2 i_sat=1.0e-12 n_forward=1.0 limit_switch=FALSE ) +* Control Statements + +.ends LM723 \ No newline at end of file diff --git a/library/SubcircuitLibrary/LM723/LM723_Previous_Values.xml b/library/SubcircuitLibrary/LM723/LM723_Previous_Values.xml new file mode 100644 index 00000000..730dd730 --- /dev/null +++ b/library/SubcircuitLibrary/LM723/LM723_Previous_Values.xml @@ -0,0 +1 @@ +zener6.2zener5.7zenerC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.libC:\FOSSEE\eSim\library\deviceModelLibrary\Diode\D.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libC:\FOSSEE\eSim\library\deviceModelLibrary\Diode\D.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libC:\FOSSEE\eSim\library\deviceModelLibrary\JFET\NJF.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libtruefalsefalseHzHz0Volts or AmperesVolts or AmperesVolts or AmperesVolts or AmperesVolts or AmperesVolts or AmperesSecSecSec \ No newline at end of file diff --git a/library/SubcircuitLibrary/LM723/NJF.lib b/library/SubcircuitLibrary/LM723/NJF.lib new file mode 100644 index 00000000..dbb2cbae --- /dev/null +++ b/library/SubcircuitLibrary/LM723/NJF.lib @@ -0,0 +1,4 @@ +.model J2N3819 NJF(Beta=1.304m Betatce=-.5 Rd=1 Rs=1 Lambda=2.25m Vto=-3 ++ Vtotc=-2.5m Is=33.57f Isr=322.4f N=1 Nr=2 Xti=3 Alpha=311.7u ++ Vk=243.6 Cgd=1.6p M=.3622 Pb=1 Fc=.5 Cgs=2.414p Kf=9.882E-18 ++ Af=1) diff --git a/library/SubcircuitLibrary/LM723/NMOS-180nm.lib b/library/SubcircuitLibrary/LM723/NMOS-180nm.lib new file mode 100644 index 00000000..51e9b119 --- /dev/null +++ b/library/SubcircuitLibrary/LM723/NMOS-180nm.lib @@ -0,0 +1,13 @@ +.model CMOSN NMOS (LEVEL=8 VERSION=3.2 TNOM=27 TOX=4.1E-9 XJ=1E-7 NCH=2.3549E17 VTH0=0.3823463 K1=0.5810697 ++ K2=4.774618E-3 K3=0.0431669 K3B=1.1498346 W0=1E-7 NLX=1.910552E-7 DVT0W=0 DVT1W=0 DVT2W=0 ++ DVT0=1.2894824 DVT1=0.3622063 DVT2=0.0713729 U0=280.633249 UA=-1.208537E-9 UB=2.158625E-18 ++ UC=5.342807E-11 VSAT=9.366802E4 A0=1.7593146 AGS=0.3939741 B0=-6.413949E-9 B1=-1E-7 KETA=-5.180424E-4 ++ A1=0 A2=1 RDSW=105.5517558 PRWG=0.5 PRWB=-0.1998871 WR=1 WINT=7.904732E-10 LINT=1.571424E-8 XL=0 ++ XW=-1E-8 DWG=1.297221E-9 DWB=1.479041E-9 VOFF=-0.0955434 NFACTOR=2.4358891 CIT=0 CDSC=2.4E-4 CDSCD=0 ++ CDSCB=0 ETA0=3.104851E-3 ETAB=-2.512384E-5 DSUB=0.0167075 PCLM=0.8073191 PDIBLC1=0.1666161 PDIBLC2=3.112892E-3 ++ PDIBLCB=-0.1 DROUT=0.7875618 PSCBE1=8E10 PSCBE2=9.213635E-10 PVAG=3.85243E-3 DELTA=0.01 RSH=6.7 MOBMOD=1 ++ PRT=0 UTE=-1.5 KT1=-0.11 KT1L=0 KT2=0.022 UA1=4.31E-9 UB1=-7.61E-18 UC1=-5.6E-11 AT=3.3E4 WL=0 WLN=1 ++ WW=0 WWN=1 WWL=0 LL=0 LLN=1 LW=0 LWN=1 LWL=0 CAPMOD=2 XPART=0.5 CGDO=7.08E-10 CGSO=7.08E-10 CGBO=1E-12 ++ CJ=9.68858E-4 PB=0.8 MJ=0.3864502 CJSW=2.512138E-10 PBSW=0.809286 MJSW=0.1060414 CJSWG=3.3E-10 PBSWG=0.809286 ++ MJSWG=0.1060414 CF=0 PVTH0=-1.192722E-3 PRDSW=-5 PK2=6.450505E-5 WKETA=-4.27294E-4 LKETA=-0.0104078 ++ PU0=6.3268729 PUA=2.226552E-11 PUB=0 PVSAT=969.1480157 PETA0=1E-4 PKETA=-1.049509E-3) diff --git a/library/SubcircuitLibrary/LM723/NPN.lib b/library/SubcircuitLibrary/LM723/NPN.lib new file mode 100644 index 00000000..be5f3073 --- /dev/null +++ b/library/SubcircuitLibrary/LM723/NPN.lib @@ -0,0 +1,4 @@ +.model Q2N2222 NPN( Is=14.34f Xti=3 Eg=1.11 Vaf=74.03 Bf=400 Ne=1.307 ++ Ise=14.34f Ikf=0.2847 Xtb=1.5 Br=6.092 Nc=2 Isc=0 Ikr=0 Rc=1 Cjc=7.306p ++ Mjc=0.3416 Vjc=0.75 Fc=0.5 Cje=22.01p Mje=0.377 Vje=0.75 Tr=46.91n Tf=411.1p ++ Itf=0.6 Vtf=1.7 Xtf=3 Rb=10) diff --git a/library/SubcircuitLibrary/LM723/PNP.lib b/library/SubcircuitLibrary/LM723/PNP.lib new file mode 100644 index 00000000..7edda0ea --- /dev/null +++ b/library/SubcircuitLibrary/LM723/PNP.lib @@ -0,0 +1,4 @@ +.model Q2N2907A PNP(Is=650.6E-18 Xti=3 Eg=1.11 Vaf=115.7 Bf=231.7 Ne=1.829 ++ Ise=54.81f Ikf=1.079 Xtb=1.5 Br=3.563 Nc=2 Isc=0 Ikr=0 Rc=.715 ++ Cjc=14.76p Mjc=.5383 Vjc=.75 Fc=.5 Cje=19.82p Mje=.3357 Vje=.75 ++ Tr=111.3n Tf=603.7p Itf=.65 Vtf=5 Xtf=1.7 Rb=10) diff --git a/library/SubcircuitLibrary/LM723/README.md b/library/SubcircuitLibrary/LM723/README.md new file mode 100644 index 00000000..291d0bd9 --- /dev/null +++ b/library/SubcircuitLibrary/LM723/README.md @@ -0,0 +1,36 @@ + +# LM723 Adjustable Voltage Regulator IC + +LM723 is an adjustable voltage regulator IC. It’s regulated output can be determined, by the external circuitry. It’s output can range from 2V to 37V. It can be used either as a linear regulator or a switching regulator. The Line Regulation & Load Regulation observed for this IC is 0.089% and 0.351% respectively. + + +## Usage/Examples + +Basic High Voltage Regulator + +Positive/Negative Voltage Regulator + +Positive/Negative Switching Regulator + +Foldback Current Limiting + +Positive/Negative Floating Regulator + +Shunt Regulator + + +## Documentation + +To know the details of LM723 IC please refer to this link [LM723_datasheet.](https://www.ti.com/lit/ds/symlink/lm723.pdf?ts=1665878014301&ref_url=https%253A%252F%252Fwww.google.com%252F) + +## Comments/Notes + +Please note this is a complete analog IC. It works fine at the time of simulation. + +## Contributor + +Name: Arpit Sharma +Email: arpitniraliya306@gmail.com +Year: 2022 +Position: FOSSEE Summer Fellowship Intern 2022 + diff --git a/library/SubcircuitLibrary/LM723/analysis b/library/SubcircuitLibrary/LM723/analysis new file mode 100644 index 00000000..ebd5c0a9 --- /dev/null +++ b/library/SubcircuitLibrary/LM723/analysis @@ -0,0 +1 @@ +.tran 0e-00 0e-00 0e-00 \ No newline at end of file -- cgit From ab2a8d5a8371b5ca00292bb961ca07a56477d663 Mon Sep 17 00:00:00 2001 From: Arpit Sharma Date: Fri, 21 Oct 2022 23:10:18 +0530 Subject: LM1458 Op-Amp IC --- library/SubcircuitLibrary/lm1458/D.lib | 2 + library/SubcircuitLibrary/lm1458/NPN.lib | 4 + library/SubcircuitLibrary/lm1458/PNP.lib | 4 + library/SubcircuitLibrary/lm1458/README.md | 35 + library/SubcircuitLibrary/lm1458/analysis | 1 + library/SubcircuitLibrary/lm1458/lm1458-cache.lib | 145 +++ library/SubcircuitLibrary/lm1458/lm1458.cir | 81 ++ library/SubcircuitLibrary/lm1458/lm1458.cir.out | 85 ++ library/SubcircuitLibrary/lm1458/lm1458.pro | 81 ++ library/SubcircuitLibrary/lm1458/lm1458.sch | 1313 ++++++++++++++++++++ library/SubcircuitLibrary/lm1458/lm1458.sub | 79 ++ .../lm1458/lm1458_Previous_Values.xml | 1 + 12 files changed, 1831 insertions(+) create mode 100644 library/SubcircuitLibrary/lm1458/D.lib create mode 100644 library/SubcircuitLibrary/lm1458/NPN.lib create mode 100644 library/SubcircuitLibrary/lm1458/PNP.lib create mode 100644 library/SubcircuitLibrary/lm1458/README.md create mode 100644 library/SubcircuitLibrary/lm1458/analysis create mode 100644 library/SubcircuitLibrary/lm1458/lm1458-cache.lib create mode 100644 library/SubcircuitLibrary/lm1458/lm1458.cir create mode 100644 library/SubcircuitLibrary/lm1458/lm1458.cir.out create mode 100644 library/SubcircuitLibrary/lm1458/lm1458.pro create mode 100644 library/SubcircuitLibrary/lm1458/lm1458.sch create mode 100644 library/SubcircuitLibrary/lm1458/lm1458.sub create mode 100644 library/SubcircuitLibrary/lm1458/lm1458_Previous_Values.xml diff --git a/library/SubcircuitLibrary/lm1458/D.lib b/library/SubcircuitLibrary/lm1458/D.lib new file mode 100644 index 00000000..f53bf3e0 --- /dev/null +++ b/library/SubcircuitLibrary/lm1458/D.lib @@ -0,0 +1,2 @@ +.model 1N4148 D(is=2.495E-09 rs=4.755E-01 n=1.679E+00 tt=3.030E-09 cjo=1.700E-12 vj=1 m=1.959E-01 bv=1.000E+02 ibv=1.000E-04) + diff --git a/library/SubcircuitLibrary/lm1458/NPN.lib b/library/SubcircuitLibrary/lm1458/NPN.lib new file mode 100644 index 00000000..be5f3073 --- /dev/null +++ b/library/SubcircuitLibrary/lm1458/NPN.lib @@ -0,0 +1,4 @@ +.model Q2N2222 NPN( Is=14.34f Xti=3 Eg=1.11 Vaf=74.03 Bf=400 Ne=1.307 ++ Ise=14.34f Ikf=0.2847 Xtb=1.5 Br=6.092 Nc=2 Isc=0 Ikr=0 Rc=1 Cjc=7.306p ++ Mjc=0.3416 Vjc=0.75 Fc=0.5 Cje=22.01p Mje=0.377 Vje=0.75 Tr=46.91n Tf=411.1p ++ Itf=0.6 Vtf=1.7 Xtf=3 Rb=10) diff --git a/library/SubcircuitLibrary/lm1458/PNP.lib b/library/SubcircuitLibrary/lm1458/PNP.lib new file mode 100644 index 00000000..7edda0ea --- /dev/null +++ b/library/SubcircuitLibrary/lm1458/PNP.lib @@ -0,0 +1,4 @@ +.model Q2N2907A PNP(Is=650.6E-18 Xti=3 Eg=1.11 Vaf=115.7 Bf=231.7 Ne=1.829 ++ Ise=54.81f Ikf=1.079 Xtb=1.5 Br=3.563 Nc=2 Isc=0 Ikr=0 Rc=.715 ++ Cjc=14.76p Mjc=.5383 Vjc=.75 Fc=.5 Cje=19.82p Mje=.3357 Vje=.75 ++ Tr=111.3n Tf=603.7p Itf=.65 Vtf=5 Xtf=1.7 Rb=10) diff --git a/library/SubcircuitLibrary/lm1458/README.md b/library/SubcircuitLibrary/lm1458/README.md new file mode 100644 index 00000000..e3ed0ae9 --- /dev/null +++ b/library/SubcircuitLibrary/lm1458/README.md @@ -0,0 +1,35 @@ + +# LM1458 Dual Operational Amplifier IC + +LM1458 is a general purpose, Dual Channel Operational Amplifier IC. Both the Amplifiers operate independently but they share common supply. It has inbuilt short circuit protection & offers low power consumption. No frequency compensation is needed. + + +## Usage/Examples + +Inverting/Non-Inverting Amplifier + +Integrator/Summer + +Differential Amplifier + +Differentiator + +Schmitt Trigger + +Comparators + + +## Documentation + +To know the details of LM1458 IC please refer to this link [LM1458_datasheet.](https://www.ti.com/lit/ds/symlink/lm1458.pdf?ts=1665941946373&ref_url=https%253A%252F%252Fwww.google.com%252F) + +## Comments/Notes + +Please note this is a complete analog IC. It works fine at the time of simulation. + +## Contributor + +Name: Arpit Sharma +Email: arpitniraliya306@gmail.com +Year: 2022 +Position: FOSSEE Summer Fellowship Intern 2022 diff --git a/library/SubcircuitLibrary/lm1458/analysis b/library/SubcircuitLibrary/lm1458/analysis new file mode 100644 index 00000000..ebd5c0a9 --- /dev/null +++ b/library/SubcircuitLibrary/lm1458/analysis @@ -0,0 +1 @@ +.tran 0e-00 0e-00 0e-00 \ No newline at end of file diff --git a/library/SubcircuitLibrary/lm1458/lm1458-cache.lib b/library/SubcircuitLibrary/lm1458/lm1458-cache.lib new file mode 100644 index 00000000..d80602ef --- /dev/null +++ b/library/SubcircuitLibrary/lm1458/lm1458-cache.lib @@ -0,0 +1,145 @@ +EESchema-LIBRARY Version 2.3 +#encoding utf-8 +# +# PORT +# +DEF PORT U 0 40 Y Y 26 F N +F0 "U" 50 100 30 H V C CNN +F1 "PORT" 0 0 30 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0 +A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50 +S -100 50 100 -50 0 1 0 N +X ~ 1 250 0 100 L 30 30 1 1 B +X ~ 2 250 0 100 L 30 30 2 1 B +X ~ 3 250 0 100 L 30 30 3 1 B +X ~ 4 250 0 100 L 30 30 4 1 B +X ~ 5 250 0 100 L 30 30 5 1 B +X ~ 6 250 0 100 L 30 30 6 1 B +X ~ 7 250 0 100 L 30 30 7 1 B +X ~ 8 250 0 100 L 30 30 8 1 B +X ~ 9 250 0 100 L 30 30 9 1 B +X ~ 10 250 0 100 L 30 30 10 1 B +X ~ 11 250 0 100 L 30 30 11 1 B +X ~ 12 250 0 100 L 30 30 12 1 B +X ~ 13 250 0 100 L 30 30 13 1 B +X ~ 14 250 0 100 L 30 30 14 1 B +X ~ 15 250 0 100 L 30 30 15 1 B +X ~ 16 250 0 100 L 30 30 16 1 B +X ~ 17 250 0 100 L 30 30 17 1 B +X ~ 18 250 0 100 L 30 30 18 1 B +X ~ 19 250 0 100 L 30 30 19 1 B +X ~ 20 250 0 100 L 30 30 20 1 B +X ~ 21 250 0 100 L 30 30 21 1 B +X ~ 22 250 0 100 L 30 30 22 1 B +X ~ 23 250 0 100 L 30 30 23 1 B +X ~ 24 250 0 100 L 30 30 24 1 B +X ~ 25 250 0 100 L 30 30 25 1 B +X ~ 26 250 0 100 L 30 30 26 1 B +ENDDRAW +ENDDEF +# +# eSim_C +# +DEF eSim_C C 0 10 N Y 1 F N +F0 "C" 25 100 50 H V L CNN +F1 "eSim_C" 25 -100 50 H V L CNN +F2 "" 38 -150 30 H V C CNN +F3 "" 0 0 60 H V C CNN +ALIAS capacitor +$FPLIST + C_* +$ENDFPLIST +DRAW +P 2 0 1 20 -80 -30 80 -30 N +P 2 0 1 20 -80 30 80 30 N +X ~ 1 0 150 110 D 40 40 1 1 P +X ~ 2 0 -150 110 U 40 40 1 1 P +ENDDRAW +ENDDEF +# +# eSim_Diode +# +DEF eSim_Diode D 0 40 N N 1 F N +F0 "D" 0 100 50 H V C CNN +F1 "eSim_Diode" 0 -100 50 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +$FPLIST + TO-???* + *SingleDiode + *_Diode_* + *SingleDiode* + D_* +$ENDFPLIST +DRAW +T 0 -100 50 60 0 0 0 A Normal 0 C C +T 0 100 50 60 0 0 0 K Normal 0 C C +P 2 0 1 6 50 50 50 -50 N +P 3 0 1 0 -50 50 50 0 -50 -50 F +X A 1 -150 0 100 R 40 40 1 1 P +X K 2 150 0 100 L 40 40 1 1 P +ENDDRAW +ENDDEF +# +# eSim_NPN +# +DEF eSim_NPN Q 0 0 Y N 1 F N +F0 "Q" -100 50 50 H V R CNN +F1 "eSim_NPN" -50 150 50 H V R CNN +F2 "" 200 100 29 H V C CNN +F3 "" 0 0 60 H V C CNN +ALIAS BC547 Q2N2222 +DRAW +C 50 0 111 0 1 10 N +P 2 0 1 0 25 25 100 100 N +P 3 0 1 0 25 -25 100 -100 100 -100 N +P 3 0 1 20 25 75 25 -75 25 -75 N +P 5 0 1 0 50 -70 70 -50 90 -90 50 -70 50 -70 F +X C 1 100 200 100 D 50 50 1 1 P +X B 2 -200 0 225 R 50 50 1 1 P +X E 3 100 -200 100 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# eSim_PNP +# +DEF eSim_PNP Q 0 0 Y N 1 F N +F0 "Q" -100 50 50 H V R CNN +F1 "eSim_PNP" -50 150 50 H V R CNN +F2 "" 200 100 29 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +C 50 0 111 0 1 10 N +P 2 0 1 0 25 25 100 100 N +P 3 0 1 0 25 -25 100 -100 100 -100 N +P 3 0 1 20 25 75 25 -75 25 -75 N +P 5 0 1 0 90 -70 70 -90 50 -50 90 -70 90 -70 F +X C 1 100 200 100 D 50 50 1 1 P +X B 2 -200 0 225 R 50 50 1 1 P +X E 3 100 -200 100 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# eSim_R +# +DEF eSim_R R 0 0 N Y 1 F N +F0 "R" 50 130 50 H V C CNN +F1 "eSim_R" 50 -50 50 H V C CNN +F2 "" 50 -20 30 H V C CNN +F3 "" 50 50 30 V V C CNN +ALIAS resistor +$FPLIST + R_* + Resistor_* +$ENDFPLIST +DRAW +S 150 10 -50 90 0 1 10 N +X ~ 1 -100 50 50 R 60 60 1 1 P +X ~ 2 200 50 50 L 60 60 1 1 P +ENDDRAW +ENDDEF +# +#End Library diff --git a/library/SubcircuitLibrary/lm1458/lm1458.cir b/library/SubcircuitLibrary/lm1458/lm1458.cir new file mode 100644 index 00000000..a870732e --- /dev/null +++ b/library/SubcircuitLibrary/lm1458/lm1458.cir @@ -0,0 +1,81 @@ +* C:\FOSSEE\eSim\library\SubcircuitLibrary\lm1458\lm1458.cir + +* EESchema Netlist Version 1.1 (Spice format) creation date: 09/09/22 23:07:58 + +* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N +* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +* Sheet Name: / +Q5 Net-_Q1-Pad1_ Net-_Q1-Pad1_ Net-_Q12-Pad3_ eSim_PNP +Q9 Net-_Q10-Pad1_ Net-_Q1-Pad1_ Net-_Q12-Pad3_ eSim_PNP +Q12 Net-_Q12-Pad1_ Net-_Q12-Pad1_ Net-_Q12-Pad3_ eSim_PNP +Q15 Net-_C1-Pad1_ Net-_Q12-Pad1_ Net-_Q12-Pad3_ eSim_PNP +Q1 Net-_Q1-Pad1_ Net-_Q1-Pad2_ Net-_Q1-Pad3_ eSim_NPN +Q2 Net-_Q2-Pad1_ Net-_Q10-Pad1_ Net-_Q1-Pad3_ eSim_PNP +Q8 Net-_Q1-Pad1_ Net-_Q8-Pad2_ Net-_Q6-Pad3_ eSim_NPN +Q6 Net-_C1-Pad2_ Net-_Q10-Pad1_ Net-_Q6-Pad3_ eSim_PNP +Q4 Net-_Q12-Pad3_ Net-_Q2-Pad1_ Net-_Q3-Pad2_ eSim_NPN +Q3 Net-_Q2-Pad1_ Net-_Q3-Pad2_ Net-_Q3-Pad3_ eSim_NPN +Q7 Net-_C1-Pad2_ Net-_Q3-Pad2_ Net-_Q7-Pad3_ eSim_NPN +R1 Net-_Q3-Pad3_ Net-_Q11-Pad3_ 1k +R2 Net-_Q3-Pad2_ Net-_Q11-Pad3_ 50k +R3 Net-_Q7-Pad3_ Net-_Q11-Pad3_ 1k +R5 Net-_Q12-Pad1_ Net-_R5-Pad2_ 19.5k +R6 Net-_R5-Pad2_ Net-_Q10-Pad2_ 19.5k +Q10 Net-_Q10-Pad1_ Net-_Q10-Pad2_ Net-_Q10-Pad3_ eSim_NPN +Q11 Net-_Q10-Pad2_ Net-_Q10-Pad2_ Net-_Q11-Pad3_ eSim_NPN +R4 Net-_Q10-Pad3_ Net-_Q11-Pad3_ 5k +C1 Net-_C1-Pad1_ Net-_C1-Pad2_ 30p +Q13 Net-_C1-Pad2_ Net-_Q13-Pad2_ Net-_Q11-Pad3_ eSim_NPN +Q14 Net-_D1-Pad2_ Net-_C1-Pad2_ Net-_Q14-Pad3_ eSim_NPN +R7 Net-_Q14-Pad3_ Net-_Q11-Pad3_ 50k +Q16 Net-_C1-Pad1_ Net-_Q16-Pad2_ Net-_D1-Pad2_ eSim_NPN +Q17 Net-_D1-Pad2_ Net-_Q14-Pad3_ Net-_Q13-Pad2_ eSim_NPN +R10 Net-_Q13-Pad2_ Net-_Q11-Pad3_ 50 +R8 Net-_C1-Pad1_ Net-_Q16-Pad2_ 4.5k +R9 Net-_D1-Pad2_ Net-_Q16-Pad2_ 7.5k +Q18 Net-_C1-Pad1_ Net-_Q18-Pad2_ Net-_D2-Pad1_ eSim_NPN +Q19 Net-_Q12-Pad3_ Net-_C1-Pad1_ Net-_Q18-Pad2_ eSim_NPN +R11 Net-_Q18-Pad2_ Net-_D2-Pad1_ 25 +D1 Net-_D1-Pad1_ Net-_D1-Pad2_ eSim_Diode +D2 Net-_D2-Pad1_ Net-_D1-Pad1_ eSim_Diode +R12 Net-_D2-Pad1_ Net-_Q20-Pad3_ 50 +Q20 Net-_Q11-Pad3_ Net-_D1-Pad2_ Net-_Q20-Pad3_ eSim_PNP +Q25 Net-_Q21-Pad1_ Net-_Q21-Pad1_ Net-_Q12-Pad3_ eSim_PNP +Q29 Net-_Q22-Pad2_ Net-_Q21-Pad1_ Net-_Q12-Pad3_ eSim_PNP +Q32 Net-_Q32-Pad1_ Net-_Q32-Pad1_ Net-_Q12-Pad3_ eSim_PNP +Q35 Net-_C2-Pad1_ Net-_Q32-Pad1_ Net-_Q12-Pad3_ eSim_PNP +Q21 Net-_Q21-Pad1_ Net-_Q21-Pad2_ Net-_Q21-Pad3_ eSim_NPN +Q22 Net-_Q22-Pad1_ Net-_Q22-Pad2_ Net-_Q21-Pad3_ eSim_PNP +Q28 Net-_Q21-Pad1_ Net-_Q28-Pad2_ Net-_Q26-Pad3_ eSim_NPN +Q26 Net-_C2-Pad2_ Net-_Q22-Pad2_ Net-_Q26-Pad3_ eSim_PNP +Q24 Net-_Q12-Pad3_ Net-_Q22-Pad1_ Net-_Q23-Pad2_ eSim_NPN +Q23 Net-_Q22-Pad1_ Net-_Q23-Pad2_ Net-_Q23-Pad3_ eSim_NPN +Q27 Net-_C2-Pad2_ Net-_Q23-Pad2_ Net-_Q27-Pad3_ eSim_NPN +R13 Net-_Q23-Pad3_ Net-_Q11-Pad3_ 1k +R14 Net-_Q23-Pad2_ Net-_Q11-Pad3_ 50k +R15 Net-_Q27-Pad3_ Net-_Q11-Pad3_ 1k +R17 Net-_Q32-Pad1_ Net-_R17-Pad2_ 19.5k +R18 Net-_R17-Pad2_ Net-_Q30-Pad2_ 19.5k +Q30 Net-_Q22-Pad2_ Net-_Q30-Pad2_ Net-_Q30-Pad3_ eSim_NPN +Q31 Net-_Q30-Pad2_ Net-_Q30-Pad2_ Net-_Q11-Pad3_ eSim_NPN +R16 Net-_Q30-Pad3_ Net-_Q11-Pad3_ 5k +C2 Net-_C2-Pad1_ Net-_C2-Pad2_ 30p +Q33 Net-_C2-Pad2_ Net-_Q33-Pad2_ Net-_Q11-Pad3_ eSim_NPN +Q34 Net-_D3-Pad2_ Net-_C2-Pad2_ Net-_Q34-Pad3_ eSim_NPN +R19 Net-_Q34-Pad3_ Net-_Q11-Pad3_ 50k +Q36 Net-_C2-Pad1_ Net-_Q36-Pad2_ Net-_D3-Pad2_ eSim_NPN +Q37 Net-_D3-Pad2_ Net-_Q34-Pad3_ Net-_Q33-Pad2_ eSim_NPN +R22 Net-_Q33-Pad2_ Net-_Q11-Pad3_ 50 +R20 Net-_C2-Pad1_ Net-_Q36-Pad2_ 4.5k +R21 Net-_D3-Pad2_ Net-_Q36-Pad2_ 7.5k +Q38 Net-_C2-Pad1_ Net-_Q38-Pad2_ Net-_D4-Pad1_ eSim_NPN +Q39 Net-_Q12-Pad3_ Net-_C2-Pad1_ Net-_Q38-Pad2_ eSim_NPN +R23 Net-_Q38-Pad2_ Net-_D4-Pad1_ 25 +D3 Net-_D3-Pad1_ Net-_D3-Pad2_ eSim_Diode +D4 Net-_D4-Pad1_ Net-_D3-Pad1_ eSim_Diode +R24 Net-_D4-Pad1_ Net-_Q40-Pad3_ 50 +Q40 Net-_Q11-Pad3_ Net-_D3-Pad2_ Net-_Q40-Pad3_ eSim_PNP +U1 Net-_Q1-Pad2_ Net-_Q8-Pad2_ Net-_Q11-Pad3_ Net-_Q21-Pad2_ Net-_Q12-Pad3_ Net-_D2-Pad1_ Net-_Q28-Pad2_ Net-_D4-Pad1_ PORT + +.end diff --git a/library/SubcircuitLibrary/lm1458/lm1458.cir.out b/library/SubcircuitLibrary/lm1458/lm1458.cir.out new file mode 100644 index 00000000..0a97abf0 --- /dev/null +++ b/library/SubcircuitLibrary/lm1458/lm1458.cir.out @@ -0,0 +1,85 @@ +* c:\fossee\esim\library\subcircuitlibrary\lm1458\lm1458.cir + +.include D.lib +.include NPN.lib +.include PNP.lib +q5 net-_q1-pad1_ net-_q1-pad1_ net-_q12-pad3_ Q2N2907A +q9 net-_q10-pad1_ net-_q1-pad1_ net-_q12-pad3_ Q2N2907A +q12 net-_q12-pad1_ net-_q12-pad1_ net-_q12-pad3_ Q2N2907A +q15 net-_c1-pad1_ net-_q12-pad1_ net-_q12-pad3_ Q2N2907A +q1 net-_q1-pad1_ net-_q1-pad2_ net-_q1-pad3_ Q2N2222 +q2 net-_q2-pad1_ net-_q10-pad1_ net-_q1-pad3_ Q2N2907A +q8 net-_q1-pad1_ net-_q8-pad2_ net-_q6-pad3_ Q2N2222 +q6 net-_c1-pad2_ net-_q10-pad1_ net-_q6-pad3_ Q2N2907A +q4 net-_q12-pad3_ net-_q2-pad1_ net-_q3-pad2_ Q2N2222 +q3 net-_q2-pad1_ net-_q3-pad2_ net-_q3-pad3_ Q2N2222 +q7 net-_c1-pad2_ net-_q3-pad2_ net-_q7-pad3_ Q2N2222 +r1 net-_q3-pad3_ net-_q11-pad3_ 1k +r2 net-_q3-pad2_ net-_q11-pad3_ 50k +r3 net-_q7-pad3_ net-_q11-pad3_ 1k +r5 net-_q12-pad1_ net-_r5-pad2_ 19.5k +r6 net-_r5-pad2_ net-_q10-pad2_ 19.5k +q10 net-_q10-pad1_ net-_q10-pad2_ net-_q10-pad3_ Q2N2222 +q11 net-_q10-pad2_ net-_q10-pad2_ net-_q11-pad3_ Q2N2222 +r4 net-_q10-pad3_ net-_q11-pad3_ 5k +c1 net-_c1-pad1_ net-_c1-pad2_ 30p +q13 net-_c1-pad2_ net-_q13-pad2_ net-_q11-pad3_ Q2N2222 +q14 net-_d1-pad2_ net-_c1-pad2_ net-_q14-pad3_ Q2N2222 +r7 net-_q14-pad3_ net-_q11-pad3_ 50k +q16 net-_c1-pad1_ net-_q16-pad2_ net-_d1-pad2_ Q2N2222 +q17 net-_d1-pad2_ net-_q14-pad3_ net-_q13-pad2_ Q2N2222 +r10 net-_q13-pad2_ net-_q11-pad3_ 50 +r8 net-_c1-pad1_ net-_q16-pad2_ 4.5k +r9 net-_d1-pad2_ net-_q16-pad2_ 7.5k +q18 net-_c1-pad1_ net-_q18-pad2_ net-_d2-pad1_ Q2N2222 +q19 net-_q12-pad3_ net-_c1-pad1_ net-_q18-pad2_ Q2N2222 +r11 net-_q18-pad2_ net-_d2-pad1_ 25 +d1 net-_d1-pad1_ net-_d1-pad2_ 1N4148 +d2 net-_d2-pad1_ net-_d1-pad1_ 1N4148 +r12 net-_d2-pad1_ net-_q20-pad3_ 50 +q20 net-_q11-pad3_ net-_d1-pad2_ net-_q20-pad3_ Q2N2907A +q25 net-_q21-pad1_ net-_q21-pad1_ net-_q12-pad3_ Q2N2907A +q29 net-_q22-pad2_ net-_q21-pad1_ net-_q12-pad3_ Q2N2907A +q32 net-_q32-pad1_ net-_q32-pad1_ net-_q12-pad3_ Q2N2907A +q35 net-_c2-pad1_ net-_q32-pad1_ net-_q12-pad3_ Q2N2907A +q21 net-_q21-pad1_ net-_q21-pad2_ net-_q21-pad3_ Q2N2222 +q22 net-_q22-pad1_ net-_q22-pad2_ net-_q21-pad3_ Q2N2907A +q28 net-_q21-pad1_ net-_q28-pad2_ net-_q26-pad3_ Q2N2222 +q26 net-_c2-pad2_ net-_q22-pad2_ net-_q26-pad3_ Q2N2907A +q24 net-_q12-pad3_ net-_q22-pad1_ net-_q23-pad2_ Q2N2222 +q23 net-_q22-pad1_ net-_q23-pad2_ net-_q23-pad3_ Q2N2222 +q27 net-_c2-pad2_ net-_q23-pad2_ net-_q27-pad3_ Q2N2222 +r13 net-_q23-pad3_ net-_q11-pad3_ 1k +r14 net-_q23-pad2_ net-_q11-pad3_ 50k +r15 net-_q27-pad3_ net-_q11-pad3_ 1k +r17 net-_q32-pad1_ net-_r17-pad2_ 19.5k +r18 net-_r17-pad2_ net-_q30-pad2_ 19.5k +q30 net-_q22-pad2_ net-_q30-pad2_ net-_q30-pad3_ Q2N2222 +q31 net-_q30-pad2_ net-_q30-pad2_ net-_q11-pad3_ Q2N2222 +r16 net-_q30-pad3_ net-_q11-pad3_ 5k +c2 net-_c2-pad1_ net-_c2-pad2_ 30p +q33 net-_c2-pad2_ net-_q33-pad2_ net-_q11-pad3_ Q2N2222 +q34 net-_d3-pad2_ net-_c2-pad2_ net-_q34-pad3_ Q2N2222 +r19 net-_q34-pad3_ net-_q11-pad3_ 50k +q36 net-_c2-pad1_ net-_q36-pad2_ net-_d3-pad2_ Q2N2222 +q37 net-_d3-pad2_ net-_q34-pad3_ net-_q33-pad2_ Q2N2222 +r22 net-_q33-pad2_ net-_q11-pad3_ 50 +r20 net-_c2-pad1_ net-_q36-pad2_ 4.5k +r21 net-_d3-pad2_ net-_q36-pad2_ 7.5k +q38 net-_c2-pad1_ net-_q38-pad2_ net-_d4-pad1_ Q2N2222 +q39 net-_q12-pad3_ net-_c2-pad1_ net-_q38-pad2_ Q2N2222 +r23 net-_q38-pad2_ net-_d4-pad1_ 25 +d3 net-_d3-pad1_ net-_d3-pad2_ 1N4148 +d4 net-_d4-pad1_ net-_d3-pad1_ 1N4148 +r24 net-_d4-pad1_ net-_q40-pad3_ 50 +q40 net-_q11-pad3_ net-_d3-pad2_ net-_q40-pad3_ Q2N2907A +* u1 net-_q1-pad2_ net-_q8-pad2_ net-_q11-pad3_ net-_q21-pad2_ net-_q12-pad3_ net-_d2-pad1_ net-_q28-pad2_ net-_d4-pad1_ port +.tran 0e-00 0e-00 0e-00 + +* Control Statements +.control +run +print allv > plot_data_v.txt +print alli > plot_data_i.txt +.endc +.end diff --git a/library/SubcircuitLibrary/lm1458/lm1458.pro b/library/SubcircuitLibrary/lm1458/lm1458.pro new file mode 100644 index 00000000..1c549d98 --- /dev/null +++ b/library/SubcircuitLibrary/lm1458/lm1458.pro @@ -0,0 +1,81 @@ +update=09/24/22 18:31:22 +version=1 +last_client=eeschema +[general] +version=1 +RootSch= +BoardNm= +[pcbnew] +version=1 +LastNetListRead= +UseCmpFile=1 +PadDrill=0.600000000000 +PadDrillOvalY=0.600000000000 +PadSizeH=1.500000000000 +PadSizeV=1.500000000000 +PcbTextSizeV=1.500000000000 +PcbTextSizeH=1.500000000000 +PcbTextThickness=0.300000000000 +ModuleTextSizeV=1.000000000000 +ModuleTextSizeH=1.000000000000 +ModuleTextSizeThickness=0.150000000000 +SolderMaskClearance=0.000000000000 +SolderMaskMinWidth=0.000000000000 +DrawSegmentWidth=0.200000000000 +BoardOutlineThickness=0.100000000000 +ModuleOutlineThickness=0.150000000000 +[cvpcb] +version=1 +NetIExt=net +[eeschema] +version=1 +LibDir= +[eeschema/libraries] +LibName1=adc-dac +LibName2=memory +LibName3=xilinx +LibName4=microcontrollers +LibName5=dsp +LibName6=microchip +LibName7=analog_switches +LibName8=motorola +LibName9=texas +LibName10=intel +LibName11=audio +LibName12=interface +LibName13=digital-audio +LibName14=philips +LibName15=display +LibName16=cypress +LibName17=siliconi +LibName18=opto +LibName19=atmel +LibName20=contrib +LibName21=power +LibName22=eSim_Plot +LibName23=transistors +LibName24=conn +LibName25=eSim_User +LibName26=regul +LibName27=74xx +LibName28=cmos4000 +LibName29=eSim_Analog +LibName30=eSim_Devices +LibName31=eSim_Digital +LibName32=eSim_Hybrid +LibName33=eSim_Miscellaneous +LibName34=eSim_Power +LibName35=eSim_Sources +LibName36=eSim_Subckt +LibName37=eSim_Nghdl +LibName38=eSim_Ngveri +[schematic_editor] +version=1 +PageLayoutDescrFile= +PlotDirectoryName= +SubpartIdSeparator=0 +SubpartFirstId=65 +NetFmtName= +SpiceForceRefPrefix=0 +SpiceUseNetNumbers=0 +LabSize=60 diff --git a/library/SubcircuitLibrary/lm1458/lm1458.sch b/library/SubcircuitLibrary/lm1458/lm1458.sch new file mode 100644 index 00000000..591e1bf7 --- /dev/null +++ b/library/SubcircuitLibrary/lm1458/lm1458.sch @@ -0,0 +1,1313 @@ +EESchema Schematic File Version 2 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:power +LIBS:eSim_Plot +LIBS:transistors +LIBS:conn +LIBS:eSim_User +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:eSim_Analog +LIBS:eSim_Devices +LIBS:eSim_Digital +LIBS:eSim_Hybrid +LIBS:eSim_Miscellaneous +LIBS:eSim_Power +LIBS:eSim_Sources +LIBS:eSim_Subckt +LIBS:eSim_Nghdl +LIBS:eSim_Ngveri +LIBS:lm1458-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11693 8268 +encoding utf-8 +Sheet 1 1 +Title "" +Date "" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +$Comp +L eSim_PNP Q5 +U 1 1 631B7C0B +P 2100 1600 +F 0 "Q5" H 2000 1650 50 0000 R CNN +F 1 "eSim_PNP" H 2050 1750 50 0000 R CNN +F 2 "" H 2300 1700 29 0000 C CNN +F 3 "" H 2100 1600 60 0000 C CNN + 1 2100 1600 + -1 0 0 1 +$EndComp +$Comp +L eSim_PNP Q9 +U 1 1 631B7C0C +P 2700 1600 +F 0 "Q9" H 2600 1650 50 0000 R CNN +F 1 "eSim_PNP" H 2650 1750 50 0000 R CNN +F 2 "" H 2900 1700 29 0000 C CNN +F 3 "" H 2700 1600 60 0000 C CNN + 1 2700 1600 + 1 0 0 1 +$EndComp +$Comp +L eSim_PNP Q12 +U 1 1 631B7C0D +P 3650 1600 +F 0 "Q12" H 3550 1650 50 0000 R CNN +F 1 "eSim_PNP" H 3600 1750 50 0000 R CNN +F 2 "" H 3850 1700 29 0000 C CNN +F 3 "" H 3650 1600 60 0000 C CNN + 1 3650 1600 + -1 0 0 1 +$EndComp +$Comp +L eSim_PNP Q15 +U 1 1 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4800 50 0000 C CNN +F 2 "" H 1250 4830 30 0000 C CNN +F 3 "" V 1250 4900 30 0000 C CNN + 1 1200 4850 + 0 1 1 0 +$EndComp +$Comp +L resistor R2 +U 1 1 631B7C17 +P 1950 4850 +F 0 "R2" H 2000 4980 50 0000 C CNN +F 1 "50k" H 2000 4800 50 0000 C CNN +F 2 "" H 2000 4830 30 0000 C CNN +F 3 "" V 2000 4900 30 0000 C CNN + 1 1950 4850 + 0 1 1 0 +$EndComp +$Comp +L resistor R3 +U 1 1 631B7C18 +P 2300 4850 +F 0 "R3" H 2350 4980 50 0000 C CNN +F 1 "1k" H 2350 4800 50 0000 C CNN +F 2 "" H 2350 4830 30 0000 C CNN +F 3 "" V 2350 4900 30 0000 C CNN + 1 2300 4850 + 0 1 1 0 +$EndComp +Wire Wire Line + 2350 4750 2350 4600 +Wire Wire Line + 2000 4750 2000 4400 +Connection ~ 2000 4400 +Wire Wire Line + 1250 4750 1250 4600 +Wire Wire Line + 1250 5050 1250 5200 +Wire Wire Line + 2350 5200 2350 5050 +Wire Wire Line + 1250 5200 10650 5200 +Wire Wire Line + 2000 5200 2000 5050 +Connection ~ 2000 5200 +Wire Wire Line + 3550 1200 3550 1400 +Connection ~ 2800 1200 +Wire Wire Line + 3850 1600 4450 1600 +Wire Wire Line + 3900 1600 3900 1850 +Wire Wire Line + 3900 1850 3550 1850 +Wire Wire Line + 3550 1800 3550 2250 +$Comp +L resistor R5 +U 1 1 631B7C19 +P 3500 2350 +F 0 "R5" H 3550 2480 50 0000 C CNN +F 1 "19.5k" H 3550 2300 50 0000 C CNN +F 2 "" H 3550 2330 30 0000 C CNN +F 3 "" V 3550 2400 30 0000 C CNN + 1 3500 2350 + 0 1 1 0 +$EndComp +Connection ~ 3550 1850 +$Comp +L resistor R6 +U 1 1 631B7C1A +P 3500 3250 +F 0 "R6" H 3550 3380 50 0000 C CNN +F 1 "19.5k" H 3550 3200 50 0000 C CNN +F 2 "" H 3550 3230 30 0000 C CNN +F 3 "" V 3550 3300 30 0000 C CNN + 1 3500 3250 + 0 1 1 0 +$EndComp +Wire Wire Line + 3550 2550 3550 3150 +$Comp +L eSim_NPN Q10 +U 1 1 631B7C1B +P 2900 4400 +F 0 "Q10" H 2800 4450 50 0000 R CNN +F 1 "eSim_NPN" H 2850 4550 50 0000 R CNN +F 2 "" H 3100 4500 29 0000 C CNN +F 3 "" H 2900 4400 60 0000 C CNN + 1 2900 4400 + -1 0 0 -1 +$EndComp +$Comp +L eSim_NPN Q11 +U 1 1 631B7C1C +P 3450 4400 +F 0 "Q11" H 3350 4450 50 0000 R CNN +F 1 "eSim_NPN" H 3400 4550 50 0000 R CNN +F 2 "" H 3650 4500 29 0000 C CNN +F 3 "" H 3450 4400 60 0000 C CNN + 1 3450 4400 + 1 0 0 -1 +$EndComp +Wire Wire Line + 3100 4400 3250 4400 +Wire Wire Line + 3550 3450 3550 4200 +$Comp +L resistor R4 +U 1 1 631B7C1D +P 2750 4850 +F 0 "R4" H 2800 4980 50 0000 C CNN +F 1 "5k" H 2800 4800 50 0000 C CNN +F 2 "" H 2800 4830 30 0000 C CNN +F 3 "" V 2800 4900 30 0000 C CNN + 1 2750 4850 + 0 1 1 0 +$EndComp +Wire Wire Line + 2800 4750 2800 4600 +Wire Wire Line + 2800 5200 2800 5050 +Connection ~ 2350 5200 +Wire Wire Line + 3550 5200 3550 4600 +Connection ~ 2800 5200 +Wire Wire Line + 4750 1200 4750 1400 +Connection ~ 3550 1200 +Connection ~ 3900 1600 +Wire Wire Line + 2350 3900 3900 3900 +Connection ~ 2350 3900 +$Comp +L capacitor C1 +U 1 1 631B7C1E +P 3800 2900 +F 0 "C1" H 3825 3000 50 0000 L CNN +F 1 "30p" H 3825 2800 50 0000 L CNN +F 2 "" H 3838 2750 30 0000 C CNN +F 3 "" H 3800 2900 60 0000 C CNN + 1 3800 2900 + 1 0 0 -1 +$EndComp +Wire Wire Line + 3800 3050 3800 4350 +Wire Wire Line + 3800 2750 3800 1900 +Wire Wire Line + 3800 1900 5350 1900 +Wire Wire Line + 4750 1800 4750 2400 +Wire Wire Line + 3200 4400 3200 4150 +Wire Wire Line + 3200 4150 3550 4150 +Connection ~ 3550 4150 +Connection ~ 3200 4400 +$Comp +L eSim_NPN Q13 +U 1 1 631B7C1F +P 3900 4550 +F 0 "Q13" H 3800 4600 50 0000 R CNN +F 1 "eSim_NPN" H 3850 4700 50 0000 R CNN +F 2 "" H 4100 4650 29 0000 C CNN +F 3 "" H 3900 4550 60 0000 C CNN + 1 3900 4550 + -1 0 0 -1 +$EndComp +Connection ~ 3800 3900 +Wire Wire Line + 3800 5200 3800 4750 +Connection ~ 3550 5200 +$Comp +L eSim_NPN Q14 +U 1 1 631B7C20 +P 4100 3900 +F 0 "Q14" H 4000 3950 50 0000 R CNN +F 1 "eSim_NPN" H 4050 4050 50 0000 R CNN +F 2 "" H 4300 4000 29 0000 C CNN +F 3 "" H 4100 3900 60 0000 C CNN + 1 4100 3900 + 1 0 0 -1 +$EndComp +Wire Wire Line + 4100 4550 4750 4550 +Wire Wire Line + 4200 4100 4200 4700 +$Comp +L resistor R7 +U 1 1 631B7C21 +P 4150 4800 +F 0 "R7" H 4200 4930 50 0000 C CNN +F 1 "50k" H 4200 4750 50 0000 C CNN +F 2 "" H 4200 4780 30 0000 C CNN +F 3 "" V 4200 4850 30 0000 C CNN + 1 4150 4800 + 0 1 1 0 +$EndComp +Wire Wire Line + 4200 5200 4200 5000 +Connection ~ 3800 5200 +Wire Wire Line + 4200 3700 4200 3550 +Wire Wire Line + 4200 3550 4900 3550 +$Comp +L eSim_NPN Q16 +U 1 1 631B7C22 +P 4650 2600 +F 0 "Q16" H 4550 2650 50 0000 R CNN +F 1 "eSim_NPN" H 4600 2750 50 0000 R CNN +F 2 "" H 4850 2700 29 0000 C CNN +F 3 "" H 4650 2600 60 0000 C CNN + 1 4650 2600 + 1 0 0 -1 +$EndComp +Connection ~ 4750 1900 +Wire Wire Line + 4750 2800 4750 4050 +Connection ~ 4750 3550 +$Comp +L eSim_NPN Q17 +U 1 1 631B7C23 +P 4650 4250 +F 0 "Q17" H 4550 4300 50 0000 R CNN +F 1 "eSim_NPN" H 4600 4400 50 0000 R CNN +F 2 "" H 4850 4350 29 0000 C CNN +F 3 "" H 4650 4250 60 0000 C CNN + 1 4650 4250 + 1 0 0 -1 +$EndComp +Wire Wire Line + 4450 4250 4200 4250 +Connection ~ 4200 4250 +Wire Wire Line + 4750 4450 4750 4700 +$Comp +L resistor R10 +U 1 1 631B7C24 +P 4700 4800 +F 0 "R10" H 4750 4930 50 0000 C CNN +F 1 "50" H 4750 4750 50 0000 C CNN +F 2 "" H 4750 4780 30 0000 C CNN +F 3 "" V 4750 4850 30 0000 C CNN + 1 4700 4800 + 0 1 1 0 +$EndComp +Connection ~ 4750 4550 +Wire Wire Line + 4750 5200 4750 5000 +Connection ~ 4200 5200 +$Comp +L resistor R8 +U 1 1 631B7C25 +P 4500 2150 +F 0 "R8" H 4550 2280 50 0000 C CNN +F 1 "4.5k" H 4550 2100 50 0000 C CNN +F 2 "" H 4550 2130 30 0000 C CNN +F 3 "" V 4550 2200 30 0000 C CNN + 1 4500 2150 + -1 0 0 1 +$EndComp +$Comp +L resistor R9 +U 1 1 631B7C26 +P 4500 2900 +F 0 "R9" H 4550 3030 50 0000 C CNN +F 1 "7.5k" H 4550 2850 50 0000 C CNN +F 2 "" H 4550 2880 30 0000 C CNN +F 3 "" V 4550 2950 30 0000 C CNN + 1 4500 2900 + -1 0 0 1 +$EndComp +Wire Wire Line + 4600 2200 4750 2200 +Connection ~ 4750 2200 +Wire Wire Line + 4600 2950 4750 2950 +Connection ~ 4750 2950 +Wire Wire Line + 4450 2600 4100 2600 +Wire Wire Line + 4100 2200 4100 2950 +Wire Wire Line + 4100 2200 4300 2200 +Wire Wire Line + 4100 2950 4300 2950 +Connection ~ 4100 2600 +$Comp +L eSim_NPN Q18 +U 1 1 631B7C27 +P 5250 2500 +F 0 "Q18" H 5150 2550 50 0000 R CNN +F 1 "eSim_NPN" H 5200 2650 50 0000 R CNN +F 2 "" H 5450 2600 29 0000 C CNN +F 3 "" H 5250 2500 60 0000 C CNN + 1 5250 2500 + -1 0 0 -1 +$EndComp +Connection ~ 4750 1200 +Wire Wire Line + 5150 1900 5150 2300 +$Comp +L eSim_NPN Q19 +U 1 1 631B7C28 +P 5550 1900 +F 0 "Q19" H 5450 1950 50 0000 R CNN +F 1 "eSim_NPN" H 5500 2050 50 0000 R CNN +F 2 "" H 5750 2000 29 0000 C CNN +F 3 "" H 5550 1900 60 0000 C CNN + 1 5550 1900 + 1 0 0 -1 +$EndComp +Wire Wire Line + 5650 1700 5650 1200 +Connection ~ 5650 1200 +Connection ~ 5150 1900 +Wire Wire Line + 5450 2500 5650 2500 +Wire Wire Line + 5650 2100 5650 2750 +$Comp +L resistor R11 +U 1 1 631B7C29 +P 5600 2850 +F 0 "R11" H 5650 2980 50 0000 C CNN +F 1 "25" H 5650 2800 50 0000 C CNN +F 2 "" H 5650 2830 30 0000 C CNN +F 3 "" V 5650 2900 30 0000 C CNN + 1 5600 2850 + 0 1 1 0 +$EndComp +Connection ~ 5650 2500 +Wire Wire Line + 5150 2700 5150 3300 +Wire Wire Line + 5150 3300 5650 3300 +Wire Wire Line + 5650 3050 5650 3800 +$Comp +L eSim_Diode D1 +U 1 1 631B7C2A +P 5050 3550 +F 0 "D1" H 5050 3650 50 0000 C CNN +F 1 "eSim_Diode" H 5050 3450 50 0000 C CNN +F 2 "" H 5050 3550 60 0000 C CNN +F 3 "" H 5050 3550 60 0000 C CNN + 1 5050 3550 + -1 0 0 1 +$EndComp +$Comp +L eSim_Diode D2 +U 1 1 631B7C2B +P 5400 3550 +F 0 "D2" H 5400 3650 50 0000 C CNN +F 1 "eSim_Diode" H 5400 3450 50 0000 C CNN +F 2 "" H 5400 3550 60 0000 C CNN +F 3 "" H 5400 3550 60 0000 C CNN + 1 5400 3550 + -1 0 0 1 +$EndComp +Wire Wire Line + 5250 3550 5200 3550 +Wire Wire Line + 5550 3550 5950 3550 +Connection ~ 5650 3300 +$Comp +L resistor R12 +U 1 1 631B7C2C +P 5600 3900 +F 0 "R12" H 5650 4030 50 0000 C CNN +F 1 "50" H 5650 3850 50 0000 C CNN +F 2 "" H 5650 3880 30 0000 C CNN +F 3 "" V 5650 3950 30 0000 C CNN + 1 5600 3900 + 0 1 1 0 +$EndComp +Connection ~ 5650 3550 +$Comp +L eSim_PNP Q20 +U 1 1 631B7C2D +P 5550 4550 +F 0 "Q20" H 5450 4600 50 0000 R CNN +F 1 "eSim_PNP" H 5500 4700 50 0000 R CNN +F 2 "" H 5750 4650 29 0000 C CNN +F 3 "" H 5550 4550 60 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7000 1200 7000 1400 +Wire Wire Line + 6650 1200 6650 3500 +Wire Wire Line + 7800 1200 7800 1400 +Connection ~ 7000 1200 +Wire Wire Line + 7800 1800 7800 4200 +Wire Wire Line + 7800 2850 7000 2850 +Wire Wire Line + 7000 2850 7000 3050 +Connection ~ 7000 3050 +Connection ~ 7800 2850 +$Comp +L eSim_NPN Q23 +U 1 1 631B7C37 +P 6350 4400 +F 0 "Q23" H 6250 4450 50 0000 R CNN +F 1 "eSim_NPN" H 6300 4550 50 0000 R CNN +F 2 "" H 6550 4500 29 0000 C CNN +F 3 "" H 6350 4400 60 0000 C CNN + 1 6350 4400 + -1 0 0 -1 +$EndComp +Connection ~ 6250 3700 +Wire Wire Line + 6550 4400 7050 4400 +Wire Wire Line + 6650 4400 6650 3900 +$Comp +L eSim_NPN Q27 +U 1 1 631B7C38 +P 7250 4400 +F 0 "Q27" H 7150 4450 50 0000 R CNN +F 1 "eSim_NPN" H 7200 4550 50 0000 R CNN +F 2 "" H 7450 4500 29 0000 C CNN +F 3 "" H 7250 4400 60 0000 C CNN + 1 7250 4400 + 1 0 0 -1 +$EndComp +Connection ~ 6650 4400 +Wire Wire Line + 7350 3250 7350 4200 +$Comp +L resistor R13 +U 1 1 631B7C39 +P 6200 4850 +F 0 "R13" H 6250 4980 50 0000 C CNN +F 1 "1k" H 6250 4800 50 0000 C CNN +F 2 "" H 6250 4830 30 0000 C CNN +F 3 "" V 6250 4900 30 0000 C CNN + 1 6200 4850 + 0 1 1 0 +$EndComp +$Comp +L resistor R14 +U 1 1 631B7C3A +P 6950 4850 +F 0 "R14" H 7000 4980 50 0000 C CNN +F 1 "50k" H 7000 4800 50 0000 C CNN +F 2 "" H 7000 4830 30 0000 C CNN +F 3 "" V 7000 4900 30 0000 C CNN + 1 6950 4850 + 0 1 1 0 +$EndComp +$Comp +L resistor R15 +U 1 1 631B7C3B +P 7300 4850 +F 0 "R15" H 7350 4980 50 0000 C CNN +F 1 "1k" H 7350 4800 50 0000 C CNN +F 2 "" H 7350 4830 30 0000 C CNN +F 3 "" V 7350 4900 30 0000 C CNN + 1 7300 4850 + 0 1 1 0 +$EndComp +Wire Wire Line + 7350 4750 7350 4600 +Wire Wire Line + 7000 4750 7000 4400 +Connection ~ 7000 4400 +Wire Wire Line + 6250 4750 6250 4600 +Wire Wire Line + 6250 5200 6250 5050 +Wire Wire Line + 7350 5200 7350 5050 +Wire Wire Line + 7000 5200 7000 5050 +Connection ~ 7000 5200 +Wire Wire Line + 8550 1200 8550 1400 +Connection ~ 7800 1200 +Wire Wire Line + 8850 1600 9450 1600 +Wire Wire Line + 8900 1600 8900 1850 +Wire Wire Line + 8900 1850 8550 1850 +Wire Wire Line + 8550 1800 8550 2250 +$Comp +L resistor R17 +U 1 1 631B7C3C +P 8500 2350 +F 0 "R17" H 8550 2480 50 0000 C CNN +F 1 "19.5k" H 8550 2300 50 0000 C CNN +F 2 "" H 8550 2330 30 0000 C CNN +F 3 "" V 8550 2400 30 0000 C CNN + 1 8500 2350 + 0 1 1 0 +$EndComp +Connection ~ 8550 1850 +$Comp +L resistor R18 +U 1 1 631B7C3D +P 8500 3250 +F 0 "R18" H 8550 3380 50 0000 C CNN +F 1 "19.5k" H 8550 3200 50 0000 C CNN +F 2 "" H 8550 3230 30 0000 C CNN +F 3 "" V 8550 3300 30 0000 C CNN + 1 8500 3250 + 0 1 1 0 +$EndComp +Wire Wire Line + 8550 2550 8550 3150 +$Comp +L eSim_NPN Q30 +U 1 1 631B7C3E +P 7900 4400 +F 0 "Q30" H 7800 4450 50 0000 R CNN +F 1 "eSim_NPN" H 7850 4550 50 0000 R CNN +F 2 "" H 8100 4500 29 0000 C CNN +F 3 "" H 7900 4400 60 0000 C CNN + 1 7900 4400 + -1 0 0 -1 +$EndComp +$Comp +L eSim_NPN Q31 +U 1 1 631B7C3F +P 8450 4400 +F 0 "Q31" H 8350 4450 50 0000 R CNN +F 1 "eSim_NPN" H 8400 4550 50 0000 R CNN +F 2 "" H 8650 4500 29 0000 C CNN +F 3 "" H 8450 4400 60 0000 C CNN + 1 8450 4400 + 1 0 0 -1 +$EndComp +Wire Wire Line + 8100 4400 8250 4400 +Wire Wire Line + 8550 3450 8550 4200 +$Comp +L resistor R16 +U 1 1 631B7C40 +P 7750 4850 +F 0 "R16" H 7800 4980 50 0000 C CNN +F 1 "5k" H 7800 4800 50 0000 C CNN +F 2 "" H 7800 4830 30 0000 C CNN +F 3 "" V 7800 4900 30 0000 C CNN + 1 7750 4850 + 0 1 1 0 +$EndComp +Wire Wire Line + 7800 4750 7800 4600 +Wire Wire Line + 7800 5200 7800 5050 +Connection ~ 7350 5200 +Wire Wire Line + 8550 5200 8550 4600 +Connection ~ 7800 5200 +Wire Wire Line + 9750 1200 9750 1400 +Connection ~ 8550 1200 +Connection ~ 8900 1600 +Wire Wire Line + 7350 3900 8900 3900 +Connection ~ 7350 3900 +$Comp +L capacitor C2 +U 1 1 631B7C41 +P 8800 2900 +F 0 "C2" H 8825 3000 50 0000 L CNN +F 1 "30p" H 8825 2800 50 0000 L CNN +F 2 "" H 8838 2750 30 0000 C CNN +F 3 "" H 8800 2900 60 0000 C CNN + 1 8800 2900 + 1 0 0 -1 +$EndComp +Wire Wire Line + 8800 3050 8800 4350 +Wire Wire Line + 8800 2750 8800 1900 +Wire Wire Line + 8800 1900 10350 1900 +Wire Wire Line + 9750 1800 9750 2400 +Wire Wire Line + 8200 4400 8200 4150 +Wire Wire Line + 8200 4150 8550 4150 +Connection ~ 8550 4150 +Connection ~ 8200 4400 +$Comp +L eSim_NPN Q33 +U 1 1 631B7C42 +P 8900 4550 +F 0 "Q33" H 8800 4600 50 0000 R CNN +F 1 "eSim_NPN" H 8850 4700 50 0000 R CNN +F 2 "" H 9100 4650 29 0000 C CNN +F 3 "" H 8900 4550 60 0000 C CNN + 1 8900 4550 + -1 0 0 -1 +$EndComp +Connection ~ 8800 3900 +Wire Wire Line + 8800 5200 8800 4750 +Connection ~ 8550 5200 +$Comp +L eSim_NPN Q34 +U 1 1 631B7C43 +P 9100 3900 +F 0 "Q34" H 9000 3950 50 0000 R CNN +F 1 "eSim_NPN" H 9050 4050 50 0000 R CNN +F 2 "" H 9300 4000 29 0000 C CNN +F 3 "" H 9100 3900 60 0000 C CNN + 1 9100 3900 + 1 0 0 -1 +$EndComp +Wire Wire Line + 9100 4550 9750 4550 +Wire Wire Line + 9200 4100 9200 4700 +$Comp +L resistor R19 +U 1 1 631B7C44 +P 9150 4800 +F 0 "R19" H 9200 4930 50 0000 C CNN +F 1 "50k" H 9200 4750 50 0000 C CNN +F 2 "" H 9200 4780 30 0000 C CNN +F 3 "" V 9200 4850 30 0000 C CNN + 1 9150 4800 + 0 1 1 0 +$EndComp +Wire Wire Line + 9200 5200 9200 5000 +Connection ~ 8800 5200 +Wire Wire Line + 9200 3700 9200 3550 +Wire Wire Line + 9200 3550 9900 3550 +$Comp +L eSim_NPN Q36 +U 1 1 631B7C45 +P 9650 2600 +F 0 "Q36" H 9550 2650 50 0000 R CNN +F 1 "eSim_NPN" H 9600 2750 50 0000 R CNN +F 2 "" H 9850 2700 29 0000 C CNN +F 3 "" H 9650 2600 60 0000 C CNN + 1 9650 2600 + 1 0 0 -1 +$EndComp +Connection ~ 9750 1900 +Wire Wire Line + 9750 2800 9750 4050 +Connection ~ 9750 3550 +$Comp +L eSim_NPN Q37 +U 1 1 631B7C46 +P 9650 4250 +F 0 "Q37" H 9550 4300 50 0000 R CNN +F 1 "eSim_NPN" H 9600 4400 50 0000 R CNN +F 2 "" H 9850 4350 29 0000 C CNN +F 3 "" H 9650 4250 60 0000 C CNN + 1 9650 4250 + 1 0 0 -1 +$EndComp +Wire Wire Line + 9450 4250 9200 4250 +Connection ~ 9200 4250 +Wire Wire Line + 9750 4450 9750 4700 +$Comp +L resistor R22 +U 1 1 631B7C47 +P 9700 4800 +F 0 "R22" H 9750 4930 50 0000 C CNN +F 1 "50" H 9750 4750 50 0000 C CNN +F 2 "" H 9750 4780 30 0000 C CNN +F 3 "" V 9750 4850 30 0000 C CNN + 1 9700 4800 + 0 1 1 0 +$EndComp +Connection ~ 9750 4550 +Wire Wire Line + 9750 5200 9750 5000 +Connection ~ 9200 5200 +$Comp +L resistor R20 +U 1 1 631B7C48 +P 9500 2150 +F 0 "R20" H 9550 2280 50 0000 C CNN +F 1 "4.5k" H 9550 2100 50 0000 C CNN +F 2 "" H 9550 2130 30 0000 C CNN +F 3 "" V 9550 2200 30 0000 C CNN + 1 9500 2150 + -1 0 0 1 +$EndComp +$Comp +L resistor R21 +U 1 1 631B7C49 +P 9500 2900 +F 0 "R21" H 9550 3030 50 0000 C CNN +F 1 "7.5k" H 9550 2850 50 0000 C CNN +F 2 "" H 9550 2880 30 0000 C CNN +F 3 "" V 9550 2950 30 0000 C CNN + 1 9500 2900 + -1 0 0 1 +$EndComp +Wire Wire Line + 9600 2200 9750 2200 +Connection ~ 9750 2200 +Wire Wire Line + 9600 2950 9750 2950 +Connection ~ 9750 2950 +Wire Wire Line + 9450 2600 9100 2600 +Wire Wire Line + 9100 2200 9100 2950 +Wire Wire Line + 9100 2200 9300 2200 +Wire Wire Line + 9100 2950 9300 2950 +Connection ~ 9100 2600 +$Comp +L eSim_NPN Q38 +U 1 1 631B7C4A +P 10250 2500 +F 0 "Q38" H 10150 2550 50 0000 R CNN +F 1 "eSim_NPN" H 10200 2650 50 0000 R CNN +F 2 "" H 10450 2600 29 0000 C CNN +F 3 "" H 10250 2500 60 0000 C CNN + 1 10250 2500 + -1 0 0 -1 +$EndComp +Connection ~ 9750 1200 +Wire Wire Line + 10150 1900 10150 2300 +$Comp +L eSim_NPN Q39 +U 1 1 631B7C4B +P 10550 1900 +F 0 "Q39" H 10450 1950 50 0000 R CNN +F 1 "eSim_NPN" H 10500 2050 50 0000 R CNN +F 2 "" H 10750 2000 29 0000 C CNN +F 3 "" H 10550 1900 60 0000 C CNN + 1 10550 1900 + 1 0 0 -1 +$EndComp +Wire Wire Line + 10650 1200 10650 1700 +Connection ~ 10150 1900 +Wire Wire Line + 10450 2500 10650 2500 +Wire Wire Line + 10650 2100 10650 2750 +$Comp +L resistor R23 +U 1 1 631B7C4C +P 10600 2850 +F 0 "R23" H 10650 2980 50 0000 C CNN +F 1 "25" H 10650 2800 50 0000 C CNN +F 2 "" H 10650 2830 30 0000 C CNN +F 3 "" V 10650 2900 30 0000 C CNN + 1 10600 2850 + 0 1 1 0 +$EndComp +Connection ~ 10650 2500 +Wire Wire Line + 10150 2700 10150 3300 +Wire Wire Line + 10150 3300 10650 3300 +Wire Wire Line + 10650 3050 10650 3800 +$Comp +L eSim_Diode D3 +U 1 1 631B7C4D +P 10050 3550 +F 0 "D3" H 10050 3650 50 0000 C CNN +F 1 "eSim_Diode" H 10050 3450 50 0000 C CNN +F 2 "" H 10050 3550 60 0000 C CNN +F 3 "" H 10050 3550 60 0000 C CNN + 1 10050 3550 + -1 0 0 1 +$EndComp +$Comp +L eSim_Diode D4 +U 1 1 631B7C4E +P 10400 3550 +F 0 "D4" H 10400 3650 50 0000 C CNN +F 1 "eSim_Diode" H 10400 3450 50 0000 C CNN +F 2 "" H 10400 3550 60 0000 C CNN +F 3 "" H 10400 3550 60 0000 C CNN + 1 10400 3550 + -1 0 0 1 +$EndComp +Wire Wire Line + 10250 3550 10200 3550 +Wire Wire Line + 10550 3550 10950 3550 +Connection ~ 10650 3300 +$Comp +L resistor R24 +U 1 1 631B7C4F +P 10600 3900 +F 0 "R24" H 10650 4030 50 0000 C CNN +F 1 "50" H 10650 3850 50 0000 C CNN +F 2 "" H 10650 3880 30 0000 C CNN +F 3 "" V 10650 3950 30 0000 C CNN + 1 10600 3900 + 0 1 1 0 +$EndComp +Connection ~ 10650 3550 +$Comp +L eSim_PNP Q40 +U 1 1 631B7C50 +P 10550 4550 +F 0 "Q40" H 10450 4600 50 0000 R CNN +F 1 "eSim_PNP" H 10500 4700 50 0000 R CNN +F 2 "" H 10750 4650 29 0000 C CNN +F 3 "" H 10550 4550 60 0000 C CNN + 1 10550 4550 + 1 0 0 1 +$EndComp +Wire Wire Line + 10650 4350 10650 4100 +Wire Wire Line + 9750 3850 9900 3850 +Wire Wire Line + 9900 3850 9900 4550 +Wire Wire Line + 9900 4550 10350 4550 +Connection ~ 9750 3850 +Wire Wire Line + 10650 5200 10650 4750 +Connection ~ 9750 5200 +Connection ~ 6650 1200 +Connection ~ 6250 5200 +$Comp +L PORT U1 +U 1 1 631B7C51 +P 750 2550 +F 0 "U1" H 800 2650 30 0000 C CNN +F 1 "PORT" H 750 2550 30 0000 C CNN +F 2 "" H 750 2550 60 0000 C CNN +F 3 "" H 750 2550 60 0000 C CNN + 1 750 2550 + 0 -1 -1 0 +$EndComp +$Comp +L PORT U1 +U 2 1 631B7C52 +P 1000 2900 +F 0 "U1" H 1050 3000 30 0000 C CNN +F 1 "PORT" H 1000 2900 30 0000 C CNN +F 2 "" H 1000 2900 60 0000 C CNN +F 3 "" H 1000 2900 60 0000 C CNN + 2 1000 2900 + 0 -1 -1 0 +$EndComp +$Comp +L PORT U1 +U 6 1 631B7C53 +P 5950 3800 +F 0 "U1" H 6000 3900 30 0000 C CNN +F 1 "PORT" H 5950 3800 30 0000 C CNN +F 2 "" H 5950 3800 60 0000 C CNN +F 3 "" H 5950 3800 60 0000 C CNN + 6 5950 3800 + 0 -1 -1 0 +$EndComp +$Comp +L PORT U1 +U 4 1 631B7C54 +P 5900 2550 +F 0 "U1" H 5950 2650 30 0000 C CNN +F 1 "PORT" H 5900 2550 30 0000 C CNN +F 2 "" H 5900 2550 60 0000 C CNN +F 3 "" H 5900 2550 60 0000 C CNN + 4 5900 2550 + 0 -1 -1 0 +$EndComp +$Comp +L PORT U1 +U 7 1 631B7C55 +P 6400 2650 +F 0 "U1" H 6450 2750 30 0000 C CNN +F 1 "PORT" H 6400 2650 30 0000 C CNN +F 2 "" H 6400 2650 60 0000 C CNN +F 3 "" H 6400 2650 60 0000 C CNN + 7 6400 2650 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 8 1 631B7C56 +P 10950 3800 +F 0 "U1" H 11000 3900 30 0000 C CNN +F 1 "PORT" H 10950 3800 30 0000 C CNN +F 2 "" H 10950 3800 60 0000 C CNN +F 3 "" H 10950 3800 60 0000 C CNN + 8 10950 3800 + 0 -1 -1 0 +$EndComp +$Comp +L PORT U1 +U 3 1 631B7C57 +P 5700 5500 +F 0 "U1" H 5750 5600 30 0000 C CNN +F 1 "PORT" H 5700 5500 30 0000 C CNN +F 2 "" H 5700 5500 60 0000 C CNN +F 3 "" H 5700 5500 60 0000 C CNN + 3 5700 5500 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 5 1 631B7C58 +P 5950 950 +F 0 "U1" H 6000 1050 30 0000 C CNN +F 1 "PORT" H 5950 950 30 0000 C CNN +F 2 "" H 5950 950 60 0000 C CNN +F 3 "" H 5950 950 60 0000 C CNN + 5 5950 950 + 1 0 0 -1 +$EndComp +Wire Wire Line + 6200 950 6250 950 +Connection ~ 6250 1200 +Wire Wire Line + 5950 5500 6000 5500 +Wire Wire Line + 6000 5500 6000 5200 +Connection ~ 6000 5200 +Wire Wire Line + 6250 950 6250 1200 +$EndSCHEMATC diff --git a/library/SubcircuitLibrary/lm1458/lm1458.sub b/library/SubcircuitLibrary/lm1458/lm1458.sub new file mode 100644 index 00000000..8c0eb086 --- /dev/null +++ b/library/SubcircuitLibrary/lm1458/lm1458.sub @@ -0,0 +1,79 @@ +* Subcircuit lm1458 +.subckt lm1458 net-_q1-pad2_ net-_q8-pad2_ net-_q11-pad3_ net-_q21-pad2_ net-_q12-pad3_ net-_d2-pad1_ net-_q28-pad2_ net-_d4-pad1_ +* c:\fossee\esim\library\subcircuitlibrary\lm1458\lm1458.cir +.include D.lib +.include NPN.lib +.include PNP.lib +q5 net-_q1-pad1_ net-_q1-pad1_ net-_q12-pad3_ Q2N2907A +q9 net-_q10-pad1_ net-_q1-pad1_ net-_q12-pad3_ Q2N2907A +q12 net-_q12-pad1_ net-_q12-pad1_ net-_q12-pad3_ Q2N2907A +q15 net-_c1-pad1_ net-_q12-pad1_ net-_q12-pad3_ Q2N2907A +q1 net-_q1-pad1_ net-_q1-pad2_ net-_q1-pad3_ Q2N2222 +q2 net-_q2-pad1_ net-_q10-pad1_ net-_q1-pad3_ Q2N2907A +q8 net-_q1-pad1_ net-_q8-pad2_ net-_q6-pad3_ Q2N2222 +q6 net-_c1-pad2_ net-_q10-pad1_ net-_q6-pad3_ Q2N2907A +q4 net-_q12-pad3_ net-_q2-pad1_ net-_q3-pad2_ Q2N2222 +q3 net-_q2-pad1_ net-_q3-pad2_ net-_q3-pad3_ Q2N2222 +q7 net-_c1-pad2_ net-_q3-pad2_ net-_q7-pad3_ Q2N2222 +r1 net-_q3-pad3_ net-_q11-pad3_ 1k +r2 net-_q3-pad2_ net-_q11-pad3_ 50k +r3 net-_q7-pad3_ net-_q11-pad3_ 1k +r5 net-_q12-pad1_ net-_r5-pad2_ 19.5k +r6 net-_r5-pad2_ net-_q10-pad2_ 19.5k +q10 net-_q10-pad1_ net-_q10-pad2_ net-_q10-pad3_ Q2N2222 +q11 net-_q10-pad2_ net-_q10-pad2_ net-_q11-pad3_ Q2N2222 +r4 net-_q10-pad3_ net-_q11-pad3_ 5k +c1 net-_c1-pad1_ net-_c1-pad2_ 30p +q13 net-_c1-pad2_ net-_q13-pad2_ net-_q11-pad3_ Q2N2222 +q14 net-_d1-pad2_ net-_c1-pad2_ net-_q14-pad3_ Q2N2222 +r7 net-_q14-pad3_ net-_q11-pad3_ 50k +q16 net-_c1-pad1_ net-_q16-pad2_ net-_d1-pad2_ Q2N2222 +q17 net-_d1-pad2_ net-_q14-pad3_ net-_q13-pad2_ Q2N2222 +r10 net-_q13-pad2_ net-_q11-pad3_ 50 +r8 net-_c1-pad1_ net-_q16-pad2_ 4.5k +r9 net-_d1-pad2_ net-_q16-pad2_ 7.5k +q18 net-_c1-pad1_ net-_q18-pad2_ net-_d2-pad1_ Q2N2222 +q19 net-_q12-pad3_ net-_c1-pad1_ net-_q18-pad2_ Q2N2222 +r11 net-_q18-pad2_ net-_d2-pad1_ 25 +d1 net-_d1-pad1_ net-_d1-pad2_ 1N4148 +d2 net-_d2-pad1_ net-_d1-pad1_ 1N4148 +r12 net-_d2-pad1_ net-_q20-pad3_ 50 +q20 net-_q11-pad3_ net-_d1-pad2_ net-_q20-pad3_ Q2N2907A +q25 net-_q21-pad1_ net-_q21-pad1_ net-_q12-pad3_ Q2N2907A +q29 net-_q22-pad2_ net-_q21-pad1_ net-_q12-pad3_ Q2N2907A +q32 net-_q32-pad1_ net-_q32-pad1_ net-_q12-pad3_ Q2N2907A +q35 net-_c2-pad1_ net-_q32-pad1_ net-_q12-pad3_ Q2N2907A +q21 net-_q21-pad1_ net-_q21-pad2_ net-_q21-pad3_ Q2N2222 +q22 net-_q22-pad1_ net-_q22-pad2_ net-_q21-pad3_ Q2N2907A +q28 net-_q21-pad1_ net-_q28-pad2_ net-_q26-pad3_ Q2N2222 +q26 net-_c2-pad2_ net-_q22-pad2_ net-_q26-pad3_ Q2N2907A +q24 net-_q12-pad3_ net-_q22-pad1_ net-_q23-pad2_ Q2N2222 +q23 net-_q22-pad1_ net-_q23-pad2_ net-_q23-pad3_ Q2N2222 +q27 net-_c2-pad2_ net-_q23-pad2_ net-_q27-pad3_ Q2N2222 +r13 net-_q23-pad3_ net-_q11-pad3_ 1k +r14 net-_q23-pad2_ net-_q11-pad3_ 50k +r15 net-_q27-pad3_ net-_q11-pad3_ 1k +r17 net-_q32-pad1_ net-_r17-pad2_ 19.5k +r18 net-_r17-pad2_ net-_q30-pad2_ 19.5k +q30 net-_q22-pad2_ net-_q30-pad2_ net-_q30-pad3_ Q2N2222 +q31 net-_q30-pad2_ net-_q30-pad2_ net-_q11-pad3_ Q2N2222 +r16 net-_q30-pad3_ net-_q11-pad3_ 5k +c2 net-_c2-pad1_ net-_c2-pad2_ 30p +q33 net-_c2-pad2_ net-_q33-pad2_ net-_q11-pad3_ Q2N2222 +q34 net-_d3-pad2_ net-_c2-pad2_ net-_q34-pad3_ Q2N2222 +r19 net-_q34-pad3_ net-_q11-pad3_ 50k +q36 net-_c2-pad1_ net-_q36-pad2_ net-_d3-pad2_ Q2N2222 +q37 net-_d3-pad2_ net-_q34-pad3_ net-_q33-pad2_ Q2N2222 +r22 net-_q33-pad2_ net-_q11-pad3_ 50 +r20 net-_c2-pad1_ net-_q36-pad2_ 4.5k +r21 net-_d3-pad2_ net-_q36-pad2_ 7.5k +q38 net-_c2-pad1_ net-_q38-pad2_ net-_d4-pad1_ Q2N2222 +q39 net-_q12-pad3_ net-_c2-pad1_ net-_q38-pad2_ Q2N2222 +r23 net-_q38-pad2_ net-_d4-pad1_ 25 +d3 net-_d3-pad1_ net-_d3-pad2_ 1N4148 +d4 net-_d4-pad1_ net-_d3-pad1_ 1N4148 +r24 net-_d4-pad1_ net-_q40-pad3_ 50 +q40 net-_q11-pad3_ net-_d3-pad2_ net-_q40-pad3_ Q2N2907A +* Control Statements + +.ends lm1458 \ No newline at end of file diff --git a/library/SubcircuitLibrary/lm1458/lm1458_Previous_Values.xml b/library/SubcircuitLibrary/lm1458/lm1458_Previous_Values.xml new file mode 100644 index 00000000..0ce355b4 --- /dev/null +++ b/library/SubcircuitLibrary/lm1458/lm1458_Previous_Values.xml @@ -0,0 +1 @@ +truefalsefalseHzHz0Volts or AmperesVolts or AmperesVolts or AmperesVolts or AmperesVolts or AmperesVolts or AmperesSecSecSecC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libC:\FOSSEE\eSim\library\deviceModelLibrary\Diode\D.libC:\FOSSEE\eSim\library\deviceModelLibrary\Diode\D.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libC:\FOSSEE\eSim\library\deviceModelLibrary\Diode\D.libC:\FOSSEE\eSim\library\deviceModelLibrary\Diode\D.libC:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.lib \ No newline at end of file -- cgit