From 6e55ab5633673cf089898b1362cf044496eb2603 Mon Sep 17 00:00:00 2001 From: Sumanto Kar Date: Thu, 21 Nov 2024 23:44:07 +0530 Subject: MC78L05 is a 5V positive voltage regulator --- library/SubcircuitLibrary/MC78L05_sub/D.lib | 2 + .../MC78L05_sub/MC78L05_IC-cache.lib | 164 ++++++ .../SubcircuitLibrary/MC78L05_sub/MC78L05_IC.cir | 38 ++ .../MC78L05_sub/MC78L05_IC.cir.out | 45 ++ .../SubcircuitLibrary/MC78L05_sub/MC78L05_IC.pro | 73 +++ .../SubcircuitLibrary/MC78L05_sub/MC78L05_IC.sch | 549 +++++++++++++++++++++ .../SubcircuitLibrary/MC78L05_sub/MC78L05_IC.sub | 39 ++ .../MC78L05_sub/MC78L05_IC_Previous_Values.xml | 1 + library/SubcircuitLibrary/MC78L05_sub/NPN.lib | 4 + library/SubcircuitLibrary/MC78L05_sub/PNP.lib | 4 + library/SubcircuitLibrary/MC78L05_sub/analysis | 1 + 11 files changed, 920 insertions(+) create mode 100644 library/SubcircuitLibrary/MC78L05_sub/D.lib create mode 100644 library/SubcircuitLibrary/MC78L05_sub/MC78L05_IC-cache.lib create mode 100644 library/SubcircuitLibrary/MC78L05_sub/MC78L05_IC.cir create mode 100644 library/SubcircuitLibrary/MC78L05_sub/MC78L05_IC.cir.out create mode 100644 library/SubcircuitLibrary/MC78L05_sub/MC78L05_IC.pro create mode 100644 library/SubcircuitLibrary/MC78L05_sub/MC78L05_IC.sch create mode 100644 library/SubcircuitLibrary/MC78L05_sub/MC78L05_IC.sub create mode 100644 library/SubcircuitLibrary/MC78L05_sub/MC78L05_IC_Previous_Values.xml create mode 100644 library/SubcircuitLibrary/MC78L05_sub/NPN.lib create mode 100644 library/SubcircuitLibrary/MC78L05_sub/PNP.lib create mode 100644 library/SubcircuitLibrary/MC78L05_sub/analysis diff --git a/library/SubcircuitLibrary/MC78L05_sub/D.lib b/library/SubcircuitLibrary/MC78L05_sub/D.lib new file mode 100644 index 00000000..f53bf3e0 --- /dev/null +++ b/library/SubcircuitLibrary/MC78L05_sub/D.lib @@ -0,0 +1,2 @@ +.model 1N4148 D(is=2.495E-09 rs=4.755E-01 n=1.679E+00 tt=3.030E-09 cjo=1.700E-12 vj=1 m=1.959E-01 bv=1.000E+02 ibv=1.000E-04) + diff --git a/library/SubcircuitLibrary/MC78L05_sub/MC78L05_IC-cache.lib b/library/SubcircuitLibrary/MC78L05_sub/MC78L05_IC-cache.lib new file mode 100644 index 00000000..c353ac98 --- /dev/null +++ b/library/SubcircuitLibrary/MC78L05_sub/MC78L05_IC-cache.lib @@ -0,0 +1,164 @@ +EESchema-LIBRARY Version 2.3 +#encoding utf-8 +# +# PORT +# +DEF PORT U 0 40 Y Y 26 F N +F0 "U" 50 100 30 H V C CNN +F1 "PORT" 0 0 30 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0 +A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50 +S -100 50 100 -50 0 1 0 N +X ~ 1 250 0 100 L 30 30 1 1 B +X ~ 2 250 0 100 L 30 30 2 1 B +X ~ 3 250 0 100 L 30 30 3 1 B +X ~ 4 250 0 100 L 30 30 4 1 B +X ~ 5 250 0 100 L 30 30 5 1 B +X ~ 6 250 0 100 L 30 30 6 1 B +X ~ 7 250 0 100 L 30 30 7 1 B +X ~ 8 250 0 100 L 30 30 8 1 B +X ~ 9 250 0 100 L 30 30 9 1 B +X ~ 10 250 0 100 L 30 30 10 1 B +X ~ 11 250 0 100 L 30 30 11 1 B +X ~ 12 250 0 100 L 30 30 12 1 B +X ~ 13 250 0 100 L 30 30 13 1 B +X ~ 14 250 0 100 L 30 30 14 1 B +X ~ 15 250 0 100 L 30 30 15 1 B +X ~ 16 250 0 100 L 30 30 16 1 B +X ~ 17 250 0 100 L 30 30 17 1 B +X ~ 18 250 0 100 L 30 30 18 1 B +X ~ 19 250 0 100 L 30 30 19 1 B +X ~ 20 250 0 100 L 30 30 20 1 B +X ~ 21 250 0 100 L 30 30 21 1 B +X ~ 22 250 0 100 L 30 30 22 1 B +X ~ 23 250 0 100 L 30 30 23 1 B +X ~ 24 250 0 100 L 30 30 24 1 B +X ~ 25 250 0 100 L 30 30 25 1 B +X ~ 26 250 0 100 L 30 30 26 1 B +ENDDRAW +ENDDEF +# +# eSim_CP1 +# +DEF eSim_CP1 C 0 10 N N 1 F N +F0 "C" 25 100 50 H V L CNN +F1 "eSim_CP1" 25 -100 50 H V L CNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +ALIAS capacitor_polarised +$FPLIST + CP_* +$ENDFPLIST +DRAW +A 0 -150 128 1287 513 0 1 20 N -80 -50 80 -50 +P 2 0 1 20 -80 30 80 30 N +P 2 0 1 0 -70 90 -30 90 N +P 2 0 1 0 -50 70 -50 110 N +X ~ 1 0 150 110 D 50 50 1 1 P +X ~ 2 0 -150 130 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# eSim_Diode +# +DEF eSim_Diode D 0 40 N N 1 F N +F0 "D" 0 100 50 H V C CNN +F1 "eSim_Diode" 0 -100 50 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +$FPLIST + TO-???* + *SingleDiode + *_Diode_* + *SingleDiode* + D_* +$ENDFPLIST +DRAW +T 0 -100 50 60 0 0 0 A Normal 0 C C +T 0 100 50 60 0 0 0 K Normal 0 C C +P 2 0 1 6 50 50 50 -50 N +P 3 0 1 0 -50 50 50 0 -50 -50 F +X A 1 -150 0 100 R 40 40 1 1 P +X K 2 150 0 100 L 40 40 1 1 P +ENDDRAW +ENDDEF +# +# eSim_NPN +# +DEF eSim_NPN Q 0 0 Y N 1 F N +F0 "Q" -100 50 50 H V R CNN +F1 "eSim_NPN" -50 150 50 H V R CNN +F2 "" 200 100 29 H V C CNN +F3 "" 0 0 60 H V C CNN +ALIAS BC547 Q2N2222 +DRAW +C 50 0 111 0 1 10 N +P 2 0 1 0 25 25 100 100 N +P 3 0 1 0 25 -25 100 -100 100 -100 N +P 3 0 1 20 25 75 25 -75 25 -75 N +P 5 0 1 0 50 -70 70 -50 90 -90 50 -70 50 -70 F +X C 1 100 200 100 D 50 50 1 1 P +X B 2 -200 0 225 R 50 50 1 1 P +X E 3 100 -200 100 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# eSim_PNP +# +DEF eSim_PNP Q 0 0 Y N 1 F N +F0 "Q" -100 50 50 H V R CNN +F1 "eSim_PNP" -50 150 50 H V R CNN +F2 "" 200 100 29 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +C 50 0 111 0 1 10 N +P 2 0 1 0 25 25 100 100 N +P 3 0 1 0 25 -25 100 -100 100 -100 N +P 3 0 1 20 25 75 25 -75 25 -75 N +P 5 0 1 0 90 -70 70 -90 50 -50 90 -70 90 -70 F +X C 1 100 200 100 D 50 50 1 1 P +X B 2 -200 0 225 R 50 50 1 1 P +X E 3 100 -200 100 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# eSim_R +# +DEF eSim_R R 0 0 N Y 1 F N +F0 "R" 50 130 50 H V C CNN +F1 "eSim_R" 50 -50 50 H V C CNN +F2 "" 50 -20 30 H V C CNN +F3 "" 50 50 30 V V C CNN +ALIAS resistor +$FPLIST + R_* + Resistor_* +$ENDFPLIST +DRAW +S 150 10 -50 90 0 1 10 N +X ~ 1 -100 50 50 R 60 60 1 1 P +X ~ 2 200 50 50 L 60 60 1 1 P +ENDDRAW +ENDDEF +# +# zener +# +DEF zener U 0 40 Y Y 1 F N +F0 "U" -50 -100 60 H V C CNN +F1 "zener" 0 100 60 H V C CNN +F2 "" 50 0 60 H V C CNN +F3 "" 50 0 60 H V C CNN +DRAW +P 2 0 1 0 100 -50 50 -100 N +P 2 0 1 0 100 50 100 -50 N +P 2 0 1 0 100 50 150 100 N +P 4 0 1 0 0 50 0 -50 100 0 0 50 N +X ~ IN -200 0 200 R 50 43 1 1 I +X ~ OUT 300 0 200 L 50 43 1 1 O +ENDDRAW +ENDDEF +# +#End Library diff --git a/library/SubcircuitLibrary/MC78L05_sub/MC78L05_IC.cir b/library/SubcircuitLibrary/MC78L05_sub/MC78L05_IC.cir new file mode 100644 index 00000000..768e3dcd --- /dev/null +++ b/library/SubcircuitLibrary/MC78L05_sub/MC78L05_IC.cir @@ -0,0 +1,38 @@ +* D:\FOSSEE\eSim\library\SubcircuitLibrary\MC78L05_IC\MC78L05_IC.cir + +* EESchema Netlist Version 1.1 (Spice format) creation date: 07/03/24 11:39:31 + +* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N +* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +* Sheet Name: / +R1 Net-_Q1-Pad1_ Net-_Q1-Pad2_ 15k +Q1 Net-_Q1-Pad1_ Net-_Q1-Pad2_ Net-_Q1-Pad3_ eSim_NPN +R2 Net-_Q1-Pad3_ Net-_Q3-Pad2_ 3.8k +R3 Net-_Q3-Pad2_ Net-_Q2-Pad2_ 1.2k +R4 Net-_Q2-Pad2_ Net-_D1-Pad2_ 420 +U1 Net-_D1-Pad2_ Net-_Q1-Pad2_ zener +Q4 Net-_Q3-Pad1_ Net-_Q3-Pad1_ Net-_Q1-Pad1_ eSim_PNP +Q7 Net-_Q10-Pad1_ Net-_Q3-Pad1_ Net-_Q1-Pad1_ eSim_PNP +Q3 Net-_Q3-Pad1_ Net-_Q3-Pad2_ Net-_Q3-Pad3_ eSim_NPN +Q6 Net-_Q3-Pad1_ Net-_Q6-Pad2_ Net-_Q3-Pad3_ eSim_NPN +R5 Net-_Q3-Pad3_ Net-_D1-Pad1_ 0.18k +R6 Net-_Q3-Pad3_ Net-_C1-Pad2_ 20k +D1 Net-_D1-Pad1_ Net-_D1-Pad2_ eSim_Diode +Q5 Net-_C1-Pad2_ Net-_D1-Pad1_ Net-_Q5-Pad3_ eSim_NPN +R7 Net-_Q5-Pad3_ Net-_D1-Pad2_ 1.0k +R8 Net-_Q10-Pad1_ Net-_C1-Pad1_ 2.2k +Q8 Net-_C1-Pad1_ Net-_C1-Pad2_ Net-_D1-Pad2_ eSim_NPN +Q9 Net-_D1-Pad2_ Net-_C1-Pad1_ Net-_Q10-Pad1_ eSim_PNP +Q11 Net-_Q1-Pad1_ Net-_Q10-Pad1_ Net-_Q11-Pad3_ eSim_NPN +Q10 Net-_Q10-Pad1_ Net-_Q10-Pad2_ Net-_Q10-Pad3_ eSim_NPN +Q2 Net-_Q10-Pad1_ Net-_Q2-Pad2_ Net-_D1-Pad2_ eSim_NPN +R9 Net-_Q11-Pad3_ Net-_Q10-Pad3_ 5.0k +Q12 Net-_Q1-Pad1_ Net-_Q11-Pad3_ Net-_Q10-Pad2_ eSim_NPN +R10 Net-_Q10-Pad2_ Net-_Q10-Pad3_ 3.0 +R11 Net-_Q10-Pad3_ Net-_Q6-Pad2_ 2.0k +R12 Net-_Q6-Pad2_ Net-_D1-Pad2_ 2.85k +C1 Net-_C1-Pad1_ Net-_C1-Pad2_ 5p +U2 Net-_Q10-Pad3_ Net-_D1-Pad2_ Net-_Q1-Pad1_ PORT + +.end diff --git a/library/SubcircuitLibrary/MC78L05_sub/MC78L05_IC.cir.out b/library/SubcircuitLibrary/MC78L05_sub/MC78L05_IC.cir.out new file mode 100644 index 00000000..8486c6ca --- /dev/null +++ b/library/SubcircuitLibrary/MC78L05_sub/MC78L05_IC.cir.out @@ -0,0 +1,45 @@ +* d:\fossee\esim\library\subcircuitlibrary\mc78l05_ic\mc78l05_ic.cir + +.include PNP.lib +.include D.lib +.include NPN.lib +r1 net-_q1-pad1_ net-_q1-pad2_ 15k +q1 net-_q1-pad1_ net-_q1-pad2_ net-_q1-pad3_ Q2N2222 +r2 net-_q1-pad3_ net-_q3-pad2_ 3.8k +r3 net-_q3-pad2_ net-_q2-pad2_ 1.2k +r4 net-_q2-pad2_ net-_d1-pad2_ 420 +* u1 net-_d1-pad2_ net-_q1-pad2_ zener +q4 net-_q3-pad1_ net-_q3-pad1_ net-_q1-pad1_ Q2N2907A +q7 net-_q10-pad1_ net-_q3-pad1_ net-_q1-pad1_ Q2N2907A +q3 net-_q3-pad1_ net-_q3-pad2_ net-_q3-pad3_ Q2N2222 +q6 net-_q3-pad1_ net-_q6-pad2_ net-_q3-pad3_ Q2N2222 +r5 net-_q3-pad3_ net-_d1-pad1_ 0.18k +r6 net-_q3-pad3_ net-_c1-pad2_ 20k +d1 net-_d1-pad1_ net-_d1-pad2_ 1N4148 +q5 net-_c1-pad2_ net-_d1-pad1_ net-_q5-pad3_ Q2N2222 +r7 net-_q5-pad3_ net-_d1-pad2_ 1.0k +r8 net-_q10-pad1_ net-_c1-pad1_ 2.2k +q8 net-_c1-pad1_ net-_c1-pad2_ net-_d1-pad2_ Q2N2222 +q9 net-_d1-pad2_ net-_c1-pad1_ net-_q10-pad1_ Q2N2907A +q11 net-_q1-pad1_ net-_q10-pad1_ net-_q11-pad3_ Q2N2222 +q10 net-_q10-pad1_ net-_q10-pad2_ net-_q10-pad3_ Q2N2222 +q2 net-_q10-pad1_ net-_q2-pad2_ net-_d1-pad2_ Q2N2222 +r9 net-_q11-pad3_ net-_q10-pad3_ 5.0k +q12 net-_q1-pad1_ net-_q11-pad3_ net-_q10-pad2_ Q2N2222 +r10 net-_q10-pad2_ net-_q10-pad3_ 3.0 +r11 net-_q10-pad3_ net-_q6-pad2_ 2.0k +r12 net-_q6-pad2_ net-_d1-pad2_ 2.85k +c1 net-_c1-pad1_ net-_c1-pad2_ 5p +* u2 net-_q10-pad3_ net-_d1-pad2_ net-_q1-pad1_ port +a1 net-_d1-pad2_ net-_q1-pad2_ u1 +* Schematic Name: zener, NgSpice Name: zener +.model u1 zener(v_breakdown=5.6 i_breakdown=2.0e-2 i_sat=1.0e-12 n_forward=1.0 limit_switch=FALSE ) +.tran 0e-00 0e-00 0e-00 + +* Control Statements +.control +run +print allv > plot_data_v.txt +print alli > plot_data_i.txt +.endc +.end diff --git a/library/SubcircuitLibrary/MC78L05_sub/MC78L05_IC.pro b/library/SubcircuitLibrary/MC78L05_sub/MC78L05_IC.pro new file mode 100644 index 00000000..e27a398b --- /dev/null +++ b/library/SubcircuitLibrary/MC78L05_sub/MC78L05_IC.pro @@ -0,0 +1,73 @@ +update=22/05/2015 07:44:53 +version=1 +last_client=kicad +[general] +version=1 +RootSch= +BoardNm= +[pcbnew] +version=1 +LastNetListRead= +UseCmpFile=1 +PadDrill=0.600000000000 +PadDrillOvalY=0.600000000000 +PadSizeH=1.500000000000 +PadSizeV=1.500000000000 +PcbTextSizeV=1.500000000000 +PcbTextSizeH=1.500000000000 +PcbTextThickness=0.300000000000 +ModuleTextSizeV=1.000000000000 +ModuleTextSizeH=1.000000000000 +ModuleTextSizeThickness=0.150000000000 +SolderMaskClearance=0.000000000000 +SolderMaskMinWidth=0.000000000000 +DrawSegmentWidth=0.200000000000 +BoardOutlineThickness=0.100000000000 +ModuleOutlineThickness=0.150000000000 +[cvpcb] +version=1 +NetIExt=net +[eeschema] +version=1 +LibDir= +[eeschema/libraries] +LibName1=adc-dac +LibName2=memory +LibName3=xilinx +LibName4=microcontrollers +LibName5=dsp +LibName6=microchip +LibName7=analog_switches +LibName8=motorola +LibName9=texas +LibName10=intel +LibName11=audio +LibName12=interface +LibName13=digital-audio +LibName14=philips +LibName15=display +LibName16=cypress +LibName17=siliconi +LibName18=opto +LibName19=atmel +LibName20=contrib +LibName21=power +LibName22=eSim_Plot +LibName23=transistors +LibName24=conn +LibName25=eSim_User +LibName26=regul +LibName27=74xx +LibName28=cmos4000 +LibName29=eSim_Analog +LibName30=eSim_Devices +LibName31=eSim_Digital +LibName32=eSim_Hybrid +LibName33=eSim_Miscellaneous +LibName34=eSim_Power +LibName35=eSim_Sources +LibName36=eSim_Subckt +LibName37=eSim_Nghdl +LibName38=eSim_Ngveri +LibName39=eSim_SKY130 +LibName40=eSim_SKY130_Subckts diff --git a/library/SubcircuitLibrary/MC78L05_sub/MC78L05_IC.sch b/library/SubcircuitLibrary/MC78L05_sub/MC78L05_IC.sch new file mode 100644 index 00000000..b86442f0 --- /dev/null +++ b/library/SubcircuitLibrary/MC78L05_sub/MC78L05_IC.sch @@ -0,0 +1,549 @@ +EESchema Schematic File Version 2 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:power +LIBS:eSim_Plot +LIBS:transistors +LIBS:conn +LIBS:eSim_User +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:eSim_Analog +LIBS:eSim_Devices +LIBS:eSim_Digital +LIBS:eSim_Hybrid +LIBS:eSim_Miscellaneous +LIBS:eSim_Power +LIBS:eSim_Sources +LIBS:eSim_Subckt +LIBS:eSim_Nghdl +LIBS:eSim_Ngveri +LIBS:eSim_SKY130 +LIBS:eSim_SKY130_Subckts +LIBS:MC78L05-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11693 8268 +encoding utf-8 +Sheet 1 1 +Title "" +Date "" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +$Comp +L resistor R1 +U 1 1 6684EB64 +P 2750 1700 +F 0 "R1" H 2800 1830 50 0000 C CNN +F 1 "15k" H 2800 1650 50 0000 C CNN +F 2 "" H 2800 1680 30 0000 C CNN +F 3 "" V 2800 1750 30 0000 C CNN + 1 2750 1700 + 0 1 1 0 +$EndComp +$Comp +L eSim_NPN Q1 +U 1 1 6684EB65 +P 3200 2300 +F 0 "Q1" H 3100 2350 50 0000 R CNN +F 1 "eSim_NPN" H 3150 2450 50 0000 R CNN +F 2 "" H 3400 2400 29 0000 C CNN +F 3 "" H 3200 2300 60 0000 C CNN + 1 3200 2300 + 1 0 0 -1 +$EndComp +$Comp +L resistor R2 +U 1 1 6684EB66 +P 3250 2700 +F 0 "R2" H 3300 2830 50 0000 C CNN +F 1 "3.8k" H 3300 2650 50 0000 C CNN +F 2 "" H 3300 2680 30 0000 C CNN +F 3 "" V 3300 2750 30 0000 C CNN + 1 3250 2700 + 0 1 1 0 +$EndComp +$Comp +L resistor R3 +U 1 1 6684EB67 +P 3250 3400 +F 0 "R3" H 3300 3530 50 0000 C CNN +F 1 "1.2k" H 3300 3350 50 0000 C CNN +F 2 "" H 3300 3380 30 0000 C CNN +F 3 "" V 3300 3450 30 0000 C CNN + 1 3250 3400 + 0 1 1 0 +$EndComp +$Comp +L resistor R4 +U 1 1 6684EB68 +P 3250 4600 +F 0 "R4" H 3300 4730 50 0000 C CNN +F 1 "420" H 3300 4550 50 0000 C CNN +F 2 "" H 3300 4580 30 0000 C CNN +F 3 "" V 3300 4650 30 0000 C CNN + 1 3250 4600 + 0 1 1 0 +$EndComp +Wire Wire Line + 3300 2500 3300 2600 +Wire Wire Line + 3300 2900 3300 3300 +Wire Wire Line + 3300 3600 3300 4500 +$Comp +L zener U1 +U 1 1 6684EB69 +P 2800 3900 +F 0 "U1" H 2750 3800 60 0000 C CNN +F 1 "zener" H 2800 4000 60 0000 C CNN +F 2 "" H 2850 3900 60 0000 C CNN +F 3 "" H 2850 3900 60 0000 C CNN + 1 2800 3900 + 0 1 -1 0 +$EndComp +Wire Wire Line + 2800 1900 2800 3600 +Wire Wire Line + 2800 4100 2800 5100 +Wire Wire Line + 2800 5100 8350 5100 +Wire Wire Line + 3300 5100 3300 4800 +$Comp +L eSim_PNP Q4 +U 1 1 6684EB6A +P 4700 1900 +F 0 "Q4" H 4600 1950 50 0000 R CNN +F 1 "eSim_PNP" H 4650 2050 50 0000 R CNN +F 2 "" H 4900 2000 29 0000 C CNN +F 3 "" H 4700 1900 60 0000 C CNN + 1 4700 1900 + -1 0 0 1 +$EndComp +$Comp +L eSim_PNP Q7 +U 1 1 6684EB6B +P 5900 1900 +F 0 "Q7" H 5800 1950 50 0000 R CNN +F 1 "eSim_PNP" H 5850 2050 50 0000 R CNN +F 2 "" H 6100 2000 29 0000 C CNN +F 3 "" H 5900 1900 60 0000 C CNN + 1 5900 1900 + 1 0 0 1 +$EndComp +Wire Wire Line + 4900 1900 5700 1900 +$Comp +L eSim_NPN Q3 +U 1 1 6684EB6C +P 4200 3100 +F 0 "Q3" H 4100 3150 50 0000 R CNN +F 1 "eSim_NPN" H 4150 3250 50 0000 R CNN +F 2 "" H 4400 3200 29 0000 C CNN +F 3 "" H 4200 3100 60 0000 C CNN + 1 4200 3100 + 1 0 0 -1 +$EndComp +Wire Wire Line + 3300 3100 4000 3100 +Connection ~ 3300 3100 +$Comp +L eSim_NPN Q6 +U 1 1 6684EB6D +P 5300 3100 +F 0 "Q6" H 5200 3150 50 0000 R CNN +F 1 "eSim_NPN" H 5250 3250 50 0000 R CNN +F 2 "" H 5500 3200 29 0000 C CNN +F 3 "" H 5300 3100 60 0000 C CNN + 1 5300 3100 + -1 0 0 -1 +$EndComp +Wire Wire Line + 4300 2900 5200 2900 +Wire Wire Line + 4600 2100 4600 2900 +Connection ~ 4600 2900 +Wire Wire Line + 5100 1900 5100 2400 +Wire Wire Line + 5100 2400 4600 2400 +Connection ~ 4600 2400 +Connection ~ 5100 1900 +$Comp +L resistor R5 +U 1 1 6684EB6E +P 4250 3500 +F 0 "R5" H 4300 3630 50 0000 C CNN +F 1 "0.18k" H 4300 3450 50 0000 C CNN +F 2 "" H 4300 3480 30 0000 C CNN +F 3 "" V 4300 3550 30 0000 C CNN + 1 4250 3500 + 0 1 1 0 +$EndComp +$Comp +L resistor R6 +U 1 1 6684EB6F +P 5150 3500 +F 0 "R6" H 5200 3630 50 0000 C CNN +F 1 "20k" H 5200 3450 50 0000 C CNN +F 2 "" H 5200 3480 30 0000 C CNN +F 3 "" V 5200 3550 30 0000 C CNN + 1 5150 3500 + 0 1 1 0 +$EndComp +Wire Wire Line + 4300 3300 4300 3400 +Wire Wire Line + 5200 3300 5200 3400 +Wire Wire Line + 4300 3350 5200 3350 +Connection ~ 5200 3350 +Connection ~ 4300 3350 +$Comp +L eSim_Diode D1 +U 1 1 6684EB70 +P 4300 4650 +F 0 "D1" H 4300 4750 50 0000 C CNN +F 1 "eSim_Diode" H 4300 4550 50 0000 C CNN +F 2 "" H 4300 4650 60 0000 C CNN +F 3 "" H 4300 4650 60 0000 C CNN + 1 4300 4650 + 0 1 1 0 +$EndComp +$Comp +L eSim_NPN Q5 +U 1 1 6684EB71 +P 5100 4300 +F 0 "Q5" H 5000 4350 50 0000 R CNN +F 1 "eSim_NPN" H 5050 4450 50 0000 R CNN +F 2 "" H 5300 4400 29 0000 C CNN +F 3 "" H 5100 4300 60 0000 C CNN + 1 5100 4300 + 1 0 0 -1 +$EndComp +Wire Wire Line + 4300 3700 4300 4500 +Wire Wire Line + 5200 3700 5200 4100 +Wire Wire Line + 4900 4300 4300 4300 +Connection ~ 4300 4300 +$Comp +L resistor R7 +U 1 1 6684EB72 +P 5150 4700 +F 0 "R7" H 5200 4830 50 0000 C CNN +F 1 "1.0k" H 5200 4650 50 0000 C CNN +F 2 "" H 5200 4680 30 0000 C CNN +F 3 "" V 5200 4750 30 0000 C CNN + 1 5150 4700 + 0 1 1 0 +$EndComp +Wire Wire Line + 5200 4600 5200 4500 +Wire Wire Line + 5200 5100 5200 4900 +Connection ~ 3300 5100 +Wire Wire Line + 4300 4800 4300 5100 +Connection ~ 4300 5100 +$Comp +L resistor R8 +U 1 1 6684EB73 +P 5950 3500 +F 0 "R8" H 6000 3630 50 0000 C CNN +F 1 "2.2k" H 6000 3450 50 0000 C CNN +F 2 "" H 6000 3480 30 0000 C CNN +F 3 "" V 6000 3550 30 0000 C CNN + 1 5950 3500 + 0 1 1 0 +$EndComp +Wire Wire Line + 6000 2100 6000 3400 +$Comp +L eSim_NPN Q8 +U 1 1 6684EB74 +P 5900 4100 +F 0 "Q8" H 5800 4150 50 0000 R CNN +F 1 "eSim_NPN" H 5850 4250 50 0000 R CNN +F 2 "" H 6100 4200 29 0000 C CNN +F 3 "" H 5900 4100 60 0000 C CNN + 1 5900 4100 + 1 0 0 -1 +$EndComp +Wire Wire Line + 5250 4100 5700 4100 +Wire Wire Line + 5250 4100 5250 4050 +Wire Wire Line + 5250 4050 5200 4050 +Connection ~ 5200 4050 +Wire Wire Line + 5500 3900 5500 4100 +Connection ~ 5500 4100 +Wire Wire Line + 6000 3700 6000 3900 +$Comp +L eSim_PNP Q9 +U 1 1 6684EB75 +P 6700 3800 +F 0 "Q9" H 6600 3850 50 0000 R CNN +F 1 "eSim_PNP" H 6650 3950 50 0000 R CNN +F 2 "" H 6900 3900 29 0000 C CNN +F 3 "" H 6700 3800 60 0000 C CNN + 1 6700 3800 + 1 0 0 1 +$EndComp +Wire Wire Line + 5800 3800 6500 3800 +Connection ~ 6000 3800 +Wire Wire Line + 5500 3600 5800 3600 +Wire Wire Line + 5800 3600 5800 3800 +Wire Wire Line + 6800 3600 6800 3200 +Wire Wire Line + 6800 3200 6000 3200 +Connection ~ 6000 3200 +Wire Wire Line + 6000 5100 6000 4300 +Connection ~ 5200 5100 +Connection ~ 6000 5100 +$Comp +L eSim_NPN Q11 +U 1 1 6684EB76 +P 7600 1900 +F 0 "Q11" H 7500 1950 50 0000 R CNN +F 1 "eSim_NPN" H 7550 2050 50 0000 R CNN +F 2 "" H 7800 2000 29 0000 C CNN +F 3 "" H 7600 1900 60 0000 C CNN + 1 7600 1900 + 1 0 0 -1 +$EndComp +$Comp +L eSim_NPN Q10 +U 1 1 6684EB77 +P 7200 2600 +F 0 "Q10" H 7100 2650 50 0000 R CNN +F 1 "eSim_NPN" H 7150 2750 50 0000 R CNN +F 2 "" H 7400 2700 29 0000 C CNN +F 3 "" H 7200 2600 60 0000 C CNN + 1 7200 2600 + -1 0 0 -1 +$EndComp +$Comp +L eSim_NPN Q2 +U 1 1 6684EB78 +P 3700 4100 +F 0 "Q2" H 3600 4150 50 0000 R CNN +F 1 "eSim_NPN" H 3650 4250 50 0000 R CNN +F 2 "" H 3900 4200 29 0000 C CNN +F 3 "" H 3700 4100 60 0000 C CNN + 1 3700 4100 + 1 0 0 -1 +$EndComp +Wire Wire Line + 3300 4100 3500 4100 +Connection ~ 3300 4100 +Wire Wire Line + 3800 3900 3800 2650 +Wire Wire Line + 3800 2650 6400 2650 +Connection ~ 6000 2650 +Wire Wire Line + 6400 1900 7400 1900 +Wire Wire Line + 6400 2650 6400 1900 +$Comp +L resistor R9 +U 1 1 6684EB79 +P 7650 2900 +F 0 "R9" H 7700 3030 50 0000 C CNN +F 1 "5.0k" H 7700 2850 50 0000 C CNN +F 2 "" H 7700 2880 30 0000 C CNN +F 3 "" V 7700 2950 30 0000 C CNN + 1 7650 2900 + 0 1 1 0 +$EndComp +Wire Wire Line + 7700 2100 7700 2800 +$Comp +L eSim_NPN Q12 +U 1 1 6684EB7A +P 8200 2300 +F 0 "Q12" H 8100 2350 50 0000 R CNN +F 1 "eSim_NPN" H 8150 2450 50 0000 R CNN +F 2 "" H 8400 2400 29 0000 C CNN +F 3 "" H 8200 2300 60 0000 C CNN + 1 8200 2300 + 1 0 0 -1 +$EndComp +Wire Wire Line + 8000 2300 7700 2300 +Connection ~ 7700 2300 +$Comp +L resistor R10 +U 1 1 6684EB7B +P 8250 2800 +F 0 "R10" H 8300 2930 50 0000 C CNN +F 1 "3.0" H 8300 2750 50 0000 C CNN +F 2 "" H 8300 2780 30 0000 C CNN +F 3 "" V 8300 2850 30 0000 C CNN + 1 8250 2800 + 0 1 1 0 +$EndComp +$Comp +L resistor R11 +U 1 1 6684EB7C +P 8250 3400 +F 0 "R11" H 8300 3530 50 0000 C CNN +F 1 "2.0k" H 8300 3350 50 0000 C CNN +F 2 "" H 8300 3380 30 0000 C CNN +F 3 "" V 8300 3450 30 0000 C CNN + 1 8250 3400 + 0 1 1 0 +$EndComp +Wire Wire Line + 8300 2500 8300 2700 +Wire Wire Line + 8300 3000 8300 3300 +Wire Wire Line + 7400 2600 8300 2600 +Connection ~ 8300 2600 +Wire Wire Line + 7100 2800 7100 3200 +Wire Wire Line + 7100 3200 9000 3200 +Connection ~ 8300 3200 +Wire Wire Line + 7700 3100 7700 3200 +Connection ~ 7700 3200 +$Comp +L resistor R12 +U 1 1 6684EB7D +P 8250 4400 +F 0 "R12" H 8300 4530 50 0000 C CNN +F 1 "2.85k" H 8300 4350 50 0000 C CNN +F 2 "" H 8300 4380 30 0000 C CNN +F 3 "" V 8300 4450 30 0000 C CNN + 1 8250 4400 + 0 1 1 0 +$EndComp +Wire Wire Line + 8300 3600 8300 4300 +Wire Wire Line + 8300 5100 8300 4600 +Connection ~ 6800 5100 +Wire Wire Line + 8300 1300 8300 2100 +Wire Wire Line + 2800 1400 8300 1400 +Wire Wire Line + 2800 1400 2800 1600 +Wire Wire Line + 7700 1700 7700 1400 +Connection ~ 7700 1400 +Wire Wire Line + 6000 1700 6000 1400 +Connection ~ 6000 1400 +Wire Wire Line + 4600 1700 4600 1400 +Connection ~ 4600 1400 +Wire Wire Line + 3300 2100 3300 1400 +Connection ~ 3300 1400 +Wire Wire Line + 3000 2300 2800 2300 +Connection ~ 2800 2300 +Wire Wire Line + 5500 3100 7000 3100 +Wire Wire Line + 7000 3100 7000 3700 +Wire Wire Line + 7000 3700 8300 3700 +Connection ~ 8300 3700 +Wire Wire Line + 3800 4300 3800 5100 +Connection ~ 3800 5100 +Wire Wire Line + 7100 1900 7100 2400 +Connection ~ 7100 1900 +Wire Wire Line + 8300 1300 9100 1300 +Connection ~ 8300 1400 +$Comp +L capacitor_polarised C1 +U 1 1 6684EB83 +P 5500 3750 +F 0 "C1" H 5525 3850 50 0000 L CNN +F 1 "5p" H 5525 3650 50 0000 L CNN +F 2 "" H 5500 3750 50 0001 C CNN +F 3 "" H 5500 3750 50 0001 C CNN + 1 5500 3750 + 1 0 0 -1 +$EndComp +Wire Wire Line + 6800 4000 6800 5100 +Wire Wire Line + 8350 5100 8350 5250 +Connection ~ 8300 5100 +$Comp +L PORT U2 +U 1 1 6684ECD2 +P 9250 3200 +F 0 "U2" H 9300 3300 30 0000 C CNN +F 1 "PORT" H 9250 3200 30 0000 C CNN +F 2 "" H 9250 3200 60 0000 C CNN +F 3 "" H 9250 3200 60 0000 C CNN + 1 9250 3200 + -1 0 0 1 +$EndComp +$Comp +L PORT U2 +U 2 1 6684F14A +P 8350 5500 +F 0 "U2" H 8400 5600 30 0000 C CNN +F 1 "PORT" H 8350 5500 30 0000 C CNN +F 2 "" H 8350 5500 60 0000 C CNN +F 3 "" H 8350 5500 60 0000 C CNN + 2 8350 5500 + 0 -1 -1 0 +$EndComp +$Comp +L PORT U2 +U 3 1 6684F492 +P 9350 1300 +F 0 "U2" H 9400 1400 30 0000 C CNN +F 1 "PORT" H 9350 1300 30 0000 C CNN +F 2 "" H 9350 1300 60 0000 C CNN +F 3 "" H 9350 1300 60 0000 C CNN + 3 9350 1300 + -1 0 0 1 +$EndComp +$EndSCHEMATC diff --git a/library/SubcircuitLibrary/MC78L05_sub/MC78L05_IC.sub b/library/SubcircuitLibrary/MC78L05_sub/MC78L05_IC.sub new file mode 100644 index 00000000..4c0d6df5 --- /dev/null +++ b/library/SubcircuitLibrary/MC78L05_sub/MC78L05_IC.sub @@ -0,0 +1,39 @@ +* Subcircuit MC78L05_IC +.subckt MC78L05_IC net-_q10-pad3_ net-_d1-pad2_ net-_q1-pad1_ +* d:\fossee\esim\library\subcircuitlibrary\mc78l05_ic\mc78l05_ic.cir +.include PNP.lib +.include D.lib +.include NPN.lib +r1 net-_q1-pad1_ net-_q1-pad2_ 15k +q1 net-_q1-pad1_ net-_q1-pad2_ net-_q1-pad3_ Q2N2222 +r2 net-_q1-pad3_ net-_q3-pad2_ 3.8k +r3 net-_q3-pad2_ net-_q2-pad2_ 1.2k +r4 net-_q2-pad2_ net-_d1-pad2_ 420 +* u1 net-_d1-pad2_ net-_q1-pad2_ zener +q4 net-_q3-pad1_ net-_q3-pad1_ net-_q1-pad1_ Q2N2907A +q7 net-_q10-pad1_ net-_q3-pad1_ net-_q1-pad1_ Q2N2907A +q3 net-_q3-pad1_ net-_q3-pad2_ net-_q3-pad3_ Q2N2222 +q6 net-_q3-pad1_ net-_q6-pad2_ net-_q3-pad3_ Q2N2222 +r5 net-_q3-pad3_ net-_d1-pad1_ 0.18k +r6 net-_q3-pad3_ net-_c1-pad2_ 20k +d1 net-_d1-pad1_ net-_d1-pad2_ 1N4148 +q5 net-_c1-pad2_ net-_d1-pad1_ net-_q5-pad3_ Q2N2222 +r7 net-_q5-pad3_ net-_d1-pad2_ 1.0k +r8 net-_q10-pad1_ net-_c1-pad1_ 2.2k +q8 net-_c1-pad1_ net-_c1-pad2_ net-_d1-pad2_ Q2N2222 +q9 net-_d1-pad2_ net-_c1-pad1_ net-_q10-pad1_ Q2N2907A +q11 net-_q1-pad1_ net-_q10-pad1_ net-_q11-pad3_ Q2N2222 +q10 net-_q10-pad1_ net-_q10-pad2_ net-_q10-pad3_ Q2N2222 +q2 net-_q10-pad1_ net-_q2-pad2_ net-_d1-pad2_ Q2N2222 +r9 net-_q11-pad3_ net-_q10-pad3_ 5.0k +q12 net-_q1-pad1_ net-_q11-pad3_ net-_q10-pad2_ Q2N2222 +r10 net-_q10-pad2_ net-_q10-pad3_ 3.0 +r11 net-_q10-pad3_ net-_q6-pad2_ 2.0k +r12 net-_q6-pad2_ net-_d1-pad2_ 2.85k +c1 net-_c1-pad1_ net-_c1-pad2_ 5p +a1 net-_d1-pad2_ net-_q1-pad2_ u1 +* Schematic Name: zener, NgSpice Name: zener +.model u1 zener(v_breakdown=5.6 i_breakdown=2.0e-2 i_sat=1.0e-12 n_forward=1.0 limit_switch=FALSE ) +* Control Statements + +.ends MC78L05_IC \ No newline at end of file diff --git a/library/SubcircuitLibrary/MC78L05_sub/MC78L05_IC_Previous_Values.xml b/library/SubcircuitLibrary/MC78L05_sub/MC78L05_IC_Previous_Values.xml new file mode 100644 index 00000000..4f54bdf7 --- /dev/null +++ b/library/SubcircuitLibrary/MC78L05_sub/MC78L05_IC_Previous_Values.xml @@ -0,0 +1 @@ +truefalsefalseHzHz0Volts or AmperesVolts or AmperesVolts or AmperesVolts or AmperesVolts or AmperesVolts or AmperessecsecseczenerD:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libD:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.libD:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.libD:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libD:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libD:\FOSSEE\eSim\library\deviceModelLibrary\Diode\D.libD:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libD:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libD:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.libD:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libD:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libD:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.libD:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib \ No newline at end of file diff --git a/library/SubcircuitLibrary/MC78L05_sub/NPN.lib b/library/SubcircuitLibrary/MC78L05_sub/NPN.lib new file mode 100644 index 00000000..be5f3073 --- /dev/null +++ b/library/SubcircuitLibrary/MC78L05_sub/NPN.lib @@ -0,0 +1,4 @@ +.model Q2N2222 NPN( Is=14.34f Xti=3 Eg=1.11 Vaf=74.03 Bf=400 Ne=1.307 ++ Ise=14.34f Ikf=0.2847 Xtb=1.5 Br=6.092 Nc=2 Isc=0 Ikr=0 Rc=1 Cjc=7.306p ++ Mjc=0.3416 Vjc=0.75 Fc=0.5 Cje=22.01p Mje=0.377 Vje=0.75 Tr=46.91n Tf=411.1p ++ Itf=0.6 Vtf=1.7 Xtf=3 Rb=10) diff --git a/library/SubcircuitLibrary/MC78L05_sub/PNP.lib b/library/SubcircuitLibrary/MC78L05_sub/PNP.lib new file mode 100644 index 00000000..7edda0ea --- /dev/null +++ b/library/SubcircuitLibrary/MC78L05_sub/PNP.lib @@ -0,0 +1,4 @@ +.model Q2N2907A PNP(Is=650.6E-18 Xti=3 Eg=1.11 Vaf=115.7 Bf=231.7 Ne=1.829 ++ Ise=54.81f Ikf=1.079 Xtb=1.5 Br=3.563 Nc=2 Isc=0 Ikr=0 Rc=.715 ++ Cjc=14.76p Mjc=.5383 Vjc=.75 Fc=.5 Cje=19.82p Mje=.3357 Vje=.75 ++ Tr=111.3n Tf=603.7p Itf=.65 Vtf=5 Xtf=1.7 Rb=10) diff --git a/library/SubcircuitLibrary/MC78L05_sub/analysis b/library/SubcircuitLibrary/MC78L05_sub/analysis new file mode 100644 index 00000000..ebd5c0a9 --- /dev/null +++ b/library/SubcircuitLibrary/MC78L05_sub/analysis @@ -0,0 +1 @@ +.tran 0e-00 0e-00 0e-00 \ No newline at end of file -- cgit