From 19af40fa72cdc7589ca47d692a7e397b871dc467 Mon Sep 17 00:00:00 2001
From: GanderlaChaithanya
Date: Mon, 30 Jun 2025 12:29:03 +0530
Subject: Verilog Code for TriState Buffer for the SubCircuit - SN54ALS29827

---
 library/SubcircuitLibrary/sn54als29827/tristate_buff.v | 3 +++
 1 file changed, 3 insertions(+)
 create mode 100644 library/SubcircuitLibrary/sn54als29827/tristate_buff.v

diff --git a/library/SubcircuitLibrary/sn54als29827/tristate_buff.v b/library/SubcircuitLibrary/sn54als29827/tristate_buff.v
new file mode 100644
index 00000000..3f3863a7
--- /dev/null
+++ b/library/SubcircuitLibrary/sn54als29827/tristate_buff.v
@@ -0,0 +1,3 @@
+module tristate_buff(input wire a, input wire enable, output wire y);
+assign y = (enable) ? a : 1'bz;
+endmodule
\ No newline at end of file
-- 
cgit