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This repository contain source code for new flow of FreeEDA now know as eSim
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2020-02-14
common code for Win and Linux, merged py2 changes
rahulp13
2019-12-18
removed appending dock windows to current_project
rahulp13
2019-12-18
changed debug statement
rahulp13
2019-12-18
restored OMEdit code, trigger for rename_project
rahulp13
2019-07-02
Merge pull request #115 from nilshah98/ese
saurabhb17
2019-07-02
kicadschematic libraries added by ECE fellows 2019
nilshah98
2019-07-02
Subcircuit added by ECE fellows 2019
nilshah98
2019-07-02
deviceModel Libraries added by ECE fellows 2019
nilshah98
2019-07-02
Examples added by ECE fellows 2019
nilshah98
2019-07-01
Merge pull request #114 from sunilshetye/masterfixes
Sunil Shetye
2019-07-01
rename one of the versions of D.lib to userDiode.lib
Sunil Shetye
2019-07-01
remove extra + at the start
Sunil Shetye
2019-07-01
update files from eSim-Examples
Sunil Shetye
2019-07-01
add missing lib files
Sunil Shetye
2019-07-01
Half adder subcircuit filename conflict in Windows
Sunil Shetye
2019-07-01
remove temporary files
Sunil Shetye
2019-07-01
fix file permissions
Sunil Shetye
2019-07-01
Added missing .rst files. (#111)
Anjali Jaiswal
2019-07-01
Merge pull request #113 from sunilshetye/subcircuit
Sunil Shetye
2019-07-01
directly select filename
Sunil Shetye
2019-07-01
Merge pull request #112 from sunilshetye/kicadlibrary
Sunil Shetye
2019-07-01
Increased the no of ports form 8 to 26 for designing sub-circuits
Mudit Joshi
2019-07-01
Merge pull request #110 from anjalijaiswal08/KicadLibrary
Sunil Shetye
2019-06-27
Merge pull request #108 from sunilshetye/ignore
Sunil Shetye
2019-06-27
ignore
Sunil Shetye
2019-06-27
update esim subckt kicad schematic library
Sunil Shetye
2019-06-27
update esim pspice kicad schematic library
Sunil Shetye
2019-06-27
Merge pull request #104 from anjalijaiswal08/RenameProject
Sunil Shetye
2019-06-27
Bug Fixed
anjalijaiswal08
2019-06-27
Merge pull request #107 from anjalijaiswal08/UploadSubcircuit
Sunil Shetye
2019-06-27
Removed extra print statements
anjalijaiswal08
2019-06-27
Removed extra print statements
anjalijaiswal08
2019-06-27
removed needless lines
anjalijaiswal08
2019-06-27
Speel errors removed
anjalijaiswal08
2019-06-27
Pep8 done
anjalijaiswal08
2019-06-27
Pep8 changes
anjalijaiswal08
2019-06-27
uploading subcircuit done
anjalijaiswal08
2019-06-27
done
anjalijaiswal08
2019-06-27
changes need to be commited
anjalijaiswal08
2019-06-27
second commited
anjalijaiswal08
2019-06-27
second commited
anjalijaiswal08
2019-06-27
half commited
anjalijaiswal08
2019-06-27
Minor changes
anjalijaiswal08
2019-06-27
Uploading Subcircuit feature added
anjalijaiswal08
2019-06-27
final changes done
anjalijaiswal08
2019-06-27
Added loop and condition
anjalijaiswal08
2019-06-26
Few Changes
anjalijaiswal08
2019-06-26
Changed
anjalijaiswal08
2019-06-26
Made pep8 compliance
anjalijaiswal08
2019-06-26
Removed unwanted code
anjalijaiswal08
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