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-rw-r--r--src/SubcircuitLibrary/ua741/ua741-cache.bak100
-rw-r--r--src/SubcircuitLibrary/ua741/ua741.bak208
-rw-r--r--src/SubcircuitLibrary/ua741/ua741.cir.ckt9
-rw-r--r--src/SubcircuitLibrary/ua741/ua741.pro2
4 files changed, 1 insertions, 318 deletions
diff --git a/src/SubcircuitLibrary/ua741/ua741-cache.bak b/src/SubcircuitLibrary/ua741/ua741-cache.bak
deleted file mode 100644
index eaad34ad..00000000
--- a/src/SubcircuitLibrary/ua741/ua741-cache.bak
+++ /dev/null
@@ -1,100 +0,0 @@
-EESchema-LIBRARY Version 2.3 Date: Sunday 21 October 2012 01:22:10 AM IST
-#encoding utf-8
-#
-# C
-#
-DEF C C 0 10 N Y 1 F N
-F0 "C" 50 100 50 H V L CNN
-F1 "C" 50 -100 50 H V L CNN
-$FPLIST
- SM*
- C?
- C1-1
-$ENDFPLIST
-DRAW
-P 2 0 1 10 -100 -30 100 -30 N
-P 2 0 1 10 -100 30 100 30 N
-X ~ 1 0 200 170 D 40 40 1 1 P
-X ~ 2 0 -200 170 U 40 40 1 1 P
-ENDDRAW
-ENDDEF
-#
-# GND
-#
-DEF ~GND #PWR 0 0 Y Y 1 F P
-F0 "#PWR" 0 0 30 H I C CNN
-F1 "GND" 0 -70 30 H I C CNN
-DRAW
-P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N
-X GND 1 0 0 0 U 30 30 1 1 W N
-ENDDRAW
-ENDDEF
-#
-# PORT
-#
-DEF PORT U 0 40 Y Y 8 F N
-F0 "U" 0 -50 30 H V C CNN
-F1 "PORT" 0 0 30 H V C CNN
-DRAW
-A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0
-A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50
-S -100 50 100 -50 0 1 0 N
-X ~ 1 250 0 100 L 30 30 1 1 I
-X ~ 2 250 0 100 L 30 30 2 1 I
-X ~ 3 250 0 100 L 30 30 3 1 I
-X ~ 4 250 0 100 L 30 30 4 1 I
-X ~ 5 250 0 100 L 30 30 5 1 I
-X ~ 6 250 0 100 L 30 30 6 1 I
-X ~ 7 250 0 100 L 30 30 7 1 I
-X ~ 8 250 0 100 L 30 30 8 1 I
-ENDDRAW
-ENDDEF
-#
-# PWR_FLAG
-#
-DEF PWR_FLAG #FLG 0 0 N N 1 F P
-F0 "#FLG" 0 270 30 H I C CNN
-F1 "PWR_FLAG" 0 230 30 H V C CNN
-DRAW
-X pwr 1 0 0 0 U 20 20 0 0 w
-P 3 0 1 0 0 0 0 100 0 100 N
-P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N
-ENDDRAW
-ENDDEF
-#
-# R
-#
-DEF R R 0 0 N Y 1 F N
-F0 "R" 80 0 50 V V C CNN
-F1 "R" 0 0 50 V V C CNN
-$FPLIST
- R?
- SM0603
- SM0805
- R?-*
-$ENDFPLIST
-DRAW
-S -40 150 40 -150 0 1 12 N
-X ~ 1 0 250 100 D 60 60 1 1 P
-X ~ 2 0 -250 100 U 60 60 1 1 P
-ENDDRAW
-ENDDEF
-#
-# VCVS
-#
-DEF VCVS E 0 40 Y Y 1 F N
-F0 "E" -200 100 50 H V C CNN
-F1 "VCVS" -200 -50 50 H V C CNN
-$FPLIST
- 1_pin
-$ENDFPLIST
-DRAW
-S -100 100 100 -100 0 1 0 N
-X + 1 -300 50 200 R 35 35 1 1 P
-X - 2 300 50 200 L 35 35 1 1 P
-X +c 3 -50 -200 100 U 35 35 1 1 P
-X -c 4 50 -200 100 U 35 35 1 1 P
-ENDDRAW
-ENDDEF
-#
-#End Library
diff --git a/src/SubcircuitLibrary/ua741/ua741.bak b/src/SubcircuitLibrary/ua741/ua741.bak
deleted file mode 100644
index 6be92803..00000000
--- a/src/SubcircuitLibrary/ua741/ua741.bak
+++ /dev/null
@@ -1,208 +0,0 @@
-EESchema Schematic File Version 2 date Monday 17 December 2012 11:17:01 AM IST
-LIBS:power
-LIBS:device
-LIBS:transistors
-LIBS:conn
-LIBS:linear
-LIBS:regul
-LIBS:74xx
-LIBS:cmos4000
-LIBS:adc-dac
-LIBS:memory
-LIBS:xilinx
-LIBS:special
-LIBS:microcontrollers
-LIBS:dsp
-LIBS:microchip
-LIBS:analog_switches
-LIBS:motorola
-LIBS:texas
-LIBS:intel
-LIBS:audio
-LIBS:interface
-LIBS:digital-audio
-LIBS:philips
-LIBS:display
-LIBS:cypress
-LIBS:siliconi
-LIBS:opto
-LIBS:atmel
-LIBS:contrib
-LIBS:valves
-LIBS:analogSpice
-LIBS:converterSpice
-LIBS:digitalSpice
-LIBS:linearSpice
-LIBS:measurementSpice
-LIBS:portSpice
-LIBS:sourcesSpice
-LIBS:ua741-cache
-EELAYER 25 0
-EELAYER END
-$Descr A4 11700 8267
-encoding utf-8
-Sheet 1 1
-Title ""
-Date "20 oct 2012"
-Rev ""
-Comp ""
-Comment1 ""
-Comment2 ""
-Comment3 ""
-Comment4 ""
-$EndDescr
-$Comp
-L PORT U1
-U 3 1 5082C027
-P 6250 2500
-F 0 "U1" H 6250 2450 30 0000 C CNN
-F 1 "PORT" H 6250 2500 30 0000 C CNN
- 3 6250 2500
- -1 0 0 1
-$EndComp
-$Comp
-L PORT U1
-U 1 1 5082C011
-P 2300 3100
-F 0 "U1" H 2300 3050 30 0000 C CNN
-F 1 "PORT" H 2300 3100 30 0000 C CNN
- 1 2300 3100
- 1 0 0 -1
-$EndComp
-$Comp
-L PORT U1
-U 2 1 5082C00B
-P 2250 2600
-F 0 "U1" H 2250 2550 30 0000 C CNN
-F 1 "PORT" H 2250 2600 30 0000 C CNN
- 2 2250 2600
- 1 0 0 -1
-$EndComp
-Connection ~ 3700 3200
-Wire Wire Line
- 3450 3200 3700 3200
-Connection ~ 5000 3300
-Wire Wire Line
- 3700 3300 5250 3300
-Wire Wire Line
- 5250 3300 5250 3200
-Connection ~ 4550 3300
-Wire Wire Line
- 5000 3300 5000 2950
-Connection ~ 3700 3300
-Wire Wire Line
- 4550 3300 4550 3100
-Wire Wire Line
- 3900 2500 3700 2500
-Wire Wire Line
- 3700 2500 3700 2550
-Wire Wire Line
- 3450 2900 3300 2900
-Wire Wire Line
- 3300 2900 3300 3200
-Wire Wire Line
- 3300 3200 2950 3200
-Connection ~ 2950 3100
-Wire Wire Line
- 2950 3200 2950 3100
-Wire Wire Line
- 3000 2600 2500 2600
-Wire Wire Line
- 2550 3100 3000 3100
-Wire Wire Line
- 2950 2600 2950 2500
-Connection ~ 2950 2600
-Wire Wire Line
- 2950 2500 3300 2500
-Wire Wire Line
- 3300 2500 3300 2800
-Wire Wire Line
- 3300 2800 3450 2800
-Wire Wire Line
- 3700 3150 3700 3400
-Wire Wire Line
- 4550 2500 4550 2700
-Wire Wire Line
- 4400 2500 5000 2500
-Wire Wire Line
- 5000 2500 5000 2850
-Connection ~ 4550 2500
-Wire Wire Line
- 5250 2600 5250 2500
-Wire Wire Line
- 5250 2500 5350 2500
-Wire Wire Line
- 5850 2500 6000 2500
-$Comp
-L PWR_FLAG #FLG01
-U 1 1 508152A0
-P 3450 3200
-F 0 "#FLG01" H 3450 3470 30 0001 C CNN
-F 1 "PWR_FLAG" H 3450 3430 30 0000 C CNN
- 1 3450 3200
- 1 0 0 -1
-$EndComp
-$Comp
-L R Rout1
-U 1 1 50813F5B
-P 5600 2500
-F 0 "Rout1" V 5680 2500 50 0000 C CNN
-F 1 "75" V 5600 2500 50 0000 C CNN
- 1 5600 2500
- 0 1 1 0
-$EndComp
-$Comp
-L VCVS Eout1
-U 1 1 50813F0F
-P 5200 2900
-F 0 "Eout1" H 5000 3000 50 0000 C CNN
-F 1 "1" H 5000 2850 50 0000 C CNN
- 1 5200 2900
- 0 1 1 0
-$EndComp
-$Comp
-L C Cbw1
-U 1 1 50813EE0
-P 4550 2900
-F 0 "Cbw1" H 4600 3000 50 0000 L CNN
-F 1 "31.85e-9" H 4600 2800 50 0000 L CNN
- 1 4550 2900
- 1 0 0 -1
-$EndComp
-$Comp
-L R Rbw1
-U 1 1 50813EAB
-P 4150 2500
-F 0 "Rbw1" V 4230 2500 50 0000 C CNN
-F 1 "0.5e6" V 4150 2500 50 0000 C CNN
- 1 4150 2500
- 0 1 1 0
-$EndComp
-$Comp
-L GND #PWR02
-U 1 1 50813E0D
-P 3700 3400
-F 0 "#PWR02" H 3700 3400 30 0001 C CNN
-F 1 "GND" H 3700 3330 30 0001 C CNN
- 1 3700 3400
- 1 0 0 -1
-$EndComp
-$Comp
-L VCVS Ein1
-U 1 1 50813D7C
-P 3650 2850
-F 0 "Ein1" H 3450 2950 50 0000 C CNN
-F 1 "100e3" H 3450 2800 50 0000 C CNN
- 1 3650 2850
- 0 1 1 0
-$EndComp
-$Comp
-L R Rin1
-U 1 1 50813C57
-P 3000 2850
-F 0 "Rin1" V 3080 2850 50 0000 C CNN
-F 1 "2e6" V 3000 2850 50 0000 C CNN
- 1 3000 2850
- 1 0 0 -1
-$EndComp
-$EndSCHEMATC
diff --git a/src/SubcircuitLibrary/ua741/ua741.cir.ckt b/src/SubcircuitLibrary/ua741/ua741.cir.ckt
deleted file mode 100644
index 3661a9a2..00000000
--- a/src/SubcircuitLibrary/ua741/ua741.cir.ckt
+++ /dev/null
@@ -1,9 +0,0 @@
-* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist
-
-u1 6 7 3 port
-rout1 3 2 75
-eout1 2 0 1 0 1
-cbw1 1 0 31.85e-9
-rbw1 1 4 0.5e6
-ein1 4 0 7 6 100e3
-rin1 7 6 2e6
diff --git a/src/SubcircuitLibrary/ua741/ua741.pro b/src/SubcircuitLibrary/ua741/ua741.pro
index 5dbb81a5..be9bc92c 100644
--- a/src/SubcircuitLibrary/ua741/ua741.pro
+++ b/src/SubcircuitLibrary/ua741/ua741.pro
@@ -2,7 +2,7 @@ update=Monday 17 December 2012 06:14:06 PM IST
last_client=eeschema
[eeschema]
version=1
-LibDir=/home/yogesh/FreeEDA/library
+LibDir=
NetFmt=1
HPGLSpd=20
HPGLDm=15