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-rw-r--r--src/SubcircuitLibrary/7485/4_and.sch139
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diff --git a/src/SubcircuitLibrary/7485/4_and.sch b/src/SubcircuitLibrary/7485/4_and.sch
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index 883458e1..00000000
--- a/src/SubcircuitLibrary/7485/4_and.sch
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-EESchema Schematic File Version 2
-LIBS:texas
-LIBS:intel
-LIBS:audio
-LIBS:interface
-LIBS:digital-audio
-LIBS:philips
-LIBS:display
-LIBS:cypress
-LIBS:siliconi
-LIBS:opto
-LIBS:atmel
-LIBS:contrib
-LIBS:valves
-LIBS:eSim_Analog
-LIBS:eSim_Devices
-LIBS:eSim_Digital
-LIBS:eSim_Hybrid
-LIBS:eSim_Miscellaneous
-LIBS:eSim_Plot
-LIBS:eSim_Power
-LIBS:eSim_PSpice
-LIBS:eSim_Sources
-LIBS:eSim_Subckt
-LIBS:eSim_User
-EELAYER 25 0
-EELAYER END
-$Descr A4 11693 8268
-encoding utf-8
-Sheet 1 1
-Title ""
-Date ""
-Rev ""
-Comp ""
-Comment1 ""
-Comment2 ""
-Comment3 ""
-Comment4 ""
-$EndDescr
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-$EndComp
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-Wire Wire Line
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-Wire Wire Line
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-Wire Wire Line
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-$Comp
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-$EndComp
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-L PORT U1
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