diff options
Diffstat (limited to 'src/SubcircuitLibrary/2bit_upcounter/2bit_upcounter.cir.out')
| -rw-r--r-- | src/SubcircuitLibrary/2bit_upcounter/2bit_upcounter.cir.out | 20 |
1 files changed, 0 insertions, 20 deletions
diff --git a/src/SubcircuitLibrary/2bit_upcounter/2bit_upcounter.cir.out b/src/SubcircuitLibrary/2bit_upcounter/2bit_upcounter.cir.out deleted file mode 100644 index 4232f26a..00000000 --- a/src/SubcircuitLibrary/2bit_upcounter/2bit_upcounter.cir.out +++ /dev/null @@ -1,20 +0,0 @@ -* /home/mallikarjuna/downloads/esim-1.1.2/src/subcircuitlibrary/2bit_upcounter/2bit_upcounter.cir - -* u2 net-_u2-pad1_ net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad2_ net-_u1-pad3_ net-_u2-pad1_ d_dff -* u3 net-_u3-pad1_ net-_u2-pad1_ net-_u1-pad2_ net-_u1-pad2_ net-_u1-pad4_ net-_u3-pad1_ d_dff -* u1 net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ port -a1 net-_u2-pad1_ net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad2_ net-_u1-pad3_ net-_u2-pad1_ u2 -a2 net-_u3-pad1_ net-_u2-pad1_ net-_u1-pad2_ net-_u1-pad2_ net-_u1-pad4_ net-_u3-pad1_ u3 -* Schematic Name: d_dff, NgSpice Name: d_dff -.model u2 d_dff(ic=0 set_delay=1.0e-9 set_load=1.0e-12 reset_load=1.0e-12 clk_delay=1.0e-9 clk_load=1.0e-12 reset_delay=1.0 data_load=1.0e-12 fall_delay=1.0e-9 rise_delay=1.0e-9 ) -* Schematic Name: d_dff, NgSpice Name: d_dff -.model u3 d_dff(ic=0 set_delay=1.0e-9 set_load=1.0e-12 reset_load=1.0e-12 clk_delay=1.0e-9 clk_load=1.0e-12 reset_delay=1.0 data_load=1.0e-12 fall_delay=1.0e-9 rise_delay=1.0e-9 ) -.tran 0e-00 0e-00 0e-00 - -* Control Statements -.control -run -print allv > plot_data_v.txt -print alli > plot_data_i.txt -.endc -.end |