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-rw-r--r--nghdl/Example/nghdl_half_adder/nghdl_ha.vhdl22
1 files changed, 22 insertions, 0 deletions
diff --git a/nghdl/Example/nghdl_half_adder/nghdl_ha.vhdl b/nghdl/Example/nghdl_half_adder/nghdl_ha.vhdl
new file mode 100644
index 00000000..f9f2e929
--- /dev/null
+++ b/nghdl/Example/nghdl_half_adder/nghdl_ha.vhdl
@@ -0,0 +1,22 @@
+library ieee;
+use ieee.std_logic_1164.all;
+use ieee.numeric_std.all;
+
+entity nghdl_ha is
+port (
+ i_bit1 : in std_logic_vector(0 downto 0);
+ i_bit2 : in std_logic_vector(0 downto 0);
+ o_sum : out std_logic_vector(0 downto 0);
+ o_carry : out std_logic_vector(0 downto 0)
+ );
+end nghdl_ha;
+
+
+architecture rtl of nghdl_ha is
+
+begin
+
+ o_sum <= i_bit1 xor i_bit2;
+ o_carry <= i_bit1 and i_bit2;
+
+end rtl; \ No newline at end of file