diff options
Diffstat (limited to 'library/kicadLibrary/template/minnowboard-ls-lure')
7 files changed, 0 insertions, 793 deletions
diff --git a/library/kicadLibrary/template/minnowboard-ls-lure/meta/brd.png b/library/kicadLibrary/template/minnowboard-ls-lure/meta/brd.png Binary files differdeleted file mode 100644 index b0fbf11f..00000000 --- a/library/kicadLibrary/template/minnowboard-ls-lure/meta/brd.png +++ /dev/null diff --git a/library/kicadLibrary/template/minnowboard-ls-lure/meta/icon.png b/library/kicadLibrary/template/minnowboard-ls-lure/meta/icon.png Binary files differdeleted file mode 100644 index e7a9e741..00000000 --- a/library/kicadLibrary/template/minnowboard-ls-lure/meta/icon.png +++ /dev/null diff --git a/library/kicadLibrary/template/minnowboard-ls-lure/meta/info.html b/library/kicadLibrary/template/minnowboard-ls-lure/meta/info.html deleted file mode 100644 index c0f26ce4..00000000 --- a/library/kicadLibrary/template/minnowboard-ls-lure/meta/info.html +++ /dev/null @@ -1,27 +0,0 @@ -<!DOCTYPE HTML> -<HTML> -<HEAD> -<META HTTP-EQUIV="CONTENT-TYPE" CONTENT="text/html; charset=utf-8"> -<META content="text/html"> -<TITLE>MinnowBoard MAX/Turbot LS Lure Template</TITLE> -</HEAD> -<BODY> -<h1>MinnowBoard</h1> -<h2>Max/Turbot Low Speed Lure Template</h2> -<P> -This project template is the basis of a low speed expansion board (lure) for the -<A HREF="http://www.minnowboard.org/" TARGET="blank">Minnowboard MAX/Turbot</A>. -<BR><BR>This template includes a PCB edge defined according to the Minnowboard MAX or Turbot SBC -with the low speed connector and mounting holes placed correctly to align the two boards. -<BR><BR> -The board outline looks like the following: -</P> -<P><IMG SRC="brd.png" NAME="brd" ALIGN=BOTTOM BORDER=0> -<BR> -NOTE: The outlines in the Dwgs.User layer denote areas that should not contain through-hole or -bottom side components to avoid connectors on the base board. -<BR><BR><BR> -</P> -<P>Copyright (c) 2016 Michael Welling</P> -</BODY> -</HTML> diff --git a/library/kicadLibrary/template/minnowboard-ls-lure/minnowboard-ls-lure-cache.lib b/library/kicadLibrary/template/minnowboard-ls-lure/minnowboard-ls-lure-cache.lib deleted file mode 100644 index 7bbc1b4d..00000000 --- a/library/kicadLibrary/template/minnowboard-ls-lure/minnowboard-ls-lure-cache.lib +++ /dev/null @@ -1,134 +0,0 @@ -EESchema-LIBRARY Version 2.3 -#encoding utf-8 -# -# +3V3 -# -DEF +3V3 #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 -150 50 H I C CNN -F1 "+3V3" 0 140 50 H V C CNN -F2 "" 0 0 50 H V C CNN -F3 "" 0 0 50 H V C CNN -ALIAS +3.3V -DRAW -P 2 0 1 0 -30 50 0 100 N -P 2 0 1 0 0 0 0 100 N -P 2 0 1 0 0 100 30 50 N -X +3V3 1 0 0 0 U 50 50 1 1 W N -ENDDRAW -ENDDEF -# -# +5V -# -DEF +5V #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 -150 50 H I C CNN -F1 "+5V" 0 140 50 H V C CNN -F2 "" 0 0 50 H V C CNN -F3 "" 0 0 50 H V C CNN -DRAW -P 2 0 1 0 -30 50 0 100 N -P 2 0 1 0 0 0 0 100 N -P 2 0 1 0 0 100 30 50 N -X +5V 1 0 0 0 U 50 50 1 1 W N -ENDDRAW -ENDDEF -# -# CONN_02X13 -# -DEF CONN_02X13 P 0 1 Y N 1 F N -F0 "P" 0 700 50 H V C CNN -F1 "CONN_02X13" 0 0 50 V V C CNN -F2 "" 0 -1150 50 H V C CNN -F3 "" 0 -1150 50 H V C CNN -$FPLIST - Pin_Header_Straight_2X13 - Pin_Header_Angled_2X13 - Socket_Strip_Straight_2X13 - Socket_Strip_Angled_2X13 -$ENDFPLIST -DRAW -S -100 -595 -50 -605 0 1 0 N -S -100 -495 -50 -505 0 1 0 N -S -100 -395 -50 -405 0 1 0 N -S -100 -295 -50 -305 0 1 0 N -S -100 -195 -50 -205 0 1 0 N -S -100 -95 -50 -105 0 1 0 N -S -100 5 -50 -5 0 1 0 N -S -100 105 -50 95 0 1 0 N -S -100 205 -50 195 0 1 0 N -S -100 305 -50 295 0 1 0 N -S -100 405 -50 395 0 1 0 N -S -100 505 -50 495 0 1 0 N -S -100 605 -50 595 0 1 0 N -S -100 650 100 -650 0 1 0 N -S 50 -595 100 -605 0 1 0 N -S 50 -495 100 -505 0 1 0 N -S 50 -395 100 -405 0 1 0 N -S 50 -295 100 -305 0 1 0 N -S 50 -195 100 -205 0 1 0 N -S 50 -95 100 -105 0 1 0 N -S 50 5 100 -5 0 1 0 N -S 50 105 100 95 0 1 0 N -S 50 205 100 195 0 1 0 N -S 50 305 100 295 0 1 0 N -S 50 405 100 395 0 1 0 N -S 50 505 100 495 0 1 0 N -S 50 605 100 595 0 1 0 N -X P1 1 -250 600 150 R 50 50 1 1 P -X P2 2 250 600 150 L 50 50 1 1 P -X P3 3 -250 500 150 R 50 50 1 1 P -X P4 4 250 500 150 L 50 50 1 1 P -X P5 5 -250 400 150 R 50 50 1 1 P -X P6 6 250 400 150 L 50 50 1 1 P -X P7 7 -250 300 150 R 50 50 1 1 P -X P8 8 250 300 150 L 50 50 1 1 P -X P9 9 -250 200 150 R 50 50 1 1 P -X P10 10 250 200 150 L 50 50 1 1 P -X P20 20 250 -300 150 L 50 50 1 1 P -X P11 11 -250 100 150 R 50 50 1 1 P -X P21 21 -250 -400 150 R 50 50 1 1 P -X P12 12 250 100 150 L 50 50 1 1 P -X P22 22 250 -400 150 L 50 50 1 1 P -X P13 13 -250 0 150 R 50 50 1 1 P -X P23 23 -250 -500 150 R 50 50 1 1 P -X P14 14 250 0 150 L 50 50 1 1 P -X P24 24 250 -500 150 L 50 50 1 1 P -X P15 15 -250 -100 150 R 50 50 1 1 P -X P25 25 -250 -600 150 R 50 50 1 1 P -X P16 16 250 -100 150 L 50 50 1 1 P -X P26 26 250 -600 150 L 50 50 1 1 P -X P17 17 -250 -200 150 R 50 50 1 1 P -X P18 18 250 -200 150 L 50 50 1 1 P -X P19 19 -250 -300 150 R 50 50 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 -250 50 H I C CNN -F1 "GND" 0 -150 50 H V C CNN -F2 "" 0 0 50 H V C CNN -F3 "" 0 0 50 H V C CNN -DRAW -P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N -X GND 1 0 0 0 D 50 50 1 1 W N -ENDDRAW -ENDDEF -# -# Mounting_Hole -# -DEF Mounting_Hole MK 0 40 Y Y 1 F N -F0 "MK" 0 200 50 H V C CNN -F1 "Mounting_Hole" 0 125 50 H V C CNN -F2 "" 0 0 60 H I C CNN -F3 "" 0 0 60 H I C CNN -$FPLIST - Mounting?Hole* - Hole* -$ENDFPLIST -DRAW -C 0 0 50 0 1 50 N -ENDDRAW -ENDDEF -# -#End Library diff --git a/library/kicadLibrary/template/minnowboard-ls-lure/minnowboard-ls-lure.kicad_pcb b/library/kicadLibrary/template/minnowboard-ls-lure/minnowboard-ls-lure.kicad_pcb deleted file mode 100644 index 26641eb4..00000000 --- a/library/kicadLibrary/template/minnowboard-ls-lure/minnowboard-ls-lure.kicad_pcb +++ /dev/null @@ -1,321 +0,0 @@ -(kicad_pcb (version 20160815) (host pcbnew no-vcs-found-7409~56~ubuntu16.10.1) - - (general - (links 1) - (no_connects 1) - (area 38.235286 69.47162 197.449762 147.28) - (thickness 1.6) - (drawings 20) - (tracks 0) - (zones 0) - (modules 5) - (nets 26) - ) - - (page A4) - (layers - (0 F.Cu signal) - (31 B.Cu signal) - (32 B.Adhes user) - (33 F.Adhes user) - (34 B.Paste user) - (35 F.Paste user) - (36 B.SilkS user) - (37 F.SilkS user) - (38 B.Mask user) - (39 F.Mask user) - (40 Dwgs.User user) - (41 Cmts.User user) - (42 Eco1.User user) - (43 Eco2.User user) - (44 Edge.Cuts user) - (45 Margin user) - (46 B.CrtYd user) - (47 F.CrtYd user) - (48 B.Fab user) - (49 F.Fab user) - ) - - (setup - (last_trace_width 0.25) - (trace_clearance 0.2) - (zone_clearance 0.508) - (zone_45_only no) - (trace_min 0.2) - (segment_width 0.2) - (edge_width 0.2) - (via_size 0.6) - (via_drill 0.4) - (via_min_size 0.4) - (via_min_drill 0.3) - (uvia_size 0.3) - (uvia_drill 0.1) - (uvias_allowed no) - (uvia_min_size 0.2) - (uvia_min_drill 0.1) - (pcb_text_width 0.3) - (pcb_text_size 1.5 1.5) - (mod_edge_width 0.15) - (mod_text_size 1 1) - (mod_text_width 0.15) - (pad_size 3.302 3.302) - (pad_drill 3.302) - (pad_to_mask_clearance 0.0762) - (aux_axis_origin 96.52 144.78) - (grid_origin 96.52 144.78) - (visible_elements FFFFFF7F) - (pcbplotparams - (layerselection 0x000fc_80000001) - (usegerberextensions false) - (excludeedgelayer true) - (linewidth 0.100000) - (plotframeref false) - (viasonmask false) - (mode 1) - (useauxorigin false) - (hpglpennumber 1) - (hpglpenspeed 20) - (hpglpendiameter 15) - (psnegative false) - (psa4output false) - (plotreference true) - (plotvalue true) - (plotinvisibletext false) - (padsonsilk false) - (subtractmaskfromsilk false) - (outputformat 1) - (mirror false) - (drillshape 0) - (scaleselection 1) - (outputdirectory "")) - ) - - (net 0 "") - (net 1 GND) - (net 2 +5V) - (net 3 +3V3) - (net 4 GPIO_SPI_CS#) - (net 5 GPIO_UART1_TXD) - (net 6 GPIO_SPI_MISO) - (net 7 GPIO_UART1_RXD) - (net 8 GPIO_SPI_MOSI) - (net 9 GPIO_UART1_CTS) - (net 10 GPIO_SPI_CLK) - (net 11 GPIO_UART1_RTS) - (net 12 GPIO_I2C_SCL) - (net 13 GPIO_I2S_CLK) - (net 14 GPIO_I2C_SDA) - (net 15 GPIO_I2S_FRM) - (net 16 GPIO_UART2_TXD) - (net 17 GPIO_I2S_DO) - (net 18 GPIO_UART2_RXD) - (net 19 GPIO_I2S_DI) - (net 20 GPIO_S5_0) - (net 21 GPIO_PWM0) - (net 22 GPIO_S5_1) - (net 23 GPIO_PWM1) - (net 24 GPIO_S5_2) - (net 25 I2SMCLK_GPIO) - - (net_class Default "This is the default net class." - (clearance 0.2) - (trace_width 0.25) - (via_dia 0.6) - (via_drill 0.4) - (uvia_dia 0.3) - (uvia_drill 0.1) - (diff_pair_gap 0.25) - (diff_pair_width 0.2) - (add_net +3V3) - (add_net +5V) - (add_net GND) - (add_net GPIO_I2C_SCL) - (add_net GPIO_I2C_SDA) - (add_net GPIO_I2S_CLK) - (add_net GPIO_I2S_DI) - (add_net GPIO_I2S_DO) - (add_net GPIO_I2S_FRM) - (add_net GPIO_PWM0) - (add_net GPIO_PWM1) - (add_net GPIO_S5_0) - (add_net GPIO_S5_1) - (add_net GPIO_S5_2) - (add_net GPIO_SPI_CLK) - (add_net GPIO_SPI_CS#) - (add_net GPIO_SPI_MISO) - (add_net GPIO_SPI_MOSI) - (add_net GPIO_UART1_CTS) - (add_net GPIO_UART1_RTS) - (add_net GPIO_UART1_RXD) - (add_net GPIO_UART1_TXD) - (add_net GPIO_UART2_RXD) - (add_net GPIO_UART2_TXD) - (add_net I2SMCLK_GPIO) - ) - - (module Pin_Headers:Pin_Header_Straight_2x13 locked (layer F.Cu) (tedit 577F1E14) (tstamp 57710C62) - (at 109.855 142.24 90) - (descr "Through hole pin header") - (tags "pin header") - (path /576C994F) - (fp_text reference P1 (at 1.27 -3.175 90) (layer F.SilkS) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_text value CONN_02X13 (at 5.08 3.175 180) (layer F.Fab) hide - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_line (start -1.75 -1.75) (end -1.75 32.25) (layer F.CrtYd) (width 0.05)) - (fp_line (start 4.3 -1.75) (end 4.3 32.25) (layer F.CrtYd) (width 0.05)) - (fp_line (start -1.75 -1.75) (end 4.3 -1.75) (layer F.CrtYd) (width 0.05)) - (fp_line (start -1.75 32.25) (end 4.3 32.25) (layer F.CrtYd) (width 0.05)) - (fp_line (start 3.81 -1.27) (end 3.81 31.75) (layer F.SilkS) (width 0.15)) - (fp_line (start -1.27 1.27) (end -1.27 31.75) (layer F.SilkS) (width 0.15)) - (fp_line (start 3.81 31.75) (end -1.27 31.75) (layer F.SilkS) (width 0.15)) - (fp_line (start 3.81 -1.27) (end 1.27 -1.27) (layer F.SilkS) (width 0.15)) - (fp_line (start 0 -1.55) (end -1.55 -1.55) (layer F.SilkS) (width 0.15)) - (fp_line (start 1.27 -1.27) (end 1.27 1.27) (layer F.SilkS) (width 0.15)) - (fp_line (start 1.27 1.27) (end -1.27 1.27) (layer F.SilkS) (width 0.15)) - (fp_line (start -1.55 -1.55) (end -1.55 0) (layer F.SilkS) (width 0.15)) - (pad 1 thru_hole rect (at 0 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) - (net 1 GND)) - (pad 2 thru_hole oval (at 2.54 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) - (net 1 GND)) - (pad 3 thru_hole oval (at 0 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) - (net 2 +5V)) - (pad 4 thru_hole oval (at 2.54 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) - (net 3 +3V3)) - (pad 5 thru_hole oval (at 0 5.08 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) - (net 4 GPIO_SPI_CS#)) - (pad 6 thru_hole oval (at 2.54 5.08 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) - (net 5 GPIO_UART1_TXD)) - (pad 7 thru_hole oval (at 0 7.62 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) - (net 6 GPIO_SPI_MISO)) - (pad 8 thru_hole oval (at 2.54 7.62 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) - (net 7 GPIO_UART1_RXD)) - (pad 9 thru_hole oval (at 0 10.16 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) - (net 8 GPIO_SPI_MOSI)) - (pad 10 thru_hole oval (at 2.54 10.16 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) - (net 9 GPIO_UART1_CTS)) - (pad 11 thru_hole oval (at 0 12.7 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) - (net 10 GPIO_SPI_CLK)) - (pad 12 thru_hole oval (at 2.54 12.7 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) - (net 11 GPIO_UART1_RTS)) - (pad 13 thru_hole oval (at 0 15.24 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) - (net 12 GPIO_I2C_SCL)) - (pad 14 thru_hole oval (at 2.54 15.24 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) - (net 13 GPIO_I2S_CLK)) - (pad 15 thru_hole oval (at 0 17.78 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) - (net 14 GPIO_I2C_SDA)) - (pad 16 thru_hole oval (at 2.54 17.78 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) - (net 15 GPIO_I2S_FRM)) - (pad 17 thru_hole oval (at 0 20.32 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) - (net 16 GPIO_UART2_TXD)) - (pad 18 thru_hole oval (at 2.54 20.32 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) - (net 17 GPIO_I2S_DO)) - (pad 19 thru_hole oval (at 0 22.86 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) - (net 18 GPIO_UART2_RXD)) - (pad 20 thru_hole oval (at 2.54 22.86 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) - (net 19 GPIO_I2S_DI)) - (pad 21 thru_hole oval (at 0 25.4 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) - (net 20 GPIO_S5_0)) - (pad 22 thru_hole oval (at 2.54 25.4 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) - (net 21 GPIO_PWM0)) - (pad 23 thru_hole oval (at 0 27.94 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) - (net 22 GPIO_S5_1)) - (pad 24 thru_hole oval (at 2.54 27.94 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) - (net 23 GPIO_PWM1)) - (pad 25 thru_hole oval (at 0 30.48 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) - (net 24 GPIO_S5_2)) - (pad 26 thru_hole oval (at 2.54 30.48 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS) - (net 25 I2SMCLK_GPIO)) - (model Pin_Headers.3dshapes/Pin_Header_Straight_2x13.wrl - (at (xyz 0.05 -0.6 0)) - (scale (xyz 1 1 1)) - (rotate (xyz 0 0 90)) - ) - ) - - (module Mounting_Holes:MountingHole_3-5mm locked (layer F.Cu) (tedit 58633422) (tstamp 577DA462) - (at 191.77 140.97) - (descr "Mounting hole, Befestigungsbohrung, 3,5mm, No Annular, Kein Restring,") - (tags "Mounting hole, Befestigungsbohrung, 3,5mm, No Annular, Kein Restring,") - (path /58633372) - (fp_text reference MK2 (at 0 -4.50088) (layer F.SilkS) hide - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_text value Mounting_Hole (at 0 5.00126) (layer F.Fab) hide - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_circle (center 0 0) (end 3.5 0) (layer Cmts.User) (width 0.381)) - (pad 1 thru_hole circle (at 0 0) (size 3.5 3.5) (drill 3.5) (layers)) - ) - - (module Mounting_Holes:MountingHole_3-5mm locked (layer F.Cu) (tedit 58633418) (tstamp 577F1CAE) - (at 100.33 140.97) - (descr "Mounting hole, Befestigungsbohrung, 3,5mm, No Annular, Kein Restring,") - (tags "Mounting hole, Befestigungsbohrung, 3,5mm, No Annular, Kein Restring,") - (path /58633409) - (fp_text reference MK1 (at 0 -4.50088) (layer F.SilkS) hide - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_text value Mounting_Hole (at 0 5.00126) (layer F.Fab) hide - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_circle (center 0 0) (end 3.5 0) (layer Cmts.User) (width 0.381)) - (pad 1 thru_hole circle (at 0 0) (size 3.5 3.5) (drill 3.5) (layers)) - ) - - (module Mounting_Holes:MountingHole_3-5mm locked (layer F.Cu) (tedit 58633440) (tstamp 577F1CB9) - (at 100.33 74.93) - (descr "Mounting hole, Befestigungsbohrung, 3,5mm, No Annular, Kein Restring,") - (tags "Mounting hole, Befestigungsbohrung, 3,5mm, No Annular, Kein Restring,") - (path /5863348E) - (fp_text reference MK4 (at 0 -4.50088) (layer F.SilkS) hide - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_text value Mounting_Hole (at 0 5.00126) (layer F.Fab) hide - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_circle (center 0 0) (end 3.5 0) (layer Cmts.User) (width 0.381)) - (pad 1 thru_hole circle (at 0 0) (size 3.5 3.5) (drill 3.5) (layers)) - ) - - (module Mounting_Holes:MountingHole_3-5mm locked (layer F.Cu) (tedit 58633432) (tstamp 577F1CC4) - (at 191.77 74.93) - (descr "Mounting hole, Befestigungsbohrung, 3,5mm, No Annular, Kein Restring,") - (tags "Mounting hole, Befestigungsbohrung, 3,5mm, No Annular, Kein Restring,") - (path /58633454) - (fp_text reference MK3 (at 0 -4.50088) (layer F.SilkS) hide - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_text value Mounting_Hole (at 0 5.00126) (layer F.Fab) hide - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_circle (center 0 0) (end 3.5 0) (layer Cmts.User) (width 0.381)) - (pad 1 thru_hole circle (at 0 0) (size 3.5 3.5) (drill 3.5) (layers)) - ) - - (gr_line (start 96.52 110.15) (end 96.52 144.78) (layer Edge.Cuts) (width 0.2)) - (gr_line (start 195.58 96.83) (end 195.58 71.12) (angle 90) (layer Edge.Cuts) (width 0.15) (tstamp 586C5EA2)) - (gr_text "NOTE: NO BOTTOM SIDE OR THROUGH-HOLE\nCOMPONENTS IN THE AREAS DESIGNATED IN THE\nDWGS.USER LAYER TO AVOID COLLISION WITH\nMINNOWBOARD ETHERNET AND USB CONNECTORS." (at 66.421 101.092) (layer Cmts.User) - (effects (font (size 1.5 1.5) (thickness 0.3))) - ) - (gr_line (start 178.86 112.02) (end 195.58 96.83) (angle 90) (layer Dwgs.User) (width 0.2)) - (gr_line (start 178.86 96.83) (end 195.58 112.02) (angle 90) (layer Dwgs.User) (width 0.2)) - (gr_line (start 114.96 92.05) (end 96.52 110.15) (angle 90) (layer Dwgs.User) (width 0.2)) - (gr_line (start 96.52 92.05) (end 114.96 110.15) (angle 90) (layer Dwgs.User) (width 0.2)) - (gr_line (start 96.52 110.15) (end 96.52 92.05) (angle 90) (layer Edge.Cuts) (width 0.2)) - (gr_line (start 114.96 110.15) (end 96.52 110.15) (angle 90) (layer Dwgs.User) (width 0.2)) - (gr_line (start 114.96 92.05) (end 114.96 110.15) (angle 90) (layer Dwgs.User) (width 0.2)) - (gr_line (start 96.52 92.05) (end 114.96 92.05) (angle 90) (layer Dwgs.User) (width 0.2)) - (gr_line (start 178.86 112.02) (end 178.86 96.83) (angle 90) (layer Dwgs.User) (width 0.15)) - (gr_line (start 195.58 112.02) (end 178.86 112.02) (angle 90) (layer Dwgs.User) (width 0.15)) - (gr_line (start 195.58 96.83) (end 195.58 112.02) (angle 90) (layer Edge.Cuts) (width 0.15)) - (gr_line (start 178.86 96.83) (end 195.58 96.83) (angle 90) (layer Dwgs.User) (width 0.15)) - (target plus (at 96.52 144.78) (size 5) (width 0.15) (layer Edge.Cuts)) - (gr_line (start 96.52 71.12) (end 96.52 92.05) (angle 90) (layer Edge.Cuts) (width 0.15)) - (gr_line (start 195.58 71.12) (end 96.52 71.12) (angle 90) (layer Edge.Cuts) (width 0.15)) - (gr_line (start 195.58 144.78) (end 195.58 112.02) (angle 90) (layer Edge.Cuts) (width 0.15)) - (gr_line (start 96.52 144.78) (end 195.58 144.78) (angle 90) (layer Edge.Cuts) (width 0.15)) - -) diff --git a/library/kicadLibrary/template/minnowboard-ls-lure/minnowboard-ls-lure.pro b/library/kicadLibrary/template/minnowboard-ls-lure/minnowboard-ls-lure.pro deleted file mode 100644 index 83d9c9bd..00000000 --- a/library/kicadLibrary/template/minnowboard-ls-lure/minnowboard-ls-lure.pro +++ /dev/null @@ -1,61 +0,0 @@ -update=Tue 27 Dec 2016 09:36:51 PM CST -version=1 -last_client=kicad -[pcbnew] -version=1 -LastNetListRead= -UseCmpFile=1 -PadDrill=0.600000000000 -PadDrillOvalY=0.600000000000 -PadSizeH=1.500000000000 -PadSizeV=1.500000000000 -PcbTextSizeV=1.500000000000 -PcbTextSizeH=1.500000000000 -PcbTextThickness=0.300000000000 -ModuleTextSizeV=1.000000000000 -ModuleTextSizeH=1.000000000000 -ModuleTextSizeThickness=0.150000000000 -SolderMaskClearance=0.000000000000 -SolderMaskMinWidth=0.000000000000 -DrawSegmentWidth=0.200000000000 -BoardOutlineThickness=0.100000000000 -ModuleOutlineThickness=0.150000000000 -[cvpcb] -version=1 -NetIExt=net -[general] -version=1 -[eeschema] -version=1 -LibDir= -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=microcontrollers -LibName13=dsp -LibName14=microchip -LibName15=analog_switches -LibName16=motorola -LibName17=texas -LibName18=intel -LibName19=audio -LibName20=interface -LibName21=digital-audio -LibName22=philips -LibName23=display -LibName24=cypress -LibName25=siliconi -LibName26=opto -LibName27=atmel -LibName28=contrib -LibName29=valves -LibName30=mechanical diff --git a/library/kicadLibrary/template/minnowboard-ls-lure/minnowboard-ls-lure.sch b/library/kicadLibrary/template/minnowboard-ls-lure/minnowboard-ls-lure.sch deleted file mode 100644 index 12dd4533..00000000 --- a/library/kicadLibrary/template/minnowboard-ls-lure/minnowboard-ls-lure.sch +++ /dev/null @@ -1,250 +0,0 @@ -EESchema Schematic File Version 2 -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:mechanical -LIBS:minnowboard-ls-lure-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11693 8268 -encoding utf-8 -Sheet 1 1 -Title "" -Date "" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -$Comp -L CONN_02X13 P1 -U 1 1 576C994F -P 2600 2350 -F 0 "P1" H 2600 3050 50 0000 C CNN -F 1 "CONN_02X13" V 2600 2350 50 0000 C CNN -F 2 "Pin_Headers:Pin_Header_Straight_2x13" H 2600 1200 50 0001 C CNN -F 3 "" H 2600 1200 50 0000 C CNN - 1 2600 2350 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR3 -U 1 1 576DC243 -P 2950 3000 -F 0 "#PWR3" H 2950 2750 50 0001 C CNN -F 1 "GND" H 2950 2850 50 0000 C CNN -F 2 "" H 2950 3000 50 0000 C CNN -F 3 "" H 2950 3000 50 0000 C CNN - 1 2950 3000 - 1 0 0 -1 -$EndComp -$Comp -L GND #PWR2 -U 1 1 576DC271 -P 2250 3000 -F 0 "#PWR2" H 2250 2750 50 0001 C CNN -F 1 "GND" H 2250 2850 50 0000 C CNN -F 2 "" H 2250 3000 50 0000 C CNN -F 3 "" H 2250 3000 50 0000 C CNN - 1 2250 3000 - 1 0 0 -1 -$EndComp -$Comp -L +3.3V #PWR4 -U 1 1 576DC2D3 -P 3050 1650 -F 0 "#PWR4" H 3050 1500 50 0001 C CNN -F 1 "+3.3V" H 3050 1790 50 0000 C CNN -F 2 "" H 3050 1650 50 0000 C CNN -F 3 "" H 3050 1650 50 0000 C CNN - 1 3050 1650 - 1 0 0 -1 -$EndComp -$Comp -L +5V #PWR1 -U 1 1 576DC2E9 -P 2150 1650 -F 0 "#PWR1" H 2150 1500 50 0001 C CNN -F 1 "+5V" H 2150 1790 50 0000 C CNN -F 2 "" H 2150 1650 50 0000 C CNN -F 3 "" H 2150 1650 50 0000 C CNN - 1 2150 1650 - 1 0 0 -1 -$EndComp -Text GLabel 2100 1950 0 45 BiDi ~ 0 -GPIO_SPI_CS# -Text GLabel 2100 2050 0 45 BiDi ~ 0 -GPIO_SPI_MISO -Text GLabel 2100 2150 0 45 BiDi ~ 0 -GPIO_SPI_MOSI -Text GLabel 2100 2250 0 45 BiDi ~ 0 -GPIO_SPI_CLK -Text GLabel 2100 2350 0 45 BiDi ~ 0 -GPIO_I2C_SCL -Text GLabel 2100 2450 0 45 BiDi ~ 0 -GPIO_I2C_SDA -Text GLabel 2100 2550 0 45 BiDi ~ 0 -GPIO_UART2_TXD -Text GLabel 2100 2650 0 45 BiDi ~ 0 -GPIO_UART2_RXD -Text GLabel 2100 2750 0 45 BiDi ~ 0 -GPIO_S5_0 -Text GLabel 2100 2850 0 45 BiDi ~ 0 -GPIO_S5_1 -Text GLabel 2100 2950 0 45 BiDi ~ 0 -GPIO_S5_2 -Text GLabel 3075 1950 2 45 BiDi ~ 0 -GPIO_UART1_TXD -Text GLabel 3075 2050 2 45 Input ~ 0 -GPIO_UART1_RXD -Text GLabel 3075 2150 2 45 BiDi ~ 0 -GPIO_UART1_CTS -Text GLabel 3075 2250 2 45 BiDi ~ 0 -GPIO_UART1_RTS -Text GLabel 3075 2350 2 45 BiDi ~ 0 -GPIO_I2S_CLK -Text GLabel 3075 2450 2 45 BiDi ~ 0 -GPIO_I2S_FRM -Text GLabel 3075 2550 2 45 BiDi ~ 0 -GPIO_I2S_DO -Text GLabel 3075 2650 2 45 BiDi ~ 0 -GPIO_I2S_DI -Text GLabel 3075 2750 2 45 BiDi ~ 0 -GPIO_PWM0 -Text GLabel 3075 2850 2 45 BiDi ~ 0 -GPIO_PWM1 -Text GLabel 3075 2950 2 45 BiDi ~ 0 -I2SMCLK_GPIO -Wire Wire Line - 2100 1950 2350 1950 -Wire Wire Line - 2100 2050 2350 2050 -Wire Wire Line - 2100 2150 2350 2150 -Wire Wire Line - 2100 2250 2350 2250 -Wire Wire Line - 2100 2350 2350 2350 -Wire Wire Line - 2100 2450 2350 2450 -Wire Wire Line - 2100 2550 2350 2550 -Wire Wire Line - 2100 2650 2350 2650 -Wire Wire Line - 2100 2750 2350 2750 -Wire Wire Line - 2100 2850 2350 2850 -Wire Wire Line - 2100 2950 2350 2950 -Wire Wire Line - 2850 1950 3075 1950 -Wire Wire Line - 2850 2050 3075 2050 -Wire Wire Line - 2850 2150 3075 2150 -Wire Wire Line - 2850 2250 3075 2250 -Wire Wire Line - 2850 2350 3075 2350 -Wire Wire Line - 2850 2450 3075 2450 -Wire Wire Line - 2850 2550 3075 2550 -Wire Wire Line - 2850 2650 3075 2650 -Wire Wire Line - 2850 2750 3075 2750 -Wire Wire Line - 2850 2850 3075 2850 -Wire Wire Line - 2850 2950 3075 2950 -Wire Wire Line - 2850 1750 2950 1750 -Wire Wire Line - 2950 1750 2950 3000 -Wire Wire Line - 3050 1850 3050 1650 -Wire Wire Line - 2850 1850 3050 1850 -Wire Wire Line - 2350 1750 2250 1750 -Wire Wire Line - 2250 1750 2250 3000 -Wire Wire Line - 2150 1650 2150 1850 -Wire Wire Line - 2150 1850 2350 1850 -$Comp -L Mounting_Hole MK2 -U 1 1 58633372 -P 5350 7500 -F 0 "MK2" H 5350 7700 50 0000 C CNN -F 1 "Mounting_Hole" H 5350 7625 50 0000 C CNN -F 2 "Mounting_Holes:MountingHole_3-5mm" H 5350 7500 60 0001 C CNN -F 3 "" H 5350 7500 60 0001 C CNN - 1 5350 7500 - 1 0 0 -1 -$EndComp -$Comp -L Mounting_Hole MK1 -U 1 1 58633409 -P 4750 7500 -F 0 "MK1" H 4750 7700 50 0000 C CNN -F 1 "Mounting_Hole" H 4750 7625 50 0000 C CNN -F 2 "Mounting_Holes:MountingHole_3-5mm" H 4750 7500 60 0001 C CNN -F 3 "" H 4750 7500 60 0001 C CNN - 1 4750 7500 - 1 0 0 -1 -$EndComp -$Comp -L Mounting_Hole MK3 -U 1 1 58633454 -P 5950 7500 -F 0 "MK3" H 5950 7700 50 0000 C CNN -F 1 "Mounting_Hole" H 5950 7625 50 0000 C CNN -F 2 "Mounting_Holes:MountingHole_3-5mm" H 5950 7500 60 0001 C CNN -F 3 "" H 5950 7500 60 0001 C CNN - 1 5950 7500 - 1 0 0 -1 -$EndComp -$Comp -L Mounting_Hole MK4 -U 1 1 5863348E -P 6550 7500 -F 0 "MK4" H 6550 7700 50 0000 C CNN -F 1 "Mounting_Hole" H 6550 7625 50 0000 C CNN -F 2 "Mounting_Holes:MountingHole_3-5mm" H 6550 7500 60 0001 C CNN -F 3 "" H 6550 7500 60 0001 C CNN - 1 6550 7500 - 1 0 0 -1 -$EndComp -$EndSCHEMATC |
