1 files changed, 39 insertions, 0 deletions
diff --git a/library/SubcircuitLibrary/MC78L05_sub/MC78L05_IC.sub b/library/SubcircuitLibrary/MC78L05_sub/MC78L05_IC.sub
new file mode 100644
index 00000000..4c0d6df5
--- /dev/null
+++ b/library/SubcircuitLibrary/MC78L05_sub/MC78L05_IC.sub
@@ -0,0 +1,39 @@
+* Subcircuit MC78L05_IC
+.subckt MC78L05_IC net-_q10-pad3_ net-_d1-pad2_ net-_q1-pad1_ 
+* d:\fossee\esim\library\subcircuitlibrary\mc78l05_ic\mc78l05_ic.cir
+.include PNP.lib
+.include D.lib
+.include NPN.lib
+r1  net-_q1-pad1_ net-_q1-pad2_ 15k
+q1 net-_q1-pad1_ net-_q1-pad2_ net-_q1-pad3_ Q2N2222
+r2  net-_q1-pad3_ net-_q3-pad2_ 3.8k
+r3  net-_q3-pad2_ net-_q2-pad2_ 1.2k
+r4  net-_q2-pad2_ net-_d1-pad2_ 420
+* u1  net-_d1-pad2_ net-_q1-pad2_ zener
+q4 net-_q3-pad1_ net-_q3-pad1_ net-_q1-pad1_ Q2N2907A
+q7 net-_q10-pad1_ net-_q3-pad1_ net-_q1-pad1_ Q2N2907A
+q3 net-_q3-pad1_ net-_q3-pad2_ net-_q3-pad3_ Q2N2222
+q6 net-_q3-pad1_ net-_q6-pad2_ net-_q3-pad3_ Q2N2222
+r5  net-_q3-pad3_ net-_d1-pad1_ 0.18k
+r6  net-_q3-pad3_ net-_c1-pad2_ 20k
+d1 net-_d1-pad1_ net-_d1-pad2_ 1N4148
+q5 net-_c1-pad2_ net-_d1-pad1_ net-_q5-pad3_ Q2N2222
+r7  net-_q5-pad3_ net-_d1-pad2_ 1.0k
+r8  net-_q10-pad1_ net-_c1-pad1_ 2.2k
+q8 net-_c1-pad1_ net-_c1-pad2_ net-_d1-pad2_ Q2N2222
+q9 net-_d1-pad2_ net-_c1-pad1_ net-_q10-pad1_ Q2N2907A
+q11 net-_q1-pad1_ net-_q10-pad1_ net-_q11-pad3_ Q2N2222
+q10 net-_q10-pad1_ net-_q10-pad2_ net-_q10-pad3_ Q2N2222
+q2 net-_q10-pad1_ net-_q2-pad2_ net-_d1-pad2_ Q2N2222
+r9  net-_q11-pad3_ net-_q10-pad3_ 5.0k
+q12 net-_q1-pad1_ net-_q11-pad3_ net-_q10-pad2_ Q2N2222
+r10  net-_q10-pad2_ net-_q10-pad3_ 3.0
+r11  net-_q10-pad3_ net-_q6-pad2_ 2.0k
+r12  net-_q6-pad2_ net-_d1-pad2_ 2.85k
+c1  net-_c1-pad1_ net-_c1-pad2_ 5p
+a1 net-_d1-pad2_ net-_q1-pad2_ u1
+* Schematic Name:                             zener, NgSpice Name: zener
+.model u1 zener(v_breakdown=5.6 i_breakdown=2.0e-2 i_sat=1.0e-12 n_forward=1.0 limit_switch=FALSE )
+* Control Statements
+
+.ends MC78L05_IC
+\ No newline at end of file