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-rw-r--r--library/SubcircuitLibrary/LOG101/LOG101-cache.lib135
-rw-r--r--library/SubcircuitLibrary/LOG101/LOG101.cir18
-rw-r--r--library/SubcircuitLibrary/LOG101/LOG101.cir.out21
-rw-r--r--library/SubcircuitLibrary/LOG101/LOG101.pro71
-rw-r--r--library/SubcircuitLibrary/LOG101/LOG101.sch343
-rw-r--r--library/SubcircuitLibrary/LOG101/LOG101.sub15
-rw-r--r--library/SubcircuitLibrary/LOG101/LOG101_Previous_Values.xml1
-rw-r--r--library/SubcircuitLibrary/LOG101/NPN.lib4
-rw-r--r--library/SubcircuitLibrary/LOG101/PNP.lib4
-rw-r--r--library/SubcircuitLibrary/LOG101/README.md16
-rw-r--r--library/SubcircuitLibrary/LOG101/analysis1
-rw-r--r--library/SubcircuitLibrary/LOG101/lm_741-cache.lib119
-rw-r--r--library/SubcircuitLibrary/LOG101/lm_741-rescue.lib42
-rw-r--r--library/SubcircuitLibrary/LOG101/lm_741.cir43
-rw-r--r--library/SubcircuitLibrary/LOG101/lm_741.cir.out46
-rw-r--r--library/SubcircuitLibrary/LOG101/lm_741.pro45
-rw-r--r--library/SubcircuitLibrary/LOG101/lm_741.sch697
-rw-r--r--library/SubcircuitLibrary/LOG101/lm_741.sub40
-rw-r--r--library/SubcircuitLibrary/LOG101/lm_741_Previous_Values.xml1
-rw-r--r--library/SubcircuitLibrary/LOG101/npn_1.lib29
-rw-r--r--library/SubcircuitLibrary/LOG101/pnp_1.lib29
21 files changed, 1720 insertions, 0 deletions
diff --git a/library/SubcircuitLibrary/LOG101/LOG101-cache.lib b/library/SubcircuitLibrary/LOG101/LOG101-cache.lib
new file mode 100644
index 00000000..22a2176b
--- /dev/null
+++ b/library/SubcircuitLibrary/LOG101/LOG101-cache.lib
@@ -0,0 +1,135 @@
+EESchema-LIBRARY Version 2.3
+#encoding utf-8
+#
+# PORT
+#
+DEF PORT U 0 40 Y Y 26 F N
+F0 "U" 50 100 30 H V C CNN
+F1 "PORT" 0 0 30 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0
+A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50
+S -100 50 100 -50 0 1 0 N
+X ~ 1 250 0 100 L 30 30 1 1 B
+X ~ 2 250 0 100 L 30 30 2 1 B
+X ~ 3 250 0 100 L 30 30 3 1 B
+X ~ 4 250 0 100 L 30 30 4 1 B
+X ~ 5 250 0 100 L 30 30 5 1 B
+X ~ 6 250 0 100 L 30 30 6 1 B
+X ~ 7 250 0 100 L 30 30 7 1 B
+X ~ 8 250 0 100 L 30 30 8 1 B
+X ~ 9 250 0 100 L 30 30 9 1 B
+X ~ 10 250 0 100 L 30 30 10 1 B
+X ~ 11 250 0 100 L 30 30 11 1 B
+X ~ 12 250 0 100 L 30 30 12 1 B
+X ~ 13 250 0 100 L 30 30 13 1 B
+X ~ 14 250 0 100 L 30 30 14 1 B
+X ~ 15 250 0 100 L 30 30 15 1 B
+X ~ 16 250 0 100 L 30 30 16 1 B
+X ~ 17 250 0 100 L 30 30 17 1 B
+X ~ 18 250 0 100 L 30 30 18 1 B
+X ~ 19 250 0 100 L 30 30 19 1 B
+X ~ 20 250 0 100 L 30 30 20 1 B
+X ~ 21 250 0 100 L 30 30 21 1 B
+X ~ 22 250 0 100 L 30 30 22 1 B
+X ~ 23 250 0 100 L 30 30 23 1 B
+X ~ 24 250 0 100 L 30 30 24 1 B
+X ~ 25 250 0 100 L 30 30 25 1 B
+X ~ 26 250 0 100 L 30 30 26 1 B
+ENDDRAW
+ENDDEF
+#
+# eSim_C
+#
+DEF eSim_C C 0 10 N Y 1 F N
+F0 "C" 25 100 50 H V L CNN
+F1 "eSim_C" 25 -100 50 H V L CNN
+F2 "" 38 -150 30 H V C CNN
+F3 "" 0 0 60 H V C CNN
+ALIAS capacitor
+$FPLIST
+ C_*
+$ENDFPLIST
+DRAW
+P 2 0 1 20 -80 -30 80 -30 N
+P 2 0 1 20 -80 30 80 30 N
+X ~ 1 0 150 110 D 40 40 1 1 P
+X ~ 2 0 -150 110 U 40 40 1 1 P
+ENDDRAW
+ENDDEF
+#
+# eSim_GND
+#
+DEF eSim_GND #PWR 0 0 Y Y 1 F P
+F0 "#PWR" 0 -250 50 H I C CNN
+F1 "eSim_GND" 0 -150 50 H V C CNN
+F2 "" 0 0 50 H I C CNN
+F3 "" 0 0 50 H I C CNN
+DRAW
+P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
+X GND 1 0 0 0 D 50 50 1 1 W N
+ENDDRAW
+ENDDEF
+#
+# eSim_NPN
+#
+DEF eSim_NPN Q 0 0 Y N 1 F N
+F0 "Q" -100 50 50 H V R CNN
+F1 "eSim_NPN" -50 150 50 H V R CNN
+F2 "" 200 100 29 H V C CNN
+F3 "" 0 0 60 H V C CNN
+ALIAS BC547 Q2N2222
+DRAW
+C 50 0 111 0 1 10 N
+P 2 0 1 0 25 25 100 100 N
+P 3 0 1 0 25 -25 100 -100 100 -100 N
+P 3 0 1 20 25 75 25 -75 25 -75 N
+P 5 0 1 0 50 -70 70 -50 90 -90 50 -70 50 -70 F
+X C 1 100 200 100 D 50 50 1 1 P
+X B 2 -200 0 225 R 50 50 1 1 P
+X E 3 100 -200 100 U 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
+# eSim_R
+#
+DEF eSim_R R 0 0 N Y 1 F N
+F0 "R" 50 130 50 H V C CNN
+F1 "eSim_R" 50 -50 50 H V C CNN
+F2 "" 50 -20 30 H V C CNN
+F3 "" 50 50 30 V V C CNN
+ALIAS resistor
+$FPLIST
+ R_*
+ Resistor_*
+$ENDFPLIST
+DRAW
+S 150 10 -50 90 0 1 10 N
+X ~ 1 -100 50 50 R 60 60 1 1 P
+X ~ 2 200 50 50 L 60 60 1 1 P
+ENDDRAW
+ENDDEF
+#
+# lm_741
+#
+DEF lm_741 X 0 40 Y Y 1 F N
+F0 "X" -200 0 60 H V C CNN
+F1 "lm_741" -100 -250 60 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+P 4 0 1 0 -350 350 350 0 -350 -350 -350 350 N
+X off_null 1 -50 400 200 D 50 38 1 1 I
+X inv 2 -550 150 200 R 50 38 1 1 I
+X non_inv 3 -550 -100 200 R 50 38 1 1 I
+X v_neg 4 -150 -450 200 U 50 38 1 1 I
+X off_null 5 50 350 200 D 50 38 1 1 I
+X out 6 550 0 200 L 50 38 1 1 O
+X v_pos 7 -150 450 200 D 50 38 1 1 I
+X NC 8 150 -300 200 U 50 38 1 1 N
+ENDDRAW
+ENDDEF
+#
+#End Library
diff --git a/library/SubcircuitLibrary/LOG101/LOG101.cir b/library/SubcircuitLibrary/LOG101/LOG101.cir
new file mode 100644
index 00000000..c570faa5
--- /dev/null
+++ b/library/SubcircuitLibrary/LOG101/LOG101.cir
@@ -0,0 +1,18 @@
+* C:\FOSSEE\eSim\library\SubcircuitLibrary\LOG101\LOG101.cir
+
+* EESchema Netlist Version 1.1 (Spice format) creation date: 02/23/23 15:07:29
+
+* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N
+* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0
+
+* Sheet Name: /
+X1 ? Net-_Q1-Pad1_ GND V- ? Net-_Q1-Pad3_ V+ ? lm_741
+X2 ? Net-_C1-Pad2_ GND V- ? Net-_C1-Pad1_ V+ ? lm_741
+Q1 Net-_Q1-Pad1_ Net-_Q1-Pad2_ Net-_Q1-Pad3_ eSim_NPN
+C1 Net-_C1-Pad1_ Net-_C1-Pad2_ 100p
+R1 Net-_C1-Pad1_ Net-_Q1-Pad2_ 15.72k
+R2 Net-_Q1-Pad2_ GND 1k
+U1 Net-_C1-Pad2_ Net-_Q1-Pad1_ V+ V- GND Net-_C1-Pad1_ PORT
+Q2 Net-_C1-Pad2_ GND Net-_Q1-Pad3_ eSim_NPN
+
+.end
diff --git a/library/SubcircuitLibrary/LOG101/LOG101.cir.out b/library/SubcircuitLibrary/LOG101/LOG101.cir.out
new file mode 100644
index 00000000..8592b8fc
--- /dev/null
+++ b/library/SubcircuitLibrary/LOG101/LOG101.cir.out
@@ -0,0 +1,21 @@
+* c:\fossee\esim\library\subcircuitlibrary\log101\log101.cir
+
+.include lm_741.sub
+.include NPN.lib
+x1 ? net-_q1-pad1_ gnd v- ? net-_q1-pad3_ v+ ? lm_741
+x2 ? net-_c1-pad2_ gnd v- ? net-_c1-pad1_ v+ ? lm_741
+q1 net-_q1-pad1_ net-_q1-pad2_ net-_q1-pad3_ Q2N2222
+c1 net-_c1-pad1_ net-_c1-pad2_ 100p
+r1 net-_c1-pad1_ net-_q1-pad2_ 15.72k
+r2 net-_q1-pad2_ gnd 1k
+* u1 net-_c1-pad2_ net-_q1-pad1_ v+ v- gnd net-_c1-pad1_ port
+q2 net-_c1-pad2_ gnd net-_q1-pad3_ Q2N2222
+.tran 0e-00 0e-00 0e-00
+
+* Control Statements
+.control
+run
+print allv > plot_data_v.txt
+print alli > plot_data_i.txt
+.endc
+.end
diff --git a/library/SubcircuitLibrary/LOG101/LOG101.pro b/library/SubcircuitLibrary/LOG101/LOG101.pro
new file mode 100644
index 00000000..22f2d439
--- /dev/null
+++ b/library/SubcircuitLibrary/LOG101/LOG101.pro
@@ -0,0 +1,71 @@
+update=22/05/2015 07:44:53
+version=1
+last_client=kicad
+[general]
+version=1
+RootSch=
+BoardNm=
+[pcbnew]
+version=1
+LastNetListRead=
+UseCmpFile=1
+PadDrill=0.600000000000
+PadDrillOvalY=0.600000000000
+PadSizeH=1.500000000000
+PadSizeV=1.500000000000
+PcbTextSizeV=1.500000000000
+PcbTextSizeH=1.500000000000
+PcbTextThickness=0.300000000000
+ModuleTextSizeV=1.000000000000
+ModuleTextSizeH=1.000000000000
+ModuleTextSizeThickness=0.150000000000
+SolderMaskClearance=0.000000000000
+SolderMaskMinWidth=0.000000000000
+DrawSegmentWidth=0.200000000000
+BoardOutlineThickness=0.100000000000
+ModuleOutlineThickness=0.150000000000
+[cvpcb]
+version=1
+NetIExt=net
+[eeschema]
+version=1
+LibDir=
+[eeschema/libraries]
+LibName1=adc-dac
+LibName2=memory
+LibName3=xilinx
+LibName4=microcontrollers
+LibName5=dsp
+LibName6=microchip
+LibName7=analog_switches
+LibName8=motorola
+LibName9=texas
+LibName10=intel
+LibName11=audio
+LibName12=interface
+LibName13=digital-audio
+LibName14=philips
+LibName15=display
+LibName16=cypress
+LibName17=siliconi
+LibName18=opto
+LibName19=atmel
+LibName20=contrib
+LibName21=power
+LibName22=eSim_Plot
+LibName23=transistors
+LibName24=conn
+LibName25=eSim_User
+LibName26=regul
+LibName27=74xx
+LibName28=cmos4000
+LibName29=eSim_Analog
+LibName30=eSim_Devices
+LibName31=eSim_Digital
+LibName32=eSim_Hybrid
+LibName33=eSim_Miscellaneous
+LibName34=eSim_Power
+LibName35=eSim_Sources
+LibName36=eSim_Subckt
+LibName37=eSim_Nghdl
+LibName38=eSim_Ngveri
diff --git a/library/SubcircuitLibrary/LOG101/LOG101.sch b/library/SubcircuitLibrary/LOG101/LOG101.sch
new file mode 100644
index 00000000..738a6da5
--- /dev/null
+++ b/library/SubcircuitLibrary/LOG101/LOG101.sch
@@ -0,0 +1,343 @@
+EESchema Schematic File Version 2
+LIBS:adc-dac
+LIBS:memory
+LIBS:xilinx
+LIBS:microcontrollers
+LIBS:dsp
+LIBS:microchip
+LIBS:analog_switches
+LIBS:motorola
+LIBS:texas
+LIBS:intel
+LIBS:audio
+LIBS:interface
+LIBS:digital-audio
+LIBS:philips
+LIBS:display
+LIBS:cypress
+LIBS:siliconi
+LIBS:opto
+LIBS:atmel
+LIBS:contrib
+LIBS:power
+LIBS:eSim_Plot
+LIBS:transistors
+LIBS:conn
+LIBS:eSim_User
+LIBS:regul
+LIBS:74xx
+LIBS:cmos4000
+LIBS:eSim_Analog
+LIBS:eSim_Devices
+LIBS:eSim_Digital
+LIBS:eSim_Hybrid
+LIBS:eSim_Miscellaneous
+LIBS:eSim_Power
+LIBS:eSim_Sources
+LIBS:eSim_Subckt
+LIBS:eSim_Nghdl
+LIBS:eSim_Ngveri
+LIBS:LOG101-cache
+EELAYER 25 0
+EELAYER END
+$Descr A4 11693 8268
+encoding utf-8
+Sheet 1 1
+Title ""
+Date ""
+Rev ""
+Comp ""
+Comment1 ""
+Comment2 ""
+Comment3 ""
+Comment4 ""
+$EndDescr
+$Comp
+L lm_741 X1
+U 1 1 63EA744D
+P 5100 4650
+F 0 "X1" H 4900 4650 60 0000 C CNN
+F 1 "lm_741" H 5000 4400 60 0000 C CNN
+F 2 "" H 5100 4650 60 0000 C CNN
+F 3 "" H 5100 4650 60 0000 C CNN
+ 1 5100 4650
+ 1 0 0 -1
+$EndComp
+$Comp
+L lm_741 X2
+U 1 1 63EA74D9
+P 7000 4250
+F 0 "X2" H 6800 4250 60 0000 C CNN
+F 1 "lm_741" H 6900 4000 60 0000 C CNN
+F 2 "" H 7000 4250 60 0000 C CNN
+F 3 "" H 7000 4250 60 0000 C CNN
+ 1 7000 4250
+ 1 0 0 -1
+$EndComp
+$Comp
+L eSim_NPN Q1
+U 1 1 63EA7516
+P 5050 3650
+F 0 "Q1" H 4950 3700 50 0000 R CNN
+F 1 "eSim_NPN" H 5000 3800 50 0000 R CNN
+F 2 "" H 5250 3750 29 0000 C CNN
+F 3 "" H 5050 3650 60 0000 C CNN
+ 1 5050 3650
+ 0 -1 -1 0
+$EndComp
+Wire Wire Line
+ 4200 3550 4850 3550
+Wire Wire Line
+ 4550 4500 4550 3550
+Connection ~ 4550 3550
+Wire Wire Line
+ 5250 3550 5450 3550
+Wire Wire Line
+ 5650 4650 5650 4150
+Wire Wire Line
+ 5650 4150 5350 4150
+Wire Wire Line
+ 5350 4150 5350 3550
+Connection ~ 5350 3550
+Wire Wire Line
+ 5850 3550 6100 3550
+Wire Wire Line
+ 6100 3000 6100 4100
+Wire Wire Line
+ 6100 4100 6450 4100
+$Comp
+L capacitor C1
+U 1 1 63EA766F
+P 6500 3000
+F 0 "C1" H 6525 3100 50 0000 L CNN
+F 1 "100p" H 6525 2900 50 0000 L CNN
+F 2 "" H 6538 2850 30 0000 C CNN
+F 3 "" H 6500 3000 60 0000 C CNN
+ 1 6500 3000
+ 0 1 1 0
+$EndComp
+Wire Wire Line
+ 4150 3000 6350 3000
+Connection ~ 6100 3000
+Connection ~ 6100 3550
+$Comp
+L resistor R1
+U 1 1 63EA76F2
+P 7500 4600
+F 0 "R1" H 7550 4730 50 0000 C CNN
+F 1 "15.72k" H 7550 4550 50 0000 C CNN
+F 2 "" H 7550 4580 30 0000 C CNN
+F 3 "" V 7550 4650 30 0000 C CNN
+ 1 7500 4600
+ 0 1 1 0
+$EndComp
+$Comp
+L resistor R2
+U 1 1 63EA771B
+P 7500 5150
+F 0 "R2" H 7550 5280 50 0000 C CNN
+F 1 "1k" H 7550 5100 50 0000 C CNN
+F 2 "" H 7550 5130 30 0000 C CNN
+F 3 "" V 7550 5200 30 0000 C CNN
+ 1 7500 5150
+ 0 1 1 0
+$EndComp
+Wire Wire Line
+ 7550 5050 7550 4800
+Wire Wire Line
+ 5050 3850 5050 4000
+Wire Wire Line
+ 5050 4000 6000 4000
+Wire Wire Line
+ 6000 4000 6000 4950
+Wire Wire Line
+ 6000 4950 7550 4950
+Connection ~ 7550 4950
+Wire Wire Line
+ 7550 3000 7550 4500
+Wire Wire Line
+ 6650 3000 7550 3000
+Connection ~ 7550 4250
+$Comp
+L eSim_GND #PWR01
+U 1 1 63EA785A
+P 4400 4900
+F 0 "#PWR01" H 4400 4650 50 0001 C CNN
+F 1 "eSim_GND" H 4400 4750 50 0000 C CNN
+F 2 "" H 4400 4900 50 0001 C CNN
+F 3 "" H 4400 4900 50 0001 C CNN
+ 1 4400 4900
+ 1 0 0 -1
+$EndComp
+$Comp
+L eSim_GND #PWR02
+U 1 1 63EA7880
+P 7550 5500
+F 0 "#PWR02" H 7550 5250 50 0001 C CNN
+F 1 "eSim_GND" H 7550 5350 50 0000 C CNN
+F 2 "" H 7550 5500 50 0001 C CNN
+F 3 "" H 7550 5500 50 0001 C CNN
+ 1 7550 5500
+ 1 0 0 -1
+$EndComp
+$Comp
+L eSim_GND #PWR03
+U 1 1 63EA78A6
+P 5850 3900
+F 0 "#PWR03" H 5850 3650 50 0001 C CNN
+F 1 "eSim_GND" H 5850 3750 50 0000 C CNN
+F 2 "" H 5850 3900 50 0001 C CNN
+F 3 "" H 5850 3900 50 0001 C CNN
+ 1 5850 3900
+ 1 0 0 -1
+$EndComp
+$Comp
+L eSim_GND #PWR04
+U 1 1 63EA78D5
+P 6350 4550
+F 0 "#PWR04" H 6350 4300 50 0001 C CNN
+F 1 "eSim_GND" H 6350 4400 50 0000 C CNN
+F 2 "" H 6350 4550 50 0001 C CNN
+F 3 "" H 6350 4550 50 0001 C CNN
+ 1 6350 4550
+ 1 0 0 -1
+$EndComp
+Wire Wire Line
+ 4550 4750 4400 4750
+Wire Wire Line
+ 4400 4750 4400 4900
+Wire Wire Line
+ 7550 5500 7550 5350
+Wire Wire Line
+ 6450 4350 6350 4350
+Wire Wire Line
+ 6350 4350 6350 4550
+Wire Wire Line
+ 5650 3850 5850 3850
+Wire Wire Line
+ 5850 3850 5850 3900
+$Comp
+L PORT U1
+U 1 1 63EA7BBF
+P 3900 3000
+F 0 "U1" H 3950 3100 30 0000 C CNN
+F 1 "PORT" H 3900 3000 30 0000 C CNN
+F 2 "" H 3900 3000 60 0000 C CNN
+F 3 "" H 3900 3000 60 0000 C CNN
+ 1 3900 3000
+ 1 0 0 -1
+$EndComp
+$Comp
+L PORT U1
+U 6 1 63EA7EC1
+P 7950 4250
+F 0 "U1" H 8000 4350 30 0000 C CNN
+F 1 "PORT" H 7950 4250 30 0000 C CNN
+F 2 "" H 7950 4250 60 0000 C CNN
+F 3 "" H 7950 4250 60 0000 C CNN
+ 6 7950 4250
+ -1 0 0 1
+$EndComp
+$Comp
+L PORT U1
+U 2 1 63EA7EEC
+P 3950 3550
+F 0 "U1" H 4000 3650 30 0000 C CNN
+F 1 "PORT" H 3950 3550 30 0000 C CNN
+F 2 "" H 3950 3550 60 0000 C CNN
+F 3 "" H 3950 3550 60 0000 C CNN
+ 2 3950 3550
+ 1 0 0 -1
+$EndComp
+$Comp
+L PORT U1
+U 5 1 63EA8093
+P 7900 5400
+F 0 "U1" H 7950 5500 30 0000 C CNN
+F 1 "PORT" H 7900 5400 30 0000 C CNN
+F 2 "" H 7900 5400 60 0000 C CNN
+F 3 "" H 7900 5400 60 0000 C CNN
+ 5 7900 5400
+ -1 0 0 1
+$EndComp
+$Comp
+L PORT U1
+U 3 1 63EA8382
+P 5200 5800
+F 0 "U1" H 5250 5900 30 0000 C CNN
+F 1 "PORT" H 5200 5800 30 0000 C CNN
+F 2 "" H 5200 5800 60 0000 C CNN
+F 3 "" H 5200 5800 60 0000 C CNN
+ 3 5200 5800
+ 1 0 0 -1
+$EndComp
+$Comp
+L PORT U1
+U 4 1 63EA83BF
+P 6250 5800
+F 0 "U1" H 6300 5900 30 0000 C CNN
+F 1 "PORT" H 6250 5800 30 0000 C CNN
+F 2 "" H 6250 5800 60 0000 C CNN
+F 3 "" H 6250 5800 60 0000 C CNN
+ 4 6250 5800
+ -1 0 0 1
+$EndComp
+Text GLabel 5500 5500 0 60 Input ~ 0
+V+
+Text GLabel 5900 5500 2 60 Input ~ 0
+V-
+Wire Wire Line
+ 5550 5500 5500 5500
+Wire Wire Line
+ 5550 5500 5550 5800
+Connection ~ 5550 5800
+Wire Wire Line
+ 5900 5500 5850 5500
+Wire Wire Line
+ 5850 5500 5850 5800
+Connection ~ 5850 5800
+Text GLabel 5100 4150 2 60 Input ~ 0
+V+
+Text GLabel 7000 3650 2 60 Input ~ 0
+V+
+Text GLabel 5100 5250 2 60 Input ~ 0
+V-
+Text GLabel 7000 4800 2 60 Input ~ 0
+V-
+Wire Wire Line
+ 5100 4150 4950 4150
+Wire Wire Line
+ 4950 4150 4950 4200
+Wire Wire Line
+ 5100 5250 4950 5250
+Wire Wire Line
+ 4950 5250 4950 5100
+Wire Wire Line
+ 7000 3650 6850 3650
+Wire Wire Line
+ 6850 3650 6850 3800
+Wire Wire Line
+ 7000 4800 6850 4800
+Wire Wire Line
+ 6850 4800 6850 4700
+Wire Wire Line
+ 7650 5400 7550 5400
+Connection ~ 7550 5400
+Wire Wire Line
+ 7700 4250 7550 4250
+$Comp
+L eSim_NPN Q2
+U 1 1 63EA92EA
+P 5650 3650
+F 0 "Q2" H 5550 3700 50 0000 R CNN
+F 1 "eSim_NPN" H 5600 3800 50 0000 R CNN
+F 2 "" H 5850 3750 29 0000 C CNN
+F 3 "" H 5650 3650 60 0000 C CNN
+ 1 5650 3650
+ 0 1 -1 0
+$EndComp
+Wire Wire Line
+ 5550 5800 5450 5800
+Wire Wire Line
+ 5850 5800 6000 5800
+$EndSCHEMATC
diff --git a/library/SubcircuitLibrary/LOG101/LOG101.sub b/library/SubcircuitLibrary/LOG101/LOG101.sub
new file mode 100644
index 00000000..3d0c704a
--- /dev/null
+++ b/library/SubcircuitLibrary/LOG101/LOG101.sub
@@ -0,0 +1,15 @@
+* Subcircuit LOG101
+.subckt LOG101 net-_c1-pad2_ net-_q1-pad1_ v+ v- gnd net-_c1-pad1_
+* c:\fossee\esim\library\subcircuitlibrary\log101\log101.cir
+.include lm_741.sub
+.include NPN.lib
+x1 ? net-_q1-pad1_ gnd v- ? net-_q1-pad3_ v+ ? lm_741
+x2 ? net-_c1-pad2_ gnd v- ? net-_c1-pad1_ v+ ? lm_741
+q1 net-_q1-pad1_ net-_q1-pad2_ net-_q1-pad3_ Q2N2222
+c1 net-_c1-pad1_ net-_c1-pad2_ 100p
+r1 net-_c1-pad1_ net-_q1-pad2_ 15.72k
+r2 net-_q1-pad2_ gnd 1k
+q2 net-_c1-pad2_ gnd net-_q1-pad3_ Q2N2222
+* Control Statements
+
+.ends LOG101 \ No newline at end of file
diff --git a/library/SubcircuitLibrary/LOG101/LOG101_Previous_Values.xml b/library/SubcircuitLibrary/LOG101/LOG101_Previous_Values.xml
new file mode 100644
index 00000000..db2cbdf0
--- /dev/null
+++ b/library/SubcircuitLibrary/LOG101/LOG101_Previous_Values.xml
@@ -0,0 +1 @@
+<KicadtoNgspice><source /><model /><devicemodel><q1><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q1><q2><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q2></devicemodel><subcircuit><x1><field>C:\FOSSEE\eSim\library\SubcircuitLibrary\lm_741</field></x1><x2><field>C:\FOSSEE\eSim\library\SubcircuitLibrary\lm_741</field></x2></subcircuit><analysis><ac><field1 name="Lin">true</field1><field2 name="Dec">false</field2><field3 name="Oct">false</field3><field4 name="Start Frequency" /><field5 name="Stop Frequency" /><field6 name="No. of points" /><field7 name="Start Fre Combo">Hz</field7><field8 name="Stop Fre Combo">Hz</field8></ac><dc><field1 name="Source 1" /><field2 name="Start" /><field3 name="Increment" /><field4 name="Stop" /><field5 name="Operating Point">0</field5><field6 name="Start Combo">Volts or Amperes</field6><field7 name="Increment Combo">Volts or Amperes</field7><field8 name="Stop Combo">Volts or Amperes</field8><field9 name="Source 2" /><field10 name="Start" /><field11 name="Increment" /><field12 name="Stop" /><field13 name="Start Combo">Volts or Amperes</field13><field14 name="Increment Combo">Volts or Amperes</field14><field15 name="Stop Combo">Volts or Amperes</field15></dc><tran><field1 name="Start Time" /><field2 name="Step Time" /><field3 name="Stop Time" /><field4 name="Start Combo">Sec</field4><field5 name="Step Combo">Sec</field5><field6 name="Stop Combo">Sec</field6></tran></analysis></KicadtoNgspice> \ No newline at end of file
diff --git a/library/SubcircuitLibrary/LOG101/NPN.lib b/library/SubcircuitLibrary/LOG101/NPN.lib
new file mode 100644
index 00000000..7f2f0319
--- /dev/null
+++ b/library/SubcircuitLibrary/LOG101/NPN.lib
@@ -0,0 +1,4 @@
+.model Q2N2222 NPN( Is=14.34f Xti=3 Eg=1.11 Vaf=74.03 Bf=400 Ne=1.307
++ Ise=14.34f Ikf=.2847 Xtb=1.5 Br=6.092 Nc=2 Isc=0 Ikr=0 Rc=1 Cjc=7.306p
++ Mjc=.3416 Vjc=.75 Fc=.5 Cje=22.01p Mje=.377 Vje=.75 Tr=46.91n Tf=411.1p
++ Itf=.6 Vtf=1.7 Xtf=3 Rb=10)
diff --git a/library/SubcircuitLibrary/LOG101/PNP.lib b/library/SubcircuitLibrary/LOG101/PNP.lib
new file mode 100644
index 00000000..0eaa3e25
--- /dev/null
+++ b/library/SubcircuitLibrary/LOG101/PNP.lib
@@ -0,0 +1,4 @@
+.model Q2N2907A PNP(Is=650.6E-18 Xti=3 Eg=1.11 Vaf=115.7 Bf=231.7 Ne=1.829
++ Ise=54.81f Ikf=1.079 Xtb=1.5 Br=3.563 Nc=2 Isc=0 Ikr=0 Rc=.715
++ Cjc=14.76p Mjc=.5383 Vjc=.75 Fc=.5 Cje=19.82p Mje=.3357 Vje=.75
++ Tr=111.3n Tf=603.7p Itf=.65 Vtf=5 Xtf=1.7 Rb=10)
diff --git a/library/SubcircuitLibrary/LOG101/README.md b/library/SubcircuitLibrary/LOG101/README.md
new file mode 100644
index 00000000..c8b85446
--- /dev/null
+++ b/library/SubcircuitLibrary/LOG101/README.md
@@ -0,0 +1,16 @@
+
+# IC_LOG101 IC
+
+LOG101 is a LOGARITHMIC AND LOG RATIO AMPLIFIER IC.
+
+
+## Documentation
+
+To know the details of LOG101 IC please go through with the documentation : [LOG101_datasheet](https://www.ti.com/lit/ds/symlink/log101.pdf?ts=1690187676813&ref_url=https%253A%252F%252Fwww.google.co.in%252F)
+
+
+## Contributer
+
+Name: Hrittika Ghosh
+Year: 2023
+Position: FOSSEE Winter Intern 2023
diff --git a/library/SubcircuitLibrary/LOG101/analysis b/library/SubcircuitLibrary/LOG101/analysis
new file mode 100644
index 00000000..ebd5c0a9
--- /dev/null
+++ b/library/SubcircuitLibrary/LOG101/analysis
@@ -0,0 +1 @@
+.tran 0e-00 0e-00 0e-00 \ No newline at end of file
diff --git a/library/SubcircuitLibrary/LOG101/lm_741-cache.lib b/library/SubcircuitLibrary/LOG101/lm_741-cache.lib
new file mode 100644
index 00000000..6e908886
--- /dev/null
+++ b/library/SubcircuitLibrary/LOG101/lm_741-cache.lib
@@ -0,0 +1,119 @@
+EESchema-LIBRARY Version 2.3
+#encoding utf-8
+#
+# PORT
+#
+DEF PORT U 0 40 Y Y 26 F N
+F0 "U" 50 100 30 H V C CNN
+F1 "PORT" 0 0 30 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0
+A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50
+S -100 50 100 -50 0 1 0 N
+X ~ 1 250 0 100 L 30 30 1 1 B
+X ~ 2 250 0 100 L 30 30 2 1 B
+X ~ 3 250 0 100 L 30 30 3 1 B
+X ~ 4 250 0 100 L 30 30 4 1 B
+X ~ 5 250 0 100 L 30 30 5 1 B
+X ~ 6 250 0 100 L 30 30 6 1 B
+X ~ 7 250 0 100 L 30 30 7 1 B
+X ~ 8 250 0 100 L 30 30 8 1 B
+X ~ 9 250 0 100 L 30 30 9 1 B
+X ~ 10 250 0 100 L 30 30 10 1 B
+X ~ 11 250 0 100 L 30 30 11 1 B
+X ~ 12 250 0 100 L 30 30 12 1 B
+X ~ 13 250 0 100 L 30 30 13 1 B
+X ~ 14 250 0 100 L 30 30 14 1 B
+X ~ 15 250 0 100 L 30 30 15 1 B
+X ~ 16 250 0 100 L 30 30 16 1 B
+X ~ 17 250 0 100 L 30 30 17 1 B
+X ~ 18 250 0 100 L 30 30 18 1 B
+X ~ 19 250 0 100 L 30 30 19 1 B
+X ~ 20 250 0 100 L 30 30 20 1 B
+X ~ 21 250 0 100 L 30 30 21 1 B
+X ~ 22 250 0 100 L 30 30 22 1 B
+X ~ 23 250 0 100 L 30 30 23 1 B
+X ~ 24 250 0 100 L 30 30 24 1 B
+X ~ 25 250 0 100 L 30 30 25 1 B
+X ~ 26 250 0 100 L 30 30 26 1 B
+ENDDRAW
+ENDDEF
+#
+# eSim_C
+#
+DEF eSim_C C 0 10 N Y 1 F N
+F0 "C" 25 100 50 H V L CNN
+F1 "eSim_C" 25 -100 50 H V L CNN
+F2 "" 38 -150 30 H V C CNN
+F3 "" 0 0 60 H V C CNN
+$FPLIST
+ C_*
+$ENDFPLIST
+DRAW
+P 2 0 1 20 -80 -30 80 -30 N
+P 2 0 1 20 -80 30 80 30 N
+X ~ 1 0 150 110 D 40 40 1 1 P
+X ~ 2 0 -150 110 U 40 40 1 1 P
+ENDDRAW
+ENDDEF
+#
+# eSim_NPN
+#
+DEF eSim_NPN Q 0 0 Y N 1 F N
+F0 "Q" -100 50 50 H V R CNN
+F1 "eSim_NPN" -50 150 50 H V R CNN
+F2 "" 200 100 29 H V C CNN
+F3 "" 0 0 60 H V C CNN
+ALIAS BC547 Q2N2222
+DRAW
+C 50 0 111 0 1 10 N
+P 2 0 1 0 25 25 100 100 N
+P 3 0 1 0 25 -25 100 -100 100 -100 N
+P 3 0 1 20 25 75 25 -75 25 -75 N
+P 5 0 1 0 50 -70 70 -50 90 -90 50 -70 50 -70 F
+X C 1 100 200 100 D 50 50 1 1 C
+X B 2 -200 0 225 R 50 50 1 1 I
+X E 3 100 -200 100 U 50 50 1 1 E
+ENDDRAW
+ENDDEF
+#
+# eSim_PNP
+#
+DEF eSim_PNP Q 0 0 Y N 1 F N
+F0 "Q" -100 50 50 H V R CNN
+F1 "eSim_PNP" -50 150 50 H V R CNN
+F2 "" 200 100 29 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+C 50 0 111 0 1 10 N
+P 2 0 1 0 25 25 100 100 N
+P 3 0 1 0 25 -25 100 -100 100 -100 N
+P 3 0 1 20 25 75 25 -75 25 -75 N
+P 5 0 1 0 90 -70 70 -90 50 -50 90 -70 90 -70 F
+X C 1 100 200 100 D 50 50 1 1 C
+X B 2 -200 0 225 R 50 50 1 1 I
+X E 3 100 -200 100 U 50 50 1 1 E
+ENDDRAW
+ENDDEF
+#
+# eSim_R
+#
+DEF eSim_R R 0 0 N Y 1 F N
+F0 "R" 50 130 50 H V C CNN
+F1 "eSim_R" 50 50 50 H V C CNN
+F2 "" 50 -20 30 H V C CNN
+F3 "" 50 50 30 V V C CNN
+$FPLIST
+ R_*
+ Resistor_*
+$ENDFPLIST
+DRAW
+S 150 10 -50 90 0 1 10 N
+X ~ 1 -100 50 50 R 60 60 1 1 P
+X ~ 2 200 50 50 L 60 60 1 1 P
+ENDDRAW
+ENDDEF
+#
+#End Library
diff --git a/library/SubcircuitLibrary/LOG101/lm_741-rescue.lib b/library/SubcircuitLibrary/LOG101/lm_741-rescue.lib
new file mode 100644
index 00000000..bf8e4bd7
--- /dev/null
+++ b/library/SubcircuitLibrary/LOG101/lm_741-rescue.lib
@@ -0,0 +1,42 @@
+EESchema-LIBRARY Version 2.3
+#encoding utf-8
+#
+# eSim_NPN-RESCUE-lm_741
+#
+DEF eSim_NPN-RESCUE-lm_741 Q 0 0 Y N 1 F N
+F0 "Q" -100 50 50 H V R CNN
+F1 "eSim_NPN-RESCUE-lm_741" -50 150 50 H V R CNN
+F2 "" 200 100 29 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+C 50 0 111 0 1 10 N
+P 2 0 1 0 25 25 100 100 N
+P 3 0 1 0 25 -25 100 -100 100 -100 N
+P 3 0 1 20 25 75 25 -75 25 -75 N
+P 5 0 1 0 50 -70 70 -50 90 -90 50 -70 50 -70 F
+X C 1 100 200 100 D 50 50 1 1 C
+X B 2 -200 0 225 R 50 50 1 1 I
+X E 3 100 -200 100 U 50 50 1 1 E
+ENDDRAW
+ENDDEF
+#
+# eSim_PNP-RESCUE-lm_741
+#
+DEF eSim_PNP-RESCUE-lm_741 Q 0 0 Y N 1 F N
+F0 "Q" -100 50 50 H V R CNN
+F1 "eSim_PNP-RESCUE-lm_741" -50 150 50 H V R CNN
+F2 "" 200 100 29 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+C 50 0 111 0 1 10 N
+P 2 0 1 0 25 25 100 100 N
+P 3 0 1 0 25 -25 100 -100 100 -100 N
+P 3 0 1 20 25 75 25 -75 25 -75 N
+P 5 0 1 0 90 -70 70 -90 50 -50 90 -70 90 -70 F
+X C 1 100 200 100 D 50 50 1 1 C
+X B 2 -200 0 225 R 50 50 1 1 I
+X E 3 100 -200 100 U 50 50 1 1 E
+ENDDRAW
+ENDDEF
+#
+#End Library
diff --git a/library/SubcircuitLibrary/LOG101/lm_741.cir b/library/SubcircuitLibrary/LOG101/lm_741.cir
new file mode 100644
index 00000000..b7989199
--- /dev/null
+++ b/library/SubcircuitLibrary/LOG101/lm_741.cir
@@ -0,0 +1,43 @@
+* C:\Users\malli\eSim\src\SubcircuitLibrary\lm_741\lm_741.cir
+
+* EESchema Netlist Version 1.1 (Spice format) creation date: 05/25/19 19:37:28
+
+* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N
+* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0
+
+* Sheet Name: /
+Q1 Net-_Q1-Pad1_ Net-_Q1-Pad2_ Net-_Q1-Pad3_ eSim_NPN
+Q2 Net-_Q1-Pad1_ Net-_Q2-Pad2_ Net-_Q2-Pad3_ eSim_NPN
+Q6 Net-_Q3-Pad2_ Net-_Q13-Pad1_ Net-_Q1-Pad3_ eSim_PNP
+Q5 Net-_C1-Pad2_ Net-_Q13-Pad1_ Net-_Q2-Pad3_ eSim_PNP
+Q3 Net-_Q10-Pad3_ Net-_Q3-Pad2_ Net-_Q3-Pad3_ eSim_NPN
+Q4 Net-_Q1-Pad1_ Net-_Q1-Pad1_ Net-_Q10-Pad3_ eSim_PNP
+Q9 Net-_Q13-Pad1_ Net-_Q1-Pad1_ Net-_Q10-Pad3_ eSim_PNP
+Q8 Net-_C1-Pad2_ Net-_Q3-Pad3_ Net-_Q8-Pad3_ eSim_NPN
+Q7 Net-_Q3-Pad2_ Net-_Q3-Pad3_ Net-_Q7-Pad3_ eSim_NPN
+R1 Net-_Q7-Pad3_ Net-_Q12-Pad3_ 1k
+R2 Net-_Q3-Pad3_ Net-_Q12-Pad3_ 50k
+R3 Net-_Q8-Pad3_ Net-_Q12-Pad3_ 1k
+Q12 Net-_Q12-Pad1_ Net-_Q12-Pad1_ Net-_Q12-Pad3_ eSim_NPN
+Q13 Net-_Q13-Pad1_ Net-_Q12-Pad1_ Net-_Q13-Pad3_ eSim_NPN
+R4 Net-_Q13-Pad3_ Net-_Q12-Pad3_ 5k
+R11 Net-_Q10-Pad1_ Net-_Q12-Pad1_ 39k
+Q10 Net-_Q10-Pad1_ Net-_Q10-Pad1_ Net-_Q10-Pad3_ eSim_PNP
+Q11 Net-_C1-Pad1_ Net-_Q10-Pad1_ Net-_Q10-Pad3_ eSim_PNP
+Q14 Net-_C1-Pad1_ Net-_Q14-Pad2_ Net-_Q14-Pad3_ eSim_NPN
+R8 Net-_C1-Pad1_ Net-_Q14-Pad2_ 4.5k
+R7 Net-_Q14-Pad3_ Net-_Q14-Pad2_ 7.5k
+C1 Net-_C1-Pad1_ Net-_C1-Pad2_ 30p
+Q16 Net-_Q14-Pad3_ Net-_C1-Pad2_ Net-_Q15-Pad2_ eSim_NPN
+Q15 Net-_Q14-Pad3_ Net-_Q15-Pad2_ Net-_Q15-Pad3_ eSim_NPN
+R5 Net-_Q15-Pad2_ Net-_Q12-Pad3_ 50k
+R6 Net-_Q15-Pad3_ Net-_Q12-Pad3_ 50
+Q17 Net-_C1-Pad2_ Net-_Q15-Pad3_ Net-_Q12-Pad3_ eSim_NPN
+Q18 Net-_Q10-Pad3_ Net-_C1-Pad1_ Net-_Q18-Pad3_ eSim_NPN
+Q20 Net-_C1-Pad1_ Net-_Q18-Pad3_ Net-_Q20-Pad3_ eSim_NPN
+R9 Net-_Q18-Pad3_ Net-_Q20-Pad3_ 25
+R10 Net-_Q20-Pad3_ Net-_Q19-Pad3_ 50
+Q19 Net-_Q12-Pad3_ Net-_Q14-Pad3_ Net-_Q19-Pad3_ eSim_PNP
+U1 Net-_Q7-Pad3_ Net-_Q2-Pad2_ Net-_Q1-Pad2_ Net-_Q12-Pad3_ Net-_Q8-Pad3_ Net-_Q20-Pad3_ Net-_Q10-Pad3_ ? PORT
+
+.end
diff --git a/library/SubcircuitLibrary/LOG101/lm_741.cir.out b/library/SubcircuitLibrary/LOG101/lm_741.cir.out
new file mode 100644
index 00000000..01ede7ab
--- /dev/null
+++ b/library/SubcircuitLibrary/LOG101/lm_741.cir.out
@@ -0,0 +1,46 @@
+* c:\users\malli\esim\src\subcircuitlibrary\lm_741\lm_741.cir
+
+.include npn_1.lib
+.include pnp_1.lib
+q1 net-_q1-pad1_ net-_q1-pad2_ net-_q1-pad3_ npn_1
+q2 net-_q1-pad1_ net-_q2-pad2_ net-_q2-pad3_ npn_1
+q6 net-_q3-pad2_ net-_q13-pad1_ net-_q1-pad3_ pnp_1
+q5 net-_c1-pad2_ net-_q13-pad1_ net-_q2-pad3_ pnp_1
+q3 net-_q10-pad3_ net-_q3-pad2_ net-_q3-pad3_ npn_1
+q4 net-_q1-pad1_ net-_q1-pad1_ net-_q10-pad3_ pnp_1
+q9 net-_q13-pad1_ net-_q1-pad1_ net-_q10-pad3_ pnp_1
+q8 net-_c1-pad2_ net-_q3-pad3_ net-_q8-pad3_ npn_1
+q7 net-_q3-pad2_ net-_q3-pad3_ net-_q7-pad3_ npn_1
+r1 net-_q7-pad3_ net-_q12-pad3_ 1k
+r2 net-_q3-pad3_ net-_q12-pad3_ 50k
+r3 net-_q8-pad3_ net-_q12-pad3_ 1k
+q12 net-_q12-pad1_ net-_q12-pad1_ net-_q12-pad3_ npn_1
+q13 net-_q13-pad1_ net-_q12-pad1_ net-_q13-pad3_ npn_1
+r4 net-_q13-pad3_ net-_q12-pad3_ 5k
+r11 net-_q10-pad1_ net-_q12-pad1_ 39k
+q10 net-_q10-pad1_ net-_q10-pad1_ net-_q10-pad3_ pnp_1
+q11 net-_c1-pad1_ net-_q10-pad1_ net-_q10-pad3_ pnp_1
+q14 net-_c1-pad1_ net-_q14-pad2_ net-_q14-pad3_ npn_1
+r8 net-_c1-pad1_ net-_q14-pad2_ 4.5k
+r7 net-_q14-pad3_ net-_q14-pad2_ 7.5k
+c1 net-_c1-pad1_ net-_c1-pad2_ 30p
+q16 net-_q14-pad3_ net-_c1-pad2_ net-_q15-pad2_ npn_1
+q15 net-_q14-pad3_ net-_q15-pad2_ net-_q15-pad3_ npn_1
+r5 net-_q15-pad2_ net-_q12-pad3_ 50k
+r6 net-_q15-pad3_ net-_q12-pad3_ 50
+q17 net-_c1-pad2_ net-_q15-pad3_ net-_q12-pad3_ npn_1
+q18 net-_q10-pad3_ net-_c1-pad1_ net-_q18-pad3_ npn_1
+q20 net-_c1-pad1_ net-_q18-pad3_ net-_q20-pad3_ npn_1
+r9 net-_q18-pad3_ net-_q20-pad3_ 25
+r10 net-_q20-pad3_ net-_q19-pad3_ 50
+q19 net-_q12-pad3_ net-_q14-pad3_ net-_q19-pad3_ pnp_1
+* u1 net-_q7-pad3_ net-_q2-pad2_ net-_q1-pad2_ net-_q12-pad3_ net-_q8-pad3_ net-_q20-pad3_ net-_q10-pad3_ ? port
+.tran 0e-00 0e-00 0e-00
+
+* Control Statements
+.control
+run
+print allv > plot_data_v.txt
+print alli > plot_data_i.txt
+.endc
+.end
diff --git a/library/SubcircuitLibrary/LOG101/lm_741.pro b/library/SubcircuitLibrary/LOG101/lm_741.pro
new file mode 100644
index 00000000..222fb5cb
--- /dev/null
+++ b/library/SubcircuitLibrary/LOG101/lm_741.pro
@@ -0,0 +1,45 @@
+update=02/07/23 21:24:54
+version=1
+last_client=eeschema
+[general]
+version=1
+RootSch=
+BoardNm=
+[pcbnew]
+version=1
+LastNetListRead=
+UseCmpFile=1
+PadDrill=0.600000000000
+PadDrillOvalY=0.600000000000
+PadSizeH=1.500000000000
+PadSizeV=1.500000000000
+PcbTextSizeV=1.500000000000
+PcbTextSizeH=1.500000000000
+PcbTextThickness=0.300000000000
+ModuleTextSizeV=1.000000000000
+ModuleTextSizeH=1.000000000000
+ModuleTextSizeThickness=0.150000000000
+SolderMaskClearance=0.000000000000
+SolderMaskMinWidth=0.000000000000
+DrawSegmentWidth=0.200000000000
+BoardOutlineThickness=0.100000000000
+ModuleOutlineThickness=0.150000000000
+[cvpcb]
+version=1
+NetIExt=net
+[eeschema]
+version=1
+LibDir=
+[eeschema/libraries]
+LibName1=lm_741-rescue
+LibName2=power
+LibName3=eSim_Analog
+LibName4=eSim_Devices
+LibName5=eSim_Digital
+LibName6=eSim_Hybrid
+LibName7=eSim_Miscellaneous
+LibName8=eSim_Plot
+LibName9=eSim_Power
+LibName10=eSim_User
+LibName11=eSim_Sources
+LibName12=eSim_Subckt
diff --git a/library/SubcircuitLibrary/LOG101/lm_741.sch b/library/SubcircuitLibrary/LOG101/lm_741.sch
new file mode 100644
index 00000000..6a74cf22
--- /dev/null
+++ b/library/SubcircuitLibrary/LOG101/lm_741.sch
@@ -0,0 +1,697 @@
+EESchema Schematic File Version 2
+LIBS:power
+LIBS:eSim_Analog
+LIBS:eSim_Devices
+LIBS:eSim_Digital
+LIBS:eSim_Hybrid
+LIBS:eSim_Miscellaneous
+LIBS:eSim_Plot
+LIBS:eSim_Power
+LIBS:eSim_PSpice
+LIBS:eSim_Sources
+LIBS:eSim_Subckt
+LIBS:eSim_User
+LIBS:lm_741-cache
+EELAYER 25 0
+EELAYER END
+$Descr A4 11693 8268
+encoding utf-8
+Sheet 1 1
+Title ""
+Date ""
+Rev ""
+Comp ""
+Comment1 ""
+Comment2 ""
+Comment3 ""
+Comment4 ""
+$EndDescr
+$Comp
+L eSim_NPN Q1
+U 1 1 5CE90A7B
+P 2650 2700
+F 0 "Q1" H 2550 2750 50 0000 R CNN
+F 1 "eSim_NPN" H 2600 2850 50 0000 R CNN
+F 2 "" H 2850 2800 29 0000 C CNN
+F 3 "" H 2650 2700 60 0000 C CNN
+ 1 2650 2700
+ 1 0 0 -1
+$EndComp
+$Comp
+L eSim_NPN Q2
+U 1 1 5CE90A7C
+P 4300 2700
+F 0 "Q2" H 4200 2750 50 0000 R CNN
+F 1 "eSim_NPN" H 4250 2850 50 0000 R CNN
+F 2 "" H 4500 2800 29 0000 C CNN
+F 3 "" H 4300 2700 60 0000 C CNN
+ 1 4300 2700
+ -1 0 0 -1
+$EndComp
+$Comp
+L eSim_PNP Q6
+U 1 1 5CE90A7D
+P 3000 3200
+F 0 "Q6" H 2900 3250 50 0000 R CNN
+F 1 "eSim_PNP" H 2950 3350 50 0000 R CNN
+F 2 "" H 3200 3300 29 0000 C CNN
+F 3 "" H 3000 3200 60 0000 C CNN
+ 1 3000 3200
+ -1 0 0 1
+$EndComp
+$Comp
+L eSim_PNP Q5
+U 1 1 5CE90A7E
+P 3950 3200
+F 0 "Q5" H 3850 3250 50 0000 R CNN
+F 1 "eSim_PNP" H 3900 3350 50 0000 R CNN
+F 2 "" H 4150 3300 29 0000 C CNN
+F 3 "" H 3950 3200 60 0000 C CNN
+ 1 3950 3200
+ 1 0 0 1
+$EndComp
+$Comp
+L eSim_NPN Q3
+U 1 1 5CE90A7F
+P 3300 4000
+F 0 "Q3" H 3200 4050 50 0000 R CNN
+F 1 "eSim_NPN" H 3250 4150 50 0000 R CNN
+F 2 "" H 3500 4100 29 0000 C CNN
+F 3 "" H 3300 4000 60 0000 C CNN
+ 1 3300 4000
+ 1 0 0 -1
+$EndComp
+$Comp
+L eSim_PNP Q4
+U 1 1 5CE90A80
+P 3850 2000
+F 0 "Q4" H 3750 2050 50 0000 R CNN
+F 1 "eSim_PNP" H 3800 2150 50 0000 R CNN
+F 2 "" H 4050 2100 29 0000 C CNN
+F 3 "" H 3850 2000 60 0000 C CNN
+ 1 3850 2000
+ -1 0 0 1
+$EndComp
+$Comp
+L eSim_PNP Q9
+U 1 1 5CE90A81
+P 5200 2000
+F 0 "Q9" H 5100 2050 50 0000 R CNN
+F 1 "eSim_PNP" H 5150 2150 50 0000 R CNN
+F 2 "" H 5400 2100 29 0000 C CNN
+F 3 "" H 5200 2000 60 0000 C CNN
+ 1 5200 2000
+ 1 0 0 1
+$EndComp
+$Comp
+L eSim_NPN Q8
+U 1 1 5CE90A82
+P 3950 4600
+F 0 "Q8" H 3850 4650 50 0000 R CNN
+F 1 "eSim_NPN" H 3900 4750 50 0000 R CNN
+F 2 "" H 4150 4700 29 0000 C CNN
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diff --git a/library/SubcircuitLibrary/LOG101/lm_741.sub b/library/SubcircuitLibrary/LOG101/lm_741.sub
new file mode 100644
index 00000000..4e4feca4
--- /dev/null
+++ b/library/SubcircuitLibrary/LOG101/lm_741.sub
@@ -0,0 +1,40 @@
+* Subcircuit lm_741
+.subckt lm_741 net-_q7-pad3_ net-_q2-pad2_ net-_q1-pad2_ net-_q12-pad3_ net-_q8-pad3_ net-_q20-pad3_ net-_q10-pad3_ ?
+* c:\users\malli\esim\src\subcircuitlibrary\lm_741\lm_741.cir
+.include npn_1.lib
+.include pnp_1.lib
+q1 net-_q1-pad1_ net-_q1-pad2_ net-_q1-pad3_ npn_1
+q2 net-_q1-pad1_ net-_q2-pad2_ net-_q2-pad3_ npn_1
+q6 net-_q3-pad2_ net-_q13-pad1_ net-_q1-pad3_ pnp_1
+q5 net-_c1-pad2_ net-_q13-pad1_ net-_q2-pad3_ pnp_1
+q3 net-_q10-pad3_ net-_q3-pad2_ net-_q3-pad3_ npn_1
+q4 net-_q1-pad1_ net-_q1-pad1_ net-_q10-pad3_ pnp_1
+q9 net-_q13-pad1_ net-_q1-pad1_ net-_q10-pad3_ pnp_1
+q8 net-_c1-pad2_ net-_q3-pad3_ net-_q8-pad3_ npn_1
+q7 net-_q3-pad2_ net-_q3-pad3_ net-_q7-pad3_ npn_1
+r1 net-_q7-pad3_ net-_q12-pad3_ 1k
+r2 net-_q3-pad3_ net-_q12-pad3_ 50k
+r3 net-_q8-pad3_ net-_q12-pad3_ 1k
+q12 net-_q12-pad1_ net-_q12-pad1_ net-_q12-pad3_ npn_1
+q13 net-_q13-pad1_ net-_q12-pad1_ net-_q13-pad3_ npn_1
+r4 net-_q13-pad3_ net-_q12-pad3_ 5k
+r11 net-_q10-pad1_ net-_q12-pad1_ 39k
+q10 net-_q10-pad1_ net-_q10-pad1_ net-_q10-pad3_ pnp_1
+q11 net-_c1-pad1_ net-_q10-pad1_ net-_q10-pad3_ pnp_1
+q14 net-_c1-pad1_ net-_q14-pad2_ net-_q14-pad3_ npn_1
+r8 net-_c1-pad1_ net-_q14-pad2_ 4.5k
+r7 net-_q14-pad3_ net-_q14-pad2_ 7.5k
+c1 net-_c1-pad1_ net-_c1-pad2_ 30p
+q16 net-_q14-pad3_ net-_c1-pad2_ net-_q15-pad2_ npn_1
+q15 net-_q14-pad3_ net-_q15-pad2_ net-_q15-pad3_ npn_1
+r5 net-_q15-pad2_ net-_q12-pad3_ 50k
+r6 net-_q15-pad3_ net-_q12-pad3_ 50
+q17 net-_c1-pad2_ net-_q15-pad3_ net-_q12-pad3_ npn_1
+q18 net-_q10-pad3_ net-_c1-pad1_ net-_q18-pad3_ npn_1
+q20 net-_c1-pad1_ net-_q18-pad3_ net-_q20-pad3_ npn_1
+r9 net-_q18-pad3_ net-_q20-pad3_ 25
+r10 net-_q20-pad3_ net-_q19-pad3_ 50
+q19 net-_q12-pad3_ net-_q14-pad3_ net-_q19-pad3_ pnp_1
+* Control Statements
+
+.ends lm_741 \ No newline at end of file
diff --git a/library/SubcircuitLibrary/LOG101/lm_741_Previous_Values.xml b/library/SubcircuitLibrary/LOG101/lm_741_Previous_Values.xml
new file mode 100644
index 00000000..228572ce
--- /dev/null
+++ b/library/SubcircuitLibrary/LOG101/lm_741_Previous_Values.xml
@@ -0,0 +1 @@
+<KicadtoNgspice><source /><model /><devicemodel><q1><field /></q1><q2><field /></q2><q6><field /></q6><q5><field /></q5><q3><field /></q3><q4><field /></q4><q9><field /></q9><q8><field /></q8><q7><field /></q7><q12><field /></q12><q13><field /></q13><q10><field /></q10><q11><field /></q11><q14><field /></q14><q16><field /></q16><q15><field /></q15><q17><field /></q17><q18><field /></q18><q20><field /></q20><q19><field /></q19></devicemodel><subcircuit /><analysis><ac><field1 name="Lin">true</field1><field2 name="Dec">false</field2><field3 name="Oct">false</field3><field4 name="Start Frequency" /><field5 name="Stop Frequency" /><field6 name="No. of points" /><field7 name="Start Fre Combo">Hz</field7><field8 name="Stop Fre Combo">Hz</field8></ac><dc><field1 name="Source 1" /><field2 name="Start" /><field3 name="Increment" /><field4 name="Stop" /><field5 name="Operating Point">0</field5><field6 name="Start Combo">Volts or Amperes</field6><field7 name="Increment Combo">Volts or Amperes</field7><field8 name="Stop Combo">Volts or Amperes</field8><field9 name="Source 2" /><field10 name="Start" /><field11 name="Increment" /><field12 name="Stop" /><field13 name="Start Combo">Volts or Amperes</field13><field14 name="Increment Combo">Volts or Amperes</field14><field15 name="Stop Combo">Volts or Amperes</field15></dc><tran><field1 name="Start Time" /><field2 name="Step Time" /><field3 name="Stop Time" /><field4 name="Start Combo">Sec</field4><field5 name="Step Combo">Sec</field5><field6 name="Stop Combo">Sec</field6></tran></analysis></KicadtoNgspice> \ No newline at end of file
diff --git a/library/SubcircuitLibrary/LOG101/npn_1.lib b/library/SubcircuitLibrary/LOG101/npn_1.lib
new file mode 100644
index 00000000..4a863e3e
--- /dev/null
+++ b/library/SubcircuitLibrary/LOG101/npn_1.lib
@@ -0,0 +1,29 @@
+.model npn_1 NPN(
++ Vtf=1.7
++ Cjc=0.5p
++ Nc=2
++ Tr=46.91n
++ Ne=1.307
++ Cje=0.5p
++ Isc=0
++ Xtb=1.5
++ Rb=500
++ Rc=1
++ Tf=411.1p
++ Xti=3
++ Ikr=0
++ Bf=125
++ Fc=.5
++ Ise=14.34f
++ Br=6.092
++ Ikf=.2847
++ Mje=.377
++ Mjc=.3416
++ Vaf=74.03
++ Vjc=.75
++ Vje=.75
++ Xtf=3
++ Itf=.6
++ Is=14.34f
++ Eg=1.11
+) \ No newline at end of file
diff --git a/library/SubcircuitLibrary/LOG101/pnp_1.lib b/library/SubcircuitLibrary/LOG101/pnp_1.lib
new file mode 100644
index 00000000..c486429f
--- /dev/null
+++ b/library/SubcircuitLibrary/LOG101/pnp_1.lib
@@ -0,0 +1,29 @@
+.model pnp_1 PNP(
++ Vtf=1.7
++ Cjc=1.5p
++ Nc=2
++ Tr=46.91n
++ Ne=1.307
++ Cje=0.3p
++ Isc=0
++ Xtb=1.5
++ Rb=250
++ Rc=1
++ Tf=411.1p
++ Xti=3
++ Ikr=0
++ Bf=25
++ Fc=.5
++ Ise=14.34f
++ Br=6.092
++ Ikf=.2847
++ Mje=.377
++ Mjc=.3416
++ Vaf=74.03
++ Vjc=.75
++ Vje=.75
++ Xtf=3
++ Itf=.6
++ Is=14.34f
++ Eg=1.11
+) \ No newline at end of file