diff options
Diffstat (limited to 'Windows/spice/examples/various')
24 files changed, 0 insertions, 1377 deletions
diff --git a/Windows/spice/examples/various/3d_loop.sp b/Windows/spice/examples/various/3d_loop.sp deleted file mode 100644 index 5f64efd1..00000000 --- a/Windows/spice/examples/various/3d_loop.sp +++ /dev/null @@ -1,179 +0,0 @@ -testing loops -*variables are global -*vector reside only in the plot where they where created - -.param rr = 10k - -R1 r2 0 r = {rr + 40*TEMPER} -V1 r2 0 1 - -.control -*create a new plot as our base plot -setplot new -set curplottitle = "crossplot" -set plotname=$curplot - -let aa = 5 -let bb = 3 -let cc = 6 -set aa="$&aa" -set bb="$&bb" -set cc="$&cc" - -* generate vector with all (here 90) elements -let result=vector(90) -settype current result -* reshape vector to format 5 x 3 x 6 -*reshape result [5][3][6] -reshape result [$aa][$bb][$cc] - -* vector to store temperature -let tvect=vector(5) -* vector to store voltage -let vvect=vector(6) -* vector to store parameter values -let pvect=vector(3) - -*index for storing in vectors tvect and result - -let indexp = 0 - -foreach pvar 9.5k 10k 10.5k - let indexv = 0 - alterparam rr = $pvar - let pvect[indexp] = $pvar - mc_source - foreach var -40 -20 0 20 40 - set temp = $var - dc v1 0 5 1 - *store name of the actual dc plot - set dcplotname = $curplot - * back to the base plot - setplot $plotname - let result[indexv][indexp] = {$dcplotname}.v1#branch - let tvect[indexv] = $var - if indexv = 0 - let vvect = {$dcplotname}.r2 - end - let indexv = indexv + 1 -* destroy $dcplotname - end - let indexp = indexp + 1 - remcirc -end - -settype voltage vvect -setscale vvect - -let indexplot = 0 -while indexplot < indexp -*plot result[0][indexplot] result[1][indexplot] result[2][indexplot] result[3][indexplot] result[4][indexplot] -let indexplot = indexplot + 1 -end - - -plot -+result[0][0] result[1][0] result[2][0] result[3][0] result[4][0] -+result[0][1] result[1][1] result[2][1] result[3][1] result[4][1] -+result[0][2] result[1][2] result[2][2] result[3][2] result[4][2] - -write 3d_loop_i_vs_v.out -+result[0][0] result[1][0] result[2][0] result[3][0] result[4][0] -+result[0][1] result[1][1] result[2][1] result[3][1] result[4][1] -+result[0][2] result[1][2] result[2][2] result[3][2] result[4][2] - -*transpoe a 3D vector -let aai = 0 -let bbi = 0 -let cci = 0 -let result1 = vector(90) -settype current result1 -* reshape vector to format 3 x 6 x 5 -reshape result1 [$bb][$cc][$aa] - -* shift from vector format 5 x 3 x 6 to 3 x 6 x 5 -*echo test output > resultout.txt -while aai < aa - let bbi = 0 - while bbi < bb - let cci = 0 - while cci < cc - let result1[bbi][cci][aai] = result[aai][bbi][cci] -* print bbi cci aai >> resultout.txt -* print result1[bbi][cci][aai] >> resultout.txt - let cci = cci + 1 - end - let bbi = bbi + 1 - end - let aai = aai + 1 -end - -settype temp-sweep tvect -setscale tvect - -* current through v1 versus temperature -plot -+result1[0][0] result1[1][0] result1[2][0] -+result1[0][1] result1[1][1] result1[2][1] -+result1[0][2] result1[1][2] result1[2][2] -+result1[0][3] result1[1][3] result1[2][3] -+result1[0][4] result1[1][4] result1[2][4] -+result1[0][5] result1[1][5] result1[2][5] - -write 3d_loop_i_vs_t.out -+result1[0][0] result1[1][0] result1[2][0] -+result1[0][1] result1[1][1] result1[2][1] -+result1[0][2] result1[1][2] result1[2][2] -+result1[0][3] result1[1][3] result1[2][3] -+result1[0][4] result1[1][4] result1[2][4] -+result1[0][5] result1[1][5] result1[2][5] - -*plot result1 - -*transpoe a 3D vector -let aai = 0 -let bbi = 0 -let cci = 0 -let result2 = vector(90) -settype current result2 -* reshape vector to format 6 x 5 x 3 -reshape result2 [$cc][$aa][$bb] - -* shift from vector format 3 x 6 x 5 to 6 x 5 x 3 -*echo test output > resultout.txt -while aai < aa - let bbi = 0 - while bbi < bb - let cci = 0 - while cci < cc - let result2[cci][aai][bbi] = result1[bbi][cci][aai] -* print cci aai bbi >> resultout.txt -* print result2[cci][aai][bbi] >> resultout.txt - let cci = cci + 1 - end - let bbi = bbi + 1 - end - let aai = aai + 1 -end - -settype impedance pvect -setscale pvect - -* current through v1 versus parameter rr -plot -+result2[0][0] result2[1][0] result2[2][0] result2[3][0] result2[4][0] result2[5][0] -+result2[0][1] result2[1][1] result2[2][1] result2[3][1] result2[4][1] result2[5][1] -+result2[0][2] result2[1][2] result2[2][2] result2[3][2] result2[4][2] result2[5][2] -+result2[0][3] result2[1][3] result2[2][3] result2[3][3] result2[4][3] result2[5][3] -+result2[0][4] result2[1][4] result2[2][4] result2[3][4] result2[4][4] result2[5][4] - -write 3d_loop_i_vs_para.out -+result2[0][0] result2[1][0] result2[2][0] result2[3][0] result2[4][0] result2[5][0] -+result2[0][1] result2[1][1] result2[2][1] result2[3][1] result2[4][1] result2[5][1] -+result2[0][2] result2[1][2] result2[2][2] result2[3][2] result2[4][2] result2[5][2] -+result2[0][3] result2[1][3] result2[2][3] result2[3][3] result2[4][3] result2[5][3] -+result2[0][4] result2[1][4] result2[2][4] result2[3][4] result2[4][4] result2[5][4] - -.endc - -.end diff --git a/Windows/spice/examples/various/FFT_Leakage.cir b/Windows/spice/examples/various/FFT_Leakage.cir deleted file mode 100644 index b2bcfb7d..00000000 --- a/Windows/spice/examples/various/FFT_Leakage.cir +++ /dev/null @@ -1,53 +0,0 @@ -FFT_Leakage_tests http://www.idea2ic.com/ -*=========Create_Signal================== -VTime VTime 0 DC 0 PWL( 0 0 1 1) -Vfreq Vfreq 0 DC 5.5k -BVAC IN 0 V = sin( 6.283185307179586*V(VFreq)*V(VTime)) -.control -*TRAN TSTEP TSTOP TSTART TMAX ?UIC? -tran 1u .999m 0 1u -set pensize = 2 -linearize -let numb2 = length(in) -print numb2 - -*=========Do_FFT_and_Plot_As_dB_Freq================== -let ac = in +j(0) -let ac_fft=fft(ac) -let numb_f2 = (numb2)/2 -1 -compose freq start = 1 stop = $&numb_f2 step =1 -compose vreal start = 1 stop = $&numb_f2 step =1 -compose vimag start = 1 stop = $&numb_f2 step =1 -let j = 0 -repeat $&numb_f2 -let freq[j] = freq[j] -let vreal[j] = 2*real(ac_fft[j+1]) -let vimag[j] = 2*imag(ac_fft[j+1]) -let j = j +1 -end -plot dB(abs(vreal+1f)) dB(abs(vimag+1f)) vs freq xlog - -*=========Extract_Error_Signal========================= -let funBin = 5k/1000 -let unvect = unitvec(numb2) -let fundspec = unvect*0 +j(0) -let fundspec[funBin] = real(ac_fft[funBin]) +j(imag(ac_fft[funBin] )) -let fundspec[numb2-funBin] = real(ac_fft[numb2-funBin]) +j(imag(ac_fft[numb2-funBin] )) -let fund = ifft(fundspec) -let dc_ofset = real(ac_fft[0]) -let thdspec = ac_fft -let thdspec[0] = 0 +j(0) -let thdspec[funBin] = 0 +j(0) -let thdspec[numb2-funBin] = 0 +j(0) -let thd = ifft(thdspec) -plot norm(in) norm(fund) norm(thd)/2 - -*=========Calc_Values========================= -let rms_Fund = sqrt(mean(fund*fund)) -let rms_THD = sqrt(mean(thd*thd)) -let THD_percent = 100*rms_THD/rms_Fund -let FREQ_Hz = VFreq[0] -echo "Freq_Hz=$&FREQ_Hz THD_percent=$&THD_percent Fund_rms=$&rms_Fund THD_rms=$&rms_THD " - -.endc -.end diff --git a/Windows/spice/examples/various/FFT_tests.cir b/Windows/spice/examples/various/FFT_tests.cir deleted file mode 100644 index e7ede5ec..00000000 --- a/Windows/spice/examples/various/FFT_tests.cir +++ /dev/null @@ -1,123 +0,0 @@ -FFT_tests http://www.idea2ic.com/ -.control -set units=degrees -let a = vector(16) -*plot a vs a -set pensize = 2 -*=========Need_a_complex_input==================== -let ac = a+j(0) -print a ac -*plot fft(a) vs a -*plot real(fft(ac)) imag(fft(ac)) vs a -* fft(a) fft(ac) - -*=========DC_Works==================== -let b = unitvec(16) -let bc = b+j(0) -*plot fft(b) vs a title DC_WORKS -*print fft(b) fft(bc) - -*=========DC_Plus_cos_Remove_AC==================== -let numb = length(b) -print numb - -let indx = 0 -repeat $&numb -let ac[indx]= cos(indx*360/8)+1 +j(0) -let indx = indx +1 -end - -let fftac=fft(ac) -plot real(fftac) imag(fftac) vs a title DC_Plus_COS - -let fftac[2]=(0,0) -let fftac[14]=(0,0) -let ifftac = ifft(fftac) -plot ifftac ac vs a title COS_REMOVED - -*=========DC_Plus_cos_Remove_DC==================== -let indx = 0 -repeat $&numb -let ac[indx]= cos(indx*360/8)+1 +j(0) -let indx = indx +1 -end - -let fftac=fft(ac) -let fftac[0]=(0,0) -let ifftac = ifft(fftac) -plot ifftac ac vs a title COS_With_DC_REMOVED - -*=========DC_Plus_sin_Remove_AC==================== -let indx = 0 -repeat $&numb -let ac[indx]= sin(indx*360/8)+1 +j(0) -let indx = indx +1 -end - -let fftac=fft(ac) -plot real(fftac) imag(fftac) vs a title DC_Plus_SIN - -let fftac[2]=(0,0) -let fftac[14]=(0,0) -let ifftac = ifft(fftac) -plot ifft(fftac) ac vs a title SIN_REMOVED - -*=========DC_Plus_sin_Remove_DC==================== -let indx = 0 -repeat $&numb -let ac[indx]= sin(indx*360/8)+1 +j(0) -let indx = indx +1 -end - -let fftac=fft(ac) -let fftac[0]=(0,0) -let ifftac = ifft(fftac) -plot ifft(fftac) ac vs a title SIN_With_DC_REMOVED - -*=========DC_Plus_cos_Nyqusit_Remove_DC==================== -let indx = 0 -repeat $&numb -let ac[indx]= cos(indx*360/2)+1 +j(0) -let indx = indx +1 -end - -plot ac vs a title Nyq_COS - -let fftac=fft(ac) -plot real(fftac) imag(fftac) vs a title Nyq_FREQ_COS -let fftac[0]=(0,0) -let ifftac = ifft(fftac) -plot ifft(fftac) ac vs a title COS_With_DC_REMOVED -*=========DC_Plus_sin_Nyqusit_Remove_DC==================== -let indx = 0 -repeat $&numb -let ac[indx]= sin(indx*360/2)+1 +j(0) -let indx = indx +1 -end - -plot ac vs a title Nyq_SIN - -let fftac=fft(ac) -plot real(fftac) imag(fftac) vs a title Nyq_FREQ_SIN -let fftac[0]=(0,0) -let ifftac = ifft(fftac) -plot ifft(fftac) ac vs a title COS_With_DC_REMOVED - -*=========DC_Plus_COS_Remove_One_BIN==================== -let indx = 0 -repeat $&numb -let ac[indx]= cos(indx*360/8)+1 +j(0) -let indx = indx +1 -end - -let fftac=fft(ac) -let fftac[2]=(0,0) -plot real(fftac) imag(fftac) vs a title DC_Plus_Cos - -let ifftac = ifft(fftac) -plot ifft(fftac) ac vs a title ONE_BIN_REMOVED - -plot real(ifft(fftac)) imag(ifft(fftac)) vs a title ONE_BIN_REMOVED - -.endc -.end diff --git a/Windows/spice/examples/various/adder_mos.cir b/Windows/spice/examples/various/adder_mos.cir deleted file mode 100644 index 9b85e093..00000000 --- a/Windows/spice/examples/various/adder_mos.cir +++ /dev/null @@ -1,79 +0,0 @@ - ADDER - 4 BIT ALL-NAND-GATE BINARY ADDER - -*** SUBCIRCUIT DEFINITIONS -.SUBCKT NAND in1 in2 out VDD -* NODES: INPUT(2), OUTPUT, VCC -M1 out in2 Vdd Vdd p1 W=7.5u L=0.35u pd=13.5u ad=22.5p ps=13.5u as=22.5p -M2 net.1 in2 0 0 n1 W=3u L=0.35u pd=9u ad=9p ps=9u as=9p -M3 out in1 Vdd Vdd p1 W=7.5u L=0.35u pd=13.5u ad=22.5p ps=13.5u as=22.5p -M4 out in1 net.1 0 n1 W=3u L=0.35u pd=9u ad=9p ps=9u as=9p -.ENDS NAND - -.SUBCKT ONEBIT 1 2 3 4 5 6 -* NODES: INPUT(2), CARRY-IN, OUTPUT, CARRY-OUT, VCC -X1 1 2 7 6 NAND -X2 1 7 8 6 NAND -X3 2 7 9 6 NAND -X4 8 9 10 6 NAND -X5 3 10 11 6 NAND -X6 3 11 12 6 NAND -X7 10 11 13 6 NAND -X8 12 13 4 6 NAND -X9 11 7 5 6 NAND -.ENDS ONEBIT - -.SUBCKT TWOBIT 1 2 3 4 5 6 7 8 9 -* NODES: INPUT - BIT0(2) / BIT1(2), OUTPUT - BIT0 / BIT1, -* CARRY-IN, CARRY-OUT, VCC -X1 1 2 7 5 10 9 ONEBIT -X2 3 4 10 6 8 9 ONEBIT -.ENDS TWOBIT - -.SUBCKT FOURBIT 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 -* NODES: INPUT - BIT0(2) / BIT1(2) / BIT2(2) / BIT3(2), -* OUTPUT - BIT0 / BIT1 / BIT2 / BIT3, CARRY-IN, CARRY-OUT, VCC -X1 1 2 3 4 9 10 13 16 15 TWOBIT -X2 5 6 7 8 11 12 16 14 15 TWOBIT -.ENDS FOURBIT - -*** POWER -VCC 99 0 DC 3.3V - -*** ALL INPUTS -VIN1A 1 0 DC 0 PULSE(0 3 0 5NS 5NS 20NS 50NS) -VIN1B 2 0 DC 0 PULSE(0 3 0 5NS 5NS 30NS 100NS) -VIN2A 3 0 DC 0 PULSE(0 3 0 5NS 5NS 50NS 200NS) -VIN2B 4 0 DC 0 PULSE(0 3 0 5NS 5NS 90NS 400NS) -VIN3A 5 0 DC 0 PULSE(0 3 0 5NS 5NS 170NS 800NS) -VIN3B 6 0 DC 0 PULSE(0 3 0 5NS 5NS 330NS 1600NS) -VIN4A 7 0 DC 0 PULSE(0 3 0 5NS 5NS 650NS 3200NS) -VIN4B 8 0 DC 0 PULSE(0 3 0 5NS 5NS 1290NS 6400NS) - -*** DEFINE NOMINAL CIRCUIT -X1 1 2 3 4 5 6 7 8 9 10 11 12 0 13 99 FOURBIT - -.option noinit acct -.TRAN 500p 6400NS -* save inputs -.save V(1) V(2) V(3) V(4) V(5) V(6) V(7) V(8) - -* use BSIM3 model with default parameters -.model n1 nmos level=49 version=3.3.0 -.model p1 pmos level=49 version=3.3.0 -*.include ./Modelcards/modelcard32.nmos -*.include ./Modelcards/modelcard32.pmos - -.control -pre_set strict_errorhandling -unset ngdebug -*save outputs and specials -save x1.x1.x1.7 V(9) V(10) V(11) V(12) V(13) -run -display -* plot the inputs, use offset to plot on top of each other -plot v(1) v(2)+4 v(3)+8 v(4)+12 v(5)+16 v(6)+20 v(7)+24 v(8)+28 -* plot the outputs, use offset to plot on top of each other -plot v(9) v(10)+4 v(11)+8 v(12)+12 v(13)+16 -.endc - -.END diff --git a/Windows/spice/examples/various/agauss_test.cir b/Windows/spice/examples/various/agauss_test.cir deleted file mode 100644 index c2532751..00000000 --- a/Windows/spice/examples/various/agauss_test.cir +++ /dev/null @@ -1,48 +0,0 @@ -* agauss test in ngspice -* generate a sequence of gaussian distributed random numbers. -* test the distribution by sorting the numbers into -* a histogram (buckets) -* chapt. 17.8.6 -.control - define agauss(nom, avar, sig) (nom + avar/sig * sgauss(0)) - let mc_runs = 200 - let run = 0 - let no_buck = 8 $ number of buckets - let bucket = unitvec(no_buck) $ each element contains 1 - let delta = 3e-11 $ width of each bucket, depends - $ on avar and sig - let lolimit = 1e-09 - 3*delta - let hilimit = 1e-09 + 3*delta - - dowhile run < mc_runs - let val = agauss(1e-09, 1e-10, 3) $ get the random number - if (val < lolimit) - let bucket[0] = bucket[0] + 1 $ 'lowest' bucket - end - let part = 1 - dowhile part < (no_buck - 1) - if ((val < (lolimit + part*delta)) & -+ (val > (lolimit + (part-1)*delta))) - let bucket[part] = bucket[part] + 1 - break - end - let part = part + 1 - end - if (val > hilimit) -* 'highest' bucket - let bucket[no_buck - 1] = bucket[no_buck - 1] + 1 - end - let run = run + 1 - end - - let part = 0 - dowhile part < no_buck - let value = bucket[part] - 1 - set value = "$&value" -* print the buckets' contents - echo $value - let part = part + 1 - end - -.endc -.end diff --git a/Windows/spice/examples/various/alterparam.sp b/Windows/spice/examples/various/alterparam.sp deleted file mode 100644 index 663f73a2..00000000 --- a/Windows/spice/examples/various/alterparam.sp +++ /dev/null @@ -1,40 +0,0 @@ -*test alterparam -.param vv = 1 -.param rr = 'vv + 1' - -R1 1 0 {rr + 1} -v1 1 0 1 - -.subckt subr in out rint1 = 6 - .param rint = 5 - .param rint2 = 8 - R0 in out 'rint' - R1 in out 'rint1' - R2 in out 'rint2' -.ends - -Xr 2 0 subr rint = 7 rint1 = 9 -v2 2 0 1 - -.control -op -print v1#branch v2#branch -echo -listing expand -alterparam vv = 2 -reset -op -print v1#branch v2#branch -echo -listing expand -alterparam subr rint = 13 -alterparam subr rint1 = 15 -alterparam subr rint2 = 17 -reset -op -print v1#branch v2#branch -echo -listing expand -.endc - -.end diff --git a/Windows/spice/examples/various/bjt_ac_par.sp b/Windows/spice/examples/various/bjt_ac_par.sp deleted file mode 100644 index 048eb6f3..00000000 --- a/Windows/spice/examples/various/bjt_ac_par.sp +++ /dev/null @@ -1,30 +0,0 @@ -Plot inner small signal parameter - -v1 1 0 dc 10.0 -rc 1 c 2k -vb b 0 dc 0.6 -q1 c b 0 bfs17 - -.MODEL BFS17 NPN (level=1 IS=0.48F NF=1.008 BF=99.655 VAF=90.000 IKF=0.190 -+ ISE=7.490F NE=1.762 NR=1.010 BR=38.400 VAR=7.000 IKR=93.200M -+ ISC=0.200F NC=1.042 -+ RB=1.500 IRB=0.100M RBM=1.200 -+ RE=0.500 RC=2.680 -+ CJE=1.325P VJE=0.700 MJE=0.220 FC=0.890 -+ CJC=1.050P VJC=0.610 MJC=0.240 XCJC=0.400 -+ TF=56.940P TR=1.000N PTF=21.000 -+ XTF=68.398 VTF=0.600 ITF=0.700 -+ XTB=1.600 EG=1.110 XTI=3.000 -+ KF=1.000F AF=1.000) - -.control -save @q1[gm] @q1[pi] @q1[go] -save @q1[qbe] @q1[qbc] -save @q1[cmu] @q1[cpi] -dc vb 0.4 1 0.01 -plot @q1[gm] @q1[gpi] @q1[go] -plot @q1[qbe] @q1[qbc] -plot @q1[cmu] @q1[cpi] -.endc - -.end diff --git a/Windows/spice/examples/various/bjtnoise.cir b/Windows/spice/examples/various/bjtnoise.cir deleted file mode 100644 index 002c0d85..00000000 --- a/Windows/spice/examples/various/bjtnoise.cir +++ /dev/null @@ -1,29 +0,0 @@ -BJT Noise Test - -vcc 4 0 50 -vin 1 0 ac 1 - -ccouple 1 2 1 - -ibias 0 2 100uA - -rload 4 3 1k - -q1 3 2 0 0 test - -.model test npn kf=1e-20 af=1 bf=100 rb=10 cjc=4e-12 -.noise v(3) vin dec 10 1k 100Meg 1 - -.control -run -setplot -setplot noise1 -plot ally -plot inoise_spectrum onoise_spectrum -setplot noise2 -print all -echo -print inoise_total onoise_total -.endc - -.end diff --git a/Windows/spice/examples/various/compose-examples.cir b/Windows/spice/examples/various/compose-examples.cir deleted file mode 100644 index 25206cee..00000000 --- a/Windows/spice/examples/various/compose-examples.cir +++ /dev/null @@ -1,32 +0,0 @@ -compose examples - -.control -compose vec1 values (-3) (-5) 4 6 -echo $&vec1 -echo -compose vec2 values (-3) (-5*PI) 4 6*e -echo $&vec2 -echo -compose vec3 start=-3 stop=7 step = 2 -echo $&vec3 -echo -compose vec4 start=-3 stop=7 step = 2 lin=19 -*warning, step is ignored -echo $&vec4 -echo -compose vec5 dec=3 start=0.1 stop=10 -echo $&vec5 -echo -compose vec6 dec=3 start=-0.1 stop=10 -*error, value is negative -echo $&vec6 -echo -compose vec7 log=3 start=0.1 stop=10 -echo $&vec7 -echo -compose vec8 gauss=10 mean=1 sd=0.2 -echo $&vec8 -echo -.endc - -.end diff --git a/Windows/spice/examples/various/dc_loop.sp b/Windows/spice/examples/various/dc_loop.sp deleted file mode 100644 index 19511593..00000000 --- a/Windows/spice/examples/various/dc_loop.sp +++ /dev/null @@ -1,48 +0,0 @@ -testing loops -*variables are global -*vector reside only in the plot where they where created - -R1 r2 0 r = {5k + 50*TEMPER} -V1 r2 0 1 - -.control -*create a new plot as our base plot -setplot new -set curplottitle = "crossplot" -set plotname=$curplot - -* generate vector with all (here 30) elements -let result=vector(30) -* reshape vector to format 5 x 6 -reshape result [5][6] -* vector to store temperature -let tvect=vector(5) - -*index for storing in vectors tvect and result -let index = 0 - -foreach var -40 -20 0 20 40 - set temp = $var - dc v1 0 5 1 - *store name of the actual dc plot - set dcplotname = $curplot - * back to the base plot - setplot $plotname - let result[index] = {$dcplotname}.v1#branch - let tvect[index] = $var - settype current result - let index = index + 1 - destroy $dcplotname -end - -settype temp-sweep tvect -setscale tvect - -transpose result - -plot result -write dc_loop.out result[0] result[1] result[2] result[3] result[4] result[5] - -.endc - -.end diff --git a/Windows/spice/examples/various/diode_ac_par.sp b/Windows/spice/examples/various/diode_ac_par.sp deleted file mode 100644 index b2d53631..00000000 --- a/Windows/spice/examples/various/diode_ac_par.sp +++ /dev/null @@ -1,28 +0,0 @@ -Plot inner small signal parameter - -v1 1 0 dc 0 -d1 1 0 myd -.model myd D(IS = 1.50E-07 -+ N = 1.0 -+ RS = 9 -+ TT = 100n -+ CJ0 = 1.01p -+ VJ = 0.44 -+ M = 0.5 -+ EG = 1.11 -+ XTI = 3 -+ KF = 0 -+ AF = 1 -+ FC = 0.5 -+ BV = 22 -+ IBV = 10u) - -.control -save @d1[gd] @d1[cd] @d1[qd] -dc v1 -5 .1 0.01 -plot @d1[gd] -plot @d1[cd] -plot @d1[qd] -.endc -* -.END diff --git a/Windows/spice/examples/various/gain_stage.cir b/Windows/spice/examples/various/gain_stage.cir deleted file mode 100644 index adc22bfb..00000000 --- a/Windows/spice/examples/various/gain_stage.cir +++ /dev/null @@ -1,34 +0,0 @@ -** MOSFET Gain Stage (AC): Benchmarking Implementation of BSIM4.0.0 -** by Weidong Liu 5/16/2000. -** output redirection into file -** chapter 17.8.8 - -M1 3 2 0 0 N1 L=1u W=4u -Rsource 1 2 100k -Rload 3 vdd 25k -Vdd vdd 0 1.8 -Vin 1 0 1.2 ac 0.1 - -.control -ac dec 10 100 1000Meg -plot v(2) v(3) -let flen = length(frequency) $ length of the vector -let loopcounter = 0 -echo output test > text.txt $ start new file test.txt -* loop -while loopcounter lt flen - let vout2 = v(2)[loopcounter] $ generate a single point complex vector - let vout2re = real(vout2) $ generate a single point real vector - let vout2im = imag(vout2) $ generate a single point imaginary vector - let vout3 = v(3)[loopcounter] $ generate a single point complex vector - let vout3re = real(vout3) $ generate a single point real vector - let vout3im = imag(vout3) $ generate a single point imaginary vector - let freq = frequency[loopcounter] $ generate a single point vector - echo bbb "$&freq" "$&vout2re" "$&vout2im" "$&vout3re" "$&vout3im" >> -+text.txt $ append text and data to file (continued fromm line above) - let loopcounter = loopcounter + 1 -end -.endc - -.MODEL N1 NMOS LEVEL=14 VERSION=4.3.0 TNOM=27 -.end diff --git a/Windows/spice/examples/various/i(xxx)_tests.cir b/Windows/spice/examples/various/i(xxx)_tests.cir deleted file mode 100644 index 0bbd3c2d..00000000 --- a/Windows/spice/examples/various/i(xxx)_tests.cir +++ /dev/null @@ -1,89 +0,0 @@ -i(XXX) test -* Restrictions of function i(device): -* O.K. when device and i(device) are at top level. -* O.K. when device and i(device) are in the same -* subcircuit at first subcircuit level. -* O.K. when device and i(device) are in the same -* subcircuit at some deeper subcircuit level. - -* source at top level, function i(XXX) at top level -*o.k. -R1 1 0 1 -V1 1 0 1 -R2 2 0 '5 * i(R1)' -V2 2 0 1 - -* source at top level, function i(XXX) at subckt level -* geht nicht! -*.subckt contr1 n1 n2 -*RS1 n1 n2 '6 * i(R1)' -*.ends - -*XR1 3 0 contr1 -*V3 3 0 1 - -* source at subckt level, function i(XXX) at same subckt -* o.k. -.subckt contr2 n1 n2 -RS1 n1 n2 '6 * i(RS2)' -RS2 1 0 1 -V1 1 0 1 -.ends - -XR2 4 0 contr2 -V4 4 0 1 - -* source at subckt level, function i(XXX) at same subckt level -* but different subcircuit: should not do! -* does not do! -*.subckt contr3 n1 n2 -*RS1 n1 n2 '6 * i(RS2)' -*.ends - -*XR3 5 0 contr3 -*V5 5 0 1 - - -* source at subckt level, function i(XXX) at top level -* geht nicht! - -*.subckt contr4 n1 n2 -*RS41 n1 n2 7 -*VS41 n1 n2 1 -*.ends - -*XR4 6 0 contr4 -*R6 7 0 '10*i(r.xr4.rs41)' -*V6 7 0 1 - - -* source at second subckt level, function i(XXX) at same subckt -* o.k. -.subckt contr5 n1 n2 -XR2 n1 n2 contr2 -.ends - -XR8 8 0 contr5 -V8 8 0 1 - -* MOS device, first node only -vd d 0 1 -vg g 0 1 -vb b 0 0 -vs s 0 0 -m1 d g s b n1 W=10u L=1u -RM 10 0 '1E6 * i(M1)' -VRM 10 0 1 - -* reuse i(M1) -BMM 11 0 V='1E6 * i(M1)' -RMM 11 0 1 - -.include modelcard.nmos - -.control -op -print i(V1) i(V2) i(V4) i(V8) i(VRM) i(BMM) -.endc - -.end diff --git a/Windows/spice/examples/various/model-name-check.cir b/Windows/spice/examples/various/model-name-check.cir deleted file mode 100644 index 248f5ad1..00000000 --- a/Windows/spice/examples/various/model-name-check.cir +++ /dev/null @@ -1,68 +0,0 @@ -* model name check - -V1 1 0 1 -R1 1 2 1k - -D1 2 0 DMOD -.model DMOD D (is=1e-13 bv=50) -* o.k. - -D2 2 0 _DMOD -.model _DMOD D (is=1e-13 bv=50) -* o.k. - -D3 2 0 1n4001 -.model 1n4001 D (is=1e-13 bv=50) -* o.k. - -D4 2 0 22N4 -.model 22N4 D (is=1e-13 bv=50) -* o.k. - -D5 2 0 1e34 -.model 1e34 D (is=1e-13 bv=50) -* not o.k. - -D6 2 0 74ls4444 -.model 74ls4444 D (is=1e-13 bv=50) -* o.k. - -D7 2 0 ^274ls4444 -.model ^274ls4444 D (is=1e-13 bv=50) -* not o.k. - -D8 2 0 74!4444 -.model 74!4444 D (is=1e-13 bv=50) -* o.k. - -D9 2 0 12p4444 -.model 12p4444 D (is=1e-13 bv=50) -* o.k. - -D10 2 0 17n -.model 17n D (is=1e-13 bv=50) -* not o.k. - -D11 2 0 17nB -.model 17nB D (is=1e-13 bv=50) -* o.k. - -D12 2 0 17e12n -.model 17e12n D (is=1e-13 bv=50) -* not o.k. - -D13 2 0 17e12Meg -.model 17e12Meg D (is=1e-13 bv=50) -* not o.k. - -D14 2 0 17e12Megg -.model 17e12Megg D (is=1e-13 bv=50) -* o.k. - -D15 2 0 20.5pF -.model 20.5pF D (is=1e-13 bv=50) -* not o.k. - -.end - - diff --git a/Windows/spice/examples/various/modelcard.nmos b/Windows/spice/examples/various/modelcard.nmos deleted file mode 100644 index 9512b41d..00000000 --- a/Windows/spice/examples/various/modelcard.nmos +++ /dev/null @@ -1,33 +0,0 @@ -.model N1 NMOS -+Level= 8 version=3.3.0 -+Tnom=27.0 -+Nch= 2.498E+17 Tox=9E-09 Xj=1.00000E-07 -+Lint=9.36e-8 Wint=1.47e-7 -+Vth0= .6322 K1= .756 K2= -3.83e-2 K3= -2.612 -+Dvt0= 2.812 Dvt1= 0.462 Dvt2=-9.17e-2 -+Nlx= 3.52291E-08 W0= 1.163e-6 -+K3b= 2.233 -+Vsat= 86301.58 Ua= 6.47e-9 Ub= 4.23e-18 Uc=-4.706281E-11 -+Rdsw= 650 U0= 388.3203 wr=1 -+A0= .3496967 Ags=.1 B0=0.546 B1= 1 -+Dwg = -6.0E-09 Dwb = -3.56E-09 Prwb = -.213 -+Keta=-3.605872E-02 A1= 2.778747E-02 A2= .9 -+Voff=-6.735529E-02 NFactor= 1.139926 Cit= 1.622527E-04 -+Cdsc=-2.147181E-05 -+Cdscb= 0 Dvt0w = 0 Dvt1w = 0 Dvt2w = 0 -+Cdscd = 0 Prwg = 0 -+Eta0= 1.0281729E-02 Etab=-5.042203E-03 -+Dsub= .31871233 -+Pclm= 1.114846 Pdiblc1= 2.45357E-03 Pdiblc2= 6.406289E-03 -+Drout= .31871233 Pscbe1= 5000000 Pscbe2= 5E-09 Pdiblcb = -.234 -+Pvag= 0 delta=0.01 -+Wl = 0 Ww = -1.420242E-09 Wwl = 0 -+Wln = 0 Wwn = .2613948 Ll = 1.300902E-10 -+Lw = 0 Lwl = 0 Lln = .316394 -+Lwn = 0 -+kt1=-.3 kt2=-.051 -+At= 22400 -+Ute=-1.48 -+Ua1= 3.31E-10 Ub1= 2.61E-19 Uc1= -3.42e-10 -+Kt1l=0 Prt=764.3 -+vgs_max=4 vds_max=4 vbs_max=4 diff --git a/Windows/spice/examples/various/modelcard.pmos b/Windows/spice/examples/various/modelcard.pmos deleted file mode 100644 index e64c8cee..00000000 --- a/Windows/spice/examples/various/modelcard.pmos +++ /dev/null @@ -1,28 +0,0 @@ -.model P1 PMOS -+Level= 8 version=3.3.0 -+Tnom=27.0 -+Nch= 3.533024E+17 Tox=9E-09 Xj=1.00000E-07 -+Lint=6.23e-8 Wint=1.22e-7 -+Vth0=-.6732829 K1= .8362093 K2=-8.606622E-02 K3= 1.82 -+Dvt0= 1.903801 Dvt1= .5333922 Dvt2=-.1862677 -+Nlx= 1.28e-8 W0= 2.1e-6 -+K3b= -0.24 Prwg=-0.001 Prwb=-0.323 -+Vsat= 103503.2 Ua= 1.39995E-09 Ub= 1.e-19 Uc=-2.73e-11 -+Rdsw= 460 U0= 138.7609 -+A0= .4716551 Ags=0.12 -+Keta=-1.871516E-03 A1= .3417965 A2= 0.83 -+Voff=-.074182 NFactor= 1.54389 Cit=-1.015667E-03 -+Cdsc= 8.937517E-04 -+Cdscb= 1.45e-4 Cdscd=1.04e-4 -+Dvt0w=0.232 Dvt1w=4.5e6 Dvt2w=-0.0023 -+Eta0= 6.024776E-02 Etab=-4.64593E-03 -+Dsub= .23222404 -+Pclm= .989 Pdiblc1= 2.07418E-02 Pdiblc2= 1.33813E-3 -+Drout= .3222404 Pscbe1= 118000 Pscbe2= 1E-09 -+Pvag= 0 -+kt1= -0.25 kt2= -0.032 prt=64.5 -+At= 33000 -+Ute= -1.5 -+Ua1= 4.312e-9 Ub1= 6.65e-19 Uc1= 0 -+Kt1l=0 -+vgs_max=4 vds_max=4 vbs_max=4 diff --git a/Windows/spice/examples/various/nic_soa.cir b/Windows/spice/examples/various/nic_soa.cir deleted file mode 100644 index 5752d99d..00000000 --- a/Windows/spice/examples/various/nic_soa.cir +++ /dev/null @@ -1,39 +0,0 @@ -CMOS NIC -* -.subckt osc_cmos ib_osz lc ra vdd vss -m16 ib_osz ib_osz vss vss n1 w=20u l=1u m=8 -m15 ra ib_osz vss vss n1 w=20u l=1u m=2 -m8 net99 net95 ra ra n1 w=20u l=1u m=2 -m1 net95 net95 net93 net93 n1 w=20u l=1u m=2 -m25 net99 net99 vdd vdd p1 w=3.3u l=0.5u m=1 -m5 net99 net99 vdd vdd p1 w=20u l=1u m=5 -m4 net95 net99 vdd vdd p1 w=20u l=1u m=5 -r23 net99 vss r=38K -r18 net93 lc r=10 -.ends osc_cmos -* -.subckt psens LC -R1 LC P001 40K -L1 LC P002 14.9u -R2 P002 0 0.55 -L2 P001 0 1.4m -.ends psens -* -xi36 bias lc ra vdd 0 osc_cmos -v39 vdd 0 dc=3.5 pulse ( 0 3.5 10u 10n 10n 1 2 ) -r4 ra 0 3.972K -c23 lc 0 1.8n -i37 vdd bias dc=1u -* -xi18 lc psens -* -.option warn=1 -.control -tran 1u 1m 0 50n -plot v(LC) -.endc -* -.include modelcard.nmos -.include modelcard.pmos -* -.end diff --git a/Windows/spice/examples/various/nmos_pmos_BSIM330.sp b/Windows/spice/examples/various/nmos_pmos_BSIM330.sp deleted file mode 100644 index 20b266e7..00000000 --- a/Windows/spice/examples/various/nmos_pmos_BSIM330.sp +++ /dev/null @@ -1,44 +0,0 @@ -*****Single NMOS and PMOS Transistor For BSIM3 threshold voltage check (Id-Vgs) (Id-Vds) *** - -M1 2 1 3 4 n1 W=1u L=0.35u Pd=1.5u Ps=1.5u ad=1.5p as=1.5p -vgs 1 0 3.5 -vds 2 0 0.1 -vss 3 0 0 -vbs 4 0 0 - -M2 22 11 33 44 p1 W=2.5u L=0.35u Pd=3u Ps=3u ad=2.5p as=2.5p -vgsp 11 0 -3.5 -vdsp 22 0 -0.1 -vssp 33 0 0 -vbsp 44 0 0 - -.options Temp=27.0 - -* BSIM3v3.3.0 model with modified default parameters 0.18µm -.model n1 nmos level=49 version=3.3.0 tox=3.5n nch=2.4e17 nsub=5e16 vth0=0.15 -.model p1 pmos level=49 version=3.3.0 tox=3.5n nch=2.5e17 nsub=5e16 vth0=-0.15 - -*.include ./Modelcards/modelcard.nmos $ Berkeley model cards limited to L >= 0.35µm -*.include ./Modelcards/modelcard.pmos $ Berkeley model cards limited to L >= 0.35µm - -* update of the default parameters required -*.model n1 NMOS level=49 version=3.3.0 $ nearly no current due to VT > 2 V ? -*.model p1 PMOS level=49 version=3.3.0 - -.control -dc vgs 0 1.5 0.05 vbs 0 -2.5 -0.5 -plot vss#branch -dc vds 0 2 0.05 vgs 0 2 0.4 -plot vss#branch -dc vgsp 0 -1.5 -0.05 vbsp 0 2.5 0.5 -plot vssp#branch -dc vdsp 0 -2 -0.05 vgsp 0 -2 -0.4 -plot vssp#branch -.endc - -.end - - - - - diff --git a/Windows/spice/examples/various/nmos_pmos_plotting.sp b/Windows/spice/examples/various/nmos_pmos_plotting.sp deleted file mode 100644 index 3ff61126..00000000 --- a/Windows/spice/examples/various/nmos_pmos_plotting.sp +++ /dev/null @@ -1,49 +0,0 @@ -*****Single NMOS and PMOS Transistor For BSIM3 threshold voltage check (Id-Vgs) (Id-Vds) *** - -M1 2 1 3 4 n1 W=1u L=0.35u Pd=1.5u Ps=1.5u ad=1.5p as=1.5p -vgs 1 0 3.5 -vds 2 0 0.1 -vss 3 0 0 -vbs 4 0 0 - -M2 22 11 33 44 p1 W=2.5u L=0.35u Pd=3u Ps=3u ad=2.5p as=2.5p -vgsp 11 0 -3.5 -vdsp 22 0 -0.1 -vssp 33 0 0 -vbsp 44 0 0 - -.options Temp=27.0 - -* BSIM3v3.3.0 model with modified default parameters 0.18µm -.model n1 nmos level=49 version=3.3.0 tox=3.5n nch=2.4e17 nsub=5e16 vth0=0.15 -.model p1 pmos level=49 version=3.3.0 tox=3.5n nch=2.5e17 nsub=5e16 vth0=-0.15 - -*.include ./Modelcards/modelcard.nmos $ Berkeley model cards limited to L >= 0.35µm -*.include ./Modelcards/modelcard.pmos $ Berkeley model cards limited to L >= 0.35µm - -* update of the default parameters required -*.model n1 NMOS level=49 version=3.3.0 $ nearly no current due to VT > 2 V ? -*.model p1 PMOS level=49 version=3.3.0 - -.control -* various plot font sizes -dc vgs 0 1.5 0.05 vbs 0 -2.5 -0.5 -plot vss#branch ylabel 'output current' -set wfont_size=18 -dc vds 0 2 0.05 vgs 0 2 0.4 -plot vss#branch ylabel 'output current' -set wfont_size=20 -dc vgsp 0 -1.5 -0.05 vbsp 0 2.5 0.5 -plot vssp#branch ylabel 'output current' -set wfont=Times -set wfont_size=18 -dc vdsp 0 -2 -0.05 vgsp 0 -2 -0.4 -plot vssp#branch ylabel 'output current' -.endc - -.end - - - - - diff --git a/Windows/spice/examples/various/param_sweep.cir b/Windows/spice/examples/various/param_sweep.cir deleted file mode 100644 index 79d5869e..00000000 --- a/Windows/spice/examples/various/param_sweep.cir +++ /dev/null @@ -1,29 +0,0 @@ -parameter sweep -* resistive divider, R1 swept from start_r to stop_r -* replaces .STEP R1 1k 10k 1k -* chapter 16.13.4.2 - -R1 1 2 1k -R2 2 0 1k - -VDD 1 0 DC 1 -.dc VDD 0 1 .1 - -.control -let start_r = 1k -let stop_r = 10k -let delta_r = 1k -let r_act = start_r -* loop -while r_act le stop_r - alter r1 r_act - run - write dc-sweep.out v(2) - set appendwrite - let r_act = r_act + delta_r -end -plot dc1.v(2) dc2.v(2) dc3.v(2) dc4.v(2) dc5.v(2) -+ dc6.v(2) dc7.v(2) dc8.v(2) dc9.v(2) dc10.v(2) -.endc - -.end diff --git a/Windows/spice/examples/various/ro_17_4.cir b/Windows/spice/examples/various/ro_17_4.cir deleted file mode 100644 index 9a4704f7..00000000 --- a/Windows/spice/examples/various/ro_17_4.cir +++ /dev/null @@ -1,195 +0,0 @@ -*****************==== 17-Stage CMOS RO ====******************* -*********** Benchmarking Implementation of BSIM4 by Jane Xi 11/05/2002. - -* this variant improves current memeasurement -* by setting 'xmu' - -vdd 1 0 2.0 -mp1 3 2 1 1 p1 l=0.1u w=10u ad=5p pd=6u as=5p ps=6u -mn1 3 2 0 0 n1 l=0.1u w=5u ad=5p pd=6u as=5p ps=6u -mp2 4 3 1 1 p1 l=0.1u w=10u ad=5p pd=6u as=5p ps=6u -mn2 4 3 0 0 n1 l=0.1u w=5u ad=5p pd=6u as=5p ps=6u -mp3 5 4 1 1 p1 l=0.1u w=10u ad=5p pd=6u as=5p ps=6u -mn3 5 4 0 0 n1 l=0.1u w=5u ad=5p pd=6u as=5p ps=6u -mp4 6 5 1 1 p1 l=0.1u w=10u ad=5p pd=6u as=5p ps=6u -mn4 6 5 0 0 n1 l=0.1u w=5u ad=5p pd=6u as=5p ps=6u -mp5 7 6 1 1 p1 l=0.1u w=10u ad=5p pd=6u as=5p ps=6u -mn5 7 6 0 0 n1 l=0.1u w=5u ad=5p pd=6u as=5p ps=6u -mp6 8 7 1 1 p1 l=0.1u w=10u ad=5p pd=6u as=5p ps=6u -mn6 8 7 0 0 n1 l=0.1u w=5u ad=5p pd=6u as=5p ps=6u -mp7 9 8 1 1 p1 l=0.1u w=10u ad=5p pd=6u as=5p ps=6u -mn7 9 8 0 0 n1 l=0.1u w=5u ad=5p pd=6u as=5p ps=6u -mp8 10 9 1 1 p1 l=0.1u w=10u ad=5p pd=6u as=5p ps=6u -mn8 10 9 0 0 n1 l=0.1u w=5u ad=5p pd=6u as=5p ps=6u -mp9 11 10 1 1 p1 l=0.1u w=10u ad=5p pd=6u as=5p ps=6u -mn9 11 10 0 0 n1 l=0.1u w=5u ad=5p pd=6u as=5p ps=6u -mp10 12 11 1 1 p1 l=0.1u w=10u ad=5p pd=6u as=5p ps=6u -mn10 12 11 0 0 n1 l=0.1u w=5u ad=5p pd=6u as=5p ps=6u - -mp11 13 12 1 1 p1 l=0.1u w=10u ad=5p pd=6u as=5p ps=6u -mn11 13 12 0 0 n1 l=0.1u w=5u ad=5p pd=6u as=5p ps=6u -mp12 14 13 1 1 p1 l=0.1u w=10u ad=5p pd=6u as=5p ps=6u -mn12 14 13 0 0 n1 l=0.1u w=5u ad=5p pd=6u as=5p ps=6u -mp13 15 14 1 1 p1 l=0.1u w=10u ad=5p pd=6u as=5p ps=6u -mn13 15 14 0 0 n1 l=0.1u w=5u ad=5p pd=6u as=5p ps=6u -mp14 16 15 1 1 p1 l=0.1u w=10u ad=5p pd=6u as=5p ps=6u -mn14 16 15 0 0 n1 l=0.1u w=5u ad=5p pd=6u as=5p ps=6u -mp15 17 16 1 1 p1 l=0.1u w=10u ad=5p pd=6u as=5p ps=6u -mn15 17 16 0 0 n1 l=0.1u w=5u ad=5p pd=6u as=5p ps=6u -mp16 18 17 1 1 p1 l=0.1u w=10u ad=5p pd=6u as=5p ps=6u -mn16 18 17 0 0 n1 l=0.1u w=5u ad=5p pd=6u as=5p ps=6u -mp17 2 18 1 1 p1 l=0.1u w=10u ad=5p pd=6u as=5p ps=6u -mn17 2 18 0 0 n1 l=0.1u w=5u ad=5p pd=6u as=5p ps=6u -c1 18 0 .1p - -* .ic v(2)=1.0 v(3)=1.0 v(4)=1.0 -* .ic v(2)=2.0 v(3)=0.0 v(4)=2.0 -* .ic v(2)=2.0 v(3)=0.0 v(4)=2.0 v(5)=0.0 v(6)=2.0 -* .ic v(7)=0.0 v(8)=2.0 v(9)=0.0 v(10)=2.0 v(11)=0.0 v(12)=2.0 -* .ic v(13)=0.0 v(14)=2.0 v(15)=0.0 v(16)=2.0 v(17)=0.0 v(18)=2.0 -* .ic V(10)=5 v(2)=5 v(3)=5 v(4)=5 v(5)=5 v(6)=5 - -* .ic v(18)=1 - -.tran .1ns 150ns uic - -* .option xmu = 0.49 -* .print tran v(5) - -.control - -* reduce current ringing -option xmu = 0.49 -* set xmu=0.49 - -set num_threads=4 -set noinit -run - -* current and output in a single plot -plot v(18) 1000*(-I(vdd)) ylimit -1 6 - -.endc - -* Short channel models from CMOS Circuit Design, Layout, and Simulation, -* 50nm BSIM4 models VDD=1V, see CMOSedu.com -* -.model N1 nmos level = 54 version = 4.5.0 -+binunit = 1 paramchk= 1 mobmod = 0 -+capmod = 2 igcmod = 1 igbmod = 1 geomod = 0 -+diomod = 1 rdsmod = 0 rbodymod= 1 rgatemod= 1 -+permod = 1 acnqsmod= 0 trnqsmod= 0 -+tnom = 27 toxe = 1.4e-009 toxp = 7e-010 toxm = 1.4e-009 -+epsrox = 3.9 wint = 5e-009 lint = 1.2e-008 -+ll = 0 wl = 0 lln = 1 wln = 1 -+lw = 0 ww = 0 lwn = 1 wwn = 1 -+lwl = 0 wwl = 0 xpart = 0 toxref = 1.4e-009 -+vth0 = 0.22 k1 = 0.35 k2 = 0.05 k3 = 0 -+k3b = 0 w0 = 2.5e-006 dvt0 = 2.8 dvt1 = 0.52 -+dvt2 = -0.032 dvt0w = 0 dvt1w = 0 dvt2w = 0 -+dsub = 2 minv = 0.05 voffl = 0 dvtp0 = 1e-007 -+dvtp1 = 0.05 lpe0 = 5.75e-008 lpeb = 2.3e-010 xj = 2e-008 -+ngate = 5e+020 ndep = 2.8e+018 nsd = 1e+020 phin = 0 -+cdsc = 0.0002 cdscb = 0 cdscd = 0 cit = 0 -+voff = -0.15 nfactor = 1.2 eta0 = 0.15 etab = 0 -+vfb = -0.55 u0 = 0.032 ua = 1.6e-010 ub = 1.1e-017 -+uc = -3e-011 vsat = 1.1e+005 a0 = 2 ags = 1e-020 -+a1 = 0 a2 = 1 b0 = -1e-020 b1 = 0 -+keta = 0.04 dwg = 0 dwb = 0 pclm = 0.18 -+pdiblc1 = 0.028 pdiblc2 = 0.022 pdiblcb = -0.005 drout = 0.45 -+pvag = 1e-020 delta = 0.01 pscbe1 = 8.14e+008 pscbe2 = 1e-007 -+fprout = 0.2 pdits = 0.2 pditsd = 0.23 pditsl = 2.3e+006 -+rsh = 3 rdsw = 150 rsw = 150 rdw = 150 -+rdswmin = 0 rdwmin = 0 rswmin = 0 prwg = 0 -+prwb = 6.8e-011 wr = 1 alpha0 = 0.074 alpha1 = 0.005 -+beta0 = 30 agidl = 0.0002 bgidl = 2.1e+009 cgidl = 0.0002 -+egidl = 0.8 -+aigbacc = 0.012 bigbacc = 0.0028 cigbacc = 0.002 -+nigbacc = 1 aigbinv = 0.014 bigbinv = 0.004 cigbinv = 0.004 -+eigbinv = 1.1 nigbinv = 3 aigc = 0.017 bigc = 0.0028 -+cigc = 0.002 aigsd = 0.017 bigsd = 0.0028 cigsd = 0.002 -+nigc = 1 poxedge = 1 pigcd = 1 ntox = 1 -+xrcrg1 = 12 xrcrg2 = 5 -+cgso = 6.238e-010 cgdo = 6.238e-010 cgbo = 2.56e-011 cgdl = 2.495e-10 -+cgsl = 2.495e-10 ckappas = 0.02 ckappad = 0.02 acde = 1 -+moin = 15 noff = 0.9 voffcv = 0.02 -+kt1 = -0.21 kt1l = 0.0 kt2 = -0.042 ute = -1.5 -+ua1 = 1e-009 ub1 = -3.5e-019 uc1 = 0 prt = 0 -+at = 53000 -+fnoimod = 1 tnoimod = 0 -+jss = 0.0001 jsws = 1e-011 jswgs = 1e-010 njs = 1 -+ijthsfwd= 0.01 ijthsrev= 0.001 bvs = 10 xjbvs = 1 -+jsd = 0.0001 jswd = 1e-011 jswgd = 1e-010 njd = 1 -+ijthdfwd= 0.01 ijthdrev= 0.001 bvd = 10 xjbvd = 1 -+pbs = 1 cjs = 0.0005 mjs = 0.5 pbsws = 1 -+cjsws = 5e-010 mjsws = 0.33 pbswgs = 1 cjswgs = 5e-010 -+mjswgs = 0.33 pbd = 1 cjd = 0.0005 mjd = 0.5 -+pbswd = 1 cjswd = 5e-010 mjswd = 0.33 pbswgd = 1 -+cjswgd = 5e-010 mjswgd = 0.33 tpb = 0.005 tcj = 0.001 -+tpbsw = 0.005 tcjsw = 0.001 tpbswg = 0.005 tcjswg = 0.001 -+xtis = 3 xtid = 3 -+dmcg = 0e-006 dmci = 0e-006 dmdg = 0e-006 dmcgt = 0e-007 -+dwj = 0e-008 xgw = 0e-007 xgl = 0e-008 -+rshg = 0.4 gbmin = 1e-010 rbpb = 5 rbpd = 15 -+rbps = 15 rbdb = 15 rbsb = 15 ngcon = 1 -* -.model P1 pmos level = 54 version = 4.5.0 -+binunit = 1 paramchk= 1 mobmod = 0 -+capmod = 2 igcmod = 1 igbmod = 1 geomod = 0 -+diomod = 1 rdsmod = 0 rbodymod= 1 rgatemod= 1 -+permod = 1 acnqsmod= 0 trnqsmod= 0 -+tnom = 27 toxe = 1.4e-009 toxp = 7e-010 toxm = 1.4e-009 -+epsrox = 3.9 wint = 5e-009 lint = 1.2e-008 -+ll = 0 wl = 0 lln = 1 wln = 1 -+lw = 0 ww = 0 lwn = 1 wwn = 1 -+lwl = 0 wwl = 0 xpart = 0 toxref = 1.4e-009 -+vth0 = -0.22 k1 = 0.39 k2 = 0.05 k3 = 0 -+k3b = 0 w0 = 2.5e-006 dvt0 = 3.9 dvt1 = 0.635 -+dvt2 = -0.032 dvt0w = 0 dvt1w = 0 dvt2w = 0 -+dsub = 0.7 minv = 0.05 voffl = 0 dvtp0 = 0.5e-008 -+dvtp1 = 0.05 lpe0 = 5.75e-008 lpeb = 2.3e-010 xj = 2e-008 -+ngate = 5e+020 ndep = 2.8e+018 nsd = 1e+020 phin = 0 -+cdsc = 0.000258 cdscb = 0 cdscd = 6.1e-008 cit = 0 -+voff = -0.15 nfactor = 2 eta0 = 0.15 etab = 0 -+vfb = 0.55 u0 = 0.0095 ua = 1.6e-009 ub = 8e-018 -+uc = 4.6e-013 vsat = 90000 a0 = 1.2 ags = 1e-020 -+a1 = 0 a2 = 1 b0 = -1e-020 b1 = 0 -+keta = -0.047 dwg = 0 dwb = 0 pclm = 0.55 -+pdiblc1 = 0.03 pdiblc2 = 0.0055 pdiblcb = 3.4e-008 drout = 0.56 -+pvag = 1e-020 delta = 0.014 pscbe1 = 8.14e+008 pscbe2 = 9.58e-007 -+fprout = 0.2 pdits = 0.2 pditsd = 0.23 pditsl = 2.3e+006 -+rsh = 3 rdsw = 250 rsw = 160 rdw = 160 -+rdswmin = 0 rdwmin = 0 rswmin = 0 prwg = 3.22e-008 -+prwb = 6.8e-011 wr = 1 alpha0 = 0.074 alpha1 = 0.005 -+beta0 = 30 agidl = 0.0002 bgidl = 2.1e+009 cgidl = 0.0002 -+egidl = 0.8 -+aigbacc = 0.012 bigbacc = 0.0028 cigbacc = 0.002 -+nigbacc = 1 aigbinv = 0.014 bigbinv = 0.004 cigbinv = 0.004 -+eigbinv = 1.1 nigbinv = 3 aigc = 0.69 bigc = 0.0012 -+cigc = 0.0008 aigsd = 0.0087 bigsd = 0.0012 cigsd = 0.0008 -+nigc = 1 poxedge = 1 pigcd = 1 ntox = 1 -+xrcrg1 = 12 xrcrg2 = 5 -+cgso = 7.43e-010 cgdo = 7.43e-010 cgbo = 2.56e-011 cgdl = 1e-014 -+cgsl = 1e-014 ckappas = 0.5 ckappad = 0.5 acde = 1 -+moin = 15 noff = 0.9 voffcv = 0.02 -+kt1 = -0.19 kt1l = 0 kt2 = -0.052 ute = -1.5 -+ua1 = -1e-009 ub1 = 2e-018 uc1 = 0 prt = 0 -+at = 33000 -+fnoimod = 1 tnoimod = 0 -+jss = 0.0001 jsws = 1e-011 jswgs = 1e-010 njs = 1 -+ijthsfwd= 0.01 ijthsrev= 0.001 bvs = 10 xjbvs = 1 -+jsd = 0.0001 jswd = 1e-011 jswgd = 1e-010 njd = 1 -+ijthdfwd= 0.01 ijthdrev= 0.001 bvd = 10 xjbvd = 1 -+pbs = 1 cjs = 0.0005 mjs = 0.5 pbsws = 1 -+cjsws = 5e-010 mjsws = 0.33 pbswgs = 1 cjswgs = 5e-010 -+mjswgs = 0.33 pbd = 1 cjd = 0.0005 mjd = 0.5 -+pbswd = 1 cjswd = 5e-010 mjswd = 0.33 pbswgd = 1 -+cjswgd = 5e-010 mjswgd = 0.33 tpb = 0.005 tcj = 0.001 -+tpbsw = 0.005 tcjsw = 0.001 tpbswg = 0.005 tcjswg = 0.001 -+xtis = 3 xtid = 3 -+dmcg = 0e-006 dmci = 0e-006 dmdg = 0e-006 dmcgt = 0e-007 -+dwj = 0e-008 xgw = 0e-007 xgl = 0e-008 -+rshg = 0.4 gbmin = 1e-010 rbpb = 5 rbpd = 15 -+rbps = 15 rbdb = 15 rbsb = 15 ngcon = 1 - -.end diff --git a/Windows/spice/examples/various/tmp-noise-2.cir b/Windows/spice/examples/various/tmp-noise-2.cir deleted file mode 100644 index 8dbb8910..00000000 --- a/Windows/spice/examples/various/tmp-noise-2.cir +++ /dev/null @@ -1,24 +0,0 @@ -* (exec-spice "ngspice %s" t) -* actually not noise but temp coeff - -v1 1 0 dc 100 ac=1 - -b2 2 0 i=v(1) tc1=0.001 -v2 0 2 0 - -b3 3 0 v=v(1) tc1=0.001 - -.temp 127.0 - -.control -op -let idc2=i(v2) -let vdc3=v(3) -print idc2 vdc3 - -ac dec 1 1kHz 1kHz -let iac2=i(v2) -let vac3=v(3) -print iac2 vac3 - -.endc diff --git a/Windows/spice/examples/various/tmp-noise.cir b/Windows/spice/examples/various/tmp-noise.cir deleted file mode 100644 index b43e5694..00000000 --- a/Windows/spice/examples/various/tmp-noise.cir +++ /dev/null @@ -1,33 +0,0 @@ -* (exec-spice "ngspice %s" t) - -v1 1 0 dc 2 ac 1 -v2 200 0 dc=1 - -R1 1 2 1k -R2 2 0 1k tc1=0.001 $ tc2=1e-5 - -R10 1 20 1k -R20 20 0 '1k*v(200)' tc1=0.001 $ tc2=1e-5 - -.temp 127.0 - -.control -listing e - -op -let gold = 2/(1+1000/1100) -print v(2) v(20) gold - -noise v(2) v1 dec 1 1kHz 1kHz -let r = 1/(1/1000 + 1/1100) -let gold = sqrt(4*boltz*(273.15+127.0)*r) -print all gold - -noise v(20) v1 dec 1 1kHz 1kHz -print all - -ac dec 1 1kHz 1kHz -let gold = 1/(1+1000/1100) -print v(2) v(20) gold - -.endc diff --git a/Windows/spice/examples/various/todo-temper-3.cir b/Windows/spice/examples/various/todo-temper-3.cir deleted file mode 100644 index e62c89e3..00000000 --- a/Windows/spice/examples/various/todo-temper-3.cir +++ /dev/null @@ -1,23 +0,0 @@ -* try temper - -* (exec-spice "ngspice %s" t) - -.model dplain d is={temper >= 25 ? 1e-10 : (temper+1)*1e-11} -.model dref d is=1e-10 - - -Iin 1 0 dc = -1mA -Dref 1 0 dref -e2 2 0 1 0 1 -D2 2 0 dplain -e3 3 0 1 0 1 -D3 3 0 dref area={temper >= 25 ? (temper+100)/100 : 2 } - -.control -dc temp 0 125 1.0 -plot e2#branch/@iin[dc] -plot e3#branch/@iin[dc] -*quit 0 -.endc - -.end |