3 files changed, 0 insertions, 102 deletions
diff --git a/Windows/spice/examples/snapshot/adder_mos.cir b/Windows/spice/examples/snapshot/adder_mos.cir
deleted file mode 100644
index 603f1f11..00000000
--- a/Windows/spice/examples/snapshot/adder_mos.cir
+++ /dev/null
@@ -1,26 +0,0 @@
-  Example: snsave
-* load a circuit (including transistor models and .tran command)
-* starts transient simulation until stop point
-* store intermediate data to file
-* begin with editing the file location
-* to be run with 'ngspice adder_mos.cir'
-
-.include adder_mos_circ.cir
-
-.control
-*cd to where all files are located
-cd D:\Spice_general\ngspice\examples\snapshot
-set noaskquit
-unset ngdebug
-set noinit
-save vcc#branch 10
-iplot v(10)
-*interrupt condition for the simulation
-stop when time > 500n
-* simulate
-run
-* store snapshot to file
-snsave adder500.snap
-.endc
-
-.END
diff --git a/Windows/spice/examples/snapshot/adder_mos_circ.cir b/Windows/spice/examples/snapshot/adder_mos_circ.cir
deleted file mode 100644
index b0a591e4..00000000
--- a/Windows/spice/examples/snapshot/adder_mos_circ.cir
+++ /dev/null
@@ -1,61 +0,0 @@
-*  ADDER - 4 BIT ALL-NAND-GATE BINARY ADDER
-
-*** SUBCIRCUIT DEFINITIONS
-.SUBCKT NAND in1 in2 out VDD
-*   NODES:  INPUT(2), OUTPUT, VCC
-M1 out in2 Vdd Vdd p1 W=3u L=1u
-M2 net.1 in2 0 0 n1 W=3u L=2u
-M3 out in1 Vdd Vdd p1 W=3u L=1u
-M4 out in1 net.1 0 n1 W=3u L=2u
-.ENDS NAND
-
-.SUBCKT ONEBIT 1 2 3 4 5 6
-*   NODES:  INPUT(2), CARRY-IN, OUTPUT, CARRY-OUT, VCC
-X1   1  2  7  6   NAND
-X2   1  7  8  6   NAND
-X3   2  7  9  6   NAND
-X4   8  9 10  6   NAND
-X5   3 10 11  6   NAND
-X6   3 11 12  6   NAND
-X7  10 11 13  6   NAND
-X8  12 13  4  6   NAND
-X9  11  7  5  6   NAND
-.ENDS ONEBIT
-
-.SUBCKT TWOBIT 1 2 3 4 5 6 7 8 9
-*   NODES:  INPUT - BIT0(2) / BIT1(2), OUTPUT - BIT0 / BIT1,
-*           CARRY-IN, CARRY-OUT, VCC
-X1   1  2  7  5 10  9   ONEBIT
-X2   3  4 10  6  8  9   ONEBIT
-.ENDS TWOBIT
-
-.SUBCKT FOURBIT 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
-*   NODES:  INPUT - BIT0(2) / BIT1(2) / BIT2(2) / BIT3(2),
-*           OUTPUT - BIT0 / BIT1 / BIT2 / BIT3, CARRY-IN, CARRY-OUT, VCC
-X1   1  2  3  4  9 10 13 16 15   TWOBIT
-X2   5  6  7  8 11 12 16 14 15   TWOBIT
-.ENDS FOURBIT
-
-*** DEFINE NOMINAL CIRCUIT
-VCC   99  0   DC 3.3V
-VIN1A  1  0   PULSE(0 3 0 10NS 10NS   10NS   50NS)
-VIN1B  2  0   PULSE(0 3 0 10NS 10NS   20NS  100NS)
-VIN2A  3  0   PULSE(0 3 0 10NS 10NS   40NS  200NS)
-VIN2B  4  0   PULSE(0 3 0 10NS 10NS   80NS  400NS)
-VIN3A  5  0   PULSE(0 3 0 10NS 10NS  160NS  800NS)
-VIN3B  6  0   PULSE(0 3 0 10NS 10NS  320NS 1600NS)
-VIN4A  7  0   PULSE(0 3 0 10NS 10NS  640NS 3200NS)
-VIN4B  8  0   PULSE(0 3 0 10NS 10NS 1280NS 6400NS)
-X1     1  2  3  4  5  6  7  8  9 10 11 12  0 13 99 FOURBIT
-*RBIT0  9  0   100K
-*RBIT1 10  0   100K
-*RBIT2 11  0   100K
-*RBIT3 12  0   100K
-*RCOUT 13  0   100K
-
-.TRAN 1NS 1000NS
-
-.model n1 nmos level=8 version=3.3.0
-.model p1 pmos level=8 version=3.3.0
-
-.END
diff --git a/Windows/spice/examples/snapshot/adder_snload.script b/Windows/spice/examples/snapshot/adder_snload.script
deleted file mode 100644
index f5556347..00000000
--- a/Windows/spice/examples/snapshot/adder_snload.script
+++ /dev/null
@@ -1,15 +0,0 @@
-*  SCRIPT: ADDER - 4 BIT BINARY
-* script to reload circuit and continue the simulation
-* begin with editing the file location
-* to be started with 'ngspice adder_snload.script'
-
-.control
-* cd to where all files are located
-cd D:\Spice_general\ngspice\examples\snapshot
-* load circuit and snpashot file
-snload adder_mos_circ.cir adder500.snap
-* continue simulation
-resume
-* plot some node voltages
-plot v(10) v(11) v(12)
-.endc