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+* /opt/esim/src/subcircuitlibrary/scr/scr.cir
+
+.include PowerDiode.lib
+* u2 3 5 1 port
+* f2
+d1 8 2 PowerDiode
+c1 3 4 10u
+r2 3 4 1
+* f1
+r1 5 6 50
+v1 6 7 dc 0
+v2 9 8 dc 0
+* u1 4 1 9 aswitch
+Vf2 2 3 0
+f2 3 4 Vf2 100
+Vf1 7 3 0
+f1 3 4 Vf1 10
+a1 4 [1 9 ] u1
+* Schematic Name: aswitch, NgSpice Name: aswitch
+.model u1 aswitch(log=TRUE cntl_off=0.0 cntl_on=1.0 r_on=1.0 r_off=1.0e12 )
+.tran 0e-12 0e-00 0e-00
+
+* Control Statements
+.control
+run
+print allv > plot_data_v.txt
+print alli > plot_data_i.txt
+.endc
+.end