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-rw-r--r--Examples/RL/RL-cache.lib87
-rw-r--r--Examples/RL/RL.bak128
-rw-r--r--Examples/RL/RL.cir15
-rw-r--r--Examples/RL/RL.cir.out18
-rw-r--r--Examples/RL/RL.pro71
-rw-r--r--Examples/RL/RL.proj1
-rw-r--r--Examples/RL/RL.sch154
-rw-r--r--Examples/RL/RL_Previous_Values.xml1
-rw-r--r--Examples/RL/analysis1
-rw-r--r--Examples/RL/plot_data_i.txt85
-rw-r--r--Examples/RL/plot_data_v.txt85
11 files changed, 646 insertions, 0 deletions
diff --git a/Examples/RL/RL-cache.lib b/Examples/RL/RL-cache.lib
new file mode 100644
index 00000000..9b3bc262
--- /dev/null
+++ b/Examples/RL/RL-cache.lib
@@ -0,0 +1,87 @@
+EESchema-LIBRARY Version 2.3
+#encoding utf-8
+#
+# GND
+#
+DEF GND #PWR 0 0 Y Y 1 F P
+F0 "#PWR" 0 -250 50 H I C CNN
+F1 "GND" 0 -150 50 H V C CNN
+F2 "" 0 0 50 H V C CNN
+F3 "" 0 0 50 H V C CNN
+DRAW
+P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
+X GND 1 0 0 0 D 50 50 1 1 W N
+ENDDRAW
+ENDDEF
+#
+# L
+#
+DEF L L 0 40 N N 1 F N
+F0 "L" 1950 500 50 H V C CNN
+F1 "L" 1950 650 50 H V C CNN
+F2 "" 1950 550 60 V V C CNN
+F3 "" 1950 550 60 V V C CNN
+DRAW
+A 1802 550 48 11 1789 0 1 0 N 1849 551 1754 551
+A 1899 550 51 11 1789 0 1 0 N 1949 551 1848 551
+A 1999 550 51 11 1789 0 1 0 N 2049 551 1948 551
+A 2100 550 50 11 1789 0 1 0 N 2149 551 2050 551
+X 1 1 1650 550 100 R 70 70 1 1 P
+X 2 2 2250 550 100 L 70 70 1 1 P
+ENDDRAW
+ENDDEF
+#
+# R
+#
+DEF R R 0 0 N Y 1 F N
+F0 "R" 50 130 50 H V C CNN
+F1 "R" 50 50 50 H V C CNN
+F2 "" 50 -20 30 H V C CNN
+F3 "" 50 50 30 V V C CNN
+$FPLIST
+ R_*
+ Resistor_*
+$ENDFPLIST
+DRAW
+S 150 10 -50 90 0 1 10 N
+X ~ 1 -100 50 50 R 60 60 1 1 P
+X ~ 2 200 50 50 L 60 60 1 1 P
+ENDDRAW
+ENDDEF
+#
+# plot_v1
+#
+DEF plot_v1 U 0 40 Y Y 1 F N
+F0 "U" 0 500 60 H V C CNN
+F1 "plot_v1" 200 350 60 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+C 0 500 100 0 1 0 N
+X ~ ~ 0 200 200 U 50 50 1 1 I
+ENDDRAW
+ENDDEF
+#
+# pwl
+#
+DEF pwl v 0 40 Y Y 1 F N
+F0 "v" -200 100 60 H V C CNN
+F1 "pwl" -250 -50 60 H V C CNN
+F2 "R1" -300 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+$FPLIST
+ 1_pin
+$ENDFPLIST
+DRAW
+A -1144 -561 1253 291 240 0 1 0 N -50 50 0 -50
+A -765 421 941 -300 -232 0 1 0 N 50 -50 100 50
+A -75 -700 750 919 880 0 1 0 N -100 50 -50 50
+A 25 450 501 -928 -871 0 1 0 N 0 -50 50 -50
+A 1096 -609 1366 1511 1558 0 1 0 N -100 50 -150 -50
+C 0 0 150 0 1 0 N
+X + 1 0 450 300 D 50 0 1 1 I
+X - 2 0 -450 300 U 50 0 1 1 I
+ENDDRAW
+ENDDEF
+#
+#End Library
diff --git a/Examples/RL/RL.bak b/Examples/RL/RL.bak
new file mode 100644
index 00000000..89647148
--- /dev/null
+++ b/Examples/RL/RL.bak
@@ -0,0 +1,128 @@
+EESchema Schematic File Version 2
+LIBS:eSim_Analog
+LIBS:eSim_Devices
+LIBS:eSim_Digital
+LIBS:eSim_Hybrid
+LIBS:eSim_Miscellaneous
+LIBS:eSim_Power
+LIBS:eSim_Sources
+LIBS:eSim_Subckt
+LIBS:eSim_User
+LIBS:adc-dac
+LIBS:memory
+LIBS:xilinx
+LIBS:microcontrollers
+LIBS:dsp
+LIBS:microchip
+LIBS:analog_switches
+LIBS:motorola
+LIBS:texas
+LIBS:intel
+LIBS:audio
+LIBS:interface
+LIBS:digital-audio
+LIBS:philips
+LIBS:display
+LIBS:cypress
+LIBS:siliconi
+LIBS:opto
+LIBS:atmel
+LIBS:contrib
+LIBS:power
+LIBS:device
+LIBS:transistors
+LIBS:conn
+LIBS:linear
+LIBS:regul
+LIBS:74xx
+LIBS:cmos4000
+EELAYER 25 0
+EELAYER END
+$Descr A4 11693 8268
+encoding utf-8
+Sheet 1 1
+Title ""
+Date ""
+Rev ""
+Comp ""
+Comment1 ""
+Comment2 ""
+Comment3 ""
+Comment4 ""
+$EndDescr
+$Comp
+L R R1
+U 1 1 56B869D4
+P 5950 2850
+F 0 "R1" H 6000 2980 50 0000 C CNN
+F 1 "10" H 6000 2900 50 0000 C CNN
+F 2 "" H 6000 2830 30 0000 C CNN
+F 3 "" V 6000 2900 30 0000 C CNN
+ 1 5950 2850
+ 1 0 0 -1
+$EndComp
+$Comp
+L L L1
+U 1 1 56B86AA0
+P 6300 1300
+F 0 "L1" H 8250 1800 50 0000 C CNN
+F 1 "100m" H 8250 1950 50 0000 C CNN
+F 2 "" V 8250 1850 60 0000 C CNN
+F 3 "" V 8250 1850 60 0000 C CNN
+ 1 6300 1300
+ 0 1 1 0
+$EndComp
+$Comp
+L pwl v1
+U 1 1 56B86CEB
+P 5150 3300
+F 0 "v1" H 4950 3400 60 0000 C CNN
+F 1 "pwl" H 4900 3250 60 0000 C CNN
+F 2 "R1" H 4850 3300 60 0000 C CNN
+F 3 "" H 5150 3300 60 0000 C CNN
+ 1 5150 3300
+ 1 0 0 -1
+$EndComp
+$Comp
+L GND #PWR01
+U 1 1 56B86D45
+P 5900 3900
+F 0 "#PWR01" H 5900 3650 50 0001 C CNN
+F 1 "GND" H 5900 3750 50 0000 C CNN
+F 2 "" H 5900 3900 50 0000 C CNN
+F 3 "" H 5900 3900 50 0000 C CNN
+ 1 5900 3900
+ 1 0 0 -1
+$EndComp
+Text GLabel 5400 2650 0 60 Input ~ 0
+in
+Text GLabel 6650 2650 2 60 Input ~ 0
+out
+Wire Wire Line
+ 5900 3900 5900 3850
+Connection ~ 5900 3850
+Wire Wire Line
+ 5400 2650 5450 2650
+Wire Wire Line
+ 5450 2650 5450 2800
+Connection ~ 5450 2800
+Wire Wire Line
+ 6650 2650 6500 2650
+Wire Wire Line
+ 6500 2650 6500 2800
+Connection ~ 6500 2800
+Wire Wire Line
+ 5150 2850 5150 2800
+Wire Wire Line
+ 5150 2800 5850 2800
+Wire Wire Line
+ 6150 2800 6850 2800
+Wire Wire Line
+ 6850 2800 6850 2950
+Wire Wire Line
+ 5150 3750 5150 3850
+Wire Wire Line
+ 5150 3850 6850 3850
+Wire Wire Line
+ 6850 3850 6850 3550
+$EndSCHEMATC
diff --git a/Examples/RL/RL.cir b/Examples/RL/RL.cir
new file mode 100644
index 00000000..eea2d666
--- /dev/null
+++ b/Examples/RL/RL.cir
@@ -0,0 +1,15 @@
+* /home/fossee/eSim-Workspace/RL/RL.cir
+
+* EESchema Netlist Version 1.1 (Spice format) creation date: Mon Feb 29 21:37:20 2016
+
+* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N
+* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0
+
+* Sheet Name: /
+R1 in out 10
+L1 out GND 100m
+v1 in GND pwl
+U1 in plot_v1
+U2 out plot_v1
+
+.end
diff --git a/Examples/RL/RL.cir.out b/Examples/RL/RL.cir.out
new file mode 100644
index 00000000..8e08d27b
--- /dev/null
+++ b/Examples/RL/RL.cir.out
@@ -0,0 +1,18 @@
+* /home/fossee/esim-workspace/rl/rl.cir
+
+r1 in out 10
+l1 out gnd 100m
+v1 in gnd pwl(0m 0 0.5m 5 50m 5 50.5m 0 100m 0)
+* u1 in plot_v1
+* u2 out plot_v1
+.tran 10e-03 100e-03 0e-03
+
+* Control Statements
+.control
+run
+print allv > plot_data_v.txt
+print alli > plot_data_i.txt
+plot v(in)
+plot v(out)
+.endc
+.end
diff --git a/Examples/RL/RL.pro b/Examples/RL/RL.pro
new file mode 100644
index 00000000..a27edb8b
--- /dev/null
+++ b/Examples/RL/RL.pro
@@ -0,0 +1,71 @@
+update=Mon Feb 29 21:36:46 2016
+version=1
+last_client=eeschema
+[general]
+version=1
+RootSch=
+BoardNm=
+[pcbnew]
+version=1
+LastNetListRead=
+UseCmpFile=1
+PadDrill=0.600000000000
+PadDrillOvalY=0.600000000000
+PadSizeH=1.500000000000
+PadSizeV=1.500000000000
+PcbTextSizeV=1.500000000000
+PcbTextSizeH=1.500000000000
+PcbTextThickness=0.300000000000
+ModuleTextSizeV=1.000000000000
+ModuleTextSizeH=1.000000000000
+ModuleTextSizeThickness=0.150000000000
+SolderMaskClearance=0.000000000000
+SolderMaskMinWidth=0.000000000000
+DrawSegmentWidth=0.200000000000
+BoardOutlineThickness=0.100000000000
+ModuleOutlineThickness=0.150000000000
+[cvpcb]
+version=1
+NetIExt=net
+[eeschema]
+version=1
+LibDir=
+[eeschema/libraries]
+LibName1=eSim_Analog
+LibName2=eSim_Devices
+LibName3=eSim_Digital
+LibName4=eSim_Hybrid
+LibName5=eSim_Miscellaneous
+LibName6=eSim_Plot
+LibName7=eSim_Power
+LibName8=eSim_Sources
+LibName9=eSim_Subckt
+LibName10=eSim_User
+LibName11=adc-dac
+LibName12=memory
+LibName13=xilinx
+LibName14=microcontrollers
+LibName15=dsp
+LibName16=microchip
+LibName17=analog_switches
+LibName18=motorola
+LibName19=texas
+LibName20=intel
+LibName21=audio
+LibName22=interface
+LibName23=digital-audio
+LibName24=philips
+LibName25=display
+LibName26=cypress
+LibName27=siliconi
+LibName28=opto
+LibName29=atmel
+LibName30=contrib
+LibName31=power
+LibName32=device
+LibName33=transistors
+LibName34=conn
+LibName35=linear
+LibName36=regul
+LibName37=74xx
+LibName38=cmos4000
diff --git a/Examples/RL/RL.proj b/Examples/RL/RL.proj
new file mode 100644
index 00000000..1eccdd16
--- /dev/null
+++ b/Examples/RL/RL.proj
@@ -0,0 +1 @@
+schematicFile RL.sch
diff --git a/Examples/RL/RL.sch b/Examples/RL/RL.sch
new file mode 100644
index 00000000..d886a86b
--- /dev/null
+++ b/Examples/RL/RL.sch
@@ -0,0 +1,154 @@
+EESchema Schematic File Version 2
+LIBS:eSim_Analog
+LIBS:eSim_Devices
+LIBS:eSim_Digital
+LIBS:eSim_Hybrid
+LIBS:eSim_Miscellaneous
+LIBS:eSim_Plot
+LIBS:eSim_Power
+LIBS:eSim_Sources
+LIBS:eSim_Subckt
+LIBS:eSim_User
+LIBS:adc-dac
+LIBS:memory
+LIBS:xilinx
+LIBS:microcontrollers
+LIBS:dsp
+LIBS:microchip
+LIBS:analog_switches
+LIBS:motorola
+LIBS:texas
+LIBS:intel
+LIBS:audio
+LIBS:interface
+LIBS:digital-audio
+LIBS:philips
+LIBS:display
+LIBS:cypress
+LIBS:siliconi
+LIBS:opto
+LIBS:atmel
+LIBS:contrib
+LIBS:power
+LIBS:device
+LIBS:transistors
+LIBS:conn
+LIBS:linear
+LIBS:regul
+LIBS:74xx
+LIBS:cmos4000
+LIBS:RL-cache
+EELAYER 25 0
+EELAYER END
+$Descr A4 11693 8268
+encoding utf-8
+Sheet 1 1
+Title ""
+Date ""
+Rev ""
+Comp ""
+Comment1 ""
+Comment2 ""
+Comment3 ""
+Comment4 ""
+$EndDescr
+$Comp
+L R R1
+U 1 1 56B869D4
+P 5950 2850
+F 0 "R1" H 6000 2980 50 0000 C CNN
+F 1 "10" H 6000 2900 50 0000 C CNN
+F 2 "" H 6000 2830 30 0000 C CNN
+F 3 "" V 6000 2900 30 0000 C CNN
+ 1 5950 2850
+ 1 0 0 -1
+$EndComp
+$Comp
+L L L1
+U 1 1 56B86AA0
+P 6300 1300
+F 0 "L1" H 8250 1800 50 0000 C CNN
+F 1 "100m" H 8250 1950 50 0000 C CNN
+F 2 "" V 8250 1850 60 0000 C CNN
+F 3 "" V 8250 1850 60 0000 C CNN
+ 1 6300 1300
+ 0 1 1 0
+$EndComp
+$Comp
+L pwl v1
+U 1 1 56B86CEB
+P 5150 3300
+F 0 "v1" H 4950 3400 60 0000 C CNN
+F 1 "pwl" H 4900 3250 60 0000 C CNN
+F 2 "R1" H 4850 3300 60 0000 C CNN
+F 3 "" H 5150 3300 60 0000 C CNN
+ 1 5150 3300
+ 1 0 0 -1
+$EndComp
+$Comp
+L GND #PWR01
+U 1 1 56B86D45
+P 5900 3900
+F 0 "#PWR01" H 5900 3650 50 0001 C CNN
+F 1 "GND" H 5900 3750 50 0000 C CNN
+F 2 "" H 5900 3900 50 0000 C CNN
+F 3 "" H 5900 3900 50 0000 C CNN
+ 1 5900 3900
+ 1 0 0 -1
+$EndComp
+Text GLabel 5400 2650 0 60 Input ~ 0
+in
+Text GLabel 6650 2650 2 60 Input ~ 0
+out
+Wire Wire Line
+ 5900 3900 5900 3850
+Connection ~ 5900 3850
+Wire Wire Line
+ 5400 2650 5450 2650
+Wire Wire Line
+ 5450 2600 5450 2800
+Connection ~ 5450 2800
+Wire Wire Line
+ 6650 2650 6500 2650
+Wire Wire Line
+ 6500 2600 6500 2800
+Connection ~ 6500 2800
+Wire Wire Line
+ 5150 2850 5150 2800
+Wire Wire Line
+ 5150 2800 5850 2800
+Wire Wire Line
+ 6150 2800 6850 2800
+Wire Wire Line
+ 6850 2800 6850 2950
+Wire Wire Line
+ 5150 3750 5150 3850
+Wire Wire Line
+ 5150 3850 6850 3850
+Wire Wire Line
+ 6850 3850 6850 3550
+$Comp
+L plot_v1 U1
+U 1 1 56D46CBE
+P 5450 2800
+F 0 "U1" H 5450 3300 60 0000 C CNN
+F 1 "plot_v1" H 5650 3150 60 0000 C CNN
+F 2 "" H 5450 2800 60 0000 C CNN
+F 3 "" H 5450 2800 60 0000 C CNN
+ 1 5450 2800
+ 1 0 0 -1
+$EndComp
+$Comp
+L plot_v1 U2
+U 1 1 56D46CF1
+P 6500 2800
+F 0 "U2" H 6500 3300 60 0000 C CNN
+F 1 "plot_v1" H 6700 3150 60 0000 C CNN
+F 2 "" H 6500 2800 60 0000 C CNN
+F 3 "" H 6500 2800 60 0000 C CNN
+ 1 6500 2800
+ 1 0 0 -1
+$EndComp
+Connection ~ 5450 2650
+Connection ~ 6500 2650
+$EndSCHEMATC
diff --git a/Examples/RL/RL_Previous_Values.xml b/Examples/RL/RL_Previous_Values.xml
new file mode 100644
index 00000000..5388a5a2
--- /dev/null
+++ b/Examples/RL/RL_Previous_Values.xml
@@ -0,0 +1 @@
+<KicadtoNgspice><source><v1 name="Source type">pwl<field1 name="Enter in pwl format">0m 0 0.5m 5 50m 5 50.5m 0 100m 0</field1></v1><v2 name="Source type">0</v2><v3 name="Source type">0</v3></source><model /><devicemodel /><subcircuit /><analysis><ac><field1 name="Lin">true</field1><field2 name="Dec">false</field2><field3 name="Oct">false</field3><field4 name="Start Frequency" /><field5 name="Stop Frequency" /><field6 name="No. of points" /><field7 name="Start Fre Combo">Hz</field7><field8 name="Stop Fre Combo">Hz</field8></ac><dc><field1 name="Source 1" /><field2 name="Start" /><field3 name="Increment" /><field4 name="Stop" /><field5 name="Operating Point">0</field5><field6 name="Start Combo">Volts or Amperes</field6><field7 name="Increment Combo">Volts or Amperes</field7><field8 name="Stop Combo">Volts or Amperes</field8><field9 name="Source 2" /><field10 name="Start" /><field11 name="Increment" /><field12 name="Stop" /><field13 name="Start Combo">Volts or Amperes</field13><field14 name="Increment Combo">Volts or Amperes</field14><field15 name="Stop Combo">Volts or Amperes</field15></dc><tran><field1 name="Start Time">0</field1><field2 name="Step Time">10</field2><field3 name="Stop Time">100</field3><field4 name="Start Combo">ms</field4><field5 name="Step Combo">ms</field5><field6 name="Stop Combo">ms</field6></tran></analysis></KicadtoNgspice> \ No newline at end of file
diff --git a/Examples/RL/analysis b/Examples/RL/analysis
new file mode 100644
index 00000000..660a46cc
--- /dev/null
+++ b/Examples/RL/analysis
@@ -0,0 +1 @@
+.tran 10e-03 100e-03 0e-03 \ No newline at end of file
diff --git a/Examples/RL/plot_data_i.txt b/Examples/RL/plot_data_i.txt
new file mode 100644
index 00000000..b9b4f148
--- /dev/null
+++ b/Examples/RL/plot_data_i.txt
@@ -0,0 +1,85 @@
+ * /home/fossee/esim-workspace/rl/rl.cir
+ Transient Analysis Thu Mar 3 22:39:27 2016
+--------------------------------------------------------------------------------
+Index time l1#branch v1#branch
+--------------------------------------------------------------------------------
+0 0.000000e+00 0.000000e+00 0.000000e+00
+1 5.000000e-06 2.498751e-06 -2.49875e-06
+2 5.420140e-06 2.726358e-06 -2.72636e-06
+3 6.260420e-06 3.216855e-06 -3.21686e-06
+4 7.940980e-06 4.409530e-06 -4.40953e-06
+5 1.130210e-05 7.641419e-06 -7.64142e-06
+6 1.802434e-05 1.748994e-05 -1.74899e-05
+7 3.146882e-05 5.071458e-05 -5.07146e-05
+8 5.835778e-05 1.711834e-04 -1.71183e-04
+9 1.121357e-04 6.274752e-04 -6.27475e-04
+10 2.196915e-04 2.395715e-03 -2.39571e-03
+11 4.348032e-04 9.309294e-03 -9.30929e-03
+12 5.000000e-04 1.228620e-02 -1.22862e-02
+13 5.430223e-04 1.437547e-02 -1.43755e-02
+14 6.290670e-04 1.853611e-02 -1.85361e-02
+15 8.011564e-04 2.675091e-02 -2.67509e-02
+16 1.145335e-03 4.276358e-02 -4.27636e-02
+17 1.833692e-03 7.319055e-02 -7.31906e-02
+18 3.210407e-03 1.281658e-01 -1.28166e-01
+19 5.210407e-03 1.957720e-01 -1.95772e-01
+20 7.210407e-03 2.510862e-01 -2.51086e-01
+21 9.210407e-03 2.963432e-01 -2.96343e-01
+22 1.121041e-02 3.333717e-01 -3.33372e-01
+23 1.321041e-02 3.636678e-01 -3.63668e-01
+24 1.521041e-02 3.884555e-01 -3.88455e-01
+25 1.721041e-02 4.087363e-01 -4.08736e-01
+26 1.921041e-02 4.253297e-01 -4.25330e-01
+27 2.121041e-02 4.389061e-01 -4.38906e-01
+28 2.321041e-02 4.500141e-01 -4.50014e-01
+29 2.521041e-02 4.591024e-01 -4.59102e-01
+30 2.721041e-02 4.665384e-01 -4.66538e-01
+31 2.921041e-02 4.726223e-01 -4.72622e-01
+32 3.121041e-02 4.776001e-01 -4.77600e-01
+33 3.321041e-02 4.816728e-01 -4.81673e-01
+34 3.521041e-02 4.850050e-01 -4.85005e-01
+35 3.721041e-02 4.877314e-01 -4.87731e-01
+36 3.921041e-02 4.899620e-01 -4.89962e-01
+37 4.121041e-02 4.917871e-01 -4.91787e-01
+38 4.321041e-02 4.932804e-01 -4.93280e-01
+39 4.521041e-02 4.945021e-01 -4.94502e-01
+40 4.721041e-02 4.955017e-01 -4.95502e-01
+41 4.921041e-02 4.963196e-01 -4.96320e-01
+42 5.000000e-02 4.965992e-01 -4.96599e-01
+43 5.005000e-02 4.963673e-01 -4.96367e-01
+44 5.015000e-02 4.954084e-01 -4.95408e-01
+45 5.035000e-02 4.905489e-01 -4.90549e-01
+46 5.050000e-02 4.843620e-01 -4.84362e-01
+47 5.054000e-02 4.824323e-01 -4.82432e-01
+48 5.062000e-02 4.785882e-01 -4.78588e-01
+49 5.078000e-02 4.709916e-01 -4.70992e-01
+50 5.110000e-02 4.561572e-01 -4.56157e-01
+51 5.174000e-02 4.278684e-01 -4.27868e-01
+52 5.302000e-02 3.763955e-01 -3.76396e-01
+53 5.502000e-02 3.079600e-01 -3.07960e-01
+54 5.702000e-02 2.519672e-01 -2.51967e-01
+
+Index time l1#branch v1#branch
+--------------------------------------------------------------------------------
+55 5.902000e-02 2.061550e-01 -2.06155e-01
+56 6.102000e-02 1.686723e-01 -1.68672e-01
+57 6.302000e-02 1.380046e-01 -1.38005e-01
+58 6.502000e-02 1.129129e-01 -1.12913e-01
+59 6.702000e-02 9.238324e-02 -9.23832e-02
+60 6.902000e-02 7.558629e-02 -7.55863e-02
+61 7.102000e-02 6.184333e-02 -6.18433e-02
+62 7.302000e-02 5.059909e-02 -5.05991e-02
+63 7.502000e-02 4.139925e-02 -4.13993e-02
+64 7.702000e-02 3.387212e-02 -3.38721e-02
+65 7.902000e-02 2.771355e-02 -2.77135e-02
+66 8.102000e-02 2.267472e-02 -2.26747e-02
+67 8.302000e-02 1.855205e-02 -1.85520e-02
+68 8.502000e-02 1.517895e-02 -1.51789e-02
+69 8.702000e-02 1.241914e-02 -1.24191e-02
+70 8.902000e-02 1.016111e-02 -1.01611e-02
+71 9.102000e-02 8.313638e-03 -8.31364e-03
+72 9.302000e-02 6.802067e-03 -6.80207e-03
+73 9.502000e-02 5.565328e-03 -5.56533e-03
+74 9.702000e-02 4.553450e-03 -4.55345e-03
+75 9.902000e-02 3.725550e-03 -3.72555e-03
+76 1.000000e-01 3.377500e-03 -3.37750e-03
diff --git a/Examples/RL/plot_data_v.txt b/Examples/RL/plot_data_v.txt
new file mode 100644
index 00000000..85070401
--- /dev/null
+++ b/Examples/RL/plot_data_v.txt
@@ -0,0 +1,85 @@
+ * /home/fossee/esim-workspace/rl/rl.cir
+ Transient Analysis Thu Mar 3 22:39:27 2016
+--------------------------------------------------------------------------------
+Index time in out
+--------------------------------------------------------------------------------
+0 0.000000e+00 0.000000e+00 0.000000e+00
+1 5.000000e-06 5.000000e-02 4.997501e-02
+2 5.420140e-06 5.420140e-02 5.417414e-02
+3 6.260420e-06 6.260420e-02 6.257203e-02
+4 7.940980e-06 7.940980e-02 7.936570e-02
+5 1.130210e-05 1.130210e-01 1.129446e-01
+6 1.802434e-05 1.802434e-01 1.800685e-01
+7 3.146882e-05 3.146882e-01 3.141811e-01
+8 5.835778e-05 5.835778e-01 5.818660e-01
+9 1.121357e-04 1.121357e+00 1.115082e+00
+10 2.196915e-04 2.196915e+00 2.172958e+00
+11 4.348032e-04 4.348032e+00 4.254939e+00
+12 5.000000e-04 5.000000e+00 4.877138e+00
+13 5.430223e-04 5.000000e+00 4.856245e+00
+14 6.290670e-04 5.000000e+00 4.814639e+00
+15 8.011564e-04 5.000000e+00 4.732491e+00
+16 1.145335e-03 5.000000e+00 4.572364e+00
+17 1.833692e-03 5.000000e+00 4.268094e+00
+18 3.210407e-03 5.000000e+00 3.718342e+00
+19 5.210407e-03 5.000000e+00 3.042280e+00
+20 7.210407e-03 5.000000e+00 2.489138e+00
+21 9.210407e-03 5.000000e+00 2.036568e+00
+22 1.121041e-02 5.000000e+00 1.666283e+00
+23 1.321041e-02 5.000000e+00 1.363322e+00
+24 1.521041e-02 5.000000e+00 1.115445e+00
+25 1.721041e-02 5.000000e+00 9.126371e-01
+26 1.921041e-02 5.000000e+00 7.467031e-01
+27 2.121041e-02 5.000000e+00 6.109389e-01
+28 2.321041e-02 5.000000e+00 4.998591e-01
+29 2.521041e-02 5.000000e+00 4.089756e-01
+30 2.721041e-02 5.000000e+00 3.346164e-01
+31 2.921041e-02 5.000000e+00 2.737771e-01
+32 3.121041e-02 5.000000e+00 2.239994e-01
+33 3.321041e-02 5.000000e+00 1.832723e-01
+34 3.521041e-02 5.000000e+00 1.499500e-01
+35 3.721041e-02 5.000000e+00 1.226864e-01
+36 3.921041e-02 5.000000e+00 1.003798e-01
+37 4.121041e-02 5.000000e+00 8.212890e-02
+38 4.321041e-02 5.000000e+00 6.719638e-02
+39 4.521041e-02 5.000000e+00 5.497885e-02
+40 4.721041e-02 5.000000e+00 4.498270e-02
+41 4.921041e-02 5.000000e+00 3.680403e-02
+42 5.000000e-02 5.000000e+00 3.400838e-02
+43 5.005000e-02 4.500000e+00 -4.63673e-01
+44 5.015000e-02 3.500000e+00 -1.45408e+00
+45 5.035000e-02 1.500000e+00 -3.40549e+00
+46 5.050000e-02 0.000000e+00 -4.84362e+00
+47 5.054000e-02 0.000000e+00 -4.82432e+00
+48 5.062000e-02 0.000000e+00 -4.78588e+00
+49 5.078000e-02 0.000000e+00 -4.70992e+00
+50 5.110000e-02 0.000000e+00 -4.56157e+00
+51 5.174000e-02 0.000000e+00 -4.27868e+00
+52 5.302000e-02 0.000000e+00 -3.76396e+00
+53 5.502000e-02 0.000000e+00 -3.07960e+00
+54 5.702000e-02 0.000000e+00 -2.51967e+00
+
+Index time in out
+--------------------------------------------------------------------------------
+55 5.902000e-02 0.000000e+00 -2.06155e+00
+56 6.102000e-02 0.000000e+00 -1.68672e+00
+57 6.302000e-02 0.000000e+00 -1.38005e+00
+58 6.502000e-02 0.000000e+00 -1.12913e+00
+59 6.702000e-02 0.000000e+00 -9.23832e-01
+60 6.902000e-02 0.000000e+00 -7.55863e-01
+61 7.102000e-02 0.000000e+00 -6.18433e-01
+62 7.302000e-02 0.000000e+00 -5.05991e-01
+63 7.502000e-02 0.000000e+00 -4.13993e-01
+64 7.702000e-02 0.000000e+00 -3.38721e-01
+65 7.902000e-02 0.000000e+00 -2.77135e-01
+66 8.102000e-02 0.000000e+00 -2.26747e-01
+67 8.302000e-02 0.000000e+00 -1.85520e-01
+68 8.502000e-02 0.000000e+00 -1.51789e-01
+69 8.702000e-02 0.000000e+00 -1.24191e-01
+70 8.902000e-02 0.000000e+00 -1.01611e-01
+71 9.102000e-02 0.000000e+00 -8.31364e-02
+72 9.302000e-02 0.000000e+00 -6.80207e-02
+73 9.502000e-02 0.000000e+00 -5.56533e-02
+74 9.702000e-02 0.000000e+00 -4.55345e-02
+75 9.902000e-02 0.000000e+00 -3.72555e-02
+76 1.000000e-01 0.000000e+00 -3.37750e-02