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-rw-r--r--Examples/RC/RC-cache.lib92
-rw-r--r--Examples/RC/RC.bak123
-rw-r--r--Examples/RC/RC.cir15
-rw-r--r--Examples/RC/RC.cir.out18
-rw-r--r--Examples/RC/RC.pro71
-rw-r--r--Examples/RC/RC.proj1
-rw-r--r--Examples/RC/RC.sch148
-rw-r--r--Examples/RC/RC_Previous_Values.xml1
-rw-r--r--Examples/RC/analysis1
-rw-r--r--Examples/RC/plot_data_i.txt85
-rw-r--r--Examples/RC/plot_data_v.txt85
11 files changed, 640 insertions, 0 deletions
diff --git a/Examples/RC/RC-cache.lib b/Examples/RC/RC-cache.lib
new file mode 100644
index 00000000..0436d1fe
--- /dev/null
+++ b/Examples/RC/RC-cache.lib
@@ -0,0 +1,92 @@
+EESchema-LIBRARY Version 2.3
+#encoding utf-8
+#
+# C
+#
+DEF C C 0 10 N Y 1 F N
+F0 "C" 25 100 50 H V L CNN
+F1 "C" 25 -100 50 H V L CNN
+F2 "" 38 -150 30 H V C CNN
+F3 "" 0 0 60 H V C CNN
+$FPLIST
+ C?
+ C_????_*
+ C_????
+ SMD*_c
+ Capacitor*
+$ENDFPLIST
+DRAW
+P 2 0 1 20 -80 -30 80 -30 N
+P 2 0 1 20 -80 30 80 30 N
+X ~ 1 0 150 110 D 40 40 1 1 P
+X ~ 2 0 -150 110 U 40 40 1 1 P
+ENDDRAW
+ENDDEF
+#
+# GND
+#
+DEF GND #PWR 0 0 Y Y 1 F P
+F0 "#PWR" 0 -250 50 H I C CNN
+F1 "GND" 0 -150 50 H V C CNN
+F2 "" 0 0 50 H V C CNN
+F3 "" 0 0 50 H V C CNN
+DRAW
+P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
+X GND 1 0 0 0 D 50 50 1 1 W N
+ENDDRAW
+ENDDEF
+#
+# R
+#
+DEF R R 0 0 N Y 1 F N
+F0 "R" 50 130 50 H V C CNN
+F1 "R" 50 50 50 H V C CNN
+F2 "" 50 -20 30 H V C CNN
+F3 "" 50 50 30 V V C CNN
+$FPLIST
+ R_*
+ Resistor_*
+$ENDFPLIST
+DRAW
+S 150 10 -50 90 0 1 10 N
+X ~ 1 -100 50 50 R 60 60 1 1 P
+X ~ 2 200 50 50 L 60 60 1 1 P
+ENDDRAW
+ENDDEF
+#
+# plot_v1
+#
+DEF plot_v1 U 0 40 Y Y 1 F N
+F0 "U" 0 500 60 H V C CNN
+F1 "plot_v1" 200 350 60 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+C 0 500 100 0 1 0 N
+X ~ ~ 0 200 200 U 50 50 1 1 I
+ENDDRAW
+ENDDEF
+#
+# pwl
+#
+DEF pwl v 0 40 Y Y 1 F N
+F0 "v" -200 100 60 H V C CNN
+F1 "pwl" -250 -50 60 H V C CNN
+F2 "R1" -300 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+$FPLIST
+ 1_pin
+$ENDFPLIST
+DRAW
+A -1144 -561 1253 291 240 0 1 0 N -50 50 0 -50
+A -765 421 941 -300 -232 0 1 0 N 50 -50 100 50
+A -75 -700 750 919 880 0 1 0 N -100 50 -50 50
+A 25 450 501 -928 -871 0 1 0 N 0 -50 50 -50
+A 1096 -609 1366 1511 1558 0 1 0 N -100 50 -150 -50
+C 0 0 150 0 1 0 N
+X + 1 0 450 300 D 50 0 1 1 I
+X - 2 0 -450 300 U 50 0 1 1 I
+ENDDRAW
+ENDDEF
+#
+#End Library
diff --git a/Examples/RC/RC.bak b/Examples/RC/RC.bak
new file mode 100644
index 00000000..d62e6c3d
--- /dev/null
+++ b/Examples/RC/RC.bak
@@ -0,0 +1,123 @@
+EESchema Schematic File Version 2
+LIBS:eSim_Analog
+LIBS:eSim_Devices
+LIBS:eSim_Digital
+LIBS:eSim_Hybrid
+LIBS:eSim_Miscellaneous
+LIBS:eSim_Power
+LIBS:eSim_Sources
+LIBS:eSim_Subckt
+LIBS:eSim_User
+LIBS:adc-dac
+LIBS:memory
+LIBS:xilinx
+LIBS:microcontrollers
+LIBS:dsp
+LIBS:microchip
+LIBS:analog_switches
+LIBS:motorola
+LIBS:texas
+LIBS:intel
+LIBS:audio
+LIBS:interface
+LIBS:digital-audio
+LIBS:philips
+LIBS:display
+LIBS:cypress
+LIBS:siliconi
+LIBS:opto
+LIBS:atmel
+LIBS:contrib
+LIBS:power
+LIBS:device
+LIBS:transistors
+LIBS:conn
+LIBS:linear
+LIBS:regul
+LIBS:74xx
+LIBS:cmos4000
+LIBS:RC-cache
+EELAYER 25 0
+EELAYER END
+$Descr A4 11693 8268
+encoding utf-8
+Sheet 1 1
+Title ""
+Date ""
+Rev ""
+Comp ""
+Comment1 ""
+Comment2 ""
+Comment3 ""
+Comment4 ""
+$EndDescr
+$Comp
+L R R1
+U 1 1 56B86791
+P 5750 3050
+F 0 "R1" H 5800 3180 50 0000 C CNN
+F 1 "1k" H 5800 3100 50 0000 C CNN
+F 2 "" H 5800 3030 30 0000 C CNN
+F 3 "" V 5800 3100 30 0000 C CNN
+ 1 5750 3050
+ 1 0 0 -1
+$EndComp
+$Comp
+L C C1
+U 1 1 56B8686C
+P 6350 3250
+F 0 "C1" H 6375 3350 50 0000 L CNN
+F 1 "10u" H 6375 3150 50 0000 L CNN
+F 2 "" H 6388 3100 30 0000 C CNN
+F 3 "" H 6350 3250 60 0000 C CNN
+ 1 6350 3250
+ 1 0 0 -1
+$EndComp
+$Comp
+L pwl v1
+U 1 1 56B868AD
+P 5250 3450
+F 0 "v1" H 5050 3550 60 0000 C CNN
+F 1 "pwl" H 5000 3400 60 0000 C CNN
+F 2 "R1" H 4950 3450 60 0000 C CNN
+F 3 "" H 5250 3450 60 0000 C CNN
+ 1 5250 3450
+ 1 0 0 -1
+$EndComp
+Wire Wire Line
+ 5250 3000 5650 3000
+Wire Wire Line
+ 5950 3000 6350 3000
+Wire Wire Line
+ 6350 2850 6350 3100
+Wire Wire Line
+ 5250 3900 6350 3900
+Wire Wire Line
+ 6350 3900 6350 3400
+$Comp
+L GND #PWR01
+U 1 1 56B8692D
+P 5800 4000
+F 0 "#PWR01" H 5800 3750 50 0001 C CNN
+F 1 "GND" H 5800 3850 50 0000 C CNN
+F 2 "" H 5800 4000 50 0000 C CNN
+F 3 "" H 5800 4000 50 0000 C CNN
+ 1 5800 4000
+ 1 0 0 -1
+$EndComp
+Wire Wire Line
+ 5800 4000 5800 3900
+Connection ~ 5800 3900
+Text GLabel 5200 2800 0 60 Input ~ 0
+in
+Text GLabel 6400 2850 2 60 Input ~ 0
+out
+Wire Wire Line
+ 5350 2800 5350 3000
+Connection ~ 5350 3000
+Wire Wire Line
+ 6400 2850 6350 2850
+Connection ~ 6350 3000
+Wire Wire Line
+ 5200 2800 5350 2800
+$EndSCHEMATC
diff --git a/Examples/RC/RC.cir b/Examples/RC/RC.cir
new file mode 100644
index 00000000..5dbf445d
--- /dev/null
+++ b/Examples/RC/RC.cir
@@ -0,0 +1,15 @@
+* /home/fossee/eSim-Workspace/RC/RC.cir
+
+* EESchema Netlist Version 1.1 (Spice format) creation date: Mon Feb 29 21:35:31 2016
+
+* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N
+* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0
+
+* Sheet Name: /
+R1 in out 1k
+C1 out GND 10u
+v1 in GND pwl
+U1 in plot_v1
+U2 out plot_v1
+
+.end
diff --git a/Examples/RC/RC.cir.out b/Examples/RC/RC.cir.out
new file mode 100644
index 00000000..f5046892
--- /dev/null
+++ b/Examples/RC/RC.cir.out
@@ -0,0 +1,18 @@
+* /home/fossee/esim-workspace/rc/rc.cir
+
+r1 in out 1k
+c1 out gnd 10u
+v1 in gnd pwl(0m 0 0.5m 5 50m 5 50.5m 0 100m 0)
+* u1 in plot_v1
+* u2 out plot_v1
+.tran 10e-03 100e-03 0e-03
+
+* Control Statements
+.control
+run
+print allv > plot_data_v.txt
+print alli > plot_data_i.txt
+plot v(in)
+plot v(out)
+.endc
+.end
diff --git a/Examples/RC/RC.pro b/Examples/RC/RC.pro
new file mode 100644
index 00000000..89697b42
--- /dev/null
+++ b/Examples/RC/RC.pro
@@ -0,0 +1,71 @@
+update=Mon Feb 29 21:34:52 2016
+version=1
+last_client=eeschema
+[general]
+version=1
+RootSch=
+BoardNm=
+[pcbnew]
+version=1
+LastNetListRead=
+UseCmpFile=1
+PadDrill=0.600000000000
+PadDrillOvalY=0.600000000000
+PadSizeH=1.500000000000
+PadSizeV=1.500000000000
+PcbTextSizeV=1.500000000000
+PcbTextSizeH=1.500000000000
+PcbTextThickness=0.300000000000
+ModuleTextSizeV=1.000000000000
+ModuleTextSizeH=1.000000000000
+ModuleTextSizeThickness=0.150000000000
+SolderMaskClearance=0.000000000000
+SolderMaskMinWidth=0.000000000000
+DrawSegmentWidth=0.200000000000
+BoardOutlineThickness=0.100000000000
+ModuleOutlineThickness=0.150000000000
+[cvpcb]
+version=1
+NetIExt=net
+[eeschema]
+version=1
+LibDir=
+[eeschema/libraries]
+LibName1=eSim_Analog
+LibName2=eSim_Devices
+LibName3=eSim_Digital
+LibName4=eSim_Hybrid
+LibName5=eSim_Miscellaneous
+LibName6=eSim_Plot
+LibName7=eSim_Power
+LibName8=eSim_Sources
+LibName9=eSim_Subckt
+LibName10=eSim_User
+LibName11=adc-dac
+LibName12=memory
+LibName13=xilinx
+LibName14=microcontrollers
+LibName15=dsp
+LibName16=microchip
+LibName17=analog_switches
+LibName18=motorola
+LibName19=texas
+LibName20=intel
+LibName21=audio
+LibName22=interface
+LibName23=digital-audio
+LibName24=philips
+LibName25=display
+LibName26=cypress
+LibName27=siliconi
+LibName28=opto
+LibName29=atmel
+LibName30=contrib
+LibName31=power
+LibName32=device
+LibName33=transistors
+LibName34=conn
+LibName35=linear
+LibName36=regul
+LibName37=74xx
+LibName38=cmos4000
diff --git a/Examples/RC/RC.proj b/Examples/RC/RC.proj
new file mode 100644
index 00000000..396e6d05
--- /dev/null
+++ b/Examples/RC/RC.proj
@@ -0,0 +1 @@
+schematicFile RC.sch
diff --git a/Examples/RC/RC.sch b/Examples/RC/RC.sch
new file mode 100644
index 00000000..f5b5def0
--- /dev/null
+++ b/Examples/RC/RC.sch
@@ -0,0 +1,148 @@
+EESchema Schematic File Version 2
+LIBS:eSim_Analog
+LIBS:eSim_Devices
+LIBS:eSim_Digital
+LIBS:eSim_Hybrid
+LIBS:eSim_Miscellaneous
+LIBS:eSim_Plot
+LIBS:eSim_Power
+LIBS:eSim_Sources
+LIBS:eSim_Subckt
+LIBS:eSim_User
+LIBS:adc-dac
+LIBS:memory
+LIBS:xilinx
+LIBS:microcontrollers
+LIBS:dsp
+LIBS:microchip
+LIBS:analog_switches
+LIBS:motorola
+LIBS:texas
+LIBS:intel
+LIBS:audio
+LIBS:interface
+LIBS:digital-audio
+LIBS:philips
+LIBS:display
+LIBS:cypress
+LIBS:siliconi
+LIBS:opto
+LIBS:atmel
+LIBS:contrib
+LIBS:power
+LIBS:device
+LIBS:transistors
+LIBS:conn
+LIBS:linear
+LIBS:regul
+LIBS:74xx
+LIBS:cmos4000
+LIBS:RC-cache
+EELAYER 25 0
+EELAYER END
+$Descr A4 11693 8268
+encoding utf-8
+Sheet 1 1
+Title ""
+Date ""
+Rev ""
+Comp ""
+Comment1 ""
+Comment2 ""
+Comment3 ""
+Comment4 ""
+$EndDescr
+$Comp
+L R R1
+U 1 1 56B86791
+P 5750 3050
+F 0 "R1" H 5800 3180 50 0000 C CNN
+F 1 "1k" H 5800 3100 50 0000 C CNN
+F 2 "" H 5800 3030 30 0000 C CNN
+F 3 "" V 5800 3100 30 0000 C CNN
+ 1 5750 3050
+ 1 0 0 -1
+$EndComp
+$Comp
+L C C1
+U 1 1 56B8686C
+P 6350 3250
+F 0 "C1" H 6375 3350 50 0000 L CNN
+F 1 "10u" H 6375 3150 50 0000 L CNN
+F 2 "" H 6388 3100 30 0000 C CNN
+F 3 "" H 6350 3250 60 0000 C CNN
+ 1 6350 3250
+ 1 0 0 -1
+$EndComp
+$Comp
+L pwl v1
+U 1 1 56B868AD
+P 5250 3450
+F 0 "v1" H 5050 3550 60 0000 C CNN
+F 1 "pwl" H 5000 3400 60 0000 C CNN
+F 2 "R1" H 4950 3450 60 0000 C CNN
+F 3 "" H 5250 3450 60 0000 C CNN
+ 1 5250 3450
+ 1 0 0 -1
+$EndComp
+Wire Wire Line
+ 5250 3000 5650 3000
+Wire Wire Line
+ 5950 3000 6350 3000
+Wire Wire Line
+ 6350 2800 6350 3100
+Wire Wire Line
+ 5250 3900 6350 3900
+Wire Wire Line
+ 6350 3900 6350 3400
+$Comp
+L GND #PWR01
+U 1 1 56B8692D
+P 5800 4000
+F 0 "#PWR01" H 5800 3750 50 0001 C CNN
+F 1 "GND" H 5800 3850 50 0000 C CNN
+F 2 "" H 5800 4000 50 0000 C CNN
+F 3 "" H 5800 4000 50 0000 C CNN
+ 1 5800 4000
+ 1 0 0 -1
+$EndComp
+Wire Wire Line
+ 5800 4000 5800 3900
+Connection ~ 5800 3900
+Text GLabel 5200 2800 0 60 Input ~ 0
+in
+Text GLabel 6400 2850 2 60 Input ~ 0
+out
+Wire Wire Line
+ 5350 2750 5350 3000
+Connection ~ 5350 3000
+Wire Wire Line
+ 6400 2850 6350 2850
+Connection ~ 6350 3000
+Wire Wire Line
+ 5200 2800 5350 2800
+$Comp
+L plot_v1 U1
+U 1 1 56D46C33
+P 5350 2950
+F 0 "U1" H 5350 3450 60 0000 C CNN
+F 1 "plot_v1" H 5550 3300 60 0000 C CNN
+F 2 "" H 5350 2950 60 0000 C CNN
+F 3 "" H 5350 2950 60 0000 C CNN
+ 1 5350 2950
+ 1 0 0 -1
+$EndComp
+$Comp
+L plot_v1 U2
+U 1 1 56D46CCE
+P 6350 3000
+F 0 "U2" H 6350 3500 60 0000 C CNN
+F 1 "plot_v1" H 6550 3350 60 0000 C CNN
+F 2 "" H 6350 3000 60 0000 C CNN
+F 3 "" H 6350 3000 60 0000 C CNN
+ 1 6350 3000
+ 1 0 0 -1
+$EndComp
+Connection ~ 5350 2800
+Connection ~ 6350 2850
+$EndSCHEMATC
diff --git a/Examples/RC/RC_Previous_Values.xml b/Examples/RC/RC_Previous_Values.xml
new file mode 100644
index 00000000..999b881e
--- /dev/null
+++ b/Examples/RC/RC_Previous_Values.xml
@@ -0,0 +1 @@
+<KicadtoNgspice><source><v1 name="Source type">pwl<field1 name="Enter in pwl format">0m 0 0.5m 5 50m 5 50.5m 0 100m 0</field1></v1></source><model /><devicemodel /><subcircuit /><analysis><ac><field1 name="Lin">true</field1><field2 name="Dec">false</field2><field3 name="Oct">false</field3><field4 name="Start Frequency" /><field5 name="Stop Frequency" /><field6 name="No. of points" /><field7 name="Start Fre Combo">Hz</field7><field8 name="Stop Fre Combo">Hz</field8></ac><dc><field1 name="Source 1" /><field2 name="Start" /><field3 name="Increment" /><field4 name="Stop" /><field5 name="Operating Point">0</field5><field6 name="Start Combo">Volts or Amperes</field6><field7 name="Increment Combo">Volts or Amperes</field7><field8 name="Stop Combo">Volts or Amperes</field8><field9 name="Source 2" /><field10 name="Start" /><field11 name="Increment" /><field12 name="Stop" /><field13 name="Start Combo">Volts or Amperes</field13><field14 name="Increment Combo">Volts or Amperes</field14><field15 name="Stop Combo">Volts or Amperes</field15></dc><tran><field1 name="Start Time">0</field1><field2 name="Step Time">10</field2><field3 name="Stop Time">100</field3><field4 name="Start Combo">ms</field4><field5 name="Step Combo">ms</field5><field6 name="Stop Combo">ms</field6></tran></analysis></KicadtoNgspice> \ No newline at end of file
diff --git a/Examples/RC/analysis b/Examples/RC/analysis
new file mode 100644
index 00000000..660a46cc
--- /dev/null
+++ b/Examples/RC/analysis
@@ -0,0 +1 @@
+.tran 10e-03 100e-03 0e-03 \ No newline at end of file
diff --git a/Examples/RC/plot_data_i.txt b/Examples/RC/plot_data_i.txt
new file mode 100644
index 00000000..bf360dd5
--- /dev/null
+++ b/Examples/RC/plot_data_i.txt
@@ -0,0 +1,85 @@
+ * /home/fossee/esim-workspace/rc/rc.cir
+ Transient Analysis Thu Mar 3 22:39:09 2016
+--------------------------------------------------------------------------------
+Index time alli
+--------------------------------------------------------------------------------
+0 0.000000e+00 0.000000e+00
+1 5.000000e-06 -4.99750e-05
+2 5.420140e-06 -5.41741e-05
+3 6.260420e-06 -6.25720e-05
+4 7.940980e-06 -7.93657e-05
+5 1.130210e-05 -1.12945e-04
+6 1.802434e-05 -1.80069e-04
+7 3.146882e-05 -3.14181e-04
+8 5.835778e-05 -5.81866e-04
+9 1.121357e-04 -1.11508e-03
+10 2.196915e-04 -2.17296e-03
+11 4.348032e-04 -4.25494e-03
+12 5.000000e-04 -4.87714e-03
+13 5.430223e-04 -4.85625e-03
+14 6.290670e-04 -4.81464e-03
+15 8.011564e-04 -4.73249e-03
+16 1.145335e-03 -4.57236e-03
+17 1.833692e-03 -4.26809e-03
+18 3.210407e-03 -3.71834e-03
+19 5.210407e-03 -3.04228e-03
+20 7.210407e-03 -2.48914e-03
+21 9.210407e-03 -2.03657e-03
+22 1.121041e-02 -1.66628e-03
+23 1.321041e-02 -1.36332e-03
+24 1.521041e-02 -1.11545e-03
+25 1.721041e-02 -9.12637e-04
+26 1.921041e-02 -7.46703e-04
+27 2.121041e-02 -6.10939e-04
+28 2.321041e-02 -4.99859e-04
+29 2.521041e-02 -4.08976e-04
+30 2.721041e-02 -3.34616e-04
+31 2.921041e-02 -2.73777e-04
+32 3.121041e-02 -2.23999e-04
+33 3.321041e-02 -1.83272e-04
+34 3.521041e-02 -1.49950e-04
+35 3.721041e-02 -1.22686e-04
+36 3.921041e-02 -1.00380e-04
+37 4.121041e-02 -8.21289e-05
+38 4.321041e-02 -6.71964e-05
+39 4.521041e-02 -5.49789e-05
+40 4.721041e-02 -4.49827e-05
+41 4.921041e-02 -3.68040e-05
+42 5.000000e-02 -3.40084e-05
+43 5.005000e-02 4.636733e-04
+44 5.015000e-02 1.454084e-03
+45 5.035000e-02 3.405489e-03
+46 5.050000e-02 4.843620e-03
+47 5.054000e-02 4.824323e-03
+48 5.062000e-02 4.785882e-03
+49 5.078000e-02 4.709916e-03
+50 5.110000e-02 4.561572e-03
+51 5.174000e-02 4.278684e-03
+52 5.302000e-02 3.763955e-03
+53 5.502000e-02 3.079600e-03
+54 5.702000e-02 2.519672e-03
+
+Index time alli
+--------------------------------------------------------------------------------
+55 5.902000e-02 2.061550e-03
+56 6.102000e-02 1.686723e-03
+57 6.302000e-02 1.380046e-03
+58 6.502000e-02 1.129129e-03
+59 6.702000e-02 9.238324e-04
+60 6.902000e-02 7.558629e-04
+61 7.102000e-02 6.184333e-04
+62 7.302000e-02 5.059909e-04
+63 7.502000e-02 4.139925e-04
+64 7.702000e-02 3.387212e-04
+65 7.902000e-02 2.771355e-04
+66 8.102000e-02 2.267472e-04
+67 8.302000e-02 1.855205e-04
+68 8.502000e-02 1.517895e-04
+69 8.702000e-02 1.241914e-04
+70 8.902000e-02 1.016111e-04
+71 9.102000e-02 8.313638e-05
+72 9.302000e-02 6.802067e-05
+73 9.502000e-02 5.565328e-05
+74 9.702000e-02 4.553450e-05
+75 9.902000e-02 3.725550e-05
+76 1.000000e-01 3.377500e-05
diff --git a/Examples/RC/plot_data_v.txt b/Examples/RC/plot_data_v.txt
new file mode 100644
index 00000000..3fe8f022
--- /dev/null
+++ b/Examples/RC/plot_data_v.txt
@@ -0,0 +1,85 @@
+ * /home/fossee/esim-workspace/rc/rc.cir
+ Transient Analysis Thu Mar 3 22:39:09 2016
+--------------------------------------------------------------------------------
+Index time in out
+--------------------------------------------------------------------------------
+0 0.000000e+00 0.000000e+00 0.000000e+00
+1 5.000000e-06 5.000000e-02 2.498751e-05
+2 5.420140e-06 5.420140e-02 2.726358e-05
+3 6.260420e-06 6.260420e-02 3.216855e-05
+4 7.940980e-06 7.940980e-02 4.409530e-05
+5 1.130210e-05 1.130210e-01 7.641419e-05
+6 1.802434e-05 1.802434e-01 1.748994e-04
+7 3.146882e-05 3.146882e-01 5.071458e-04
+8 5.835778e-05 5.835778e-01 1.711834e-03
+9 1.121357e-04 1.121357e+00 6.274752e-03
+10 2.196915e-04 2.196915e+00 2.395715e-02
+11 4.348032e-04 4.348032e+00 9.309294e-02
+12 5.000000e-04 5.000000e+00 1.228620e-01
+13 5.430223e-04 5.000000e+00 1.437547e-01
+14 6.290670e-04 5.000000e+00 1.853611e-01
+15 8.011564e-04 5.000000e+00 2.675091e-01
+16 1.145335e-03 5.000000e+00 4.276358e-01
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+
+Index time in out
+--------------------------------------------------------------------------------
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