diff options
Diffstat (limited to 'Examples/NGHDL_Examples/custom_mixed_mode')
8 files changed, 15 insertions, 352 deletions
diff --git a/Examples/NGHDL_Examples/custom_mixed_mode/lm_741.pro b/Examples/NGHDL_Examples/custom_mixed_mode/lm_741.pro index ccd8a7ba..92688945 100644 --- a/Examples/NGHDL_Examples/custom_mixed_mode/lm_741.pro +++ b/Examples/NGHDL_Examples/custom_mixed_mode/lm_741.pro @@ -1,4 +1,4 @@ -update=Thu Mar 12 09:53:44 2020 +update=Wed Mar 18 19:30:09 2020 version=1 last_client=eeschema [general] @@ -40,7 +40,6 @@ LibName6=eSim_Hybrid LibName7=eSim_Miscellaneous LibName8=eSim_Plot LibName9=eSim_Power -LibName10=eSim_PSpice -LibName11=eSim_Sources -LibName12=eSim_Subckt -LibName13=eSim_User +LibName10=eSim_Sources +LibName11=eSim_Subckt +LibName12=eSim_User diff --git a/Examples/NGHDL_Examples/custom_mixed_mode/plot_data_i.txt b/Examples/NGHDL_Examples/custom_mixed_mode/plot_data_i.txt index 4289a0b3..3280c72a 100644 --- a/Examples/NGHDL_Examples/custom_mixed_mode/plot_data_i.txt +++ b/Examples/NGHDL_Examples/custom_mixed_mode/plot_data_i.txt @@ -1,5 +1,5 @@ * /home/saurabh/desktop/test_pwm/test_pwm.cir - Transient Analysis Fri Mar 13 09:52:56 2020 + Transient Analysis Wed Mar 18 19:30:37 2020 -------------------------------------------------------------------------------- Index time a1#branch_1_0 v1#branch v2#branch -------------------------------------------------------------------------------- @@ -6957,7 +6957,7 @@ Index time a1#branch_1_0 v1#branch v2#branch 6609 1.000000e+00 8.377131e-04 -2.07294e-07 -4.75194e-04 * /home/saurabh/desktop/test_pwm/test_pwm.cir - Transient Analysis Fri Mar 13 09:52:56 2020 + Transient Analysis Wed Mar 18 19:30:37 2020 -------------------------------------------------------------------------------- Index time v3#branch v5#branch -------------------------------------------------------------------------------- diff --git a/Examples/NGHDL_Examples/custom_mixed_mode/plot_data_v.txt b/Examples/NGHDL_Examples/custom_mixed_mode/plot_data_v.txt index 03c43625..993175eb 100644 --- a/Examples/NGHDL_Examples/custom_mixed_mode/plot_data_v.txt +++ b/Examples/NGHDL_Examples/custom_mixed_mode/plot_data_v.txt @@ -1,5 +1,5 @@ * /home/saurabh/desktop/test_pwm/test_pwm.cir - Transient Analysis Fri Mar 13 09:52:56 2020 + Transient Analysis Wed Mar 18 19:30:37 2020 -------------------------------------------------------------------------------- Index time ? d net-_u5-pad1_ -------------------------------------------------------------------------------- @@ -6957,7 +6957,7 @@ Index time ? d net-_u5-pad1_ 6609 1.000000e+00 -8.99113e+00 8.877380e+00 0.000000e+00 * /home/saurabh/desktop/test_pwm/test_pwm.cir - Transient Analysis Fri Mar 13 09:52:56 2020 + Transient Analysis Wed Mar 18 19:30:37 2020 -------------------------------------------------------------------------------- Index time net-_x1-pad4_ net-_x1-pad7_ pwl_in -------------------------------------------------------------------------------- @@ -13915,7 +13915,7 @@ Index time net-_x1-pad4_ net-_x1-pad7_ pwl_in 6609 1.000000e+00 -9.00000e+00 9.000000e+00 1.000000e+00 * /home/saurabh/desktop/test_pwm/test_pwm.cir - Transient Analysis Fri Mar 13 09:52:56 2020 + Transient Analysis Wed Mar 18 19:30:37 2020 -------------------------------------------------------------------------------- Index time q rc1 rc2 -------------------------------------------------------------------------------- @@ -20873,7 +20873,7 @@ Index time q rc1 rc2 6609 1.000000e+00 0.000000e+00 8.377131e-01 8.959075e-01 * /home/saurabh/desktop/test_pwm/test_pwm.cir - Transient Analysis Fri Mar 13 09:52:56 2020 + Transient Analysis Wed Mar 18 19:30:37 2020 -------------------------------------------------------------------------------- Index time x1.net-_c1-pad1 x1.net-_c1-pad2 x1.net-_q1-pad1 -------------------------------------------------------------------------------- @@ -27831,7 +27831,7 @@ Index time x1.net-_c1-pad1 x1.net-_c1-pad2 x1.net-_q1-pad1 6609 1.000000e+00 8.996035e+00 -8.98317e+00 8.462805e+00 * /home/saurabh/desktop/test_pwm/test_pwm.cir - Transient Analysis Fri Mar 13 09:52:56 2020 + Transient Analysis Wed Mar 18 19:30:37 2020 -------------------------------------------------------------------------------- Index time x1.net-_q1-pad3 x1.net-_q2-pad3 x1.net-_q3-pad2 -------------------------------------------------------------------------------- @@ -34789,7 +34789,7 @@ Index time x1.net-_q1-pad3 x1.net-_q2-pad3 x1.net-_q3-pad2 6609 1.000000e+00 4.662891e-01 4.140802e-01 -7.92845e+00 * /home/saurabh/desktop/test_pwm/test_pwm.cir - Transient Analysis Fri Mar 13 09:52:56 2020 + Transient Analysis Wed Mar 18 19:30:37 2020 -------------------------------------------------------------------------------- Index time x1.net-_q3-pad3 x1.net-_q10-pad x1.net-_q12-pad -------------------------------------------------------------------------------- @@ -41747,7 +41747,7 @@ Index time x1.net-_q3-pad3 x1.net-_q10-pad x1.net-_q12-pad 6609 1.000000e+00 -8.45615e+00 8.376292e+00 -8.37390e+00 * /home/saurabh/desktop/test_pwm/test_pwm.cir - Transient Analysis Fri Mar 13 09:52:56 2020 + Transient Analysis Wed Mar 18 19:30:37 2020 -------------------------------------------------------------------------------- Index time x1.net-_q13-pad x1.net-_q13-pad x1.net-_q14-pad -------------------------------------------------------------------------------- @@ -48705,7 +48705,7 @@ Index time x1.net-_q13-pad x1.net-_q13-pad x1.net-_q14-pad 6609 1.000000e+00 -6.66164e-02 -8.91217e+00 8.996035e+00 * /home/saurabh/desktop/test_pwm/test_pwm.cir - Transient Analysis Fri Mar 13 09:52:56 2020 + Transient Analysis Wed Mar 18 19:30:37 2020 -------------------------------------------------------------------------------- Index time x1.net-_q14-pad x1.net-_q15-pad x1.net-_q15-pad -------------------------------------------------------------------------------- @@ -55663,7 +55663,7 @@ Index time x1.net-_q14-pad x1.net-_q15-pad x1.net-_q15-pad 6609 1.000000e+00 8.996034e+00 -9.00000e+00 -9.00000e+00 * /home/saurabh/desktop/test_pwm/test_pwm.cir - Transient Analysis Fri Mar 13 09:52:56 2020 + Transient Analysis Wed Mar 18 19:30:37 2020 -------------------------------------------------------------------------------- Index time x1.net-_q18-pad x1.net-_q19-pad -------------------------------------------------------------------------------- diff --git a/Examples/NGHDL_Examples/custom_mixed_mode/ua741.cir b/Examples/NGHDL_Examples/custom_mixed_mode/ua741.cir deleted file mode 100644 index de797429..00000000 --- a/Examples/NGHDL_Examples/custom_mixed_mode/ua741.cir +++ /dev/null @@ -1,15 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 17 December 2012 11:16:58 AM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -U1 6 7 3 PORT -Rout1 3 2 75 -Eout1 2 0 1 0 1 -Cbw1 1 0 31.85e-9 -Rbw1 1 4 0.5e6 -Ein1 4 0 7 6 100e3 -Rin1 7 6 2e6 - -.end diff --git a/Examples/NGHDL_Examples/custom_mixed_mode/ua741.cir.out b/Examples/NGHDL_Examples/custom_mixed_mode/ua741.cir.out deleted file mode 100644 index 72e68514..00000000 --- a/Examples/NGHDL_Examples/custom_mixed_mode/ua741.cir.out +++ /dev/null @@ -1,18 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist - -* u1 6 7 3 port -rout1 3 2 75 -eout1 2 0 1 0 1 -cbw1 1 0 31.85e-9 -rbw1 1 4 0.5e6 -ein1 4 0 7 6 100e3 -rin1 7 6 2e6 -.ac lin 0 0Hz 0Hz - -* Control Statements -.control -run -print allv > plot_data_v.txt -print alli > plot_data_i.txt -.endc -.end diff --git a/Examples/NGHDL_Examples/custom_mixed_mode/ua741.pro b/Examples/NGHDL_Examples/custom_mixed_mode/ua741.pro deleted file mode 100644 index 5dbb81a5..00000000 --- a/Examples/NGHDL_Examples/custom_mixed_mode/ua741.pro +++ /dev/null @@ -1,72 +0,0 @@ -update=Monday 17 December 2012 06:14:06 PM IST -last_client=eeschema -[eeschema] -version=1 -LibDir=/home/yogesh/FreeEDA/library -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=analogSpice -LibName32=converterSpice -LibName33=digitalSpice -LibName34=linearSpice -LibName35=measurementSpice -LibName36=portSpice -LibName37=sourcesSpice -LibName38=analogXSpice diff --git a/Examples/NGHDL_Examples/custom_mixed_mode/ua741.sch b/Examples/NGHDL_Examples/custom_mixed_mode/ua741.sch deleted file mode 100644 index 7dfc5e1a..00000000 --- a/Examples/NGHDL_Examples/custom_mixed_mode/ua741.sch +++ /dev/null @@ -1,219 +0,0 @@ -EESchema Schematic File Version 2 date Wednesday 19 December 2012 10:15:16 AM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:analogXSpice -LIBS:ua741-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "19 dec 2012" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Text Notes 3800 2400 0 60 ~ 0 -Op-Amp -Text Notes 3750 2850 0 60 ~ 0 -VCCS -Text Notes 5800 2500 0 60 ~ 0 -out -Text Notes 2750 3100 0 60 ~ 0 -- -Text Notes 2700 2600 0 60 ~ 0 -+ -$Comp -L PORT U1 -U 6 1 5082C027 -P 6250 2500 -F 0 "U1" H 6250 2450 30 0000 C CNN -F 1 "PORT" H 6250 2500 30 0000 C CNN - 6 6250 2500 - -1 0 0 1 -$EndComp -$Comp -L PORT U1 -U 2 1 5082C011 -P 2300 3100 -F 0 "U1" H 2300 3050 30 0000 C CNN -F 1 "PORT" H 2300 3100 30 0000 C CNN - 2 2300 3100 - 1 0 0 -1 -$EndComp -$Comp -L PORT U1 -U 3 1 5082C00B -P 2250 2600 -F 0 "U1" H 2250 2550 30 0000 C CNN -F 1 "PORT" H 2250 2600 30 0000 C CNN - 3 2250 2600 - 1 0 0 -1 -$EndComp -Connection ~ 3700 3200 -Wire Wire Line - 3450 3200 3700 3200 -Connection ~ 5000 3300 -Wire Wire Line - 3700 3300 5250 3300 -Wire Wire Line - 5250 3300 5250 3200 -Connection ~ 4550 3300 -Wire Wire Line - 5000 3300 5000 2950 -Connection ~ 3700 3300 -Wire Wire Line - 4550 3300 4550 3100 -Wire Wire Line - 3900 2500 3700 2500 -Wire Wire Line - 3700 2500 3700 2550 -Wire Wire Line - 3450 2900 3300 2900 -Wire Wire Line - 3300 2900 3300 3200 -Wire Wire Line - 3300 3200 2950 3200 -Connection ~ 2950 3100 -Wire Wire Line - 2950 3200 2950 3100 -Wire Wire Line - 3000 2600 2500 2600 -Wire Wire Line - 2550 3100 3000 3100 -Wire Wire Line - 2950 2600 2950 2500 -Connection ~ 2950 2600 -Wire Wire Line - 2950 2500 3300 2500 -Wire Wire Line - 3300 2500 3300 2800 -Wire Wire Line - 3300 2800 3450 2800 -Wire Wire Line - 3700 3150 3700 3400 -Wire Wire Line - 4550 2500 4550 2700 -Wire Wire Line - 4400 2500 5000 2500 -Wire Wire Line - 5000 2500 5000 2850 -Connection ~ 4550 2500 -Wire Wire Line - 5250 2600 5250 2500 -Wire Wire Line - 5250 2500 5350 2500 -Wire Wire Line - 5850 2500 6000 2500 -$Comp -L PWR_FLAG #FLG01 -U 1 1 508152A0 -P 3450 3200 -F 0 "#FLG01" H 3450 3470 30 0001 C CNN -F 1 "PWR_FLAG" H 3450 3430 30 0000 C CNN - 1 3450 3200 - 1 0 0 -1 -$EndComp -$Comp -L R Rout1 -U 1 1 50813F5B -P 5600 2500 -F 0 "Rout1" V 5680 2500 50 0000 C CNN -F 1 "75" V 5600 2500 50 0000 C CNN - 1 5600 2500 - 0 1 1 0 -$EndComp -$Comp -L VCVS Eout1 -U 1 1 50813F0F -P 5200 2900 -F 0 "Eout1" H 5000 3000 50 0000 C CNN -F 1 "1" H 5000 2850 50 0000 C CNN - 1 5200 2900 - 0 1 1 0 -$EndComp -$Comp -L C Cbw1 -U 1 1 50813EE0 -P 4550 2900 -F 0 "Cbw1" H 4600 3000 50 0000 L CNN -F 1 "31.85e-9" H 4600 2800 50 0000 L CNN - 1 4550 2900 - 1 0 0 -1 -$EndComp -$Comp -L R Rbw1 -U 1 1 50813EAB -P 4150 2500 -F 0 "Rbw1" V 4230 2500 50 0000 C CNN -F 1 "0.5e6" V 4150 2500 50 0000 C CNN - 1 4150 2500 - 0 1 1 0 -$EndComp -$Comp -L GND #PWR02 -U 1 1 50813E0D -P 3700 3400 -F 0 "#PWR02" H 3700 3400 30 0001 C CNN -F 1 "GND" H 3700 3330 30 0001 C CNN - 1 3700 3400 - 1 0 0 -1 -$EndComp -$Comp -L VCVS Ein1 -U 1 1 50813D7C -P 3650 2850 -F 0 "Ein1" H 3450 2950 50 0000 C CNN -F 1 "100e3" H 3450 2800 50 0000 C CNN - 1 3650 2850 - 0 1 1 0 -$EndComp -$Comp -L R Rin1 -U 1 1 50813C57 -P 3000 2850 -F 0 "Rin1" V 3080 2850 50 0000 C CNN -F 1 "2e6" V 3000 2850 50 0000 C CNN - 1 3000 2850 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/Examples/NGHDL_Examples/custom_mixed_mode/ua741.sub b/Examples/NGHDL_Examples/custom_mixed_mode/ua741.sub deleted file mode 100644 index ad26c001..00000000 --- a/Examples/NGHDL_Examples/custom_mixed_mode/ua741.sub +++ /dev/null @@ -1,12 +0,0 @@ -* Subcircuit ua741 -.subckt ua741 6 7 3 -* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist -rout1 3 2 75 -eout1 2 0 1 0 1 -cbw1 1 0 31.85e-9 -rbw1 1 4 0.5e6 -ein1 4 0 7 6 100e3 -rin1 7 6 2e6 -* Control Statements - -.ends ua741
\ No newline at end of file |