diff options
Diffstat (limited to 'Examples/JK_Flipflop')
-rw-r--r-- | Examples/JK_Flipflop/JK_Flipflop-cache.lib | 155 | ||||
-rw-r--r-- | Examples/JK_Flipflop/JK_Flipflop.bak | 396 | ||||
-rw-r--r-- | Examples/JK_Flipflop/JK_Flipflop.cir | 27 | ||||
-rw-r--r-- | Examples/JK_Flipflop/JK_Flipflop.cir.out | 48 | ||||
-rw-r--r-- | Examples/JK_Flipflop/JK_Flipflop.pro | 71 | ||||
-rw-r--r-- | Examples/JK_Flipflop/JK_Flipflop.proj | 1 | ||||
-rw-r--r-- | Examples/JK_Flipflop/JK_Flipflop.sch | 396 | ||||
-rw-r--r-- | Examples/JK_Flipflop/JK_Flipflop_Previous_Values.xml | 1 | ||||
-rw-r--r-- | Examples/JK_Flipflop/analysis | 1 | ||||
-rw-r--r-- | Examples/JK_Flipflop/plot_data_i.txt | 575 | ||||
-rw-r--r-- | Examples/JK_Flipflop/plot_data_v.txt | 575 |
11 files changed, 2246 insertions, 0 deletions
diff --git a/Examples/JK_Flipflop/JK_Flipflop-cache.lib b/Examples/JK_Flipflop/JK_Flipflop-cache.lib new file mode 100644 index 00000000..77ff6600 --- /dev/null +++ b/Examples/JK_Flipflop/JK_Flipflop-cache.lib @@ -0,0 +1,155 @@ +EESchema-LIBRARY Version 2.3 +#encoding utf-8 +# +# DC +# +DEF DC v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "DC" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 50 1 1 P +X - 2 0 -450 300 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +# GND +# +DEF GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 -250 50 H I C CNN +F1 "GND" 0 -150 50 H V C CNN +F2 "" 0 0 50 H V C CNN +F3 "" 0 0 50 H V C CNN +DRAW +P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N +X GND 1 0 0 0 D 50 50 1 1 W N +ENDDRAW +ENDDEF +# +# R +# +DEF R R 0 0 N Y 1 F N +F0 "R" 50 130 50 H V C CNN +F1 "R" 50 50 50 H V C CNN +F2 "" 50 -20 30 H V C CNN +F3 "" 50 50 30 V V C CNN +$FPLIST + R_* + Resistor_* +$ENDFPLIST +DRAW +S 150 10 -50 90 0 1 10 N +X ~ 1 -100 50 50 R 60 60 1 1 P +X ~ 2 200 50 50 L 60 60 1 1 P +ENDDRAW +ENDDEF +# +# adc_bridge_1 +# +DEF adc_bridge_1 U 0 40 Y Y 1 F N +F0 "U" 0 0 60 H V C CNN +F1 "adc_bridge_1" 0 150 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +S -400 200 350 -50 0 1 0 N +X IN1 1 -600 50 200 R 50 50 1 1 I +X OUT1 2 550 50 200 L 50 50 1 1 O +ENDDRAW +ENDDEF +# +# adc_bridge_3 +# +DEF adc_bridge_3 U 0 40 Y Y 1 F N +F0 "U" 0 0 60 H V C CNN +F1 "adc_bridge_3" 0 150 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +S -400 200 350 -200 0 1 0 N +X IN1 1 -600 50 200 R 50 50 1 1 I +X IN2 2 -600 -50 200 R 50 50 1 1 I +X IN3 3 -600 -150 200 R 50 50 1 1 I +X OUT1 4 550 50 200 L 50 50 1 1 O +X OUT2 5 550 -50 200 L 50 50 1 1 O +X OUT3 6 550 -150 200 L 50 50 1 1 O +ENDDRAW +ENDDEF +# +# d_jkff +# +DEF d_jkff U 0 40 Y Y 1 F N +F0 "U" 0 0 60 H V C CNN +F1 "d_jkff" 50 150 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +S 600 550 -600 -600 0 1 0 N +X J 1 -800 400 200 R 50 50 1 1 I +X K 2 -800 -450 200 R 50 50 1 1 I +X Clk 3 -800 0 200 R 50 50 1 1 I C +X Set 4 0 750 200 D 50 50 1 1 I +X Reset 5 0 -800 200 U 50 50 1 1 I +X Out 6 800 400 200 L 50 50 1 1 O +X Nout 7 800 -450 200 L 50 50 1 1 O I +ENDDRAW +ENDDEF +# +# dac_bridge_2 +# +DEF dac_bridge_2 U 0 40 Y Y 1 F N +F0 "U" 0 0 60 H V C CNN +F1 "dac_bridge_2" 50 150 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +S -250 200 350 -100 0 1 0 N +X IN1 1 -450 50 200 R 50 50 1 1 I +X IN2 2 -450 -50 200 R 50 50 1 1 I +X OUT1 3 550 50 200 L 50 50 1 1 O +X OUT4 4 550 -50 200 L 50 50 1 1 O +ENDDRAW +ENDDEF +# +# plot_v1 +# +DEF plot_v1 U 0 40 Y Y 1 F N +F0 "U" 0 500 60 H V C CNN +F1 "plot_v1" 200 350 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +C 0 500 100 0 1 0 N +X ~ ~ 0 200 200 U 50 50 1 1 I +ENDDRAW +ENDDEF +# +# pulse +# +DEF pulse v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "pulse" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +A -25 -450 501 928 871 0 1 0 N -50 50 0 50 +A 25 400 451 -931 -868 0 1 0 N 0 -50 50 -50 +A 75 600 551 -926 -873 0 1 0 N 50 50 100 50 +A 350 0 403 -1728 1728 0 1 0 N -50 -50 -50 50 +A 450 0 453 1736 -1736 0 1 0 N 0 50 0 -50 +A 600 0 552 -1748 1748 0 1 0 N 50 -50 50 50 +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 50 1 1 P +X - 2 0 -450 300 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +#End Library diff --git a/Examples/JK_Flipflop/JK_Flipflop.bak b/Examples/JK_Flipflop/JK_Flipflop.bak new file mode 100644 index 00000000..e3fbc76c --- /dev/null +++ b/Examples/JK_Flipflop/JK_Flipflop.bak @@ -0,0 +1,396 @@ +EESchema Schematic File Version 2 +LIBS:eSim_Analog +LIBS:eSim_Devices +LIBS:eSim_Digital +LIBS:eSim_Hybrid +LIBS:eSim_Miscellaneous +LIBS:eSim_Power +LIBS:eSim_Sources +LIBS:eSim_Subckt +LIBS:eSim_User +LIBS:eSim_Plot +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +EELAYER 25 0 +EELAYER END +$Descr A4 11693 8268 +encoding utf-8 +Sheet 1 1 +Title "" +Date "" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +$Comp +L DC v1 +U 1 1 56D58CB2 +P 1300 3550 +F 0 "v1" H 1100 3650 60 0000 C CNN +F 1 "DC" H 1100 3500 60 0000 C CNN +F 2 "R1" H 1000 3550 60 0000 C CNN +F 3 "" H 1300 3550 60 0000 C CNN + 1 1300 3550 + 1 0 0 -1 +$EndComp +$Comp +L DC v3 +U 1 1 56D58D84 +P 2700 4350 +F 0 "v3" H 2500 4450 60 0000 C CNN +F 1 "DC" H 2500 4300 60 0000 C CNN +F 2 "R1" H 2400 4350 60 0000 C CNN +F 3 "" H 2700 4350 60 0000 C CNN + 1 2700 4350 + 1 0 0 -1 +$EndComp +$Comp +L R R1 +U 1 1 56D58F73 +P 8200 3200 +F 0 "R1" H 8250 3330 50 0000 C CNN +F 1 "1k" H 8250 3250 50 0000 C CNN +F 2 "" H 8250 3180 30 0000 C CNN +F 3 "" V 8250 3250 30 0000 C CNN + 1 8200 3200 + 1 0 0 -1 +$EndComp +$Comp +L R R2 +U 1 1 56D58FBB +P 8200 4000 +F 0 "R2" H 8250 4130 50 0000 C CNN +F 1 "1k" H 8250 4050 50 0000 C CNN +F 2 "" H 8250 3980 30 0000 C CNN +F 3 "" V 8250 4050 30 0000 C CNN + 1 8200 4000 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR01 +U 1 1 56D59061 +P 8400 3150 +F 0 "#PWR01" H 8400 2900 50 0001 C CNN +F 1 "GND" H 8400 3000 50 0000 C CNN +F 2 "" H 8400 3150 50 0000 C CNN +F 3 "" H 8400 3150 50 0000 C CNN + 1 8400 3150 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR02 +U 1 1 56D590A3 +P 8400 3950 +F 0 "#PWR02" H 8400 3700 50 0001 C CNN +F 1 "GND" H 8400 3800 50 0000 C CNN +F 2 "" H 8400 3950 50 0000 C CNN +F 3 "" H 8400 3950 50 0000 C CNN + 1 8400 3950 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR03 +U 1 1 56D590F0 +P 2700 4800 +F 0 "#PWR03" H 2700 4550 50 0001 C CNN +F 1 "GND" H 2700 4650 50 0000 C CNN +F 2 "" H 2700 4800 50 0000 C CNN +F 3 "" H 2700 4800 50 0000 C CNN + 1 2700 4800 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR04 +U 1 1 56D59137 +P 1950 4450 +F 0 "#PWR04" H 1950 4200 50 0001 C CNN +F 1 "GND" H 1950 4300 50 0000 C CNN +F 2 "" H 1950 4450 50 0000 C CNN +F 3 "" H 1950 4450 50 0000 C CNN + 1 1950 4450 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR05 +U 1 1 56D59154 +P 1300 4000 +F 0 "#PWR05" H 1300 3750 50 0001 C CNN +F 1 "GND" H 1300 3850 50 0000 C CNN +F 2 "" H 1300 4000 50 0000 C CNN +F 3 "" H 1300 4000 50 0000 C CNN + 1 1300 4000 + 1 0 0 -1 +$EndComp +Wire Wire Line + 1300 3100 3300 3100 +Wire Wire Line + 2700 3900 3300 3900 +$Comp +L plot_v1 U2 +U 1 1 56D59201 +P 2800 3250 +F 0 "U2" H 2800 3750 60 0000 C CNN +F 1 "plot_v1" H 3000 3600 60 0000 C CNN +F 2 "" H 2800 3250 60 0000 C CNN +F 3 "" H 2800 3250 60 0000 C CNN + 1 2800 3250 + 1 0 0 -1 +$EndComp +$Comp +L plot_v1 U1 +U 1 1 56D59261 +P 2700 3700 +F 0 "U1" H 2700 4200 60 0000 C CNN +F 1 "plot_v1" H 2900 4050 60 0000 C CNN +F 2 "" H 2700 3700 60 0000 C CNN +F 3 "" H 2700 3700 60 0000 C CNN + 1 2700 3700 + 1 0 0 -1 +$EndComp +$Comp +L plot_v1 U3 +U 1 1 56D592AF +P 3050 4100 +F 0 "U3" H 3050 4600 60 0000 C CNN +F 1 "plot_v1" H 3250 4450 60 0000 C CNN +F 2 "" H 3050 4100 60 0000 C CNN +F 3 "" H 3050 4100 60 0000 C CNN + 1 3050 4100 + 1 0 0 -1 +$EndComp +Wire Wire Line + 2800 3050 2800 3100 +Connection ~ 2800 3100 +Connection ~ 2700 3500 +Connection ~ 3050 3900 +Wire Wire Line + 7850 3150 8100 3150 +Wire Wire Line + 7850 3950 8100 3950 +$Comp +L plot_v1 U4 +U 1 1 56D59437 +P 7900 3300 +F 0 "U4" H 7900 3800 60 0000 C CNN +F 1 "plot_v1" H 8100 3650 60 0000 C CNN +F 2 "" H 7900 3300 60 0000 C CNN +F 3 "" H 7900 3300 60 0000 C CNN + 1 7900 3300 + 1 0 0 -1 +$EndComp +$Comp +L plot_v1 U5 +U 1 1 56D59491 +P 7950 4100 +F 0 "U5" H 7950 4600 60 0000 C CNN +F 1 "plot_v1" H 8150 4450 60 0000 C CNN +F 2 "" H 7950 4100 60 0000 C CNN +F 3 "" H 7950 4100 60 0000 C CNN + 1 7950 4100 + 1 0 0 -1 +$EndComp +Wire Wire Line + 7950 3900 7950 3950 +Connection ~ 7950 3950 +Text GLabel 1900 3050 1 60 Input ~ 0 +J +Text GLabel 2150 3450 1 60 Input ~ 0 +Clk +Text GLabel 2850 3850 1 60 Input ~ 0 +K +Text GLabel 8050 3200 3 60 Input ~ 0 +out +Text GLabel 8050 4050 3 60 Input ~ 0 +nout +Wire Wire Line + 8050 3200 8050 3150 +Connection ~ 8050 3150 +Wire Wire Line + 8050 4050 8050 3950 +Connection ~ 8050 3950 +Wire Wire Line + 2850 3850 2850 3900 +Connection ~ 2850 3900 +Wire Wire Line + 2150 3450 2150 3500 +Connection ~ 2150 3500 +Wire Wire Line + 1900 3050 1900 3100 +Connection ~ 1900 3100 +$Comp +L adc_bridge_3 U6 +U 1 1 56D59BD2 +P 3900 3450 +F 0 "U6" H 3900 3450 60 0000 C CNN +F 1 "adc_bridge_3" H 3900 3600 60 0000 C CNN +F 2 "" H 3900 3450 60 0000 C CNN +F 3 "" H 3900 3450 60 0000 C CNN + 1 3900 3450 + 1 0 0 -1 +$EndComp +$Comp +L dac_bridge_2 U7 +U 1 1 56D5AD2F +P 7150 3450 +F 0 "U7" H 7150 3450 60 0000 C CNN +F 1 "dac_bridge_2" H 7200 3600 60 0000 C CNN +F 2 "" H 7150 3450 60 0000 C CNN +F 3 "" H 7150 3450 60 0000 C CNN + 1 7150 3450 + 1 0 0 -1 +$EndComp +Wire Wire Line + 6700 3100 6700 3400 +Wire Wire Line + 6700 3500 6700 3950 +Wire Wire Line + 7700 3400 7850 3400 +Wire Wire Line + 7850 3400 7850 3150 +Wire Wire Line + 7900 3100 7900 3150 +Connection ~ 7900 3150 +Wire Wire Line + 7700 3500 7850 3500 +Wire Wire Line + 7850 3500 7850 3950 +Wire Wire Line + 3300 3900 3300 3600 +Wire Wire Line + 3300 3100 3300 3400 +Wire Wire Line + 4450 3500 4950 3500 +Wire Wire Line + 4450 3400 4450 3100 +Wire Wire Line + 4450 3100 4950 3100 +Wire Wire Line + 4450 3600 4450 3950 +Wire Wire Line + 1950 3500 3300 3500 +Wire Wire Line + 1950 4400 1950 4450 +$Comp +L d_jkff U9 +U 1 1 56D590B4 +P 5750 3500 +F 0 "U9" H 5750 3500 60 0000 C CNN +F 1 "d_jkff" H 5800 3650 60 0000 C CNN +F 2 "" H 5750 3500 60 0000 C CNN +F 3 "" H 5750 3500 60 0000 C CNN + 1 5750 3500 + 1 0 0 -1 +$EndComp +Wire Wire Line + 4450 3950 4950 3950 +Wire Wire Line + 6550 3100 6700 3100 +Wire Wire Line + 6700 3950 6550 3950 +$Comp +L adc_bridge_1 U8 +U 1 1 56D5939D +P 5700 2200 +F 0 "U8" H 5700 2200 60 0000 C CNN +F 1 "adc_bridge_1" H 5700 2350 60 0000 C CNN +F 2 "" H 5700 2200 60 0000 C CNN +F 3 "" H 5700 2200 60 0000 C CNN + 1 5700 2200 + 0 1 1 0 +$EndComp +$Comp +L adc_bridge_1 U10 +U 1 1 56D5960E +P 5800 4850 +F 0 "U10" H 5800 4850 60 0000 C CNN +F 1 "adc_bridge_1" H 5800 5000 60 0000 C CNN +F 2 "" H 5800 4850 60 0000 C CNN +F 3 "" H 5800 4850 60 0000 C CNN + 1 5800 4850 + 0 -1 -1 0 +$EndComp +$Comp +L DC v4 +U 1 1 56D5977A +P 6200 1600 +F 0 "v4" H 6000 1700 60 0000 C CNN +F 1 "0" H 6000 1550 60 0000 C CNN +F 2 "R1" H 5900 1600 60 0000 C CNN +F 3 "" H 6200 1600 60 0000 C CNN + 1 6200 1600 + 0 -1 -1 0 +$EndComp +$Comp +L DC v5 +U 1 1 56D59898 +P 6200 5450 +F 0 "v5" H 6000 5550 60 0000 C CNN +F 1 "0" H 6000 5400 60 0000 C CNN +F 2 "R1" H 5900 5450 60 0000 C CNN +F 3 "" H 6200 5450 60 0000 C CNN + 1 6200 5450 + 0 -1 -1 0 +$EndComp +$Comp +L GND #PWR06 +U 1 1 56D59B33 +P 6650 1600 +F 0 "#PWR06" H 6650 1350 50 0001 C CNN +F 1 "GND" H 6650 1450 50 0000 C CNN +F 2 "" H 6650 1600 50 0000 C CNN +F 3 "" H 6650 1600 50 0000 C CNN + 1 6650 1600 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR07 +U 1 1 56D59BCD +P 6650 5450 +F 0 "#PWR07" H 6650 5200 50 0001 C CNN +F 1 "GND" H 6650 5300 50 0000 C CNN +F 2 "" H 6650 5450 50 0000 C CNN +F 3 "" H 6650 5450 50 0000 C CNN + 1 6650 5450 + 1 0 0 -1 +$EndComp +$Comp +L pulse v2 +U 1 1 56D59D94 +P 1950 3950 +F 0 "v2" H 1750 4050 60 0000 C CNN +F 1 "pulse" H 1750 3900 60 0000 C CNN +F 2 "R1" H 1650 3950 60 0000 C CNN +F 3 "" H 1950 3950 60 0000 C CNN + 1 1950 3950 + 1 0 0 -1 +$EndComp +$EndSCHEMATC diff --git a/Examples/JK_Flipflop/JK_Flipflop.cir b/Examples/JK_Flipflop/JK_Flipflop.cir new file mode 100644 index 00000000..444fae4c --- /dev/null +++ b/Examples/JK_Flipflop/JK_Flipflop.cir @@ -0,0 +1,27 @@ +* /home/fossee/eSim-Workspace/JK_Flipflop/JK_Flipflop.cir + +* EESchema Netlist Version 1.1 (Spice format) creation date: Tue Mar 1 18:23:23 2016 + +* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N +* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +* Sheet Name: / +v1 J GND DC +v3 K GND DC +R1 out GND 1k +R2 nout GND 1k +U2 J plot_v1 +U1 Clk plot_v1 +U3 K plot_v1 +U4 out plot_v1 +U5 nout plot_v1 +U6 J Clk K Net-_U6-Pad4_ Net-_U6-Pad5_ Net-_U6-Pad6_ adc_bridge_3 +U7 Net-_U7-Pad1_ Net-_U7-Pad2_ out nout dac_bridge_2 +U9 Net-_U6-Pad4_ Net-_U6-Pad6_ Net-_U6-Pad5_ Net-_U8-Pad2_ Net-_U10-Pad2_ Net-_U7-Pad1_ Net-_U7-Pad2_ d_jkff +U8 Net-_U8-Pad1_ Net-_U8-Pad2_ adc_bridge_1 +U10 Net-_U10-Pad1_ Net-_U10-Pad2_ adc_bridge_1 +v4 Net-_U8-Pad1_ GND 0 +v5 Net-_U10-Pad1_ GND 0 +v2 Clk GND pulse + +.end diff --git a/Examples/JK_Flipflop/JK_Flipflop.cir.out b/Examples/JK_Flipflop/JK_Flipflop.cir.out new file mode 100644 index 00000000..7ad6aab4 --- /dev/null +++ b/Examples/JK_Flipflop/JK_Flipflop.cir.out @@ -0,0 +1,48 @@ +* /home/fossee/esim-workspace/jk_flipflop/jk_flipflop.cir + +v1 j gnd dc 5 +v3 k gnd dc 0 +r1 out gnd 1k +r2 nout gnd 1k +* u2 j plot_v1 +* u1 clk plot_v1 +* u3 k plot_v1 +* u4 out plot_v1 +* u5 nout plot_v1 +* u6 j clk k net-_u6-pad4_ net-_u6-pad5_ net-_u6-pad6_ adc_bridge_3 +* u7 net-_u7-pad1_ net-_u7-pad2_ out nout dac_bridge_2 +* u9 net-_u6-pad4_ net-_u6-pad6_ net-_u6-pad5_ net-_u8-pad2_ net-_u10-pad2_ net-_u7-pad1_ net-_u7-pad2_ d_jkff +* u8 net-_u8-pad1_ net-_u8-pad2_ adc_bridge_1 +* u10 net-_u10-pad1_ net-_u10-pad2_ adc_bridge_1 +v4 net-_u8-pad1_ gnd 0 +v5 net-_u10-pad1_ gnd 0 +v2 clk gnd pulse(0 5 1m 1m 1m 20 40) +a1 [j clk k ] [net-_u6-pad4_ net-_u6-pad5_ net-_u6-pad6_ ] u6 +a2 [net-_u7-pad1_ net-_u7-pad2_ ] [out nout ] u7 +a3 net-_u6-pad4_ net-_u6-pad6_ net-_u6-pad5_ net-_u8-pad2_ net-_u10-pad2_ net-_u7-pad1_ net-_u7-pad2_ u9 +a4 [net-_u8-pad1_ ] [net-_u8-pad2_ ] u8 +a5 [net-_u10-pad1_ ] [net-_u10-pad2_ ] u10 +* Schematic Name: adc_bridge_3, NgSpice Name: adc_bridge +.model u6 adc_bridge(fall_delay=1.0e-9 in_high=2.0 rise_delay=1.0e-9 in_low=1.0 ) +* Schematic Name: dac_bridge_2, NgSpice Name: dac_bridge +.model u7 dac_bridge(out_undef=0.5 out_low=0.0 out_high=5.0 t_rise=1.0e-9 t_fall=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_jkff, NgSpice Name: d_jkff +.model u9 d_jkff(ic=0 set_delay=1.0e-9 set_load=1.0e-12 reset_load=1.0e-12 clk_delay=1.0e-9 clk_load=1.0e-12 reset_delay=1.0 rise_delay=1.0e-9 jk_load=1.0e-12 fall_delay=1.0e-9 ) +* Schematic Name: adc_bridge_1, NgSpice Name: adc_bridge +.model u8 adc_bridge(fall_delay=1.0e-9 in_high=2.0 rise_delay=1.0e-9 in_low=1.0 ) +* Schematic Name: adc_bridge_1, NgSpice Name: adc_bridge +.model u10 adc_bridge(fall_delay=1.0e-9 in_high=2.0 rise_delay=1.0e-9 in_low=1.0 ) +.tran 10e-00 100e-00 0e-00 + +* Control Statements +.control +run +print allv > plot_data_v.txt +print alli > plot_data_i.txt +plot v(j) +plot v(clk) +plot v(k) +plot v(out) +plot v(nout) +.endc +.end diff --git a/Examples/JK_Flipflop/JK_Flipflop.pro b/Examples/JK_Flipflop/JK_Flipflop.pro new file mode 100644 index 00000000..afdcf2d3 --- /dev/null +++ b/Examples/JK_Flipflop/JK_Flipflop.pro @@ -0,0 +1,71 @@ +update=22/05/2015 07:44:53 +version=1 +last_client=kicad +[general] +version=1 +RootSch= +BoardNm= +[pcbnew] +version=1 +LastNetListRead= +UseCmpFile=1 +PadDrill=0.600000000000 +PadDrillOvalY=0.600000000000 +PadSizeH=1.500000000000 +PadSizeV=1.500000000000 +PcbTextSizeV=1.500000000000 +PcbTextSizeH=1.500000000000 +PcbTextThickness=0.300000000000 +ModuleTextSizeV=1.000000000000 +ModuleTextSizeH=1.000000000000 +ModuleTextSizeThickness=0.150000000000 +SolderMaskClearance=0.000000000000 +SolderMaskMinWidth=0.000000000000 +DrawSegmentWidth=0.200000000000 +BoardOutlineThickness=0.100000000000 +ModuleOutlineThickness=0.150000000000 +[cvpcb] +version=1 +NetIExt=net +[eeschema] +version=1 +LibDir= +[eeschema/libraries] +LibName1=eSim_Analog +LibName2=eSim_Devices +LibName3=eSim_Digital +LibName4=eSim_Hybrid +LibName5=eSim_Miscellaneous +LibName6=eSim_Power +LibName7=eSim_Sources +LibName8=eSim_Subckt +LibName9=eSim_User +LibName10=eSim_Plot +LibName11=adc-dac +LibName12=memory +LibName13=xilinx +LibName14=microcontrollers +LibName15=dsp +LibName16=microchip +LibName17=analog_switches +LibName18=motorola +LibName19=texas +LibName20=intel +LibName21=audio +LibName22=interface +LibName23=digital-audio +LibName24=philips +LibName25=display +LibName26=cypress +LibName27=siliconi +LibName28=opto +LibName29=atmel +LibName30=contrib +LibName31=power +LibName32=device +LibName33=transistors +LibName34=conn +LibName35=linear +LibName36=regul +LibName37=74xx +LibName38=cmos4000 diff --git a/Examples/JK_Flipflop/JK_Flipflop.proj b/Examples/JK_Flipflop/JK_Flipflop.proj new file mode 100644 index 00000000..ddd19cfb --- /dev/null +++ b/Examples/JK_Flipflop/JK_Flipflop.proj @@ -0,0 +1 @@ +schematicFile JK_Flipflop.sch diff --git a/Examples/JK_Flipflop/JK_Flipflop.sch b/Examples/JK_Flipflop/JK_Flipflop.sch new file mode 100644 index 00000000..bfa476cf --- /dev/null +++ b/Examples/JK_Flipflop/JK_Flipflop.sch @@ -0,0 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CNN +F 3 "" H 5000 3450 60 0000 C CNN + 1 5000 3450 + 1 0 0 -1 +$EndComp +$Comp +L dac_bridge_2 U7 +U 1 1 56D5AD2F +P 8250 3450 +F 0 "U7" H 8250 3450 60 0000 C CNN +F 1 "dac_bridge_2" H 8300 3600 60 0000 C CNN +F 2 "" H 8250 3450 60 0000 C CNN +F 3 "" H 8250 3450 60 0000 C CNN + 1 8250 3450 + 1 0 0 -1 +$EndComp +Wire Wire Line + 7800 3100 7800 3400 +Wire Wire Line + 7800 3500 7800 3950 +Wire Wire Line + 8800 3400 8950 3400 +Wire Wire Line + 8950 3400 8950 3150 +Wire Wire Line + 9000 3100 9000 3150 +Connection ~ 9000 3150 +Wire Wire Line + 8800 3500 8950 3500 +Wire Wire Line + 8950 3500 8950 3950 +Wire Wire Line + 4400 3900 4400 3600 +Wire Wire Line + 4400 3100 4400 3400 +Wire Wire Line + 5550 3500 6050 3500 +Wire Wire Line + 5550 3400 5550 3100 +Wire Wire Line + 5550 3100 6050 3100 +Wire Wire Line + 5550 3600 5550 3950 +Wire Wire Line + 3050 3500 4400 3500 +Wire Wire Line + 3050 4400 3050 4450 +$Comp +L d_jkff U9 +U 1 1 56D590B4 +P 6850 3500 +F 0 "U9" H 6850 3500 60 0000 C CNN +F 1 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+F 0 "v5" H 7100 5550 60 0000 C CNN +F 1 "0" H 7100 5400 60 0000 C CNN +F 2 "R1" H 7000 5450 60 0000 C CNN +F 3 "" H 7300 5450 60 0000 C CNN + 1 7300 5450 + 0 -1 -1 0 +$EndComp +$Comp +L GND #PWR06 +U 1 1 56D59B33 +P 7750 1600 +F 0 "#PWR06" H 7750 1350 50 0001 C CNN +F 1 "GND" H 7750 1450 50 0000 C CNN +F 2 "" H 7750 1600 50 0000 C CNN +F 3 "" H 7750 1600 50 0000 C CNN + 1 7750 1600 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR07 +U 1 1 56D59BCD +P 7750 5450 +F 0 "#PWR07" H 7750 5200 50 0001 C CNN +F 1 "GND" H 7750 5300 50 0000 C CNN +F 2 "" H 7750 5450 50 0000 C CNN +F 3 "" H 7750 5450 50 0000 C CNN + 1 7750 5450 + 1 0 0 -1 +$EndComp +$Comp +L pulse v2 +U 1 1 56D59D94 +P 3050 3950 +F 0 "v2" H 2850 4050 60 0000 C CNN +F 1 "pulse" H 2850 3900 60 0000 C CNN +F 2 "R1" H 2750 3950 60 0000 C CNN +F 3 "" H 3050 3950 60 0000 C CNN + 1 3050 3950 + 1 0 0 -1 +$EndComp +$EndSCHEMATC diff --git a/Examples/JK_Flipflop/JK_Flipflop_Previous_Values.xml b/Examples/JK_Flipflop/JK_Flipflop_Previous_Values.xml new file mode 100644 index 00000000..120edcac --- /dev/null +++ b/Examples/JK_Flipflop/JK_Flipflop_Previous_Values.xml @@ -0,0 +1 @@ +<KicadtoNgspice><analysis><ac><field1 name="Lin">true</field1><field2 name="Dec">false</field2><field3 name="Oct">false</field3><field4 name="Start Frequency" /><field5 name="Stop Frequency" /><field6 name="No. of points" /><field7 name="Start Fre Combo">Hz</field7><field8 name="Stop Fre Combo">Hz</field8></ac><dc><field1 name="Source 1" /><field2 name="Start" /><field3 name="Increment" /><field4 name="Stop" /><field5 name="Operating Point">0</field5><field6 name="Start Combo">Volts or Amperes</field6><field7 name="Increment Combo">Volts or Amperes</field7><field8 name="Stop Combo">Volts or Amperes</field8><field9 name="Source 2" /><field10 name="Start" /><field11 name="Increment" /><field12 name="Stop" /><field13 name="Start Combo">Volts or Amperes</field13><field14 name="Increment Combo">Volts or Amperes</field14><field15 name="Stop Combo">Volts or Amperes</field15></dc><tran><field1 name="Start Time">0</field1><field2 name="Step Time">10</field2><field3 name="Stop Time">100</field3><field4 name="Start Combo">Sec</field4><field5 name="Step Combo">Sec</field5><field6 name="Stop Combo">Sec</field6></tran></analysis><source><v1 name="Source type">dc<field1 name="Value">5</field1></v1><v3 name="Source type">dc<field1 name="Value">0</field1></v3><v4 name="Source type">0</v4><v5 name="Source type">0</v5><v2 name="Source type">pulse<field1 name="Initial Value">0</field1><field2 name="Pulse Value">5</field2><field3 name="Delay Time">1m</field3><field4 name="Rise Time">1m</field4><field5 name="Fall Time">1m</field5><field5 name="Pulse width">20</field5><field5 name="Period">40</field5></v2></source><model><u6 name="type">adc_bridge<field1 name="Enter Fall Delay (default=1.0e-9)" /><field2 name="Enter value for in_high (default=2.0)" /><field3 name="Enter Rise Delay (default=1.0e-9)" /><field4 name="Enter value for in_low (default=1.0)" /></u6><u7 name="type">dac_bridge<field5 name="Enter value for input load (default=1.0e-12)" /><field6 name="Enter value for out_low (default=0.0)" /><field7 name="Enter value for out_high (default=5.0)" /><field8 name="Enter the Rise Time (default=1.0e-9)" /><field9 name="Enter the Fall Time (default=1.0e-9)" /><field10 name="Enter value for out_undef (default=0.5)" /></u7><u9 name="type">d_jkff<field11 name="Enter IC (default=0)" /><field12 name="Enter Fall Delay (default=1.0e-9)" /><field13 name="Enter Set Delay (default=1.0e-9)" /><field14 name="Enter value for Set Load (default=1.0e-12)" /><field15 name="Enter Clk Delay (default=1.0e-9)" /><field16 name="Enter value for Clk Load (default=1.0e-12)" /><field17 name="Enter Reset Delay (default=1.0)" /><field18 name="Enter Rise Delay (default=1.0e-9)" /><field19 name="Enter value for JK Load (default=1.0e-12)" /><field20 name="Enter value for Reset Load (default=1.0e-12)" /></u9><u8 name="type">adc_bridge<field21 name="Enter Fall Delay (default=1.0e-9)" /><field22 name="Enter value for in_high (default=2.0)" /><field23 name="Enter Rise Delay (default=1.0e-9)" /><field24 name="Enter value for in_low (default=1.0)" /></u8><u10 name="type">adc_bridge<field25 name="Enter Fall Delay (default=1.0e-9)" /><field26 name="Enter value for in_high (default=2.0)" /><field27 name="Enter Rise Delay (default=1.0e-9)" /><field28 name="Enter value for in_low (default=1.0)" /></u10></model><devicemodel /><subcircuit /></KicadtoNgspice>
\ No newline at end of file diff --git a/Examples/JK_Flipflop/analysis b/Examples/JK_Flipflop/analysis new file mode 100644 index 00000000..27cb8231 --- /dev/null +++ b/Examples/JK_Flipflop/analysis @@ -0,0 +1 @@ +.tran 10e-00 100e-00 0e-00
\ No newline at end of file diff --git a/Examples/JK_Flipflop/plot_data_i.txt b/Examples/JK_Flipflop/plot_data_i.txt new file mode 100644 index 00000000..3198f6a5 --- /dev/null +++ b/Examples/JK_Flipflop/plot_data_i.txt @@ -0,0 +1,575 @@ + * /home/fossee/esim-workspace/jk_flipflop/jk_flipflop.cir + Transient Analysis Thu Mar 3 22:37:38 2016 +-------------------------------------------------------------------------------- +Index time a2#branch_1_0 a2#branch_1_1 v1#branch +-------------------------------------------------------------------------------- +0 0.000000e+00 0.000000e+00 -5.00000e-03 0.000000e+00 +1 1.000000e-05 0.000000e+00 -5.00000e-03 0.000000e+00 +2 2.000000e-05 0.000000e+00 -5.00000e-03 0.000000e+00 +3 4.000000e-05 0.000000e+00 -5.00000e-03 0.000000e+00 +4 8.000000e-05 0.000000e+00 -5.00000e-03 0.000000e+00 +5 1.600000e-04 0.000000e+00 -5.00000e-03 0.000000e+00 +6 3.200000e-04 0.000000e+00 -5.00000e-03 0.000000e+00 +7 6.400000e-04 0.000000e+00 -5.00000e-03 0.000000e+00 +8 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0.000000e+00 +26 1.448086e-03 -5.00000e-03 0.000000e+00 0.000000e+00 +27 1.448168e-03 -5.00000e-03 0.000000e+00 0.000000e+00 +28 1.448332e-03 -5.00000e-03 0.000000e+00 0.000000e+00 +29 1.448659e-03 -5.00000e-03 0.000000e+00 0.000000e+00 +30 1.449315e-03 -5.00000e-03 0.000000e+00 0.000000e+00 +31 1.450625e-03 -5.00000e-03 0.000000e+00 0.000000e+00 +32 1.453247e-03 -5.00000e-03 0.000000e+00 0.000000e+00 +33 1.458490e-03 -5.00000e-03 0.000000e+00 0.000000e+00 +34 1.468975e-03 -5.00000e-03 0.000000e+00 0.000000e+00 +35 1.489947e-03 -5.00000e-03 0.000000e+00 0.000000e+00 +36 1.531890e-03 -5.00000e-03 0.000000e+00 0.000000e+00 +37 1.615776e-03 -5.00000e-03 0.000000e+00 0.000000e+00 +38 1.783548e-03 -5.00000e-03 0.000000e+00 0.000000e+00 +39 2.000000e-03 -5.00000e-03 0.000000e+00 0.000000e+00 +40 2.033554e-03 -5.00000e-03 0.000000e+00 0.000000e+00 +41 2.100663e-03 -5.00000e-03 0.000000e+00 0.000000e+00 +42 2.234881e-03 -5.00000e-03 0.000000e+00 0.000000e+00 +43 2.503316e-03 -5.00000e-03 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/home/fossee/esim-workspace/jk_flipflop/jk_flipflop.cir + Transient Analysis Thu Mar 3 22:37:38 2016 +-------------------------------------------------------------------------------- +Index time v2#branch v3#branch v4#branch +-------------------------------------------------------------------------------- +0 0.000000e+00 0.000000e+00 0.000000e+00 0.000000e+00 +1 1.000000e-05 0.000000e+00 0.000000e+00 0.000000e+00 +2 2.000000e-05 0.000000e+00 0.000000e+00 0.000000e+00 +3 4.000000e-05 0.000000e+00 0.000000e+00 0.000000e+00 +4 8.000000e-05 0.000000e+00 0.000000e+00 0.000000e+00 +5 1.600000e-04 0.000000e+00 0.000000e+00 0.000000e+00 +6 3.200000e-04 0.000000e+00 0.000000e+00 0.000000e+00 +7 6.400000e-04 0.000000e+00 0.000000e+00 0.000000e+00 +8 1.000000e-03 0.000000e+00 0.000000e+00 0.000000e+00 +9 1.064000e-03 0.000000e+00 0.000000e+00 0.000000e+00 +10 1.192000e-03 0.000000e+00 0.000000e+00 0.000000e+00 +11 1.448000e-03 0.000000e+00 0.000000e+00 0.000000e+00 +12 1.448003e-03 0.000000e+00 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0.000000e+00 +167 8.262336e+01 5.000000e+00 5.000000e+00 0.000000e+00 +168 8.462336e+01 5.000000e+00 5.000000e+00 0.000000e+00 +169 8.662336e+01 5.000000e+00 5.000000e+00 0.000000e+00 +170 8.862336e+01 5.000000e+00 5.000000e+00 0.000000e+00 + +Index time clk j k +-------------------------------------------------------------------------------- +171 9.062336e+01 5.000000e+00 5.000000e+00 0.000000e+00 +172 9.262336e+01 5.000000e+00 5.000000e+00 0.000000e+00 +173 9.462336e+01 5.000000e+00 5.000000e+00 0.000000e+00 +174 9.662336e+01 5.000000e+00 5.000000e+00 0.000000e+00 +175 9.862336e+01 5.000000e+00 5.000000e+00 0.000000e+00 +176 1.000000e+02 5.000000e+00 5.000000e+00 0.000000e+00 + + * /home/fossee/esim-workspace/jk_flipflop/jk_flipflop.cir + Transient Analysis Thu Mar 3 22:37:38 2016 +-------------------------------------------------------------------------------- +Index time net-_u8-pad1_ net-_u10-pad1_ nout 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0.000000e+00 4.633751e-10 +17 1.448004e-03 0.000000e+00 0.000000e+00 0.000000e+00 +18 1.448004e-03 0.000000e+00 0.000000e+00 0.000000e+00 +19 1.448005e-03 0.000000e+00 0.000000e+00 0.000000e+00 +20 1.448005e-03 0.000000e+00 0.000000e+00 0.000000e+00 +21 1.448006e-03 0.000000e+00 0.000000e+00 0.000000e+00 +22 1.448009e-03 0.000000e+00 0.000000e+00 0.000000e+00 +23 1.448014e-03 0.000000e+00 0.000000e+00 0.000000e+00 +24 1.448024e-03 0.000000e+00 0.000000e+00 0.000000e+00 +25 1.448045e-03 0.000000e+00 0.000000e+00 0.000000e+00 +26 1.448086e-03 0.000000e+00 0.000000e+00 0.000000e+00 +27 1.448168e-03 0.000000e+00 0.000000e+00 0.000000e+00 +28 1.448332e-03 0.000000e+00 0.000000e+00 0.000000e+00 +29 1.448659e-03 0.000000e+00 0.000000e+00 0.000000e+00 +30 1.449315e-03 0.000000e+00 0.000000e+00 0.000000e+00 +31 1.450625e-03 0.000000e+00 0.000000e+00 0.000000e+00 +32 1.453247e-03 0.000000e+00 0.000000e+00 0.000000e+00 +33 1.458490e-03 0.000000e+00 0.000000e+00 0.000000e+00 +34 1.468975e-03 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2.768444e-01 0.000000e+00 0.000000e+00 0.000000e+00 +53 5.517223e-01 0.000000e+00 0.000000e+00 0.000000e+00 +54 1.101478e+00 0.000000e+00 0.000000e+00 0.000000e+00 + +Index time net-_u8-pad1_ net-_u10-pad1_ nout +-------------------------------------------------------------------------------- +55 2.200990e+00 0.000000e+00 0.000000e+00 0.000000e+00 +56 4.200990e+00 0.000000e+00 0.000000e+00 0.000000e+00 +57 6.200990e+00 0.000000e+00 0.000000e+00 0.000000e+00 +58 8.200990e+00 0.000000e+00 0.000000e+00 0.000000e+00 +59 1.020099e+01 0.000000e+00 0.000000e+00 0.000000e+00 +60 1.220099e+01 0.000000e+00 0.000000e+00 0.000000e+00 +61 1.420099e+01 0.000000e+00 0.000000e+00 0.000000e+00 +62 1.620099e+01 0.000000e+00 0.000000e+00 0.000000e+00 +63 1.820099e+01 0.000000e+00 0.000000e+00 0.000000e+00 +64 2.000200e+01 0.000000e+00 0.000000e+00 0.000000e+00 +65 2.000210e+01 0.000000e+00 0.000000e+00 0.000000e+00 +66 2.000230e+01 0.000000e+00 0.000000e+00 0.000000e+00 +67 2.000270e+01 0.000000e+00 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4.001216e+01 0.000000e+00 0.000000e+00 0.000000e+00 +104 4.002240e+01 0.000000e+00 0.000000e+00 0.000000e+00 +105 4.004288e+01 0.000000e+00 0.000000e+00 0.000000e+00 +106 4.008384e+01 0.000000e+00 0.000000e+00 0.000000e+00 +107 4.016576e+01 0.000000e+00 0.000000e+00 0.000000e+00 +108 4.032960e+01 0.000000e+00 0.000000e+00 0.000000e+00 +109 4.065728e+01 0.000000e+00 0.000000e+00 0.000000e+00 +110 4.131264e+01 0.000000e+00 0.000000e+00 0.000000e+00 +111 4.262336e+01 0.000000e+00 0.000000e+00 0.000000e+00 +112 4.462336e+01 0.000000e+00 0.000000e+00 0.000000e+00 + +Index time net-_u8-pad1_ net-_u10-pad1_ nout +-------------------------------------------------------------------------------- +113 4.662336e+01 0.000000e+00 0.000000e+00 0.000000e+00 +114 4.862336e+01 0.000000e+00 0.000000e+00 0.000000e+00 +115 5.062336e+01 0.000000e+00 0.000000e+00 0.000000e+00 +116 5.262336e+01 0.000000e+00 0.000000e+00 0.000000e+00 +117 5.462336e+01 0.000000e+00 0.000000e+00 0.000000e+00 +118 5.662336e+01 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