diff options
Diffstat (limited to 'Examples/Integrator')
26 files changed, 1904 insertions, 0 deletions
diff --git a/Examples/Integrator/.Integrator.cir.out.swp b/Examples/Integrator/.Integrator.cir.out.swp Binary files differnew file mode 100644 index 00000000..f790e276 --- /dev/null +++ b/Examples/Integrator/.Integrator.cir.out.swp diff --git a/Examples/Integrator/D.lib b/Examples/Integrator/D.lib new file mode 100755 index 00000000..ef18bb50 --- /dev/null +++ b/Examples/Integrator/D.lib @@ -0,0 +1,20 @@ +.MODEL D1N750 D( ++ Vj=.75 ++ Nbvl=14.976 ++ Cjo=175p ++ Rs=.25 ++ Isr=1.859n ++ Eg=1.11 ++ M=.5516 ++ Nbv=1.6989 ++ N=1 ++ Tbv1=-21.277u ++ Bv=8.1 ++ Fc=.5 ++ Ikf=0 ++ Nr=2 ++ Ibv=20.245m ++ Is=880.5E-18 ++ Xti=3 ++ Ibvl=1.9556m +)
\ No newline at end of file diff --git a/Examples/Integrator/Integrator-cache.lib b/Examples/Integrator/Integrator-cache.lib new file mode 100644 index 00000000..380f2ca0 --- /dev/null +++ b/Examples/Integrator/Integrator-cache.lib @@ -0,0 +1,107 @@ +EESchema-LIBRARY Version 2.3 +#encoding utf-8 +# +# C +# +DEF C C 0 10 N Y 1 F N +F0 "C" 25 100 50 H V L CNN +F1 "C" 25 -100 50 H V L CNN +F2 "" 38 -150 30 H V C CNN +F3 "" 0 0 60 H V C CNN +$FPLIST + C? + C_????_* + C_???? + SMD*_c + Capacitor* +$ENDFPLIST +DRAW +P 2 0 1 20 -80 -30 80 -30 N +P 2 0 1 20 -80 30 80 30 N +X ~ 1 0 150 110 D 40 40 1 1 P +X ~ 2 0 -150 110 U 40 40 1 1 P +ENDDRAW +ENDDEF +# +# GND +# +DEF GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 -250 50 H I C CNN +F1 "GND" 0 -150 50 H V C CNN +F2 "" 0 0 50 H V C CNN +F3 "" 0 0 50 H V C CNN +DRAW +P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N +X GND 1 0 0 0 D 50 50 1 1 W N +ENDDRAW +ENDDEF +# +# R +# +DEF R R 0 0 N Y 1 F N +F0 "R" 50 130 50 H V C CNN +F1 "R" 50 50 50 H V C CNN +F2 "" 50 -20 30 H V C CNN +F3 "" 50 50 30 V V C CNN +$FPLIST + R_* + Resistor_* +$ENDFPLIST +DRAW +S 150 10 -50 90 0 1 10 N +X ~ 1 -100 50 50 R 60 60 1 1 P +X ~ 2 200 50 50 L 60 60 1 1 P +ENDDRAW +ENDDEF +# +# UA741 +# +DEF UA741 X 0 40 Y Y 1 F N +F0 "X" 150 0 60 H V C CNN +F1 "UA741" 250 -150 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +P 4 0 1 0 0 150 0 -150 350 0 0 150 N +X + 1 -200 100 200 R 50 50 1 1 I +X - 2 -200 -100 200 R 50 50 1 1 I +X ~ 3 550 0 200 L 50 50 1 1 O +ENDDRAW +ENDDEF +# +# plot_v1 +# +DEF plot_v1 U 0 40 Y Y 1 F N +F0 "U" 0 500 60 H V C CNN +F1 "plot_v1" 200 350 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +C 0 500 100 0 1 0 N +X ~ ~ 0 200 200 U 50 50 1 1 I +ENDDRAW +ENDDEF +# +# pwl +# +DEF pwl v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "pwl" -250 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +A -1144 -561 1253 291 240 0 1 0 N -50 50 0 -50 +A -765 421 941 -300 -232 0 1 0 N 50 -50 100 50 +A -75 -700 750 919 880 0 1 0 N -100 50 -50 50 +A 25 450 501 -928 -871 0 1 0 N 0 -50 50 -50 +A 1096 -609 1366 1511 1558 0 1 0 N -100 50 -150 -50 +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 0 1 1 I +X - 2 0 -450 300 U 50 0 1 1 I +ENDDRAW +ENDDEF +# +#End Library diff --git a/Examples/Integrator/Integrator.bak b/Examples/Integrator/Integrator.bak new file mode 100644 index 00000000..48c26f34 --- /dev/null +++ b/Examples/Integrator/Integrator.bak @@ -0,0 +1,202 @@ +EESchema Schematic File Version 2 +LIBS:eSim_Analog +LIBS:eSim_Devices +LIBS:eSim_Digital +LIBS:eSim_Hybrid +LIBS:eSim_Miscellaneous +LIBS:eSim_Power +LIBS:eSim_Sources +LIBS:eSim_Subckt +LIBS:eSim_User +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:Integrator-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11693 8268 +encoding utf-8 +Sheet 1 1 +Title "" +Date "" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +$Comp +L UA741 X1 +U 1 1 56A9B5FD +P 5950 3200 +F 0 "X1" H 6100 3200 60 0000 C CNN +F 1 "UA741" H 6200 3050 60 0000 C CNN +F 2 "" H 5950 3200 60 0000 C CNN +F 3 "" H 5950 3200 60 0000 C CNN + 1 5950 3200 + 1 0 0 1 +$EndComp +$Comp +L R R1 +U 1 1 56A9B635 +P 5100 3150 +F 0 "R1" H 5150 3280 50 0000 C CNN +F 1 "10k" H 5150 3200 50 0000 C CNN +F 2 "" H 5150 3130 30 0000 C CNN +F 3 "" V 5150 3200 30 0000 C CNN + 1 5100 3150 + 1 0 0 -1 +$EndComp +$Comp +L R R2 +U 1 1 56A9B674 +P 5400 3400 +F 0 "R2" H 5450 3530 50 0000 C CNN +F 1 "1k" H 5450 3450 50 0000 C CNN +F 2 "" H 5450 3380 30 0000 C CNN +F 3 "" V 5450 3450 30 0000 C CNN + 1 5400 3400 + 0 1 1 0 +$EndComp +$Comp +L R R3 +U 1 1 56A9B6AE +P 6850 3300 +F 0 "R3" H 6900 3430 50 0000 C CNN +F 1 "1k" H 6900 3350 50 0000 C CNN +F 2 "" H 6900 3280 30 0000 C CNN +F 3 "" V 6900 3350 30 0000 C CNN + 1 6850 3300 + 0 1 1 0 +$EndComp +Wire Wire Line + 5300 3100 5750 3100 +Wire Wire Line + 5750 3300 5450 3300 +Wire Wire Line + 6500 3200 6900 3200 +$Comp +L C C1 +U 1 1 56A9B72C +P 6100 2700 +F 0 "C1" H 6125 2800 50 0000 L CNN +F 1 "100n" H 6125 2600 50 0000 L CNN +F 2 "" H 6138 2550 30 0000 C CNN +F 3 "" H 6100 2700 60 0000 C CNN + 1 6100 2700 + 0 1 1 0 +$EndComp +$Comp +L GND #PWR01 +U 1 1 56A9B75D +P 5450 3600 +F 0 "#PWR01" H 5450 3350 50 0001 C CNN +F 1 "GND" H 5450 3450 50 0000 C CNN +F 2 "" H 5450 3600 50 0000 C CNN +F 3 "" H 5450 3600 50 0000 C CNN + 1 5450 3600 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR02 +U 1 1 56A9B7DC +P 4800 4000 +F 0 "#PWR02" H 4800 3750 50 0001 C CNN +F 1 "GND" H 4800 3850 50 0000 C CNN +F 2 "" H 4800 4000 50 0000 C CNN +F 3 "" H 4800 4000 50 0000 C CNN + 1 4800 4000 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR03 +U 1 1 56A9B7F9 +P 6900 3500 +F 0 "#PWR03" H 6900 3250 50 0001 C CNN +F 1 "GND" H 6900 3350 50 0000 C CNN +F 2 "" H 6900 3500 50 0000 C CNN +F 3 "" H 6900 3500 50 0000 C CNN + 1 6900 3500 + 1 0 0 -1 +$EndComp +Wire Wire Line + 5000 3100 4800 3100 +Wire Wire Line + 5950 2700 5600 2700 +Connection ~ 5600 3100 +Wire Wire Line + 6250 2700 6650 2700 +Connection ~ 6650 3200 +Text GLabel 4800 2950 0 60 Input ~ 0 +in +Text GLabel 6850 3050 2 60 Input ~ 0 +out +Wire Wire Line + 4800 2950 4850 2950 +Wire Wire Line + 4850 2950 4850 3100 +Connection ~ 4850 3100 +Wire Wire Line + 6850 3050 6800 3050 +Wire Wire Line + 6800 3050 6800 3200 +Connection ~ 6800 3200 +Wire Wire Line + 5600 2350 5600 3100 +Wire Wire Line + 6650 2350 6650 3200 +$Comp +L R R4 +U 1 1 56B2EBCB +P 6050 2400 +F 0 "R4" H 6100 2530 50 0000 C CNN +F 1 "100k" H 6100 2450 50 0000 C CNN +F 2 "" H 6100 2380 30 0000 C CNN +F 3 "" V 6100 2450 30 0000 C CNN + 1 6050 2400 + 1 0 0 -1 +$EndComp +Wire Wire Line + 5950 2350 5600 2350 +Connection ~ 5600 2700 +Wire Wire Line + 6250 2350 6650 2350 +Connection ~ 6650 2700 +$Comp +L pwl v1 +U 1 1 56B835AC +P 4800 3550 +F 0 "v1" H 4600 3650 60 0000 C CNN +F 1 "pwl" H 4550 3500 60 0000 C CNN +F 2 "R1" H 4500 3550 60 0000 C CNN +F 3 "" H 4800 3550 60 0000 C CNN + 1 4800 3550 + 1 0 0 -1 +$EndComp +$EndSCHEMATC diff --git a/Examples/Integrator/Integrator.cir b/Examples/Integrator/Integrator.cir new file mode 100644 index 00000000..50c30529 --- /dev/null +++ b/Examples/Integrator/Integrator.cir @@ -0,0 +1,19 @@ +* /home/fossee/eSim-Workspace/Integrator/Integrator.cir + +* EESchema Netlist Version 1.1 (Spice format) creation date: Mon Feb 29 20:31:04 2016 + +* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N +* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +* Sheet Name: / +X1 Net-_R2-Pad1_ Net-_C1-Pad2_ out UA741 +R1 in Net-_C1-Pad2_ 10k +R2 Net-_R2-Pad1_ GND 1k +R3 out GND 1k +C1 out Net-_C1-Pad2_ 100n +R4 Net-_C1-Pad2_ out 100k +v1 in GND pwl +U1 in plot_v1 +U2 out plot_v1 + +.end diff --git a/Examples/Integrator/Integrator.cir.out b/Examples/Integrator/Integrator.cir.out new file mode 100644 index 00000000..c3271468 --- /dev/null +++ b/Examples/Integrator/Integrator.cir.out @@ -0,0 +1,23 @@ +* /home/fossee/esim-workspace/integrator/integrator.cir + +.include ua741.sub +x1 net-_r2-pad1_ net-_c1-pad2_ out ua741 +r1 in net-_c1-pad2_ 10k +r2 net-_r2-pad1_ gnd 1k +r3 out gnd 1k +c1 out net-_c1-pad2_ 100n +r4 net-_c1-pad2_ out 100k +v1 in gnd pwl(0m 0 0.5m 5 25m 5 25.5m -5 50m -5 50.5m 5 75m 5 75.5m -5 100m -5) +* u1 in plot_v1 +* u2 out plot_v1 +.tran 10e-03 100e-03 0e-03 + +* Control Statements +.control +run +print allv > plot_data_v.txt +print alli > plot_data_i.txt +plot v(in) +plot v(out) +.endc +.end diff --git a/Examples/Integrator/Integrator.pro b/Examples/Integrator/Integrator.pro new file mode 100644 index 00000000..6701950b --- /dev/null +++ b/Examples/Integrator/Integrator.pro @@ -0,0 +1,71 @@ +update=Mon Feb 29 20:30:19 2016 +version=1 +last_client=eeschema +[general] +version=1 +RootSch= +BoardNm= +[pcbnew] +version=1 +LastNetListRead= +UseCmpFile=1 +PadDrill=0.600000000000 +PadDrillOvalY=0.600000000000 +PadSizeH=1.500000000000 +PadSizeV=1.500000000000 +PcbTextSizeV=1.500000000000 +PcbTextSizeH=1.500000000000 +PcbTextThickness=0.300000000000 +ModuleTextSizeV=1.000000000000 +ModuleTextSizeH=1.000000000000 +ModuleTextSizeThickness=0.150000000000 +SolderMaskClearance=0.000000000000 +SolderMaskMinWidth=0.000000000000 +DrawSegmentWidth=0.200000000000 +BoardOutlineThickness=0.100000000000 +ModuleOutlineThickness=0.150000000000 +[cvpcb] +version=1 +NetIExt=net +[eeschema] +version=1 +LibDir= +[eeschema/libraries] +LibName1=eSim_Analog +LibName2=eSim_Devices +LibName3=eSim_Digital +LibName4=eSim_Hybrid +LibName5=eSim_Miscellaneous +LibName6=eSim_Plot +LibName7=eSim_Power +LibName8=eSim_Sources +LibName9=eSim_Subckt +LibName10=eSim_User +LibName11=adc-dac +LibName12=memory +LibName13=xilinx +LibName14=microcontrollers +LibName15=dsp +LibName16=microchip +LibName17=analog_switches +LibName18=motorola +LibName19=texas +LibName20=intel +LibName21=audio +LibName22=interface +LibName23=digital-audio +LibName24=philips +LibName25=display +LibName26=cypress +LibName27=siliconi +LibName28=opto +LibName29=atmel +LibName30=contrib +LibName31=power +LibName32=device +LibName33=transistors +LibName34=conn +LibName35=linear +LibName36=regul +LibName37=74xx +LibName38=cmos4000 diff --git a/Examples/Integrator/Integrator.proj b/Examples/Integrator/Integrator.proj new file mode 100644 index 00000000..731ea735 --- /dev/null +++ b/Examples/Integrator/Integrator.proj @@ -0,0 +1 @@ +schematicFile Integrator.sch diff --git a/Examples/Integrator/Integrator.sch b/Examples/Integrator/Integrator.sch new file mode 100644 index 00000000..8e2feb1c --- /dev/null +++ b/Examples/Integrator/Integrator.sch @@ -0,0 +1,227 @@ +EESchema Schematic File Version 2 +LIBS:eSim_Analog +LIBS:eSim_Devices +LIBS:eSim_Digital +LIBS:eSim_Hybrid +LIBS:eSim_Miscellaneous +LIBS:eSim_Plot +LIBS:eSim_Power +LIBS:eSim_Sources +LIBS:eSim_Subckt +LIBS:eSim_User +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:Integrator-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11693 8268 +encoding utf-8 +Sheet 1 1 +Title "" +Date "" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +$Comp +L UA741 X1 +U 1 1 56A9B5FD +P 5950 3200 +F 0 "X1" H 6100 3200 60 0000 C CNN +F 1 "UA741" H 6200 3050 60 0000 C CNN +F 2 "" H 5950 3200 60 0000 C CNN +F 3 "" H 5950 3200 60 0000 C CNN + 1 5950 3200 + 1 0 0 1 +$EndComp +$Comp +L R R1 +U 1 1 56A9B635 +P 5100 3150 +F 0 "R1" H 5150 3280 50 0000 C CNN +F 1 "10k" H 5150 3200 50 0000 C CNN +F 2 "" H 5150 3130 30 0000 C CNN +F 3 "" V 5150 3200 30 0000 C CNN + 1 5100 3150 + 1 0 0 -1 +$EndComp +$Comp +L R R2 +U 1 1 56A9B674 +P 5400 3400 +F 0 "R2" H 5450 3530 50 0000 C CNN +F 1 "1k" H 5450 3450 50 0000 C CNN +F 2 "" H 5450 3380 30 0000 C CNN +F 3 "" V 5450 3450 30 0000 C CNN + 1 5400 3400 + 0 1 1 0 +$EndComp +$Comp +L R R3 +U 1 1 56A9B6AE +P 6850 3300 +F 0 "R3" H 6900 3430 50 0000 C CNN +F 1 "1k" H 6900 3350 50 0000 C CNN +F 2 "" H 6900 3280 30 0000 C CNN +F 3 "" V 6900 3350 30 0000 C CNN + 1 6850 3300 + 0 1 1 0 +$EndComp +Wire Wire Line + 5300 3100 5750 3100 +Wire Wire Line + 5750 3300 5450 3300 +Wire Wire Line + 6500 3200 6900 3200 +$Comp +L C C1 +U 1 1 56A9B72C +P 6100 2700 +F 0 "C1" H 6125 2800 50 0000 L CNN +F 1 "100n" H 6125 2600 50 0000 L CNN +F 2 "" H 6138 2550 30 0000 C CNN +F 3 "" H 6100 2700 60 0000 C CNN + 1 6100 2700 + 0 1 1 0 +$EndComp +$Comp +L GND #PWR01 +U 1 1 56A9B75D +P 5450 3600 +F 0 "#PWR01" H 5450 3350 50 0001 C CNN +F 1 "GND" H 5450 3450 50 0000 C CNN +F 2 "" H 5450 3600 50 0000 C CNN +F 3 "" H 5450 3600 50 0000 C CNN + 1 5450 3600 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR02 +U 1 1 56A9B7DC +P 4800 4000 +F 0 "#PWR02" H 4800 3750 50 0001 C CNN +F 1 "GND" H 4800 3850 50 0000 C CNN +F 2 "" H 4800 4000 50 0000 C CNN +F 3 "" H 4800 4000 50 0000 C CNN + 1 4800 4000 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR03 +U 1 1 56A9B7F9 +P 6900 3500 +F 0 "#PWR03" H 6900 3250 50 0001 C CNN +F 1 "GND" H 6900 3350 50 0000 C CNN +F 2 "" H 6900 3500 50 0000 C CNN +F 3 "" H 6900 3500 50 0000 C CNN + 1 6900 3500 + 1 0 0 -1 +$EndComp +Wire Wire Line + 5000 3100 4800 3100 +Wire Wire Line + 5950 2700 5600 2700 +Connection ~ 5600 3100 +Wire Wire Line + 6250 2700 6650 2700 +Connection ~ 6650 3200 +Text GLabel 4800 2950 0 60 Input ~ 0 +in +Text GLabel 6850 3050 2 60 Input ~ 0 +out +Wire Wire Line + 4800 2950 4850 2950 +Wire Wire Line + 4850 2850 4850 3100 +Connection ~ 4850 3100 +Wire Wire Line + 6850 3050 6800 3050 +Wire Wire Line + 6800 3000 6800 3200 +Connection ~ 6800 3200 +Wire Wire Line + 5600 2350 5600 3100 +Wire Wire Line + 6650 2350 6650 3200 +$Comp +L R R4 +U 1 1 56B2EBCB +P 6050 2400 +F 0 "R4" H 6100 2530 50 0000 C CNN +F 1 "100k" H 6100 2450 50 0000 C CNN +F 2 "" H 6100 2380 30 0000 C CNN +F 3 "" V 6100 2450 30 0000 C CNN + 1 6050 2400 + 1 0 0 -1 +$EndComp +Wire Wire Line + 5950 2350 5600 2350 +Connection ~ 5600 2700 +Wire Wire Line + 6250 2350 6650 2350 +Connection ~ 6650 2700 +$Comp +L pwl v1 +U 1 1 56B835AC +P 4800 3550 +F 0 "v1" H 4600 3650 60 0000 C CNN +F 1 "pwl" H 4550 3500 60 0000 C CNN +F 2 "R1" H 4500 3550 60 0000 C CNN +F 3 "" H 4800 3550 60 0000 C CNN + 1 4800 3550 + 1 0 0 -1 +$EndComp +$Comp +L plot_v1 U1 +U 1 1 56D45D76 +P 4850 3050 +F 0 "U1" H 4850 3550 60 0000 C CNN +F 1 "plot_v1" H 5050 3400 60 0000 C CNN +F 2 "" H 4850 3050 60 0000 C CNN +F 3 "" H 4850 3050 60 0000 C CNN + 1 4850 3050 + 1 0 0 -1 +$EndComp +$Comp +L plot_v1 U2 +U 1 1 56D45DCF +P 6800 3200 +F 0 "U2" H 6800 3700 60 0000 C CNN +F 1 "plot_v1" H 7000 3550 60 0000 C CNN +F 2 "" H 6800 3200 60 0000 C CNN +F 3 "" H 6800 3200 60 0000 C CNN + 1 6800 3200 + 1 0 0 -1 +$EndComp +Connection ~ 4850 2950 +Connection ~ 6800 3050 +$EndSCHEMATC diff --git a/Examples/Integrator/Integrator_Previous_Values.xml b/Examples/Integrator/Integrator_Previous_Values.xml new file mode 100644 index 00000000..fa1b1321 --- /dev/null +++ b/Examples/Integrator/Integrator_Previous_Values.xml @@ -0,0 +1 @@ +<KicadtoNgspice><source><v1 name="Source type">sine<field1 name="Offset Value">0</field1><field2 name="Amplitude">5</field2><field3 name="Frequency">50</field3><field4 name="Delay Time">0</field4><field5 name="Damping Factor">0</field5></v1><v1 name="Source type">pulse<field1 name="Initial Value">0</field1><field2 name="Pulse Value">5</field2><field3 name="Delay Time">0</field3><field4 name="Rise Time">0.1u</field4><field5 name="Fall Time">0.1u</field5><field5 name="Pulse width">10u</field5><field5 name="Period">20u</field5></v1><v1 name="Source type">pwl<field1 name="Enter in pwl format">0m 0 0.5m 5 25m 5 25.5m -5 50m -5 50.5m 5 75m 5 75.5m -5 100m -5</field1></v1></source><model /><devicemodel /><subcircuit><x1><field>/home/fossee/esim-clones/eSim/src/SubcircuitLibrary/ua741</field></x1></subcircuit><analysis><ac><field1 name="Lin">true</field1><field2 name="Dec">false</field2><field3 name="Oct">false</field3><field4 name="Start Frequency" /><field5 name="Stop Frequency" /><field6 name="No. of points" /><field7 name="Start Fre Combo">Hz</field7><field8 name="Stop Fre Combo">Hz</field8></ac><dc><field1 name="Source 1" /><field2 name="Start" /><field3 name="Increment" /><field4 name="Stop" /><field5 name="Operating Point">0</field5><field6 name="Start Combo">Volts or Amperes</field6><field7 name="Increment Combo">Volts or Amperes</field7><field8 name="Stop Combo">Volts or Amperes</field8><field9 name="Source 2" /><field10 name="Start" /><field11 name="Increment" /><field12 name="Stop" /><field13 name="Start Combo">Volts or Amperes</field13><field14 name="Increment Combo">Volts or Amperes</field14><field15 name="Stop Combo">Volts or Amperes</field15></dc><tran><field1 name="Start Time">0</field1><field2 name="Step Time">10</field2><field3 name="Stop Time">100</field3><field4 name="Start Combo">ms</field4><field5 name="Step Combo">ms</field5><field6 name="Stop Combo">ms</field6></tran></analysis></KicadtoNgspice>
\ No newline at end of file diff --git a/Examples/Integrator/PowerDiode.lib b/Examples/Integrator/PowerDiode.lib new file mode 100644 index 00000000..a2f61dce --- /dev/null +++ b/Examples/Integrator/PowerDiode.lib @@ -0,0 +1,20 @@ +.MODEL PowerDiode D( ++ Vj=.75 ++ Nbvl=14.976 ++ Cjo=175p ++ Rs=.25 ++ Isr=1.859n ++ Eg=1.11 ++ M=.5516 ++ Nbv=1.6989 ++ N=1 ++ Tbv1=-21.277u ++ bv=1800 ++ Fc=.5 ++ Ikf=0 ++ Nr=2 ++ Ibv=20.245m ++ Is=2.2E-15 ++ Xti=3 ++ Ibvl=1.9556m +)
\ No newline at end of file diff --git a/Examples/Integrator/analysis b/Examples/Integrator/analysis new file mode 100644 index 00000000..660a46cc --- /dev/null +++ b/Examples/Integrator/analysis @@ -0,0 +1 @@ +.tran 10e-03 100e-03 0e-03
\ No newline at end of file diff --git a/Examples/Integrator/plot_data_i.txt b/Examples/Integrator/plot_data_i.txt new file mode 100644 index 00000000..19ed72ff --- /dev/null +++ b/Examples/Integrator/plot_data_i.txt @@ -0,0 +1,101 @@ + * /home/fossee/esim-workspace/integrator/integrator.cir + Transient Analysis Thu Mar 3 22:35:55 2016 +-------------------------------------------------------------------------------- +Index time e.x1.ein1#branc e.x1.eout1#bran v1#branch +-------------------------------------------------------------------------------- +0 0.000000e+00 0.000000e+00 0.000000e+00 0.000000e+00 +1 5.000000e-06 4.247118e-06 5.273371e-06 -5.00213e-06 +2 5.420214e-06 4.242518e-06 5.716334e-06 -5.42234e-06 +3 6.260642e-06 4.736886e-06 6.608563e-06 -6.26301e-06 +4 7.941498e-06 4.945151e-06 8.409904e-06 -7.94397e-06 +5 1.130321e-05 6.588066e-06 1.210404e-05 -1.13065e-05 +6 1.802663e-05 8.314293e-06 1.982238e-05 -1.80308e-05 +7 3.147348e-05 1.352576e-05 3.662222e-05 -3.14803e-05 +8 5.836718e-05 2.205193e-05 7.561631e-05 -5.83782e-05 +9 1.121546e-04 4.096938e-05 1.751617e-04 -1.12175e-04 +10 2.197294e-04 7.654107e-05 4.598512e-04 -2.19768e-04 +11 4.348789e-04 1.485134e-04 1.367124e-03 -4.34954e-04 +12 5.000000e-04 1.691267e-04 1.729782e-03 -5.00086e-04 +13 5.430299e-04 1.662904e-04 1.938768e-03 -5.00085e-04 +14 6.290897e-04 1.648823e-04 2.354973e-03 -5.00085e-04 +15 8.012094e-04 1.620514e-04 3.176727e-03 -5.00084e-04 +16 1.145449e-03 1.565839e-04 4.778520e-03 -5.00083e-04 +17 1.833927e-03 1.461449e-04 7.822179e-03 -5.00081e-04 +18 3.210885e-03 1.273326e-04 1.332131e-02 -5.00078e-04 +19 5.210885e-03 1.041642e-04 2.008256e-02 -5.00073e-04 +20 7.210885e-03 8.523984e-05 2.561441e-02 -5.00070e-04 +21 9.210885e-03 6.972507e-05 3.014042e-02 -5.00067e-04 +22 1.121088e-02 5.706276e-05 3.384347e-02 -5.00064e-04 +23 1.321088e-02 4.667139e-05 3.687320e-02 -5.00063e-04 +24 1.521088e-02 3.820092e-05 3.935203e-02 -5.00061e-04 +25 1.721088e-02 3.123916e-05 4.138014e-02 -5.00060e-04 +26 1.921088e-02 2.557472e-05 4.303949e-02 -5.00059e-04 +27 2.121088e-02 2.090875e-05 4.439711e-02 -5.00058e-04 +28 2.321088e-02 1.712269e-05 4.550789e-02 -5.00057e-04 +29 2.500000e-02 1.429471e-05 4.632873e-02 -5.00056e-04 +30 2.505000e-02 -2.47553e-05 4.619954e-02 -4.00037e-04 +31 2.515000e-02 -9.26720e-05 4.584198e-02 -2.00003e-04 +32 2.535000e-02 -2.26589e-04 4.453736e-02 2.000652e-04 +33 2.550000e-02 -3.25223e-04 4.304950e-02 5.001159e-04 +34 2.554000e-02 -3.19046e-04 4.267678e-02 5.001132e-04 +35 2.562000e-02 -3.16546e-04 4.193424e-02 5.001127e-04 +36 2.578000e-02 -3.11478e-04 4.046684e-02 5.001118e-04 +37 2.610000e-02 -3.01710e-04 3.760137e-02 5.001100e-04 +38 2.674000e-02 -2.82956e-04 3.213701e-02 5.001065e-04 +39 2.802000e-02 -2.48955e-04 2.219439e-02 5.001002e-04 +40 3.002000e-02 -2.03648e-04 8.975371e-03 5.000917e-04 +41 3.202000e-02 -1.66658e-04 -1.84005e-03 5.000848e-04 +42 3.402000e-02 -1.36316e-04 -1.06889e-02 5.000792e-04 +43 3.602000e-02 -1.11569e-04 -1.79288e-02 5.000746e-04 +44 3.802000e-02 -9.12434e-05 -2.38523e-02 5.000708e-04 +45 4.002000e-02 -7.46918e-05 -2.86987e-02 5.000677e-04 +46 4.202000e-02 -6.10716e-05 -3.26639e-02 5.000652e-04 +47 4.402000e-02 -5.00062e-05 -3.59081e-02 5.000631e-04 +48 4.602000e-02 -4.08744e-05 -3.85624e-02 5.000614e-04 +49 4.802000e-02 -3.34815e-05 -4.07341e-02 5.000601e-04 +50 5.000000e-02 -2.74097e-05 -4.24947e-02 5.000589e-04 +51 5.005000e-02 1.169263e-05 -4.23846e-02 4.000393e-04 +52 5.015000e-02 7.973938e-05 -4.20650e-02 2.000052e-04 +53 5.035000e-02 2.139124e-04 -4.08352e-02 -2.00063e-04 +54 5.050000e-02 3.127348e-04 -3.94025e-02 -5.00114e-04 + +Index time e.x1.ein1#branc e.x1.eout1#bran v1#branch +-------------------------------------------------------------------------------- +55 5.054000e-02 3.066077e-04 -3.90443e-02 -5.00111e-04 +56 5.062000e-02 3.042067e-04 -3.83307e-02 -5.00110e-04 +57 5.078000e-02 2.993353e-04 -3.69205e-02 -5.00110e-04 +58 5.110000e-02 2.899490e-04 -3.41667e-02 -5.00108e-04 +59 5.174000e-02 2.719250e-04 -2.89154e-02 -5.00104e-04 +60 5.302000e-02 2.392506e-04 -1.93604e-02 -5.00098e-04 +61 5.502000e-02 1.957089e-04 -6.65664e-03 -5.00090e-04 +62 5.702000e-02 1.601625e-04 3.737172e-03 -5.00084e-04 +63 5.902000e-02 1.310012e-04 1.224109e-02 -5.00078e-04 +64 6.102000e-02 1.072206e-04 1.919875e-02 -5.00074e-04 +65 6.302000e-02 8.768564e-05 2.489131e-02 -5.00070e-04 +66 6.502000e-02 7.178102e-05 2.954880e-02 -5.00067e-04 +67 6.702000e-02 5.869000e-05 3.335942e-02 -5.00065e-04 +68 6.902000e-02 4.805765e-05 3.647716e-02 -5.00063e-04 +69 7.102000e-02 3.928019e-05 3.902801e-02 -5.00061e-04 +70 7.302000e-02 3.217713e-05 4.111504e-02 -5.00060e-04 +71 7.500000e-02 2.634038e-05 4.280705e-02 -5.00059e-04 +72 7.505000e-02 -1.27567e-05 4.269538e-02 -4.00039e-04 +73 7.515000e-02 -8.07928e-05 4.237269e-02 -2.00005e-04 +74 7.535000e-02 -2.14945e-04 4.113678e-02 2.000631e-04 +75 7.550000e-02 -3.13752e-04 3.969955e-02 5.001138e-04 +76 7.554000e-02 -3.07621e-04 3.934017e-02 5.001111e-04 +77 7.562000e-02 -3.05212e-04 3.862422e-02 5.001106e-04 +78 7.578000e-02 -3.00324e-04 3.720936e-02 5.001097e-04 +79 7.610000e-02 -2.90907e-04 3.444650e-02 5.001080e-04 +80 7.674000e-02 -2.72824e-04 2.917780e-02 5.001046e-04 +81 7.802000e-02 -2.40041e-04 1.959120e-02 5.000985e-04 +82 8.002000e-02 -1.96356e-04 6.845514e-03 5.000904e-04 +83 8.202000e-02 -1.60692e-04 -3.58264e-03 5.000837e-04 +84 8.402000e-02 -1.31434e-04 -1.21147e-02 5.000783e-04 +85 8.602000e-02 -1.07575e-04 -1.90953e-02 5.000739e-04 +86 8.802000e-02 -8.79754e-05 -2.48067e-02 5.000702e-04 +87 9.002000e-02 -7.20181e-05 -2.94796e-02 5.000672e-04 +88 9.202000e-02 -5.88840e-05 -3.33028e-02 5.000648e-04 +89 9.402000e-02 -4.82164e-05 -3.64308e-02 5.000628e-04 +90 9.602000e-02 -3.94101e-05 -3.89901e-02 5.000611e-04 +91 9.802000e-02 -3.22834e-05 -4.10840e-02 5.000598e-04 +92 1.000000e-01 -2.64275e-05 -4.27816e-02 5.000587e-04 diff --git a/Examples/Integrator/plot_data_v.txt b/Examples/Integrator/plot_data_v.txt new file mode 100644 index 00000000..df434786 --- /dev/null +++ b/Examples/Integrator/plot_data_v.txt @@ -0,0 +1,305 @@ + * /home/fossee/esim-workspace/integrator/integrator.cir + Transient Analysis Thu Mar 3 22:35:55 2016 +-------------------------------------------------------------------------------- +Index time in net-_c1-pad2_ net-_r2-pad1_ +-------------------------------------------------------------------------------- +0 0.000000e+00 0.000000e+00 0.000000e+00 0.000000e+00 +1 5.000000e-06 5.000000e-02 -2.12529e-05 -1.06211e-08 +2 5.420214e-06 5.420214e-02 -2.12304e-05 -1.06099e-08 +3 6.260642e-06 6.260642e-02 -2.37047e-05 -1.18464e-08 +4 7.941498e-06 7.941498e-02 -2.47491e-05 -1.23684e-08 +5 1.130321e-05 1.130321e-01 -3.29739e-05 -1.64787e-08 +6 1.802663e-05 1.802663e-01 -4.16251e-05 -2.08021e-08 +7 3.147348e-05 3.147348e-01 -6.77415e-05 -3.38538e-08 +8 5.836718e-05 5.836718e-01 -1.10544e-04 -5.52444e-08 +9 1.121546e-04 1.121546e+00 -2.05711e-04 -1.02804e-07 +10 2.197294e-04 2.197294e+00 -3.85644e-04 -1.92726e-07 +11 4.348789e-04 4.348789e+00 -7.53291e-04 -3.76457e-07 +12 5.000000e-04 5.000000e+00 -8.59657e-04 -4.29614e-07 +13 5.430299e-04 5.000000e+00 -8.47716e-04 -4.23646e-07 +14 6.290897e-04 5.000000e+00 -8.45149e-04 -4.22363e-07 +15 8.012094e-04 5.000000e+00 -8.39826e-04 -4.19703e-07 +16 1.145449e-03 5.000000e+00 -8.29703e-04 -4.14644e-07 +17 1.833927e-03 5.000000e+00 -8.10217e-04 -4.04906e-07 +18 3.210885e-03 5.000000e+00 -7.75254e-04 -3.87433e-07 +19 5.210885e-03 5.000000e+00 -7.32073e-04 -3.65854e-07 +20 7.210885e-03 5.000000e+00 -6.96902e-04 -3.48277e-07 +21 9.210885e-03 5.000000e+00 -6.67968e-04 -3.33817e-07 +22 1.121088e-02 5.000000e+00 -6.44453e-04 -3.22065e-07 +23 1.321088e-02 5.000000e+00 -6.25056e-04 -3.12372e-07 +24 1.521088e-02 5.000000e+00 -6.09343e-04 -3.04519e-07 +25 1.721088e-02 5.000000e+00 -5.96330e-04 -2.98016e-07 +26 1.921088e-02 5.000000e+00 -5.85840e-04 -2.92774e-07 +27 2.121088e-02 5.000000e+00 -5.77101e-04 -2.88406e-07 +28 2.321088e-02 5.000000e+00 -5.70108e-04 -2.84911e-07 +29 2.500000e-02 5.000000e+00 -5.64789e-04 -2.82253e-07 +30 2.505000e-02 4.000000e+00 -3.69053e-04 -1.84434e-07 +31 2.515000e-02 2.000000e+00 -2.74552e-05 -1.37207e-08 +32 2.535000e-02 -2.00000e+00 6.524933e-04 3.260836e-07 +33 2.550000e-02 -5.00000e+00 1.158908e-03 5.791646e-07 +34 2.554000e-02 -5.00000e+00 1.132018e-03 5.657259e-07 +35 2.562000e-02 -5.00000e+00 1.127497e-03 5.634669e-07 +36 2.578000e-02 -5.00000e+00 1.117931e-03 5.586861e-07 +37 2.610000e-02 -5.00000e+00 1.099882e-03 5.496661e-07 +38 2.674000e-02 -5.00000e+00 1.064839e-03 5.321534e-07 +39 2.802000e-02 -5.00000e+00 1.001683e-03 5.005913e-07 +40 3.002000e-02 -5.00000e+00 9.172145e-04 4.583780e-07 +41 3.202000e-02 -5.00000e+00 8.484958e-04 4.240359e-07 +42 3.402000e-02 -5.00000e+00 7.918809e-04 3.957426e-07 +43 3.602000e-02 -5.00000e+00 7.459515e-04 3.727894e-07 +44 3.802000e-02 -5.00000e+00 7.079820e-04 3.538141e-07 +45 4.002000e-02 -5.00000e+00 6.773080e-04 3.384848e-07 +46 4.202000e-02 -5.00000e+00 6.518197e-04 3.257470e-07 +47 4.402000e-02 -5.00000e+00 6.313578e-04 3.155211e-07 +48 4.602000e-02 -5.00000e+00 6.142244e-04 3.069587e-07 +49 4.802000e-02 -5.00000e+00 6.005986e-04 3.001492e-07 +50 5.000000e-02 -5.00000e+00 5.891610e-04 2.944333e-07 +51 5.005000e-02 -4.00000e+00 3.933678e-04 1.965856e-07 +52 5.015000e-02 -2.00000e+00 5.152789e-05 2.575107e-08 +53 5.035000e-02 2.000000e+00 -6.28897e-04 -3.14291e-07 +54 5.050000e-02 5.000000e+00 -1.13566e-03 -5.67548e-07 + +Index time in net-_c1-pad2_ net-_r2-pad1_ +-------------------------------------------------------------------------------- +55 5.054000e-02 5.000000e+00 -1.10887e-03 -5.54156e-07 +56 5.062000e-02 5.000000e+00 -1.10453e-03 -5.51989e-07 +57 5.078000e-02 5.000000e+00 -1.09533e-03 -5.47390e-07 +58 5.110000e-02 5.000000e+00 -1.07799e-03 -5.38726e-07 +59 5.174000e-02 5.000000e+00 -1.04431e-03 -5.21892e-07 +60 5.302000e-02 5.000000e+00 -9.83620e-04 -4.91564e-07 +61 5.502000e-02 5.000000e+00 -9.02436e-04 -4.50992e-07 +62 5.702000e-02 5.000000e+00 -8.36404e-04 -4.17993e-07 +63 5.902000e-02 5.000000e+00 -7.81988e-04 -3.90799e-07 +64 6.102000e-02 5.000000e+00 -7.37857e-04 -3.68744e-07 +65 6.302000e-02 5.000000e+00 -7.01360e-04 -3.50505e-07 +66 6.502000e-02 5.000000e+00 -6.71890e-04 -3.35777e-07 +67 6.702000e-02 5.000000e+00 -6.47387e-04 -3.23532e-07 +68 6.902000e-02 5.000000e+00 -6.27731e-04 -3.13709e-07 +69 7.102000e-02 5.000000e+00 -6.11257e-04 -3.05476e-07 +70 7.302000e-02 5.000000e+00 -5.98171e-04 -2.98936e-07 +71 7.500000e-02 5.000000e+00 -5.87171e-04 -2.93439e-07 +72 7.505000e-02 4.000000e+00 -3.91387e-04 -1.95596e-07 +73 7.515000e-02 2.000000e+00 -4.95670e-05 -2.47711e-08 +74 7.535000e-02 -2.00000e+00 6.308189e-04 3.152518e-07 +75 7.550000e-02 -5.00000e+00 1.137557e-03 5.684943e-07 +76 7.554000e-02 -5.00000e+00 1.110751e-03 5.550981e-07 +77 7.562000e-02 -5.00000e+00 1.106400e-03 5.529237e-07 +78 7.578000e-02 -5.00000e+00 1.097169e-03 5.483102e-07 +79 7.610000e-02 -5.00000e+00 1.079774e-03 5.396170e-07 +80 7.674000e-02 -5.00000e+00 1.045978e-03 5.227276e-07 +81 7.802000e-02 -5.00000e+00 9.850912e-04 4.922995e-07 +82 8.002000e-02 -5.00000e+00 9.036395e-04 4.515939e-07 +83 8.202000e-02 -5.00000e+00 8.373891e-04 4.184853e-07 +84 8.402000e-02 -5.00000e+00 7.827937e-04 3.912013e-07 +85 8.602000e-02 -5.00000e+00 7.385167e-04 3.690738e-07 +86 8.802000e-02 -5.00000e+00 7.018990e-04 3.507741e-07 +87 9.002000e-02 -5.00000e+00 6.723311e-04 3.359976e-07 +88 9.202000e-02 -5.00000e+00 6.477478e-04 3.237120e-07 +89 9.402000e-02 -5.00000e+00 6.280262e-04 3.138562e-07 +90 9.602000e-02 -5.00000e+00 6.114986e-04 3.055965e-07 +91 9.802000e-02 -5.00000e+00 5.983684e-04 2.990347e-07 +92 1.000000e-01 -5.00000e+00 5.873327e-04 2.935196e-07 + + * /home/fossee/esim-workspace/integrator/integrator.cir + Transient Analysis Thu Mar 3 22:35:55 2016 +-------------------------------------------------------------------------------- +Index time out x1.1 x1.2 +-------------------------------------------------------------------------------- +0 0.000000e+00 0.000000e+00 0.000000e+00 0.000000e+00 +1 5.000000e-06 -2.71235e-04 -6.66737e-04 -6.66737e-04 +2 5.420214e-06 -2.93986e-04 -7.22711e-04 -7.22711e-04 +3 6.260642e-06 -3.45539e-04 -8.41181e-04 -8.41181e-04 +4 7.941498e-06 -4.65919e-04 -1.09666e-03 -1.09666e-03 +5 1.130321e-05 -7.97515e-04 -1.70532e-03 -1.70532e-03 +6 1.802663e-05 -1.79156e-03 -3.27824e-03 -3.27824e-03 +7 3.147348e-05 -5.14193e-03 -7.88859e-03 -7.88859e-03 +8 5.836718e-05 -1.72380e-02 -2.29092e-02 -2.29092e-02 +9 1.121546e-04 -6.29864e-02 -7.61236e-02 -7.61236e-02 +10 2.197294e-04 -2.40083e-01 -2.74572e-01 -2.74572e-01 +11 4.348789e-04 -9.32169e-01 -1.03470e+00 -1.03470e+00 +12 5.000000e-04 -1.22970e+00 -1.35943e+00 -1.35943e+00 +13 5.430299e-04 -1.43868e+00 -1.58409e+00 -1.58409e+00 +14 6.290897e-04 -1.85489e+00 -2.03151e+00 -2.03151e+00 +15 8.012094e-04 -2.67664e+00 -2.91490e+00 -2.91490e+00 +16 1.145449e-03 -4.27844e+00 -4.63683e+00 -4.63683e+00 +17 1.833927e-03 -7.32210e+00 -7.90876e+00 -7.90876e+00 +18 3.210885e-03 -1.28212e+01 -1.38203e+01 -1.38203e+01 +19 5.210885e-03 -1.95825e+01 -2.10887e+01 -2.10887e+01 +20 7.210885e-03 -2.51143e+01 -2.70354e+01 -2.70354e+01 +21 9.210885e-03 -2.96404e+01 -3.19009e+01 -3.19009e+01 +22 1.121088e-02 -3.33434e+01 -3.58817e+01 -3.58817e+01 +23 1.321088e-02 -3.63731e+01 -3.91386e+01 -3.91386e+01 +24 1.521088e-02 -3.88520e+01 -4.18034e+01 -4.18034e+01 +25 1.721088e-02 -4.08801e+01 -4.39836e+01 -4.39836e+01 +26 1.921088e-02 -4.25394e+01 -4.57674e+01 -4.57674e+01 +27 2.121088e-02 -4.38971e+01 -4.72268e+01 -4.72268e+01 +28 2.321088e-02 -4.50078e+01 -4.84209e+01 -4.84209e+01 +29 2.500000e-02 -4.58287e+01 -4.93033e+01 -4.93033e+01 +30 2.505000e-02 -4.57995e+01 -4.92645e+01 -4.92645e+01 +31 2.515000e-02 -4.56420e+01 -4.90801e+01 -4.90801e+01 +32 2.535000e-02 -4.47374e+01 -4.80777e+01 -4.80777e+01 +33 2.550000e-02 -4.35496e+01 -4.67783e+01 -4.67783e+01 +34 2.554000e-02 -4.31769e+01 -4.63776e+01 -4.63776e+01 +35 2.562000e-02 -4.24343e+01 -4.55794e+01 -4.55794e+01 +36 2.578000e-02 -4.09670e+01 -4.40020e+01 -4.40020e+01 +37 2.610000e-02 -3.81015e+01 -4.09216e+01 -4.09216e+01 +38 2.674000e-02 -3.26371e+01 -3.50474e+01 -3.50474e+01 +39 2.802000e-02 -2.26945e+01 -2.43591e+01 -2.43591e+01 +40 3.002000e-02 -9.47546e+00 -1.01486e+01 -1.01486e+01 +41 3.202000e-02 1.339969e+00 1.477973e+00 1.477973e+00 +42 3.402000e-02 1.018884e+01 1.099051e+01 1.099051e+01 +43 3.602000e-02 1.742874e+01 1.877340e+01 1.877340e+01 +44 3.802000e-02 2.335221e+01 2.514113e+01 2.514113e+01 +45 4.002000e-02 2.819863e+01 3.035103e+01 3.035103e+01 +46 4.202000e-02 3.216383e+01 3.461362e+01 3.461362e+01 +47 4.402000e-02 3.540804e+01 3.810114e+01 3.810114e+01 +48 4.602000e-02 3.806236e+01 4.095454e+01 4.095454e+01 +49 4.802000e-02 4.023405e+01 4.328910e+01 4.328910e+01 +50 5.000000e-02 4.199469e+01 4.518180e+01 4.518180e+01 +51 5.005000e-02 4.198459e+01 4.516344e+01 4.516344e+01 +52 5.015000e-02 4.186503e+01 4.501991e+01 4.501991e+01 +53 5.035000e-02 4.103528e+01 4.409792e+01 4.409792e+01 +54 5.050000e-02 3.990259e+01 4.285778e+01 4.285778e+01 + +Index time out x1.1 x1.2 +-------------------------------------------------------------------------------- +55 5.054000e-02 3.954439e+01 4.247272e+01 4.247272e+01 +56 5.062000e-02 3.883080e+01 4.170560e+01 4.170560e+01 +57 5.078000e-02 3.742060e+01 4.018964e+01 4.018964e+01 +58 5.110000e-02 3.466684e+01 3.722934e+01 3.722934e+01 +59 5.174000e-02 2.941549e+01 3.158414e+01 3.158414e+01 +60 5.302000e-02 1.986045e+01 2.131248e+01 2.131248e+01 +61 5.502000e-02 7.156731e+00 7.655979e+00 7.655979e+00 +62 5.702000e-02 -3.23709e+00 -3.51738e+00 -3.51738e+00 +63 5.902000e-02 -1.17410e+01 -1.26591e+01 -1.26591e+01 +64 6.102000e-02 -1.86987e+01 -2.01386e+01 -2.01386e+01 +65 6.302000e-02 -2.43912e+01 -2.62581e+01 -2.62581e+01 +66 6.502000e-02 -2.90487e+01 -3.12649e+01 -3.12649e+01 +67 6.702000e-02 -3.28594e+01 -3.53613e+01 -3.53613e+01 +68 6.902000e-02 -3.59771e+01 -3.87129e+01 -3.87129e+01 +69 7.102000e-02 -3.85279e+01 -4.14550e+01 -4.14550e+01 +70 7.302000e-02 -4.06150e+01 -4.36986e+01 -4.36986e+01 +71 7.500000e-02 -4.23070e+01 -4.55175e+01 -4.55175e+01 +72 7.505000e-02 -4.22953e+01 -4.54975e+01 -4.54975e+01 +73 7.515000e-02 -4.21727e+01 -4.53506e+01 -4.53506e+01 +74 7.535000e-02 -4.13368e+01 -4.44221e+01 -4.44221e+01 +75 7.550000e-02 -4.01997e+01 -4.31771e+01 -4.31771e+01 +76 7.554000e-02 -3.98403e+01 -4.27908e+01 -4.27908e+01 +77 7.562000e-02 -3.91243e+01 -4.20211e+01 -4.20211e+01 +78 7.578000e-02 -3.77095e+01 -4.05002e+01 -4.05002e+01 +79 7.610000e-02 -3.49466e+01 -3.75301e+01 -3.75301e+01 +80 7.674000e-02 -2.96779e+01 -3.18662e+01 -3.18662e+01 +81 7.802000e-02 -2.00913e+01 -2.15606e+01 -2.15606e+01 +82 8.002000e-02 -7.34560e+00 -7.85902e+00 -7.85902e+00 +83 8.202000e-02 3.082558e+00 3.351256e+00 3.351256e+00 +84 8.402000e-02 1.161458e+01 1.252318e+01 1.252318e+01 +85 8.602000e-02 1.859523e+01 2.002738e+01 2.002738e+01 +86 8.802000e-02 2.430661e+01 2.616711e+01 2.616711e+01 +87 9.002000e-02 2.897949e+01 3.119045e+01 3.119045e+01 +88 9.202000e-02 3.280270e+01 3.530041e+01 3.530041e+01 +89 9.402000e-02 3.593075e+01 3.866306e+01 3.866306e+01 +90 9.602000e-02 3.849002e+01 4.141428e+01 4.141428e+01 +91 9.802000e-02 4.058395e+01 4.366525e+01 4.366525e+01 +92 1.000000e-01 4.228155e+01 4.549017e+01 4.549017e+01 + + * /home/fossee/esim-workspace/integrator/integrator.cir + Transient Analysis Thu Mar 3 22:35:55 2016 +-------------------------------------------------------------------------------- +Index time x1.4 +-------------------------------------------------------------------------------- +0 0.000000e+00 0.000000e+00 +1 5.000000e-06 -2.12423e+00 +2 5.420214e-06 -2.12198e+00 +3 6.260642e-06 -2.36928e+00 +4 7.941498e-06 -2.47367e+00 +5 1.130321e-05 -3.29574e+00 +6 1.802663e-05 -4.16042e+00 +7 3.147348e-05 -6.77077e+00 +8 5.836718e-05 -1.10489e+01 +9 1.121546e-04 -2.05608e+01 +10 2.197294e-04 -3.85451e+01 +11 4.348789e-04 -7.52914e+01 +12 5.000000e-04 -8.59228e+01 +13 5.430299e-04 -8.47293e+01 +14 6.290897e-04 -8.44727e+01 +15 8.012094e-04 -8.39406e+01 +16 1.145449e-03 -8.29288e+01 +17 1.833927e-03 -8.09812e+01 +18 3.210885e-03 -7.74866e+01 +19 5.210885e-03 -7.31708e+01 +20 7.210885e-03 -6.96553e+01 +21 9.210885e-03 -6.67634e+01 +22 1.121088e-02 -6.44130e+01 +23 1.321088e-02 -6.24743e+01 +24 1.521088e-02 -6.09038e+01 +25 1.721088e-02 -5.96032e+01 +26 1.921088e-02 -5.85548e+01 +27 2.121088e-02 -5.76812e+01 +28 2.321088e-02 -5.69823e+01 +29 2.500000e-02 -5.64507e+01 +30 2.505000e-02 -3.68868e+01 +31 2.515000e-02 -2.74414e+00 +32 2.535000e-02 6.521672e+01 +33 2.550000e-02 1.158329e+02 +34 2.554000e-02 1.131452e+02 +35 2.562000e-02 1.126934e+02 +36 2.578000e-02 1.117372e+02 +37 2.610000e-02 1.099332e+02 +38 2.674000e-02 1.064307e+02 +39 2.802000e-02 1.001183e+02 +40 3.002000e-02 9.167561e+01 +41 3.202000e-02 8.480717e+01 +42 3.402000e-02 7.914851e+01 +43 3.602000e-02 7.455787e+01 +44 3.802000e-02 7.076282e+01 +45 4.002000e-02 6.769696e+01 +46 4.202000e-02 6.514940e+01 +47 4.402000e-02 6.310423e+01 +48 4.602000e-02 6.139175e+01 +49 4.802000e-02 6.002984e+01 +50 5.000000e-02 5.888666e+01 +51 5.005000e-02 3.931712e+01 +52 5.015000e-02 5.150213e+00 +53 5.035000e-02 -6.28583e+01 +54 5.050000e-02 -1.13510e+02 + +Index time x1.4 +-------------------------------------------------------------------------------- +55 5.054000e-02 -1.10831e+02 +56 5.062000e-02 -1.10398e+02 +57 5.078000e-02 -1.09478e+02 +58 5.110000e-02 -1.07745e+02 +59 5.174000e-02 -1.04378e+02 +60 5.302000e-02 -9.83128e+01 +61 5.502000e-02 -9.01985e+01 +62 5.702000e-02 -8.35986e+01 +63 5.902000e-02 -7.81597e+01 +64 6.102000e-02 -7.37489e+01 +65 6.302000e-02 -7.01009e+01 +66 6.502000e-02 -6.71554e+01 +67 6.702000e-02 -6.47063e+01 +68 6.902000e-02 -6.27417e+01 +69 7.102000e-02 -6.10951e+01 +70 7.302000e-02 -5.97872e+01 +71 7.500000e-02 -5.86877e+01 +72 7.505000e-02 -3.91192e+01 +73 7.515000e-02 -4.95422e+00 +74 7.535000e-02 6.305036e+01 +75 7.550000e-02 1.136989e+02 +76 7.554000e-02 1.110196e+02 +77 7.562000e-02 1.105847e+02 +78 7.578000e-02 1.096620e+02 +79 7.610000e-02 1.079234e+02 +80 7.674000e-02 1.045455e+02 +81 7.802000e-02 9.845989e+01 +82 8.002000e-02 9.031879e+01 +83 8.202000e-02 8.369706e+01 +84 8.402000e-02 7.824025e+01 +85 8.602000e-02 7.381476e+01 +86 8.802000e-02 7.015482e+01 +87 9.002000e-02 6.719951e+01 +88 9.202000e-02 6.474240e+01 +89 9.402000e-02 6.277124e+01 +90 9.602000e-02 6.111930e+01 +91 9.802000e-02 5.980694e+01 +92 1.000000e-01 5.870392e+01 diff --git a/Examples/Integrator/scr.cir.out~ b/Examples/Integrator/scr.cir.out~ new file mode 100644 index 00000000..d600f25d --- /dev/null +++ b/Examples/Integrator/scr.cir.out~ @@ -0,0 +1,29 @@ +* /opt/esim/src/subcircuitlibrary/scr/scr.cir + +.include PowerDiode.lib +* u2 3 7 1 port +* f2 +d1 5 2 PowerDiode +c1 3 9 10u +* f1 +v1 8 4 dc 0 +v2 6 5 dc 0 +* u1 9 1 6 aswitch +r1 7 8 50 +r2 3 9 1 +Vf2 2 3 0 +f2 3 9 Vf2 100 +Vf1 4 3 0 +f1 3 9 Vf1 10 +a1 9 (1 6) u1 +* Schematic Name: aswitch, NgSpice Name: aswitch +.model u1 aswitch(log=TRUE cntl_off=0.0 cntl_on=1.0 r_on=1.0 r_off=1.0e12 ) +.tran 0e-12 0e-00 0e-00 + +* Control Statements +.control +run +print allv > plot_data_v.txt +print alli > plot_data_i.txt +.endc +.end diff --git a/Examples/Integrator/scr.sub~ b/Examples/Integrator/scr.sub~ new file mode 100644 index 00000000..0fdddbf4 --- /dev/null +++ b/Examples/Integrator/scr.sub~ @@ -0,0 +1,23 @@ +* Subcircuit scr +.subckt scr 3 7 1 +* /opt/esim/src/subcircuitlibrary/scr/scr.cir +.include PowerDiode.lib +* f2 +d1 5 2 PowerDiode +c1 3 9 10u +* f1 +v1 8 4 dc 0 +v2 6 5 dc 0 +* u1 9 1 6 aswitch +r1 7 8 50 +r2 3 9 1 +Vf2 2 3 0 +f2 3 9 Vf2 100 +Vf1 4 3 0 +f1 3 9 Vf1 10 +a1 9 [1 6 ] u1 +* Schematic Name: aswitch, NgSpice Name: aswitch +.model u1 aswitch(log=TRUE cntl_off=0.0 cntl_on=1.0 r_on=1.0 r_off=1.0e12 ) +* Control Statements + +.ends scr
\ No newline at end of file diff --git a/Examples/Integrator/ua741-cache.bak b/Examples/Integrator/ua741-cache.bak new file mode 100644 index 00000000..eaad34ad --- /dev/null +++ b/Examples/Integrator/ua741-cache.bak @@ -0,0 +1,100 @@ +EESchema-LIBRARY Version 2.3 Date: Sunday 21 October 2012 01:22:10 AM IST +#encoding utf-8 +# +# C +# +DEF C C 0 10 N Y 1 F N +F0 "C" 50 100 50 H V L CNN +F1 "C" 50 -100 50 H V L CNN +$FPLIST + SM* + C? + C1-1 +$ENDFPLIST +DRAW +P 2 0 1 10 -100 -30 100 -30 N +P 2 0 1 10 -100 30 100 30 N +X ~ 1 0 200 170 D 40 40 1 1 P +X ~ 2 0 -200 170 U 40 40 1 1 P +ENDDRAW +ENDDEF +# +# GND +# +DEF ~GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 0 30 H I C CNN +F1 "GND" 0 -70 30 H I C CNN +DRAW +P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N +X GND 1 0 0 0 U 30 30 1 1 W N +ENDDRAW +ENDDEF +# +# PORT +# +DEF PORT U 0 40 Y Y 8 F N +F0 "U" 0 -50 30 H V C CNN +F1 "PORT" 0 0 30 H V C CNN +DRAW +A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0 +A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50 +S -100 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35 35 1 1 P +X +c 3 -50 -200 100 U 35 35 1 1 P +X -c 4 50 -200 100 U 35 35 1 1 P +ENDDRAW +ENDDEF +# +#End Library diff --git a/Examples/Integrator/ua741-cache.lib b/Examples/Integrator/ua741-cache.lib new file mode 100644 index 00000000..9114d342 --- /dev/null +++ b/Examples/Integrator/ua741-cache.lib @@ -0,0 +1,100 @@ +EESchema-LIBRARY Version 2.3 Date: Saturday 17 November 2012 08:10:48 AM IST +#encoding utf-8 +# +# C +# +DEF C C 0 10 N Y 1 F N +F0 "C" 50 100 50 H V L CNN +F1 "C" 50 -100 50 H V L CNN +$FPLIST + SM* + C? + C1-1 +$ENDFPLIST +DRAW +P 2 0 1 10 -100 -30 100 -30 N +P 2 0 1 10 -100 30 100 30 N +X ~ 1 0 200 170 D 40 40 1 1 P +X ~ 2 0 -200 170 U 40 40 1 1 P +ENDDRAW +ENDDEF +# +# GND +# +DEF ~GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 0 30 H I C CNN +F1 "GND" 0 -70 30 H I C CNN +DRAW +P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N +X GND 1 0 0 0 U 30 30 1 1 W N +ENDDRAW +ENDDEF +# +# PORT +# +DEF PORT U 0 40 Y Y 8 F N +F0 "U" 0 -50 30 H V C CNN +F1 "PORT" 0 0 30 H V C CNN +DRAW +A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0 +A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50 +S -100 50 100 -50 0 1 0 N +X ~ 1 250 0 100 L 30 30 1 1 I +X ~ 2 250 0 100 L 30 30 2 1 I +X ~ 3 250 0 100 L 30 30 3 1 I +X ~ 4 250 0 100 L 30 30 4 1 I +X ~ 5 250 0 100 L 30 30 5 1 I +X ~ 6 250 0 100 L 30 30 6 1 I +X ~ 7 250 0 100 L 30 30 7 1 I +X ~ 8 250 0 100 L 30 30 8 1 I +ENDDRAW +ENDDEF +# +# PWR_FLAG +# +DEF PWR_FLAG #FLG 0 0 N N 1 F P +F0 "#FLG" 0 270 30 H I C CNN +F1 "PWR_FLAG" 0 230 30 H V C CNN +DRAW +X pwr 1 0 0 0 U 20 20 0 0 w +P 3 0 1 0 0 0 0 100 0 100 N +P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N +ENDDRAW +ENDDEF +# +# R +# +DEF R R 0 0 N Y 1 F N +F0 "R" 80 0 50 V V C CNN +F1 "R" 0 0 50 V V C CNN +$FPLIST + R? + SM0603 + SM0805 + R?-* +$ENDFPLIST +DRAW +S -40 150 40 -150 0 1 12 N +X ~ 1 0 250 100 D 60 60 1 1 P +X ~ 2 0 -250 100 U 60 60 1 1 P +ENDDRAW +ENDDEF +# +# VCVS +# +DEF VCVS E 0 40 Y Y 1 F N +F0 "E" -200 100 50 H V C CNN +F1 "VCVS" -200 -50 50 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +S -100 100 100 -100 0 1 0 N +X + 1 -300 50 200 R 35 35 1 1 P +X - 2 300 50 200 L 35 35 1 1 P +X +c 3 -50 -200 100 U 35 35 1 1 P +X -c 4 50 -200 100 U 35 35 1 1 P +ENDDRAW +ENDDEF +# +#End Library diff --git a/Examples/Integrator/ua741.bak b/Examples/Integrator/ua741.bak new file mode 100644 index 00000000..6be92803 --- /dev/null +++ b/Examples/Integrator/ua741.bak @@ -0,0 +1,208 @@ +EESchema Schematic File Version 2 date Monday 17 December 2012 11:17:01 AM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +LIBS:ua741-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "20 oct 2012" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +$Comp +L PORT U1 +U 3 1 5082C027 +P 6250 2500 +F 0 "U1" H 6250 2450 30 0000 C CNN +F 1 "PORT" H 6250 2500 30 0000 C CNN + 3 6250 2500 + -1 0 0 1 +$EndComp +$Comp +L PORT U1 +U 1 1 5082C011 +P 2300 3100 +F 0 "U1" H 2300 3050 30 0000 C CNN +F 1 "PORT" H 2300 3100 30 0000 C CNN + 1 2300 3100 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 2 1 5082C00B +P 2250 2600 +F 0 "U1" H 2250 2550 30 0000 C CNN +F 1 "PORT" H 2250 2600 30 0000 C CNN + 2 2250 2600 + 1 0 0 -1 +$EndComp +Connection ~ 3700 3200 +Wire Wire Line + 3450 3200 3700 3200 +Connection ~ 5000 3300 +Wire Wire Line + 3700 3300 5250 3300 +Wire Wire Line + 5250 3300 5250 3200 +Connection ~ 4550 3300 +Wire Wire Line + 5000 3300 5000 2950 +Connection ~ 3700 3300 +Wire Wire Line + 4550 3300 4550 3100 +Wire Wire Line + 3900 2500 3700 2500 +Wire Wire Line + 3700 2500 3700 2550 +Wire Wire Line + 3450 2900 3300 2900 +Wire Wire Line + 3300 2900 3300 3200 +Wire Wire Line + 3300 3200 2950 3200 +Connection ~ 2950 3100 +Wire Wire Line + 2950 3200 2950 3100 +Wire Wire Line + 3000 2600 2500 2600 +Wire Wire Line + 2550 3100 3000 3100 +Wire Wire Line + 2950 2600 2950 2500 +Connection ~ 2950 2600 +Wire Wire Line + 2950 2500 3300 2500 +Wire Wire Line + 3300 2500 3300 2800 +Wire Wire Line + 3300 2800 3450 2800 +Wire Wire Line + 3700 3150 3700 3400 +Wire Wire Line + 4550 2500 4550 2700 +Wire Wire Line + 4400 2500 5000 2500 +Wire Wire Line + 5000 2500 5000 2850 +Connection ~ 4550 2500 +Wire Wire Line + 5250 2600 5250 2500 +Wire Wire Line + 5250 2500 5350 2500 +Wire Wire Line + 5850 2500 6000 2500 +$Comp +L PWR_FLAG #FLG01 +U 1 1 508152A0 +P 3450 3200 +F 0 "#FLG01" H 3450 3470 30 0001 C CNN +F 1 "PWR_FLAG" H 3450 3430 30 0000 C CNN + 1 3450 3200 + 1 0 0 -1 +$EndComp +$Comp +L R Rout1 +U 1 1 50813F5B +P 5600 2500 +F 0 "Rout1" V 5680 2500 50 0000 C CNN +F 1 "75" V 5600 2500 50 0000 C CNN + 1 5600 2500 + 0 1 1 0 +$EndComp +$Comp +L VCVS Eout1 +U 1 1 50813F0F +P 5200 2900 +F 0 "Eout1" H 5000 3000 50 0000 C CNN +F 1 "1" H 5000 2850 50 0000 C CNN + 1 5200 2900 + 0 1 1 0 +$EndComp +$Comp +L C Cbw1 +U 1 1 50813EE0 +P 4550 2900 +F 0 "Cbw1" H 4600 3000 50 0000 L CNN +F 1 "31.85e-9" H 4600 2800 50 0000 L CNN + 1 4550 2900 + 1 0 0 -1 +$EndComp +$Comp +L R Rbw1 +U 1 1 50813EAB +P 4150 2500 +F 0 "Rbw1" V 4230 2500 50 0000 C CNN +F 1 "0.5e6" V 4150 2500 50 0000 C CNN + 1 4150 2500 + 0 1 1 0 +$EndComp +$Comp +L GND #PWR02 +U 1 1 50813E0D +P 3700 3400 +F 0 "#PWR02" H 3700 3400 30 0001 C CNN +F 1 "GND" H 3700 3330 30 0001 C CNN + 1 3700 3400 + 1 0 0 -1 +$EndComp +$Comp +L VCVS Ein1 +U 1 1 50813D7C +P 3650 2850 +F 0 "Ein1" H 3450 2950 50 0000 C CNN +F 1 "100e3" H 3450 2800 50 0000 C CNN + 1 3650 2850 + 0 1 1 0 +$EndComp +$Comp +L R Rin1 +U 1 1 50813C57 +P 3000 2850 +F 0 "Rin1" V 3080 2850 50 0000 C CNN +F 1 "2e6" V 3000 2850 50 0000 C CNN + 1 3000 2850 + 1 0 0 -1 +$EndComp +$EndSCHEMATC diff --git a/Examples/Integrator/ua741.cir b/Examples/Integrator/ua741.cir new file mode 100644 index 00000000..de797429 --- /dev/null +++ b/Examples/Integrator/ua741.cir @@ -0,0 +1,15 @@ +* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 17 December 2012 11:16:58 AM IST + +* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N +* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +*Sheet Name:/ +U1 6 7 3 PORT +Rout1 3 2 75 +Eout1 2 0 1 0 1 +Cbw1 1 0 31.85e-9 +Rbw1 1 4 0.5e6 +Ein1 4 0 7 6 100e3 +Rin1 7 6 2e6 + +.end diff --git a/Examples/Integrator/ua741.cir.ckt b/Examples/Integrator/ua741.cir.ckt new file mode 100644 index 00000000..3661a9a2 --- /dev/null +++ b/Examples/Integrator/ua741.cir.ckt @@ -0,0 +1,9 @@ +* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist + +u1 6 7 3 port +rout1 3 2 75 +eout1 2 0 1 0 1 +cbw1 1 0 31.85e-9 +rbw1 1 4 0.5e6 +ein1 4 0 7 6 100e3 +rin1 7 6 2e6 diff --git a/Examples/Integrator/ua741.cir.out b/Examples/Integrator/ua741.cir.out new file mode 100644 index 00000000..72e68514 --- /dev/null +++ b/Examples/Integrator/ua741.cir.out @@ -0,0 +1,18 @@ +* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist + +* u1 6 7 3 port +rout1 3 2 75 +eout1 2 0 1 0 1 +cbw1 1 0 31.85e-9 +rbw1 1 4 0.5e6 +ein1 4 0 7 6 100e3 +rin1 7 6 2e6 +.ac lin 0 0Hz 0Hz + +* Control Statements +.control +run +print allv > plot_data_v.txt +print alli > plot_data_i.txt +.endc +.end diff --git a/Examples/Integrator/ua741.pro b/Examples/Integrator/ua741.pro new file mode 100644 index 00000000..5dbb81a5 --- /dev/null +++ b/Examples/Integrator/ua741.pro @@ -0,0 +1,72 @@ +update=Monday 17 December 2012 06:14:06 PM IST +last_client=eeschema +[eeschema] +version=1 +LibDir=/home/yogesh/FreeEDA/library +NetFmt=1 +HPGLSpd=20 +HPGLDm=15 +HPGLNum=1 +offX_A4=0 +offY_A4=0 +offX_A3=0 +offY_A3=0 +offX_A2=0 +offY_A2=0 +offX_A1=0 +offY_A1=0 +offX_A0=0 +offY_A0=0 +offX_A=0 +offY_A=0 +offX_B=0 +offY_B=0 +offX_C=0 +offY_C=0 +offX_D=0 +offY_D=0 +offX_E=0 +offY_E=0 +RptD_X=0 +RptD_Y=100 +RptLab=1 +LabSize=60 +[eeschema/libraries] +LibName1=power +LibName2=device +LibName3=transistors +LibName4=conn +LibName5=linear +LibName6=regul +LibName7=74xx +LibName8=cmos4000 +LibName9=adc-dac +LibName10=memory +LibName11=xilinx +LibName12=special +LibName13=microcontrollers +LibName14=dsp +LibName15=microchip +LibName16=analog_switches +LibName17=motorola +LibName18=texas +LibName19=intel +LibName20=audio +LibName21=interface +LibName22=digital-audio +LibName23=philips +LibName24=display +LibName25=cypress +LibName26=siliconi +LibName27=opto +LibName28=atmel +LibName29=contrib +LibName30=valves +LibName31=analogSpice +LibName32=converterSpice +LibName33=digitalSpice +LibName34=linearSpice +LibName35=measurementSpice +LibName36=portSpice +LibName37=sourcesSpice +LibName38=analogXSpice diff --git a/Examples/Integrator/ua741.sch b/Examples/Integrator/ua741.sch new file mode 100644 index 00000000..7dfc5e1a --- /dev/null +++ b/Examples/Integrator/ua741.sch @@ -0,0 +1,219 @@ +EESchema Schematic File Version 2 date Wednesday 19 December 2012 10:15:16 AM IST +LIBS:power +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:analogSpice +LIBS:converterSpice +LIBS:digitalSpice +LIBS:linearSpice +LIBS:measurementSpice +LIBS:portSpice +LIBS:sourcesSpice +LIBS:analogXSpice +LIBS:ua741-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11700 8267 +encoding utf-8 +Sheet 1 1 +Title "" +Date "19 dec 2012" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Text Notes 3800 2400 0 60 ~ 0 +Op-Amp +Text Notes 3750 2850 0 60 ~ 0 +VCCS +Text Notes 5800 2500 0 60 ~ 0 +out +Text Notes 2750 3100 0 60 ~ 0 +- +Text Notes 2700 2600 0 60 ~ 0 ++ +$Comp +L PORT U1 +U 6 1 5082C027 +P 6250 2500 +F 0 "U1" H 6250 2450 30 0000 C CNN +F 1 "PORT" H 6250 2500 30 0000 C CNN + 6 6250 2500 + -1 0 0 1 +$EndComp +$Comp +L PORT U1 +U 2 1 5082C011 +P 2300 3100 +F 0 "U1" H 2300 3050 30 0000 C CNN +F 1 "PORT" H 2300 3100 30 0000 C CNN + 2 2300 3100 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 3 1 5082C00B +P 2250 2600 +F 0 "U1" H 2250 2550 30 0000 C CNN +F 1 "PORT" H 2250 2600 30 0000 C CNN + 3 2250 2600 + 1 0 0 -1 +$EndComp +Connection ~ 3700 3200 +Wire Wire Line + 3450 3200 3700 3200 +Connection ~ 5000 3300 +Wire Wire Line + 3700 3300 5250 3300 +Wire Wire Line + 5250 3300 5250 3200 +Connection ~ 4550 3300 +Wire Wire Line + 5000 3300 5000 2950 +Connection ~ 3700 3300 +Wire Wire Line + 4550 3300 4550 3100 +Wire Wire Line + 3900 2500 3700 2500 +Wire Wire Line + 3700 2500 3700 2550 +Wire Wire Line + 3450 2900 3300 2900 +Wire Wire Line + 3300 2900 3300 3200 +Wire Wire Line + 3300 3200 2950 3200 +Connection ~ 2950 3100 +Wire Wire Line + 2950 3200 2950 3100 +Wire Wire Line + 3000 2600 2500 2600 +Wire Wire Line + 2550 3100 3000 3100 +Wire Wire Line + 2950 2600 2950 2500 +Connection ~ 2950 2600 +Wire Wire Line + 2950 2500 3300 2500 +Wire Wire Line + 3300 2500 3300 2800 +Wire Wire Line + 3300 2800 3450 2800 +Wire Wire Line + 3700 3150 3700 3400 +Wire Wire Line + 4550 2500 4550 2700 +Wire Wire Line + 4400 2500 5000 2500 +Wire Wire Line + 5000 2500 5000 2850 +Connection ~ 4550 2500 +Wire Wire Line + 5250 2600 5250 2500 +Wire Wire Line + 5250 2500 5350 2500 +Wire Wire Line + 5850 2500 6000 2500 +$Comp +L PWR_FLAG #FLG01 +U 1 1 508152A0 +P 3450 3200 +F 0 "#FLG01" H 3450 3470 30 0001 C CNN +F 1 "PWR_FLAG" H 3450 3430 30 0000 C CNN + 1 3450 3200 + 1 0 0 -1 +$EndComp +$Comp +L R Rout1 +U 1 1 50813F5B +P 5600 2500 +F 0 "Rout1" V 5680 2500 50 0000 C CNN +F 1 "75" V 5600 2500 50 0000 C CNN + 1 5600 2500 + 0 1 1 0 +$EndComp +$Comp +L VCVS Eout1 +U 1 1 50813F0F +P 5200 2900 +F 0 "Eout1" H 5000 3000 50 0000 C CNN +F 1 "1" H 5000 2850 50 0000 C CNN + 1 5200 2900 + 0 1 1 0 +$EndComp +$Comp +L C Cbw1 +U 1 1 50813EE0 +P 4550 2900 +F 0 "Cbw1" H 4600 3000 50 0000 L CNN +F 1 "31.85e-9" H 4600 2800 50 0000 L CNN + 1 4550 2900 + 1 0 0 -1 +$EndComp +$Comp +L R Rbw1 +U 1 1 50813EAB +P 4150 2500 +F 0 "Rbw1" V 4230 2500 50 0000 C CNN +F 1 "0.5e6" V 4150 2500 50 0000 C CNN + 1 4150 2500 + 0 1 1 0 +$EndComp +$Comp +L GND #PWR02 +U 1 1 50813E0D +P 3700 3400 +F 0 "#PWR02" H 3700 3400 30 0001 C CNN +F 1 "GND" H 3700 3330 30 0001 C CNN + 1 3700 3400 + 1 0 0 -1 +$EndComp +$Comp +L VCVS Ein1 +U 1 1 50813D7C +P 3650 2850 +F 0 "Ein1" H 3450 2950 50 0000 C CNN +F 1 "100e3" H 3450 2800 50 0000 C CNN + 1 3650 2850 + 0 1 1 0 +$EndComp +$Comp +L R Rin1 +U 1 1 50813C57 +P 3000 2850 +F 0 "Rin1" V 3080 2850 50 0000 C CNN +F 1 "2e6" V 3000 2850 50 0000 C CNN + 1 3000 2850 + 1 0 0 -1 +$EndComp +$EndSCHEMATC diff --git a/Examples/Integrator/ua741.sub b/Examples/Integrator/ua741.sub new file mode 100644 index 00000000..ad26c001 --- /dev/null +++ b/Examples/Integrator/ua741.sub @@ -0,0 +1,12 @@ +* Subcircuit ua741 +.subckt ua741 6 7 3 +* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist +rout1 3 2 75 +eout1 2 0 1 0 1 +cbw1 1 0 31.85e-9 +rbw1 1 4 0.5e6 +ein1 4 0 7 6 100e3 +rin1 7 6 2e6 +* Control Statements + +.ends ua741
\ No newline at end of file diff --git a/Examples/Integrator/ua741_Previous_Values.xml b/Examples/Integrator/ua741_Previous_Values.xml new file mode 100644 index 00000000..9c7bb530 --- /dev/null +++ b/Examples/Integrator/ua741_Previous_Values.xml @@ -0,0 +1 @@ +<KicadtoNgspice><source /><model /><devicemodel /><analysis><ac><field1 name="Lin">true</field1><field2 name="Dec">false</field2><field3 name="Oct">false</field3><field4 name="Start Frequency" /><field5 name="Stop Frequency" /><field6 name="No. of points" /><field7 name="Start Fre Combo">Hz</field7><field8 name="Stop Fre Combo">Hz</field8></ac><dc><field1 name="Source Name" /><field2 name="Start" /><field3 name="Increment" /><field4 name="Stop" /><field5 name="Operating Point">False</field5><field6 name="Start Combo">Volts or Amperes</field6><field7 name="Increment Combo">Volts or Amperes</field7><field8 name="Stop Combo">Volts or Amperes</field8></dc><tran><field1 name="Start Time" /><field2 name="Step Time" /><field3 name="Stop Time" /><field4 name="Start Combo">Sec</field4><field5 name="Step Combo">Sec</field5><field6 name="Stop Combo">Sec</field6></tran></analysis></KicadtoNgspice>
\ No newline at end of file |