summaryrefslogtreecommitdiff
path: root/Examples/Halfwave_Rectifier/Halfwave_Rectifier.bak
diff options
context:
space:
mode:
Diffstat (limited to 'Examples/Halfwave_Rectifier/Halfwave_Rectifier.bak')
-rw-r--r--Examples/Halfwave_Rectifier/Halfwave_Rectifier.bak111
1 files changed, 93 insertions, 18 deletions
diff --git a/Examples/Halfwave_Rectifier/Halfwave_Rectifier.bak b/Examples/Halfwave_Rectifier/Halfwave_Rectifier.bak
index da840534..78b51d36 100644
--- a/Examples/Halfwave_Rectifier/Halfwave_Rectifier.bak
+++ b/Examples/Halfwave_Rectifier/Halfwave_Rectifier.bak
@@ -1,12 +1,15 @@
EESchema Schematic File Version 2
-LIBS:eSim_Subckt
-LIBS:eSim_Sources
-LIBS:eSim_Hybrid
-LIBS:eSim_Digital
-LIBS:eSim_Devices
LIBS:eSim_Analog
+LIBS:eSim_Devices
+LIBS:eSim_Digital
+LIBS:eSim_Hybrid
LIBS:eSim_Miscellaneous
+LIBS:eSim_Plot
+LIBS:eSim_Power
+LIBS:eSim_Sources
+LIBS:eSim_Subckt
LIBS:eSim_User
+LIBS:Halfwave_Rectifier-rescue
LIBS:power
LIBS:device
LIBS:transistors
@@ -63,7 +66,7 @@ F 3 "" H 5700 2900 60 0000 C CNN
1 0 0 -1
$EndComp
$Comp
-L R R1
+L R-RESCUE-Halfwave_Rectifier R1
U 1 1 5593CC2C
P 6300 3350
F 0 "R1" V 6380 3350 50 0000 C CNN
@@ -76,12 +79,12 @@ $EndComp
$Comp
L sine v1
U 1 1 5593CC81
-P 5050 3400
-F 0 "v1" H 4850 3500 60 0000 C CNN
-F 1 "sine" H 4850 3350 60 0000 C CNN
-F 2 "R1" H 4750 3400 60 0000 C CNN
-F 3 "" H 5050 3400 60 0000 C CNN
- 1 5050 3400
+P 3800 3450
+F 0 "v1" H 3600 3550 60 0000 C CNN
+F 1 "sine" H 3600 3400 60 0000 C CNN
+F 2 "R1" H 3500 3450 60 0000 C CNN
+F 3 "" H 3800 3450 60 0000 C CNN
+ 1 3800 3450
1 0 0 -1
$EndComp
$Comp
@@ -96,7 +99,7 @@ F 3 "" H 5700 4050 60 0000 C CNN
1 0 0 -1
$EndComp
Wire Wire Line
- 5050 2950 5050 2900
+ 5050 2900 5050 3200
Wire Wire Line
5050 2900 5550 2900
Wire Wire Line
@@ -108,7 +111,7 @@ Wire Wire Line
Wire Wire Line
6300 3900 5050 3900
Wire Wire Line
- 5050 3900 5050 3850
+ 5050 3900 5050 3600
Wire Wire Line
5700 3800 5700 4050
Connection ~ 5700 3900
@@ -123,18 +126,90 @@ F 3 "" H 5700 3800 60 0000 C CNN
1 5700 3800
1 0 0 -1
$EndComp
-Text GLabel 5200 2750 0 60 Input ~ 0
+Text GLabel 5000 2750 0 60 Input ~ 0
IN
-Text GLabel 6200 2800 2 60 Input ~ 0
+Text GLabel 6400 2800 2 60 Input ~ 0
OUT
Wire Wire Line
- 5200 2750 5250 2750
+ 5000 2750 5250 2750
Wire Wire Line
5250 2750 5250 2900
Connection ~ 5250 2900
Wire Wire Line
- 6200 2800 6100 2800
+ 6100 2800 6400 2800
Wire Wire Line
6100 2800 6100 2900
Connection ~ 6100 2900
+$Comp
+L plot_v1 U2
+U 1 1 56D86A9A
+P 5100 2900
+F 0 "U2" H 5100 3400 60 0000 C CNN
+F 1 "plot_v1" H 5300 3250 60 0000 C CNN
+F 2 "" H 5100 2900 60 0000 C CNN
+F 3 "" H 5100 2900 60 0000 C CNN
+ 1 5100 2900
+ 1 0 0 -1
+$EndComp
+$Comp
+L plot_v1 U3
+U 1 1 56D86ADF
+P 6300 2950
+F 0 "U3" H 6300 3450 60 0000 C CNN
+F 1 "plot_v1" H 6500 3300 60 0000 C CNN
+F 2 "" H 6300 2950 60 0000 C CNN
+F 3 "" H 6300 2950 60 0000 C CNN
+ 1 6300 2950
+ 1 0 0 -1
+$EndComp
+$Comp
+L TRANSFO U1
+U 1 1 56D86BA7
+P 4650 3400
+F 0 "U1" H 4650 3650 50 0000 C CNN
+F 1 "TRANSFO" H 4650 3100 50 0000 C CNN
+F 2 "" H 4650 3400 50 0000 C CNN
+F 3 "" H 4650 3400 50 0000 C CNN
+ 1 4650 3400
+ 1 0 0 -1
+$EndComp
+Wire Wire Line
+ 4250 3600 4250 4000
+Wire Wire Line
+ 4250 4000 3800 4000
+Wire Wire Line
+ 3800 4000 3800 3900
+$Comp
+L GND #PWR03
+U 1 1 56D86C55
+P 4050 4050
+F 0 "#PWR03" H 4050 3800 50 0001 C CNN
+F 1 "GND" H 4050 3900 50 0000 C CNN
+F 2 "" H 4050 4050 60 0000 C CNN
+F 3 "" H 4050 4050 60 0000 C CNN
+ 1 4050 4050
+ 1 0 0 -1
+$EndComp
+Wire Wire Line
+ 4050 4050 4050 4000
+Connection ~ 4050 4000
+Wire Wire Line
+ 4250 3200 4250 2950
+Wire Wire Line
+ 4250 2950 3800 2950
+Wire Wire Line
+ 3800 2950 3800 3000
+Wire Wire Line
+ 5100 2700 5100 2750
+Connection ~ 5100 2750
+Wire Wire Line
+ 6300 2750 6300 2800
+Connection ~ 6300 2800
+Text GLabel 3900 2700 0 60 Input ~ 0
+Supply
+Wire Wire Line
+ 3900 2700 4000 2700
+Wire Wire Line
+ 4000 2700 4000 2950
+Connection ~ 4000 2950
$EndSCHEMATC