diff options
Diffstat (limited to 'Examples/HalfwaveRectifier_SCR')
| -rwxr-xr-x | Examples/HalfwaveRectifier_SCR/D.lib | 20 | ||||
| -rw-r--r-- | Examples/HalfwaveRectifier_SCR/HalfwaveRectifier_SCR-cache.lib | 134 | ||||
| -rw-r--r-- | Examples/HalfwaveRectifier_SCR/HalfwaveRectifier_SCR.bak | 201 | ||||
| -rw-r--r-- | Examples/HalfwaveRectifier_SCR/PowerDiode.lib | 21 | ||||
| -rw-r--r-- | Examples/HalfwaveRectifier_SCR/scr.bak | 243 | ||||
| -rw-r--r-- | Examples/HalfwaveRectifier_SCR/scr.cir.ckt | 19 | ||||
| -rw-r--r-- | Examples/HalfwaveRectifier_SCR/scr.cir.out~ | 29 | ||||
| -rw-r--r-- | Examples/HalfwaveRectifier_SCR/scr.sub~ | 23 |
8 files changed, 1 insertions, 689 deletions
diff --git a/Examples/HalfwaveRectifier_SCR/D.lib b/Examples/HalfwaveRectifier_SCR/D.lib deleted file mode 100755 index ef18bb50..00000000 --- a/Examples/HalfwaveRectifier_SCR/D.lib +++ /dev/null @@ -1,20 +0,0 @@ -.MODEL D1N750 D( -+ Vj=.75 -+ Nbvl=14.976 -+ Cjo=175p -+ Rs=.25 -+ Isr=1.859n -+ Eg=1.11 -+ M=.5516 -+ Nbv=1.6989 -+ N=1 -+ Tbv1=-21.277u -+ Bv=8.1 -+ Fc=.5 -+ Ikf=0 -+ Nr=2 -+ Ibv=20.245m -+ Is=880.5E-18 -+ Xti=3 -+ Ibvl=1.9556m -)
\ No newline at end of file diff --git a/Examples/HalfwaveRectifier_SCR/HalfwaveRectifier_SCR-cache.lib b/Examples/HalfwaveRectifier_SCR/HalfwaveRectifier_SCR-cache.lib deleted file mode 100644 index 89d2a843..00000000 --- a/Examples/HalfwaveRectifier_SCR/HalfwaveRectifier_SCR-cache.lib +++ /dev/null @@ -1,134 +0,0 @@ -EESchema-LIBRARY Version 2.3 -#encoding utf-8 -# -# GND -# -DEF GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 -250 50 H I C CNN -F1 "GND" 0 -150 50 H V C CNN -F2 "" 0 0 50 H V C CNN -F3 "" 0 0 50 H V C CNN -DRAW -P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N -X GND 1 0 0 0 D 50 50 1 1 W N -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 95 50 H I C CNN -F1 "PWR_FLAG" 0 180 50 H V C CNN -F2 "" 0 0 50 H V C CNN -F3 "" 0 0 50 H V C CNN -DRAW -X pwr 1 0 0 0 U 50 50 0 0 w -P 6 0 1 0 0 0 0 50 -75 100 0 150 75 100 0 50 N -ENDDRAW -ENDDEF -# -# R -# -DEF R R 0 0 N Y 1 F N -F0 "R" 50 130 50 H V C CNN -F1 "R" 50 50 50 H V C CNN -F2 "" 50 -20 30 H V C CNN -F3 "" 50 50 30 V V C CNN -$FPLIST - R_* - Resistor_* -$ENDFPLIST -DRAW -S 150 10 -50 90 0 1 10 N -X ~ 1 -100 50 50 R 60 60 1 1 P -X ~ 2 200 50 50 L 60 60 1 1 P -ENDDRAW -ENDDEF -# -# SCR -# -DEF SCR X 0 10 Y N 1 F N -F0 "X" 150 200 50 H V C CNN -F1 "SCR" 150 -350 50 H V C CNN -F2 "" 0 0 60 H V C CNN -F3 "" 0 0 60 H V C CNN -DRAW -P 2 0 0 0 -200 -150 200 -150 N -P 2 0 1 0 0 -150 -200 -400 N -P 3 0 1 0 -150 100 150 100 0 -150 F -X K 1 0 -550 400 U 60 70 1 1 I -X G 2 -350 -400 150 R 60 60 1 1 I -X A 3 0 400 300 D 60 60 1 1 I -ENDDRAW -ENDDEF -# -# plot_v1 -# -DEF plot_v1 U 0 40 Y Y 1 F N -F0 "U" 0 500 60 H V C CNN -F1 "plot_v1" 200 350 60 H V C CNN -F2 "" 0 0 60 H V C CNN -F3 "" 0 0 60 H V C CNN -DRAW -C 0 500 100 0 1 0 N -X ~ ~ 0 200 200 U 50 50 1 1 I -ENDDRAW -ENDDEF -# -# plot_v2 -# -DEF plot_v2 U 0 40 Y Y 1 F N -F0 "U" 0 400 60 H V C CNN -F1 "plot_v2" 0 100 60 H V C CNN -F2 "" 0 0 60 H V C CNN -F3 "" 0 0 60 H V C CNN -DRAW -C 0 250 100 0 1 0 N -X + 1 -300 250 200 R 50 50 1 1 I -X - 2 300 250 200 L 50 50 1 1 I -ENDDRAW -ENDDEF -# -# pulse -# -DEF pulse v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "pulse" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -F3 "" 0 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -A -25 -450 501 928 871 0 1 0 N -50 50 0 50 -A 25 400 451 -931 -868 0 1 0 N 0 -50 50 -50 -A 75 600 551 -926 -873 0 1 0 N 50 50 100 50 -A 350 0 403 -1728 1728 0 1 0 N -50 -50 -50 50 -A 450 0 453 1736 -1736 0 1 0 N 0 50 0 -50 -A 600 0 552 -1748 1748 0 1 0 N 50 -50 50 50 -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# sine -# -DEF sine v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "sine" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -F3 "" 0 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -A -50 0 50 1 1799 0 1 0 N 0 0 -100 0 -A 50 0 50 -1799 -1 0 1 0 N 0 0 100 0 -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 0 1 1 I -X - 2 0 -450 300 U 50 0 1 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/Examples/HalfwaveRectifier_SCR/HalfwaveRectifier_SCR.bak b/Examples/HalfwaveRectifier_SCR/HalfwaveRectifier_SCR.bak deleted file mode 100644 index c3bb45a5..00000000 --- a/Examples/HalfwaveRectifier_SCR/HalfwaveRectifier_SCR.bak +++ /dev/null @@ -1,201 +0,0 @@ -EESchema Schematic File Version 2 -LIBS:hwr6-rescue -LIBS:eSim_Analog -LIBS:eSim_Devices -LIBS:eSim_Digital -LIBS:eSim_Hybrid -LIBS:eSim_Miscellaneous -LIBS:eSim_Plot -LIBS:eSim_Power -LIBS:eSim_Sources -LIBS:eSim_Subckt -LIBS:eSim_User -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:hwr6-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11693 8268 -encoding utf-8 -Sheet 1 1 -Title "" -Date "8 oct 2014" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -$Comp -L PWR_FLAG #FLG01 -U 1 1 5434D319 -P 4800 5850 -F 0 "#FLG01" H 4800 6120 30 0001 C CNN -F 1 "PWR_FLAG" H 4800 6080 30 0000 C CNN -F 2 "" H 4800 5850 60 0001 C CNN -F 3 "" H 4800 5850 60 0001 C CNN - 1 4800 5850 - 0 1 1 0 -$EndComp -$Comp -L GND #PWR02 -U 1 1 5434D2C9 -P 4800 5850 -F 0 "#PWR02" H 4800 5850 30 0001 C CNN -F 1 "GND" H 4800 5780 30 0001 C CNN -F 2 "" H 4800 5850 60 0001 C CNN -F 3 "" H 4800 5850 60 0001 C CNN - 1 4800 5850 - 1 0 0 -1 -$EndComp -$Comp -L SCR-RESCUE-hwr6 x3 -U 1 1 5434D257 -P 5050 3600 -F 0 "x3" H 5200 3850 70 0000 C CNN -F 1 "SCR" H 5200 3250 70 0000 C CNN -F 2 "" H 5050 3600 60 0001 C CNN -F 3 "" H 5050 3600 60 0001 C CNN - 1 5050 3600 - 0 -1 -1 0 -$EndComp -$Comp -L sine v1 -U 1 1 565D969C -P 3450 4500 -F 0 "v1" H 3250 4600 60 0000 C CNN -F 1 "sine" H 3250 4450 60 0000 C CNN -F 2 "R1" H 3150 4500 60 0000 C CNN -F 3 "" H 3450 4500 60 0000 C CNN - 1 3450 4500 - 1 0 0 -1 -$EndComp -$Comp -L pulse v2 -U 1 1 565D9705 -P 5450 4800 -F 0 "v2" H 5250 4900 60 0000 C CNN -F 1 "pulse" H 5250 4750 60 0000 C CNN -F 2 "R1" H 5150 4800 60 0000 C CNN -F 3 "" H 5450 4800 60 0000 C CNN - 1 5450 4800 - 1 0 0 -1 -$EndComp -Text GLabel 3100 3600 0 60 Input ~ 0 -in -Text GLabel 5300 4150 0 60 Input ~ 0 -pulse -$Comp -L R R1 -U 1 1 565FDC66 -P 4050 3650 -F 0 "R1" H 4100 3780 50 0000 C CNN -F 1 "100" H 4100 3700 50 0000 C CNN -F 2 "" H 4100 3630 30 0000 C CNN -F 3 "" V 4100 3700 30 0000 C CNN - 1 4050 3650 - 1 0 0 -1 -$EndComp -Text GLabel 4550 3250 2 60 Input ~ 0 -A -$Comp -L plot_v2 U2 -U 1 1 56D86DB4 -P 4050 3450 -F 0 "U2" H 4050 3850 60 0000 C CNN -F 1 "plot_v2" H 4050 3550 60 0000 C CNN -F 2 "" H 4050 3450 60 0000 C CNN -F 3 "" H 4050 3450 60 0000 C CNN - 1 4050 3450 - 1 0 0 -1 -$EndComp -$Comp -L plot_v1 U1 -U 1 1 56D86E1D -P 3250 3700 -F 0 "U1" H 3250 4200 60 0000 C CNN -F 1 "plot_v1" H 3450 4050 60 0000 C CNN -F 2 "" H 3250 3700 60 0000 C CNN -F 3 "" H 3250 3700 60 0000 C CNN - 1 3250 3700 - -1 0 0 -1 -$EndComp -$Comp -L plot_v1 U3 -U 1 1 56D86EC3 -P 5650 4350 -F 0 "U3" H 5650 4850 60 0000 C CNN -F 1 "plot_v1" H 5850 4700 60 0000 C CNN -F 2 "" H 5650 4350 60 0000 C CNN -F 3 "" H 5650 4350 60 0000 C CNN - 1 5650 4350 - 1 0 0 -1 -$EndComp -Connection ~ 4800 5650 -Wire Wire Line - 4800 5850 4800 5650 -Wire Wire Line - 3450 4950 3450 5650 -Wire Wire Line - 3450 5650 6050 5650 -Connection ~ 3450 3600 -Wire Wire Line - 3450 3200 3450 4050 -Connection ~ 5450 5650 -Wire Wire Line - 5600 3600 6050 3600 -Wire Wire Line - 5450 3950 5450 4350 -Wire Wire Line - 5300 4150 5650 4150 -Connection ~ 5450 4150 -Wire Wire Line - 5450 5250 5450 5650 -Wire Wire Line - 6050 3600 6050 5650 -Wire Wire Line - 3100 3600 3950 3600 -Wire Wire Line - 4250 3600 4650 3600 -Wire Wire Line - 4450 3200 4450 3600 -Connection ~ 4450 3600 -Wire Wire Line - 4350 3200 4450 3200 -Wire Wire Line - 3750 3200 3450 3200 -Wire Wire Line - 3250 3500 3250 3600 -Connection ~ 3250 3600 -Wire Wire Line - 4550 3250 4450 3250 -Connection ~ 4450 3250 -$EndSCHEMATC diff --git a/Examples/HalfwaveRectifier_SCR/PowerDiode.lib b/Examples/HalfwaveRectifier_SCR/PowerDiode.lib index a2f61dce..d6fb6469 100644 --- a/Examples/HalfwaveRectifier_SCR/PowerDiode.lib +++ b/Examples/HalfwaveRectifier_SCR/PowerDiode.lib @@ -1,20 +1 @@ -.MODEL PowerDiode D( -+ Vj=.75 -+ Nbvl=14.976 -+ Cjo=175p -+ Rs=.25 -+ Isr=1.859n -+ Eg=1.11 -+ M=.5516 -+ Nbv=1.6989 -+ N=1 -+ Tbv1=-21.277u -+ bv=1800 -+ Fc=.5 -+ Ikf=0 -+ Nr=2 -+ Ibv=20.245m -+ Is=2.2E-15 -+ Xti=3 -+ Ibvl=1.9556m -)
\ No newline at end of file +.MODEL PowerDiode D( Vj=.75 Nbvl=14.976 Cjo=175p Rs=.25 Isr=1.859n Eg=1.11 M=.5516 Nbv=1.6989 N=1 Tbv1=-21.277u bv=1800 Fc=.5 Ikf=0 Nr=2 Ibv=20.245m Is=2.2E-15 Xti=3 Ibvl=1.9556m ) diff --git a/Examples/HalfwaveRectifier_SCR/scr.bak b/Examples/HalfwaveRectifier_SCR/scr.bak deleted file mode 100644 index 58b985d9..00000000 --- a/Examples/HalfwaveRectifier_SCR/scr.bak +++ /dev/null @@ -1,243 +0,0 @@ -EESchema Schematic File Version 2 -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:eSim_Analog -LIBS:scr-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11693 8268 -encoding utf-8 -Sheet 1 1 -Title "" -Date "21 aug 2014" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Wire Wire Line - 3600 3250 3600 3150 -Connection ~ 5550 4950 -Wire Wire Line - 5800 3900 5800 3850 -Wire Wire Line - 5800 3850 6150 3850 -Wire Wire Line - 6150 3850 6150 4950 -Wire Wire Line - 6150 4950 3600 4950 -Connection ~ 4300 4950 -Wire Wire Line - 4300 4950 4300 4050 -Wire Wire Line - 4300 4050 3850 4050 -Wire Wire Line - 4700 5950 4700 5450 -Wire Wire Line - 4250 5950 4250 5500 -Connection ~ 4250 4950 -Wire Wire Line - 4250 5000 4250 4950 -Wire Wire Line - 5550 3600 5550 3450 -Wire Wire Line - 5550 4950 5550 4250 -Wire Wire Line - 3600 4950 3600 4400 -Wire Wire Line - 3600 2650 3600 2300 -Wire Wire Line - 3600 2300 3150 2300 -Wire Wire Line - 3600 4150 3600 4300 -Wire Wire Line - 5550 4150 5550 4000 -Wire Wire Line - 5550 2550 5550 2250 -Wire Wire Line - 4700 5050 4700 4950 -Connection ~ 4700 4950 -Wire Wire Line - 6650 2000 6650 5950 -Connection ~ 4700 5950 -Wire Wire Line - 3850 4650 3850 5950 -Wire Wire Line - 3850 5950 6650 5950 -Connection ~ 4250 5950 -Wire Wire Line - 5800 4500 5800 5950 -Connection ~ 5800 5950 -$Comp -L PORT U2 -U 3 1 53F4C93D -P 6650 2250 -F 0 "U2" H 6650 2200 30 0000 C CNN -F 1 "PORT" H 6650 2250 30 0000 C CNN -F 2 "" H 6650 2250 60 0001 C CNN -F 3 "" H 6650 2250 60 0001 C CNN - 3 6650 2250 - -1 0 0 1 -$EndComp -$Comp -L PORT U2 -U 2 1 53F4C934 -P 2900 2300 -F 0 "U2" H 2900 2250 30 0000 C CNN -F 1 "PORT" H 2900 2300 30 0000 C CNN -F 2 "" H 2900 2300 60 0001 C CNN -F 3 "" H 2900 2300 60 0001 C CNN - 2 2900 2300 - 1 0 0 -1 -$EndComp -$Comp -L PORT U2 -U 1 1 53F4C92A -P 6400 4950 -F 0 "U2" H 6400 4900 30 0000 C CNN -F 1 "PORT" H 6400 4950 30 0000 C CNN -F 2 "" H 6400 4950 60 0001 C CNN -F 3 "" H 6400 4950 60 0001 C CNN - 1 6400 4950 - -1 0 0 1 -$EndComp -$Comp -L CCCS F2 -U 1 1 53F4C735 -P 5750 4200 -F 0 "F2" H 5550 4300 50 0000 C CNN -F 1 "100" H 5550 4150 50 0000 C CNN -F 2 "" H 5750 4200 60 0001 C CNN -F 3 "" H 5750 4200 60 0001 C CNN - 1 5750 4200 - 0 1 1 0 -$EndComp -$Comp -L DIODE D1 -U 1 1 53F4C6D9 -P 5550 3800 -F 0 "D1" H 5550 3900 40 0000 C CNN -F 1 "D" H 5550 3700 40 0000 C CNN -F 2 "" H 5550 3800 60 0001 C CNN -F 3 "" H 5550 3800 60 0001 C CNN - 1 5550 3800 - 0 1 1 0 -$EndComp -$Comp -L C C1 -U 1 1 53F4C6C2 -P 4700 5250 -F 0 "C1" H 4750 5350 50 0000 L CNN -F 1 "10u" H 4750 5150 50 0000 L CNN -F 2 "" H 4700 5250 60 0001 C CNN -F 3 "" H 4700 5250 60 0001 C CNN - 1 4700 5250 - 1 0 0 -1 -$EndComp -$Comp -L R R2 -U 1 1 53F4C6BB -P 4250 5250 -F 0 "R2" V 4330 5250 50 0000 C CNN -F 1 "1" V 4250 5250 50 0000 C CNN -F 2 "" H 4250 5250 60 0001 C CNN -F 3 "" H 4250 5250 60 0001 C CNN - 1 4250 5250 - 1 0 0 -1 -$EndComp -$Comp -L CCCS F1 -U 1 1 53F4C67F -P 3800 4350 -F 0 "F1" H 3600 4450 50 0000 C CNN -F 1 "10" H 3600 4300 50 0000 C CNN -F 2 "" H 3800 4350 60 0001 C CNN -F 3 "" H 3800 4350 60 0001 C CNN - 1 3800 4350 - 0 1 1 0 -$EndComp -$Comp -L R R1 -U 1 1 53F4C5C9 -P 3600 2900 -F 0 "R1" V 3680 2900 50 0000 C CNN -F 1 "50" V 3600 2900 50 0000 C CNN -F 2 "" H 3600 2900 60 0001 C CNN -F 3 "" H 3600 2900 60 0001 C CNN - 1 3600 2900 - 1 0 0 -1 -$EndComp -$Comp -L dc v1 -U 1 1 565DBF58 -P 3600 3700 -F 0 "v1" H 3400 3800 60 0000 C CNN -F 1 "dc" H 3400 3650 60 0000 C CNN -F 2 "R1" H 3300 3700 60 0000 C CNN -F 3 "" H 3600 3700 60 0000 C CNN - 1 3600 3700 - 1 0 0 -1 -$EndComp -$Comp -L dc v2 -U 1 1 565DC066 -P 5550 3000 -F 0 "v2" H 5350 3100 60 0000 C CNN -F 1 "dc" H 5350 2950 60 0000 C CNN -F 2 "R1" H 5250 3000 60 0000 C CNN -F 3 "" H 5550 3000 60 0000 C CNN - 1 5550 3000 - 1 0 0 -1 -$EndComp -$Comp -L aswitch U1 -U 1 1 565DC87E -P 6400 2100 -F 0 "U1" H 6850 2400 60 0000 C CNN -F 1 "aswitch" H 6850 2300 60 0000 C CNN -F 2 "" H 6850 2200 60 0000 C CNN -F 3 "" H 6850 2200 60 0000 C CNN - 1 6400 2100 - -1 0 0 1 -$EndComp -Wire Wire Line - 5950 2000 6650 2000 -$EndSCHEMATC diff --git a/Examples/HalfwaveRectifier_SCR/scr.cir.ckt b/Examples/HalfwaveRectifier_SCR/scr.cir.ckt deleted file mode 100644 index b0e218fd..00000000 --- a/Examples/HalfwaveRectifier_SCR/scr.cir.ckt +++ /dev/null @@ -1,19 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: 08/21/14 11:07:22
-.include diode.lib
-
-u2 5 8 1 port
-* f2
-* Analog Switch analogswitch
-d1 4 2 diode
-v2 3 4 dc 0
-c1 5 6 10u
-r2 5 6 1
-* f1
-v1 9 7 dc 0
-r1 8 9 50
-Vf2 2 5 0
-f2 5 6 Vf2 100
-Vf1 7 5 0
-f1 5 6 Vf1 10
-a1 6 (1 3) u1
-.model u1 aswitch(cntl_on=0.25 cntl_off=0.1 r_on=0.0125 r_off=1000000)
diff --git a/Examples/HalfwaveRectifier_SCR/scr.cir.out~ b/Examples/HalfwaveRectifier_SCR/scr.cir.out~ deleted file mode 100644 index d600f25d..00000000 --- a/Examples/HalfwaveRectifier_SCR/scr.cir.out~ +++ /dev/null @@ -1,29 +0,0 @@ -* /opt/esim/src/subcircuitlibrary/scr/scr.cir - -.include PowerDiode.lib -* u2 3 7 1 port -* f2 -d1 5 2 PowerDiode -c1 3 9 10u -* f1 -v1 8 4 dc 0 -v2 6 5 dc 0 -* u1 9 1 6 aswitch -r1 7 8 50 -r2 3 9 1 -Vf2 2 3 0 -f2 3 9 Vf2 100 -Vf1 4 3 0 -f1 3 9 Vf1 10 -a1 9 (1 6) u1 -* Schematic Name: aswitch, NgSpice Name: aswitch -.model u1 aswitch(log=TRUE cntl_off=0.0 cntl_on=1.0 r_on=1.0 r_off=1.0e12 ) -.tran 0e-12 0e-00 0e-00 - -* Control Statements -.control -run -print allv > plot_data_v.txt -print alli > plot_data_i.txt -.endc -.end diff --git a/Examples/HalfwaveRectifier_SCR/scr.sub~ b/Examples/HalfwaveRectifier_SCR/scr.sub~ deleted file mode 100644 index 0fdddbf4..00000000 --- a/Examples/HalfwaveRectifier_SCR/scr.sub~ +++ /dev/null @@ -1,23 +0,0 @@ -* Subcircuit scr -.subckt scr 3 7 1 -* /opt/esim/src/subcircuitlibrary/scr/scr.cir -.include PowerDiode.lib -* f2 -d1 5 2 PowerDiode -c1 3 9 10u -* f1 -v1 8 4 dc 0 -v2 6 5 dc 0 -* u1 9 1 6 aswitch -r1 7 8 50 -r2 3 9 1 -Vf2 2 3 0 -f2 3 9 Vf2 100 -Vf1 4 3 0 -f1 3 9 Vf1 10 -a1 9 [1 6 ] u1 -* Schematic Name: aswitch, NgSpice Name: aswitch -.model u1 aswitch(log=TRUE cntl_off=0.0 cntl_on=1.0 r_on=1.0 r_off=1.0e12 ) -* Control Statements - -.ends scr
\ No newline at end of file |