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-rw-r--r--Examples/Half_Adder/Half_Adder.cir16
1 files changed, 9 insertions, 7 deletions
diff --git a/Examples/Half_Adder/Half_Adder.cir b/Examples/Half_Adder/Half_Adder.cir
index 750f7d56..c12e1d5e 100644
--- a/Examples/Half_Adder/Half_Adder.cir
+++ b/Examples/Half_Adder/Half_Adder.cir
@@ -1,15 +1,17 @@
-* EESchema Netlist Version 1.1 (Spice format) creation date: Wed Jun 24 15:44:17 2015
+* /home/fossee/Downloads/eSim-master/Examples/Half_Adder/Half_Adder.cir
+
+* EESchema Netlist Version 1.1 (Spice format) creation date: Wed Aug 19 15:02:03 2015
* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N
* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0
-*Sheet Name:/
-X1 1 2 3 4 half_adder
-U1 A B 1 2 adc_bridge_2
-U2 3 4 sum cout dac_bridge_2
+* Sheet Name: /
+X1 Net-_U1-Pad3_ Net-_U1-Pad4_ Net-_U2-Pad1_ Net-_U2-Pad2_ half_adder
+U1 A B Net-_U1-Pad3_ Net-_U1-Pad4_ adc_bridge_2
+U2 Net-_U2-Pad1_ Net-_U2-Pad2_ sum cout dac_bridge_2
v1 A GND DC
v2 B GND DC
-R1 GND sum 1k
-R2 GND cout 1k
+R1 sum GND 1k
+R2 cout GND 1k
.end