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-rw-r--r--Examples/CMOS_Inverter/CMOS_Inverter-cache.lib6
-rw-r--r--Examples/CMOS_Inverter/CMOS_Inverter-rescue.lib17
-rw-r--r--Examples/CMOS_Inverter/CMOS_Inverter.bak93
-rw-r--r--Examples/CMOS_Inverter/CMOS_Inverter.cir16
-rw-r--r--Examples/CMOS_Inverter/CMOS_Inverter.cir.out14
-rw-r--r--Examples/CMOS_Inverter/CMOS_Inverter.pro77
-rw-r--r--Examples/CMOS_Inverter/CMOS_Inverter.sch20
-rw-r--r--Examples/CMOS_Inverter/CMOS_Inverter_Previous_Values.xml1
-rwxr-xr-xExamples/CMOS_Inverter/PMOS-0.5um.lib6
-rw-r--r--Examples/CMOS_Inverter/b3v3check.log6
-rw-r--r--Examples/CMOS_Inverter/mos_n.lib5
-rw-r--r--Examples/CMOS_Inverter/mos_p.lib5
-rw-r--r--Examples/CMOS_Inverter/plot_data_i.txt122
-rw-r--r--Examples/CMOS_Inverter/plot_data_v.txt122
14 files changed, 283 insertions, 227 deletions
diff --git a/Examples/CMOS_Inverter/CMOS_Inverter-cache.lib b/Examples/CMOS_Inverter/CMOS_Inverter-cache.lib
index 2c35750f..98a01bbd 100644
--- a/Examples/CMOS_Inverter/CMOS_Inverter-cache.lib
+++ b/Examples/CMOS_Inverter/CMOS_Inverter-cache.lib
@@ -36,11 +36,11 @@ X ~ 2 0 -150 110 U 40 40 1 1 P
ENDDRAW
ENDDEF
#
-# GND
+# GND-RESCUE-CMOS_Inverter
#
-DEF ~GND #PWR 0 0 Y Y 1 F P
+DEF ~GND-RESCUE-CMOS_Inverter #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 0 30 H I C CNN
-F1 "GND" 0 -70 30 H I C CNN
+F1 "GND-RESCUE-CMOS_Inverter" 0 -70 30 H I C CNN
F2 "" 0 0 60 H V C CNN
F3 "" 0 0 60 H V C CNN
DRAW
diff --git a/Examples/CMOS_Inverter/CMOS_Inverter-rescue.lib b/Examples/CMOS_Inverter/CMOS_Inverter-rescue.lib
new file mode 100644
index 00000000..a7459fc1
--- /dev/null
+++ b/Examples/CMOS_Inverter/CMOS_Inverter-rescue.lib
@@ -0,0 +1,17 @@
+EESchema-LIBRARY Version 2.3
+#encoding utf-8
+#
+# GND-RESCUE-CMOS_Inverter
+#
+DEF ~GND-RESCUE-CMOS_Inverter #PWR 0 0 Y Y 1 F P
+F0 "#PWR" 0 0 30 H I C CNN
+F1 "GND-RESCUE-CMOS_Inverter" 0 -70 30 H I C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N
+X GND 1 0 0 0 U 30 30 1 1 W N
+ENDDRAW
+ENDDEF
+#
+#End Library
diff --git a/Examples/CMOS_Inverter/CMOS_Inverter.bak b/Examples/CMOS_Inverter/CMOS_Inverter.bak
index 04c9e079..2829d5d5 100644
--- a/Examples/CMOS_Inverter/CMOS_Inverter.bak
+++ b/Examples/CMOS_Inverter/CMOS_Inverter.bak
@@ -34,6 +34,7 @@ LIBS:eSim_Analog
LIBS:eSim_Digital
LIBS:eSim_Hybrid
LIBS:eSim_Devices
+LIBS:pspice
LIBS:CMOS_Inverter-cache
EELAYER 25 0
EELAYER END
@@ -102,32 +103,10 @@ F 3 "" H 6550 3700 60 0001 C CNN
1 0 0 -1
$EndComp
$Comp
-L GND #PWR01
-U 1 1 551BDA61
-P 5800 1150
-F 0 "#PWR01" H 5800 1150 30 0001 C CNN
-F 1 "GND" H 5800 1080 30 0001 C CNN
-F 2 "" H 5800 1150 60 0001 C CNN
-F 3 "" H 5800 1150 60 0001 C CNN
- 1 5800 1150
- -1 0 0 1
-$EndComp
-$Comp
-L GND #PWR02
-U 1 1 551BDA5A
-P 5800 4700
-F 0 "#PWR02" H 5800 4700 30 0001 C CNN
-F 1 "GND" H 5800 4630 30 0001 C CNN
-F 2 "" H 5800 4700 60 0001 C CNN
-F 3 "" H 5800 4700 60 0001 C CNN
- 1 5800 4700
- 1 0 0 -1
-$EndComp
-$Comp
-L PWR_FLAG #FLG03
+L PWR_FLAG #FLG01
U 1 1 54F86E05
P 2900 3100
-F 0 "#FLG03" H 2900 3370 30 0001 C CNN
+F 0 "#FLG01" H 2900 3370 30 0001 C CNN
F 1 "PWR_FLAG" H 2900 3330 30 0000 C CNN
F 2 "" H 2900 3100 60 0001 C CNN
F 3 "" H 2900 3100 60 0001 C CNN
@@ -135,10 +114,10 @@ F 3 "" H 2900 3100 60 0001 C CNN
1 0 0 -1
$EndComp
$Comp
-L GND #PWR04
+L GND #PWR02
U 1 1 54F86DBA
P 2900 3550
-F 0 "#PWR04" H 2900 3550 30 0001 C CNN
+F 0 "#PWR02" H 2900 3550 30 0001 C CNN
F 1 "GND" H 2900 3480 30 0001 C CNN
F 2 "" H 2900 3550 60 0001 C CNN
F 3 "" H 2900 3550 60 0001 C CNN
@@ -205,4 +184,66 @@ Wire Wire Line
5900 2550 5900 2450
Wire Wire Line
5900 2450 5800 2450
+$Comp
+L PWR_FLAG #FLG03
+U 1 1 557AB7F7
+P 5600 4500
+F 0 "#FLG03" H 5600 4595 50 0001 C CNN
+F 1 "PWR_FLAG" H 5600 4680 50 0000 C CNN
+F 2 "" H 5600 4500 60 0000 C CNN
+F 3 "" H 5600 4500 60 0000 C CNN
+ 1 5600 4500
+ 1 0 0 -1
+$EndComp
+Connection ~ 5800 1300
+Wire Wire Line
+ 5600 4500 5600 4550
+Wire Wire Line
+ 5600 4550 5800 4550
+Connection ~ 5800 4550
+Wire Wire Line
+ 6550 4300 6550 4350
+Connection ~ 6550 4350
+$Comp
+L 0 #GND05
+U 1 1 557ACE40
+P 5800 1150
+F 0 "#GND05" H 5800 1050 40 0001 C CNN
+F 1 "0" H 5800 1080 40 0000 C CNN
+F 2 "" H 5800 1150 60 0000 C CNN
+F 3 "" H 5800 1150 60 0000 C CNN
+ 1 5800 1150
+ -1 0 0 1
+$EndComp
+$Comp
+L 0 #GND06
+U 1 1 557ACE67
+P 5800 4700
+F 0 "#GND06" H 5800 4600 40 0001 C CNN
+F 1 "0" H 5800 4630 40 0000 C CNN
+F 2 "" H 5800 4700 60 0000 C CNN
+F 3 "" H 5800 4700 60 0000 C CNN
+ 1 5800 4700
+ 1 0 0 -1
+$EndComp
+$Comp
+L GND #PWR07
+U 1 1 557ACF98
+P 5950 1300
+F 0 "#PWR07" H 5950 1300 30 0001 C CNN
+F 1 "GND" H 5950 1230 30 0001 C CNN
+F 2 "" H 5950 1300 60 0000 C CNN
+F 3 "" H 5950 1300 60 0000 C CNN
+F 4 "0" H 5950 1300 60 0001 C CNN "Value"
+ 1 5950 1300
+ 1 0 0 -1
+$EndComp
+Wire Wire Line
+ 5850 1300 5850 1250
+Wire Wire Line
+ 5850 1250 5950 1250
+Wire Wire Line
+ 5950 1250 5950 1300
+Wire Wire Line
+ 5850 1300 5800 1300
$EndSCHEMATC
diff --git a/Examples/CMOS_Inverter/CMOS_Inverter.cir b/Examples/CMOS_Inverter/CMOS_Inverter.cir
index b435cd1c..3774c1ef 100644
--- a/Examples/CMOS_Inverter/CMOS_Inverter.cir
+++ b/Examples/CMOS_Inverter/CMOS_Inverter.cir
@@ -1,13 +1,15 @@
-* EESchema Netlist Version 1.1 (Spice format) creation date: Fri Jun 12 12:25:06 2015
+* /home/fossee/Downloads/eSim-master/Examples/CMOS_Inverter/CMOS_Inverter.cir
+
+* EESchema Netlist Version 1.1 (Spice format) creation date: Wed Aug 19 14:20:52 2015
* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N
* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0
-*Sheet Name:/
-C1 3 4 1u
-v1 1 4 dc
-v2 2 4 5
-M1 3 1 4 4 MOS_N
-M2 3 1 2 2 MOS_P
+* Sheet Name: /
+C1 out 0 1u
+v1 in 0 dc
+v2 vcc 0 5
+M1 out in 0 0 MOS_N
+M2 out in vcc vcc MOS_P
.end
diff --git a/Examples/CMOS_Inverter/CMOS_Inverter.cir.out b/Examples/CMOS_Inverter/CMOS_Inverter.cir.out
index 318298d5..6b6d12c4 100644
--- a/Examples/CMOS_Inverter/CMOS_Inverter.cir.out
+++ b/Examples/CMOS_Inverter/CMOS_Inverter.cir.out
@@ -1,11 +1,11 @@
-* eeschema netlist version 1.1 (spice format) creation date: wed jun 3 14:55:15 2015
+* /home/fossee/downloads/esim-master/examples/cmos_inverter/cmos_inverter.cir
-.include PMOS-5um.lib
-.include NMOS-5um.lib
-c1 out gnd 1u
-v1 in gnd dc 5
-v2 vcc gnd 5
-m1 out in gnd gnd mos_n W=100u L=100u M=1
+.include PMOS-0.5um.lib
+.include NMOS-0.5um.lib
+c1 out 0 1u
+v1 in 0 dc 5
+v2 vcc 0 5
+m1 out in 0 0 mos_n W=100u L=100u M=1
m2 out in vcc vcc mos_p W=100u L=100u M=1
.tran 10e-03 100e-03 0e-03
diff --git a/Examples/CMOS_Inverter/CMOS_Inverter.pro b/Examples/CMOS_Inverter/CMOS_Inverter.pro
index 2b819749..0b4f0972 100644
--- a/Examples/CMOS_Inverter/CMOS_Inverter.pro
+++ b/Examples/CMOS_Inverter/CMOS_Inverter.pro
@@ -1,42 +1,45 @@
-update=Fri Jun 12 12:18:51 2015
+update=Wed Aug 19 14:09:22 2015
last_client=eeschema
[eeschema]
version=1
LibDir=
[eeschema/libraries]
-LibName1=power
-LibName2=device
-LibName3=transistors
-LibName4=conn
-LibName5=linear
-LibName6=regul
-LibName7=74xx
-LibName8=cmos4000
-LibName9=adc-dac
-LibName10=memory
-LibName11=xilinx
-LibName12=special
-LibName13=microcontrollers
-LibName14=dsp
-LibName15=microchip
-LibName16=analog_switches
-LibName17=motorola
-LibName18=texas
-LibName19=intel
-LibName20=audio
-LibName21=interface
-LibName22=digital-audio
-LibName23=philips
-LibName24=display
-LibName25=cypress
-LibName26=siliconi
-LibName27=opto
-LibName28=atmel
-LibName29=contrib
-LibName30=valves
-LibName31=sourcesSpice
-LibName32=/home/gaurav/Desktop/eSim Library/eSim_Analog
-LibName33=/home/gaurav/Desktop/eSim Library/eSim_Digital
-LibName34=/home/gaurav/Desktop/eSim Library/eSim_Hybrid
-LibName35=/home/gaurav/Desktop/eSim Library/eSim_Devices
-LibName36=/home/gaurav/pspice
+LibName1=eSim_Analog
+LibName2=eSim_Devices
+LibName3=eSim_Digital
+LibName4=eSim_Hybrid
+LibName5=eSim_Miscellaneous
+LibName6=eSim_Sources
+LibName7=eSim_Subckt
+LibName8=eSim_User
+LibName9=CMOS_Inverter-rescue
+LibName10=power
+LibName11=device
+LibName12=transistors
+LibName13=conn
+LibName14=linear
+LibName15=regul
+LibName16=74xx
+LibName17=cmos4000
+LibName18=adc-dac
+LibName19=memory
+LibName20=xilinx
+LibName21=special
+LibName22=microcontrollers
+LibName23=dsp
+LibName24=microchip
+LibName25=analog_switches
+LibName26=motorola
+LibName27=texas
+LibName28=intel
+LibName29=audio
+LibName30=interface
+LibName31=digital-audio
+LibName32=philips
+LibName33=display
+LibName34=cypress
+LibName35=siliconi
+LibName36=opto
+LibName37=atmel
+LibName38=contrib
+LibName39=valves
diff --git a/Examples/CMOS_Inverter/CMOS_Inverter.sch b/Examples/CMOS_Inverter/CMOS_Inverter.sch
index 2829d5d5..7076465c 100644
--- a/Examples/CMOS_Inverter/CMOS_Inverter.sch
+++ b/Examples/CMOS_Inverter/CMOS_Inverter.sch
@@ -1,4 +1,13 @@
EESchema Schematic File Version 2
+LIBS:eSim_Analog
+LIBS:eSim_Devices
+LIBS:eSim_Digital
+LIBS:eSim_Hybrid
+LIBS:eSim_Miscellaneous
+LIBS:eSim_Sources
+LIBS:eSim_Subckt
+LIBS:eSim_User
+LIBS:CMOS_Inverter-rescue
LIBS:power
LIBS:device
LIBS:transistors
@@ -10,7 +19,6 @@ LIBS:cmos4000
LIBS:adc-dac
LIBS:memory
LIBS:xilinx
-LIBS:special
LIBS:microcontrollers
LIBS:dsp
LIBS:microchip
@@ -29,12 +37,6 @@ LIBS:opto
LIBS:atmel
LIBS:contrib
LIBS:valves
-LIBS:sourcesSpice
-LIBS:eSim_Analog
-LIBS:eSim_Digital
-LIBS:eSim_Hybrid
-LIBS:eSim_Devices
-LIBS:pspice
LIBS:CMOS_Inverter-cache
EELAYER 25 0
EELAYER END
@@ -114,7 +116,7 @@ F 3 "" H 2900 3100 60 0001 C CNN
1 0 0 -1
$EndComp
$Comp
-L GND #PWR02
+L GND-RESCUE-CMOS_Inverter #PWR02
U 1 1 54F86DBA
P 2900 3550
F 0 "#PWR02" H 2900 3550 30 0001 C CNN
@@ -227,7 +229,7 @@ F 3 "" H 5800 4700 60 0000 C CNN
1 0 0 -1
$EndComp
$Comp
-L GND #PWR07
+L GND-RESCUE-CMOS_Inverter #PWR07
U 1 1 557ACF98
P 5950 1300
F 0 "#PWR07" H 5950 1300 30 0001 C CNN
diff --git a/Examples/CMOS_Inverter/CMOS_Inverter_Previous_Values.xml b/Examples/CMOS_Inverter/CMOS_Inverter_Previous_Values.xml
new file mode 100644
index 00000000..f9416fd2
--- /dev/null
+++ b/Examples/CMOS_Inverter/CMOS_Inverter_Previous_Values.xml
@@ -0,0 +1 @@
+<KicadtoNgspice><analysis><ac><field1 name="Lin">true</field1><field2 name="Dec">false</field2><field3 name="Oct">false</field3><field4 name="Start Frequency" /><field5 name="Stop Frequency" /><field6 name="No. of points" /><field7 name="Start Fre Combo">Hz</field7><field8 name="Stop Fre Combo">Hz</field8></ac><dc><field1 name="Source Name" /><field2 name="Start" /><field3 name="Increment" /><field4 name="Stop" /><field5 name="Operating Point">False</field5><field6 name="Start Combo">Volts or Amperes</field6><field7 name="Increment Combo">Volts or Amperes</field7><field8 name="Stop Combo">Volts or Amperes</field8></dc><tran><field1 name="Start Time">0</field1><field2 name="Step Time">10</field2><field3 name="Stop Time">100</field3><field4 name="Start Combo">ms</field4><field5 name="Step Combo">ms</field5><field6 name="Stop Combo">ms</field6></tran></analysis><source><v1 name="Source type">dc<field1 name="Value">5</field1></v1><v2 name="Source type">5</v2></source><model /><devicemodel><m1><field>/opt/eSim/src/deviceModelLibrary/MOS/NMOS-0.5um.lib</field><field /><field /><field /></m1><m2><field>/opt/eSim/src/deviceModelLibrary/MOS/PMOS-0.5um.lib</field><field /><field /><field /></m2></devicemodel><subcircuit /></KicadtoNgspice> \ No newline at end of file
diff --git a/Examples/CMOS_Inverter/PMOS-0.5um.lib b/Examples/CMOS_Inverter/PMOS-0.5um.lib
new file mode 100755
index 00000000..848e8b05
--- /dev/null
+++ b/Examples/CMOS_Inverter/PMOS-0.5um.lib
@@ -0,0 +1,6 @@
+.model mos_p PMOS( TPG=-1 TOX=9.5n CJ=950u ETA=0.025 VMAX=0.3u
++ GAMMA=0.52 CGSO=0.35n LD=70n MJSW=0.25 PB=1
++ CGBO=0.45n XJ=0.2U CGDO=0.35n KAPPA=8.0 LEVEL=3
++ VTO=-0.6 NFS=6.50E11 THETA=0.2 CJSW=0.2n PHI=0.7
++ RSH=2.5 MJ=0.5 UO=130 KP=48u DELTA=0.25
++ NSUB=1.0E17 ) \ No newline at end of file
diff --git a/Examples/CMOS_Inverter/b3v3check.log b/Examples/CMOS_Inverter/b3v3check.log
deleted file mode 100644
index 79783fe3..00000000
--- a/Examples/CMOS_Inverter/b3v3check.log
+++ /dev/null
@@ -1,6 +0,0 @@
-BSIM3 Model (Supports: v3.2, v3.2.2, v3.2.3, v3.2.4)
-Parameter Checking.
-Model = cmosn
-W = 0.0001, L = 0.0001, M = 0.0001
-Warning: Pd = 0 is less than W.
-Warning: Ps = 0 is less than W.
diff --git a/Examples/CMOS_Inverter/mos_n.lib b/Examples/CMOS_Inverter/mos_n.lib
deleted file mode 100644
index a237e1fe..00000000
--- a/Examples/CMOS_Inverter/mos_n.lib
+++ /dev/null
@@ -1,5 +0,0 @@
-* 5um technology
-
-.model mos_n NMOS( Cgso=0.4n Tox=85n Vto=1 phi=0.7
-+ Level=1
-+ Mj=.5 UO=750 Cgdo=0.4n Gamma=1.4 LAMBDA=0.01 LD=0.7u JS=1u CJ=0.4m CJSW=0.8n MJSW=0.5 PB=0.7 CGBO=0.2n )
diff --git a/Examples/CMOS_Inverter/mos_p.lib b/Examples/CMOS_Inverter/mos_p.lib
deleted file mode 100644
index 9c3ed976..00000000
--- a/Examples/CMOS_Inverter/mos_p.lib
+++ /dev/null
@@ -1,5 +0,0 @@
-*5um technology
-
-.model mos_p PMOS( Cgso=0.4n Tox=85n Vto=-1 phi=0.65
-+ Level=1
-+ Mj=.5 UO=250 Cgdo=0.4n Gamma=0.65 LAMBDA=0.03 LD=0.6u JS=1u CJ=0.18m CJSW=0.6n MJSW=0.5 PB=0.7 CGBO=0.2n )
diff --git a/Examples/CMOS_Inverter/plot_data_i.txt b/Examples/CMOS_Inverter/plot_data_i.txt
index d7d0eed7..084cd655 100644
--- a/Examples/CMOS_Inverter/plot_data_i.txt
+++ b/Examples/CMOS_Inverter/plot_data_i.txt
@@ -1,67 +1,67 @@
-* eeschema netlist version 1.1 (spice format) creation date: wed jun 3 14:55:15 2015
-Transient Analysis Mon Jun 8 15:09:27 2015
+ * /home/fossee/downloads/esim-master/examples/cmos_inverter/cmos_inverter.cir
+ Transient Analysis Wed Aug 19 15:39:31 2015
--------------------------------------------------------------------------------
Index time v1#branch v2#branch
--------------------------------------------------------------------------------
-0 0.000000e+00 0.000000e+00 -5.01000e-12
-1 1.000000e-05 0.000000e+00 -5.01000e-12
-2 2.000000e-05 -3.65682e-22 -5.01000e-12
-3 4.000000e-05 -3.65269e-22 -5.01000e-12
-4 8.000000e-05 -1.82222e-22 -5.01000e-12
-5 1.600000e-04 -9.07020e-23 -5.01000e-12
-6 3.200000e-04 -4.49480e-23 -5.01000e-12
-7 6.400000e-04 -2.20827e-23 -5.01000e-12
-8 1.280000e-03 -1.06724e-23 -5.01000e-12
-9 2.560000e-03 -5.00782e-24 -5.01000e-12
-10 4.560000e-03 5.534460e-24 -5.01000e-12
-11 6.560000e-03 5.744371e-24 -5.01000e-12
-12 8.560000e-03 5.908101e-24 -5.01000e-12
-13 1.056000e-02 6.035806e-24 -5.01000e-12
-14 1.256000e-02 -4.82024e-25 -5.01000e-12
-15 1.456000e-02 2.904399e-24 -5.01000e-12
-16 1.656000e-02 2.965000e-24 -5.01000e-12
-17 1.856000e-02 3.012266e-24 -5.01000e-12
-18 2.056000e-02 3.049134e-24 -5.01000e-12
-19 2.256000e-02 3.077890e-24 -5.01000e-12
-20 2.456000e-02 3.100317e-24 -5.01000e-12
-21 2.656000e-02 3.117809e-24 -5.01000e-12
-22 2.856000e-02 3.131453e-24 -5.01000e-12
-23 3.056000e-02 3.142094e-24 -5.01000e-12
-24 3.256000e-02 3.150396e-24 -5.01000e-12
-25 3.456000e-02 3.156872e-24 -5.01000e-12
-26 3.656000e-02 3.161923e-24 -5.01000e-12
-27 3.856000e-02 3.165861e-24 -5.01000e-12
-28 4.056000e-02 3.168934e-24 -5.01000e-12
-29 4.256000e-02 3.171332e-24 -5.01000e-12
-30 4.456000e-02 3.173202e-24 -5.01000e-12
-31 4.656000e-02 3.174662e-24 -5.01000e-12
-32 4.856000e-02 3.175800e-24 -5.01000e-12
-33 5.056000e-02 3.176686e-24 -5.01000e-12
-34 5.256000e-02 3.177376e-24 -5.01000e-12
-35 5.456000e-02 3.177916e-24 -5.01000e-12
-36 5.656000e-02 3.178339e-24 -5.01000e-12
-37 5.856000e-02 3.178667e-24 -5.01000e-12
-38 6.056000e-02 3.178922e-24 -5.01000e-12
-39 6.256000e-02 3.179121e-24 -5.01000e-12
-40 6.456000e-02 3.179277e-24 -5.01000e-12
-41 6.656000e-02 3.179400e-24 -5.01000e-12
-42 6.856000e-02 3.179495e-24 -5.01000e-12
-43 7.056000e-02 3.179569e-24 -5.01000e-12
-44 7.256000e-02 3.179627e-24 -5.01000e-12
-45 7.456000e-02 3.179673e-24 -5.01000e-12
-46 7.656000e-02 3.179707e-24 -5.01000e-12
-47 7.856000e-02 3.179731e-24 -5.01000e-12
-48 8.056000e-02 3.179753e-24 -5.01000e-12
-49 8.256000e-02 3.179771e-24 -5.01000e-12
-50 8.456000e-02 3.179783e-24 -5.01000e-12
-51 8.656000e-02 3.179793e-24 -5.01000e-12
-52 8.856000e-02 3.179802e-24 -5.01000e-12
-53 9.056000e-02 3.179808e-24 -5.01000e-12
-54 9.256000e-02 3.179811e-24 -5.01000e-12
+0 0.000000e+00 0.000000e+00 -5.01066e-12
+1 1.000000e-05 0.000000e+00 -5.01066e-12
+2 2.000000e-05 -3.77434e-22 -5.00977e-12
+3 4.000000e-05 -7.15365e-21 -5.00977e-12
+4 8.000000e-05 -3.57679e-21 -5.01021e-12
+5 1.600000e-04 -1.78920e-21 -5.01066e-12
+6 3.200000e-04 -4.70663e-22 -5.01021e-12
+7 6.400000e-04 -2.35533e-22 -5.01110e-12
+8 1.280000e-03 -1.17768e-22 -5.01066e-12
+9 2.560000e-03 -1.11722e-22 -5.00977e-12
+10 4.560000e-03 -8.42224e-23 -5.01021e-12
+11 6.560000e-03 -3.12830e-23 -5.01021e-12
+12 8.560000e-03 -5.77532e-23 -5.01021e-12
+13 1.056000e-02 -5.77534e-23 -5.01021e-12
+14 1.256000e-02 -5.77535e-23 -5.01021e-12
+15 1.456000e-02 -5.77535e-23 -5.01021e-12
+16 1.656000e-02 -5.77536e-23 -5.01021e-12
+17 1.856000e-02 -5.77536e-23 -5.01021e-12
+18 2.056000e-02 -5.77536e-23 -5.01021e-12
+19 2.256000e-02 -5.77536e-23 -5.01021e-12
+20 2.456000e-02 -5.77536e-23 -5.01021e-12
+21 2.656000e-02 -5.77536e-23 -5.01021e-12
+22 2.856000e-02 -5.77536e-23 -5.01021e-12
+23 3.056000e-02 -5.77536e-23 -5.01021e-12
+24 3.256000e-02 -5.77536e-23 -5.01021e-12
+25 3.456000e-02 -5.77536e-23 -5.01021e-12
+26 3.656000e-02 -5.77536e-23 -5.01021e-12
+27 3.856000e-02 -5.77536e-23 -5.01021e-12
+28 4.056000e-02 -5.77536e-23 -5.01021e-12
+29 4.256000e-02 -5.77536e-23 -5.01021e-12
+30 4.456000e-02 -5.77536e-23 -5.01021e-12
+31 4.656000e-02 -5.77536e-23 -5.01021e-12
+32 4.856000e-02 -5.77536e-23 -5.01021e-12
+33 5.056000e-02 -5.77536e-23 -5.01021e-12
+34 5.256000e-02 -5.77536e-23 -5.01021e-12
+35 5.456000e-02 -5.77536e-23 -5.01021e-12
+36 5.656000e-02 -5.77536e-23 -5.01021e-12
+37 5.856000e-02 -5.77536e-23 -5.01021e-12
+38 6.056000e-02 -5.77536e-23 -5.01021e-12
+39 6.256000e-02 -5.77536e-23 -5.01021e-12
+40 6.456000e-02 -5.77536e-23 -5.01021e-12
+41 6.656000e-02 -5.77536e-23 -5.01021e-12
+42 6.856000e-02 -5.77536e-23 -5.01021e-12
+43 7.056000e-02 -5.77536e-23 -5.01021e-12
+44 7.256000e-02 -5.77536e-23 -5.01021e-12
+45 7.456000e-02 -5.77536e-23 -5.01021e-12
+46 7.656000e-02 -5.77536e-23 -5.01021e-12
+47 7.856000e-02 -5.77536e-23 -5.01021e-12
+48 8.056000e-02 -5.77536e-23 -5.01021e-12
+49 8.256000e-02 -5.77536e-23 -5.01021e-12
+50 8.456000e-02 -5.77536e-23 -5.01021e-12
+51 8.656000e-02 -5.77536e-23 -5.01021e-12
+52 8.856000e-02 -5.77536e-23 -5.01021e-12
+53 9.056000e-02 -5.77536e-23 -5.01021e-12
+54 9.256000e-02 -5.77536e-23 -5.01021e-12
Index time v1#branch v2#branch
--------------------------------------------------------------------------------
-55 9.456000e-02 3.179814e-24 -5.01000e-12
-56 9.656000e-02 3.179817e-24 -5.01000e-12
-57 9.856000e-02 3.179820e-24 -5.01000e-12
-58 1.000000e-01 3.129705e-24 -5.01000e-12
+55 9.456000e-02 -5.77536e-23 -5.01021e-12
+56 9.656000e-02 -5.77536e-23 -5.01021e-12
+57 9.856000e-02 -5.77536e-23 -5.01021e-12
+58 1.000000e-01 -9.53179e-23 -5.01066e-12
diff --git a/Examples/CMOS_Inverter/plot_data_v.txt b/Examples/CMOS_Inverter/plot_data_v.txt
index 8c3925b3..2fbe32d2 100644
--- a/Examples/CMOS_Inverter/plot_data_v.txt
+++ b/Examples/CMOS_Inverter/plot_data_v.txt
@@ -1,67 +1,67 @@
-* eeschema netlist version 1.1 (spice format) creation date: wed jun 3 14:55:15 2015
-Transient Analysis Mon Jun 8 15:09:27 2015
+ * /home/fossee/downloads/esim-master/examples/cmos_inverter/cmos_inverter.cir
+ Transient Analysis Wed Aug 19 15:39:31 2015
--------------------------------------------------------------------------------
Index time in out vcc
--------------------------------------------------------------------------------
-0 0.000000e+00 5.000000e+00 4.053196e-08 5.000000e+00
-1 1.000000e-05 5.000000e+00 4.053196e-08 5.000000e+00
-2 2.000000e-05 5.000000e+00 4.053196e-08 5.000000e+00
-3 4.000000e-05 5.000000e+00 4.053196e-08 5.000000e+00
-4 8.000000e-05 5.000000e+00 4.053196e-08 5.000000e+00
-5 1.600000e-04 5.000000e+00 4.053196e-08 5.000000e+00
-6 3.200000e-04 5.000000e+00 4.053196e-08 5.000000e+00
-7 6.400000e-04 5.000000e+00 4.053196e-08 5.000000e+00
-8 1.280000e-03 5.000000e+00 4.053196e-08 5.000000e+00
-9 2.560000e-03 5.000000e+00 4.053196e-08 5.000000e+00
-10 4.560000e-03 5.000000e+00 4.053196e-08 5.000000e+00
-11 6.560000e-03 5.000000e+00 4.053196e-08 5.000000e+00
-12 8.560000e-03 5.000000e+00 4.053196e-08 5.000000e+00
-13 1.056000e-02 5.000000e+00 4.053196e-08 5.000000e+00
-14 1.256000e-02 5.000000e+00 4.053196e-08 5.000000e+00
-15 1.456000e-02 5.000000e+00 4.053196e-08 5.000000e+00
-16 1.656000e-02 5.000000e+00 4.053196e-08 5.000000e+00
-17 1.856000e-02 5.000000e+00 4.053196e-08 5.000000e+00
-18 2.056000e-02 5.000000e+00 4.053196e-08 5.000000e+00
-19 2.256000e-02 5.000000e+00 4.053196e-08 5.000000e+00
-20 2.456000e-02 5.000000e+00 4.053196e-08 5.000000e+00
-21 2.656000e-02 5.000000e+00 4.053196e-08 5.000000e+00
-22 2.856000e-02 5.000000e+00 4.053196e-08 5.000000e+00
-23 3.056000e-02 5.000000e+00 4.053196e-08 5.000000e+00
-24 3.256000e-02 5.000000e+00 4.053196e-08 5.000000e+00
-25 3.456000e-02 5.000000e+00 4.053196e-08 5.000000e+00
-26 3.656000e-02 5.000000e+00 4.053196e-08 5.000000e+00
-27 3.856000e-02 5.000000e+00 4.053196e-08 5.000000e+00
-28 4.056000e-02 5.000000e+00 4.053196e-08 5.000000e+00
-29 4.256000e-02 5.000000e+00 4.053196e-08 5.000000e+00
-30 4.456000e-02 5.000000e+00 4.053196e-08 5.000000e+00
-31 4.656000e-02 5.000000e+00 4.053196e-08 5.000000e+00
-32 4.856000e-02 5.000000e+00 4.053196e-08 5.000000e+00
-33 5.056000e-02 5.000000e+00 4.053196e-08 5.000000e+00
-34 5.256000e-02 5.000000e+00 4.053196e-08 5.000000e+00
-35 5.456000e-02 5.000000e+00 4.053196e-08 5.000000e+00
-36 5.656000e-02 5.000000e+00 4.053196e-08 5.000000e+00
-37 5.856000e-02 5.000000e+00 4.053196e-08 5.000000e+00
-38 6.056000e-02 5.000000e+00 4.053196e-08 5.000000e+00
-39 6.256000e-02 5.000000e+00 4.053196e-08 5.000000e+00
-40 6.456000e-02 5.000000e+00 4.053196e-08 5.000000e+00
-41 6.656000e-02 5.000000e+00 4.053196e-08 5.000000e+00
-42 6.856000e-02 5.000000e+00 4.053196e-08 5.000000e+00
-43 7.056000e-02 5.000000e+00 4.053196e-08 5.000000e+00
-44 7.256000e-02 5.000000e+00 4.053196e-08 5.000000e+00
-45 7.456000e-02 5.000000e+00 4.053196e-08 5.000000e+00
-46 7.656000e-02 5.000000e+00 4.053196e-08 5.000000e+00
-47 7.856000e-02 5.000000e+00 4.053196e-08 5.000000e+00
-48 8.056000e-02 5.000000e+00 4.053196e-08 5.000000e+00
-49 8.256000e-02 5.000000e+00 4.053196e-08 5.000000e+00
-50 8.456000e-02 5.000000e+00 4.053196e-08 5.000000e+00
-51 8.656000e-02 5.000000e+00 4.053196e-08 5.000000e+00
-52 8.856000e-02 5.000000e+00 4.053196e-08 5.000000e+00
-53 9.056000e-02 5.000000e+00 4.053196e-08 5.000000e+00
-54 9.256000e-02 5.000000e+00 4.053196e-08 5.000000e+00
+0 0.000000e+00 5.000000e+00 1.469069e-08 5.000000e+00
+1 1.000000e-05 5.000000e+00 1.469069e-08 5.000000e+00
+2 2.000000e-05 5.000000e+00 1.469069e-08 5.000000e+00
+3 4.000000e-05 5.000000e+00 1.469069e-08 5.000000e+00
+4 8.000000e-05 5.000000e+00 1.469069e-08 5.000000e+00
+5 1.600000e-04 5.000000e+00 1.469069e-08 5.000000e+00
+6 3.200000e-04 5.000000e+00 1.469069e-08 5.000000e+00
+7 6.400000e-04 5.000000e+00 1.469069e-08 5.000000e+00
+8 1.280000e-03 5.000000e+00 1.469069e-08 5.000000e+00
+9 2.560000e-03 5.000000e+00 1.469069e-08 5.000000e+00
+10 4.560000e-03 5.000000e+00 1.469069e-08 5.000000e+00
+11 6.560000e-03 5.000000e+00 1.469069e-08 5.000000e+00
+12 8.560000e-03 5.000000e+00 1.469069e-08 5.000000e+00
+13 1.056000e-02 5.000000e+00 1.469069e-08 5.000000e+00
+14 1.256000e-02 5.000000e+00 1.469069e-08 5.000000e+00
+15 1.456000e-02 5.000000e+00 1.469069e-08 5.000000e+00
+16 1.656000e-02 5.000000e+00 1.469069e-08 5.000000e+00
+17 1.856000e-02 5.000000e+00 1.469069e-08 5.000000e+00
+18 2.056000e-02 5.000000e+00 1.469069e-08 5.000000e+00
+19 2.256000e-02 5.000000e+00 1.469069e-08 5.000000e+00
+20 2.456000e-02 5.000000e+00 1.469069e-08 5.000000e+00
+21 2.656000e-02 5.000000e+00 1.469069e-08 5.000000e+00
+22 2.856000e-02 5.000000e+00 1.469069e-08 5.000000e+00
+23 3.056000e-02 5.000000e+00 1.469069e-08 5.000000e+00
+24 3.256000e-02 5.000000e+00 1.469069e-08 5.000000e+00
+25 3.456000e-02 5.000000e+00 1.469069e-08 5.000000e+00
+26 3.656000e-02 5.000000e+00 1.469069e-08 5.000000e+00
+27 3.856000e-02 5.000000e+00 1.469069e-08 5.000000e+00
+28 4.056000e-02 5.000000e+00 1.469069e-08 5.000000e+00
+29 4.256000e-02 5.000000e+00 1.469069e-08 5.000000e+00
+30 4.456000e-02 5.000000e+00 1.469069e-08 5.000000e+00
+31 4.656000e-02 5.000000e+00 1.469069e-08 5.000000e+00
+32 4.856000e-02 5.000000e+00 1.469069e-08 5.000000e+00
+33 5.056000e-02 5.000000e+00 1.469069e-08 5.000000e+00
+34 5.256000e-02 5.000000e+00 1.469069e-08 5.000000e+00
+35 5.456000e-02 5.000000e+00 1.469069e-08 5.000000e+00
+36 5.656000e-02 5.000000e+00 1.469069e-08 5.000000e+00
+37 5.856000e-02 5.000000e+00 1.469069e-08 5.000000e+00
+38 6.056000e-02 5.000000e+00 1.469069e-08 5.000000e+00
+39 6.256000e-02 5.000000e+00 1.469069e-08 5.000000e+00
+40 6.456000e-02 5.000000e+00 1.469069e-08 5.000000e+00
+41 6.656000e-02 5.000000e+00 1.469069e-08 5.000000e+00
+42 6.856000e-02 5.000000e+00 1.469069e-08 5.000000e+00
+43 7.056000e-02 5.000000e+00 1.469069e-08 5.000000e+00
+44 7.256000e-02 5.000000e+00 1.469069e-08 5.000000e+00
+45 7.456000e-02 5.000000e+00 1.469069e-08 5.000000e+00
+46 7.656000e-02 5.000000e+00 1.469069e-08 5.000000e+00
+47 7.856000e-02 5.000000e+00 1.469069e-08 5.000000e+00
+48 8.056000e-02 5.000000e+00 1.469069e-08 5.000000e+00
+49 8.256000e-02 5.000000e+00 1.469069e-08 5.000000e+00
+50 8.456000e-02 5.000000e+00 1.469069e-08 5.000000e+00
+51 8.656000e-02 5.000000e+00 1.469069e-08 5.000000e+00
+52 8.856000e-02 5.000000e+00 1.469069e-08 5.000000e+00
+53 9.056000e-02 5.000000e+00 1.469069e-08 5.000000e+00
+54 9.256000e-02 5.000000e+00 1.469069e-08 5.000000e+00
Index time in out vcc
--------------------------------------------------------------------------------
-55 9.456000e-02 5.000000e+00 4.053196e-08 5.000000e+00
-56 9.656000e-02 5.000000e+00 4.053196e-08 5.000000e+00
-57 9.856000e-02 5.000000e+00 4.053196e-08 5.000000e+00
-58 1.000000e-01 5.000000e+00 4.053196e-08 5.000000e+00
+55 9.456000e-02 5.000000e+00 1.469069e-08 5.000000e+00
+56 9.656000e-02 5.000000e+00 1.469069e-08 5.000000e+00
+57 9.856000e-02 5.000000e+00 1.469069e-08 5.000000e+00
+58 1.000000e-01 5.000000e+00 1.469069e-08 5.000000e+00
generated by cgit (git 2.34.1) at 2024-12-22 09:00:19 +0000