diff options
Diffstat (limited to 'Examples/CMOS_Inverter/CMOS_Inverter.cir')
| -rw-r--r-- | Examples/CMOS_Inverter/CMOS_Inverter.cir | 14 |
1 files changed, 8 insertions, 6 deletions
diff --git a/Examples/CMOS_Inverter/CMOS_Inverter.cir b/Examples/CMOS_Inverter/CMOS_Inverter.cir index 3774c1ef..8623d798 100644 --- a/Examples/CMOS_Inverter/CMOS_Inverter.cir +++ b/Examples/CMOS_Inverter/CMOS_Inverter.cir @@ -1,15 +1,17 @@ -* /home/fossee/Downloads/eSim-master/Examples/CMOS_Inverter/CMOS_Inverter.cir +* /home/fossee/UpdatedExamples/CMOS_Inverter/CMOS_Inverter.cir -* EESchema Netlist Version 1.1 (Spice format) creation date: Wed Aug 19 14:20:52 2015 +* EESchema Netlist Version 1.1 (Spice format) creation date: Thu Mar 3 20:45:21 2016 * To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N * To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 * Sheet Name: / -C1 out 0 1u -v1 in 0 dc -v2 vcc 0 5 -M1 out in 0 0 MOS_N +v2 vcc GND 5 +M1 out in GND GND MOS_N M2 out in vcc vcc MOS_P +U1 in plot_v1 +U2 out plot_v1 +C1 out GND 1u +v1 in GND pwl .end |