1 files changed, 13 insertions, 7 deletions
diff --git a/Examples/BasicGates/BasicGates.cir.out b/Examples/BasicGates/BasicGates.cir.out
index b0215f7b..428fd722 100644
--- a/Examples/BasicGates/BasicGates.cir.out
+++ b/Examples/BasicGates/BasicGates.cir.out
@@ -1,8 +1,8 @@
-* /home/fossee/downloads/esim-master/examples/basicgates/basicgates.cir
+* /home/fossee/downloads/labmigration/lm_solve/basicgates/basicgates.cir
 
-r3  in2 gnd 1000
+r3  a gnd 1000
 r2  out gnd 1000
-r1  in1 gnd 1000
+r1  b gnd 1000
 * u2  net-_u1-pad3_ net-_u1-pad4_ net-_u2-pad3_ d_and
 * u3  net-_u1-pad3_ net-_u1-pad4_ net-_u3-pad3_ d_or
 * u4  net-_u2-pad3_ net-_u3-pad3_ net-_u4-pad3_ d_nor
@@ -10,9 +10,12 @@ r1  in1 gnd 1000
 * u6  net-_u4-pad3_ net-_u6-pad2_ d_inverter
 * u7  net-_u5-pad3_ net-_u6-pad2_ net-_u7-pad3_ d_xor
 * u8  net-_u7-pad3_ out dac_bridge_1
-* u1  in2 in1 net-_u1-pad3_ net-_u1-pad4_ adc_bridge_2
-v2  in2 gnd pulse(0 5 0.1u 0.1u 0.1u 2u 20u)
-v1  in1 gnd pulse(5 0 0.1u 0.1u 0.1u 2u 20u)
+* u1  a b net-_u1-pad3_ net-_u1-pad4_ adc_bridge_2
+v2  a gnd pulse(0 5 0.1u 0.1u 0.1u 2u 20u)
+v1  b gnd pulse(5 0 0.1u 0.1u 0.1u 2u 20u)
+* u9  a plot_v1
+* u10  b plot_v1
+* u11  out plot_v1
 a1 [net-_u1-pad3_ net-_u1-pad4_ ] net-_u2-pad3_ u2
 a2 [net-_u1-pad3_ net-_u1-pad4_ ] net-_u3-pad3_ u3
 a3 [net-_u2-pad3_ net-_u3-pad3_ ] net-_u4-pad3_ u4
@@ -20,7 +23,7 @@ a4 [net-_u2-pad3_ net-_u3-pad3_ ] net-_u5-pad3_ u5
 a5 net-_u4-pad3_ net-_u6-pad2_ u6
 a6 [net-_u5-pad3_ net-_u6-pad2_ ] net-_u7-pad3_ u7
 a7 [net-_u7-pad3_ ] [out ] u8
-a8 [in2 in1 ] [net-_u1-pad3_ net-_u1-pad4_ ] u1
+a8 [a b ] [net-_u1-pad3_ net-_u1-pad4_ ] u1
 * Schematic Name: d_and, NgSpice Name: d_and
 .model u2 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 
 * Schematic Name: d_or, NgSpice Name: d_or
@@ -44,5 +47,8 @@ a8 [in2 in1 ] [net-_u1-pad3_ net-_u1-pad4_ ] u1
 run
 print allv > plot_data_v.txt
 print alli > plot_data_i.txt
+plot v(a)
+plot v(b)
+plot v(out)
 .endc
 .end