20 files changed, 1426 insertions, 0 deletions

diff --git a/Examples/Astable555/555/555-cache.lib b/Examples/Astable555/555/555-cache.lib
new file mode 100644
index 00000000..e0ae38fe
--- /dev/null
+++ b/Examples/Astable555/555/555-cache.lib
@@ -0,0 +1,103 @@
+EESchema-LIBRARY Version 2.3
+#encoding utf-8
+#
+# DC
+#
+DEF DC v 0 40 Y Y 1 F N
+F0 "v" -200 100 60 H V C CNN
+F1 "DC" -200 -50 60 H V C CNN
+F2 "R1" -300 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+$FPLIST
+ 1_pin
+$ENDFPLIST
+DRAW
+C 0 0 150 0 1 0 N
+X + 1 0 450 300 D 50 50 1 1 w
+X - 2 0 -450 300 U 50 50 1 1 w
+ENDDRAW
+ENDDEF
+#
+# GND
+#
+DEF GND #PWR 0 0 Y Y 1 F P
+F0 "#PWR" 0 -250 50 H I C CNN
+F1 "GND" 0 -150 50 H V C CNN
+F2 "" 0 0 50 H I C CNN
+F3 "" 0 0 50 H I C CNN
+DRAW
+P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
+X GND 1 0 0 0 D 50 50 1 1 W N
+ENDDRAW
+ENDDEF
+#
+# LM555N
+#
+DEF LM555N X 0 40 Y Y 1 F N
+F0 "X" 0 -50 60 H V C CNN
+F1 "LM555N" 0 100 60 H V C CNN
+F2 "" -50 0 60 H V C CNN
+F3 "" -50 0 60 H V C CNN
+DRAW
+S 350 -400 -350 400 0 1 0 N
+X GND 1 0 -600 200 U 50 50 1 1 W
+X TR 2 -550 250 200 R 50 50 1 1 I
+X Q 3 550 250 200 L 50 50 1 1 O
+X R 4 -550 -250 200 R 50 50 1 1 I I
+X CV 5 -550 0 200 R 50 50 1 1 I
+X THR 6 550 -250 200 L 50 50 1 1 I
+X DIS 7 550 0 200 L 50 50 1 1 I
+X VCC 8 0 600 200 D 50 50 1 1 W
+ENDDRAW
+ENDDEF
+#
+# eSim_C
+#
+DEF eSim_C C 0 10 N Y 1 F N
+F0 "C" 25 100 50 H V L CNN
+F1 "eSim_C" 25 -100 50 H V L CNN
+F2 "" 38 -150 30 H V C CNN
+F3 "" 0 0 60 H V C CNN
+$FPLIST
+ C_*
+$ENDFPLIST
+DRAW
+P 2 0 1 20 -80 -30 80 -30 N
+P 2 0 1 20 -80 30 80 30 N
+X ~ 1 0 150 110 D 40 40 1 1 P
+X ~ 2 0 -150 110 U 40 40 1 1 P
+ENDDRAW
+ENDDEF
+#
+# eSim_R
+#
+DEF eSim_R R 0 0 N Y 1 F N
+F0 "R" 50 130 50 H V C CNN
+F1 "eSim_R" 50 -50 50 H V C CNN
+F2 "" 50 -20 30 H V C CNN
+F3 "" 50 50 30 V V C CNN
+$FPLIST
+ R_*
+ Resistor_*
+$ENDFPLIST
+DRAW
+S 150 10 -50 90 0 1 10 N
+X ~ 1 -100 50 50 R 60 60 1 1 P
+X ~ 2 200 50 50 L 60 60 1 1 P
+ENDDRAW
+ENDDEF
+#
+# plot_v1
+#
+DEF plot_v1 U 0 40 Y Y 1 F N
+F0 "U" 0 500 60 H V C CNN
+F1 "plot_v1" 200 350 60 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+C 0 500 100 0 1 0 N
+X ~ ~ 0 200 200 U 50 50 1 1 I
+ENDDRAW
+ENDDEF
+#
+#End Library
diff --git a/Examples/Astable555/555/555.cir b/Examples/Astable555/555/555.cir
new file mode 100644
index 00000000..ba4b84ce
--- /dev/null
+++ b/Examples/Astable555/555/555.cir
@@ -0,0 +1,19 @@
+* /home/ash98/eSim-Workspace/555/555.cir
+
+* EESchema Netlist Version 1.1 (Spice format) creation date: Tue Dec 24 11:17:26 2019
+
+* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N
+* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0
+
+* Sheet Name: /
+R3  V_Out GND 1k		
+R1  Net-_R1-Pad1_ Net-_R1-Pad2_ 1k		
+R2  Net-_R1-Pad2_ C_Out 10k		
+v1  Net-_R1-Pad1_ GND DC		
+C1  C_Out GND 0.1u		
+C2  Net-_C2-Pad1_ GND 0.01u		
+U2  V_Out plot_v1		
+U1  C_Out plot_v1		
+X1  GND C_Out V_Out Net-_R1-Pad1_ Net-_C2-Pad1_ C_Out Net-_R1-Pad2_ Net-_R1-Pad1_ LM555N		
+
+.end
diff --git a/Examples/Astable555/555/555.cir.out b/Examples/Astable555/555/555.cir.out
new file mode 100644
index 00000000..0e4615e2
--- /dev/null
+++ b/Examples/Astable555/555/555.cir.out
@@ -0,0 +1,24 @@
+* /home/ash98/esim-workspace/555/555.cir
+
+.include lm555n.sub
+r3  v_out gnd 1k
+r1  net-_r1-pad1_ net-_r1-pad2_ 1k
+r2  net-_r1-pad2_ c_out 10k
+v1 net-_r1-pad1_ gnd  dc 10
+c1  c_out gnd 0.1u
+c2  net-_c2-pad1_ gnd 0.01u
+* u2  v_out plot_v1
+* u1  c_out plot_v1
+x1 gnd c_out v_out net-_r1-pad1_ net-_c2-pad1_ c_out net-_r1-pad2_ net-_r1-pad1_ lm555n
+.tran 1e-03 50e-03 0e-00
+
+* Control Statements 
+.control
+option noopalter
+run
+print allv > plot_data_v.txt
+print alli > plot_data_i.txt
+plot v(v_out)
+plot v(c_out)
+.endc
+.end
diff --git a/Examples/Astable555/555/555.pro b/Examples/Astable555/555/555.pro
new file mode 100644
index 00000000..38d194c6
--- /dev/null
+++ b/Examples/Astable555/555/555.pro
@@ -0,0 +1,72 @@
+update=22/05/2015 07:44:53
+version=1
+last_client=kicad
+[general]
+version=1
+RootSch=
+BoardNm=
+[pcbnew]
+version=1
+LastNetListRead=
+UseCmpFile=1
+PadDrill=0.600000000000
+PadDrillOvalY=0.600000000000
+PadSizeH=1.500000000000
+PadSizeV=1.500000000000
+PcbTextSizeV=1.500000000000
+PcbTextSizeH=1.500000000000
+PcbTextThickness=0.300000000000
+ModuleTextSizeV=1.000000000000
+ModuleTextSizeH=1.000000000000
+ModuleTextSizeThickness=0.150000000000
+SolderMaskClearance=0.000000000000
+SolderMaskMinWidth=0.000000000000
+DrawSegmentWidth=0.200000000000
+BoardOutlineThickness=0.100000000000
+ModuleOutlineThickness=0.150000000000
+[cvpcb]
+version=1
+NetIExt=net
+[eeschema]
+version=1
+LibDir=
+[eeschema/libraries]
+LibName1=adc-dac
+LibName2=memory
+LibName3=xilinx
+LibName4=microcontrollers
+LibName5=dsp
+LibName6=microchip
+LibName7=analog_switches
+LibName8=motorola
+LibName9=texas
+LibName10=intel
+LibName11=audio
+LibName12=interface
+LibName13=digital-audio
+LibName14=philips
+LibName15=display
+LibName16=cypress
+LibName17=siliconi
+LibName18=opto
+LibName19=atmel
+LibName20=contrib
+LibName21=power
+LibName22=device
+LibName23=transistors
+LibName24=conn
+LibName25=linear
+LibName26=regul
+LibName27=74xx
+LibName28=cmos4000
+LibName29=eSim_Analog
+LibName30=eSim_Devices
+LibName31=eSim_Digital
+LibName32=eSim_Hybrid
+LibName33=eSim_Miscellaneous
+LibName34=eSim_Power
+LibName35=eSim_Sources
+LibName36=eSim_Subckt
+LibName37=eSim_User
+LibName38=eSim_Plot
+LibName39=eSim_PSpice
diff --git a/Examples/Astable555/555/555.proj b/Examples/Astable555/555/555.proj
new file mode 100644
index 00000000..958ec40d
--- /dev/null
+++ b/Examples/Astable555/555/555.proj
@@ -0,0 +1 @@
+schematicFile 555.sch
diff --git a/Examples/Astable555/555/555.sch b/Examples/Astable555/555/555.sch
new file mode 100644
index 00000000..78d11841
--- /dev/null
+++ b/Examples/Astable555/555/555.sch
@@ -0,0 +1,256 @@
+EESchema Schematic File Version 2
+LIBS:adc-dac
+LIBS:memory
+LIBS:xilinx
+LIBS:microcontrollers
+LIBS:dsp
+LIBS:microchip
+LIBS:analog_switches
+LIBS:motorola
+LIBS:texas
+LIBS:intel
+LIBS:audio
+LIBS:interface
+LIBS:digital-audio
+LIBS:philips
+LIBS:display
+LIBS:cypress
+LIBS:siliconi
+LIBS:opto
+LIBS:atmel
+LIBS:contrib
+LIBS:power
+LIBS:device
+LIBS:transistors
+LIBS:conn
+LIBS:linear
+LIBS:regul
+LIBS:74xx
+LIBS:cmos4000
+LIBS:eSim_Analog
+LIBS:eSim_Devices
+LIBS:eSim_Digital
+LIBS:eSim_Hybrid
+LIBS:eSim_Miscellaneous
+LIBS:eSim_Power
+LIBS:eSim_Sources
+LIBS:eSim_Subckt
+LIBS:eSim_User
+LIBS:eSim_Plot
+LIBS:eSim_PSpice
+EELAYER 25 0
+EELAYER END
+$Descr A4 11693 8268
+encoding utf-8
+Sheet 1 1
+Title ""
+Date ""
+Rev ""
+Comp ""
+Comment1 ""
+Comment2 ""
+Comment3 ""
+Comment4 ""
+$EndDescr
+$Comp
+L eSim_R R3
+U 1 1 5E01A4E5
+P 6950 4150
+F 0 "R3" H 7000 4280 50  0000 C CNN
+F 1 "1k" H 7000 4100 50  0000 C CNN
+F 2 "" H 7000 4130 30  0000 C CNN
+F 3 "" V 7000 4200 30  0000 C CNN
+	1    6950 4150
+	0    1    1    0   
+$EndComp
+$Comp
+L eSim_R R1
+U 1 1 5E01A555
+P 4200 3500
+F 0 "R1" H 4250 3630 50  0000 C CNN
+F 1 "1k" H 4250 3450 50  0000 C CNN
+F 2 "" H 4250 3480 30  0000 C CNN
+F 3 "" V 4250 3550 30  0000 C CNN
+	1    4200 3500
+	0    1    1    0   
+$EndComp
+$Comp
+L eSim_R R2
+U 1 1 5E01A5D6
+P 4200 4000
+F 0 "R2" H 4250 4130 50  0000 C CNN
+F 1 "10k" H 4250 3950 50  0000 C CNN
+F 2 "" H 4250 3980 30  0000 C CNN
+F 3 "" V 4250 4050 30  0000 C CNN
+	1    4200 4000
+	0    1    1    0   
+$EndComp
+$Comp
+L DC v1
+U 1 1 5E01A67B
+P 3400 3750
+F 0 "v1" H 3200 3850 60  0000 C CNN
+F 1 "DC" H 3200 3700 60  0000 C CNN
+F 2 "R1" H 3100 3750 60  0000 C CNN
+F 3 "" H 3400 3750 60  0000 C CNN
+	1    3400 3750
+	1    0    0    -1  
+$EndComp
+$Comp
+L GND #PWR01
+U 1 1 5E01A6D6
+P 3400 4300
+F 0 "#PWR01" H 3400 4050 50  0001 C CNN
+F 1 "GND" H 3400 4150 50  0000 C CNN
+F 2 "" H 3400 4300 50  0001 C CNN
+F 3 "" H 3400 4300 50  0001 C CNN
+	1    3400 4300
+	1    0    0    -1  
+$EndComp
+$Comp
+L eSim_C C1
+U 1 1 5E01A70A
+P 4250 4600
+F 0 "C1" H 4275 4700 50  0000 L CNN
+F 1 "0.1u" H 4275 4500 50  0000 L CNN
+F 2 "" H 4288 4450 30  0000 C CNN
+F 3 "" H 4250 4600 60  0000 C CNN
+	1    4250 4600
+	1    0    0    -1  
+$EndComp
+$Comp
+L eSim_C C2
+U 1 1 5E01A8AB
+P 4850 4600
+F 0 "C2" H 4875 4700 50  0000 L CNN
+F 1 "0.01u" H 4875 4500 50  0000 L CNN
+F 2 "" H 4888 4450 30  0000 C CNN
+F 3 "" H 4850 4600 60  0000 C CNN
+	1    4850 4600
+	1    0    0    -1  
+$EndComp
+$Comp
+L GND #PWR02
+U 1 1 5E01AA9B
+P 5650 4950
+F 0 "#PWR02" H 5650 4700 50  0001 C CNN
+F 1 "GND" H 5650 4800 50  0000 C CNN
+F 2 "" H 5650 4950 50  0001 C CNN
+F 3 "" H 5650 4950 50  0001 C CNN
+	1    5650 4950
+	1    0    0    -1  
+$EndComp
+$Comp
+L plot_v1 U2
+U 1 1 5E01AAF8
+P 6700 3850
+F 0 "U2" H 6700 4350 60  0000 C CNN
+F 1 "plot_v1" H 6900 4200 60  0000 C CNN
+F 2 "" H 6700 3850 60  0000 C CNN
+F 3 "" H 6700 3850 60  0000 C CNN
+	1    6700 3850
+	1    0    0    -1  
+$EndComp
+Text GLabel 6850 3900 0    60   Input ~ 0
+V_Out
+$Comp
+L plot_v1 U1
+U 1 1 5E01ABD2
+P 3850 4550
+F 0 "U1" H 3850 5050 60  0000 C CNN
+F 1 "plot_v1" H 4050 4900 60  0000 C CNN
+F 2 "" H 3850 4550 60  0000 C CNN
+F 3 "" H 3850 4550 60  0000 C CNN
+	1    3850 4550
+	1    0    0    -1  
+$EndComp
+Text GLabel 4000 4500 0    60   Input ~ 0
+C_Out
+Wire Wire Line
+	4250 3700 4250 3900
+Wire Wire Line
+	6200 4000 6500 4000
+Wire Wire Line
+	6500 4000 6500 3350
+Wire Wire Line
+	6500 3350 4500 3350
+Wire Wire Line
+	4500 3350 4500 3800
+Wire Wire Line
+	4500 3800 4250 3800
+Connection ~ 4250 3800
+Wire Wire Line
+	5100 4250 4650 4250
+Wire Wire Line
+	4650 4250 4650 3100
+Wire Wire Line
+	3400 3100 5650 3100
+Wire Wire Line
+	5650 3100 5650 3400
+Wire Wire Line
+	4250 3100 4250 3400
+Connection ~ 4650 3100
+Wire Wire Line
+	3400 3300 3400 3100
+Connection ~ 4250 3100
+Wire Wire Line
+	3400 4300 3400 4200
+Wire Wire Line
+	4250 4200 4250 4450
+Wire Wire Line
+	6200 4250 6450 4250
+Wire Wire Line
+	6450 4250 6450 5200
+Wire Wire Line
+	6450 5200 4550 5200
+Wire Wire Line
+	4550 5200 4550 3750
+Wire Wire Line
+	3850 4350 4550 4350
+Connection ~ 4250 4350
+Wire Wire Line
+	4550 3750 5100 3750
+Connection ~ 4550 4350
+Wire Wire Line
+	4850 4450 4850 4000
+Wire Wire Line
+	4850 4000 5100 4000
+Wire Wire Line
+	4250 4750 4250 4850
+Wire Wire Line
+	4250 4850 7000 4850
+Wire Wire Line
+	4850 4850 4850 4750
+Wire Wire Line
+	5650 4600 5650 4950
+Connection ~ 4850 4850
+Wire Wire Line
+	6200 3750 7000 3750
+Wire Wire Line
+	7000 3750 7000 4050
+Wire Wire Line
+	7000 4850 7000 4350
+Connection ~ 5650 4850
+Wire Wire Line
+	6700 3650 6700 3750
+Connection ~ 6700 3750
+Wire Wire Line
+	6850 3900 7000 3900
+Connection ~ 7000 3900
+Wire Wire Line
+	4000 4500 4050 4500
+Wire Wire Line
+	4050 4500 4050 4350
+Connection ~ 4050 4350
+$Comp
+L LM555N X1
+U 1 1 5E01A47E
+P 5650 4000
+F 0 "X1" H 5650 3950 60  0000 C CNN
+F 1 "LM555N" H 5650 4100 60  0000 C CNN
+F 2 "" H 5600 4000 60  0000 C CNN
+F 3 "" H 5600 4000 60  0000 C CNN
+	1    5650 4000
+	1    0    0    -1  
+$EndComp
+$EndSCHEMATC
diff --git a/Examples/Astable555/555/555_Previous_Values.xml b/Examples/Astable555/555/555_Previous_Values.xml
new file mode 100644
index 00000000..4375860d
--- /dev/null
+++ b/Examples/Astable555/555/555_Previous_Values.xml
@@ -0,0 +1 @@
+<KicadtoNgspice><source><v1 name="Source type">dc<field1 name="Value">10</field1></v1></source><model /><devicemodel /><subcircuit><x1><field>/home/ash98/Downloads/lm555n</field></x1></subcircuit><analysis><ac><field1 name="Lin">true</field1><field2 name="Dec">false</field2><field3 name="Oct">false</field3><field4 name="Start Frequency" /><field5 name="Stop Frequency" /><field6 name="No. of points" /><field7 name="Start Fre Combo">Hz</field7><field8 name="Stop Fre Combo">Hz</field8></ac><dc><field1 name="Source 1" /><field2 name="Start" /><field3 name="Increment" /><field4 name="Stop" /><field5 name="Operating Point">0</field5><field6 name="Start Combo">Volts or Amperes</field6><field7 name="Increment Combo">Volts or Amperes</field7><field8 name="Stop Combo">Volts or Amperes</field8><field9 name="Source 2" /><field10 name="Start" /><field11 name="Increment" /><field12 name="Stop" /><field13 name="Start Combo">Volts or Amperes</field13><field14 name="Increment Combo">Volts or Amperes</field14><field15 name="Stop Combo">Volts or Amperes</field15></dc><tran><field1 name="Start Time">0</field1><field2 name="Step Time">1</field2><field3 name="Stop Time">50</field3><field4 name="Start Combo">Sec</field4><field5 name="Step Combo">ms</field5><field6 name="Stop Combo">ms</field6></tran></analysis></KicadtoNgspice>
\ No newline at end of file
diff --git a/Examples/Astable555/555/NPN.lib b/Examples/Astable555/555/NPN.lib
new file mode 100644
index 00000000..6509fe7a
--- /dev/null
+++ b/Examples/Astable555/555/NPN.lib
@@ -0,0 +1,4 @@
+.model Q2N2222  NPN( Is=14.34f Xti=3 Eg=1.11 Vaf=74.03 Bf=400 Ne=1.307 
++ Ise=14.34f Ikf=.2847 Xtb=1.5 Br=6.092 Nc=2 Isc=0 Ikr=0 Rc=1 Cjc=7.306p 
++ Mjc=.3416 Vjc=.75 Fc=.5 Cje=22.01p Mje=.377 Vje=.75 Tr=46.91n Tf=411.1p 
++ Itf=.6 Vtf=1.7 Xtf=3 Rb=10) 
diff --git a/Examples/Astable555/555/analysis b/Examples/Astable555/555/analysis
new file mode 100644
index 00000000..2a579eef
--- /dev/null
+++ b/Examples/Astable555/555/analysis
@@ -0,0 +1 @@
+.tran 1e-03 50e-03 0e-00
\ No newline at end of file
diff --git a/Examples/Astable555/555/lm555n-cache.lib b/Examples/Astable555/555/lm555n-cache.lib
new file mode 100644
index 00000000..824af11e
--- /dev/null
+++ b/Examples/Astable555/555/lm555n-cache.lib
@@ -0,0 +1,205 @@
+EESchema-LIBRARY Version 2.3
+#encoding utf-8
+#
+# GND-RESCUE-lm555n
+#
+DEF ~GND-RESCUE-lm555n #PWR 0 0 Y Y 1 F P
+F0 "#PWR" 0 0 30 H I C CNN
+F1 "GND-RESCUE-lm555n" 0 -70 30 H I C CNN
+F2 "" 0 0 60 H I C CNN
+F3 "" 0 0 60 H I C CNN
+DRAW
+P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N
+X GND 1 0 0 0 U 30 30 1 1 W N
+ENDDRAW
+ENDDEF
+#
+# PORT
+#
+DEF PORT U 0 40 Y Y 26 F N
+F0 "U" 50 100 30 H V C CNN
+F1 "PORT" 0 0 30 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0
+A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50
+S -100 50 100 -50 0 1 0 N
+X ~ 1 250 0 100 L 30 30 1 1 B
+X ~ 2 250 0 100 L 30 30 2 1 B
+X ~ 3 250 0 100 L 30 30 3 1 B
+X ~ 4 250 0 100 L 30 30 4 1 B
+X ~ 5 250 0 100 L 30 30 5 1 B
+X ~ 6 250 0 100 L 30 30 6 1 B
+X ~ 7 250 0 100 L 30 30 7 1 B
+X ~ 8 250 0 100 L 30 30 8 1 B
+X ~ 9 250 0 100 L 30 30 9 1 B
+X ~ 10 250 0 100 L 30 30 10 1 B
+X ~ 11 250 0 100 L 30 30 11 1 B
+X ~ 12 250 0 100 L 30 30 12 1 B
+X ~ 13 250 0 100 L 30 30 13 1 B
+X ~ 14 250 0 100 L 30 30 14 1 B
+X ~ 15 250 0 100 L 30 30 15 1 B
+X ~ 16 250 0 100 L 30 30 16 1 B
+X ~ 17 250 0 100 L 30 30 17 1 B
+X ~ 18 250 0 100 L 30 30 18 1 B
+X ~ 19 250 0 100 L 30 30 19 1 B
+X ~ 20 250 0 100 L 30 30 20 1 B
+X ~ 21 250 0 100 L 30 30 21 1 B
+X ~ 22 250 0 100 L 30 30 22 1 B
+X ~ 23 250 0 100 L 30 30 23 1 B
+X ~ 24 250 0 100 L 30 30 24 1 B
+X ~ 25 250 0 100 L 30 30 25 1 B
+X ~ 26 250 0 100 L 30 30 26 1 B
+ENDDRAW
+ENDDEF
+#
+# PWR_FLAG
+#
+DEF PWR_FLAG #FLG 0 0 N N 1 F P
+F0 "#FLG" 0 75 50 H I C CNN
+F1 "PWR_FLAG" 0 150 50 H V C CNN
+F2 "" 0 0 50 H I C CNN
+F3 "" 0 0 50 H I C CNN
+DRAW
+X pwr 1 0 0 0 U 50 50 0 0 w
+P 6 0 1 0 0 0 0 50 -40 75 0 100 40 75 0 50 N
+ENDDRAW
+ENDDEF
+#
+# R-RESCUE-lm555n
+#
+DEF R-RESCUE-lm555n R 0 0 N Y 1 F N
+F0 "R" 80 0 50 V V C CNN
+F1 "R-RESCUE-lm555n" 0 0 50 V V C CNN
+F2 "" 0 0 60 H I C CNN
+F3 "" 0 0 60 H I C CNN
+$FPLIST
+ R?
+ SM0603
+ SM0805
+ R?-*
+$ENDFPLIST
+DRAW
+S -40 150 40 -150 0 1 12 N
+X ~ 1 0 250 100 D 60 60 1 1 P
+X ~ 2 0 -250 100 U 60 60 1 1 P
+ENDDRAW
+ENDDEF
+#
+# VCVS
+#
+DEF VCVS E 0 40 Y Y 1 F N
+F0 "E" 0 150 50 H V C CNN
+F1 "VCVS" -200 -50 50 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+$FPLIST
+ 1_pin
+$ENDFPLIST
+DRAW
+S -100 100 100 -100 0 1 0 N
+X + 1 -300 50 200 R 35 35 1 1 P
+X - 2 300 50 200 L 35 35 1 1 P
+X +c 3 -50 -200 100 U 35 35 1 1 P
+X -c 4 50 -200 100 U 35 35 1 1 P
+ENDDRAW
+ENDDEF
+#
+# adc_bridge_1
+#
+DEF adc_bridge_1 U 0 40 Y Y 1 F N
+F0 "U" 0 0 60 H V C CNN
+F1 "adc_bridge_1" 0 150 60 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+S -400 200 350 -50 0 1 0 N
+X IN1 1 -600 50 200 R 50 50 1 1 I
+X OUT1 2 550 50 200 L 50 50 1 1 O
+ENDDRAW
+ENDDEF
+#
+# d_inverter
+#
+DEF d_inverter U 0 40 Y Y 1 F N
+F0 "U" 0 -100 60 H V C CNN
+F1 "d_inverter" 0 150 60 H V C CNN
+F2 "" 50 -50 60 H V C CNN
+F3 "" 50 -50 60 H V C CNN
+DRAW
+P 4 0 1 0 -100 50 -100 -50 100 0 -100 50 N
+X ~ 1 -300 0 200 R 50 50 1 1 I
+X ~ 2 300 0 200 L 50 50 1 1 O I
+ENDDRAW
+ENDDEF
+#
+# d_srlatch
+#
+DEF d_srlatch U 0 40 Y Y 1 F N
+F0 "U" 0 0 60 H V C CNN
+F1 "d_srlatch" 50 150 60 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+S 600 550 -600 -600 0 1 0 N
+X S 1 -800 400 200 R 50 50 1 1 I
+X R 2 -800 -450 200 R 50 50 1 1 I
+X EN 3 -800 0 200 R 50 50 1 1 I
+X Set 4 0 750 200 D 50 50 1 1 I
+X Reset 5 0 -800 200 U 50 50 1 1 I
+X Out 6 800 400 200 L 50 50 1 1 O
+X Nout 7 800 -450 200 L 50 50 1 1 O I
+ENDDRAW
+ENDDEF
+#
+# dac_bridge_1
+#
+DEF dac_bridge_1 U 0 40 Y Y 1 F N
+F0 "U" 0 0 60 H V C CNN
+F1 "dac_bridge_1" 0 150 60 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+S -400 200 350 -50 0 1 0 N
+X IN1 1 -600 50 200 R 50 50 1 1 I
+X OUT1 2 550 50 200 L 50 50 1 1 O
+ENDDRAW
+ENDDEF
+#
+# eSim_NPN
+#
+DEF eSim_NPN Q 0 0 Y N 1 F N
+F0 "Q" -100 50 50 H V R CNN
+F1 "eSim_NPN" -50 150 50 H V R CNN
+F2 "" 200 100 29 H V C CNN
+F3 "" 0 0 60 H V C CNN
+ALIAS BC547 Q2N2222
+DRAW
+C 50 0 111 0 1 10 N
+P 2 0 1 0 25 25 100 100 N
+P 3 0 1 0 25 -25 100 -100 100 -100 N
+P 3 0 1 20 25 75 25 -75 25 -75 N
+P 5 0 1 0 50 -70 70 -50 90 -90 50 -70 50 -70 F
+X C 1 100 200 100 D 50 50 1 1 P
+X B 2 -200 0 225 R 50 50 1 1 P
+X E 3 100 -200 100 U 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
+# limit
+#
+DEF limit U 0 40 Y Y 1 F N
+F0 "U" 50 -50 60 H V C CNN
+F1 "limit" 50 50 60 H V C CNN
+F2 "" 0 50 60 H V C CNN
+F3 "" 0 50 60 H V C CNN
+DRAW
+C 300 0 0 0 1 0 N
+P 4 0 1 0 -200 200 -200 -200 400 0 -200 200 N
+X IN 1 -400 0 200 R 50 50 1 1 I
+X OUT 2 600 0 200 L 50 50 1 1 O
+ENDDRAW
+ENDDEF
+#
+#End Library
diff --git a/Examples/Astable555/555/lm555n-rescue.lib b/Examples/Astable555/555/lm555n-rescue.lib
new file mode 100644
index 00000000..fffeca36
--- /dev/null
+++ b/Examples/Astable555/555/lm555n-rescue.lib
@@ -0,0 +1,18 @@
+EESchema-LIBRARY Version 2.3
+#encoding utf-8
+#
+# d_inverter-RESCUE-lm555n
+#
+DEF d_inverter-RESCUE-lm555n U 0 40 Y Y 1 F N
+F0 "U" -150 100 40 H V C CNN
+F1 "d_inverter-RESCUE-lm555n" 100 100 40 H V C CNN
+F2 "" 0 0 60 H I C CNN
+F3 "" 0 0 60 H I C CNN
+DRAW
+P 4 0 1 0 -100 -100 -100 100 100 0 -100 -100 N
+X in 1 -250 0 150 R 25 25 1 1 I
+X out 2 250 0 150 L 25 25 1 1 O I
+ENDDRAW
+ENDDEF
+#
+#End Library
diff --git a/Examples/Astable555/555/lm555n.cir b/Examples/Astable555/555/lm555n.cir
new file mode 100644
index 00000000..682d4945
--- /dev/null
+++ b/Examples/Astable555/555/lm555n.cir
@@ -0,0 +1,31 @@
+* /home/ash98/Downloads/lm555n/lm555n.cir
+
+* EESchema Netlist Version 1.1 (Spice format) creation date: Tue Dec 24 15:58:04 2019
+
+* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N
+* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0
+
+* Sheet Name: /
+E2  Net-_E2-Pad1_ GND /c /d 10000		
+U1  Net-_Q1-Pad3_ /d Net-_U1-Pad3_ Net-_U1-Pad4_ /a /b Net-_Q1-Pad1_ Net-_R1-Pad1_ PORT		
+R8  Net-_R8-Pad1_ Net-_Q1-Pad2_ 1500		
+R7  Net-_E2-Pad1_ Net-_R7-Pad2_ 25		
+R6  Net-_E1-Pad1_ Net-_R6-Pad2_ 25		
+E1  Net-_E1-Pad1_ GND /b /a 10000		
+R4  /b /a 2E6		
+R5  /c /d 2E6		
+R3  /c Net-_Q1-Pad3_ 5000		
+R2  /a /c 5000		
+R1  Net-_R1-Pad1_ /a 5000		
+U8  Net-_U4-Pad2_ Net-_U6-Pad2_ Net-_U5-Pad2_ Net-_U7-Pad2_ Net-_U7-Pad2_ Net-_U8-Pad6_ Net-_U10-Pad1_ d_srlatch		
+U7  Net-_U5-Pad2_ Net-_U7-Pad2_ d_inverter		
+U5  Net-_U1-Pad4_ Net-_U5-Pad2_ adc_bridge_1		
+U4  Net-_U3-Pad2_ Net-_U4-Pad2_ adc_bridge_1		
+U6  Net-_U2-Pad2_ Net-_U6-Pad2_ adc_bridge_1		
+U3  Net-_R7-Pad2_ Net-_U3-Pad2_ limit		
+U2  Net-_R6-Pad2_ Net-_U2-Pad2_ limit		
+U9  Net-_U8-Pad6_ Net-_U1-Pad3_ dac_bridge_1		
+U10  Net-_U10-Pad1_ Net-_R8-Pad1_ dac_bridge_1		
+Q1  Net-_Q1-Pad1_ Net-_Q1-Pad2_ Net-_Q1-Pad3_ eSim_NPN		
+
+.end
diff --git a/Examples/Astable555/555/lm555n.cir.out b/Examples/Astable555/555/lm555n.cir.out
new file mode 100644
index 00000000..a81070a1
--- /dev/null
+++ b/Examples/Astable555/555/lm555n.cir.out
@@ -0,0 +1,42 @@
+* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:00:36 am ist
+.include npn_1.lib
+* Inverter d_inverter
+* SR Latch d_srlatch
+e2  18 0 23 14 10000
+* Limiter limit8
+* Digital to Analog converter dac8
+* Analog to Digital converter adc8
+u1  22 14 7 6 15 16 3 13 port
+r8  9 2 1500
+q1 3 2 22 npn_1
+r7  18 20 25
+r6  17 19 25
+e1  17 0 16 15 10000
+r4  16 15 2e6
+r5  23 14 2e6
+r3  23 22 5000
+r2  15 23 5000
+r1  13 15 5000
+a1 5 21 u5
+.model u5 d_inverter(rise_delay=1e-12 fall_delay=1e-12 input_load=1e-12)
+a2 1 4 5 21 21 8 10 u6
+.model u6 d_srlatch(rise_delay=1e-12 fall_delay=1e-12 ic=0
++sr_load=1e-12 enable_load=1e-12 set_load=1e-12 reset_load=1e-12
++sr_delay=1e-12 enable_delay=1e-12 set_delay=1e-12 reset_delay=1e-12)
+a3 19 11 u4
+a4 20 12 u4
+.model u4 limit(out_lower_limit=0.0 out_upper_limit=5.0 in_offset=0.0 gain=1.0)
+a5 [8] [7] u3
+a6 [10] [9] u3
+.model u3 dac_bridge(out_low=0.2 out_high=5.0 out_undef=5.0 )
+a7 [11] [4] u2
+a8 [12] [1] u2
+a9 [6] [5] u2
+.model u2 adc_bridge(in_low=0.8 in_high=2.0 )
+
+.control
+run
+print allv > plot_data_v.txt
+print alli > plot_data_i.txt
+.endc
+.end
diff --git a/Examples/Astable555/555/lm555n.pro b/Examples/Astable555/555/lm555n.pro
new file mode 100644
index 00000000..0a5408b6
--- /dev/null
+++ b/Examples/Astable555/555/lm555n.pro
@@ -0,0 +1,57 @@
+update=Tue Apr  2 17:35:59 2019
+last_client=eeschema
+[eeschema]
+version=1
+LibDir=/home/yogesh/FreeEDA/library
+[eeschema/libraries]
+LibName1=lm555n-rescue
+LibName2=power
+LibName3=device
+LibName4=transistors
+LibName5=conn
+LibName6=linear
+LibName7=regul
+LibName8=74xx
+LibName9=cmos4000
+LibName10=adc-dac
+LibName11=memory
+LibName12=xilinx
+LibName13=special
+LibName14=microcontrollers
+LibName15=dsp
+LibName16=microchip
+LibName17=analog_switches
+LibName18=motorola
+LibName19=texas
+LibName20=intel
+LibName21=audio
+LibName22=interface
+LibName23=digital-audio
+LibName24=philips
+LibName25=display
+LibName26=cypress
+LibName27=siliconi
+LibName28=opto
+LibName29=atmel
+LibName30=contrib
+LibName31=valves
+LibName32=analogSpice
+LibName33=analogXSpice
+LibName34=converterSpice
+LibName35=digitalSpice
+LibName36=linearSpice
+LibName37=measurementSpice
+LibName38=portSpice
+LibName39=sourcesSpice
+LibName40=digitalXSpice
+LibName41=eSim_User
+LibName42=eSim_Subckt
+LibName43=eSim_Sources
+LibName44=eSim_PSpice
+LibName45=eSim_Power
+LibName46=eSim_Plot
+LibName47=eSim_Miscellaneous
+LibName48=eSim_Hybrid
+LibName49=eSim_Digital
+LibName50=eSim_Devices
+LibName51=eSim_Analog
diff --git a/Examples/Astable555/555/lm555n.sch b/Examples/Astable555/555/lm555n.sch
new file mode 100644
index 00000000..28110b13
--- /dev/null
+++ b/Examples/Astable555/555/lm555n.sch
@@ -0,0 +1,518 @@
+EESchema Schematic File Version 2
+LIBS:lm555n-rescue
+LIBS:power
+LIBS:device
+LIBS:transistors
+LIBS:conn
+LIBS:linear
+LIBS:regul
+LIBS:74xx
+LIBS:cmos4000
+LIBS:adc-dac
+LIBS:memory
+LIBS:xilinx
+LIBS:microcontrollers
+LIBS:dsp
+LIBS:microchip
+LIBS:analog_switches
+LIBS:motorola
+LIBS:texas
+LIBS:intel
+LIBS:audio
+LIBS:interface
+LIBS:digital-audio
+LIBS:philips
+LIBS:display
+LIBS:cypress
+LIBS:siliconi
+LIBS:opto
+LIBS:atmel
+LIBS:contrib
+LIBS:valves
+LIBS:eSim_User
+LIBS:eSim_Subckt
+LIBS:eSim_Sources
+LIBS:eSim_PSpice
+LIBS:eSim_Power
+LIBS:eSim_Plot
+LIBS:eSim_Miscellaneous
+LIBS:eSim_Hybrid
+LIBS:eSim_Digital
+LIBS:eSim_Devices
+LIBS:eSim_Analog
+LIBS:lm555n-cache
+EELAYER 25 0
+EELAYER END
+$Descr A4 11693 8268
+encoding utf-8
+Sheet 1 1
+Title ""
+Date "17 dec 2012"
+Rev ""
+Comp ""
+Comment1 ""
+Comment2 ""
+Comment3 ""
+Comment4 ""
+$EndDescr
+Text Notes 3700 3050 0    60   ~ 0
+IC 555
+Wire Wire Line
+	2650 3000 2850 3000
+Wire Wire Line
+	2650 4750 2650 4650
+Connection ~ 2350 3550
+Connection ~ 2350 4900
+Wire Wire Line
+	2350 4100 2350 4200
+Wire Wire Line
+	9100 4900 9100 4800
+Wire Wire Line
+	8500 4600 8500 4250
+Wire Wire Line
+	3350 3250 3050 3250
+Wire Wire Line
+	3050 3250 3050 3750
+Wire Wire Line
+	3500 4350 3500 4500
+Wire Wire Line
+	3650 3550 4200 3550
+Wire Wire Line
+	3850 3250 4200 3250
+Wire Wire Line
+	3150 3550 3150 3700
+Wire Wire Line
+	3150 3700 3500 3700
+Wire Wire Line
+	3500 3700 3500 3750
+Connection ~ 3500 4450
+Wire Wire Line
+	3700 4450 3700 4400
+Wire Wire Line
+	3050 4350 3050 4450
+Wire Wire Line
+	3050 4450 3700 4450
+Wire Wire Line
+	9100 4250 9000 4250
+Wire Wire Line
+	9100 4400 9100 4350
+Wire Wire Line
+	9100 4350 9200 4350
+Wire Wire Line
+	10100 2950 10350 2950
+Wire Wire Line
+	2350 4900 2350 4700
+Wire Wire Line
+	2350 3500 2350 3600
+Wire Wire Line
+	2250 3000 2350 3000
+Wire Wire Line
+	2350 4150 2650 4150
+Connection ~ 2350 4150
+Wire Wire Line
+	2250 3550 2650 3550
+Wire Wire Line
+	2650 3550 2650 3500
+Wire Wire Line
+	4300 4750 4300 4650
+Text Label 2800 4100 0    60   ~ 0
+d
+$Comp
+L VCVS E2
+U 1 1 50AA12FF
+P 3000 4050
+F 0 "E2" H 2800 4150 50  0000 C CNN
+F 1 "10000" H 2800 4000 50  0000 C CNN
+F 2 "" H 3000 4050 60  0001 C CNN
+F 3 "" H 3000 4050 60  0001 C CNN
+	1    3000 4050
+	0    1    1    0   
+$EndComp
+$Comp
+L PWR_FLAG #FLG01
+U 1 1 50AA39A3
+P 3700 4400
+F 0 "#FLG01" H 3700 4670 30  0001 C CNN
+F 1 "PWR_FLAG" H 3700 4630 30  0000 C CNN
+F 2 "" H 3700 4400 60  0001 C CNN
+F 3 "" H 3700 4400 60  0001 C CNN
+	1    3700 4400
+	1    0    0    -1  
+$EndComp
+$Comp
+L PORT U1
+U 5 1 50AA2210
+P 2000 3550
+F 0 "U1" H 2000 3500 30  0000 C CNN
+F 1 "PORT" H 2000 3550 30  0000 C CNN
+F 2 "" H 2000 3550 60  0001 C CNN
+F 3 "" H 2000 3550 60  0001 C CNN
+	5    2000 3550
+	1    0    0    -1  
+$EndComp
+$Comp
+L PORT U1
+U 1 1 50AA21C7
+P 2000 4900
+F 0 "U1" H 2000 4850 30  0000 C CNN
+F 1 "PORT" H 2000 4900 30  0000 C CNN
+F 2 "" H 2000 4900 60  0001 C CNN
+F 3 "" H 2000 4900 60  0001 C CNN
+	1    2000 4900
+	1    0    0    -1  
+$EndComp
+$Comp
+L PORT U1
+U 2 1 50AA21BC
+P 2650 5000
+F 0 "U1" H 2650 4950 30  0000 C CNN
+F 1 "PORT" H 2650 5000 30  0000 C CNN
+F 2 "" H 2650 5000 60  0001 C CNN
+F 3 "" H 2650 5000 60  0001 C CNN
+	2    2650 5000
+	0    -1   -1   0   
+$EndComp
+$Comp
+L PORT U1
+U 4 1 50AA21A9
+P 4300 5000
+F 0 "U1" H 4300 4950 30  0000 C CNN
+F 1 "PORT" H 4300 5000 30  0000 C CNN
+F 2 "" H 4300 5000 60  0001 C CNN
+F 3 "" H 4300 5000 60  0001 C CNN
+	4    4300 5000
+	0    -1   -1   0   
+$EndComp
+$Comp
+L PORT U1
+U 7 1 50AA21A0
+P 9450 4350
+F 0 "U1" H 9450 4300 30  0000 C CNN
+F 1 "PORT" H 9450 4350 30  0000 C CNN
+F 2 "" H 9450 4350 60  0001 C CNN
+F 3 "" H 9450 4350 60  0001 C CNN
+	7    9450 4350
+	-1   0    0    1   
+$EndComp
+$Comp
+L PORT U1
+U 3 1 50AA2181
+P 10600 2950
+F 0 "U1" H 10600 2900 30  0000 C CNN
+F 1 "PORT" H 10600 2950 30  0000 C CNN
+F 2 "" H 10600 2950 60  0001 C CNN
+F 3 "" H 10600 2950 60  0001 C CNN
+	3    10600 2950
+	-1   0    0    1   
+$EndComp
+$Comp
+L PORT U1
+U 6 1 50AA2171
+P 3100 3000
+F 0 "U1" H 3100 2950 30  0000 C CNN
+F 1 "PORT" H 3100 3000 30  0000 C CNN
+F 2 "" H 3100 3000 60  0001 C CNN
+F 3 "" H 3100 3000 60  0001 C CNN
+	6    3100 3000
+	-1   0    0    1   
+$EndComp
+$Comp
+L PORT U1
+U 8 1 50AA2162
+P 2000 3000
+F 0 "U1" H 2000 2950 30  0000 C CNN
+F 1 "PORT" H 2000 3000 30  0000 C CNN
+F 2 "" H 2000 3000 60  0001 C CNN
+F 3 "" H 2000 3000 60  0001 C CNN
+	8    2000 3000
+	1    0    0    -1  
+$EndComp
+$Comp
+L R-RESCUE-lm555n R8
+U 1 1 50AA20DA
+P 8750 4250
+F 0 "R8" V 8830 4250 50  0000 C CNN
+F 1 "1500" V 8750 4250 50  0000 C CNN
+F 2 "" H 8750 4250 60  0001 C CNN
+F 3 "" H 8750 4250 60  0001 C CNN
+	1    8750 4250
+	0    1    1    0   
+$EndComp
+$Comp
+L GND-RESCUE-lm555n #PWR02
+U 1 1 50AA140C
+P 3500 4500
+F 0 "#PWR02" H 3500 4500 30  0001 C CNN
+F 1 "GND" H 3500 4430 30  0001 C CNN
+F 2 "" H 3500 4500 60  0001 C CNN
+F 3 "" H 3500 4500 60  0001 C CNN
+	1    3500 4500
+	1    0    0    -1  
+$EndComp
+Text Label 2800 4000 0    60   ~ 0
+c
+Text Label 2650 4650 0    60   ~ 0
+d
+Text Label 2650 4150 0    60   ~ 0
+c
+$Comp
+L R-RESCUE-lm555n R7
+U 1 1 50AA12F7
+P 3600 3250
+F 0 "R7" V 3680 3250 50  0000 C CNN
+F 1 "25" V 3600 3250 50  0000 C CNN
+F 2 "" H 3600 3250 60  0001 C CNN
+F 3 "" H 3600 3250 60  0001 C CNN
+	1    3600 3250
+	0    -1   -1   0   
+$EndComp
+$Comp
+L R-RESCUE-lm555n R6
+U 1 1 50AA12B0
+P 3400 3550
+F 0 "R6" V 3480 3550 50  0000 C CNN
+F 1 "25" V 3400 3550 50  0000 C CNN
+F 2 "" H 3400 3550 60  0001 C CNN
+F 3 "" H 3400 3550 60  0001 C CNN
+	1    3400 3550
+	0    -1   -1   0   
+$EndComp
+Text Label 3250 4000 0    60   ~ 0
+b
+Text Label 3250 4100 0    60   ~ 0
+a
+Text Label 2650 3000 0    60   ~ 0
+b
+Text Label 2650 3500 0    60   ~ 0
+a
+$Comp
+L VCVS E1
+U 1 1 50AA11B6
+P 3450 4050
+F 0 "E1" H 3250 4150 50  0000 C CNN
+F 1 "10000" H 3250 4000 50  0000 C CNN
+F 2 "" H 3450 4050 60  0001 C CNN
+F 3 "" H 3450 4050 60  0001 C CNN
+	1    3450 4050
+	0    1    1    0   
+$EndComp
+$Comp
+L R-RESCUE-lm555n R4
+U 1 1 50A9E00B
+P 2650 3250
+F 0 "R4" V 2730 3250 50  0000 C CNN
+F 1 "2E6" V 2650 3250 50  0000 C CNN
+F 2 "" H 2650 3250 60  0001 C CNN
+F 3 "" H 2650 3250 60  0001 C CNN
+	1    2650 3250
+	1    0    0    -1  
+$EndComp
+$Comp
+L R-RESCUE-lm555n R5
+U 1 1 50A9E001
+P 2650 4400
+F 0 "R5" V 2730 4400 50  0000 C CNN
+F 1 "2E6" V 2650 4400 50  0000 C CNN
+F 2 "" H 2650 4400 60  0001 C CNN
+F 3 "" H 2650 4400 60  0001 C CNN
+	1    2650 4400
+	1    0    0    -1  
+$EndComp
+$Comp
+L R-RESCUE-lm555n R3
+U 1 1 50A9DF09
+P 2350 4450
+F 0 "R3" V 2430 4450 50  0000 C CNN
+F 1 "5000" V 2350 4450 50  0000 C CNN
+F 2 "" H 2350 4450 60  0001 C CNN
+F 3 "" H 2350 4450 60  0001 C CNN
+	1    2350 4450
+	1    0    0    -1  
+$EndComp
+$Comp
+L R-RESCUE-lm555n R2
+U 1 1 50A9DF03
+P 2350 3850
+F 0 "R2" V 2430 3850 50  0000 C CNN
+F 1 "5000" V 2350 3850 50  0000 C CNN
+F 2 "" H 2350 3850 60  0001 C CNN
+F 3 "" H 2350 3850 60  0001 C CNN
+	1    2350 3850
+	1    0    0    -1  
+$EndComp
+$Comp
+L R-RESCUE-lm555n R1
+U 1 1 50A9DEFE
+P 2350 3250
+F 0 "R1" V 2430 3250 50  0000 C CNN
+F 1 "5000" V 2350 3250 50  0000 C CNN
+F 2 "" H 2350 3250 60  0001 C CNN
+F 3 "" H 2350 3250 60  0001 C CNN
+	1    2350 3250
+	1    0    0    -1  
+$EndComp
+$Comp
+L d_srlatch U8
+U 1 1 5E01E563
+P 8000 3350
+F 0 "U8" H 8000 3350 60  0000 C CNN
+F 1 "d_srlatch" H 8050 3500 60  0000 C CNN
+F 2 "" H 8000 3350 60  0000 C CNN
+F 3 "" H 8000 3350 60  0000 C CNN
+	1    8000 3350
+	1    0    0    -1  
+$EndComp
+$Comp
+L d_inverter U7
+U 1 1 5E01F10F
+P 7450 4400
+F 0 "U7" H 7450 4300 60  0000 C CNN
+F 1 "d_inverter" H 7450 4550 60  0000 C CNN
+F 2 "" H 7500 4350 60  0000 C CNN
+F 3 "" H 7500 4350 60  0000 C CNN
+	1    7450 4400
+	1    0    0    -1  
+$EndComp
+Wire Wire Line
+	7750 4400 8150 4400
+Wire Wire Line
+	8000 4400 8000 4150
+$Comp
+L adc_bridge_1 U5
+U 1 1 5E01F2C7
+P 6350 3400
+F 0 "U5" H 6350 3400 60  0000 C CNN
+F 1 "adc_bridge_1" H 6350 3550 60  0000 C CNN
+F 2 "" H 6350 3400 60  0000 C CNN
+F 3 "" H 6350 3400 60  0000 C CNN
+	1    6350 3400
+	1    0    0    -1  
+$EndComp
+Wire Wire Line
+	6900 3350 7200 3350
+Wire Wire Line
+	4300 4650 5600 4650
+Wire Wire Line
+	5600 4650 5600 3350
+Wire Wire Line
+	5600 3350 5750 3350
+$Comp
+L adc_bridge_1 U4
+U 1 1 5E01F3F2
+P 6350 3000
+F 0 "U4" H 6350 3000 60  0000 C CNN
+F 1 "adc_bridge_1" H 6350 3150 60  0000 C CNN
+F 2 "" H 6350 3000 60  0000 C CNN
+F 3 "" H 6350 3000 60  0000 C CNN
+	1    6350 3000
+	1    0    0    -1  
+$EndComp
+$Comp
+L adc_bridge_1 U6
+U 1 1 5E01F469
+P 6350 3850
+F 0 "U6" H 6350 3850 60  0000 C CNN
+F 1 "adc_bridge_1" H 6350 4000 60  0000 C CNN
+F 2 "" H 6350 3850 60  0000 C CNN
+F 3 "" H 6350 3850 60  0000 C CNN
+	1    6350 3850
+	1    0    0    -1  
+$EndComp
+Wire Wire Line
+	6900 3800 7200 3800
+Wire Wire Line
+	7200 2950 6900 2950
+$Comp
+L limit U3
+U 1 1 5E01F5DC
+P 4900 2950
+F 0 "U3" H 4950 2900 60  0000 C CNN
+F 1 "limit" H 4950 3000 60  0000 C CNN
+F 2 "" H 4900 3000 60  0000 C CNN
+F 3 "" H 4900 3000 60  0000 C CNN
+	1    4900 2950
+	1    0    0    -1  
+$EndComp
+Wire Wire Line
+	5500 2950 5750 2950
+Wire Wire Line
+	4200 3250 4200 2950
+Wire Wire Line
+	4200 2950 4500 2950
+$Comp
+L limit U2
+U 1 1 5E01F79D
+P 4800 3800
+F 0 "U2" H 4850 3750 60  0000 C CNN
+F 1 "limit" H 4850 3850 60  0000 C CNN
+F 2 "" H 4800 3850 60  0000 C CNN
+F 3 "" H 4800 3850 60  0000 C CNN
+	1    4800 3800
+	1    0    0    -1  
+$EndComp
+Wire Wire Line
+	5400 3800 5750 3800
+Wire Wire Line
+	4200 3550 4200 3800
+Wire Wire Line
+	4200 3800 4400 3800
+Wire Wire Line
+	7050 3350 7050 4400
+Wire Wire Line
+	7050 4400 7150 4400
+Connection ~ 7050 3350
+Wire Wire Line
+	8000 2600 8150 2600
+Wire Wire Line
+	8150 2600 8150 4400
+Connection ~ 8000 4400
+$Comp
+L dac_bridge_1 U9
+U 1 1 5E01FCD2
+P 9550 3000
+F 0 "U9" H 9550 3000 60  0000 C CNN
+F 1 "dac_bridge_1" H 9550 3150 60  0000 C CNN
+F 2 "" H 9550 3000 60  0000 C CNN
+F 3 "" H 9550 3000 60  0000 C CNN
+	1    9550 3000
+	1    0    0    -1  
+$EndComp
+Wire Wire Line
+	8800 2950 8950 2950
+$Comp
+L dac_bridge_1 U10
+U 1 1 5E01FE8E
+P 9600 3850
+F 0 "U10" H 9600 3850 60  0000 C CNN
+F 1 "dac_bridge_1" H 9600 4000 60  0000 C CNN
+F 2 "" H 9600 3850 60  0000 C CNN
+F 3 "" H 9600 3850 60  0000 C CNN
+	1    9600 3850
+	1    0    0    -1  
+$EndComp
+Wire Wire Line
+	9000 3800 8800 3800
+Wire Wire Line
+	9100 4000 9100 4250
+Wire Wire Line
+	9100 4000 10300 4000
+Wire Wire Line
+	10300 4000 10300 3800
+Wire Wire Line
+	10300 3800 10150 3800
+$Comp
+L eSim_NPN Q1
+U 1 1 5E01E782
+P 9000 4600
+F 0 "Q1" H 8900 4650 50  0000 R CNN
+F 1 "eSim_NPN" H 8950 4750 50  0000 R CNN
+F 2 "" H 9200 4700 29  0000 C CNN
+F 3 "" H 9000 4600 60  0000 C CNN
+	1    9000 4600
+	1    0    0    -1  
+$EndComp
+Wire Wire Line
+	8800 4600 8500 4600
+Wire Wire Line
+	2250 4900 9100 4900
+$EndSCHEMATC
diff --git a/Examples/Astable555/555/lm555n.sub b/Examples/Astable555/555/lm555n.sub
new file mode 100644
index 00000000..b524f5c6
--- /dev/null
+++ b/Examples/Astable555/555/lm555n.sub
@@ -0,0 +1,39 @@
+* Subcircuit lm555n
+.subckt lm555n 22 14 7 6 15 16 3 13
+.include npn_1.lib 
+* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:00:36 am ist
+* Inverter d_inverter
+* SR Latch d_srlatch
+e2  18 0 23 14 10000
+* Limiter limit8
+* Digital to Analog converter dac8
+* Analog to Digital converter adc8
+r8  9 2 1500
+q1 3 2 22 npn_1
+r7  18 20 25
+r6  17 19 25
+e1  17 0 16 15 10000
+r4  16 15 2e6
+r5  23 14 2e6
+r3  23 22 5000
+r2  15 23 5000
+r1  13 15 5000
+a1 5 21 u5
+.model u5 d_inverter(rise_delay=1e-12 fall_delay=1e-12 input_load=1e-12)
+a2 1 4 5 21 21 8 10 u6
+.model u6 d_srlatch(rise_delay=1e-12 fall_delay=1e-12 ic=0
++sr_load=1e-12 enable_load=1e-12 set_load=1e-12 reset_load=1e-12
++sr_delay=1e-12 enable_delay=1e-12 set_delay=1e-12 reset_delay=1e-12)
+a3 19 11 u4
+a4 20 12 u4
+.model u4 limit(out_lower_limit=0.0 out_upper_limit=5.0 in_offset=0.0 gain=1.0)
+a5 [8] [7] u3
+a6 [10] [9] u3
+.model u3 dac_bridge(out_low=0.2 out_high=5.0 out_undef=5.0 )
+a7 [11] [4] u2
+a8 [12] [1] u2
+a9 [6] [5] u2
+.model u2 adc_bridge(in_low=0.8 in_high=2.0 )
+*control statements
+
+.ends lm555n
diff --git a/Examples/Astable555/555/lm555n_Previous_Values.xml b/Examples/Astable555/555/lm555n_Previous_Values.xml
new file mode 100644
index 00000000..58d33ec5
--- /dev/null
+++ b/Examples/Astable555/555/lm555n_Previous_Values.xml
@@ -0,0 +1 @@
+<KicadtoNgspice><source /><model><u5 name="type">d_inverter<field1 name="Enter Fall Delay (default=1.0e-9)" /><field2 name="Enter Input Load (default=1.0e-12)" /><field3 name="Enter Rise Delay (default=1.0e-9)" /></u5><u6 name="type">d_srlatch<field4 name="Enter IC (default=0)" /><field5 name="Enter value for SR Load (default=1.0e-12)" /><field6 name="Enter Set Delay (default=1.0e-9)" /><field7 name="Enter value for Set Load (default=1.0e-12)" /><field8 name="Enter SR Delay (default=1.0e-9)" /><field9 name="Enter Enable Delay (default=1.0e-9)" /><field10 name="Enter Reset Delay (default=1.0)" /><field11 name="Enter Rise Delay (default=1.0e-9)" /><field12 name="Enter Fall Delay (default=1.0e-9)" /><field13 name="Enter value for Reset Load (default=1.0e-12)" /><field14 name="Enter value for Enable Load (default=1.0e-12)" /></u6></model><devicemodel><q1><field /></q1></devicemodel><analysis><ac><field1 name="Lin">false</field1><field2 name="Dec">false</field2><field3 name="Oct">true</field3><field4 name="Start Frequency">kjadsfh</field4><field5 name="Stop Frequency">jhdsakj</field5><field6 name="No. of points">897897</field6><field7 name="Start Fre Combo">Hz</field7><field8 name="Stop Fre Combo">Hz</field8></ac><dc><field1 name="Source Name" /><field2 name="Start" /><field3 name="Increment" /><field4 name="Stop" /><field5 name="Operating Point">False</field5><field6 name="Start Combo">Volts or Amperes</field6><field7 name="Increment Combo">Volts or Amperes</field7><field8 name="Stop Combo">Volts or Amperes</field8></dc><tran><field1 name="Start Time" /><field2 name="Step Time" /><field3 name="Stop Time" /><field4 name="Start Combo">Sec</field4><field5 name="Step Combo">Sec</field5><field6 name="Stop Combo">Sec</field6></tran></analysis></KicadtoNgspice>
\ No newline at end of file
diff --git a/Examples/Astable555/555/npn.lib b/Examples/Astable555/555/npn.lib
new file mode 100644
index 00000000..2bf6420d
--- /dev/null
+++ b/Examples/Astable555/555/npn.lib
@@ -0,0 +1,4 @@
+.model npn( Is=14.34f Xti=3 Eg=1.11 Vaf=74.03 Bf=400 Ne=1.307 
++ Ise=14.34f Ikf=.2847 Xtb=1.5 Br=6.092 Nc=2 Isc=0 Ikr=0 Rc=1 Cjc=7.306p 
++ Mjc=.3416 Vjc=.75 Fc=.5 Cje=22.01p Mje=.377 Vje=.75 Tr=46.91n Tf=411.1p 
++ Itf=.6 Vtf=1.7 Xtf=3 Rb=10) 
diff --git a/Examples/Astable555/555/npn_1.lib b/Examples/Astable555/555/npn_1.lib
new file mode 100644
index 00000000..a1818ed8
--- /dev/null
+++ b/Examples/Astable555/555/npn_1.lib
@@ -0,0 +1,29 @@
+.model npn_1 NPN(
++ Vtf=1.7 
++ Cjc=0.5p
++ Nc=2 
++ Tr=46.91n 
++ Ne=1.307 
++ Cje=0.5p
++ Isc=0 
++ Xtb=1.5 
++ Rb=500
++ Rc=1 
++ Tf=411.1p 
++ Xti=3 
++ Ikr=0 
++ Bf=125
++ Fc=.5 
++ Ise=14.34f 
++ Br=6.092 
++ Ikf=.2847 
++ Mje=.377 
++ Mjc=.3416 
++ Vaf=74.03 
++ Vjc=.75 
++ Vje=.75 
++ Xtf=3 
++ Itf=.6 
++ Is=14.34f 
++ Eg=1.11 
+)
\ No newline at end of file
diff --git a/Examples/Astable555/Readme.md b/Examples/Astable555/Readme.md
new file mode 100644
index 00000000..7e308564
--- /dev/null
+++ b/Examples/Astable555/Readme.md
@@ -0,0 +1 @@
+Add "option noopalter" under control statements in .cir.out file