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-rw-r--r--library/SubcircuitLibrary/CD_4070/CD_4070-cache.lib100
-rw-r--r--library/SubcircuitLibrary/CD_4070/CD_4070.cir67
-rw-r--r--library/SubcircuitLibrary/CD_4070/CD_4070.cir.out70
-rw-r--r--library/SubcircuitLibrary/CD_4070/CD_4070.pro71
-rw-r--r--library/SubcircuitLibrary/CD_4070/CD_4070.sch1532
-rw-r--r--library/SubcircuitLibrary/CD_4070/CD_4070.sub64
-rw-r--r--library/SubcircuitLibrary/CD_4070/CD_4070_Previous_Values.xml1
-rw-r--r--library/SubcircuitLibrary/CD_4070/NMOS-180nm.lib13
-rw-r--r--library/SubcircuitLibrary/CD_4070/PMOS-180nm.lib11
-rw-r--r--library/SubcircuitLibrary/CD_4070/README.md26
-rw-r--r--library/SubcircuitLibrary/CD_4070/analysis1
11 files changed, 1956 insertions, 0 deletions
diff --git a/library/SubcircuitLibrary/CD_4070/CD_4070-cache.lib b/library/SubcircuitLibrary/CD_4070/CD_4070-cache.lib
new file mode 100644
index 00000000..6c512720
--- /dev/null
+++ b/library/SubcircuitLibrary/CD_4070/CD_4070-cache.lib
@@ -0,0 +1,100 @@
+EESchema-LIBRARY Version 2.3
+#encoding utf-8
+#
+# PORT
+#
+DEF PORT U 0 40 Y Y 26 F N
+F0 "U" 50 100 30 H V C CNN
+F1 "PORT" 0 0 30 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0
+A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50
+S -100 50 100 -50 0 1 0 N
+X ~ 1 250 0 100 L 30 30 1 1 B
+X ~ 2 250 0 100 L 30 30 2 1 B
+X ~ 3 250 0 100 L 30 30 3 1 B
+X ~ 4 250 0 100 L 30 30 4 1 B
+X ~ 5 250 0 100 L 30 30 5 1 B
+X ~ 6 250 0 100 L 30 30 6 1 B
+X ~ 7 250 0 100 L 30 30 7 1 B
+X ~ 8 250 0 100 L 30 30 8 1 B
+X ~ 9 250 0 100 L 30 30 9 1 B
+X ~ 10 250 0 100 L 30 30 10 1 B
+X ~ 11 250 0 100 L 30 30 11 1 B
+X ~ 12 250 0 100 L 30 30 12 1 B
+X ~ 13 250 0 100 L 30 30 13 1 B
+X ~ 14 250 0 100 L 30 30 14 1 B
+X ~ 15 250 0 100 L 30 30 15 1 B
+X ~ 16 250 0 100 L 30 30 16 1 B
+X ~ 17 250 0 100 L 30 30 17 1 B
+X ~ 18 250 0 100 L 30 30 18 1 B
+X ~ 19 250 0 100 L 30 30 19 1 B
+X ~ 20 250 0 100 L 30 30 20 1 B
+X ~ 21 250 0 100 L 30 30 21 1 B
+X ~ 22 250 0 100 L 30 30 22 1 B
+X ~ 23 250 0 100 L 30 30 23 1 B
+X ~ 24 250 0 100 L 30 30 24 1 B
+X ~ 25 250 0 100 L 30 30 25 1 B
+X ~ 26 250 0 100 L 30 30 26 1 B
+ENDDRAW
+ENDDEF
+#
+# eSim_MOS_N
+#
+DEF eSim_MOS_N M 0 0 Y N 1 F N
+F0 "M" 0 -150 50 H V R CNN
+F1 "eSim_MOS_N" 100 -50 50 H V R CNN
+F2 "" 300 -300 29 H V C CNN
+F3 "" 100 -200 60 H V C CNN
+ALIAS mosfet_n
+DRAW
+C 150 -200 111 0 1 10 N
+P 2 0 1 10 130 -290 130 -250 N
+P 2 0 1 0 130 -270 200 -270 N
+P 2 0 1 10 130 -220 130 -180 N
+P 2 0 1 0 130 -200 200 -200 N
+P 2 0 1 10 130 -150 130 -110 N
+P 2 0 1 0 130 -130 200 -130 N
+P 2 0 1 0 200 -300 200 -270 N
+P 2 0 1 0 200 -130 200 -100 N
+P 3 0 1 10 110 -275 110 -125 110 -125 N
+P 3 0 1 0 200 -200 300 -200 300 -250 N
+P 4 0 1 0 140 -200 180 -215 180 -185 140 -200 F
+X D 1 200 0 100 D 50 50 1 1 P
+X G 2 -100 -200 210 R 50 50 1 1 P
+X S 3 200 -400 100 U 50 50 1 1 P
+X B 4 300 -350 98 U 47 47 1 1 P
+ENDDRAW
+ENDDEF
+#
+# eSim_MOS_P
+#
+DEF eSim_MOS_P M 0 0 Y N 1 F N
+F0 "M" -50 50 50 H V R CNN
+F1 "eSim_MOS_P" 50 150 50 H V R CNN
+F2 "" 250 100 29 H V C CNN
+F3 "" 50 0 60 H V C CNN
+ALIAS mosfet_p
+DRAW
+C 100 0 111 0 1 10 N
+P 2 0 1 0 80 -70 150 -70 N
+P 2 0 1 10 80 -50 80 -90 N
+P 2 0 1 0 80 0 150 0 N
+P 2 0 1 10 80 20 80 -20 N
+P 2 0 1 0 80 70 150 70 N
+P 2 0 1 10 80 90 80 50 N
+P 2 0 1 0 150 -70 150 -100 N
+P 2 0 1 0 150 100 150 70 N
+P 3 0 1 10 60 75 60 -75 60 -75 N
+P 3 0 1 0 150 0 250 0 250 -50 N
+P 4 0 1 0 140 0 100 -15 100 15 140 0 F
+X D 1 150 200 100 D 50 50 1 1 P
+X G 2 -150 0 210 R 50 50 1 1 P
+X S 3 150 -200 100 U 50 50 1 1 P
+X B 4 250 -150 100 U 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
+#End Library
diff --git a/library/SubcircuitLibrary/CD_4070/CD_4070.cir b/library/SubcircuitLibrary/CD_4070/CD_4070.cir
new file mode 100644
index 00000000..8fa1881b
--- /dev/null
+++ b/library/SubcircuitLibrary/CD_4070/CD_4070.cir
@@ -0,0 +1,67 @@
+* C:\FOSSEE\eSim\library\SubcircuitLibrary\CD_4070\CD_4070.cir
+
+* EESchema Netlist Version 1.1 (Spice format) creation date: 05/29/22 16:05:10
+
+* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N
+* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0
+
+* Sheet Name: /
+M21 Net-_M13-Pad2_ Net-_M14-Pad2_ Net-_M11-Pad3_ Net-_M11-Pad3_ eSim_MOS_P
+M25 Net-_M13-Pad2_ Net-_M14-Pad2_ Net-_M1-Pad3_ Net-_M1-Pad3_ eSim_MOS_N
+M9 Net-_M10-Pad3_ Net-_M1-Pad2_ Net-_M11-Pad3_ Net-_M11-Pad3_ eSim_MOS_P
+M13 Net-_M10-Pad3_ Net-_M13-Pad2_ Net-_M11-Pad3_ Net-_M11-Pad3_ eSim_MOS_P
+M10 Net-_M10-Pad1_ Net-_M1-Pad1_ Net-_M10-Pad3_ Net-_M10-Pad3_ eSim_MOS_P
+M14 Net-_M10-Pad1_ Net-_M14-Pad2_ Net-_M10-Pad3_ Net-_M10-Pad3_ eSim_MOS_P
+M3 Net-_M1-Pad1_ Net-_M1-Pad2_ Net-_M11-Pad3_ Net-_M11-Pad3_ eSim_MOS_P
+M1 Net-_M1-Pad1_ Net-_M1-Pad2_ Net-_M1-Pad3_ Net-_M1-Pad3_ eSim_MOS_N
+M5 Net-_M10-Pad1_ Net-_M1-Pad2_ Net-_M5-Pad3_ Net-_M5-Pad3_ eSim_MOS_N
+M6 Net-_M5-Pad3_ Net-_M13-Pad2_ Net-_M1-Pad3_ Net-_M1-Pad3_ eSim_MOS_N
+M17 Net-_M10-Pad1_ Net-_M1-Pad1_ Net-_M17-Pad3_ Net-_M17-Pad3_ eSim_MOS_N
+M18 Net-_M17-Pad3_ Net-_M14-Pad2_ Net-_M1-Pad3_ Net-_M1-Pad3_ eSim_MOS_N
+M50 Net-_M34-Pad2_ Net-_M42-Pad2_ Net-_M11-Pad3_ Net-_M11-Pad3_ eSim_MOS_P
+M54 Net-_M34-Pad2_ Net-_M42-Pad2_ Net-_M1-Pad3_ Net-_M1-Pad3_ eSim_MOS_N
+M37 Net-_M37-Pad1_ Net-_M29-Pad2_ Net-_M11-Pad3_ Net-_M11-Pad3_ eSim_MOS_P
+M41 Net-_M37-Pad1_ Net-_M34-Pad2_ Net-_M11-Pad3_ Net-_M11-Pad3_ eSim_MOS_P
+M38 Net-_M33-Pad1_ Net-_M29-Pad1_ Net-_M37-Pad1_ Net-_M37-Pad1_ eSim_MOS_P
+M42 Net-_M33-Pad1_ Net-_M42-Pad2_ Net-_M37-Pad1_ Net-_M37-Pad1_ eSim_MOS_P
+M31 Net-_M29-Pad1_ Net-_M29-Pad2_ Net-_M11-Pad3_ Net-_M11-Pad3_ eSim_MOS_P
+M29 Net-_M29-Pad1_ Net-_M29-Pad2_ Net-_M1-Pad3_ Net-_M1-Pad3_ eSim_MOS_N
+M33 Net-_M33-Pad1_ Net-_M29-Pad2_ Net-_M33-Pad3_ Net-_M33-Pad3_ eSim_MOS_N
+M34 Net-_M33-Pad3_ Net-_M34-Pad2_ Net-_M1-Pad3_ Net-_M1-Pad3_ eSim_MOS_N
+M45 Net-_M33-Pad1_ Net-_M29-Pad1_ Net-_M45-Pad3_ Net-_M45-Pad3_ eSim_MOS_N
+M46 Net-_M45-Pad3_ Net-_M42-Pad2_ Net-_M1-Pad3_ Net-_M1-Pad3_ eSim_MOS_N
+M23 Net-_M15-Pad2_ Net-_M16-Pad2_ Net-_M11-Pad3_ Net-_M11-Pad3_ eSim_MOS_P
+M27 Net-_M15-Pad2_ Net-_M16-Pad2_ Net-_M1-Pad3_ Net-_M1-Pad3_ eSim_MOS_N
+M11 Net-_M11-Pad1_ Net-_M11-Pad2_ Net-_M11-Pad3_ Net-_M11-Pad3_ eSim_MOS_P
+M15 Net-_M11-Pad1_ Net-_M15-Pad2_ Net-_M11-Pad3_ Net-_M11-Pad3_ eSim_MOS_P
+M12 Net-_M12-Pad1_ Net-_M12-Pad2_ Net-_M11-Pad1_ Net-_M11-Pad1_ eSim_MOS_P
+M16 Net-_M12-Pad1_ Net-_M16-Pad2_ Net-_M11-Pad1_ Net-_M11-Pad1_ eSim_MOS_P
+M4 Net-_M12-Pad2_ Net-_M11-Pad2_ Net-_M11-Pad3_ Net-_M11-Pad3_ eSim_MOS_P
+M2 Net-_M12-Pad2_ Net-_M11-Pad2_ Net-_M1-Pad3_ Net-_M1-Pad3_ eSim_MOS_N
+M7 Net-_M12-Pad1_ Net-_M11-Pad2_ Net-_M7-Pad3_ Net-_M7-Pad3_ eSim_MOS_N
+M8 Net-_M7-Pad3_ Net-_M15-Pad2_ Net-_M1-Pad3_ Net-_M1-Pad3_ eSim_MOS_N
+M19 Net-_M12-Pad1_ Net-_M12-Pad2_ Net-_M19-Pad3_ Net-_M19-Pad3_ eSim_MOS_N
+M20 Net-_M19-Pad3_ Net-_M16-Pad2_ Net-_M1-Pad3_ Net-_M1-Pad3_ eSim_MOS_N
+M52 Net-_M36-Pad2_ Net-_M44-Pad2_ Net-_M11-Pad3_ Net-_M11-Pad3_ eSim_MOS_P
+M56 Net-_M36-Pad2_ Net-_M44-Pad2_ Net-_M1-Pad3_ Net-_M1-Pad3_ eSim_MOS_N
+M39 Net-_M39-Pad1_ Net-_M30-Pad2_ Net-_M11-Pad3_ Net-_M11-Pad3_ eSim_MOS_P
+M43 Net-_M39-Pad1_ Net-_M36-Pad2_ Net-_M11-Pad3_ Net-_M11-Pad3_ eSim_MOS_P
+M40 Net-_M35-Pad1_ Net-_M30-Pad1_ Net-_M39-Pad1_ Net-_M39-Pad1_ eSim_MOS_P
+M44 Net-_M35-Pad1_ Net-_M44-Pad2_ Net-_M39-Pad1_ Net-_M39-Pad1_ eSim_MOS_P
+M32 Net-_M30-Pad1_ Net-_M30-Pad2_ Net-_M11-Pad3_ Net-_M11-Pad3_ eSim_MOS_P
+M30 Net-_M30-Pad1_ Net-_M30-Pad2_ Net-_M1-Pad3_ Net-_M1-Pad3_ eSim_MOS_N
+M35 Net-_M35-Pad1_ Net-_M30-Pad2_ Net-_M35-Pad3_ Net-_M35-Pad3_ eSim_MOS_N
+M36 Net-_M35-Pad3_ Net-_M36-Pad2_ Net-_M1-Pad3_ Net-_M1-Pad3_ eSim_MOS_N
+M47 Net-_M35-Pad1_ Net-_M30-Pad1_ Net-_M47-Pad3_ Net-_M47-Pad3_ eSim_MOS_N
+M48 Net-_M47-Pad3_ Net-_M44-Pad2_ Net-_M1-Pad3_ Net-_M1-Pad3_ eSim_MOS_N
+M26 Net-_M22-Pad1_ Net-_M10-Pad1_ Net-_M11-Pad3_ Net-_M11-Pad3_ eSim_MOS_P
+M22 Net-_M22-Pad1_ Net-_M10-Pad1_ Net-_M1-Pad3_ Net-_M1-Pad3_ eSim_MOS_N
+M28 Net-_M24-Pad1_ Net-_M12-Pad1_ Net-_M11-Pad3_ Net-_M11-Pad3_ eSim_MOS_P
+M24 Net-_M24-Pad1_ Net-_M12-Pad1_ Net-_M1-Pad3_ Net-_M1-Pad3_ eSim_MOS_N
+M53 Net-_M49-Pad1_ Net-_M35-Pad1_ Net-_M11-Pad3_ Net-_M11-Pad3_ eSim_MOS_P
+M49 Net-_M49-Pad1_ Net-_M35-Pad1_ Net-_M1-Pad3_ Net-_M1-Pad3_ eSim_MOS_N
+M55 Net-_M51-Pad1_ Net-_M33-Pad1_ Net-_M11-Pad3_ Net-_M11-Pad3_ eSim_MOS_P
+M51 Net-_M51-Pad1_ Net-_M33-Pad1_ Net-_M1-Pad3_ Net-_M1-Pad3_ eSim_MOS_N
+U1 Net-_M11-Pad2_ Net-_M16-Pad2_ Net-_M24-Pad1_ Net-_M49-Pad1_ Net-_M30-Pad2_ Net-_M44-Pad2_ Net-_M1-Pad3_ Net-_M29-Pad2_ Net-_M42-Pad2_ Net-_M51-Pad1_ Net-_M22-Pad1_ Net-_M1-Pad2_ Net-_M14-Pad2_ Net-_M11-Pad3_ PORT
+
+.end
diff --git a/library/SubcircuitLibrary/CD_4070/CD_4070.cir.out b/library/SubcircuitLibrary/CD_4070/CD_4070.cir.out
new file mode 100644
index 00000000..8dd74c9b
--- /dev/null
+++ b/library/SubcircuitLibrary/CD_4070/CD_4070.cir.out
@@ -0,0 +1,70 @@
+* c:\fossee\esim\library\subcircuitlibrary\cd_4070\cd_4070.cir
+
+.include NMOS-180nm.lib
+.include PMOS-180nm.lib
+m21 net-_m13-pad2_ net-_m14-pad2_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1
+m25 net-_m13-pad2_ net-_m14-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1
+m9 net-_m10-pad3_ net-_m1-pad2_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1
+m13 net-_m10-pad3_ net-_m13-pad2_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1
+m10 net-_m10-pad1_ net-_m1-pad1_ net-_m10-pad3_ net-_m10-pad3_ CMOSP W=100u L=100u M=1
+m14 net-_m10-pad1_ net-_m14-pad2_ net-_m10-pad3_ net-_m10-pad3_ CMOSP W=100u L=100u M=1
+m3 net-_m1-pad1_ net-_m1-pad2_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1
+m1 net-_m1-pad1_ net-_m1-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1
+m5 net-_m10-pad1_ net-_m1-pad2_ net-_m5-pad3_ net-_m5-pad3_ CMOSN W=100u L=100u M=1
+m6 net-_m5-pad3_ net-_m13-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1
+m17 net-_m10-pad1_ net-_m1-pad1_ net-_m17-pad3_ net-_m17-pad3_ CMOSN W=100u L=100u M=1
+m18 net-_m17-pad3_ net-_m14-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1
+m50 net-_m34-pad2_ net-_m42-pad2_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1
+m54 net-_m34-pad2_ net-_m42-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1
+m37 net-_m37-pad1_ net-_m29-pad2_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1
+m41 net-_m37-pad1_ net-_m34-pad2_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1
+m38 net-_m33-pad1_ net-_m29-pad1_ net-_m37-pad1_ net-_m37-pad1_ CMOSP W=100u L=100u M=1
+m42 net-_m33-pad1_ net-_m42-pad2_ net-_m37-pad1_ net-_m37-pad1_ CMOSP W=100u L=100u M=1
+m31 net-_m29-pad1_ net-_m29-pad2_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1
+m29 net-_m29-pad1_ net-_m29-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1
+m33 net-_m33-pad1_ net-_m29-pad2_ net-_m33-pad3_ net-_m33-pad3_ CMOSN W=100u L=100u M=1
+m34 net-_m33-pad3_ net-_m34-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1
+m45 net-_m33-pad1_ net-_m29-pad1_ net-_m45-pad3_ net-_m45-pad3_ CMOSN W=100u L=100u M=1
+m46 net-_m45-pad3_ net-_m42-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1
+m23 net-_m15-pad2_ net-_m16-pad2_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1
+m27 net-_m15-pad2_ net-_m16-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1
+m11 net-_m11-pad1_ net-_m11-pad2_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1
+m15 net-_m11-pad1_ net-_m15-pad2_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1
+m12 net-_m12-pad1_ net-_m12-pad2_ net-_m11-pad1_ net-_m11-pad1_ CMOSP W=100u L=100u M=1
+m16 net-_m12-pad1_ net-_m16-pad2_ net-_m11-pad1_ net-_m11-pad1_ CMOSP W=100u L=100u M=1
+m4 net-_m12-pad2_ net-_m11-pad2_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1
+m2 net-_m12-pad2_ net-_m11-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1
+m7 net-_m12-pad1_ net-_m11-pad2_ net-_m7-pad3_ net-_m7-pad3_ CMOSN W=100u L=100u M=1
+m8 net-_m7-pad3_ net-_m15-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1
+m19 net-_m12-pad1_ net-_m12-pad2_ net-_m19-pad3_ net-_m19-pad3_ CMOSN W=100u L=100u M=1
+m20 net-_m19-pad3_ net-_m16-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1
+m52 net-_m36-pad2_ net-_m44-pad2_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1
+m56 net-_m36-pad2_ net-_m44-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1
+m39 net-_m39-pad1_ net-_m30-pad2_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1
+m43 net-_m39-pad1_ net-_m36-pad2_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1
+m40 net-_m35-pad1_ net-_m30-pad1_ net-_m39-pad1_ net-_m39-pad1_ CMOSP W=100u L=100u M=1
+m44 net-_m35-pad1_ net-_m44-pad2_ net-_m39-pad1_ net-_m39-pad1_ CMOSP W=100u L=100u M=1
+m32 net-_m30-pad1_ net-_m30-pad2_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1
+m30 net-_m30-pad1_ net-_m30-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1
+m35 net-_m35-pad1_ net-_m30-pad2_ net-_m35-pad3_ net-_m35-pad3_ CMOSN W=100u L=100u M=1
+m36 net-_m35-pad3_ net-_m36-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1
+m47 net-_m35-pad1_ net-_m30-pad1_ net-_m47-pad3_ net-_m47-pad3_ CMOSN W=100u L=100u M=1
+m48 net-_m47-pad3_ net-_m44-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1
+m26 net-_m22-pad1_ net-_m10-pad1_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1
+m22 net-_m22-pad1_ net-_m10-pad1_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1
+m28 net-_m24-pad1_ net-_m12-pad1_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1
+m24 net-_m24-pad1_ net-_m12-pad1_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1
+m53 net-_m49-pad1_ net-_m35-pad1_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1
+m49 net-_m49-pad1_ net-_m35-pad1_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1
+m55 net-_m51-pad1_ net-_m33-pad1_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1
+m51 net-_m51-pad1_ net-_m33-pad1_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1
+* u1 net-_m11-pad2_ net-_m16-pad2_ net-_m24-pad1_ net-_m49-pad1_ net-_m30-pad2_ net-_m44-pad2_ net-_m1-pad3_ net-_m29-pad2_ net-_m42-pad2_ net-_m51-pad1_ net-_m22-pad1_ net-_m1-pad2_ net-_m14-pad2_ net-_m11-pad3_ port
+.tran 0e-00 0e-00 0e-00
+
+* Control Statements
+.control
+run
+print allv > plot_data_v.txt
+print alli > plot_data_i.txt
+.endc
+.end
diff --git a/library/SubcircuitLibrary/CD_4070/CD_4070.pro b/library/SubcircuitLibrary/CD_4070/CD_4070.pro
new file mode 100644
index 00000000..d7f78c3b
--- /dev/null
+++ b/library/SubcircuitLibrary/CD_4070/CD_4070.pro
@@ -0,0 +1,71 @@
+update=22/05/2015 07:44:53
+version=1
+last_client=kicad
+[general]
+version=1
+RootSch=
+BoardNm=
+[pcbnew]
+version=1
+LastNetListRead=
+UseCmpFile=1
+PadDrill=0.600000000000
+PadDrillOvalY=0.600000000000
+PadSizeH=1.500000000000
+PadSizeV=1.500000000000
+PcbTextSizeV=1.500000000000
+PcbTextSizeH=1.500000000000
+PcbTextThickness=0.300000000000
+ModuleTextSizeV=1.000000000000
+ModuleTextSizeH=1.000000000000
+ModuleTextSizeThickness=0.150000000000
+SolderMaskClearance=0.000000000000
+SolderMaskMinWidth=0.000000000000
+DrawSegmentWidth=0.200000000000
+BoardOutlineThickness=0.100000000000
+ModuleOutlineThickness=0.150000000000
+[cvpcb]
+version=1
+NetIExt=net
+[eeschema]
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+[eeschema/libraries]
+LibName1=adc-dac
+LibName2=memory
+LibName3=xilinx
+LibName4=microcontrollers
+LibName5=dsp
+LibName6=microchip
+LibName7=analog_switches
+LibName8=motorola
+LibName9=texas
+LibName10=intel
+LibName11=audio
+LibName12=interface
+LibName13=digital-audio
+LibName14=philips
+LibName15=display
+LibName16=cypress
+LibName17=siliconi
+LibName18=opto
+LibName19=atmel
+LibName20=contrib
+LibName21=power
+LibName22=eSim_Plot
+LibName23=transistors
+LibName24=conn
+LibName25=eSim_User
+LibName26=regul
+LibName27=74xx
+LibName28=cmos4000
+LibName29=eSim_Analog
+LibName30=eSim_Devices
+LibName31=eSim_Digital
+LibName32=eSim_Hybrid
+LibName33=eSim_Miscellaneous
+LibName34=eSim_Power
+LibName35=eSim_Sources
+LibName36=eSim_Subckt
+LibName37=eSim_Nghdl
+LibName38=eSim_Ngveri
diff --git a/library/SubcircuitLibrary/CD_4070/CD_4070.sch b/library/SubcircuitLibrary/CD_4070/CD_4070.sch
new file mode 100644
index 00000000..3cb5f222
--- /dev/null
+++ b/library/SubcircuitLibrary/CD_4070/CD_4070.sch
@@ -0,0 +1,1532 @@
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+LIBS:adc-dac
+LIBS:memory
+LIBS:xilinx
+LIBS:microcontrollers
+LIBS:dsp
+LIBS:microchip
+LIBS:analog_switches
+LIBS:motorola
+LIBS:texas
+LIBS:intel
+LIBS:audio
+LIBS:interface
+LIBS:digital-audio
+LIBS:philips
+LIBS:display
+LIBS:cypress
+LIBS:siliconi
+LIBS:opto
+LIBS:atmel
+LIBS:contrib
+LIBS:power
+LIBS:eSim_Plot
+LIBS:transistors
+LIBS:conn
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+LIBS:regul
+LIBS:74xx
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+LIBS:eSim_Digital
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+LIBS:eSim_Sources
+LIBS:eSim_Subckt
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+LIBS:CD_4070-cache
+EELAYER 25 0
+EELAYER END
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+$EndComp
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+ 8 6050 1800
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+$EndComp
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+ 12 1050 1800
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+$EndComp
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+F 3 "" H 5700 1750 60 0000 C CNN
+ 13 5700 1750
+ -1 0 0 1
+$EndComp
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+U 14 1 6294829B
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+F 3 "" H 6300 800 60 0000 C CNN
+ 14 6300 800
+ -1 0 0 1
+$EndComp
+$EndSCHEMATC
diff --git a/library/SubcircuitLibrary/CD_4070/CD_4070.sub b/library/SubcircuitLibrary/CD_4070/CD_4070.sub
new file mode 100644
index 00000000..87dfeb51
--- /dev/null
+++ b/library/SubcircuitLibrary/CD_4070/CD_4070.sub
@@ -0,0 +1,64 @@
+* Subcircuit CD_4070
+.subckt CD_4070 net-_m11-pad2_ net-_m16-pad2_ net-_m24-pad1_ net-_m49-pad1_ net-_m30-pad2_ net-_m44-pad2_ net-_m1-pad3_ net-_m29-pad2_ net-_m42-pad2_ net-_m51-pad1_ net-_m22-pad1_ net-_m1-pad2_ net-_m14-pad2_ net-_m11-pad3_
+* c:\fossee\esim\library\subcircuitlibrary\cd_4070\cd_4070.cir
+.include NMOS-180nm.lib
+.include PMOS-180nm.lib
+m21 net-_m13-pad2_ net-_m14-pad2_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1
+m25 net-_m13-pad2_ net-_m14-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1
+m9 net-_m10-pad3_ net-_m1-pad2_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1
+m13 net-_m10-pad3_ net-_m13-pad2_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1
+m10 net-_m10-pad1_ net-_m1-pad1_ net-_m10-pad3_ net-_m10-pad3_ CMOSP W=100u L=100u M=1
+m14 net-_m10-pad1_ net-_m14-pad2_ net-_m10-pad3_ net-_m10-pad3_ CMOSP W=100u L=100u M=1
+m3 net-_m1-pad1_ net-_m1-pad2_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1
+m1 net-_m1-pad1_ net-_m1-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1
+m5 net-_m10-pad1_ net-_m1-pad2_ net-_m5-pad3_ net-_m5-pad3_ CMOSN W=100u L=100u M=1
+m6 net-_m5-pad3_ net-_m13-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1
+m17 net-_m10-pad1_ net-_m1-pad1_ net-_m17-pad3_ net-_m17-pad3_ CMOSN W=100u L=100u M=1
+m18 net-_m17-pad3_ net-_m14-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1
+m50 net-_m34-pad2_ net-_m42-pad2_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1
+m54 net-_m34-pad2_ net-_m42-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1
+m37 net-_m37-pad1_ net-_m29-pad2_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1
+m41 net-_m37-pad1_ net-_m34-pad2_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1
+m38 net-_m33-pad1_ net-_m29-pad1_ net-_m37-pad1_ net-_m37-pad1_ CMOSP W=100u L=100u M=1
+m42 net-_m33-pad1_ net-_m42-pad2_ net-_m37-pad1_ net-_m37-pad1_ CMOSP W=100u L=100u M=1
+m31 net-_m29-pad1_ net-_m29-pad2_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1
+m29 net-_m29-pad1_ net-_m29-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1
+m33 net-_m33-pad1_ net-_m29-pad2_ net-_m33-pad3_ net-_m33-pad3_ CMOSN W=100u L=100u M=1
+m34 net-_m33-pad3_ net-_m34-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1
+m45 net-_m33-pad1_ net-_m29-pad1_ net-_m45-pad3_ net-_m45-pad3_ CMOSN W=100u L=100u M=1
+m46 net-_m45-pad3_ net-_m42-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1
+m23 net-_m15-pad2_ net-_m16-pad2_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1
+m27 net-_m15-pad2_ net-_m16-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1
+m11 net-_m11-pad1_ net-_m11-pad2_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1
+m15 net-_m11-pad1_ net-_m15-pad2_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1
+m12 net-_m12-pad1_ net-_m12-pad2_ net-_m11-pad1_ net-_m11-pad1_ CMOSP W=100u L=100u M=1
+m16 net-_m12-pad1_ net-_m16-pad2_ net-_m11-pad1_ net-_m11-pad1_ CMOSP W=100u L=100u M=1
+m4 net-_m12-pad2_ net-_m11-pad2_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1
+m2 net-_m12-pad2_ net-_m11-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1
+m7 net-_m12-pad1_ net-_m11-pad2_ net-_m7-pad3_ net-_m7-pad3_ CMOSN W=100u L=100u M=1
+m8 net-_m7-pad3_ net-_m15-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1
+m19 net-_m12-pad1_ net-_m12-pad2_ net-_m19-pad3_ net-_m19-pad3_ CMOSN W=100u L=100u M=1
+m20 net-_m19-pad3_ net-_m16-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1
+m52 net-_m36-pad2_ net-_m44-pad2_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1
+m56 net-_m36-pad2_ net-_m44-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1
+m39 net-_m39-pad1_ net-_m30-pad2_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1
+m43 net-_m39-pad1_ net-_m36-pad2_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1
+m40 net-_m35-pad1_ net-_m30-pad1_ net-_m39-pad1_ net-_m39-pad1_ CMOSP W=100u L=100u M=1
+m44 net-_m35-pad1_ net-_m44-pad2_ net-_m39-pad1_ net-_m39-pad1_ CMOSP W=100u L=100u M=1
+m32 net-_m30-pad1_ net-_m30-pad2_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1
+m30 net-_m30-pad1_ net-_m30-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1
+m35 net-_m35-pad1_ net-_m30-pad2_ net-_m35-pad3_ net-_m35-pad3_ CMOSN W=100u L=100u M=1
+m36 net-_m35-pad3_ net-_m36-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1
+m47 net-_m35-pad1_ net-_m30-pad1_ net-_m47-pad3_ net-_m47-pad3_ CMOSN W=100u L=100u M=1
+m48 net-_m47-pad3_ net-_m44-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1
+m26 net-_m22-pad1_ net-_m10-pad1_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1
+m22 net-_m22-pad1_ net-_m10-pad1_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1
+m28 net-_m24-pad1_ net-_m12-pad1_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1
+m24 net-_m24-pad1_ net-_m12-pad1_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1
+m53 net-_m49-pad1_ net-_m35-pad1_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1
+m49 net-_m49-pad1_ net-_m35-pad1_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1
+m55 net-_m51-pad1_ net-_m33-pad1_ net-_m11-pad3_ net-_m11-pad3_ CMOSP W=100u L=100u M=1
+m51 net-_m51-pad1_ net-_m33-pad1_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1
+* Control Statements
+
+.ends CD_4070 \ No newline at end of file
diff --git a/library/SubcircuitLibrary/CD_4070/CD_4070_Previous_Values.xml b/library/SubcircuitLibrary/CD_4070/CD_4070_Previous_Values.xml
new file mode 100644
index 00000000..ae1f75df
--- /dev/null
+++ b/library/SubcircuitLibrary/CD_4070/CD_4070_Previous_Values.xml
@@ -0,0 +1 @@
+<KicadtoNgspice><analysis><ac><field1 name="Lin">true</field1><field2 name="Dec">false</field2><field3 name="Oct">false</field3><field4 name="Start Frequency" /><field5 name="Stop Frequency" /><field6 name="No. of points" /><field7 name="Start Fre Combo">Hz</field7><field8 name="Stop Fre Combo">Hz</field8></ac><dc><field1 name="Source 1" /><field2 name="Start" /><field3 name="Increment" /><field4 name="Stop" /><field5 name="Operating Point">0</field5><field6 name="Start Combo">Volts or Amperes</field6><field7 name="Increment Combo">Volts or Amperes</field7><field8 name="Stop Combo">Volts or Amperes</field8><field9 name="Source 2" /><field10 name="Start" /><field11 name="Increment" /><field12 name="Stop" /><field13 name="Start Combo">Volts or Amperes</field13><field14 name="Increment Combo">Volts or Amperes</field14><field15 name="Stop Combo">Volts or Amperes</field15></dc><tran><field1 name="Start Time" /><field2 name="Step Time" /><field3 name="Stop Time" /><field4 name="Start Combo">Sec</field4><field5 name="Step Combo">Sec</field5><field6 name="Stop Combo">Sec</field6></tran></analysis><source /><model /><devicemodel><m21><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m21><m25><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m25><m9><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m9><m13><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m13><m10><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m10><m14><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m14><m3><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m3><m1><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m1><m5><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m5><m6><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m6><m17><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m17><m18><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m18><m50><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m50><m54><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m54><m37><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m37><m41><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m41><m38><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m38><m42><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m42><m31><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m31><m29><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m29><m33><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m33><m34><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m34><m45><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m45><m46><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m46><m23><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m23><m27><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m27><m11><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m11><m15><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m15><m12><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m12><m16><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m16><m4><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m4><m2><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m2><m7><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m7><m8><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m8><m19><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m19><m20><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m20><m52><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m52><m56><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m56><m39><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m39><m43><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m43><m40><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m40><m44><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m44><m32><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m32><m30><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m30><m35><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m35><m36><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m36><m47><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m47><m48><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m48><m26><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m26><m22><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m22><m28><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m28><m24><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m24><m53><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m53><m49><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m49><m55><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m55><m51><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m51></devicemodel><subcircuit /></KicadtoNgspice> \ No newline at end of file
diff --git a/library/SubcircuitLibrary/CD_4070/NMOS-180nm.lib b/library/SubcircuitLibrary/CD_4070/NMOS-180nm.lib
new file mode 100644
index 00000000..51e9b119
--- /dev/null
+++ b/library/SubcircuitLibrary/CD_4070/NMOS-180nm.lib
@@ -0,0 +1,13 @@
+.model CMOSN NMOS (LEVEL=8 VERSION=3.2 TNOM=27 TOX=4.1E-9 XJ=1E-7 NCH=2.3549E17 VTH0=0.3823463 K1=0.5810697
++ K2=4.774618E-3 K3=0.0431669 K3B=1.1498346 W0=1E-7 NLX=1.910552E-7 DVT0W=0 DVT1W=0 DVT2W=0
++ DVT0=1.2894824 DVT1=0.3622063 DVT2=0.0713729 U0=280.633249 UA=-1.208537E-9 UB=2.158625E-18
++ UC=5.342807E-11 VSAT=9.366802E4 A0=1.7593146 AGS=0.3939741 B0=-6.413949E-9 B1=-1E-7 KETA=-5.180424E-4
++ A1=0 A2=1 RDSW=105.5517558 PRWG=0.5 PRWB=-0.1998871 WR=1 WINT=7.904732E-10 LINT=1.571424E-8 XL=0
++ XW=-1E-8 DWG=1.297221E-9 DWB=1.479041E-9 VOFF=-0.0955434 NFACTOR=2.4358891 CIT=0 CDSC=2.4E-4 CDSCD=0
++ CDSCB=0 ETA0=3.104851E-3 ETAB=-2.512384E-5 DSUB=0.0167075 PCLM=0.8073191 PDIBLC1=0.1666161 PDIBLC2=3.112892E-3
++ PDIBLCB=-0.1 DROUT=0.7875618 PSCBE1=8E10 PSCBE2=9.213635E-10 PVAG=3.85243E-3 DELTA=0.01 RSH=6.7 MOBMOD=1
++ PRT=0 UTE=-1.5 KT1=-0.11 KT1L=0 KT2=0.022 UA1=4.31E-9 UB1=-7.61E-18 UC1=-5.6E-11 AT=3.3E4 WL=0 WLN=1
++ WW=0 WWN=1 WWL=0 LL=0 LLN=1 LW=0 LWN=1 LWL=0 CAPMOD=2 XPART=0.5 CGDO=7.08E-10 CGSO=7.08E-10 CGBO=1E-12
++ CJ=9.68858E-4 PB=0.8 MJ=0.3864502 CJSW=2.512138E-10 PBSW=0.809286 MJSW=0.1060414 CJSWG=3.3E-10 PBSWG=0.809286
++ MJSWG=0.1060414 CF=0 PVTH0=-1.192722E-3 PRDSW=-5 PK2=6.450505E-5 WKETA=-4.27294E-4 LKETA=-0.0104078
++ PU0=6.3268729 PUA=2.226552E-11 PUB=0 PVSAT=969.1480157 PETA0=1E-4 PKETA=-1.049509E-3)
diff --git a/library/SubcircuitLibrary/CD_4070/PMOS-180nm.lib b/library/SubcircuitLibrary/CD_4070/PMOS-180nm.lib
new file mode 100644
index 00000000..032b5b95
--- /dev/null
+++ b/library/SubcircuitLibrary/CD_4070/PMOS-180nm.lib
@@ -0,0 +1,11 @@
+.model CMOSP PMOS (LEVEL=8 VERSION=3.2 TNOM=27 TOX=4.1E-9 XJ=1E-7 NCH=4.1589E17 VTH0=-0.3938813 K1=0.5479015
++ K2=0.0360586 K3=0.0993095 K3B=5.7086622 W0=1E-6 NLX=1.313191E-7 DVT0W=0 DVT1W=0 DVT2W=0 DVT0=0.4911363
++ DVT1=0.2227356 DVT2=0.1 U0=115.6852975 UA=1.505832E-9 UB=1E-21 UC=-1E-10 VSAT=1.329694E5 A0=1.7590478
++ AGS=0.3641621 B0=3.427126E-7 B1=1.062928E-6 KETA=0.0134667 A1=0.6859506 A2=0.3506788 RDSW=168.5705677
++ PRWG=0.5 PRWB=-0.4987371 WR=1 WINT=0 LINT=3.028832E-8 XL=0 XW=-1E-8 DWG=-2.349633E-8 DWB=-7.152486E-9
++ VOFF=-0.0994037 NFACTOR=1.9424315 CIT=0 CDSC=2.4E-4 CDSCD=0 CDSCB=0 ETA0=0.0608072 ETAB=-0.0426148
++ DSUB=0.7343015 PCLM=3.2579974 PDIBLC1=7.229527E-6 PDIBLC2=0.025389 PDIBLCB=-1E-3 DROUT=0 PSCBE1=1.454878E10
++ PSCBE2=4.202027E-9 PVAG=15 DELTA=0.01 RSH=7.8 MOBMOD=1 PRT=0 UTE=-1.5 KT1=-0.11 KT1L=0 KT2=0.022 UA1=4.31E-9
++ UB1=-7.61E-18 UC1=-5.6E-11 AT=3.3E4 WL=0 WLN=1 WW=0 WWN=1 WWL=0 LL=0 LLN=1 LW=0 LWN=1 LWL=0 CAPMOD=2 XPART=0.5
++ CGDO=6.32E-10 CGSO=6.32E-10 CGBO=1E-12 CJ=1.172138E-3 PB=0.8421173 MJ=0.4109788 CJSW=2.242609E-10 PBSW=0.8 + MJSW=0.3752089 CJSWG=4.22E-10 PBSWG=0.8 MJSWG=0.3752089 CF=0 PVTH0=1.888482E-3 PRDSW=11.5315407 PK2=1.559399E-3
++ WKETA=0.0319301 LKETA=2.955547E-3 PU0=-1.1105313 PUA=-4.62102E-11 PUB=1E-21 PVSAT=50 PETA0=1E-4 PKETA=-4.346368E-3)
diff --git a/library/SubcircuitLibrary/CD_4070/README.md b/library/SubcircuitLibrary/CD_4070/README.md
new file mode 100644
index 00000000..f27fd979
--- /dev/null
+++ b/library/SubcircuitLibrary/CD_4070/README.md
@@ -0,0 +1,26 @@
+
+# CD4070 IC
+
+It is 2-input XOR Gate IC. CD4070 IC is designed with 180nm CMOS technology in eSim consisting four XOR Gates. It plays the role of odd 1’s detector. When both inputs are same, then output is LOW. It is also known as Special logic Gate.
+
+## Usage/Examples
+
+Logical Comparators
+
+Adders, Subtractors
+
+Parity Generators and Checkers
+## Documentation
+
+To know the details of CD4070 IC please go through with the documentation : [CD4070_datasheet](https://www.ti.com/lit/gpn/cd4070b)
+
+## Comments/Notes
+
+Please note this is a complete digital IC. It works fine at the time of simulation.
+
+## Contributer
+
+Name: Ankush Mondal
+Email: mondalankush369@gmail.com
+Year: 2022
+Position: FOSSEE Summer Fellow 2022 \ No newline at end of file
diff --git a/library/SubcircuitLibrary/CD_4070/analysis b/library/SubcircuitLibrary/CD_4070/analysis
new file mode 100644
index 00000000..ebd5c0a9
--- /dev/null
+++ b/library/SubcircuitLibrary/CD_4070/analysis
@@ -0,0 +1 @@
+.tran 0e-00 0e-00 0e-00 \ No newline at end of file
generated by cgit (git 2.34.1) at 2024-12-20 22:05:43 +0000