diff options
| -rw-r--r-- | library/SubcircuitLibrary/IC_OPA827/IC_OPA827-cache.lib | 141 | ||||
| -rw-r--r-- | library/SubcircuitLibrary/IC_OPA827/IC_OPA827.cir | 37 | ||||
| -rw-r--r-- | library/SubcircuitLibrary/IC_OPA827/IC_OPA827.cir.out | 41 | ||||
| -rw-r--r-- | library/SubcircuitLibrary/IC_OPA827/IC_OPA827.pro | 71 | ||||
| -rw-r--r-- | library/SubcircuitLibrary/IC_OPA827/IC_OPA827.sch | 571 | ||||
| -rw-r--r-- | library/SubcircuitLibrary/IC_OPA827/IC_OPA827.sub | 35 | ||||
| -rw-r--r-- | library/SubcircuitLibrary/IC_OPA827/IC_OPA827_Previous_Values.xml | 1 | ||||
| -rw-r--r-- | library/SubcircuitLibrary/IC_OPA827/NJF.lib | 4 | ||||
| -rw-r--r-- | library/SubcircuitLibrary/IC_OPA827/NMOS-180nm.lib | 13 | ||||
| -rw-r--r-- | library/SubcircuitLibrary/IC_OPA827/NPN.lib | 4 | ||||
| -rw-r--r-- | library/SubcircuitLibrary/IC_OPA827/PNP.lib | 4 | ||||
| -rw-r--r-- | library/SubcircuitLibrary/IC_OPA827/README.md | 16 | ||||
| -rw-r--r-- | library/SubcircuitLibrary/IC_OPA827/analysis | 1 |
13 files changed, 939 insertions, 0 deletions
diff --git a/library/SubcircuitLibrary/IC_OPA827/IC_OPA827-cache.lib b/library/SubcircuitLibrary/IC_OPA827/IC_OPA827-cache.lib new file mode 100644 index 00000000..f4bc17ab --- /dev/null +++ b/library/SubcircuitLibrary/IC_OPA827/IC_OPA827-cache.lib @@ -0,0 +1,141 @@ +EESchema-LIBRARY Version 2.3
+#encoding utf-8
+#
+# PORT
+#
+DEF PORT U 0 40 Y Y 26 F N
+F0 "U" 50 100 30 H V C CNN
+F1 "PORT" 0 0 30 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0
+A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50
+S -100 50 100 -50 0 1 0 N
+X ~ 1 250 0 100 L 30 30 1 1 B
+X ~ 2 250 0 100 L 30 30 2 1 B
+X ~ 3 250 0 100 L 30 30 3 1 B
+X ~ 4 250 0 100 L 30 30 4 1 B
+X ~ 5 250 0 100 L 30 30 5 1 B
+X ~ 6 250 0 100 L 30 30 6 1 B
+X ~ 7 250 0 100 L 30 30 7 1 B
+X ~ 8 250 0 100 L 30 30 8 1 B
+X ~ 9 250 0 100 L 30 30 9 1 B
+X ~ 10 250 0 100 L 30 30 10 1 B
+X ~ 11 250 0 100 L 30 30 11 1 B
+X ~ 12 250 0 100 L 30 30 12 1 B
+X ~ 13 250 0 100 L 30 30 13 1 B
+X ~ 14 250 0 100 L 30 30 14 1 B
+X ~ 15 250 0 100 L 30 30 15 1 B
+X ~ 16 250 0 100 L 30 30 16 1 B
+X ~ 17 250 0 100 L 30 30 17 1 B
+X ~ 18 250 0 100 L 30 30 18 1 B
+X ~ 19 250 0 100 L 30 30 19 1 B
+X ~ 20 250 0 100 L 30 30 20 1 B
+X ~ 21 250 0 100 L 30 30 21 1 B
+X ~ 22 250 0 100 L 30 30 22 1 B
+X ~ 23 250 0 100 L 30 30 23 1 B
+X ~ 24 250 0 100 L 30 30 24 1 B
+X ~ 25 250 0 100 L 30 30 25 1 B
+X ~ 26 250 0 100 L 30 30 26 1 B
+ENDDRAW
+ENDDEF
+#
+# eSim_C
+#
+DEF eSim_C C 0 10 N Y 1 F N
+F0 "C" 25 100 50 H V L CNN
+F1 "eSim_C" 25 -100 50 H V L CNN
+F2 "" 38 -150 30 H V C CNN
+F3 "" 0 0 60 H V C CNN
+ALIAS capacitor
+$FPLIST
+ C_*
+$ENDFPLIST
+DRAW
+P 2 0 1 20 -80 -30 80 -30 N
+P 2 0 1 20 -80 30 80 30 N
+X ~ 1 0 150 110 D 40 40 1 1 P
+X ~ 2 0 -150 110 U 40 40 1 1 P
+ENDDRAW
+ENDDEF
+#
+# eSim_NJF
+#
+DEF eSim_NJF J 0 0 Y N 1 F N
+F0 "J" -100 50 50 H V R CNN
+F1 "eSim_NJF" -50 150 50 H V R CNN
+F2 "" 200 100 29 H V C CNN
+F3 "" 0 0 60 H V C CNN
+ALIAS jfet_n
+DRAW
+C 50 0 111 0 1 10 N
+P 3 0 1 10 10 75 10 -75 10 -75 N
+P 3 0 1 0 100 -100 100 -50 10 -50 N
+P 3 0 1 0 100 100 100 55 10 55 N
+P 4 0 1 0 0 0 -40 15 -40 -15 0 0 F
+X D 1 100 200 100 D 50 50 1 1 P
+X G 2 -200 0 210 R 50 50 1 1 P
+X S 3 100 -200 100 U 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
+# eSim_NPN
+#
+DEF eSim_NPN Q 0 0 Y N 1 F N
+F0 "Q" -100 50 50 H V R CNN
+F1 "eSim_NPN" -50 150 50 H V R CNN
+F2 "" 200 100 29 H V C CNN
+F3 "" 0 0 60 H V C CNN
+ALIAS BC547 Q2N2222
+DRAW
+C 50 0 111 0 1 10 N
+P 2 0 1 0 25 25 100 100 N
+P 3 0 1 0 25 -25 100 -100 100 -100 N
+P 3 0 1 20 25 75 25 -75 25 -75 N
+P 5 0 1 0 50 -70 70 -50 90 -90 50 -70 50 -70 F
+X C 1 100 200 100 D 50 50 1 1 P
+X B 2 -200 0 225 R 50 50 1 1 P
+X E 3 100 -200 100 U 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
+# eSim_PNP
+#
+DEF eSim_PNP Q 0 0 Y N 1 F N
+F0 "Q" -100 50 50 H V R CNN
+F1 "eSim_PNP" -50 150 50 H V R CNN
+F2 "" 200 100 29 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+C 50 0 111 0 1 10 N
+P 2 0 1 0 25 25 100 100 N
+P 3 0 1 0 25 -25 100 -100 100 -100 N
+P 3 0 1 20 25 75 25 -75 25 -75 N
+P 5 0 1 0 90 -70 70 -90 50 -50 90 -70 90 -70 F
+X C 1 100 200 100 D 50 50 1 1 P
+X B 2 -200 0 225 R 50 50 1 1 P
+X E 3 100 -200 100 U 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
+# eSim_R
+#
+DEF eSim_R R 0 0 N Y 1 F N
+F0 "R" 50 130 50 H V C CNN
+F1 "eSim_R" 50 -50 50 H V C CNN
+F2 "" 50 -20 30 H V C CNN
+F3 "" 50 50 30 V V C CNN
+ALIAS resistor
+$FPLIST
+ R_*
+ Resistor_*
+$ENDFPLIST
+DRAW
+S 150 10 -50 90 0 1 10 N
+X ~ 1 -100 50 50 R 60 60 1 1 P
+X ~ 2 200 50 50 L 60 60 1 1 P
+ENDDRAW
+ENDDEF
+#
+#End Library
diff --git a/library/SubcircuitLibrary/IC_OPA827/IC_OPA827.cir b/library/SubcircuitLibrary/IC_OPA827/IC_OPA827.cir new file mode 100644 index 00000000..f6c752d8 --- /dev/null +++ b/library/SubcircuitLibrary/IC_OPA827/IC_OPA827.cir @@ -0,0 +1,37 @@ +* C:\FOSSEE\eSim\library\SubcircuitLibrary\IC_OPA827\IC_OPA827.cir
+
+* EESchema Netlist Version 1.1 (Spice format) creation date: 03/14/23 18:08:37
+
+* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N
+* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0
+
+* Sheet Name: /
+Q1 Net-_C1-Pad1_ Net-_Q1-Pad2_ Net-_J1-Pad3_ eSim_PNP
+Q3 Net-_Q1-Pad2_ Net-_Q1-Pad2_ Net-_J2-Pad3_ eSim_PNP
+Q4 Net-_Q1-Pad2_ Net-_Q1-Pad2_ Net-_J3-Pad1_ eSim_PNP
+Q5 Net-_C2-Pad2_ Net-_Q1-Pad2_ Net-_J4-Pad1_ eSim_PNP
+Q8 Net-_Q7-Pad1_ Net-_Q7-Pad1_ Net-_J1-Pad1_ eSim_PNP
+Q9 Net-_C2-Pad1_ Net-_Q7-Pad1_ Net-_J1-Pad1_ eSim_PNP
+Q2 Net-_C1-Pad1_ Net-_Q10-Pad3_ Net-_Q2-Pad3_ eSim_NPN
+Q6 Net-_C2-Pad2_ Net-_Q10-Pad3_ Net-_Q6-Pad3_ eSim_NPN
+Q7 Net-_Q7-Pad1_ Net-_C1-Pad1_ Net-_Q10-Pad3_ eSim_NPN
+Q10 Net-_C2-Pad1_ Net-_C2-Pad2_ Net-_Q10-Pad3_ eSim_NPN
+Q11 Net-_J1-Pad1_ Net-_C2-Pad1_ Net-_Q11-Pad3_ eSim_NPN
+Q12 Net-_C1-Pad1_ Net-_C2-Pad1_ Net-_Q12-Pad3_ eSim_PNP
+Q13 Net-_J1-Pad1_ Net-_Q12-Pad3_ Net-_Q13-Pad3_ eSim_NPN
+Q14 Net-_C1-Pad1_ Net-_Q11-Pad3_ Net-_Q13-Pad3_ eSim_PNP
+C1 Net-_C1-Pad1_ Net-_C1-Pad1_ 0.1u
+C2 Net-_C2-Pad1_ Net-_C2-Pad2_ 0.1u
+R1 Net-_Q2-Pad3_ Net-_C1-Pad1_ 200
+R2 Net-_Q6-Pad3_ Net-_C1-Pad1_ 200
+U1 Net-_J1-Pad2_ Net-_J1-Pad1_ Net-_J3-Pad2_ Net-_C1-Pad1_ Net-_Q13-Pad3_ PORT
+J1 Net-_J1-Pad1_ Net-_J1-Pad2_ Net-_J1-Pad3_ jfet_n
+J2 Net-_J1-Pad1_ Net-_J1-Pad2_ Net-_J2-Pad3_ jfet_n
+J3 Net-_J3-Pad1_ Net-_J3-Pad2_ Net-_J1-Pad1_ jfet_n
+J4 Net-_J4-Pad1_ Net-_J3-Pad2_ Net-_J1-Pad1_ jfet_n
+R3 Net-_Q1-Pad2_ Net-_C1-Pad1_ 5k
+R4 Net-_Q10-Pad3_ Net-_C1-Pad1_ 5k
+R5 Net-_Q11-Pad3_ Net-_C1-Pad1_ 500
+R6 Net-_J1-Pad1_ Net-_Q12-Pad3_ 10
+
+.end
diff --git a/library/SubcircuitLibrary/IC_OPA827/IC_OPA827.cir.out b/library/SubcircuitLibrary/IC_OPA827/IC_OPA827.cir.out new file mode 100644 index 00000000..8804c851 --- /dev/null +++ b/library/SubcircuitLibrary/IC_OPA827/IC_OPA827.cir.out @@ -0,0 +1,41 @@ +* c:\fossee\esim\library\subcircuitlibrary\ic_opa827\ic_opa827.cir
+
+.include NJF.lib
+.include NPN.lib
+.include PNP.lib
+q1 net-_c1-pad1_ net-_q1-pad2_ net-_j1-pad3_ Q2N2907A
+q3 net-_q1-pad2_ net-_q1-pad2_ net-_j2-pad3_ Q2N2907A
+q4 net-_q1-pad2_ net-_q1-pad2_ net-_j3-pad1_ Q2N2907A
+q5 net-_c2-pad2_ net-_q1-pad2_ net-_j4-pad1_ Q2N2907A
+q8 net-_q7-pad1_ net-_q7-pad1_ net-_j1-pad1_ Q2N2907A
+q9 net-_c2-pad1_ net-_q7-pad1_ net-_j1-pad1_ Q2N2907A
+q2 net-_c1-pad1_ net-_q10-pad3_ net-_q2-pad3_ Q2N2222
+q6 net-_c2-pad2_ net-_q10-pad3_ net-_q6-pad3_ Q2N2222
+q7 net-_q7-pad1_ net-_c1-pad1_ net-_q10-pad3_ Q2N2222
+q10 net-_c2-pad1_ net-_c2-pad2_ net-_q10-pad3_ Q2N2222
+q11 net-_j1-pad1_ net-_c2-pad1_ net-_q11-pad3_ Q2N2222
+q12 net-_c1-pad1_ net-_c2-pad1_ net-_q12-pad3_ Q2N2907A
+q13 net-_j1-pad1_ net-_q12-pad3_ net-_q13-pad3_ Q2N2222
+q14 net-_c1-pad1_ net-_q11-pad3_ net-_q13-pad3_ Q2N2907A
+c1 net-_c1-pad1_ net-_c1-pad1_ 0.1u
+c2 net-_c2-pad1_ net-_c2-pad2_ 0.1u
+r1 net-_q2-pad3_ net-_c1-pad1_ 200
+r2 net-_q6-pad3_ net-_c1-pad1_ 200
+* u1 net-_j1-pad2_ net-_j1-pad1_ net-_j3-pad2_ net-_c1-pad1_ net-_q13-pad3_ port
+j1 net-_j1-pad1_ net-_j1-pad2_ net-_j1-pad3_ J2N3819
+j2 net-_j1-pad1_ net-_j1-pad2_ net-_j2-pad3_ J2N3819
+j3 net-_j3-pad1_ net-_j3-pad2_ net-_j1-pad1_ J2N3819
+j4 net-_j4-pad1_ net-_j3-pad2_ net-_j1-pad1_ J2N3819
+r3 net-_q1-pad2_ net-_c1-pad1_ 5k
+r4 net-_q10-pad3_ net-_c1-pad1_ 5k
+r5 net-_q11-pad3_ net-_c1-pad1_ 500
+r6 net-_j1-pad1_ net-_q12-pad3_ 10
+.tran 0e-00 0e-00 0e-00
+
+* Control Statements
+.control
+run
+print allv > plot_data_v.txt
+print alli > plot_data_i.txt
+.endc
+.end
diff --git a/library/SubcircuitLibrary/IC_OPA827/IC_OPA827.pro b/library/SubcircuitLibrary/IC_OPA827/IC_OPA827.pro new file mode 100644 index 00000000..22f2d439 --- /dev/null +++ b/library/SubcircuitLibrary/IC_OPA827/IC_OPA827.pro @@ -0,0 +1,71 @@ +update=22/05/2015 07:44:53
+version=1
+last_client=kicad
+[general]
+version=1
+RootSch=
+BoardNm=
+[pcbnew]
+version=1
+LastNetListRead=
+UseCmpFile=1
+PadDrill=0.600000000000
+PadDrillOvalY=0.600000000000
+PadSizeH=1.500000000000
+PadSizeV=1.500000000000
+PcbTextSizeV=1.500000000000
+PcbTextSizeH=1.500000000000
+PcbTextThickness=0.300000000000
+ModuleTextSizeV=1.000000000000
+ModuleTextSizeH=1.000000000000
+ModuleTextSizeThickness=0.150000000000
+SolderMaskClearance=0.000000000000
+SolderMaskMinWidth=0.000000000000
+DrawSegmentWidth=0.200000000000
+BoardOutlineThickness=0.100000000000
+ModuleOutlineThickness=0.150000000000
+[cvpcb]
+version=1
+NetIExt=net
+[eeschema]
+version=1
+LibDir=
+[eeschema/libraries]
+LibName1=adc-dac
+LibName2=memory
+LibName3=xilinx
+LibName4=microcontrollers
+LibName5=dsp
+LibName6=microchip
+LibName7=analog_switches
+LibName8=motorola
+LibName9=texas
+LibName10=intel
+LibName11=audio
+LibName12=interface
+LibName13=digital-audio
+LibName14=philips
+LibName15=display
+LibName16=cypress
+LibName17=siliconi
+LibName18=opto
+LibName19=atmel
+LibName20=contrib
+LibName21=power
+LibName22=eSim_Plot
+LibName23=transistors
+LibName24=conn
+LibName25=eSim_User
+LibName26=regul
+LibName27=74xx
+LibName28=cmos4000
+LibName29=eSim_Analog
+LibName30=eSim_Devices
+LibName31=eSim_Digital
+LibName32=eSim_Hybrid
+LibName33=eSim_Miscellaneous
+LibName34=eSim_Power
+LibName35=eSim_Sources
+LibName36=eSim_Subckt
+LibName37=eSim_Nghdl
+LibName38=eSim_Ngveri
diff --git a/library/SubcircuitLibrary/IC_OPA827/IC_OPA827.sch b/library/SubcircuitLibrary/IC_OPA827/IC_OPA827.sch new file mode 100644 index 00000000..df9a6152 --- /dev/null +++ b/library/SubcircuitLibrary/IC_OPA827/IC_OPA827.sch @@ -0,0 +1,571 @@ +EESchema Schematic File Version 2
+LIBS:adc-dac
+LIBS:memory
+LIBS:xilinx
+LIBS:microcontrollers
+LIBS:dsp
+LIBS:microchip
+LIBS:analog_switches
+LIBS:motorola
+LIBS:texas
+LIBS:intel
+LIBS:audio
+LIBS:interface
+LIBS:digital-audio
+LIBS:philips
+LIBS:display
+LIBS:cypress
+LIBS:siliconi
+LIBS:opto
+LIBS:atmel
+LIBS:contrib
+LIBS:power
+LIBS:eSim_Plot
+LIBS:transistors
+LIBS:conn
+LIBS:eSim_User
+LIBS:regul
+LIBS:74xx
+LIBS:cmos4000
+LIBS:eSim_Analog
+LIBS:eSim_Devices
+LIBS:eSim_Digital
+LIBS:eSim_Hybrid
+LIBS:eSim_Miscellaneous
+LIBS:eSim_Power
+LIBS:eSim_Sources
+LIBS:eSim_Subckt
+LIBS:eSim_Nghdl
+LIBS:eSim_Ngveri
+LIBS:IC_OPA827-cache
+EELAYER 25 0
+EELAYER END
+$Descr A4 11693 8268
+encoding utf-8
+Sheet 1 1
+Title ""
+Date ""
+Rev ""
+Comp ""
+Comment1 ""
+Comment2 ""
+Comment3 ""
+Comment4 ""
+$EndDescr
+$Comp
+L eSim_PNP Q1
+U 1 1 63F31271
+P 3350 3600
+F 0 "Q1" H 3250 3650 50 0000 R CNN
+F 1 "eSim_PNP" H 3300 3750 50 0000 R CNN
+F 2 "" H 3550 3700 29 0000 C CNN
+F 3 "" H 3350 3600 60 0000 C CNN
+ 1 3350 3600
+ -1 0 0 1
+$EndComp
+$Comp
+L eSim_PNP Q3
+U 1 1 63F312A0
+P 4000 3600
+F 0 "Q3" H 3900 3650 50 0000 R CNN
+F 1 "eSim_PNP" H 3950 3750 50 0000 R CNN
+F 2 "" H 4200 3700 29 0000 C CNN
+F 3 "" H 4000 3600 60 0000 C CNN
+ 1 4000 3600
+ -1 0 0 1
+$EndComp
+$Comp
+L eSim_PNP Q4
+U 1 1 63F312CB
+P 4950 3600
+F 0 "Q4" H 4850 3650 50 0000 R CNN
+F 1 "eSim_PNP" H 4900 3750 50 0000 R CNN
+F 2 "" H 5150 3700 29 0000 C CNN
+F 3 "" H 4950 3600 60 0000 C CNN
+ 1 4950 3600
+ 1 0 0 1
+$EndComp
+$Comp
+L eSim_PNP Q5
+U 1 1 63F3133C
+P 5500 3600
+F 0 "Q5" H 5400 3650 50 0000 R CNN
+F 1 "eSim_PNP" H 5450 3750 50 0000 R CNN
+F 2 "" H 5700 3700 29 0000 C CNN
+F 3 "" H 5500 3600 60 0000 C CNN
+ 1 5500 3600
+ 1 0 0 1
+$EndComp
+$Comp
+L eSim_PNP Q8
+U 1 1 63F31376
+P 6400 2900
+F 0 "Q8" H 6300 2950 50 0000 R CNN
+F 1 "eSim_PNP" H 6350 3050 50 0000 R CNN
+F 2 "" H 6600 3000 29 0000 C CNN
+F 3 "" H 6400 2900 60 0000 C CNN
+ 1 6400 2900
+ -1 0 0 1
+$EndComp
+$Comp
+L eSim_PNP Q9
+U 1 1 63F313B5
+P 7000 2900
+F 0 "Q9" H 6900 2950 50 0000 R CNN
+F 1 "eSim_PNP" H 6950 3050 50 0000 R CNN
+F 2 "" H 7200 3000 29 0000 C CNN
+F 3 "" H 7000 2900 60 0000 C CNN
+ 1 7000 2900
+ 1 0 0 1
+$EndComp
+$Comp
+L eSim_NPN Q2
+U 1 1 63F31687
+P 3350 5350
+F 0 "Q2" H 3250 5400 50 0000 R CNN
+F 1 "eSim_NPN" H 3300 5500 50 0000 R CNN
+F 2 "" H 3550 5450 29 0000 C CNN
+F 3 "" H 3350 5350 60 0000 C CNN
+ 1 3350 5350
+ -1 0 0 -1
+$EndComp
+$Comp
+L eSim_NPN Q6
+U 1 1 63F316FB
+P 5500 5350
+F 0 "Q6" H 5400 5400 50 0000 R CNN
+F 1 "eSim_NPN" H 5450 5500 50 0000 R CNN
+F 2 "" H 5700 5450 29 0000 C CNN
+F 3 "" H 5500 5350 60 0000 C CNN
+ 1 5500 5350
+ 1 0 0 -1
+$EndComp
+$Comp
+L eSim_NPN Q7
+U 1 1 63F31937
+P 6200 4450
+F 0 "Q7" H 6100 4500 50 0000 R CNN
+F 1 "eSim_NPN" H 6150 4600 50 0000 R CNN
+F 2 "" H 6400 4550 29 0000 C CNN
+F 3 "" H 6200 4450 60 0000 C CNN
+ 1 6200 4450
+ 1 0 0 -1
+$EndComp
+$Comp
+L eSim_NPN Q10
+U 1 1 63F3196A
+P 7200 4450
+F 0 "Q10" H 7100 4500 50 0000 R CNN
+F 1 "eSim_NPN" H 7150 4600 50 0000 R CNN
+F 2 "" H 7400 4550 29 0000 C CNN
+F 3 "" H 7200 4450 60 0000 C CNN
+ 1 7200 4450
+ -1 0 0 -1
+$EndComp
+$Comp
+L eSim_NPN Q11
+U 1 1 63F3322D
+P 8000 3650
+F 0 "Q11" H 7900 3700 50 0000 R CNN
+F 1 "eSim_NPN" H 7950 3800 50 0000 R CNN
+F 2 "" H 8200 3750 29 0000 C CNN
+F 3 "" H 8000 3650 60 0000 C CNN
+ 1 8000 3650
+ 1 0 0 -1
+$EndComp
+$Comp
+L eSim_PNP Q12
+U 1 1 63F3326C
+P 8550 3650
+F 0 "Q12" H 8450 3700 50 0000 R CNN
+F 1 "eSim_PNP" H 8500 3800 50 0000 R CNN
+F 2 "" H 8750 3750 29 0000 C CNN
+F 3 "" H 8550 3650 60 0000 C CNN
+ 1 8550 3650
+ 1 0 0 1
+$EndComp
+$Comp
+L eSim_NPN Q13
+U 1 1 63F3355E
+P 9100 2900
+F 0 "Q13" H 9000 2950 50 0000 R CNN
+F 1 "eSim_NPN" H 9050 3050 50 0000 R CNN
+F 2 "" H 9300 3000 29 0000 C CNN
+F 3 "" H 9100 2900 60 0000 C CNN
+ 1 9100 2900
+ 1 0 0 -1
+$EndComp
+$Comp
+L eSim_PNP Q14
+U 1 1 63F3359B
+P 9100 4200
+F 0 "Q14" H 9000 4250 50 0000 R CNN
+F 1 "eSim_PNP" H 9050 4350 50 0000 R CNN
+F 2 "" H 9300 4300 29 0000 C CNN
+F 3 "" H 9100 4200 60 0000 C CNN
+ 1 9100 4200
+ 1 0 0 1
+$EndComp
+$Comp
+L capacitor C1
+U 1 1 63F348A4
+P 5950 5700
+F 0 "C1" H 5975 5800 50 0000 L CNN
+F 1 "0.1u" H 5975 5600 50 0000 L CNN
+F 2 "" H 5988 5550 30 0000 C CNN
+F 3 "" H 5950 5700 60 0000 C CNN
+ 1 5950 5700
+ 1 0 0 -1
+$EndComp
+$Comp
+L capacitor C2
+U 1 1 63F349D7
+P 7500 4050
+F 0 "C2" H 7525 4150 50 0000 L CNN
+F 1 "0.1u" H 7525 3950 50 0000 L CNN
+F 2 "" H 7538 3900 30 0000 C CNN
+F 3 "" H 7500 4050 60 0000 C CNN
+ 1 7500 4050
+ 1 0 0 -1
+$EndComp
+$Comp
+L resistor R1
+U 1 1 63F34DA5
+P 3200 5900
+F 0 "R1" H 3250 6030 50 0000 C CNN
+F 1 "200" H 3250 5850 50 0000 C CNN
+F 2 "" H 3250 5880 30 0000 C CNN
+F 3 "" V 3250 5950 30 0000 C CNN
+ 1 3200 5900
+ 0 1 1 0
+$EndComp
+$Comp
+L resistor R2
+U 1 1 63F34DF2
+P 5550 5850
+F 0 "R2" H 5600 5980 50 0000 C CNN
+F 1 "200" H 5600 5800 50 0000 C CNN
+F 2 "" H 5600 5830 30 0000 C CNN
+F 3 "" V 5600 5900 30 0000 C CNN
+ 1 5550 5850
+ 0 1 1 0
+$EndComp
+$Comp
+L PORT U1
+U 2 1 63F383AE
+P 5950 1400
+F 0 "U1" H 6000 1500 30 0000 C CNN
+F 1 "PORT" H 5950 1400 30 0000 C CNN
+F 2 "" H 5950 1400 60 0000 C CNN
+F 3 "" H 5950 1400 60 0000 C CNN
+ 2 5950 1400
+ 0 1 1 0
+$EndComp
+$Comp
+L PORT U1
+U 1 1 63F38417
+P 2300 2900
+F 0 "U1" H 2350 3000 30 0000 C CNN
+F 1 "PORT" H 2300 2900 30 0000 C CNN
+F 2 "" H 2300 2900 60 0000 C CNN
+F 3 "" H 2300 2900 60 0000 C CNN
+ 1 2300 2900
+ 1 0 0 -1
+$EndComp
+$Comp
+L PORT U1
+U 3 1 63F38464
+P 6150 2400
+F 0 "U1" H 6200 2500 30 0000 C CNN
+F 1 "PORT" H 6150 2400 30 0000 C CNN
+F 2 "" H 6150 2400 60 0000 C CNN
+F 3 "" H 6150 2400 60 0000 C CNN
+ 3 6150 2400
+ -1 0 0 1
+$EndComp
+$Comp
+L PORT U1
+U 4 1 63F38771
+P 6350 6600
+F 0 "U1" H 6400 6700 30 0000 C CNN
+F 1 "PORT" H 6350 6600 30 0000 C CNN
+F 2 "" H 6350 6600 60 0000 C CNN
+F 3 "" H 6350 6600 60 0000 C CNN
+ 4 6350 6600
+ 0 -1 -1 0
+$EndComp
+$Comp
+L PORT U1
+U 5 1 63F39193
+P 9900 3550
+F 0 "U1" H 9950 3650 30 0000 C CNN
+F 1 "PORT" H 9900 3550 30 0000 C CNN
+F 2 "" H 9900 3550 60 0000 C CNN
+F 3 "" H 9900 3550 60 0000 C CNN
+ 5 9900 3550
+ -1 0 0 1
+$EndComp
+Wire Wire Line
+ 6300 2200 6300 2700
+Wire Wire Line
+ 3250 2200 9200 2200
+Wire Wire Line
+ 7100 2200 7100 2700
+Wire Wire Line
+ 3250 2200 3250 2700
+Connection ~ 6300 2200
+Connection ~ 3900 2700
+Wire Wire Line
+ 5600 2700 5600 2200
+Connection ~ 5600 2200
+Wire Wire Line
+ 5050 3100 5050 3400
+Wire Wire Line
+ 3250 3100 3250 3400
+Wire Wire Line
+ 3900 3100 3900 3400
+Wire Wire Line
+ 5600 3400 5600 3100
+Wire Wire Line
+ 3900 3800 3900 3900
+Wire Wire Line
+ 3900 3900 5050 3900
+Wire Wire Line
+ 5050 3900 5050 3800
+Connection ~ 4450 3900
+Wire Wire Line
+ 4200 3600 5300 3600
+Wire Wire Line
+ 4450 3600 4450 4250
+Connection ~ 4450 3600
+Wire Wire Line
+ 3250 5150 3250 3800
+Wire Wire Line
+ 3550 5350 5300 5350
+Wire Wire Line
+ 5600 3800 5600 5150
+Wire Wire Line
+ 3250 4800 6000 4800
+Wire Wire Line
+ 6000 4800 6000 4450
+Connection ~ 3250 4800
+Wire Wire Line
+ 6300 4650 6300 4700
+Wire Wire Line
+ 6300 4700 7100 4700
+Wire Wire Line
+ 7100 4700 7100 4650
+Wire Wire Line
+ 6700 4700 6700 5400
+Connection ~ 6700 4700
+Wire Wire Line
+ 5250 5350 6500 5350
+Wire Wire Line
+ 6500 5350 6500 5000
+Wire Wire Line
+ 6500 5000 6700 5000
+Connection ~ 6700 5000
+Connection ~ 5250 5350
+Wire Wire Line
+ 3550 3600 4250 3600
+Connection ~ 4250 3600
+Connection ~ 4750 3600
+Wire Wire Line
+ 6300 4250 6300 3100
+Wire Wire Line
+ 7100 4250 7100 3100
+Wire Wire Line
+ 6600 2900 6800 2900
+Wire Wire Line
+ 6300 3300 6700 3300
+Wire Wire Line
+ 6700 3300 6700 2900
+Connection ~ 6700 2900
+Connection ~ 6300 3300
+Wire Wire Line
+ 8900 2900 8900 3250
+Wire Wire Line
+ 8900 3250 8650 3250
+Wire Wire Line
+ 8650 2850 8650 3450
+Connection ~ 8650 3250
+Wire Wire Line
+ 8650 2200 8650 2550
+Connection ~ 7100 2200
+Wire Wire Line
+ 8100 3450 8100 2200
+Connection ~ 8100 2200
+Wire Wire Line
+ 7100 3650 8350 3650
+Connection ~ 7100 3650
+Connection ~ 7800 3650
+Wire Wire Line
+ 8100 3850 8100 5050
+Wire Wire Line
+ 8900 4200 8100 4200
+Connection ~ 8100 4200
+Wire Wire Line
+ 7500 3900 7500 3650
+Connection ~ 7500 3650
+Wire Wire Line
+ 7500 4200 7500 4450
+Wire Wire Line
+ 7500 4450 7400 4450
+Wire Wire Line
+ 5950 5550 5950 4800
+Connection ~ 5950 4800
+Wire Wire Line
+ 3250 5550 3250 5800
+Wire Wire Line
+ 5600 5750 5600 5550
+Wire Wire Line
+ 3250 6100 9200 6100
+Wire Wire Line
+ 9200 6100 9200 4400
+Wire Wire Line
+ 8650 3850 8650 6100
+Connection ~ 8650 6100
+Wire Wire Line
+ 8100 5350 8100 6100
+Connection ~ 8100 6100
+Wire Wire Line
+ 5950 5850 5950 6100
+Connection ~ 5950 6100
+Wire Wire Line
+ 6700 5700 6700 6100
+Connection ~ 6700 6100
+Wire Wire Line
+ 5600 6050 5600 6100
+Connection ~ 5600 6100
+Wire Wire Line
+ 9200 4000 9200 3100
+Wire Wire Line
+ 9200 2200 9200 2700
+Connection ~ 8650 2200
+Connection ~ 2950 2900
+Wire Wire Line
+ 5900 2900 5900 2400
+Wire Wire Line
+ 5950 1650 5950 2200
+Connection ~ 5950 2200
+Wire Wire Line
+ 6350 6350 6350 6100
+Connection ~ 6350 6100
+Wire Wire Line
+ 9650 3550 9200 3550
+Connection ~ 9200 3550
+Wire Wire Line
+ 4450 4550 4450 6100
+Connection ~ 4450 6100
+Connection ~ 4450 4800
+Wire Wire Line
+ 5600 4200 7350 4200
+Wire Wire Line
+ 7350 4200 7350 4400
+Wire Wire Line
+ 7350 4400 7500 4400
+Connection ~ 7500 4400
+Connection ~ 5600 4200
+$Comp
+L jfet_n J1
+U 1 1 63F6690D
+P 3150 2900
+F 0 "J1" H 3050 2950 50 0000 R CNN
+F 1 "jfet_n" H 3100 3050 50 0000 R CNN
+F 2 "" H 3350 3000 29 0000 C CNN
+F 3 "" H 3150 2900 60 0000 C CNN
+ 1 3150 2900
+ 1 0 0 -1
+$EndComp
+$Comp
+L jfet_n J2
+U 1 1 63F66A5C
+P 3800 2900
+F 0 "J2" H 3700 2950 50 0000 R CNN
+F 1 "jfet_n" H 3750 3050 50 0000 R CNN
+F 2 "" H 4000 3000 29 0000 C CNN
+F 3 "" H 3800 2900 60 0000 C CNN
+ 1 3800 2900
+ 1 0 0 -1
+$EndComp
+Wire Wire Line
+ 2550 2900 3600 2900
+Wire Wire Line
+ 3900 2700 3900 2500
+Wire Wire Line
+ 3900 2500 3250 2500
+Connection ~ 3250 2500
+$Comp
+L jfet_n J3
+U 1 1 63F66DD4
+P 5150 2900
+F 0 "J3" H 5050 2950 50 0000 R CNN
+F 1 "jfet_n" H 5100 3050 50 0000 R CNN
+F 2 "" H 5350 3000 29 0000 C CNN
+F 3 "" H 5150 2900 60 0000 C CNN
+ 1 5150 2900
+ -1 0 0 1
+$EndComp
+$Comp
+L jfet_n J4
+U 1 1 63F66E33
+P 5700 2900
+F 0 "J4" H 5600 2950 50 0000 R CNN
+F 1 "jfet_n" H 5650 3050 50 0000 R CNN
+F 2 "" H 5900 3000 29 0000 C CNN
+F 3 "" H 5700 2900 60 0000 C CNN
+ 1 5700 2900
+ -1 0 0 1
+$EndComp
+Wire Wire Line
+ 5350 2900 5900 2900
+Wire Wire Line
+ 5050 2700 5050 2550
+Wire Wire Line
+ 5050 2550 5600 2550
+Connection ~ 5600 2550
+$Comp
+L resistor R3
+U 1 1 641044BF
+P 4400 4350
+F 0 "R3" H 4450 4480 50 0000 C CNN
+F 1 "5k" H 4450 4300 50 0000 C CNN
+F 2 "" H 4450 4330 30 0000 C CNN
+F 3 "" V 4450 4400 30 0000 C CNN
+ 1 4400 4350
+ 0 1 1 0
+$EndComp
+$Comp
+L resistor R4
+U 1 1 64104512
+P 6650 5500
+F 0 "R4" H 6700 5630 50 0000 C CNN
+F 1 "5k" H 6700 5450 50 0000 C CNN
+F 2 "" H 6700 5480 30 0000 C CNN
+F 3 "" V 6700 5550 30 0000 C CNN
+ 1 6650 5500
+ 0 1 1 0
+$EndComp
+$Comp
+L resistor R5
+U 1 1 641047E1
+P 8050 5150
+F 0 "R5" H 8100 5280 50 0000 C CNN
+F 1 "500" H 8100 5100 50 0000 C CNN
+F 2 "" H 8100 5130 30 0000 C CNN
+F 3 "" V 8100 5200 30 0000 C CNN
+ 1 8050 5150
+ 0 1 1 0
+$EndComp
+$Comp
+L resistor R6
+U 1 1 641074E5
+P 8600 2650
+F 0 "R6" H 8650 2780 50 0000 C CNN
+F 1 "10" H 8650 2600 50 0000 C CNN
+F 2 "" H 8650 2630 30 0000 C CNN
+F 3 "" V 8650 2700 30 0000 C CNN
+ 1 8600 2650
+ 0 1 1 0
+$EndComp
+$EndSCHEMATC
diff --git a/library/SubcircuitLibrary/IC_OPA827/IC_OPA827.sub b/library/SubcircuitLibrary/IC_OPA827/IC_OPA827.sub new file mode 100644 index 00000000..b45c8262 --- /dev/null +++ b/library/SubcircuitLibrary/IC_OPA827/IC_OPA827.sub @@ -0,0 +1,35 @@ +* Subcircuit IC_OPA827
+.subckt IC_OPA827 net-_j1-pad2_ net-_j1-pad1_ net-_j3-pad2_ net-_c1-pad1_ net-_q13-pad3_
+* c:\fossee\esim\library\subcircuitlibrary\ic_opa827\ic_opa827.cir
+.include NJF.lib
+.include NPN.lib
+.include PNP.lib
+q1 net-_c1-pad1_ net-_q1-pad2_ net-_j1-pad3_ Q2N2907A
+q3 net-_q1-pad2_ net-_q1-pad2_ net-_j2-pad3_ Q2N2907A
+q4 net-_q1-pad2_ net-_q1-pad2_ net-_j3-pad1_ Q2N2907A
+q5 net-_c2-pad2_ net-_q1-pad2_ net-_j4-pad1_ Q2N2907A
+q8 net-_q7-pad1_ net-_q7-pad1_ net-_j1-pad1_ Q2N2907A
+q9 net-_c2-pad1_ net-_q7-pad1_ net-_j1-pad1_ Q2N2907A
+q2 net-_c1-pad1_ net-_q10-pad3_ net-_q2-pad3_ Q2N2222
+q6 net-_c2-pad2_ net-_q10-pad3_ net-_q6-pad3_ Q2N2222
+q7 net-_q7-pad1_ net-_c1-pad1_ net-_q10-pad3_ Q2N2222
+q10 net-_c2-pad1_ net-_c2-pad2_ net-_q10-pad3_ Q2N2222
+q11 net-_j1-pad1_ net-_c2-pad1_ net-_q11-pad3_ Q2N2222
+q12 net-_c1-pad1_ net-_c2-pad1_ net-_q12-pad3_ Q2N2907A
+q13 net-_j1-pad1_ net-_q12-pad3_ net-_q13-pad3_ Q2N2222
+q14 net-_c1-pad1_ net-_q11-pad3_ net-_q13-pad3_ Q2N2907A
+c1 net-_c1-pad1_ net-_c1-pad1_ 0.1u
+c2 net-_c2-pad1_ net-_c2-pad2_ 0.1u
+r1 net-_q2-pad3_ net-_c1-pad1_ 200
+r2 net-_q6-pad3_ net-_c1-pad1_ 200
+j1 net-_j1-pad1_ net-_j1-pad2_ net-_j1-pad3_ J2N3819
+j2 net-_j1-pad1_ net-_j1-pad2_ net-_j2-pad3_ J2N3819
+j3 net-_j3-pad1_ net-_j3-pad2_ net-_j1-pad1_ J2N3819
+j4 net-_j4-pad1_ net-_j3-pad2_ net-_j1-pad1_ J2N3819
+r3 net-_q1-pad2_ net-_c1-pad1_ 5k
+r4 net-_q10-pad3_ net-_c1-pad1_ 5k
+r5 net-_q11-pad3_ net-_c1-pad1_ 500
+r6 net-_j1-pad1_ net-_q12-pad3_ 10
+* Control Statements
+
+.ends IC_OPA827
\ No newline at end of file diff --git a/library/SubcircuitLibrary/IC_OPA827/IC_OPA827_Previous_Values.xml b/library/SubcircuitLibrary/IC_OPA827/IC_OPA827_Previous_Values.xml new file mode 100644 index 00000000..12052040 --- /dev/null +++ b/library/SubcircuitLibrary/IC_OPA827/IC_OPA827_Previous_Values.xml @@ -0,0 +1 @@ +<KicadtoNgspice><source><i1 name="Source type">10m</i1><i2 name="Source type">10m</i2><i4 name="Source type">5m</i4><i3 name="Source type">5m</i3></source><model /><devicemodel><q1><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.lib</field></q1><q3><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.lib</field></q3><q4><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.lib</field></q4><q5><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.lib</field></q5><q8><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.lib</field></q8><q9><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.lib</field></q9><q2><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q2><q6><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q6><q7><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q7><q10><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q10><q11><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q11><q12><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.lib</field></q12><q13><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q13><q14><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.lib</field></q14><j1><field>C:\FOSSEE\eSim\library\deviceModelLibrary\JFET\NJF.lib</field></j1><j2><field>C:\FOSSEE\eSim\library\deviceModelLibrary\JFET\NJF.lib</field></j2><j3><field>C:\FOSSEE\eSim\library\deviceModelLibrary\JFET\NJF.lib</field></j3><j4><field>C:\FOSSEE\eSim\library\deviceModelLibrary\JFET\NJF.lib</field></j4></devicemodel><subcircuit /><analysis><ac><field1 name="Lin">true</field1><field2 name="Dec">false</field2><field3 name="Oct">false</field3><field4 name="Start Frequency" /><field5 name="Stop Frequency" /><field6 name="No. of points" /><field7 name="Start Fre Combo">Hz</field7><field8 name="Stop Fre Combo">Hz</field8></ac><dc><field1 name="Source 1" /><field2 name="Start" /><field3 name="Increment" /><field4 name="Stop" /><field5 name="Operating Point">0</field5><field6 name="Start Combo">Volts or Amperes</field6><field7 name="Increment Combo">Volts or Amperes</field7><field8 name="Stop Combo">Volts or Amperes</field8><field9 name="Source 2" /><field10 name="Start" /><field11 name="Increment" /><field12 name="Stop" /><field13 name="Start Combo">Volts or Amperes</field13><field14 name="Increment Combo">Volts or Amperes</field14><field15 name="Stop Combo">Volts or Amperes</field15></dc><tran><field1 name="Start Time" /><field2 name="Step Time" /><field3 name="Stop Time" /><field4 name="Start Combo">Sec</field4><field5 name="Step Combo">Sec</field5><field6 name="Stop Combo">Sec</field6></tran></analysis></KicadtoNgspice>
\ No newline at end of file diff --git a/library/SubcircuitLibrary/IC_OPA827/NJF.lib b/library/SubcircuitLibrary/IC_OPA827/NJF.lib new file mode 100644 index 00000000..c3af26e8 --- /dev/null +++ b/library/SubcircuitLibrary/IC_OPA827/NJF.lib @@ -0,0 +1,4 @@ +.model J2N3819 NJF(Beta=1.304m Betatce=-.5 Rd=1 Rs=1 Lambda=2.25m Vto=-3
++ Vtotc=-2.5m Is=33.57f Isr=322.4f N=1 Nr=2 Xti=3 Alpha=311.7u
++ Vk=243.6 Cgd=1.6p M=.3622 Pb=1 Fc=.5 Cgs=2.414p Kf=9.882E-18
++ Af=1)
diff --git a/library/SubcircuitLibrary/IC_OPA827/NMOS-180nm.lib b/library/SubcircuitLibrary/IC_OPA827/NMOS-180nm.lib new file mode 100644 index 00000000..54e9786e --- /dev/null +++ b/library/SubcircuitLibrary/IC_OPA827/NMOS-180nm.lib @@ -0,0 +1,13 @@ +.model CMOSN NMOS (LEVEL=8 VERSION=3.2 TNOM=27 TOX=4.1E-9 XJ=1E-7 NCH=2.3549E17 VTH0=0.3823463 K1=0.5810697
++ K2=4.774618E-3 K3=0.0431669 K3B=1.1498346 W0=1E-7 NLX=1.910552E-7 DVT0W=0 DVT1W=0 DVT2W=0
++ DVT0=1.2894824 DVT1=0.3622063 DVT2=0.0713729 U0=280.633249 UA=-1.208537E-9 UB=2.158625E-18
++ UC=5.342807E-11 VSAT=9.366802E4 A0=1.7593146 AGS=0.3939741 B0=-6.413949E-9 B1=-1E-7 KETA=-5.180424E-4
++ A1=0 A2=1 RDSW=105.5517558 PRWG=0.5 PRWB=-0.1998871 WR=1 WINT=7.904732E-10 LINT=1.571424E-8 XL=0
++ XW=-1E-8 DWG=1.297221E-9 DWB=1.479041E-9 VOFF=-0.0955434 NFACTOR=2.4358891 CIT=0 CDSC=2.4E-4 CDSCD=0
++ CDSCB=0 ETA0=3.104851E-3 ETAB=-2.512384E-5 DSUB=0.0167075 PCLM=0.8073191 PDIBLC1=0.1666161 PDIBLC2=3.112892E-3
++ PDIBLCB=-0.1 DROUT=0.7875618 PSCBE1=8E10 PSCBE2=9.213635E-10 PVAG=3.85243E-3 DELTA=0.01 RSH=6.7 MOBMOD=1
++ PRT=0 UTE=-1.5 KT1=-0.11 KT1L=0 KT2=0.022 UA1=4.31E-9 UB1=-7.61E-18 UC1=-5.6E-11 AT=3.3E4 WL=0 WLN=1
++ WW=0 WWN=1 WWL=0 LL=0 LLN=1 LW=0 LWN=1 LWL=0 CAPMOD=2 XPART=0.5 CGDO=7.08E-10 CGSO=7.08E-10 CGBO=1E-12
++ CJ=9.68858E-4 PB=0.8 MJ=0.3864502 CJSW=2.512138E-10 PBSW=0.809286 MJSW=0.1060414 CJSWG=3.3E-10 PBSWG=0.809286
++ MJSWG=0.1060414 CF=0 PVTH0=-1.192722E-3 PRDSW=-5 PK2=6.450505E-5 WKETA=-4.27294E-4 LKETA=-0.0104078
++ PU0=6.3268729 PUA=2.226552E-11 PUB=0 PVSAT=969.1480157 PETA0=1E-4 PKETA=-1.049509E-3)
diff --git a/library/SubcircuitLibrary/IC_OPA827/NPN.lib b/library/SubcircuitLibrary/IC_OPA827/NPN.lib new file mode 100644 index 00000000..9c378ed8 --- /dev/null +++ b/library/SubcircuitLibrary/IC_OPA827/NPN.lib @@ -0,0 +1,4 @@ +.model Q2N2222 NPN( Is=14.34f Xti=3 Eg=1.11 Vaf=74.03 Bf=400 Ne=1.307
++ Ise=14.34f Ikf=0.2847 Xtb=1.5 Br=6.092 Nc=2 Isc=0 Ikr=0 Rc=1 Cjc=7.306p
++ Mjc=0.3416 Vjc=0.75 Fc=0.5 Cje=22.01p Mje=0.377 Vje=0.75 Tr=46.91n Tf=411.1p
++ Itf=0.6 Vtf=1.7 Xtf=3 Rb=10)
diff --git a/library/SubcircuitLibrary/IC_OPA827/PNP.lib b/library/SubcircuitLibrary/IC_OPA827/PNP.lib new file mode 100644 index 00000000..0eaa3e25 --- /dev/null +++ b/library/SubcircuitLibrary/IC_OPA827/PNP.lib @@ -0,0 +1,4 @@ +.model Q2N2907A PNP(Is=650.6E-18 Xti=3 Eg=1.11 Vaf=115.7 Bf=231.7 Ne=1.829
++ Ise=54.81f Ikf=1.079 Xtb=1.5 Br=3.563 Nc=2 Isc=0 Ikr=0 Rc=.715
++ Cjc=14.76p Mjc=.5383 Vjc=.75 Fc=.5 Cje=19.82p Mje=.3357 Vje=.75
++ Tr=111.3n Tf=603.7p Itf=.65 Vtf=5 Xtf=1.7 Rb=10)
diff --git a/library/SubcircuitLibrary/IC_OPA827/README.md b/library/SubcircuitLibrary/IC_OPA827/README.md new file mode 100644 index 00000000..61cd4fb5 --- /dev/null +++ b/library/SubcircuitLibrary/IC_OPA827/README.md @@ -0,0 +1,16 @@ + +# IC_OPA827 IC + +OPA827 is a Ultra-Low-Noise Audio Op Amps IC. + + +## Documentation + +To know the details of OPA827 IC please go through with the documentation : [OPA827_datasheet](https://www.mouser.in/new/texas-instruments/ti-opa1656-op-amps/?gclid=Cj0KCQjwwvilBhCFARIsADvYi7J2yeGw_41jcQ3-dqZVWa-ufzNHBjwkf0oN3Jz0Bdk2msXTsnRrzTUaAjciEALw_wcB) + + +## Contributer + +Name: Hrittika Ghosh +Year: 2023 +Position: FOSSEE Winter Intern 2023 diff --git a/library/SubcircuitLibrary/IC_OPA827/analysis b/library/SubcircuitLibrary/IC_OPA827/analysis new file mode 100644 index 00000000..ebd5c0a9 --- /dev/null +++ b/library/SubcircuitLibrary/IC_OPA827/analysis @@ -0,0 +1 @@ +.tran 0e-00 0e-00 0e-00
\ No newline at end of file |