920 files changed, 2 insertions, 21482 deletions

diff --git a/images/workspace.ico b/images/workspace.ico
new file mode 100644
index 00000000..b669ccf8
--- /dev/null
+++ b/images/workspace.ico
diff --git a/kicadLibrary.tar.xz b/kicadLibrary.tar.xz
deleted file mode 100644
index ee13b2d5..00000000
--- a/kicadLibrary.tar.xz
+++ /dev/null
diff --git a/src/SubcircuitLibrary/2bitmul/2bitmul-cache.lib b/library/SubcircuitLibrary/2bitmul/2bitmul-cache.lib
index e16831e4..e16831e4 100644
--- a/src/SubcircuitLibrary/2bitmul/2bitmul-cache.lib
+++ b/library/SubcircuitLibrary/2bitmul/2bitmul-cache.lib
diff --git a/src/SubcircuitLibrary/2bitmul/2bitmul.cir b/library/SubcircuitLibrary/2bitmul/2bitmul.cir
index 0f4deb6c..0f4deb6c 100644
--- a/src/SubcircuitLibrary/2bitmul/2bitmul.cir
+++ b/library/SubcircuitLibrary/2bitmul/2bitmul.cir
diff --git a/src/SubcircuitLibrary/2bitmul/2bitmul.cir.out b/library/SubcircuitLibrary/2bitmul/2bitmul.cir.out
index 71766bd8..71766bd8 100644
--- a/src/SubcircuitLibrary/2bitmul/2bitmul.cir.out
+++ b/library/SubcircuitLibrary/2bitmul/2bitmul.cir.out
diff --git a/src/SubcircuitLibrary/2bitmul/2bitmul.pro b/library/SubcircuitLibrary/2bitmul/2bitmul.pro
index eafbfb80..eafbfb80 100644
--- a/src/SubcircuitLibrary/2bitmul/2bitmul.pro
+++ b/library/SubcircuitLibrary/2bitmul/2bitmul.pro
diff --git a/src/SubcircuitLibrary/2bitmul/2bitmul.sch b/library/SubcircuitLibrary/2bitmul/2bitmul.sch
index 0ba61912..0ba61912 100644
--- a/src/SubcircuitLibrary/2bitmul/2bitmul.sch
+++ b/library/SubcircuitLibrary/2bitmul/2bitmul.sch
diff --git a/src/SubcircuitLibrary/2bitmul/2bitmul.sub b/library/SubcircuitLibrary/2bitmul/2bitmul.sub
index e77495a6..e77495a6 100644
--- a/src/SubcircuitLibrary/2bitmul/2bitmul.sub
+++ b/library/SubcircuitLibrary/2bitmul/2bitmul.sub
diff --git a/src/SubcircuitLibrary/2bitmul/2bitmul_Previous_Values.xml b/library/SubcircuitLibrary/2bitmul/2bitmul_Previous_Values.xml
index 8a55af97..8a55af97 100644
--- a/src/SubcircuitLibrary/2bitmul/2bitmul_Previous_Values.xml
+++ b/library/SubcircuitLibrary/2bitmul/2bitmul_Previous_Values.xml
diff --git a/src/SubcircuitLibrary/2bitmul/analysis b/library/SubcircuitLibrary/2bitmul/analysis
index 660a46cc..660a46cc 100644
--- a/src/SubcircuitLibrary/2bitmul/analysis
+++ b/library/SubcircuitLibrary/2bitmul/analysis
diff --git a/src/SubcircuitLibrary/2bitmul/half_adder-cache.lib b/library/SubcircuitLibrary/2bitmul/half_adder-cache.lib
index 68785220..68785220 100644
--- a/src/SubcircuitLibrary/2bitmul/half_adder-cache.lib
+++ b/library/SubcircuitLibrary/2bitmul/half_adder-cache.lib
diff --git a/src/SubcircuitLibrary/2bitmul/half_adder.cir b/library/SubcircuitLibrary/2bitmul/half_adder.cir
index 8b2e7e06..8b2e7e06 100644
--- a/src/SubcircuitLibrary/2bitmul/half_adder.cir
+++ b/library/SubcircuitLibrary/2bitmul/half_adder.cir
diff --git a/src/SubcircuitLibrary/2bitmul/half_adder.cir.out b/library/SubcircuitLibrary/2bitmul/half_adder.cir.out
index b1b6b1e7..b1b6b1e7 100644
--- a/src/SubcircuitLibrary/2bitmul/half_adder.cir.out
+++ b/library/SubcircuitLibrary/2bitmul/half_adder.cir.out
diff --git a/src/SubcircuitLibrary/2bitmul/half_adder.pro b/library/SubcircuitLibrary/2bitmul/half_adder.pro
index 695ae0f6..695ae0f6 100644
--- a/src/SubcircuitLibrary/2bitmul/half_adder.pro
+++ b/library/SubcircuitLibrary/2bitmul/half_adder.pro
diff --git a/src/SubcircuitLibrary/2bitmul/half_adder.sch b/library/SubcircuitLibrary/2bitmul/half_adder.sch
index bf9bcbf0..bf9bcbf0 100644
--- a/src/SubcircuitLibrary/2bitmul/half_adder.sch
+++ b/library/SubcircuitLibrary/2bitmul/half_adder.sch
diff --git a/src/SubcircuitLibrary/2bitmul/half_adder.sub b/library/SubcircuitLibrary/2bitmul/half_adder.sub
index e9f92223..e9f92223 100644
--- a/src/SubcircuitLibrary/2bitmul/half_adder.sub
+++ b/library/SubcircuitLibrary/2bitmul/half_adder.sub
diff --git a/src/SubcircuitLibrary/2bitmul/half_adder_Previous_Values.xml b/library/SubcircuitLibrary/2bitmul/half_adder_Previous_Values.xml
index b915f0da..b915f0da 100644
--- a/src/SubcircuitLibrary/2bitmul/half_adder_Previous_Values.xml
+++ b/library/SubcircuitLibrary/2bitmul/half_adder_Previous_Values.xml
diff --git a/src/SubcircuitLibrary/3_and/3_and-cache.lib b/library/SubcircuitLibrary/3_and/3_and-cache.lib
index af058641..af058641 100644
--- a/src/SubcircuitLibrary/3_and/3_and-cache.lib
+++ b/library/SubcircuitLibrary/3_and/3_and-cache.lib
diff --git a/src/SubcircuitLibrary/3_and/3_and.cir b/library/SubcircuitLibrary/3_and/3_and.cir
index ba296cf0..ba296cf0 100644
--- a/src/SubcircuitLibrary/3_and/3_and.cir
+++ b/library/SubcircuitLibrary/3_and/3_and.cir
diff --git a/src/SubcircuitLibrary/3_and/3_and.cir.out b/library/SubcircuitLibrary/3_and/3_and.cir.out
index d7cf79a0..d7cf79a0 100644
--- a/src/SubcircuitLibrary/3_and/3_and.cir.out
+++ b/library/SubcircuitLibrary/3_and/3_and.cir.out
diff --git a/src/SubcircuitLibrary/3_and/3_and.pro b/library/SubcircuitLibrary/3_and/3_and.pro
index 76df4655..76df4655 100644
--- a/src/SubcircuitLibrary/3_and/3_and.pro
+++ b/library/SubcircuitLibrary/3_and/3_and.pro
diff --git a/src/SubcircuitLibrary/3_and/3_and.sch b/library/SubcircuitLibrary/3_and/3_and.sch
index d6ac89f9..d6ac89f9 100644
--- a/src/SubcircuitLibrary/3_and/3_and.sch
+++ b/library/SubcircuitLibrary/3_and/3_and.sch
diff --git a/src/SubcircuitLibrary/3_and/3_and.sub b/library/SubcircuitLibrary/3_and/3_and.sub
index 3d9120bb..3d9120bb 100644
--- a/src/SubcircuitLibrary/3_and/3_and.sub
+++ b/library/SubcircuitLibrary/3_and/3_and.sub
diff --git a/src/SubcircuitLibrary/3_and/3_and_Previous_Values.xml b/library/SubcircuitLibrary/3_and/3_and_Previous_Values.xml
index abc5faaa..abc5faaa 100644
--- a/src/SubcircuitLibrary/3_and/3_and_Previous_Values.xml
+++ b/library/SubcircuitLibrary/3_and/3_and_Previous_Values.xml
diff --git a/src/SubcircuitLibrary/2bit_upcounter/analysis b/library/SubcircuitLibrary/3_and/analysis
index ebd5c0a9..ebd5c0a9 100644
--- a/src/SubcircuitLibrary/2bit_upcounter/analysis
+++ b/library/SubcircuitLibrary/3_and/analysis
diff --git a/src/SubcircuitLibrary/4002/4002-cache.lib b/library/SubcircuitLibrary/4002/4002-cache.lib
index 677411a9..677411a9 100644
--- a/src/SubcircuitLibrary/4002/4002-cache.lib
+++ b/library/SubcircuitLibrary/4002/4002-cache.lib
diff --git a/src/SubcircuitLibrary/4002/4002.cir b/library/SubcircuitLibrary/4002/4002.cir
index 5d5c1ed7..5d5c1ed7 100644
--- a/src/SubcircuitLibrary/4002/4002.cir
+++ b/library/SubcircuitLibrary/4002/4002.cir
diff --git a/src/SubcircuitLibrary/4002/4002.cir.out b/library/SubcircuitLibrary/4002/4002.cir.out
index e9cc6862..e9cc6862 100644
--- a/src/SubcircuitLibrary/4002/4002.cir.out
+++ b/library/SubcircuitLibrary/4002/4002.cir.out
diff --git a/src/SubcircuitLibrary/4002/4002.pro b/library/SubcircuitLibrary/4002/4002.pro
index 225ef82a..225ef82a 100644
--- a/src/SubcircuitLibrary/4002/4002.pro
+++ b/library/SubcircuitLibrary/4002/4002.pro
diff --git a/src/SubcircuitLibrary/4002/4002.sch b/library/SubcircuitLibrary/4002/4002.sch
index 545f46fe..545f46fe 100644
--- a/src/SubcircuitLibrary/4002/4002.sch
+++ b/library/SubcircuitLibrary/4002/4002.sch
diff --git a/src/SubcircuitLibrary/4002/4002.sub b/library/SubcircuitLibrary/4002/4002.sub
index b9726625..b9726625 100644
--- a/src/SubcircuitLibrary/4002/4002.sub
+++ b/library/SubcircuitLibrary/4002/4002.sub
diff --git a/src/SubcircuitLibrary/4002/4002_Previous_Values.xml b/library/SubcircuitLibrary/4002/4002_Previous_Values.xml
index 75360e5e..75360e5e 100644
--- a/src/SubcircuitLibrary/4002/4002_Previous_Values.xml
+++ b/library/SubcircuitLibrary/4002/4002_Previous_Values.xml
diff --git a/src/SubcircuitLibrary/3_and/analysis b/library/SubcircuitLibrary/4002/analysis
index ebd5c0a9..ebd5c0a9 100644
--- a/src/SubcircuitLibrary/3_and/analysis
+++ b/library/SubcircuitLibrary/4002/analysis
diff --git a/src/SubcircuitLibrary/4012/4012-cache.lib b/library/SubcircuitLibrary/4012/4012-cache.lib
index ea0d2d70..ea0d2d70 100644
--- a/src/SubcircuitLibrary/4012/4012-cache.lib
+++ b/library/SubcircuitLibrary/4012/4012-cache.lib
diff --git a/src/SubcircuitLibrary/4012/4012.cir b/library/SubcircuitLibrary/4012/4012.cir
index a88a9da4..a88a9da4 100644
--- a/src/SubcircuitLibrary/4012/4012.cir
+++ b/library/SubcircuitLibrary/4012/4012.cir
diff --git a/src/SubcircuitLibrary/4012/4012.cir.out b/library/SubcircuitLibrary/4012/4012.cir.out
index c43dda8c..c43dda8c 100644
--- a/src/SubcircuitLibrary/4012/4012.cir.out
+++ b/library/SubcircuitLibrary/4012/4012.cir.out
diff --git a/src/SubcircuitLibrary/4012/4012.pro b/library/SubcircuitLibrary/4012/4012.pro
index 0f76f4bb..0f76f4bb 100644
--- a/src/SubcircuitLibrary/4012/4012.pro
+++ b/library/SubcircuitLibrary/4012/4012.pro
diff --git a/src/SubcircuitLibrary/4012/4012.sch b/library/SubcircuitLibrary/4012/4012.sch
index b3320871..b3320871 100644
--- a/src/SubcircuitLibrary/4012/4012.sch
+++ b/library/SubcircuitLibrary/4012/4012.sch
diff --git a/src/SubcircuitLibrary/4012/4012.sub b/library/SubcircuitLibrary/4012/4012.sub
index 65263f03..65263f03 100644
--- a/src/SubcircuitLibrary/4012/4012.sub
+++ b/library/SubcircuitLibrary/4012/4012.sub
diff --git a/src/SubcircuitLibrary/4012/4012_Previous_Values.xml b/library/SubcircuitLibrary/4012/4012_Previous_Values.xml
index 4e7e73b2..4e7e73b2 100644
--- a/src/SubcircuitLibrary/4012/4012_Previous_Values.xml
+++ b/library/SubcircuitLibrary/4012/4012_Previous_Values.xml
diff --git a/src/SubcircuitLibrary/4002/analysis b/library/SubcircuitLibrary/4012/analysis
index ebd5c0a9..ebd5c0a9 100644
--- a/src/SubcircuitLibrary/4002/analysis
+++ b/library/SubcircuitLibrary/4012/analysis
diff --git a/src/SubcircuitLibrary/4017/4017-cache.lib b/library/SubcircuitLibrary/4017/4017-cache.lib
index efa6746f..efa6746f 100644
--- a/src/SubcircuitLibrary/4017/4017-cache.lib
+++ b/library/SubcircuitLibrary/4017/4017-cache.lib
diff --git a/src/SubcircuitLibrary/4017/4017.cir b/library/SubcircuitLibrary/4017/4017.cir
index 67ac9971..67ac9971 100644
--- a/src/SubcircuitLibrary/4017/4017.cir
+++ b/library/SubcircuitLibrary/4017/4017.cir
diff --git a/src/SubcircuitLibrary/4017/4017.cir.out b/library/SubcircuitLibrary/4017/4017.cir.out
index e3a384c5..e3a384c5 100644
--- a/src/SubcircuitLibrary/4017/4017.cir.out
+++ b/library/SubcircuitLibrary/4017/4017.cir.out
diff --git a/src/SubcircuitLibrary/4017/4017.pro b/library/SubcircuitLibrary/4017/4017.pro
index 8cdecd6c..8cdecd6c 100644
--- a/src/SubcircuitLibrary/4017/4017.pro
+++ b/library/SubcircuitLibrary/4017/4017.pro
diff --git a/src/SubcircuitLibrary/4017/4017.sch b/library/SubcircuitLibrary/4017/4017.sch
index 05549a32..05549a32 100644
--- a/src/SubcircuitLibrary/4017/4017.sch
+++ b/library/SubcircuitLibrary/4017/4017.sch
diff --git a/src/SubcircuitLibrary/4017/4017.sub b/library/SubcircuitLibrary/4017/4017.sub
index 2e27ab61..2e27ab61 100644
--- a/src/SubcircuitLibrary/4017/4017.sub
+++ b/library/SubcircuitLibrary/4017/4017.sub
diff --git a/src/SubcircuitLibrary/4017/4017_Previous_Values.xml b/library/SubcircuitLibrary/4017/4017_Previous_Values.xml
index 9dfd97a3..9dfd97a3 100644
--- a/src/SubcircuitLibrary/4017/4017_Previous_Values.xml
+++ b/library/SubcircuitLibrary/4017/4017_Previous_Values.xml
diff --git a/src/SubcircuitLibrary/4017/D.lib b/library/SubcircuitLibrary/4017/D.lib
index adbdfb35..adbdfb35 100644
--- a/src/SubcircuitLibrary/4017/D.lib
+++ b/library/SubcircuitLibrary/4017/D.lib
diff --git a/src/SubcircuitLibrary/4017/analysis b/library/SubcircuitLibrary/4017/analysis
index 40bd9d97..40bd9d97 100644
--- a/src/SubcircuitLibrary/4017/analysis
+++ b/library/SubcircuitLibrary/4017/analysis
diff --git a/src/SubcircuitLibrary/4023/3_and-cache.lib b/library/SubcircuitLibrary/4023/3_and-cache.lib
index af058641..af058641 100644
--- a/src/SubcircuitLibrary/4023/3_and-cache.lib
+++ b/library/SubcircuitLibrary/4023/3_and-cache.lib
diff --git a/src/SubcircuitLibrary/4023/3_and.cir b/library/SubcircuitLibrary/4023/3_and.cir
index ba296cf0..ba296cf0 100644
--- a/src/SubcircuitLibrary/4023/3_and.cir
+++ b/library/SubcircuitLibrary/4023/3_and.cir
diff --git a/src/SubcircuitLibrary/4023/3_and.cir.out b/library/SubcircuitLibrary/4023/3_and.cir.out
index d7cf79a0..d7cf79a0 100644
--- a/src/SubcircuitLibrary/4023/3_and.cir.out
+++ b/library/SubcircuitLibrary/4023/3_and.cir.out
diff --git a/src/SubcircuitLibrary/4023/3_and.pro b/library/SubcircuitLibrary/4023/3_and.pro
index 76df4655..76df4655 100644
--- a/src/SubcircuitLibrary/4023/3_and.pro
+++ b/library/SubcircuitLibrary/4023/3_and.pro
diff --git a/src/SubcircuitLibrary/4023/3_and.sch b/library/SubcircuitLibrary/4023/3_and.sch
index d6ac89f9..d6ac89f9 100644
--- a/src/SubcircuitLibrary/4023/3_and.sch
+++ b/library/SubcircuitLibrary/4023/3_and.sch
diff --git a/src/SubcircuitLibrary/4023/3_and.sub b/library/SubcircuitLibrary/4023/3_and.sub
index 3d9120bb..3d9120bb 100644
--- a/src/SubcircuitLibrary/4023/3_and.sub
+++ b/library/SubcircuitLibrary/4023/3_and.sub
diff --git a/src/SubcircuitLibrary/4023/3_and_Previous_Values.xml b/library/SubcircuitLibrary/4023/3_and_Previous_Values.xml
index abc5faaa..abc5faaa 100644
--- a/src/SubcircuitLibrary/4023/3_and_Previous_Values.xml
+++ b/library/SubcircuitLibrary/4023/3_and_Previous_Values.xml
diff --git a/src/SubcircuitLibrary/4023/4023-cache.lib b/library/SubcircuitLibrary/4023/4023-cache.lib
index c989d8c7..c989d8c7 100644
--- a/src/SubcircuitLibrary/4023/4023-cache.lib
+++ b/library/SubcircuitLibrary/4023/4023-cache.lib
diff --git a/src/SubcircuitLibrary/4023/4023.cir b/library/SubcircuitLibrary/4023/4023.cir
index 6aad9b84..6aad9b84 100644
--- a/src/SubcircuitLibrary/4023/4023.cir
+++ b/library/SubcircuitLibrary/4023/4023.cir
diff --git a/src/SubcircuitLibrary/4023/4023.cir.out b/library/SubcircuitLibrary/4023/4023.cir.out
index 7f48d16f..7f48d16f 100644
--- a/src/SubcircuitLibrary/4023/4023.cir.out
+++ b/library/SubcircuitLibrary/4023/4023.cir.out
diff --git a/src/SubcircuitLibrary/4023/4023.pro b/library/SubcircuitLibrary/4023/4023.pro
index 5a5ce355..5a5ce355 100644
--- a/src/SubcircuitLibrary/4023/4023.pro
+++ b/library/SubcircuitLibrary/4023/4023.pro
diff --git a/src/SubcircuitLibrary/4023/4023.sch b/library/SubcircuitLibrary/4023/4023.sch
index 57dd7868..57dd7868 100644
--- a/src/SubcircuitLibrary/4023/4023.sch
+++ b/library/SubcircuitLibrary/4023/4023.sch
diff --git a/src/SubcircuitLibrary/4023/4023.sub b/library/SubcircuitLibrary/4023/4023.sub
index b953da2e..b953da2e 100644
--- a/src/SubcircuitLibrary/4023/4023.sub
+++ b/library/SubcircuitLibrary/4023/4023.sub
diff --git a/src/SubcircuitLibrary/4023/4023_Previous_Values.xml b/library/SubcircuitLibrary/4023/4023_Previous_Values.xml
index ad900de2..ad900de2 100644
--- a/src/SubcircuitLibrary/4023/4023_Previous_Values.xml
+++ b/library/SubcircuitLibrary/4023/4023_Previous_Values.xml
diff --git a/src/SubcircuitLibrary/4012/analysis b/library/SubcircuitLibrary/4023/analysis
index ebd5c0a9..ebd5c0a9 100644
--- a/src/SubcircuitLibrary/4012/analysis
+++ b/library/SubcircuitLibrary/4023/analysis
diff --git a/src/SubcircuitLibrary/4028/4028-cache.lib b/library/SubcircuitLibrary/4028/4028-cache.lib
index 5b7e8ebd..5b7e8ebd 100644
--- a/src/SubcircuitLibrary/4028/4028-cache.lib
+++ b/library/SubcircuitLibrary/4028/4028-cache.lib
diff --git a/src/SubcircuitLibrary/4028/4028.cir b/library/SubcircuitLibrary/4028/4028.cir
index ff25eb55..ff25eb55 100644
--- a/src/SubcircuitLibrary/4028/4028.cir
+++ b/library/SubcircuitLibrary/4028/4028.cir
diff --git a/src/SubcircuitLibrary/4028/4028.cir.out b/library/SubcircuitLibrary/4028/4028.cir.out
index 882115b7..882115b7 100644
--- a/src/SubcircuitLibrary/4028/4028.cir.out
+++ b/library/SubcircuitLibrary/4028/4028.cir.out
diff --git a/src/SubcircuitLibrary/4028/4028.pro b/library/SubcircuitLibrary/4028/4028.pro
index a63207b3..a63207b3 100644
--- a/src/SubcircuitLibrary/4028/4028.pro
+++ b/library/SubcircuitLibrary/4028/4028.pro
diff --git a/src/SubcircuitLibrary/4028/4028.sch b/library/SubcircuitLibrary/4028/4028.sch
index 373a95e6..373a95e6 100644
--- a/src/SubcircuitLibrary/4028/4028.sch
+++ b/library/SubcircuitLibrary/4028/4028.sch
diff --git a/src/SubcircuitLibrary/4028/4028.sub b/library/SubcircuitLibrary/4028/4028.sub
index 828e0b67..828e0b67 100644
--- a/src/SubcircuitLibrary/4028/4028.sub
+++ b/library/SubcircuitLibrary/4028/4028.sub
diff --git a/src/SubcircuitLibrary/4028/4028_Previous_Values.xml b/library/SubcircuitLibrary/4028/4028_Previous_Values.xml
index 189fb200..189fb200 100644
--- a/src/SubcircuitLibrary/4028/4028_Previous_Values.xml
+++ b/library/SubcircuitLibrary/4028/4028_Previous_Values.xml
diff --git a/src/SubcircuitLibrary/4023/analysis b/library/SubcircuitLibrary/4028/analysis
index ebd5c0a9..ebd5c0a9 100644
--- a/src/SubcircuitLibrary/4023/analysis
+++ b/library/SubcircuitLibrary/4028/analysis
diff --git a/src/SubcircuitLibrary/4073/3_and-cache.lib b/library/SubcircuitLibrary/4073/3_and-cache.lib
index af058641..af058641 100644
--- a/src/SubcircuitLibrary/4073/3_and-cache.lib
+++ b/library/SubcircuitLibrary/4073/3_and-cache.lib
diff --git a/src/SubcircuitLibrary/4073/3_and.cir b/library/SubcircuitLibrary/4073/3_and.cir
index ba296cf0..ba296cf0 100644
--- a/src/SubcircuitLibrary/4073/3_and.cir
+++ b/library/SubcircuitLibrary/4073/3_and.cir
diff --git a/src/SubcircuitLibrary/4073/3_and.cir.out b/library/SubcircuitLibrary/4073/3_and.cir.out
index d7cf79a0..d7cf79a0 100644
--- a/src/SubcircuitLibrary/4073/3_and.cir.out
+++ b/library/SubcircuitLibrary/4073/3_and.cir.out
diff --git a/src/SubcircuitLibrary/4073/3_and.pro b/library/SubcircuitLibrary/4073/3_and.pro
index 76df4655..76df4655 100644
--- a/src/SubcircuitLibrary/4073/3_and.pro
+++ b/library/SubcircuitLibrary/4073/3_and.pro
diff --git a/src/SubcircuitLibrary/4073/3_and.sch b/library/SubcircuitLibrary/4073/3_and.sch
index d6ac89f9..d6ac89f9 100644
--- a/src/SubcircuitLibrary/4073/3_and.sch
+++ b/library/SubcircuitLibrary/4073/3_and.sch
diff --git a/src/SubcircuitLibrary/4073/3_and.sub b/library/SubcircuitLibrary/4073/3_and.sub
index 3d9120bb..3d9120bb 100644
--- a/src/SubcircuitLibrary/4073/3_and.sub
+++ b/library/SubcircuitLibrary/4073/3_and.sub
diff --git a/src/SubcircuitLibrary/4073/3_and_Previous_Values.xml b/library/SubcircuitLibrary/4073/3_and_Previous_Values.xml
index abc5faaa..abc5faaa 100644
--- a/src/SubcircuitLibrary/4073/3_and_Previous_Values.xml
+++ b/library/SubcircuitLibrary/4073/3_and_Previous_Values.xml
diff --git a/src/SubcircuitLibrary/4073/4073-cache.lib b/library/SubcircuitLibrary/4073/4073-cache.lib
index 4ee605a2..4ee605a2 100644
--- a/src/SubcircuitLibrary/4073/4073-cache.lib
+++ b/library/SubcircuitLibrary/4073/4073-cache.lib
diff --git a/src/SubcircuitLibrary/4073/4073.cir b/library/SubcircuitLibrary/4073/4073.cir
index e159f055..e159f055 100644
--- a/src/SubcircuitLibrary/4073/4073.cir
+++ b/library/SubcircuitLibrary/4073/4073.cir
diff --git a/src/SubcircuitLibrary/4073/4073.cir.out b/library/SubcircuitLibrary/4073/4073.cir.out
index b25337cd..b25337cd 100644
--- a/src/SubcircuitLibrary/4073/4073.cir.out
+++ b/library/SubcircuitLibrary/4073/4073.cir.out
diff --git a/src/SubcircuitLibrary/4073/4073.pro b/library/SubcircuitLibrary/4073/4073.pro
index 94cd9bd4..94cd9bd4 100644
--- a/src/SubcircuitLibrary/4073/4073.pro
+++ b/library/SubcircuitLibrary/4073/4073.pro
diff --git a/src/SubcircuitLibrary/4073/4073.sch b/library/SubcircuitLibrary/4073/4073.sch
index 045208e6..045208e6 100644
--- a/src/SubcircuitLibrary/4073/4073.sch
+++ b/library/SubcircuitLibrary/4073/4073.sch
diff --git a/src/SubcircuitLibrary/4073/4073.sub b/library/SubcircuitLibrary/4073/4073.sub
index 15208169..15208169 100644
--- a/src/SubcircuitLibrary/4073/4073.sub
+++ b/library/SubcircuitLibrary/4073/4073.sub
diff --git a/src/SubcircuitLibrary/4073/4073_Previous_Values.xml b/library/SubcircuitLibrary/4073/4073_Previous_Values.xml
index 5acac768..5acac768 100644
--- a/src/SubcircuitLibrary/4073/4073_Previous_Values.xml
+++ b/library/SubcircuitLibrary/4073/4073_Previous_Values.xml
diff --git a/src/SubcircuitLibrary/4025/analysis b/library/SubcircuitLibrary/4073/analysis
index ebd5c0a9..ebd5c0a9 100644
--- a/src/SubcircuitLibrary/4025/analysis
+++ b/library/SubcircuitLibrary/4073/analysis
diff --git a/src/SubcircuitLibrary/4_OR/4_OR-cache.lib b/library/SubcircuitLibrary/4_OR/4_OR-cache.lib
index 155f5e60..155f5e60 100644
--- a/src/SubcircuitLibrary/4_OR/4_OR-cache.lib
+++ b/library/SubcircuitLibrary/4_OR/4_OR-cache.lib
diff --git a/src/SubcircuitLibrary/4_OR/4_OR.cir b/library/SubcircuitLibrary/4_OR/4_OR.cir
index b338b7b5..b338b7b5 100644
--- a/src/SubcircuitLibrary/4_OR/4_OR.cir
+++ b/library/SubcircuitLibrary/4_OR/4_OR.cir
diff --git a/src/SubcircuitLibrary/4_OR/4_OR.cir.out b/library/SubcircuitLibrary/4_OR/4_OR.cir.out
index adb6b01b..adb6b01b 100644
--- a/src/SubcircuitLibrary/4_OR/4_OR.cir.out
+++ b/library/SubcircuitLibrary/4_OR/4_OR.cir.out
diff --git a/src/SubcircuitLibrary/4_OR/4_OR.pro b/library/SubcircuitLibrary/4_OR/4_OR.pro
index 9daf26bc..9daf26bc 100644
--- a/src/SubcircuitLibrary/4_OR/4_OR.pro
+++ b/library/SubcircuitLibrary/4_OR/4_OR.pro
diff --git a/src/SubcircuitLibrary/4_OR/4_OR.sch b/library/SubcircuitLibrary/4_OR/4_OR.sch
index 11896865..11896865 100644
--- a/src/SubcircuitLibrary/4_OR/4_OR.sch
+++ b/library/SubcircuitLibrary/4_OR/4_OR.sch
diff --git a/src/SubcircuitLibrary/4_OR/4_OR.sub b/library/SubcircuitLibrary/4_OR/4_OR.sub
index d1fd3a24..d1fd3a24 100644
--- a/src/SubcircuitLibrary/4_OR/4_OR.sub
+++ b/library/SubcircuitLibrary/4_OR/4_OR.sub
diff --git a/src/SubcircuitLibrary/4_OR/4_OR_Previous_Values.xml b/library/SubcircuitLibrary/4_OR/4_OR_Previous_Values.xml
index 0683d9eb..0683d9eb 100644
--- a/src/SubcircuitLibrary/4_OR/4_OR_Previous_Values.xml
+++ b/library/SubcircuitLibrary/4_OR/4_OR_Previous_Values.xml
diff --git a/src/SubcircuitLibrary/4028/analysis b/library/SubcircuitLibrary/4_OR/analysis
index ebd5c0a9..ebd5c0a9 100644
--- a/src/SubcircuitLibrary/4028/analysis
+++ b/library/SubcircuitLibrary/4_OR/analysis
diff --git a/src/SubcircuitLibrary/4_and/3_and-cache.lib b/library/SubcircuitLibrary/4_and/3_and-cache.lib
index af058641..af058641 100644
--- a/src/SubcircuitLibrary/4_and/3_and-cache.lib
+++ b/library/SubcircuitLibrary/4_and/3_and-cache.lib
diff --git a/src/SubcircuitLibrary/4_and/3_and.cir b/library/SubcircuitLibrary/4_and/3_and.cir
index ba296cf0..ba296cf0 100644
--- a/src/SubcircuitLibrary/4_and/3_and.cir
+++ b/library/SubcircuitLibrary/4_and/3_and.cir
diff --git a/src/SubcircuitLibrary/4_and/3_and.cir.out b/library/SubcircuitLibrary/4_and/3_and.cir.out
index d7cf79a0..d7cf79a0 100644
--- a/src/SubcircuitLibrary/4_and/3_and.cir.out
+++ b/library/SubcircuitLibrary/4_and/3_and.cir.out
diff --git a/src/SubcircuitLibrary/4_and/3_and.pro b/library/SubcircuitLibrary/4_and/3_and.pro
index 76df4655..76df4655 100644
--- a/src/SubcircuitLibrary/4_and/3_and.pro
+++ b/library/SubcircuitLibrary/4_and/3_and.pro
diff --git a/src/SubcircuitLibrary/4_and/3_and.sch b/library/SubcircuitLibrary/4_and/3_and.sch
index d6ac89f9..d6ac89f9 100644
--- a/src/SubcircuitLibrary/4_and/3_and.sch
+++ b/library/SubcircuitLibrary/4_and/3_and.sch
diff --git a/src/SubcircuitLibrary/4_and/3_and.sub b/library/SubcircuitLibrary/4_and/3_and.sub
index 3d9120bb..3d9120bb 100644
--- a/src/SubcircuitLibrary/4_and/3_and.sub
+++ b/library/SubcircuitLibrary/4_and/3_and.sub
diff --git a/src/SubcircuitLibrary/4_and/3_and_Previous_Values.xml b/library/SubcircuitLibrary/4_and/3_and_Previous_Values.xml
index abc5faaa..abc5faaa 100644
--- a/src/SubcircuitLibrary/4_and/3_and_Previous_Values.xml
+++ b/library/SubcircuitLibrary/4_and/3_and_Previous_Values.xml
diff --git a/src/SubcircuitLibrary/4_and/4_and-cache.lib b/library/SubcircuitLibrary/4_and/4_and-cache.lib
index 60f1a83d..60f1a83d 100644
--- a/src/SubcircuitLibrary/4_and/4_and-cache.lib
+++ b/library/SubcircuitLibrary/4_and/4_and-cache.lib
diff --git a/src/SubcircuitLibrary/4_and/4_and-rescue.lib b/library/SubcircuitLibrary/4_and/4_and-rescue.lib
index e3833051..e3833051 100644
--- a/src/SubcircuitLibrary/4_and/4_and-rescue.lib
+++ b/library/SubcircuitLibrary/4_and/4_and-rescue.lib
diff --git a/src/SubcircuitLibrary/4_and/4_and.cir b/library/SubcircuitLibrary/4_and/4_and.cir
index fdf2e107..fdf2e107 100644
--- a/src/SubcircuitLibrary/4_and/4_and.cir
+++ b/library/SubcircuitLibrary/4_and/4_and.cir
diff --git a/src/SubcircuitLibrary/4_and/4_and.cir.out b/library/SubcircuitLibrary/4_and/4_and.cir.out
index f40e5bc6..f40e5bc6 100644
--- a/src/SubcircuitLibrary/4_and/4_and.cir.out
+++ b/library/SubcircuitLibrary/4_and/4_and.cir.out
diff --git a/src/SubcircuitLibrary/4_and/4_and.pro b/library/SubcircuitLibrary/4_and/4_and.pro
index 9c0be79e..9c0be79e 100644
--- a/src/SubcircuitLibrary/4_and/4_and.pro
+++ b/library/SubcircuitLibrary/4_and/4_and.pro
diff --git a/src/SubcircuitLibrary/4_and/4_and.sch b/library/SubcircuitLibrary/4_and/4_and.sch
index f5e8febd..f5e8febd 100644
--- a/src/SubcircuitLibrary/4_and/4_and.sch
+++ b/library/SubcircuitLibrary/4_and/4_and.sch
diff --git a/src/SubcircuitLibrary/4_and/4_and.sub b/library/SubcircuitLibrary/4_and/4_and.sub
index 8663f37e..8663f37e 100644
--- a/src/SubcircuitLibrary/4_and/4_and.sub
+++ b/library/SubcircuitLibrary/4_and/4_and.sub
diff --git a/src/SubcircuitLibrary/4_and/4_and_Previous_Values.xml b/library/SubcircuitLibrary/4_and/4_and_Previous_Values.xml
index f2ba0130..f2ba0130 100644
--- a/src/SubcircuitLibrary/4_and/4_and_Previous_Values.xml
+++ b/library/SubcircuitLibrary/4_and/4_and_Previous_Values.xml
diff --git a/src/SubcircuitLibrary/4072/analysis b/library/SubcircuitLibrary/4_and/analysis
index ebd5c0a9..ebd5c0a9 100644
--- a/src/SubcircuitLibrary/4072/analysis
+++ b/library/SubcircuitLibrary/4_and/analysis
diff --git a/src/SubcircuitLibrary/4to16_demux/3_and-cache.lib b/library/SubcircuitLibrary/4to16_demux/3_and-cache.lib
index af058641..af058641 100644
--- a/src/SubcircuitLibrary/4to16_demux/3_and-cache.lib
+++ b/library/SubcircuitLibrary/4to16_demux/3_and-cache.lib
diff --git a/src/SubcircuitLibrary/4to16_demux/3_and.cir b/library/SubcircuitLibrary/4to16_demux/3_and.cir
index ba296cf0..ba296cf0 100644
--- a/src/SubcircuitLibrary/4to16_demux/3_and.cir
+++ b/library/SubcircuitLibrary/4to16_demux/3_and.cir
diff --git a/src/SubcircuitLibrary/4to16_demux/3_and.cir.out b/library/SubcircuitLibrary/4to16_demux/3_and.cir.out
index d7cf79a0..d7cf79a0 100644
--- a/src/SubcircuitLibrary/4to16_demux/3_and.cir.out
+++ b/library/SubcircuitLibrary/4to16_demux/3_and.cir.out
diff --git a/src/SubcircuitLibrary/4to16_demux/3_and.pro b/library/SubcircuitLibrary/4to16_demux/3_and.pro
index 76df4655..76df4655 100644
--- a/src/SubcircuitLibrary/4to16_demux/3_and.pro
+++ b/library/SubcircuitLibrary/4to16_demux/3_and.pro
diff --git a/src/SubcircuitLibrary/4to16_demux/3_and.sch b/library/SubcircuitLibrary/4to16_demux/3_and.sch
index d6ac89f9..d6ac89f9 100644
--- a/src/SubcircuitLibrary/4to16_demux/3_and.sch
+++ b/library/SubcircuitLibrary/4to16_demux/3_and.sch
diff --git a/src/SubcircuitLibrary/4to16_demux/3_and.sub b/library/SubcircuitLibrary/4to16_demux/3_and.sub
index 3d9120bb..3d9120bb 100644
--- a/src/SubcircuitLibrary/4to16_demux/3_and.sub
+++ b/library/SubcircuitLibrary/4to16_demux/3_and.sub
diff --git a/src/SubcircuitLibrary/4_bit_FA/3_and_Previous_Values.xml b/library/SubcircuitLibrary/4to16_demux/3_and_Previous_Values.xml
index abc5faaa..abc5faaa 100644
--- a/src/SubcircuitLibrary/4_bit_FA/3_and_Previous_Values.xml
+++ b/library/SubcircuitLibrary/4to16_demux/3_and_Previous_Values.xml
diff --git a/src/SubcircuitLibrary/4to16_demux/4to16_demux-cache.lib b/library/SubcircuitLibrary/4to16_demux/4to16_demux-cache.lib
index 898ea926..898ea926 100644
--- a/src/SubcircuitLibrary/4to16_demux/4to16_demux-cache.lib
+++ b/library/SubcircuitLibrary/4to16_demux/4to16_demux-cache.lib
diff --git a/src/SubcircuitLibrary/4to16_demux/4to16_demux.cir b/library/SubcircuitLibrary/4to16_demux/4to16_demux.cir
index c97c2f8b..c97c2f8b 100644
--- a/src/SubcircuitLibrary/4to16_demux/4to16_demux.cir
+++ b/library/SubcircuitLibrary/4to16_demux/4to16_demux.cir
diff --git a/src/SubcircuitLibrary/4to16_demux/4to16_demux.cir.out b/library/SubcircuitLibrary/4to16_demux/4to16_demux.cir.out
index eecdfb06..eecdfb06 100644
--- a/src/SubcircuitLibrary/4to16_demux/4to16_demux.cir.out
+++ b/library/SubcircuitLibrary/4to16_demux/4to16_demux.cir.out
diff --git a/src/SubcircuitLibrary/4to16_demux/4to16_demux.pro b/library/SubcircuitLibrary/4to16_demux/4to16_demux.pro
index 5a167cd9..5a167cd9 100644
--- a/src/SubcircuitLibrary/4to16_demux/4to16_demux.pro
+++ b/library/SubcircuitLibrary/4to16_demux/4to16_demux.pro
diff --git a/src/SubcircuitLibrary/4to16_demux/4to16_demux.sch b/library/SubcircuitLibrary/4to16_demux/4to16_demux.sch
index c9142e27..c9142e27 100644
--- a/src/SubcircuitLibrary/4to16_demux/4to16_demux.sch
+++ b/library/SubcircuitLibrary/4to16_demux/4to16_demux.sch
diff --git a/src/SubcircuitLibrary/4to16_demux/4to16_demux.sub b/library/SubcircuitLibrary/4to16_demux/4to16_demux.sub
index 4f7595da..4f7595da 100644
--- a/src/SubcircuitLibrary/4to16_demux/4to16_demux.sub
+++ b/library/SubcircuitLibrary/4to16_demux/4to16_demux.sub
diff --git a/src/SubcircuitLibrary/4to16_demux/4to16_demux_Previous_Values.xml b/library/SubcircuitLibrary/4to16_demux/4to16_demux_Previous_Values.xml
index 93c6f25a..93c6f25a 100644
--- a/src/SubcircuitLibrary/4to16_demux/4to16_demux_Previous_Values.xml
+++ b/library/SubcircuitLibrary/4to16_demux/4to16_demux_Previous_Values.xml
diff --git a/src/SubcircuitLibrary/4to16_demux/5_and-cache.lib b/library/SubcircuitLibrary/4to16_demux/5_and-cache.lib
index ac396288..ac396288 100644
--- a/src/SubcircuitLibrary/4to16_demux/5_and-cache.lib
+++ b/library/SubcircuitLibrary/4to16_demux/5_and-cache.lib
diff --git a/src/SubcircuitLibrary/4to16_demux/5_and.cir b/library/SubcircuitLibrary/4to16_demux/5_and.cir
index 6a05b9b5..6a05b9b5 100644
--- a/src/SubcircuitLibrary/4to16_demux/5_and.cir
+++ b/library/SubcircuitLibrary/4to16_demux/5_and.cir
diff --git a/src/SubcircuitLibrary/4to16_demux/5_and.cir.out b/library/SubcircuitLibrary/4to16_demux/5_and.cir.out
index 6a6b126a..6a6b126a 100644
--- a/src/SubcircuitLibrary/4to16_demux/5_and.cir.out
+++ b/library/SubcircuitLibrary/4to16_demux/5_and.cir.out
diff --git a/src/SubcircuitLibrary/4to16_demux/5_and.pro b/library/SubcircuitLibrary/4to16_demux/5_and.pro
index 7a2f090e..7a2f090e 100644
--- a/src/SubcircuitLibrary/4to16_demux/5_and.pro
+++ b/library/SubcircuitLibrary/4to16_demux/5_and.pro
diff --git a/src/SubcircuitLibrary/4to16_demux/5_and.sch b/library/SubcircuitLibrary/4to16_demux/5_and.sch
index e9eb58ee..e9eb58ee 100644
--- a/src/SubcircuitLibrary/4to16_demux/5_and.sch
+++ b/library/SubcircuitLibrary/4to16_demux/5_and.sch
diff --git a/src/SubcircuitLibrary/4to16_demux/5_and.sub b/library/SubcircuitLibrary/4to16_demux/5_and.sub
index 35b10e17..35b10e17 100644
--- a/src/SubcircuitLibrary/4to16_demux/5_and.sub
+++ b/library/SubcircuitLibrary/4to16_demux/5_and.sub
diff --git a/src/SubcircuitLibrary/4to16_demux/5_and_Previous_Values.xml b/library/SubcircuitLibrary/4to16_demux/5_and_Previous_Values.xml
index ae2c08a7..ae2c08a7 100644
--- a/src/SubcircuitLibrary/4to16_demux/5_and_Previous_Values.xml
+++ b/library/SubcircuitLibrary/4to16_demux/5_and_Previous_Values.xml
diff --git a/src/SubcircuitLibrary/4to16_demux/5_nand-cache.lib b/library/SubcircuitLibrary/4to16_demux/5_nand-cache.lib
index cb517be1..cb517be1 100644
--- a/src/SubcircuitLibrary/4to16_demux/5_nand-cache.lib
+++ b/library/SubcircuitLibrary/4to16_demux/5_nand-cache.lib
diff --git a/src/SubcircuitLibrary/4to16_demux/5_nand.cir b/library/SubcircuitLibrary/4to16_demux/5_nand.cir
index e833d0f4..e833d0f4 100644
--- a/src/SubcircuitLibrary/4to16_demux/5_nand.cir
+++ b/library/SubcircuitLibrary/4to16_demux/5_nand.cir
diff --git a/src/SubcircuitLibrary/4to16_demux/5_nand.cir.out b/library/SubcircuitLibrary/4to16_demux/5_nand.cir.out
index 164de911..164de911 100644
--- a/src/SubcircuitLibrary/4to16_demux/5_nand.cir.out
+++ b/library/SubcircuitLibrary/4to16_demux/5_nand.cir.out
diff --git a/src/SubcircuitLibrary/4to16_demux/5_nand.pro b/library/SubcircuitLibrary/4to16_demux/5_nand.pro
index b7d23f44..b7d23f44 100644
--- a/src/SubcircuitLibrary/4to16_demux/5_nand.pro
+++ b/library/SubcircuitLibrary/4to16_demux/5_nand.pro
diff --git a/src/SubcircuitLibrary/4to16_demux/5_nand.sch b/library/SubcircuitLibrary/4to16_demux/5_nand.sch
index 86379b08..86379b08 100644
--- a/src/SubcircuitLibrary/4to16_demux/5_nand.sch
+++ b/library/SubcircuitLibrary/4to16_demux/5_nand.sch
diff --git a/src/SubcircuitLibrary/4to16_demux/5_nand.sub b/library/SubcircuitLibrary/4to16_demux/5_nand.sub
index c3e041fa..c3e041fa 100644
--- a/src/SubcircuitLibrary/4to16_demux/5_nand.sub
+++ b/library/SubcircuitLibrary/4to16_demux/5_nand.sub
diff --git a/src/SubcircuitLibrary/4to16_demux/5_nand_Previous_Values.xml b/library/SubcircuitLibrary/4to16_demux/5_nand_Previous_Values.xml
index c4b4cde2..c4b4cde2 100644
--- a/src/SubcircuitLibrary/4to16_demux/5_nand_Previous_Values.xml
+++ b/library/SubcircuitLibrary/4to16_demux/5_nand_Previous_Values.xml
diff --git a/src/SubcircuitLibrary/4073/analysis b/library/SubcircuitLibrary/4to16_demux/analysis
index ebd5c0a9..ebd5c0a9 100644
--- a/src/SubcircuitLibrary/4073/analysis
+++ b/library/SubcircuitLibrary/4to16_demux/analysis
diff --git a/src/SubcircuitLibrary/556/556-cache.lib b/library/SubcircuitLibrary/556/556-cache.lib
index 75d610da..75d610da 100644
--- a/src/SubcircuitLibrary/556/556-cache.lib
+++ b/library/SubcircuitLibrary/556/556-cache.lib
diff --git a/src/SubcircuitLibrary/556/556.cir b/library/SubcircuitLibrary/556/556.cir
index 48baa73e..48baa73e 100644
--- a/src/SubcircuitLibrary/556/556.cir
+++ b/library/SubcircuitLibrary/556/556.cir
diff --git a/src/SubcircuitLibrary/556/556.cir.out b/library/SubcircuitLibrary/556/556.cir.out
index c74aab7c..c74aab7c 100644
--- a/src/SubcircuitLibrary/556/556.cir.out
+++ b/library/SubcircuitLibrary/556/556.cir.out
diff --git a/src/SubcircuitLibrary/556/556.pro b/library/SubcircuitLibrary/556/556.pro
index a165313d..a165313d 100644
--- a/src/SubcircuitLibrary/556/556.pro
+++ b/library/SubcircuitLibrary/556/556.pro
diff --git a/src/SubcircuitLibrary/556/556.sch b/library/SubcircuitLibrary/556/556.sch
index af4e1bc9..af4e1bc9 100644
--- a/src/SubcircuitLibrary/556/556.sch
+++ b/library/SubcircuitLibrary/556/556.sch
diff --git a/src/SubcircuitLibrary/556/556.sub b/library/SubcircuitLibrary/556/556.sub
index a370b703..a370b703 100644
--- a/src/SubcircuitLibrary/556/556.sub
+++ b/library/SubcircuitLibrary/556/556.sub
diff --git a/src/SubcircuitLibrary/556/556_Previous_Values.xml b/library/SubcircuitLibrary/556/556_Previous_Values.xml
index c025c2d1..c025c2d1 100644
--- a/src/SubcircuitLibrary/556/556_Previous_Values.xml
+++ b/library/SubcircuitLibrary/556/556_Previous_Values.xml
diff --git a/src/SubcircuitLibrary/5_and/3_and-cache.lib b/library/SubcircuitLibrary/5_and/3_and-cache.lib
index af058641..af058641 100644
--- a/src/SubcircuitLibrary/5_and/3_and-cache.lib
+++ b/library/SubcircuitLibrary/5_and/3_and-cache.lib
diff --git a/src/SubcircuitLibrary/5_and/3_and.cir b/library/SubcircuitLibrary/5_and/3_and.cir
index ba296cf0..ba296cf0 100644
--- a/src/SubcircuitLibrary/5_and/3_and.cir
+++ b/library/SubcircuitLibrary/5_and/3_and.cir
diff --git a/src/SubcircuitLibrary/5_and/3_and.cir.out b/library/SubcircuitLibrary/5_and/3_and.cir.out
index d7cf79a0..d7cf79a0 100644
--- a/src/SubcircuitLibrary/5_and/3_and.cir.out
+++ b/library/SubcircuitLibrary/5_and/3_and.cir.out
diff --git a/src/SubcircuitLibrary/5_and/3_and.pro b/library/SubcircuitLibrary/5_and/3_and.pro
index 76df4655..76df4655 100644
--- a/src/SubcircuitLibrary/5_and/3_and.pro
+++ b/library/SubcircuitLibrary/5_and/3_and.pro
diff --git a/src/SubcircuitLibrary/5_and/3_and.sch b/library/SubcircuitLibrary/5_and/3_and.sch
index d6ac89f9..d6ac89f9 100644
--- a/src/SubcircuitLibrary/5_and/3_and.sch
+++ b/library/SubcircuitLibrary/5_and/3_and.sch
diff --git a/src/SubcircuitLibrary/5_and/3_and.sub b/library/SubcircuitLibrary/5_and/3_and.sub
index 3d9120bb..3d9120bb 100644
--- a/src/SubcircuitLibrary/5_and/3_and.sub
+++ b/library/SubcircuitLibrary/5_and/3_and.sub
diff --git a/src/SubcircuitLibrary/4to16_demux/3_and_Previous_Values.xml b/library/SubcircuitLibrary/5_and/3_and_Previous_Values.xml
index abc5faaa..abc5faaa 100644
--- a/src/SubcircuitLibrary/4to16_demux/3_and_Previous_Values.xml
+++ b/library/SubcircuitLibrary/5_and/3_and_Previous_Values.xml
diff --git a/src/SubcircuitLibrary/5_and/5_and-cache.lib b/library/SubcircuitLibrary/5_and/5_and-cache.lib
index ac396288..ac396288 100644
--- a/src/SubcircuitLibrary/5_and/5_and-cache.lib
+++ b/library/SubcircuitLibrary/5_and/5_and-cache.lib
diff --git a/src/SubcircuitLibrary/5_and/5_and.cir b/library/SubcircuitLibrary/5_and/5_and.cir
index 6a05b9b5..6a05b9b5 100644
--- a/src/SubcircuitLibrary/5_and/5_and.cir
+++ b/library/SubcircuitLibrary/5_and/5_and.cir
diff --git a/src/SubcircuitLibrary/5_and/5_and.cir.out b/library/SubcircuitLibrary/5_and/5_and.cir.out
index 6a6b126a..6a6b126a 100644
--- a/src/SubcircuitLibrary/5_and/5_and.cir.out
+++ b/library/SubcircuitLibrary/5_and/5_and.cir.out
diff --git a/src/SubcircuitLibrary/5_and/5_and.pro b/library/SubcircuitLibrary/5_and/5_and.pro
index 7a2f090e..7a2f090e 100644
--- a/src/SubcircuitLibrary/5_and/5_and.pro
+++ b/library/SubcircuitLibrary/5_and/5_and.pro
diff --git a/src/SubcircuitLibrary/5_and/5_and.sch b/library/SubcircuitLibrary/5_and/5_and.sch
index e9eb58ee..e9eb58ee 100644
--- a/src/SubcircuitLibrary/5_and/5_and.sch
+++ b/library/SubcircuitLibrary/5_and/5_and.sch
diff --git a/src/SubcircuitLibrary/5_and/5_and.sub b/library/SubcircuitLibrary/5_and/5_and.sub
index 35b10e17..35b10e17 100644
--- a/src/SubcircuitLibrary/5_and/5_and.sub
+++ b/library/SubcircuitLibrary/5_and/5_and.sub
diff --git a/src/SubcircuitLibrary/5_and/5_and_Previous_Values.xml b/library/SubcircuitLibrary/5_and/5_and_Previous_Values.xml
index ae2c08a7..ae2c08a7 100644
--- a/src/SubcircuitLibrary/5_and/5_and_Previous_Values.xml
+++ b/library/SubcircuitLibrary/5_and/5_and_Previous_Values.xml
diff --git a/src/SubcircuitLibrary/4_OR/analysis b/library/SubcircuitLibrary/5_and/analysis
index ebd5c0a9..ebd5c0a9 100644
--- a/src/SubcircuitLibrary/4_OR/analysis
+++ b/library/SubcircuitLibrary/5_and/analysis
diff --git a/src/SubcircuitLibrary/74153/3_and-cache.lib b/library/SubcircuitLibrary/74153/3_and-cache.lib
index af058641..af058641 100644
--- a/src/SubcircuitLibrary/74153/3_and-cache.lib
+++ b/library/SubcircuitLibrary/74153/3_and-cache.lib
diff --git a/src/SubcircuitLibrary/74153/3_and.cir b/library/SubcircuitLibrary/74153/3_and.cir
index ba296cf0..ba296cf0 100644
--- a/src/SubcircuitLibrary/74153/3_and.cir
+++ b/library/SubcircuitLibrary/74153/3_and.cir
diff --git a/src/SubcircuitLibrary/74153/3_and.cir.out b/library/SubcircuitLibrary/74153/3_and.cir.out
index d7cf79a0..d7cf79a0 100644
--- a/src/SubcircuitLibrary/74153/3_and.cir.out
+++ b/library/SubcircuitLibrary/74153/3_and.cir.out
diff --git a/src/SubcircuitLibrary/74153/3_and.pro b/library/SubcircuitLibrary/74153/3_and.pro
index 2c9ac554..2c9ac554 100644
--- a/src/SubcircuitLibrary/74153/3_and.pro
+++ b/library/SubcircuitLibrary/74153/3_and.pro
diff --git a/src/SubcircuitLibrary/74153/3_and.sch b/library/SubcircuitLibrary/74153/3_and.sch
index 86be0215..86be0215 100644
--- a/src/SubcircuitLibrary/74153/3_and.sch
+++ b/library/SubcircuitLibrary/74153/3_and.sch
diff --git a/src/SubcircuitLibrary/74153/3_and.sub b/library/SubcircuitLibrary/74153/3_and.sub
index 3d9120bb..3d9120bb 100644
--- a/src/SubcircuitLibrary/74153/3_and.sub
+++ b/library/SubcircuitLibrary/74153/3_and.sub
diff --git a/src/SubcircuitLibrary/5_and/3_and_Previous_Values.xml b/library/SubcircuitLibrary/74153/3_and_Previous_Values.xml
index abc5faaa..abc5faaa 100644
--- a/src/SubcircuitLibrary/5_and/3_and_Previous_Values.xml
+++ b/library/SubcircuitLibrary/74153/3_and_Previous_Values.xml
diff --git a/src/SubcircuitLibrary/74153/4_OR-cache.lib b/library/SubcircuitLibrary/74153/4_OR-cache.lib
index 155f5e60..155f5e60 100644
--- a/src/SubcircuitLibrary/74153/4_OR-cache.lib
+++ b/library/SubcircuitLibrary/74153/4_OR-cache.lib
diff --git a/src/SubcircuitLibrary/74153/4_OR.cir b/library/SubcircuitLibrary/74153/4_OR.cir
index b338b7b5..b338b7b5 100644
--- a/src/SubcircuitLibrary/74153/4_OR.cir
+++ b/library/SubcircuitLibrary/74153/4_OR.cir
diff --git a/src/SubcircuitLibrary/74153/4_OR.cir.out b/library/SubcircuitLibrary/74153/4_OR.cir.out
index adb6b01b..adb6b01b 100644
--- a/src/SubcircuitLibrary/74153/4_OR.cir.out
+++ b/library/SubcircuitLibrary/74153/4_OR.cir.out
diff --git a/src/SubcircuitLibrary/74153/4_OR.pro b/library/SubcircuitLibrary/74153/4_OR.pro
index 2c258cec..2c258cec 100644
--- a/src/SubcircuitLibrary/74153/4_OR.pro
+++ b/library/SubcircuitLibrary/74153/4_OR.pro
diff --git a/src/SubcircuitLibrary/74153/4_OR.sch b/library/SubcircuitLibrary/74153/4_OR.sch
index 11896865..11896865 100644
--- a/src/SubcircuitLibrary/74153/4_OR.sch
+++ b/library/SubcircuitLibrary/74153/4_OR.sch
diff --git a/src/SubcircuitLibrary/74153/4_OR.sub b/library/SubcircuitLibrary/74153/4_OR.sub
index d1fd3a24..d1fd3a24 100644
--- a/src/SubcircuitLibrary/74153/4_OR.sub
+++ b/library/SubcircuitLibrary/74153/4_OR.sub
diff --git a/src/SubcircuitLibrary/4_bit_FA/4_OR_Previous_Values.xml b/library/SubcircuitLibrary/74153/4_OR_Previous_Values.xml
index 23698d37..23698d37 100644
--- a/src/SubcircuitLibrary/4_bit_FA/4_OR_Previous_Values.xml
+++ b/library/SubcircuitLibrary/74153/4_OR_Previous_Values.xml
diff --git a/src/SubcircuitLibrary/74153/4_and-cache.lib b/library/SubcircuitLibrary/74153/4_and-cache.lib
index ac396288..ac396288 100644
--- a/src/SubcircuitLibrary/74153/4_and-cache.lib
+++ b/library/SubcircuitLibrary/74153/4_and-cache.lib
diff --git a/src/SubcircuitLibrary/74153/4_and.cir b/library/SubcircuitLibrary/74153/4_and.cir
index 50d490fa..50d490fa 100644
--- a/src/SubcircuitLibrary/74153/4_and.cir
+++ b/library/SubcircuitLibrary/74153/4_and.cir
diff --git a/src/SubcircuitLibrary/74153/4_and.cir.out b/library/SubcircuitLibrary/74153/4_and.cir.out
index f40e5bc6..f40e5bc6 100644
--- a/src/SubcircuitLibrary/74153/4_and.cir.out
+++ b/library/SubcircuitLibrary/74153/4_and.cir.out
diff --git a/src/SubcircuitLibrary/74153/4_and.pro b/library/SubcircuitLibrary/74153/4_and.pro
index 6eb77fff..6eb77fff 100644
--- a/src/SubcircuitLibrary/74153/4_and.pro
+++ b/library/SubcircuitLibrary/74153/4_and.pro
diff --git a/src/SubcircuitLibrary/74153/4_and.sch b/library/SubcircuitLibrary/74153/4_and.sch
index 883458e1..883458e1 100644
--- a/src/SubcircuitLibrary/74153/4_and.sch
+++ b/library/SubcircuitLibrary/74153/4_and.sch
diff --git a/src/SubcircuitLibrary/74153/4_and.sub b/library/SubcircuitLibrary/74153/4_and.sub
index 8663f37e..8663f37e 100644
--- a/src/SubcircuitLibrary/74153/4_and.sub
+++ b/library/SubcircuitLibrary/74153/4_and.sub
diff --git a/src/SubcircuitLibrary/4_bit_FA/4_and_Previous_Values.xml b/library/SubcircuitLibrary/74153/4_and_Previous_Values.xml
index f2ba0130..f2ba0130 100644
--- a/src/SubcircuitLibrary/4_bit_FA/4_and_Previous_Values.xml
+++ b/library/SubcircuitLibrary/74153/4_and_Previous_Values.xml
diff --git a/src/SubcircuitLibrary/74153/74153-cache.lib b/library/SubcircuitLibrary/74153/74153-cache.lib
index 1e85854e..1e85854e 100644
--- a/src/SubcircuitLibrary/74153/74153-cache.lib
+++ b/library/SubcircuitLibrary/74153/74153-cache.lib
diff --git a/src/SubcircuitLibrary/74153/74153.cir b/library/SubcircuitLibrary/74153/74153.cir
index b20e6858..b20e6858 100644
--- a/src/SubcircuitLibrary/74153/74153.cir
+++ b/library/SubcircuitLibrary/74153/74153.cir
diff --git a/src/SubcircuitLibrary/74153/74153.cir.out b/library/SubcircuitLibrary/74153/74153.cir.out
index c95e5ad9..c95e5ad9 100644
--- a/src/SubcircuitLibrary/74153/74153.cir.out
+++ b/library/SubcircuitLibrary/74153/74153.cir.out
diff --git a/src/SubcircuitLibrary/74153/74153.pro b/library/SubcircuitLibrary/74153/74153.pro
index ed8b8bf2..ed8b8bf2 100644
--- a/src/SubcircuitLibrary/74153/74153.pro
+++ b/library/SubcircuitLibrary/74153/74153.pro
diff --git a/src/SubcircuitLibrary/74153/74153.sch b/library/SubcircuitLibrary/74153/74153.sch
index e0bcf950..e0bcf950 100644
--- a/src/SubcircuitLibrary/74153/74153.sch
+++ b/library/SubcircuitLibrary/74153/74153.sch
diff --git a/src/SubcircuitLibrary/74153/74153.sub b/library/SubcircuitLibrary/74153/74153.sub
index 6e00261f..6e00261f 100644
--- a/src/SubcircuitLibrary/74153/74153.sub
+++ b/library/SubcircuitLibrary/74153/74153.sub
diff --git a/src/SubcircuitLibrary/74153/74153_Previous_Values.xml b/library/SubcircuitLibrary/74153/74153_Previous_Values.xml
index ea70e6f3..ea70e6f3 100644
--- a/src/SubcircuitLibrary/74153/74153_Previous_Values.xml
+++ b/library/SubcircuitLibrary/74153/74153_Previous_Values.xml
diff --git a/src/SubcircuitLibrary/74153/Dual4to1MUX-cache.lib b/library/SubcircuitLibrary/74153/Dual4to1MUX-cache.lib
index 10496d63..10496d63 100644
--- a/src/SubcircuitLibrary/74153/Dual4to1MUX-cache.lib
+++ b/library/SubcircuitLibrary/74153/Dual4to1MUX-cache.lib
diff --git a/src/SubcircuitLibrary/74153/Dual4to1MUX.cir b/library/SubcircuitLibrary/74153/Dual4to1MUX.cir
index 583c4a00..583c4a00 100644
--- a/src/SubcircuitLibrary/74153/Dual4to1MUX.cir
+++ b/library/SubcircuitLibrary/74153/Dual4to1MUX.cir
diff --git a/src/SubcircuitLibrary/74153/Dual4to1MUX.sch b/library/SubcircuitLibrary/74153/Dual4to1MUX.sch
index 340b1a31..340b1a31 100644
--- a/src/SubcircuitLibrary/74153/Dual4to1MUX.sch
+++ b/library/SubcircuitLibrary/74153/Dual4to1MUX.sch
diff --git a/src/SubcircuitLibrary/4_and/analysis b/library/SubcircuitLibrary/74153/analysis
index ebd5c0a9..ebd5c0a9 100644
--- a/src/SubcircuitLibrary/4_and/analysis
+++ b/library/SubcircuitLibrary/74153/analysis
diff --git a/src/SubcircuitLibrary/74157/3_and-cache.lib b/library/SubcircuitLibrary/74157/3_and-cache.lib
index af058641..af058641 100644
--- a/src/SubcircuitLibrary/74157/3_and-cache.lib
+++ b/library/SubcircuitLibrary/74157/3_and-cache.lib
diff --git a/src/SubcircuitLibrary/74157/3_and.cir b/library/SubcircuitLibrary/74157/3_and.cir
index ba296cf0..ba296cf0 100644
--- a/src/SubcircuitLibrary/74157/3_and.cir
+++ b/library/SubcircuitLibrary/74157/3_and.cir
diff --git a/src/SubcircuitLibrary/74157/3_and.cir.out b/library/SubcircuitLibrary/74157/3_and.cir.out
index d7cf79a0..d7cf79a0 100644
--- a/src/SubcircuitLibrary/74157/3_and.cir.out
+++ b/library/SubcircuitLibrary/74157/3_and.cir.out
diff --git a/src/SubcircuitLibrary/74157/3_and.pro b/library/SubcircuitLibrary/74157/3_and.pro
index 2c9ac554..2c9ac554 100644
--- a/src/SubcircuitLibrary/74157/3_and.pro
+++ b/library/SubcircuitLibrary/74157/3_and.pro
diff --git a/src/SubcircuitLibrary/74157/3_and.sch b/library/SubcircuitLibrary/74157/3_and.sch
index 86be0215..86be0215 100644
--- a/src/SubcircuitLibrary/74157/3_and.sch
+++ b/library/SubcircuitLibrary/74157/3_and.sch
diff --git a/src/SubcircuitLibrary/74157/3_and.sub b/library/SubcircuitLibrary/74157/3_and.sub
index 3d9120bb..3d9120bb 100644
--- a/src/SubcircuitLibrary/74157/3_and.sub
+++ b/library/SubcircuitLibrary/74157/3_and.sub
diff --git a/src/SubcircuitLibrary/5_nand/3_and_Previous_Values.xml b/library/SubcircuitLibrary/74157/3_and_Previous_Values.xml
index abc5faaa..abc5faaa 100644
--- a/src/SubcircuitLibrary/5_nand/3_and_Previous_Values.xml
+++ b/library/SubcircuitLibrary/74157/3_and_Previous_Values.xml
diff --git a/src/SubcircuitLibrary/74157/74157-cache.lib b/library/SubcircuitLibrary/74157/74157-cache.lib
index de171255..de171255 100644
--- a/src/SubcircuitLibrary/74157/74157-cache.lib
+++ b/library/SubcircuitLibrary/74157/74157-cache.lib
diff --git a/src/SubcircuitLibrary/74157/74157.cir b/library/SubcircuitLibrary/74157/74157.cir
index 6920161c..6920161c 100644
--- a/src/SubcircuitLibrary/74157/74157.cir
+++ b/library/SubcircuitLibrary/74157/74157.cir
diff --git a/src/SubcircuitLibrary/74157/74157.cir.out b/library/SubcircuitLibrary/74157/74157.cir.out
index 3a11a42d..3a11a42d 100644
--- a/src/SubcircuitLibrary/74157/74157.cir.out
+++ b/library/SubcircuitLibrary/74157/74157.cir.out
diff --git a/src/SubcircuitLibrary/74157/74157.pro b/library/SubcircuitLibrary/74157/74157.pro
index fcbb1fc8..fcbb1fc8 100644
--- a/src/SubcircuitLibrary/74157/74157.pro
+++ b/library/SubcircuitLibrary/74157/74157.pro
diff --git a/src/SubcircuitLibrary/74157/74157.sch b/library/SubcircuitLibrary/74157/74157.sch
index 7fd3609e..7fd3609e 100644
--- a/src/SubcircuitLibrary/74157/74157.sch
+++ b/library/SubcircuitLibrary/74157/74157.sch
diff --git a/src/SubcircuitLibrary/74157/74157.sub b/library/SubcircuitLibrary/74157/74157.sub
index 545741f5..545741f5 100644
--- a/src/SubcircuitLibrary/74157/74157.sub
+++ b/library/SubcircuitLibrary/74157/74157.sub
diff --git a/src/SubcircuitLibrary/74157/74157_Previous_Values.xml b/library/SubcircuitLibrary/74157/74157_Previous_Values.xml
index 85f14960..85f14960 100644
--- a/src/SubcircuitLibrary/74157/74157_Previous_Values.xml
+++ b/library/SubcircuitLibrary/74157/74157_Previous_Values.xml
diff --git a/src/SubcircuitLibrary/4_bit_FA/analysis b/library/SubcircuitLibrary/74157/analysis
index ebd5c0a9..ebd5c0a9 100644
--- a/src/SubcircuitLibrary/4_bit_FA/analysis
+++ b/library/SubcircuitLibrary/74157/analysis
diff --git a/src/SubcircuitLibrary/7485/3_and-cache.lib b/library/SubcircuitLibrary/7485/3_and-cache.lib
index af058641..af058641 100644
--- a/src/SubcircuitLibrary/7485/3_and-cache.lib
+++ b/library/SubcircuitLibrary/7485/3_and-cache.lib
diff --git a/src/SubcircuitLibrary/7485/3_and.cir b/library/SubcircuitLibrary/7485/3_and.cir
index ba296cf0..ba296cf0 100644
--- a/src/SubcircuitLibrary/7485/3_and.cir
+++ b/library/SubcircuitLibrary/7485/3_and.cir
diff --git a/src/SubcircuitLibrary/7485/3_and.cir.out b/library/SubcircuitLibrary/7485/3_and.cir.out
index d7cf79a0..d7cf79a0 100644
--- a/src/SubcircuitLibrary/7485/3_and.cir.out
+++ b/library/SubcircuitLibrary/7485/3_and.cir.out
diff --git a/src/SubcircuitLibrary/7485/3_and.pro b/library/SubcircuitLibrary/7485/3_and.pro
index 2c9ac554..2c9ac554 100644
--- a/src/SubcircuitLibrary/7485/3_and.pro
+++ b/library/SubcircuitLibrary/7485/3_and.pro
diff --git a/src/SubcircuitLibrary/7485/3_and.sch b/library/SubcircuitLibrary/7485/3_and.sch
index 86be0215..86be0215 100644
--- a/src/SubcircuitLibrary/7485/3_and.sch
+++ b/library/SubcircuitLibrary/7485/3_and.sch
diff --git a/src/SubcircuitLibrary/7485/3_and.sub b/library/SubcircuitLibrary/7485/3_and.sub
index 3d9120bb..3d9120bb 100644
--- a/src/SubcircuitLibrary/7485/3_and.sub
+++ b/library/SubcircuitLibrary/7485/3_and.sub
diff --git a/src/SubcircuitLibrary/5_nor/3_and_Previous_Values.xml b/library/SubcircuitLibrary/7485/3_and_Previous_Values.xml
index abc5faaa..abc5faaa 100644
--- a/src/SubcircuitLibrary/5_nor/3_and_Previous_Values.xml
+++ b/library/SubcircuitLibrary/7485/3_and_Previous_Values.xml
diff --git a/src/SubcircuitLibrary/7485/4_and-cache.lib b/library/SubcircuitLibrary/7485/4_and-cache.lib
index ac396288..ac396288 100644
--- a/src/SubcircuitLibrary/7485/4_and-cache.lib
+++ b/library/SubcircuitLibrary/7485/4_and-cache.lib
diff --git a/src/SubcircuitLibrary/7485/4_and.cir b/library/SubcircuitLibrary/7485/4_and.cir
index 50d490fa..50d490fa 100644
--- a/src/SubcircuitLibrary/7485/4_and.cir
+++ b/library/SubcircuitLibrary/7485/4_and.cir
diff --git a/src/SubcircuitLibrary/7485/4_and.cir.out b/library/SubcircuitLibrary/7485/4_and.cir.out
index f40e5bc6..f40e5bc6 100644
--- a/src/SubcircuitLibrary/7485/4_and.cir.out
+++ b/library/SubcircuitLibrary/7485/4_and.cir.out
diff --git a/src/SubcircuitLibrary/7485/4_and.pro b/library/SubcircuitLibrary/7485/4_and.pro
index 6eb77fff..6eb77fff 100644
--- a/src/SubcircuitLibrary/7485/4_and.pro
+++ b/library/SubcircuitLibrary/7485/4_and.pro
diff --git a/src/SubcircuitLibrary/7485/4_and.sch b/library/SubcircuitLibrary/7485/4_and.sch
index 883458e1..883458e1 100644
--- a/src/SubcircuitLibrary/7485/4_and.sch
+++ b/library/SubcircuitLibrary/7485/4_and.sch
diff --git a/src/SubcircuitLibrary/7485/4_and.sub b/library/SubcircuitLibrary/7485/4_and.sub
index 8663f37e..8663f37e 100644
--- a/src/SubcircuitLibrary/7485/4_and.sub
+++ b/library/SubcircuitLibrary/7485/4_and.sub
diff --git a/src/SubcircuitLibrary/74153/4_and_Previous_Values.xml b/library/SubcircuitLibrary/7485/4_and_Previous_Values.xml
index f2ba0130..f2ba0130 100644
--- a/src/SubcircuitLibrary/74153/4_and_Previous_Values.xml
+++ b/library/SubcircuitLibrary/7485/4_and_Previous_Values.xml
diff --git a/src/SubcircuitLibrary/7485/5_and-cache.lib b/library/SubcircuitLibrary/7485/5_and-cache.lib
index ac396288..ac396288 100644
--- a/src/SubcircuitLibrary/7485/5_and-cache.lib
+++ b/library/SubcircuitLibrary/7485/5_and-cache.lib
diff --git a/src/SubcircuitLibrary/7485/5_and.cir b/library/SubcircuitLibrary/7485/5_and.cir
index 6a05b9b5..6a05b9b5 100644
--- a/src/SubcircuitLibrary/7485/5_and.cir
+++ b/library/SubcircuitLibrary/7485/5_and.cir
diff --git a/src/SubcircuitLibrary/7485/5_and.cir.out b/library/SubcircuitLibrary/7485/5_and.cir.out
index 6a6b126a..6a6b126a 100644
--- a/src/SubcircuitLibrary/7485/5_and.cir.out
+++ b/library/SubcircuitLibrary/7485/5_and.cir.out
diff --git a/src/SubcircuitLibrary/7485/5_and.pro b/library/SubcircuitLibrary/7485/5_and.pro
index c82e4e6d..c82e4e6d 100644
--- a/src/SubcircuitLibrary/7485/5_and.pro
+++ b/library/SubcircuitLibrary/7485/5_and.pro
diff --git a/src/SubcircuitLibrary/7485/5_and.sch b/library/SubcircuitLibrary/7485/5_and.sch
index da927b09..da927b09 100644
--- a/src/SubcircuitLibrary/7485/5_and.sch
+++ b/library/SubcircuitLibrary/7485/5_and.sch
diff --git a/src/SubcircuitLibrary/7485/5_and.sub b/library/SubcircuitLibrary/7485/5_and.sub
index 35b10e17..35b10e17 100644
--- a/src/SubcircuitLibrary/7485/5_and.sub
+++ b/library/SubcircuitLibrary/7485/5_and.sub
diff --git a/src/SubcircuitLibrary/5_nand/5_and_Previous_Values.xml b/library/SubcircuitLibrary/7485/5_and_Previous_Values.xml
index ae2c08a7..ae2c08a7 100644
--- a/src/SubcircuitLibrary/5_nand/5_and_Previous_Values.xml
+++ b/library/SubcircuitLibrary/7485/5_and_Previous_Values.xml
diff --git a/src/SubcircuitLibrary/7485/7485-cache.lib b/library/SubcircuitLibrary/7485/7485-cache.lib
index 6edb5033..6edb5033 100644
--- a/src/SubcircuitLibrary/7485/7485-cache.lib
+++ b/library/SubcircuitLibrary/7485/7485-cache.lib
diff --git a/src/SubcircuitLibrary/7485/7485.cir b/library/SubcircuitLibrary/7485/7485.cir
index e15a357f..e15a357f 100644
--- a/src/SubcircuitLibrary/7485/7485.cir
+++ b/library/SubcircuitLibrary/7485/7485.cir
diff --git a/src/SubcircuitLibrary/7485/7485.cir.out b/library/SubcircuitLibrary/7485/7485.cir.out
index afc7b865..afc7b865 100644
--- a/src/SubcircuitLibrary/7485/7485.cir.out
+++ b/library/SubcircuitLibrary/7485/7485.cir.out
diff --git a/src/SubcircuitLibrary/7485/7485.pro b/library/SubcircuitLibrary/7485/7485.pro
index 8fb4abb4..8fb4abb4 100644
--- a/src/SubcircuitLibrary/7485/7485.pro
+++ b/library/SubcircuitLibrary/7485/7485.pro
diff --git a/src/SubcircuitLibrary/7485/7485.sch b/library/SubcircuitLibrary/7485/7485.sch
index 0db5f0d6..0db5f0d6 100644
--- a/src/SubcircuitLibrary/7485/7485.sch
+++ b/library/SubcircuitLibrary/7485/7485.sch
diff --git a/src/SubcircuitLibrary/7485/7485.sub b/library/SubcircuitLibrary/7485/7485.sub
index 5a45c57c..5a45c57c 100644
--- a/src/SubcircuitLibrary/7485/7485.sub
+++ b/library/SubcircuitLibrary/7485/7485.sub
diff --git a/src/SubcircuitLibrary/7485/7485_Previous_Values.xml b/library/SubcircuitLibrary/7485/7485_Previous_Values.xml
index 6d8f93b6..6d8f93b6 100644
--- a/src/SubcircuitLibrary/7485/7485_Previous_Values.xml
+++ b/library/SubcircuitLibrary/7485/7485_Previous_Values.xml
diff --git a/src/SubcircuitLibrary/7485/7485mod-cache.lib b/library/SubcircuitLibrary/7485/7485mod-cache.lib
index 6edb5033..6edb5033 100644
--- a/src/SubcircuitLibrary/7485/7485mod-cache.lib
+++ b/library/SubcircuitLibrary/7485/7485mod-cache.lib
diff --git a/src/SubcircuitLibrary/7485/7485mod.sch b/library/SubcircuitLibrary/7485/7485mod.sch
index f7e537ad..f7e537ad 100644
--- a/src/SubcircuitLibrary/7485/7485mod.sch
+++ b/library/SubcircuitLibrary/7485/7485mod.sch
diff --git a/src/SubcircuitLibrary/4to16_demux/analysis b/library/SubcircuitLibrary/7485/analysis
index ebd5c0a9..ebd5c0a9 100644
--- a/src/SubcircuitLibrary/4to16_demux/analysis
+++ b/library/SubcircuitLibrary/7485/analysis
diff --git a/src/SubcircuitLibrary/7485/c_gate-cache.lib b/library/SubcircuitLibrary/7485/c_gate-cache.lib
index 05fb44d7..05fb44d7 100644
--- a/src/SubcircuitLibrary/7485/c_gate-cache.lib
+++ b/library/SubcircuitLibrary/7485/c_gate-cache.lib
diff --git a/src/SubcircuitLibrary/7485/c_gate.cir b/library/SubcircuitLibrary/7485/c_gate.cir
index 1ac12515..1ac12515 100644
--- a/src/SubcircuitLibrary/7485/c_gate.cir
+++ b/library/SubcircuitLibrary/7485/c_gate.cir
diff --git a/src/SubcircuitLibrary/7485/c_gate.cir.out b/library/SubcircuitLibrary/7485/c_gate.cir.out
index db7bb2f8..db7bb2f8 100644
--- a/src/SubcircuitLibrary/7485/c_gate.cir.out
+++ b/library/SubcircuitLibrary/7485/c_gate.cir.out
diff --git a/src/SubcircuitLibrary/7485/c_gate.pro b/library/SubcircuitLibrary/7485/c_gate.pro
index f0743529..f0743529 100644
--- a/src/SubcircuitLibrary/7485/c_gate.pro
+++ b/library/SubcircuitLibrary/7485/c_gate.pro
diff --git a/src/SubcircuitLibrary/7485/c_gate.sch b/library/SubcircuitLibrary/7485/c_gate.sch
index 5d960c8d..5d960c8d 100644
--- a/src/SubcircuitLibrary/7485/c_gate.sch
+++ b/library/SubcircuitLibrary/7485/c_gate.sch
diff --git a/src/SubcircuitLibrary/7485/c_gate.sub b/library/SubcircuitLibrary/7485/c_gate.sub
index c6eaa478..c6eaa478 100644
--- a/src/SubcircuitLibrary/7485/c_gate.sub
+++ b/library/SubcircuitLibrary/7485/c_gate.sub
diff --git a/src/SubcircuitLibrary/7485/c_gate_Previous_Values.xml b/library/SubcircuitLibrary/7485/c_gate_Previous_Values.xml
index e51d62de..e51d62de 100644
--- a/src/SubcircuitLibrary/7485/c_gate_Previous_Values.xml
+++ b/library/SubcircuitLibrary/7485/c_gate_Previous_Values.xml
diff --git a/src/SubcircuitLibrary/INVCMOS/INVCMOS-cache.lib b/library/SubcircuitLibrary/INVCMOS/INVCMOS-cache.lib
index cc25b0c9..cc25b0c9 100644
--- a/src/SubcircuitLibrary/INVCMOS/INVCMOS-cache.lib
+++ b/library/SubcircuitLibrary/INVCMOS/INVCMOS-cache.lib
diff --git a/src/SubcircuitLibrary/INVCMOS/INVCMOS.cir b/library/SubcircuitLibrary/INVCMOS/INVCMOS.cir
index 44f1df81..44f1df81 100644
--- a/src/SubcircuitLibrary/INVCMOS/INVCMOS.cir
+++ b/library/SubcircuitLibrary/INVCMOS/INVCMOS.cir
diff --git a/src/SubcircuitLibrary/INVCMOS/INVCMOS.cir.out b/library/SubcircuitLibrary/INVCMOS/INVCMOS.cir.out
index cb2b6641..cb2b6641 100644
--- a/src/SubcircuitLibrary/INVCMOS/INVCMOS.cir.out
+++ b/library/SubcircuitLibrary/INVCMOS/INVCMOS.cir.out
diff --git a/src/SubcircuitLibrary/INVCMOS/INVCMOS.pro b/library/SubcircuitLibrary/INVCMOS/INVCMOS.pro
index b3f410b6..b3f410b6 100644
--- a/src/SubcircuitLibrary/INVCMOS/INVCMOS.pro
+++ b/library/SubcircuitLibrary/INVCMOS/INVCMOS.pro
diff --git a/src/SubcircuitLibrary/INVCMOS/INVCMOS.sch b/library/SubcircuitLibrary/INVCMOS/INVCMOS.sch
index 13a7fc09..13a7fc09 100644
--- a/src/SubcircuitLibrary/INVCMOS/INVCMOS.sch
+++ b/library/SubcircuitLibrary/INVCMOS/INVCMOS.sch
diff --git a/src/SubcircuitLibrary/INVCMOS/INVCMOS.sub b/library/SubcircuitLibrary/INVCMOS/INVCMOS.sub
index 2319995c..2319995c 100644
--- a/src/SubcircuitLibrary/INVCMOS/INVCMOS.sub
+++ b/library/SubcircuitLibrary/INVCMOS/INVCMOS.sub
diff --git a/src/SubcircuitLibrary/INVCMOS/INVCMOS_Previous_Values.xml b/library/SubcircuitLibrary/INVCMOS/INVCMOS_Previous_Values.xml
index e5bb98c7..e5bb98c7 100644
--- a/src/SubcircuitLibrary/INVCMOS/INVCMOS_Previous_Values.xml
+++ b/library/SubcircuitLibrary/INVCMOS/INVCMOS_Previous_Values.xml
diff --git a/src/SubcircuitLibrary/INVCMOS/NMOS-180nm.lib b/library/SubcircuitLibrary/INVCMOS/NMOS-180nm.lib
index 51e9b119..51e9b119 100644
--- a/src/SubcircuitLibrary/INVCMOS/NMOS-180nm.lib
+++ b/library/SubcircuitLibrary/INVCMOS/NMOS-180nm.lib
diff --git a/src/SubcircuitLibrary/INVCMOS/PMOS-180nm.lib b/library/SubcircuitLibrary/INVCMOS/PMOS-180nm.lib
index 032b5b95..032b5b95 100644
--- a/src/SubcircuitLibrary/INVCMOS/PMOS-180nm.lib
+++ b/library/SubcircuitLibrary/INVCMOS/PMOS-180nm.lib
diff --git a/src/SubcircuitLibrary/INVCMOS/analysis b/library/SubcircuitLibrary/INVCMOS/analysis
index 334c5333..334c5333 100644
--- a/src/SubcircuitLibrary/INVCMOS/analysis
+++ b/library/SubcircuitLibrary/INVCMOS/analysis
diff --git a/src/SubcircuitLibrary/LM7812/LM7812-cache.lib b/library/SubcircuitLibrary/LM7812/LM7812-cache.lib
index c02b3211..c02b3211 100644
--- a/src/SubcircuitLibrary/LM7812/LM7812-cache.lib
+++ b/library/SubcircuitLibrary/LM7812/LM7812-cache.lib
diff --git a/src/SubcircuitLibrary/LM7812/LM7812-rescue.lib b/library/SubcircuitLibrary/LM7812/LM7812-rescue.lib
index e6cfa7d6..e6cfa7d6 100644
--- a/src/SubcircuitLibrary/LM7812/LM7812-rescue.lib
+++ b/library/SubcircuitLibrary/LM7812/LM7812-rescue.lib
diff --git a/src/SubcircuitLibrary/LM7812/LM7812.cir b/library/SubcircuitLibrary/LM7812/LM7812.cir
index 3f0d3adf..3f0d3adf 100644
--- a/src/SubcircuitLibrary/LM7812/LM7812.cir
+++ b/library/SubcircuitLibrary/LM7812/LM7812.cir
diff --git a/src/SubcircuitLibrary/LM7812/LM7812.cir.out b/library/SubcircuitLibrary/LM7812/LM7812.cir.out
index 73404965..73404965 100644
--- a/src/SubcircuitLibrary/LM7812/LM7812.cir.out
+++ b/library/SubcircuitLibrary/LM7812/LM7812.cir.out
diff --git a/src/SubcircuitLibrary/LM7812/LM7812.pro b/library/SubcircuitLibrary/LM7812/LM7812.pro
index 12d08139..12d08139 100644
--- a/src/SubcircuitLibrary/LM7812/LM7812.pro
+++ b/library/SubcircuitLibrary/LM7812/LM7812.pro
diff --git a/src/SubcircuitLibrary/LM7812/LM7812.sch b/library/SubcircuitLibrary/LM7812/LM7812.sch
index ca95c2ca..ca95c2ca 100644
--- a/src/SubcircuitLibrary/LM7812/LM7812.sch
+++ b/library/SubcircuitLibrary/LM7812/LM7812.sch
diff --git a/src/SubcircuitLibrary/LM7812/LM7812.sub b/library/SubcircuitLibrary/LM7812/LM7812.sub
index 0dd95154..0dd95154 100644
--- a/src/SubcircuitLibrary/LM7812/LM7812.sub
+++ b/library/SubcircuitLibrary/LM7812/LM7812.sub
diff --git a/src/SubcircuitLibrary/LM7812/LM7812_Previous_Values.xml b/library/SubcircuitLibrary/LM7812/LM7812_Previous_Values.xml
index 263f360c..263f360c 100644
--- a/src/SubcircuitLibrary/LM7812/LM7812_Previous_Values.xml
+++ b/library/SubcircuitLibrary/LM7812/LM7812_Previous_Values.xml
diff --git a/src/SubcircuitLibrary/AD620/NPN.lib b/library/SubcircuitLibrary/LM7812/NPN.lib
index 6509fe7a..6509fe7a 100644
--- a/src/SubcircuitLibrary/AD620/NPN.lib
+++ b/library/SubcircuitLibrary/LM7812/NPN.lib
diff --git a/src/SubcircuitLibrary/AD620/PNP.lib b/library/SubcircuitLibrary/LM7812/PNP.lib
index 7edda0ea..7edda0ea 100644
--- a/src/SubcircuitLibrary/AD620/PNP.lib
+++ b/library/SubcircuitLibrary/LM7812/PNP.lib
diff --git a/src/SubcircuitLibrary/LM7812/Q_PNP.lib b/library/SubcircuitLibrary/LM7812/Q_PNP.lib
index 154ed2d8..154ed2d8 100644
--- a/src/SubcircuitLibrary/LM7812/Q_PNP.lib
+++ b/library/SubcircuitLibrary/LM7812/Q_PNP.lib
diff --git a/src/SubcircuitLibrary/5_and/analysis b/library/SubcircuitLibrary/LM7812/analysis
index ebd5c0a9..ebd5c0a9 100644
--- a/src/SubcircuitLibrary/5_and/analysis
+++ b/library/SubcircuitLibrary/LM7812/analysis
diff --git a/src/SubcircuitLibrary/5bit-Ripple_carry_adder/analysis b/library/SubcircuitLibrary/full_adder/analysis
index 52ccc5ec..52ccc5ec 100644
--- a/src/SubcircuitLibrary/5bit-Ripple_carry_adder/analysis
+++ b/library/SubcircuitLibrary/full_adder/analysis
diff --git a/src/SubcircuitLibrary/full_adder/full_adder-cache.lib b/library/SubcircuitLibrary/full_adder/full_adder-cache.lib
index 623a7f41..623a7f41 100644
--- a/src/SubcircuitLibrary/full_adder/full_adder-cache.lib
+++ b/library/SubcircuitLibrary/full_adder/full_adder-cache.lib
diff --git a/src/SubcircuitLibrary/full_adder/full_adder.cir b/library/SubcircuitLibrary/full_adder/full_adder.cir
index 6461b5b6..6461b5b6 100644
--- a/src/SubcircuitLibrary/full_adder/full_adder.cir
+++ b/library/SubcircuitLibrary/full_adder/full_adder.cir
diff --git a/src/SubcircuitLibrary/full_adder/full_adder.cir.out b/library/SubcircuitLibrary/full_adder/full_adder.cir.out
index b90ce70d..b90ce70d 100644
--- a/src/SubcircuitLibrary/full_adder/full_adder.cir.out
+++ b/library/SubcircuitLibrary/full_adder/full_adder.cir.out
diff --git a/src/SubcircuitLibrary/full_adder/full_adder.pro b/library/SubcircuitLibrary/full_adder/full_adder.pro
index c0db0775..c0db0775 100644
--- a/src/SubcircuitLibrary/full_adder/full_adder.pro
+++ b/library/SubcircuitLibrary/full_adder/full_adder.pro
diff --git a/src/SubcircuitLibrary/full_adder/full_adder.sch b/library/SubcircuitLibrary/full_adder/full_adder.sch
index 8bd400f2..8bd400f2 100644
--- a/src/SubcircuitLibrary/full_adder/full_adder.sch
+++ b/library/SubcircuitLibrary/full_adder/full_adder.sch
diff --git a/src/SubcircuitLibrary/full_adder/full_adder.sub b/library/SubcircuitLibrary/full_adder/full_adder.sub
index 5f261f78..5f261f78 100644
--- a/src/SubcircuitLibrary/full_adder/full_adder.sub
+++ b/library/SubcircuitLibrary/full_adder/full_adder.sub
diff --git a/src/SubcircuitLibrary/full_adder/full_adder_Previous_Values.xml b/library/SubcircuitLibrary/full_adder/full_adder_Previous_Values.xml
index b63184d6..b63184d6 100644
--- a/src/SubcircuitLibrary/full_adder/full_adder_Previous_Values.xml
+++ b/library/SubcircuitLibrary/full_adder/full_adder_Previous_Values.xml
diff --git a/src/SubcircuitLibrary/full_adder/half_adder-cache.lib b/library/SubcircuitLibrary/full_adder/half_adder-cache.lib
index 68785220..68785220 100644
--- a/src/SubcircuitLibrary/full_adder/half_adder-cache.lib
+++ b/library/SubcircuitLibrary/full_adder/half_adder-cache.lib
diff --git a/src/SubcircuitLibrary/full_adder/half_adder.cir b/library/SubcircuitLibrary/full_adder/half_adder.cir
index 8b2e7e06..8b2e7e06 100644
--- a/src/SubcircuitLibrary/full_adder/half_adder.cir
+++ b/library/SubcircuitLibrary/full_adder/half_adder.cir
diff --git a/src/SubcircuitLibrary/full_adder/half_adder.cir.out b/library/SubcircuitLibrary/full_adder/half_adder.cir.out
index b1b6b1e7..b1b6b1e7 100644
--- a/src/SubcircuitLibrary/full_adder/half_adder.cir.out
+++ b/library/SubcircuitLibrary/full_adder/half_adder.cir.out
diff --git a/src/SubcircuitLibrary/full_adder/half_adder.pro b/library/SubcircuitLibrary/full_adder/half_adder.pro
index 695ae0f6..695ae0f6 100644
--- a/src/SubcircuitLibrary/full_adder/half_adder.pro
+++ b/library/SubcircuitLibrary/full_adder/half_adder.pro
diff --git a/src/SubcircuitLibrary/full_adder/half_adder.sch b/library/SubcircuitLibrary/full_adder/half_adder.sch
index bf9bcbf0..bf9bcbf0 100644
--- a/src/SubcircuitLibrary/full_adder/half_adder.sch
+++ b/library/SubcircuitLibrary/full_adder/half_adder.sch
diff --git a/src/SubcircuitLibrary/full_adder/half_adder.sub b/library/SubcircuitLibrary/full_adder/half_adder.sub
index e9f92223..e9f92223 100644
--- a/src/SubcircuitLibrary/full_adder/half_adder.sub
+++ b/library/SubcircuitLibrary/full_adder/half_adder.sub
diff --git a/src/SubcircuitLibrary/full_adder/half_adder_Previous_Values.xml b/library/SubcircuitLibrary/full_adder/half_adder_Previous_Values.xml
index b915f0da..b915f0da 100644
--- a/src/SubcircuitLibrary/full_adder/half_adder_Previous_Values.xml
+++ b/library/SubcircuitLibrary/full_adder/half_adder_Previous_Values.xml
diff --git a/src/SubcircuitLibrary/full_sub/analysis b/library/SubcircuitLibrary/full_sub/analysis
index 660a46cc..660a46cc 100644
--- a/src/SubcircuitLibrary/full_sub/analysis
+++ b/library/SubcircuitLibrary/full_sub/analysis
diff --git a/src/SubcircuitLibrary/full_sub/full_sub-cache.lib b/library/SubcircuitLibrary/full_sub/full_sub-cache.lib
index 6949ac1a..6949ac1a 100644
--- a/src/SubcircuitLibrary/full_sub/full_sub-cache.lib
+++ b/library/SubcircuitLibrary/full_sub/full_sub-cache.lib
diff --git a/src/SubcircuitLibrary/full_sub/full_sub-rescue.lib b/library/SubcircuitLibrary/full_sub/full_sub-rescue.lib
index 803b5ece..803b5ece 100644
--- a/src/SubcircuitLibrary/full_sub/full_sub-rescue.lib
+++ b/library/SubcircuitLibrary/full_sub/full_sub-rescue.lib
diff --git a/src/SubcircuitLibrary/full_sub/full_sub.cir b/library/SubcircuitLibrary/full_sub/full_sub.cir
index 67359421..67359421 100644
--- a/src/SubcircuitLibrary/full_sub/full_sub.cir
+++ b/library/SubcircuitLibrary/full_sub/full_sub.cir
diff --git a/src/SubcircuitLibrary/full_sub/full_sub.cir.out b/library/SubcircuitLibrary/full_sub/full_sub.cir.out
index 5e58cc0a..5e58cc0a 100644
--- a/src/SubcircuitLibrary/full_sub/full_sub.cir.out
+++ b/library/SubcircuitLibrary/full_sub/full_sub.cir.out
diff --git a/src/SubcircuitLibrary/full_sub/full_sub.pro b/library/SubcircuitLibrary/full_sub/full_sub.pro
index 1a0c3543..1a0c3543 100644
--- a/src/SubcircuitLibrary/full_sub/full_sub.pro
+++ b/library/SubcircuitLibrary/full_sub/full_sub.pro
diff --git a/src/SubcircuitLibrary/full_sub/full_sub.sch b/library/SubcircuitLibrary/full_sub/full_sub.sch
index 99ca85e5..99ca85e5 100644
--- a/src/SubcircuitLibrary/full_sub/full_sub.sch
+++ b/library/SubcircuitLibrary/full_sub/full_sub.sch
diff --git a/src/SubcircuitLibrary/full_sub/full_sub.sub b/library/SubcircuitLibrary/full_sub/full_sub.sub
index 9c9dcc5a..9c9dcc5a 100644
--- a/src/SubcircuitLibrary/full_sub/full_sub.sub
+++ b/library/SubcircuitLibrary/full_sub/full_sub.sub
diff --git a/src/SubcircuitLibrary/full_sub/full_sub_Previous_Values.xml b/library/SubcircuitLibrary/full_sub/full_sub_Previous_Values.xml
index fcdb63e0..fcdb63e0 100644
--- a/src/SubcircuitLibrary/full_sub/full_sub_Previous_Values.xml
+++ b/library/SubcircuitLibrary/full_sub/full_sub_Previous_Values.xml
diff --git a/src/SubcircuitLibrary/full_sub/half_sub-cache.lib b/library/SubcircuitLibrary/full_sub/half_sub-cache.lib
index bd15e664..bd15e664 100644
--- a/src/SubcircuitLibrary/full_sub/half_sub-cache.lib
+++ b/library/SubcircuitLibrary/full_sub/half_sub-cache.lib
diff --git a/src/SubcircuitLibrary/full_sub/half_sub.cir b/library/SubcircuitLibrary/full_sub/half_sub.cir
index f20f0368..f20f0368 100644
--- a/src/SubcircuitLibrary/full_sub/half_sub.cir
+++ b/library/SubcircuitLibrary/full_sub/half_sub.cir
diff --git a/src/SubcircuitLibrary/full_sub/half_sub.cir.out b/library/SubcircuitLibrary/full_sub/half_sub.cir.out
index 91816956..91816956 100644
--- a/src/SubcircuitLibrary/full_sub/half_sub.cir.out
+++ b/library/SubcircuitLibrary/full_sub/half_sub.cir.out
diff --git a/src/SubcircuitLibrary/full_sub/half_sub.pro b/library/SubcircuitLibrary/full_sub/half_sub.pro
index 90e3ded9..90e3ded9 100644
--- a/src/SubcircuitLibrary/full_sub/half_sub.pro
+++ b/library/SubcircuitLibrary/full_sub/half_sub.pro
diff --git a/src/SubcircuitLibrary/full_sub/half_sub.sch b/library/SubcircuitLibrary/full_sub/half_sub.sch
index e70b1675..e70b1675 100644
--- a/src/SubcircuitLibrary/full_sub/half_sub.sch
+++ b/library/SubcircuitLibrary/full_sub/half_sub.sch
diff --git a/src/SubcircuitLibrary/full_sub/half_sub.sub b/library/SubcircuitLibrary/full_sub/half_sub.sub
index a61a3409..a61a3409 100644
--- a/src/SubcircuitLibrary/full_sub/half_sub.sub
+++ b/library/SubcircuitLibrary/full_sub/half_sub.sub
diff --git a/src/SubcircuitLibrary/full_sub/half_sub_Previous_Values.xml b/library/SubcircuitLibrary/full_sub/half_sub_Previous_Values.xml
index 115ba703..115ba703 100644
--- a/src/SubcircuitLibrary/full_sub/half_sub_Previous_Values.xml
+++ b/library/SubcircuitLibrary/full_sub/half_sub_Previous_Values.xml
diff --git a/src/SubcircuitLibrary/9bit-Right_shift_register/analysis b/library/SubcircuitLibrary/half_adder/analysis
index 52ccc5ec..52ccc5ec 100644
--- a/src/SubcircuitLibrary/9bit-Right_shift_register/analysis
+++ b/library/SubcircuitLibrary/half_adder/analysis
diff --git a/src/SubcircuitLibrary/half_adder/half_adder-cache.lib b/library/SubcircuitLibrary/half_adder/half_adder-cache.lib
index 68785220..68785220 100644
--- a/src/SubcircuitLibrary/half_adder/half_adder-cache.lib
+++ b/library/SubcircuitLibrary/half_adder/half_adder-cache.lib
diff --git a/src/SubcircuitLibrary/half_adder/half_adder.cir b/library/SubcircuitLibrary/half_adder/half_adder.cir
index 8b2e7e06..8b2e7e06 100644
--- a/src/SubcircuitLibrary/half_adder/half_adder.cir
+++ b/library/SubcircuitLibrary/half_adder/half_adder.cir
diff --git a/src/SubcircuitLibrary/half_adder/half_adder.cir.out b/library/SubcircuitLibrary/half_adder/half_adder.cir.out
index b1b6b1e7..b1b6b1e7 100644
--- a/src/SubcircuitLibrary/half_adder/half_adder.cir.out
+++ b/library/SubcircuitLibrary/half_adder/half_adder.cir.out
diff --git a/src/SubcircuitLibrary/half_adder/half_adder.pro b/library/SubcircuitLibrary/half_adder/half_adder.pro
index 695ae0f6..695ae0f6 100644
--- a/src/SubcircuitLibrary/half_adder/half_adder.pro
+++ b/library/SubcircuitLibrary/half_adder/half_adder.pro
diff --git a/src/SubcircuitLibrary/half_adder/half_adder.sch b/library/SubcircuitLibrary/half_adder/half_adder.sch
index bf9bcbf0..bf9bcbf0 100644
--- a/src/SubcircuitLibrary/half_adder/half_adder.sch
+++ b/library/SubcircuitLibrary/half_adder/half_adder.sch
diff --git a/src/SubcircuitLibrary/half_adder/half_adder.sub b/library/SubcircuitLibrary/half_adder/half_adder.sub
index e9f92223..e9f92223 100644
--- a/src/SubcircuitLibrary/half_adder/half_adder.sub
+++ b/library/SubcircuitLibrary/half_adder/half_adder.sub
diff --git a/src/SubcircuitLibrary/half_adder/half_adder_Previous_Values.xml b/library/SubcircuitLibrary/half_adder/half_adder_Previous_Values.xml
index b915f0da..b915f0da 100644
--- a/src/SubcircuitLibrary/half_adder/half_adder_Previous_Values.xml
+++ b/library/SubcircuitLibrary/half_adder/half_adder_Previous_Values.xml
diff --git a/src/SubcircuitLibrary/half_sub/analysis b/library/SubcircuitLibrary/half_sub/analysis
index 660a46cc..660a46cc 100644
--- a/src/SubcircuitLibrary/half_sub/analysis
+++ b/library/SubcircuitLibrary/half_sub/analysis
diff --git a/src/SubcircuitLibrary/half_sub/half_sub-cache.lib b/library/SubcircuitLibrary/half_sub/half_sub-cache.lib
index bd15e664..bd15e664 100644
--- a/src/SubcircuitLibrary/half_sub/half_sub-cache.lib
+++ b/library/SubcircuitLibrary/half_sub/half_sub-cache.lib
diff --git a/src/SubcircuitLibrary/half_sub/half_sub.cir b/library/SubcircuitLibrary/half_sub/half_sub.cir
index f20f0368..f20f0368 100644
--- a/src/SubcircuitLibrary/half_sub/half_sub.cir
+++ b/library/SubcircuitLibrary/half_sub/half_sub.cir
diff --git a/src/SubcircuitLibrary/half_sub/half_sub.cir.out b/library/SubcircuitLibrary/half_sub/half_sub.cir.out
index 91816956..91816956 100644
--- a/src/SubcircuitLibrary/half_sub/half_sub.cir.out
+++ b/library/SubcircuitLibrary/half_sub/half_sub.cir.out
diff --git a/src/SubcircuitLibrary/half_sub/half_sub.pro b/library/SubcircuitLibrary/half_sub/half_sub.pro
index 90e3ded9..90e3ded9 100644
--- a/src/SubcircuitLibrary/half_sub/half_sub.pro
+++ b/library/SubcircuitLibrary/half_sub/half_sub.pro
diff --git a/src/SubcircuitLibrary/half_sub/half_sub.sch b/library/SubcircuitLibrary/half_sub/half_sub.sch
index e70b1675..e70b1675 100644
--- a/src/SubcircuitLibrary/half_sub/half_sub.sch
+++ b/library/SubcircuitLibrary/half_sub/half_sub.sch
diff --git a/src/SubcircuitLibrary/half_sub/half_sub.sub b/library/SubcircuitLibrary/half_sub/half_sub.sub
index a61a3409..a61a3409 100644
--- a/src/SubcircuitLibrary/half_sub/half_sub.sub
+++ b/library/SubcircuitLibrary/half_sub/half_sub.sub
diff --git a/src/SubcircuitLibrary/half_sub/half_sub_Previous_Values.xml b/library/SubcircuitLibrary/half_sub/half_sub_Previous_Values.xml
index 115ba703..115ba703 100644
--- a/src/SubcircuitLibrary/half_sub/half_sub_Previous_Values.xml
+++ b/library/SubcircuitLibrary/half_sub/half_sub_Previous_Values.xml
diff --git a/src/SubcircuitLibrary/CA3096/NPN.lib b/library/SubcircuitLibrary/lm555n/NPN.lib
index 6509fe7a..6509fe7a 100644
--- a/src/SubcircuitLibrary/CA3096/NPN.lib
+++ b/library/SubcircuitLibrary/lm555n/NPN.lib
diff --git a/src/SubcircuitLibrary/lm555n/analysis b/library/SubcircuitLibrary/lm555n/analysis
index a0953567..a0953567 100644
--- a/src/SubcircuitLibrary/lm555n/analysis
+++ b/library/SubcircuitLibrary/lm555n/analysis
diff --git a/src/SubcircuitLibrary/lm555n/lm555n-cache.lib b/library/SubcircuitLibrary/lm555n/lm555n-cache.lib
index 824af11e..824af11e 100644
--- a/src/SubcircuitLibrary/lm555n/lm555n-cache.lib
+++ b/library/SubcircuitLibrary/lm555n/lm555n-cache.lib
diff --git a/src/SubcircuitLibrary/lm555n/lm555n-rescue.lib b/library/SubcircuitLibrary/lm555n/lm555n-rescue.lib
index fffeca36..fffeca36 100644
--- a/src/SubcircuitLibrary/lm555n/lm555n-rescue.lib
+++ b/library/SubcircuitLibrary/lm555n/lm555n-rescue.lib
diff --git a/src/SubcircuitLibrary/lm555n/lm555n.cir b/library/SubcircuitLibrary/lm555n/lm555n.cir
index 682d4945..682d4945 100644
--- a/src/SubcircuitLibrary/lm555n/lm555n.cir
+++ b/library/SubcircuitLibrary/lm555n/lm555n.cir
diff --git a/src/SubcircuitLibrary/lm555n/lm555n.cir.out b/library/SubcircuitLibrary/lm555n/lm555n.cir.out
index a81070a1..a81070a1 100644
--- a/src/SubcircuitLibrary/lm555n/lm555n.cir.out
+++ b/library/SubcircuitLibrary/lm555n/lm555n.cir.out
diff --git a/src/SubcircuitLibrary/lm555n/lm555n.pro b/library/SubcircuitLibrary/lm555n/lm555n.pro
index 0a5408b6..0a5408b6 100644
--- a/src/SubcircuitLibrary/lm555n/lm555n.pro
+++ b/library/SubcircuitLibrary/lm555n/lm555n.pro
diff --git a/src/SubcircuitLibrary/lm555n/lm555n.sch b/library/SubcircuitLibrary/lm555n/lm555n.sch
index 28110b13..28110b13 100644
--- a/src/SubcircuitLibrary/lm555n/lm555n.sch
+++ b/library/SubcircuitLibrary/lm555n/lm555n.sch
diff --git a/src/SubcircuitLibrary/lm555n/lm555n.sub b/library/SubcircuitLibrary/lm555n/lm555n.sub
index b524f5c6..b524f5c6 100644
--- a/src/SubcircuitLibrary/lm555n/lm555n.sub
+++ b/library/SubcircuitLibrary/lm555n/lm555n.sub
diff --git a/src/SubcircuitLibrary/lm555n/lm555n_Previous_Values.xml b/library/SubcircuitLibrary/lm555n/lm555n_Previous_Values.xml
index 58d33ec5..58d33ec5 100644
--- a/src/SubcircuitLibrary/lm555n/lm555n_Previous_Values.xml
+++ b/library/SubcircuitLibrary/lm555n/lm555n_Previous_Values.xml
diff --git a/src/SubcircuitLibrary/lm555n/npn_1.lib b/library/SubcircuitLibrary/lm555n/npn_1.lib
index a1818ed8..a1818ed8 100644
--- a/src/SubcircuitLibrary/lm555n/npn_1.lib
+++ b/library/SubcircuitLibrary/lm555n/npn_1.lib
diff --git a/src/SubcircuitLibrary/LM108/NPN.lib b/library/SubcircuitLibrary/lm7805/NPN.lib
index 6509fe7a..6509fe7a 100644
--- a/src/SubcircuitLibrary/LM108/NPN.lib
+++ b/library/SubcircuitLibrary/lm7805/NPN.lib
diff --git a/src/SubcircuitLibrary/CA3096/PNP.lib b/library/SubcircuitLibrary/lm7805/PNP.lib
index 7edda0ea..7edda0ea 100644
--- a/src/SubcircuitLibrary/CA3096/PNP.lib
+++ b/library/SubcircuitLibrary/lm7805/PNP.lib
diff --git a/src/SubcircuitLibrary/lm7805/Q_PNP.lib b/library/SubcircuitLibrary/lm7805/Q_PNP.lib
index 154ed2d8..154ed2d8 100644
--- a/src/SubcircuitLibrary/lm7805/Q_PNP.lib
+++ b/library/SubcircuitLibrary/lm7805/Q_PNP.lib
diff --git a/src/SubcircuitLibrary/5_nand/analysis b/library/SubcircuitLibrary/lm7805/analysis
index ebd5c0a9..ebd5c0a9 100644
--- a/src/SubcircuitLibrary/5_nand/analysis
+++ b/library/SubcircuitLibrary/lm7805/analysis
diff --git a/src/SubcircuitLibrary/lm7805/lm7805-cache.lib b/library/SubcircuitLibrary/lm7805/lm7805-cache.lib
index aaf8454e..aaf8454e 100644
--- a/src/SubcircuitLibrary/lm7805/lm7805-cache.lib
+++ b/library/SubcircuitLibrary/lm7805/lm7805-cache.lib
diff --git a/src/SubcircuitLibrary/lm7805/lm7805.cir b/library/SubcircuitLibrary/lm7805/lm7805.cir
index 081b4920..081b4920 100644
--- a/src/SubcircuitLibrary/lm7805/lm7805.cir
+++ b/library/SubcircuitLibrary/lm7805/lm7805.cir
diff --git a/src/SubcircuitLibrary/lm7805/lm7805.cir.out b/library/SubcircuitLibrary/lm7805/lm7805.cir.out
index f122fba6..f122fba6 100644
--- a/src/SubcircuitLibrary/lm7805/lm7805.cir.out
+++ b/library/SubcircuitLibrary/lm7805/lm7805.cir.out
diff --git a/src/SubcircuitLibrary/lm7805/lm7805.pro b/library/SubcircuitLibrary/lm7805/lm7805.pro
index d410e2fa..d410e2fa 100644
--- a/src/SubcircuitLibrary/lm7805/lm7805.pro
+++ b/library/SubcircuitLibrary/lm7805/lm7805.pro
diff --git a/src/SubcircuitLibrary/lm7805/lm7805.sch b/library/SubcircuitLibrary/lm7805/lm7805.sch
index 701d163d..701d163d 100644
--- a/src/SubcircuitLibrary/lm7805/lm7805.sch
+++ b/library/SubcircuitLibrary/lm7805/lm7805.sch
diff --git a/src/SubcircuitLibrary/lm7805/lm7805.sub b/library/SubcircuitLibrary/lm7805/lm7805.sub
index 7ee1489c..7ee1489c 100644
--- a/src/SubcircuitLibrary/lm7805/lm7805.sub
+++ b/library/SubcircuitLibrary/lm7805/lm7805.sub
diff --git a/src/SubcircuitLibrary/lm7805/lm7805_Previous_Values.xml b/library/SubcircuitLibrary/lm7805/lm7805_Previous_Values.xml
index 7395bd7c..7395bd7c 100644
--- a/src/SubcircuitLibrary/lm7805/lm7805_Previous_Values.xml
+++ b/library/SubcircuitLibrary/lm7805/lm7805_Previous_Values.xml
diff --git a/src/SubcircuitLibrary/LM3046/NPN.lib b/library/SubcircuitLibrary/lm_741/NPN.lib
index 6509fe7a..6509fe7a 100644
--- a/src/SubcircuitLibrary/LM3046/NPN.lib
+++ b/library/SubcircuitLibrary/lm_741/NPN.lib
diff --git a/src/SubcircuitLibrary/LM108/PNP.lib b/library/SubcircuitLibrary/lm_741/PNP.lib
index 7edda0ea..7edda0ea 100644
--- a/src/SubcircuitLibrary/LM108/PNP.lib
+++ b/library/SubcircuitLibrary/lm_741/PNP.lib
diff --git a/src/SubcircuitLibrary/5_nor/analysis b/library/SubcircuitLibrary/lm_741/analysis
index ebd5c0a9..ebd5c0a9 100644
--- a/src/SubcircuitLibrary/5_nor/analysis
+++ b/library/SubcircuitLibrary/lm_741/analysis
diff --git a/src/SubcircuitLibrary/lm_741/lm_741-cache.lib b/library/SubcircuitLibrary/lm_741/lm_741-cache.lib
index 04e3fecd..04e3fecd 100644
--- a/src/SubcircuitLibrary/lm_741/lm_741-cache.lib
+++ b/library/SubcircuitLibrary/lm_741/lm_741-cache.lib
diff --git a/src/SubcircuitLibrary/lm_741/lm_741.cir b/library/SubcircuitLibrary/lm_741/lm_741.cir
index 4a5917ea..4a5917ea 100644
--- a/src/SubcircuitLibrary/lm_741/lm_741.cir
+++ b/library/SubcircuitLibrary/lm_741/lm_741.cir
diff --git a/src/SubcircuitLibrary/lm_741/lm_741.cir.out b/library/SubcircuitLibrary/lm_741/lm_741.cir.out
index a00bd86a..a00bd86a 100644
--- a/src/SubcircuitLibrary/lm_741/lm_741.cir.out
+++ b/library/SubcircuitLibrary/lm_741/lm_741.cir.out
diff --git a/src/SubcircuitLibrary/lm_741/lm_741.pro b/library/SubcircuitLibrary/lm_741/lm_741.pro
index cbe83f35..cbe83f35 100644
--- a/src/SubcircuitLibrary/lm_741/lm_741.pro
+++ b/library/SubcircuitLibrary/lm_741/lm_741.pro
diff --git a/src/SubcircuitLibrary/lm_741/lm_741.sch b/library/SubcircuitLibrary/lm_741/lm_741.sch
index b017fd2b..b017fd2b 100644
--- a/src/SubcircuitLibrary/lm_741/lm_741.sch
+++ b/library/SubcircuitLibrary/lm_741/lm_741.sch
diff --git a/src/SubcircuitLibrary/lm_741/lm_741.sub b/library/SubcircuitLibrary/lm_741/lm_741.sub
index fa8d27b1..fa8d27b1 100644
--- a/src/SubcircuitLibrary/lm_741/lm_741.sub
+++ b/library/SubcircuitLibrary/lm_741/lm_741.sub
diff --git a/src/SubcircuitLibrary/AD620/lm_741_Previous_Values.xml b/library/SubcircuitLibrary/lm_741/lm_741_Previous_Values.xml
index b61322bb..b61322bb 100644
--- a/src/SubcircuitLibrary/AD620/lm_741_Previous_Values.xml
+++ b/library/SubcircuitLibrary/lm_741/lm_741_Previous_Values.xml
diff --git a/src/SubcircuitLibrary/lm_741/npn_1.lib b/library/SubcircuitLibrary/lm_741/npn_1.lib
index a1818ed8..a1818ed8 100644
--- a/src/SubcircuitLibrary/lm_741/npn_1.lib
+++ b/library/SubcircuitLibrary/lm_741/npn_1.lib
diff --git a/src/SubcircuitLibrary/lm_741/pnp_1.lib b/library/SubcircuitLibrary/lm_741/pnp_1.lib
index a4ee06da..a4ee06da 100644
--- a/src/SubcircuitLibrary/lm_741/pnp_1.lib
+++ b/library/SubcircuitLibrary/lm_741/pnp_1.lib
diff --git a/src/SubcircuitLibrary/scr/D.lib b/library/SubcircuitLibrary/scr/D.lib
index ef18bb50..ef18bb50 100644
--- a/src/SubcircuitLibrary/scr/D.lib
+++ b/library/SubcircuitLibrary/scr/D.lib
diff --git a/src/SubcircuitLibrary/scr/PowerDiode.lib b/library/SubcircuitLibrary/scr/PowerDiode.lib
index a2f61dce..a2f61dce 100644
--- a/src/SubcircuitLibrary/scr/PowerDiode.lib
+++ b/library/SubcircuitLibrary/scr/PowerDiode.lib
diff --git a/src/SubcircuitLibrary/scr/analysis b/library/SubcircuitLibrary/scr/analysis
index 687c71ec..687c71ec 100644
--- a/src/SubcircuitLibrary/scr/analysis
+++ b/library/SubcircuitLibrary/scr/analysis
diff --git a/src/SubcircuitLibrary/scr/scr-cache.lib b/library/SubcircuitLibrary/scr/scr-cache.lib
index 0a685b80..0a685b80 100644
--- a/src/SubcircuitLibrary/scr/scr-cache.lib
+++ b/library/SubcircuitLibrary/scr/scr-cache.lib
diff --git a/src/SubcircuitLibrary/scr/scr-rescue.lib b/library/SubcircuitLibrary/scr/scr-rescue.lib
index 64237b7d..64237b7d 100644
--- a/src/SubcircuitLibrary/scr/scr-rescue.lib
+++ b/library/SubcircuitLibrary/scr/scr-rescue.lib
diff --git a/src/SubcircuitLibrary/scr/scr.cir b/library/SubcircuitLibrary/scr/scr.cir
index 4b279764..4b279764 100644
--- a/src/SubcircuitLibrary/scr/scr.cir
+++ b/library/SubcircuitLibrary/scr/scr.cir
diff --git a/src/SubcircuitLibrary/scr/scr.cir.out b/library/SubcircuitLibrary/scr/scr.cir.out
index d600f25d..d600f25d 100644
--- a/src/SubcircuitLibrary/scr/scr.cir.out
+++ b/library/SubcircuitLibrary/scr/scr.cir.out
diff --git a/src/SubcircuitLibrary/scr/scr.pro b/library/SubcircuitLibrary/scr/scr.pro
index ca0df803..ca0df803 100644
--- a/src/SubcircuitLibrary/scr/scr.pro
+++ b/library/SubcircuitLibrary/scr/scr.pro
diff --git a/src/SubcircuitLibrary/scr/scr.sch b/library/SubcircuitLibrary/scr/scr.sch
index 69244f56..69244f56 100644
--- a/src/SubcircuitLibrary/scr/scr.sch
+++ b/library/SubcircuitLibrary/scr/scr.sch
diff --git a/src/SubcircuitLibrary/scr/scr.sub b/library/SubcircuitLibrary/scr/scr.sub
index 398c8921..398c8921 100644
--- a/src/SubcircuitLibrary/scr/scr.sub
+++ b/library/SubcircuitLibrary/scr/scr.sub
diff --git a/src/SubcircuitLibrary/scr/scr_Previous_Values.xml b/library/SubcircuitLibrary/scr/scr_Previous_Values.xml
index 8ff6e8d3..8ff6e8d3 100644
--- a/src/SubcircuitLibrary/scr/scr_Previous_Values.xml
+++ b/library/SubcircuitLibrary/scr/scr_Previous_Values.xml
diff --git a/src/SubcircuitLibrary/full_adder/analysis b/library/SubcircuitLibrary/ua741/analysis
index 52ccc5ec..52ccc5ec 100644
--- a/src/SubcircuitLibrary/full_adder/analysis
+++ b/library/SubcircuitLibrary/ua741/analysis
diff --git a/src/SubcircuitLibrary/ua741/ua741.cir b/library/SubcircuitLibrary/ua741/ua741.cir
index de797429..de797429 100644
--- a/src/SubcircuitLibrary/ua741/ua741.cir
+++ b/library/SubcircuitLibrary/ua741/ua741.cir
diff --git a/src/SubcircuitLibrary/ua741/ua741.cir.out b/library/SubcircuitLibrary/ua741/ua741.cir.out
index 72e68514..72e68514 100644
--- a/src/SubcircuitLibrary/ua741/ua741.cir.out
+++ b/library/SubcircuitLibrary/ua741/ua741.cir.out
diff --git a/src/SubcircuitLibrary/ua741/ua741.pro b/library/SubcircuitLibrary/ua741/ua741.pro
index 5dbb81a5..5dbb81a5 100644
--- a/src/SubcircuitLibrary/ua741/ua741.pro
+++ b/library/SubcircuitLibrary/ua741/ua741.pro
diff --git a/src/SubcircuitLibrary/ua741/ua741.sch b/library/SubcircuitLibrary/ua741/ua741.sch
index 7dfc5e1a..7dfc5e1a 100644
--- a/src/SubcircuitLibrary/ua741/ua741.sch
+++ b/library/SubcircuitLibrary/ua741/ua741.sch
diff --git a/src/SubcircuitLibrary/ua741/ua741.sub b/library/SubcircuitLibrary/ua741/ua741.sub
index ad26c001..ad26c001 100644
--- a/src/SubcircuitLibrary/ua741/ua741.sub
+++ b/library/SubcircuitLibrary/ua741/ua741.sub
diff --git a/src/SubcircuitLibrary/CA3096/D.lib b/library/SubcircuitLibrary/ujt/D.lib
index 8a7fb4da..8a7fb4da 100644
--- a/src/SubcircuitLibrary/CA3096/D.lib
+++ b/library/SubcircuitLibrary/ujt/D.lib
diff --git a/src/SubcircuitLibrary/ujt/analysis b/library/SubcircuitLibrary/ujt/analysis
index ffc57a6b..ffc57a6b 100644
--- a/src/SubcircuitLibrary/ujt/analysis
+++ b/library/SubcircuitLibrary/ujt/analysis
diff --git a/src/SubcircuitLibrary/ujt/emitter.lib b/library/SubcircuitLibrary/ujt/emitter.lib
index 3e78b1ee..3e78b1ee 100644
--- a/src/SubcircuitLibrary/ujt/emitter.lib
+++ b/library/SubcircuitLibrary/ujt/emitter.lib
diff --git a/src/SubcircuitLibrary/opto_isolator_switch/plot_data_i.txt b/library/SubcircuitLibrary/ujt/plot_data_i.txt
index e69de29b..e69de29b 100644
--- a/src/SubcircuitLibrary/opto_isolator_switch/plot_data_i.txt
+++ b/library/SubcircuitLibrary/ujt/plot_data_i.txt
diff --git a/src/SubcircuitLibrary/opto_isolator_switch/plot_data_v.txt b/library/SubcircuitLibrary/ujt/plot_data_v.txt
index e69de29b..e69de29b 100644
--- a/src/SubcircuitLibrary/opto_isolator_switch/plot_data_v.txt
+++ b/library/SubcircuitLibrary/ujt/plot_data_v.txt
diff --git a/src/SubcircuitLibrary/ujt/ujt-cache.lib b/library/SubcircuitLibrary/ujt/ujt-cache.lib
index ff75f664..ff75f664 100644
--- a/src/SubcircuitLibrary/ujt/ujt-cache.lib
+++ b/library/SubcircuitLibrary/ujt/ujt-cache.lib
diff --git a/src/SubcircuitLibrary/ujt/ujt.cir b/library/SubcircuitLibrary/ujt/ujt.cir
index e0e911d7..e0e911d7 100644
--- a/src/SubcircuitLibrary/ujt/ujt.cir
+++ b/library/SubcircuitLibrary/ujt/ujt.cir
diff --git a/src/SubcircuitLibrary/ujt/ujt.cir.out b/library/SubcircuitLibrary/ujt/ujt.cir.out
index 2045c539..2045c539 100644
--- a/src/SubcircuitLibrary/ujt/ujt.cir.out
+++ b/library/SubcircuitLibrary/ujt/ujt.cir.out
diff --git a/src/SubcircuitLibrary/ujt/ujt.pro b/library/SubcircuitLibrary/ujt/ujt.pro
index 24c5e186..24c5e186 100644
--- a/src/SubcircuitLibrary/ujt/ujt.pro
+++ b/library/SubcircuitLibrary/ujt/ujt.pro
diff --git a/src/SubcircuitLibrary/ujt/ujt.sch b/library/SubcircuitLibrary/ujt/ujt.sch
index a82bddf7..a82bddf7 100644
--- a/src/SubcircuitLibrary/ujt/ujt.sch
+++ b/library/SubcircuitLibrary/ujt/ujt.sch
diff --git a/src/SubcircuitLibrary/ujt/ujt.sub b/library/SubcircuitLibrary/ujt/ujt.sub
index 2fb1db35..2fb1db35 100644
--- a/src/SubcircuitLibrary/ujt/ujt.sub
+++ b/library/SubcircuitLibrary/ujt/ujt.sub
diff --git a/src/SubcircuitLibrary/ujt/ujt_Previous_Values.xml b/library/SubcircuitLibrary/ujt/ujt_Previous_Values.xml
index 4468b395..4468b395 100644
--- a/src/SubcircuitLibrary/ujt/ujt_Previous_Values.xml
+++ b/library/SubcircuitLibrary/ujt/ujt_Previous_Values.xml
diff --git a/src/browser/pages/User-Manual/eSim.html b/library/browser/User-Manual/eSim.html
index 79afa31e..79afa31e 100644
--- a/src/browser/pages/User-Manual/eSim.html
+++ b/library/browser/User-Manual/eSim.html
diff --git a/src/browser/pages/User-Manual/figures/3d.png b/library/browser/User-Manual/figures/3d.png
index 0d2f66a4..0d2f66a4 100644
--- a/src/browser/pages/User-Manual/figures/3d.png
+++ b/library/browser/User-Manual/figures/3d.png
diff --git a/src/browser/pages/User-Manual/figures/3dv.png b/library/browser/User-Manual/figures/3dv.png
index da9cb1be..da9cb1be 100644
--- a/src/browser/pages/User-Manual/figures/3dv.png
+++ b/library/browser/User-Manual/figures/3dv.png
diff --git a/src/browser/pages/User-Manual/figures/CvPCB-window.png b/library/browser/User-Manual/figures/CvPCB-window.png
index 231e5c77..231e5c77 100644
--- a/src/browser/pages/User-Manual/figures/CvPCB-window.png
+++ b/library/browser/User-Manual/figures/CvPCB-window.png
diff --git a/src/browser/pages/User-Manual/figures/ac1.png b/library/browser/User-Manual/figures/ac1.png
index 4c4af047..4c4af047 100644
--- a/src/browser/pages/User-Manual/figures/ac1.png
+++ b/library/browser/User-Manual/figures/ac1.png
diff --git a/src/browser/pages/User-Manual/figures/afterplace.png b/library/browser/User-Manual/figures/afterplace.png
index 273341be..273341be 100644
--- a/src/browser/pages/User-Manual/figures/afterplace.png
+++ b/library/browser/User-Manual/figures/afterplace.png
diff --git a/src/browser/pages/User-Manual/figures/analysis.png b/library/browser/User-Manual/figures/analysis.png
index 780d5b23..780d5b23 100644
--- a/src/browser/pages/User-Manual/figures/analysis.png
+++ b/library/browser/User-Manual/figures/analysis.png
diff --git a/src/browser/pages/User-Manual/figures/anno.png b/library/browser/User-Manual/figures/anno.png
index bbd312bb..bbd312bb 100644
--- a/src/browser/pages/User-Manual/figures/anno.png
+++ b/library/browser/User-Manual/figures/anno.png
diff --git a/src/browser/pages/User-Manual/figures/blockdiagram.png b/library/browser/User-Manual/figures/blockdiagram.png
index 5393ba77..5393ba77 100644
--- a/src/browser/pages/User-Manual/figures/blockdiagram.png
+++ b/library/browser/User-Manual/figures/blockdiagram.png
diff --git a/src/browser/pages/User-Manual/figures/bridgerectifier.png b/library/browser/User-Manual/figures/bridgerectifier.png
index e106a17c..e106a17c 100644
--- a/src/browser/pages/User-Manual/figures/bridgerectifier.png
+++ b/library/browser/User-Manual/figures/bridgerectifier.png
diff --git a/src/browser/pages/User-Manual/figures/componentlibrary.png b/library/browser/User-Manual/figures/componentlibrary.png
index cf755bf6..cf755bf6 100644
--- a/src/browser/pages/User-Manual/figures/componentlibrary.png
+++ b/library/browser/User-Manual/figures/componentlibrary.png
diff --git a/src/browser/pages/User-Manual/figures/convert.png b/library/browser/User-Manual/figures/convert.png
index 2c22e7c5..2c22e7c5 100644
--- a/src/browser/pages/User-Manual/figures/convert.png
+++ b/library/browser/User-Manual/figures/convert.png
diff --git a/src/browser/pages/User-Manual/figures/createsubcktsch.png b/library/browser/User-Manual/figures/createsubcktsch.png
index 64daf75a..64daf75a 100644
--- a/src/browser/pages/User-Manual/figures/createsubcktsch.png
+++ b/library/browser/User-Manual/figures/createsubcktsch.png
diff --git a/src/browser/pages/User-Manual/figures/curplace.png b/library/browser/User-Manual/figures/curplace.png
index 77944207..77944207 100644
--- a/src/browser/pages/User-Manual/figures/curplace.png
+++ b/library/browser/User-Manual/figures/curplace.png
diff --git a/src/browser/pages/User-Manual/figures/dc1.png b/library/browser/User-Manual/figures/dc1.png
index f4b5de26..f4b5de26 100644
--- a/src/browser/pages/User-Manual/figures/dc1.png
+++ b/library/browser/User-Manual/figures/dc1.png
diff --git a/src/browser/pages/User-Manual/figures/devicemodel.png b/library/browser/User-Manual/figures/devicemodel.png
index 6795dfc6..6795dfc6 100644
--- a/src/browser/pages/User-Manual/figures/devicemodel.png
+++ b/library/browser/User-Manual/figures/devicemodel.png
diff --git a/src/browser/pages/User-Manual/figures/drc.png b/library/browser/User-Manual/figures/drc.png
index 02ebf73f..02ebf73f 100644
--- a/src/browser/pages/User-Manual/figures/drc.png
+++ b/library/browser/User-Manual/figures/drc.png
diff --git a/src/browser/pages/User-Manual/figures/druleedit.png b/library/browser/User-Manual/figures/druleedit.png
index b3c893aa..b3c893aa 100644
--- a/src/browser/pages/User-Manual/figures/druleedit.png
+++ b/library/browser/User-Manual/figures/druleedit.png
diff --git a/src/browser/pages/User-Manual/figures/drules.png b/library/browser/User-Manual/figures/drules.png
index 6f2f1832..6f2f1832 100644
--- a/src/browser/pages/User-Manual/figures/drules.png
+++ b/library/browser/User-Manual/figures/drules.png
diff --git a/src/browser/pages/User-Manual/figures/eeschema.png b/library/browser/User-Manual/figures/eeschema.png
index 0ce97df3..0ce97df3 100644
--- a/src/browser/pages/User-Manual/figures/eeschema.png
+++ b/library/browser/User-Manual/figures/eeschema.png
diff --git a/src/browser/pages/User-Manual/figures/eeschema1_corctd.png b/library/browser/User-Manual/figures/eeschema1_corctd.png
index bc1eaea8..bc1eaea8 100644
--- a/src/browser/pages/User-Manual/figures/eeschema1_corctd.png
+++ b/library/browser/User-Manual/figures/eeschema1_corctd.png
diff --git a/src/browser/pages/User-Manual/figures/eeschema2_mod.png b/library/browser/User-Manual/figures/eeschema2_mod.png
index 7365f199..7365f199 100644
--- a/src/browser/pages/User-Manual/figures/eeschema2_mod.png
+++ b/library/browser/User-Manual/figures/eeschema2_mod.png
diff --git a/src/browser/pages/User-Manual/figures/eeschema3_mod.png b/library/browser/User-Manual/figures/eeschema3_mod.png
index 42860d6a..42860d6a 100644
--- a/src/browser/pages/User-Manual/figures/eeschema3_mod.png
+++ b/library/browser/User-Manual/figures/eeschema3_mod.png
diff --git a/src/browser/pages/User-Manual/figures/eeschema4_mod.png b/library/browser/User-Manual/figures/eeschema4_mod.png
index c7a093b4..c7a093b4 100644
--- a/src/browser/pages/User-Manual/figures/eeschema4_mod.png
+++ b/library/browser/User-Manual/figures/eeschema4_mod.png
diff --git a/src/browser/pages/User-Manual/figures/erc1.png b/library/browser/User-Manual/figures/erc1.png
index 360d7beb..360d7beb 100644
--- a/src/browser/pages/User-Manual/figures/erc1.png
+++ b/library/browser/User-Manual/figures/erc1.png
diff --git a/src/browser/pages/User-Manual/figures/erc2.png b/library/browser/User-Manual/figures/erc2.png
index d20863e7..d20863e7 100644
--- a/src/browser/pages/User-Manual/figures/erc2.png
+++ b/library/browser/User-Manual/figures/erc2.png
diff --git a/src/browser/pages/User-Manual/figures/ercgnd.png b/library/browser/User-Manual/figures/ercgnd.png
index 9f1440fc..9f1440fc 100644
--- a/src/browser/pages/User-Manual/figures/ercgnd.png
+++ b/library/browser/User-Manual/figures/ercgnd.png
diff --git a/src/browser/pages/User-Manual/figures/esim-subckt.png b/library/browser/User-Manual/figures/esim-subckt.png
index c20e01fc..c20e01fc 100644
--- a/src/browser/pages/User-Manual/figures/esim-subckt.png
+++ b/library/browser/User-Manual/figures/esim-subckt.png
diff --git a/src/browser/pages/User-Manual/figures/fe.png b/library/browser/User-Manual/figures/fe.png
index 13aa0452..13aa0452 100644
--- a/src/browser/pages/User-Manual/figures/fe.png
+++ b/library/browser/User-Manual/figures/fe.png
diff --git a/src/browser/pages/User-Manual/figures/field.png b/library/browser/User-Manual/figures/field.png
index c552487b..c552487b 100644
--- a/src/browser/pages/User-Manual/figures/field.png
+++ b/library/browser/User-Manual/figures/field.png
diff --git a/src/browser/pages/User-Manual/figures/footprint-c1.png b/library/browser/User-Manual/figures/footprint-c1.png
index 2c75fa41..2c75fa41 100644
--- a/src/browser/pages/User-Manual/figures/footprint-c1.png
+++ b/library/browser/User-Manual/figures/footprint-c1.png
diff --git a/src/browser/pages/User-Manual/figures/fplace.png b/library/browser/User-Manual/figures/fplace.png
index abd4be0d..abd4be0d 100644
--- a/src/browser/pages/User-Manual/figures/fplace.png
+++ b/library/browser/User-Manual/figures/fplace.png
diff --git a/src/browser/pages/User-Manual/figures/guitoolbar.png b/library/browser/User-Manual/figures/guitoolbar.png
index b511da11..b511da11 100644
--- a/src/browser/pages/User-Manual/figures/guitoolbar.png
+++ b/library/browser/User-Manual/figures/guitoolbar.png
diff --git a/src/browser/pages/User-Manual/figures/ha_analysistab.png b/library/browser/User-Manual/figures/ha_analysistab.png
index cfdb6b03..cfdb6b03 100644
--- a/src/browser/pages/User-Manual/figures/ha_analysistab.png
+++ b/library/browser/User-Manual/figures/ha_analysistab.png
diff --git a/src/browser/pages/User-Manual/figures/ha_netlistgeneration.png b/library/browser/User-Manual/figures/ha_netlistgeneration.png
index 4cf01ab3..4cf01ab3 100644
--- a/src/browser/pages/User-Manual/figures/ha_netlistgeneration.png
+++ b/library/browser/User-Manual/figures/ha_netlistgeneration.png
diff --git a/src/browser/pages/User-Manual/figures/ha_ngspicemodeltab.png b/library/browser/User-Manual/figures/ha_ngspicemodeltab.png
index 65f3f764..65f3f764 100644
--- a/src/browser/pages/User-Manual/figures/ha_ngspicemodeltab.png
+++ b/library/browser/User-Manual/figures/ha_ngspicemodeltab.png
diff --git a/src/browser/pages/User-Manual/figures/ha_ngspiceplot.png b/library/browser/User-Manual/figures/ha_ngspiceplot.png
index 61339801..61339801 100644
--- a/src/browser/pages/User-Manual/figures/ha_ngspiceplot.png
+++ b/library/browser/User-Manual/figures/ha_ngspiceplot.png
diff --git a/src/browser/pages/User-Manual/figures/ha_pythonplot.png b/library/browser/User-Manual/figures/ha_pythonplot.png
index 3f2cb8ee..3f2cb8ee 100644
--- a/src/browser/pages/User-Manual/figures/ha_pythonplot.png
+++ b/library/browser/User-Manual/figures/ha_pythonplot.png
diff --git a/src/browser/pages/User-Manual/figures/ha_schematic.png b/library/browser/User-Manual/figures/ha_schematic.png
index 41f553f1..41f553f1 100644
--- a/src/browser/pages/User-Manual/figures/ha_schematic.png
+++ b/library/browser/User-Manual/figures/ha_schematic.png
diff --git a/src/browser/pages/User-Manual/figures/ha_sourcedetailstab.png b/library/browser/User-Manual/figures/ha_sourcedetailstab.png
index 8794de22..8794de22 100644
--- a/src/browser/pages/User-Manual/figures/ha_sourcedetailstab.png
+++ b/library/browser/User-Manual/figures/ha_sourcedetailstab.png
diff --git a/src/browser/pages/User-Manual/figures/ha_sub.png b/library/browser/User-Manual/figures/ha_sub.png
index 0eae4f43..0eae4f43 100644
--- a/src/browser/pages/User-Manual/figures/ha_sub.png
+++ b/library/browser/User-Manual/figures/ha_sub.png
diff --git a/src/browser/pages/User-Manual/figures/ha_subcircuitstab.png b/library/browser/User-Manual/figures/ha_subcircuitstab.png
index 670a7ddd..670a7ddd 100644
--- a/src/browser/pages/User-Manual/figures/ha_subcircuitstab.png
+++ b/library/browser/User-Manual/figures/ha_subcircuitstab.png
diff --git a/src/browser/pages/User-Manual/figures/half_adder.png b/library/browser/User-Manual/figures/half_adder.png
index 5c957632..5c957632 100644
--- a/src/browser/pages/User-Manual/figures/half_adder.png
+++ b/library/browser/User-Manual/figures/half_adder.png
diff --git a/src/browser/pages/User-Manual/figures/halfadderblock.png b/library/browser/User-Manual/figures/halfadderblock.png
index 0ef3b03a..0ef3b03a 100644
--- a/src/browser/pages/User-Manual/figures/halfadderblock.png
+++ b/library/browser/User-Manual/figures/halfadderblock.png
diff --git a/src/browser/pages/User-Manual/figures/halfschematic.png b/library/browser/User-Manual/figures/halfschematic.png
index e5b5b059..e5b5b059 100644
--- a/src/browser/pages/User-Manual/figures/halfschematic.png
+++ b/library/browser/User-Manual/figures/halfschematic.png
diff --git a/src/browser/pages/User-Manual/figures/hwr_analysistab.png b/library/browser/User-Manual/figures/hwr_analysistab.png
index cfdb6b03..cfdb6b03 100644
--- a/src/browser/pages/User-Manual/figures/hwr_analysistab.png
+++ b/library/browser/User-Manual/figures/hwr_analysistab.png
diff --git a/src/browser/pages/User-Manual/figures/hwr_chematic.png b/library/browser/User-Manual/figures/hwr_chematic.png
index 97a96dc2..97a96dc2 100644
--- a/src/browser/pages/User-Manual/figures/hwr_chematic.png
+++ b/library/browser/User-Manual/figures/hwr_chematic.png
diff --git a/src/browser/pages/User-Manual/figures/hwr_devicemodelingtab.png b/library/browser/User-Manual/figures/hwr_devicemodelingtab.png
index a78815c8..a78815c8 100644
--- a/src/browser/pages/User-Manual/figures/hwr_devicemodelingtab.png
+++ b/library/browser/User-Manual/figures/hwr_devicemodelingtab.png
diff --git a/src/browser/pages/User-Manual/figures/hwr_netlistgeneration.png b/library/browser/User-Manual/figures/hwr_netlistgeneration.png
index 82679419..82679419 100644
--- a/src/browser/pages/User-Manual/figures/hwr_netlistgeneration.png
+++ b/library/browser/User-Manual/figures/hwr_netlistgeneration.png
diff --git a/src/browser/pages/User-Manual/figures/hwr_ngspiceplot.png b/library/browser/User-Manual/figures/hwr_ngspiceplot.png
index b2bd7c7b..b2bd7c7b 100644
--- a/src/browser/pages/User-Manual/figures/hwr_ngspiceplot.png
+++ b/library/browser/User-Manual/figures/hwr_ngspiceplot.png
diff --git a/src/browser/pages/User-Manual/figures/hwr_pythonplot.png b/library/browser/User-Manual/figures/hwr_pythonplot.png
index 7acea109..7acea109 100644
--- a/src/browser/pages/User-Manual/figures/hwr_pythonplot.png
+++ b/library/browser/User-Manual/figures/hwr_pythonplot.png
diff --git a/src/browser/pages/User-Manual/figures/hwr_schematic.png b/library/browser/User-Manual/figures/hwr_schematic.png
index 97a96dc2..97a96dc2 100644
--- a/src/browser/pages/User-Manual/figures/hwr_schematic.png
+++ b/library/browser/User-Manual/figures/hwr_schematic.png
diff --git a/src/browser/pages/User-Manual/figures/hwr_sourcedetailstab.png b/library/browser/User-Manual/figures/hwr_sourcedetailstab.png
index de0bd34d..de0bd34d 100644
--- a/src/browser/pages/User-Manual/figures/hwr_sourcedetailstab.png
+++ b/library/browser/User-Manual/figures/hwr_sourcedetailstab.png
diff --git a/src/browser/pages/User-Manual/figures/ia_analysistab.png b/library/browser/User-Manual/figures/ia_analysistab.png
index cfdb6b03..cfdb6b03 100644
--- a/src/browser/pages/User-Manual/figures/ia_analysistab.png
+++ b/library/browser/User-Manual/figures/ia_analysistab.png
diff --git a/src/browser/pages/User-Manual/figures/ia_netlistgeneration.png b/library/browser/User-Manual/figures/ia_netlistgeneration.png
index 7da86a74..7da86a74 100644
--- a/src/browser/pages/User-Manual/figures/ia_netlistgeneration.png
+++ b/library/browser/User-Manual/figures/ia_netlistgeneration.png
diff --git a/src/browser/pages/User-Manual/figures/ia_ngspiceplot.png b/library/browser/User-Manual/figures/ia_ngspiceplot.png
index 9c076242..9c076242 100644
--- a/src/browser/pages/User-Manual/figures/ia_ngspiceplot.png
+++ b/library/browser/User-Manual/figures/ia_ngspiceplot.png
diff --git a/src/browser/pages/User-Manual/figures/ia_pythonplot.png b/library/browser/User-Manual/figures/ia_pythonplot.png
index 3c588723..3c588723 100644
--- a/src/browser/pages/User-Manual/figures/ia_pythonplot.png
+++ b/library/browser/User-Manual/figures/ia_pythonplot.png
diff --git a/src/browser/pages/User-Manual/figures/ia_schematic.png b/library/browser/User-Manual/figures/ia_schematic.png
index 064ab5e3..064ab5e3 100644
--- a/src/browser/pages/User-Manual/figures/ia_schematic.png
+++ b/library/browser/User-Manual/figures/ia_schematic.png
diff --git a/src/browser/pages/User-Manual/figures/ia_sourcedetailstab.png b/library/browser/User-Manual/figures/ia_sourcedetailstab.png
index de0bd34d..de0bd34d 100644
--- a/src/browser/pages/User-Manual/figures/ia_sourcedetailstab.png
+++ b/library/browser/User-Manual/figures/ia_sourcedetailstab.png
diff --git a/src/browser/pages/User-Manual/figures/ia_sub.png b/library/browser/User-Manual/figures/ia_sub.png
index 41fcc0f7..41fcc0f7 100644
--- a/src/browser/pages/User-Manual/figures/ia_sub.png
+++ b/library/browser/User-Manual/figures/ia_sub.png
diff --git a/src/browser/pages/User-Manual/figures/ia_subcircuitstab.png b/library/browser/User-Manual/figures/ia_subcircuitstab.png
index cf8a5b51..cf8a5b51 100644
--- a/src/browser/pages/User-Manual/figures/ia_subcircuitstab.png
+++ b/library/browser/User-Manual/figures/ia_subcircuitstab.png
diff --git a/src/browser/pages/User-Manual/figures/iitblogo.png b/library/browser/User-Manual/figures/iitblogo.png
index 666a6f59..666a6f59 100644
--- a/src/browser/pages/User-Manual/figures/iitblogo.png
+++ b/library/browser/User-Manual/figures/iitblogo.png
diff --git a/src/browser/pages/User-Manual/figures/layer.png b/library/browser/User-Manual/figures/layer.png
index 8b6b2f09..8b6b2f09 100644
--- a/src/browser/pages/User-Manual/figures/layer.png
+++ b/library/browser/User-Manual/figures/layer.png
diff --git a/src/browser/pages/User-Manual/figures/lefttoolbar.png b/library/browser/User-Manual/figures/lefttoolbar.png
index 49434a61..49434a61 100644
--- a/src/browser/pages/User-Manual/figures/lefttoolbar.png
+++ b/library/browser/User-Manual/figures/lefttoolbar.png
diff --git a/src/browser/pages/User-Manual/figures/libraries.png b/library/browser/User-Manual/figures/libraries.png
index 3241a498..3241a498 100644
--- a/src/browser/pages/User-Manual/figures/libraries.png
+++ b/library/browser/User-Manual/figures/libraries.png
diff --git a/src/browser/pages/User-Manual/figures/logo-trimmed.png b/library/browser/User-Manual/figures/logo-trimmed.png
index 4131afba..4131afba 100644
--- a/src/browser/pages/User-Manual/figures/logo-trimmed.png
+++ b/library/browser/User-Manual/figures/logo-trimmed.png
diff --git a/src/browser/pages/User-Manual/figures/maingui.png b/library/browser/User-Manual/figures/maingui.png
index 90113f85..90113f85 100644
--- a/src/browser/pages/User-Manual/figures/maingui.png
+++ b/library/browser/User-Manual/figures/maingui.png
diff --git a/src/browser/pages/User-Manual/figures/map.png b/library/browser/User-Manual/figures/map.png
index b30dbe22..b30dbe22 100644
--- a/src/browser/pages/User-Manual/figures/map.png
+++ b/library/browser/User-Manual/figures/map.png
diff --git a/src/browser/pages/User-Manual/figures/model.png b/library/browser/User-Manual/figures/model.png
index 63a13446..63a13446 100644
--- a/src/browser/pages/User-Manual/figures/model.png
+++ b/library/browser/User-Manual/figures/model.png
diff --git a/src/browser/pages/User-Manual/figures/modeladd.png b/library/browser/User-Manual/figures/modeladd.png
index 138112f9..138112f9 100644
--- a/src/browser/pages/User-Manual/figures/modeladd.png
+++ b/library/browser/User-Manual/figures/modeladd.png
diff --git a/src/browser/pages/User-Manual/figures/modeledit.png b/library/browser/User-Manual/figures/modeledit.png
index 8110ff47..8110ff47 100644
--- a/src/browser/pages/User-Manual/figures/modeledit.png
+++ b/library/browser/User-Manual/figures/modeledit.png
diff --git a/src/browser/pages/User-Manual/figures/modeleditor.png b/library/browser/User-Manual/figures/modeleditor.png
index f891065d..f891065d 100644
--- a/src/browser/pages/User-Manual/figures/modeleditor.png
+++ b/library/browser/User-Manual/figures/modeleditor.png
diff --git a/src/browser/pages/User-Manual/figures/modeleditor_new.png b/library/browser/User-Manual/figures/modeleditor_new.png
index f6b7aed6..f6b7aed6 100644
--- a/src/browser/pages/User-Manual/figures/modeleditor_new.png
+++ b/library/browser/User-Manual/figures/modeleditor_new.png
diff --git a/src/browser/pages/User-Manual/figures/modelnew.png b/library/browser/User-Manual/figures/modelnew.png
index b6f56fcb..b6f56fcb 100644
--- a/src/browser/pages/User-Manual/figures/modelnew.png
+++ b/library/browser/User-Manual/figures/modelnew.png
diff --git a/src/browser/pages/User-Manual/figures/modelremove.png b/library/browser/User-Manual/figures/modelremove.png
index 6f5e0d57..6f5e0d57 100644
--- a/src/browser/pages/User-Manual/figures/modelremove.png
+++ b/library/browser/User-Manual/figures/modelremove.png
diff --git a/src/browser/pages/User-Manual/figures/movep.png b/library/browser/User-Manual/figures/movep.png
index b5c3d780..b5c3d780 100644
--- a/src/browser/pages/User-Manual/figures/movep.png
+++ b/library/browser/User-Manual/figures/movep.png
diff --git a/src/browser/pages/User-Manual/figures/netlist.png b/library/browser/User-Manual/figures/netlist.png
index bdcff82d..bdcff82d 100644
--- a/src/browser/pages/User-Manual/figures/netlist.png
+++ b/library/browser/User-Manual/figures/netlist.png
diff --git a/src/browser/pages/User-Manual/figures/netlistpcb.png b/library/browser/User-Manual/figures/netlistpcb.png
index 77bb5ee9..77bb5ee9 100644
--- a/src/browser/pages/User-Manual/figures/netlistpcb.png
+++ b/library/browser/User-Manual/figures/netlistpcb.png
diff --git a/src/browser/pages/User-Manual/figures/netlisttop.png b/library/browser/User-Manual/figures/netlisttop.png
index 5bda28e3..5bda28e3 100644
--- a/src/browser/pages/User-Manual/figures/netlisttop.png
+++ b/library/browser/User-Manual/figures/netlisttop.png
diff --git a/src/browser/pages/User-Manual/figures/newsubcktschematic.png b/library/browser/User-Manual/figures/newsubcktschematic.png
index 351cb5b2..351cb5b2 100644
--- a/src/browser/pages/User-Manual/figures/newsubcktschematic.png
+++ b/library/browser/User-Manual/figures/newsubcktschematic.png
diff --git a/src/browser/pages/User-Manual/figures/ngspiceoutput.png b/library/browser/User-Manual/figures/ngspiceoutput.png
index a8ad5efd..a8ad5efd 100644
--- a/src/browser/pages/User-Manual/figures/ngspiceoutput.png
+++ b/library/browser/User-Manual/figures/ngspiceoutput.png
diff --git a/src/browser/pages/User-Manual/figures/ngspicewindow.png b/library/browser/User-Manual/figures/ngspicewindow.png
index 47cb7f6d..47cb7f6d 100644
--- a/src/browser/pages/User-Manual/figures/ngspicewindow.png
+++ b/library/browser/User-Manual/figures/ngspicewindow.png
diff --git a/src/browser/pages/User-Manual/figures/pcb-rc.png b/library/browser/User-Manual/figures/pcb-rc.png
index 6c85569f..6c85569f 100644
--- a/src/browser/pages/User-Manual/figures/pcb-rc.png
+++ b/library/browser/User-Manual/figures/pcb-rc.png
diff --git a/src/browser/pages/User-Manual/figures/pcbed.png b/library/browser/User-Manual/figures/pcbed.png
index 9aa639bb..9aa639bb 100644
--- a/src/browser/pages/User-Manual/figures/pcbed.png
+++ b/library/browser/User-Manual/figures/pcbed.png
diff --git a/src/browser/pages/User-Manual/figures/pcbedges.png b/library/browser/User-Manual/figures/pcbedges.png
index b7be70c3..b7be70c3 100644
--- a/src/browser/pages/User-Manual/figures/pcbedges.png
+++ b/library/browser/User-Manual/figures/pcbedges.png
diff --git a/src/browser/pages/User-Manual/figures/pcbnew.png b/library/browser/User-Manual/figures/pcbnew.png
index 62521165..62521165 100644
--- a/src/browser/pages/User-Manual/figures/pcbnew.png
+++ b/library/browser/User-Manual/figures/pcbnew.png
diff --git a/src/browser/pages/User-Manual/figures/pcbschfin.png b/library/browser/User-Manual/figures/pcbschfin.png
index ea3da613..ea3da613 100644
--- a/src/browser/pages/User-Manual/figures/pcbschfin.png
+++ b/library/browser/User-Manual/figures/pcbschfin.png
diff --git a/src/browser/pages/User-Manual/figures/plot.png b/library/browser/User-Manual/figures/plot.png
index c3aa9962..c3aa9962 100644
--- a/src/browser/pages/User-Manual/figures/plot.png
+++ b/library/browser/User-Manual/figures/plot.png
diff --git a/src/browser/pages/User-Manual/figures/plot2.png b/library/browser/User-Manual/figures/plot2.png
index 6172b64e..6172b64e 100644
--- a/src/browser/pages/User-Manual/figures/plot2.png
+++ b/library/browser/User-Manual/figures/plot2.png
diff --git a/src/browser/pages/User-Manual/figures/port_lib.png b/library/browser/User-Manual/figures/port_lib.png
index 1e84eb12..1e84eb12 100644
--- a/src/browser/pages/User-Manual/figures/port_lib.png
+++ b/library/browser/User-Manual/figures/port_lib.png
diff --git a/src/browser/pages/User-Manual/figures/pr_analysistab.png b/library/browser/User-Manual/figures/pr_analysistab.png
index cfdb6b03..cfdb6b03 100644
--- a/src/browser/pages/User-Manual/figures/pr_analysistab.png
+++ b/library/browser/User-Manual/figures/pr_analysistab.png
diff --git a/src/browser/pages/User-Manual/figures/pr_devicemodelingtab.png b/library/browser/User-Manual/figures/pr_devicemodelingtab.png
index df999110..df999110 100644
--- a/src/browser/pages/User-Manual/figures/pr_devicemodelingtab.png
+++ b/library/browser/User-Manual/figures/pr_devicemodelingtab.png
diff --git a/src/browser/pages/User-Manual/figures/pr_netlistgeneration.png b/library/browser/User-Manual/figures/pr_netlistgeneration.png
index 01910fde..01910fde 100644
--- a/src/browser/pages/User-Manual/figures/pr_netlistgeneration.png
+++ b/library/browser/User-Manual/figures/pr_netlistgeneration.png
diff --git a/src/browser/pages/User-Manual/figures/pr_ngspiceplot.png b/library/browser/User-Manual/figures/pr_ngspiceplot.png
index a8ad5efd..a8ad5efd 100644
--- a/src/browser/pages/User-Manual/figures/pr_ngspiceplot.png
+++ b/library/browser/User-Manual/figures/pr_ngspiceplot.png
diff --git a/src/browser/pages/User-Manual/figures/pr_pythonplot.png b/library/browser/User-Manual/figures/pr_pythonplot.png
index 7b23ab90..7b23ab90 100644
--- a/src/browser/pages/User-Manual/figures/pr_pythonplot.png
+++ b/library/browser/User-Manual/figures/pr_pythonplot.png
diff --git a/src/browser/pages/User-Manual/figures/pr_schematic.png b/library/browser/User-Manual/figures/pr_schematic.png
index 1926dddf..1926dddf 100644
--- a/src/browser/pages/User-Manual/figures/pr_schematic.png
+++ b/library/browser/User-Manual/figures/pr_schematic.png
diff --git a/src/browser/pages/User-Manual/figures/pr_sourcedetailstab.png b/library/browser/User-Manual/figures/pr_sourcedetailstab.png
index de0bd34d..de0bd34d 100644
--- a/src/browser/pages/User-Manual/figures/pr_sourcedetailstab.png
+++ b/library/browser/User-Manual/figures/pr_sourcedetailstab.png
diff --git a/src/browser/pages/User-Manual/figures/pr_subcircuitstab.png b/library/browser/User-Manual/figures/pr_subcircuitstab.png
index cf8a5b51..cf8a5b51 100644
--- a/src/browser/pages/User-Manual/figures/pr_subcircuitstab.png
+++ b/library/browser/User-Manual/figures/pr_subcircuitstab.png
diff --git a/src/browser/pages/User-Manual/figures/print.png b/library/browser/User-Manual/figures/print.png
index 3de5d016..3de5d016 100644
--- a/src/browser/pages/User-Manual/figures/print.png
+++ b/library/browser/User-Manual/figures/print.png
diff --git a/src/browser/pages/User-Manual/figures/pythonplot.png b/library/browser/User-Manual/figures/pythonplot.png
index d8b21e24..d8b21e24 100644
--- a/src/browser/pages/User-Manual/figures/pythonplot.png
+++ b/library/browser/User-Manual/figures/pythonplot.png
diff --git a/src/browser/pages/User-Manual/figures/pythonplot1.png b/library/browser/User-Manual/figures/pythonplot1.png
index 7b23ab90..7b23ab90 100644
--- a/src/browser/pages/User-Manual/figures/pythonplot1.png
+++ b/library/browser/User-Manual/figures/pythonplot1.png
diff --git a/src/browser/pages/User-Manual/figures/rc1.png b/library/browser/User-Manual/figures/rc1.png
index b2dd7f04..b2dd7f04 100644
--- a/src/browser/pages/User-Manual/figures/rc1.png
+++ b/library/browser/User-Manual/figures/rc1.png
diff --git a/src/browser/pages/User-Manual/figures/rc2.png b/library/browser/User-Manual/figures/rc2.png
index 8275f1de..8275f1de 100644
--- a/src/browser/pages/User-Manual/figures/rc2.png
+++ b/library/browser/User-Manual/figures/rc2.png
diff --git a/src/browser/pages/User-Manual/figures/rc_analysistab.png b/library/browser/User-Manual/figures/rc_analysistab.png
index 92a3e361..92a3e361 100644
--- a/src/browser/pages/User-Manual/figures/rc_analysistab.png
+++ b/library/browser/User-Manual/figures/rc_analysistab.png
diff --git a/src/browser/pages/User-Manual/figures/rc_comp.png b/library/browser/User-Manual/figures/rc_comp.png
index 9dc3a886..9dc3a886 100644
--- a/src/browser/pages/User-Manual/figures/rc_comp.png
+++ b/library/browser/User-Manual/figures/rc_comp.png
diff --git a/src/browser/pages/User-Manual/figures/rc_complete1.png b/library/browser/User-Manual/figures/rc_complete1.png
index 9ff67abd..9ff67abd 100644
--- a/src/browser/pages/User-Manual/figures/rc_complete1.png
+++ b/library/browser/User-Manual/figures/rc_complete1.png
diff --git a/src/browser/pages/User-Manual/figures/rc_component.png b/library/browser/User-Manual/figures/rc_component.png
index 5bb32cf9..5bb32cf9 100644
--- a/src/browser/pages/User-Manual/figures/rc_component.png
+++ b/library/browser/User-Manual/figures/rc_component.png
diff --git a/src/browser/pages/User-Manual/figures/rc_ki2ng.png b/library/browser/User-Manual/figures/rc_ki2ng.png
index b506c6d2..b506c6d2 100644
--- a/src/browser/pages/User-Manual/figures/rc_ki2ng.png
+++ b/library/browser/User-Manual/figures/rc_ki2ng.png
diff --git a/src/browser/pages/User-Manual/figures/rc_netlistgeneration.png b/library/browser/User-Manual/figures/rc_netlistgeneration.png
index 8b0354d6..8b0354d6 100644
--- a/src/browser/pages/User-Manual/figures/rc_netlistgeneration.png
+++ b/library/browser/User-Manual/figures/rc_netlistgeneration.png
diff --git a/src/browser/pages/User-Manual/figures/rc_ngspiceplot.png b/library/browser/User-Manual/figures/rc_ngspiceplot.png
index 5640e2ec..5640e2ec 100644
--- a/src/browser/pages/User-Manual/figures/rc_ngspiceplot.png
+++ b/library/browser/User-Manual/figures/rc_ngspiceplot.png
diff --git a/src/browser/pages/User-Manual/figures/rc_plot.png b/library/browser/User-Manual/figures/rc_plot.png
index 72c40016..72c40016 100644
--- a/src/browser/pages/User-Manual/figures/rc_plot.png
+++ b/library/browser/User-Manual/figures/rc_plot.png
diff --git a/src/browser/pages/User-Manual/figures/rc_pwr.png b/library/browser/User-Manual/figures/rc_pwr.png
index 4d546a09..4d546a09 100644
--- a/src/browser/pages/User-Manual/figures/rc_pwr.png
+++ b/library/browser/User-Manual/figures/rc_pwr.png
diff --git a/src/browser/pages/User-Manual/figures/rc_pythonplot.png b/library/browser/User-Manual/figures/rc_pythonplot.png
index 011b0dd7..011b0dd7 100644
--- a/src/browser/pages/User-Manual/figures/rc_pythonplot.png
+++ b/library/browser/User-Manual/figures/rc_pythonplot.png
diff --git a/src/browser/pages/User-Manual/figures/rc_schematic.png b/library/browser/User-Manual/figures/rc_schematic.png
index 5b62113b..5b62113b 100644
--- a/src/browser/pages/User-Manual/figures/rc_schematic.png
+++ b/library/browser/User-Manual/figures/rc_schematic.png
diff --git a/src/browser/pages/User-Manual/figures/rc_sourcedetailstab.png b/library/browser/User-Manual/figures/rc_sourcedetailstab.png
index de0bd34d..de0bd34d 100644
--- a/src/browser/pages/User-Manual/figures/rc_sourcedetailstab.png
+++ b/library/browser/User-Manual/figures/rc_sourcedetailstab.png
diff --git a/src/browser/pages/User-Manual/figures/rc_wire.png b/library/browser/User-Manual/figures/rc_wire.png
index d950f297..d950f297 100644
--- a/src/browser/pages/User-Manual/figures/rc_wire.png
+++ b/library/browser/User-Manual/figures/rc_wire.png
diff --git a/src/browser/pages/User-Manual/figures/rcpcb.png b/library/browser/User-Manual/figures/rcpcb.png
index 59171433..59171433 100644
--- a/src/browser/pages/User-Manual/figures/rcpcb.png
+++ b/library/browser/User-Manual/figures/rcpcb.png
diff --git a/src/browser/pages/User-Manual/figures/resistor.png b/library/browser/User-Manual/figures/resistor.png
index 53f37c90..53f37c90 100644
--- a/src/browser/pages/User-Manual/figures/resistor.png
+++ b/library/browser/User-Manual/figures/resistor.png
diff --git a/src/browser/pages/User-Manual/figures/rightoolbar.png b/library/browser/User-Manual/figures/rightoolbar.png
index fbc6a364..fbc6a364 100644
--- a/src/browser/pages/User-Manual/figures/rightoolbar.png
+++ b/library/browser/User-Manual/figures/rightoolbar.png
diff --git a/src/browser/pages/User-Manual/figures/rotate.png b/library/browser/User-Manual/figures/rotate.png
index 2731a58e..2731a58e 100644
--- a/src/browser/pages/User-Manual/figures/rotate.png
+++ b/library/browser/User-Manual/figures/rotate.png
diff --git a/src/browser/pages/User-Manual/figures/schematic-error.png b/library/browser/User-Manual/figures/schematic-error.png
index c9d9d932..c9d9d932 100644
--- a/src/browser/pages/User-Manual/figures/schematic-error.png
+++ b/library/browser/User-Manual/figures/schematic-error.png
diff --git a/src/browser/pages/User-Manual/figures/schematic1.png b/library/browser/User-Manual/figures/schematic1.png
index d473bfc0..d473bfc0 100644
--- a/src/browser/pages/User-Manual/figures/schematic1.png
+++ b/library/browser/User-Manual/figures/schematic1.png
diff --git a/src/browser/pages/User-Manual/figures/schemfin.png b/library/browser/User-Manual/figures/schemfin.png
index 74f733c2..74f733c2 100644
--- a/src/browser/pages/User-Manual/figures/schemfin.png
+++ b/library/browser/User-Manual/figures/schemfin.png
diff --git a/src/browser/pages/User-Manual/figures/simulation-op.png b/library/browser/User-Manual/figures/simulation-op.png
index 4dcb35bd..4dcb35bd 100644
--- a/src/browser/pages/User-Manual/figures/simulation-op.png
+++ b/library/browser/User-Manual/figures/simulation-op.png
diff --git a/src/browser/pages/User-Manual/figures/sine.png b/library/browser/User-Manual/figures/sine.png
index 24243572..24243572 100644
--- a/src/browser/pages/User-Manual/figures/sine.png
+++ b/library/browser/User-Manual/figures/sine.png
diff --git a/src/browser/pages/User-Manual/figures/sm.png b/library/browser/User-Manual/figures/sm.png
index 43a39fd5..43a39fd5 100644
--- a/src/browser/pages/User-Manual/figures/sm.png
+++ b/library/browser/User-Manual/figures/sm.png
diff --git a/src/browser/pages/User-Manual/figures/sourcedetails.png b/library/browser/User-Manual/figures/sourcedetails.png
index 94adc4c5..94adc4c5 100644
--- a/src/browser/pages/User-Manual/figures/sourcedetails.png
+++ b/library/browser/User-Manual/figures/sourcedetails.png
diff --git a/src/browser/pages/User-Manual/figures/subcirciut_window.png b/library/browser/User-Manual/figures/subcirciut_window.png
index ed711297..ed711297 100644
--- a/src/browser/pages/User-Manual/figures/subcirciut_window.png
+++ b/library/browser/User-Manual/figures/subcirciut_window.png
diff --git a/src/browser/pages/User-Manual/figures/subcircuit.png b/library/browser/User-Manual/figures/subcircuit.png
index 525b5df7..525b5df7 100644
--- a/src/browser/pages/User-Manual/figures/subcircuit.png
+++ b/library/browser/User-Manual/figures/subcircuit.png
diff --git a/src/browser/pages/User-Manual/figures/subcircuit_window.png b/library/browser/User-Manual/figures/subcircuit_window.png
index 02ba421d..02ba421d 100644
--- a/src/browser/pages/User-Manual/figures/subcircuit_window.png
+++ b/library/browser/User-Manual/figures/subcircuit_window.png
diff --git a/src/browser/pages/User-Manual/figures/subcktnewcomp.png b/library/browser/User-Manual/figures/subcktnewcomp.png
index 6501ede6..6501ede6 100644
--- a/src/browser/pages/User-Manual/figures/subcktnewcomp.png
+++ b/library/browser/User-Manual/figures/subcktnewcomp.png
diff --git a/src/browser/pages/User-Manual/figures/tb_fe.png b/library/browser/User-Manual/figures/tb_fe.png
index eacca23f..eacca23f 100644
--- a/src/browser/pages/User-Manual/figures/tb_fe.png
+++ b/library/browser/User-Manual/figures/tb_fe.png
diff --git a/src/browser/pages/User-Manual/figures/toptble.png b/library/browser/User-Manual/figures/toptble.png
index 4fb09375..4fb09375 100644
--- a/src/browser/pages/User-Manual/figures/toptble.png
+++ b/library/browser/User-Manual/figures/toptble.png
diff --git a/src/browser/pages/User-Manual/figures/toptoolbar.png b/library/browser/User-Manual/figures/toptoolbar.png
index ced36a16..ced36a16 100644
--- a/src/browser/pages/User-Manual/figures/toptoolbar.png
+++ b/library/browser/User-Manual/figures/toptoolbar.png
diff --git a/src/browser/pages/User-Manual/figures/track1.png b/library/browser/User-Manual/figures/track1.png
index 928aad91..928aad91 100644
--- a/src/browser/pages/User-Manual/figures/track1.png
+++ b/library/browser/User-Manual/figures/track1.png
diff --git a/src/browser/pages/User-Manual/figures/track2.png b/library/browser/User-Manual/figures/track2.png
index 09836517..09836517 100644
--- a/src/browser/pages/User-Manual/figures/track2.png
+++ b/library/browser/User-Manual/figures/track2.png
diff --git a/src/browser/pages/User-Manual/figures/track3.png b/library/browser/User-Manual/figures/track3.png
index 41a4df6f..41a4df6f 100644
--- a/src/browser/pages/User-Manual/figures/track3.png
+++ b/library/browser/User-Manual/figures/track3.png
diff --git a/src/browser/pages/User-Manual/figures/trans1.png b/library/browser/User-Manual/figures/trans1.png
index fc1ff4f1..fc1ff4f1 100644
--- a/src/browser/pages/User-Manual/figures/trans1.png
+++ b/library/browser/User-Manual/figures/trans1.png
diff --git a/src/browser/pages/User-Manual/figures/warning.png b/library/browser/User-Manual/figures/warning.png
index d15d6d9b..d15d6d9b 100644
--- a/src/browser/pages/User-Manual/figures/warning.png
+++ b/library/browser/User-Manual/figures/warning.png
diff --git a/src/browser/pages/User-Manual/figures/wire1.png b/library/browser/User-Manual/figures/wire1.png
index a5edb034..a5edb034 100644
--- a/src/browser/pages/User-Manual/figures/wire1.png
+++ b/library/browser/User-Manual/figures/wire1.png
diff --git a/src/browser/pages/User-Manual/figures/wirefin.png b/library/browser/User-Manual/figures/wirefin.png
index 463dc84f..463dc84f 100644
--- a/src/browser/pages/User-Manual/figures/wirefin.png
+++ b/library/browser/User-Manual/figures/wirefin.png
diff --git a/src/browser/pages/User-Manual/figures/workspace.png b/library/browser/User-Manual/figures/workspace.png
index f7edff17..f7edff17 100644
--- a/src/browser/pages/User-Manual/figures/workspace.png
+++ b/library/browser/User-Manual/figures/workspace.png
diff --git a/src/browser/pages/User-Manual/figures/zoom.png b/library/browser/User-Manual/figures/zoom.png
index 4dc70c04..4dc70c04 100644
--- a/src/browser/pages/User-Manual/figures/zoom.png
+++ b/library/browser/User-Manual/figures/zoom.png
diff --git a/src/browser/pages/welcome.html b/library/browser/welcome.html
index 6c4a6d11..2d0c0b85 100644
--- a/src/browser/pages/welcome.html
+++ b/library/browser/welcome.html
@@ -36,10 +36,10 @@ pre{
 
 <body>
 <h1>About eSim</h1>
-<center><img src="../../../images/logo.png" alt="eSim logo" height="100" width="100"></center>
+<center><img src="../../images/logo.png" alt="eSim logo" height="100" width="100"></center>
 <br/> 
 <p>
-<b>eSim</b> is an open source EDA tool for circuit design, simulation, analysis and PCB design. It is an integrated tool built using open source software such as KiCad (<a href=http://www.kicad-pcb.org>http://www.kicad-pcb.org</a>), Ngspice (<a href=http://ngspice.sourceforge.net>http://ngspice.sourceforge.net</a>) and GHDL (<a href=http://ghdl.free.fr/>http://ghdl.free.fr/</a>). eSim source is released under <b>GNU General Public License.</b> 
+<b>eSim</b> is an open source EDA tool for circuit design, simulation, analysis and PCB design. It is an integrated tool built using open source software such as KiCad (<a href=http://www.kicad-pcb.org>http://www.kicad-pcb.org</a>), Ngspice (<a href=http://ngspice.sourceforge.net>http://ngspice.sourceforge.net</a>) and GHDL (<a href=http://ghdl.free.fr>http://ghdl.free.fr</a>). eSim source is released under <b>GNU General Public License.</b> 
 </p>
 <br/>
 <p>
diff --git a/src/SubcircuitLibrary/ujt/D.lib b/library/deviceModelLibrary/Diode/D.lib
index 8a7fb4da..8a7fb4da 100644
--- a/src/SubcircuitLibrary/ujt/D.lib
+++ b/library/deviceModelLibrary/Diode/D.lib
diff --git a/src/deviceModelLibrary/Diode/D.xml b/library/deviceModelLibrary/Diode/D.xml
index 8b6b14c8..8b6b14c8 100644
--- a/src/deviceModelLibrary/Diode/D.xml
+++ b/library/deviceModelLibrary/Diode/D.xml
diff --git a/src/deviceModelLibrary/Diode/LED.lib b/library/deviceModelLibrary/Diode/LED.lib
index 000831b2..000831b2 100644
--- a/src/deviceModelLibrary/Diode/LED.lib
+++ b/library/deviceModelLibrary/Diode/LED.lib
diff --git a/src/deviceModelLibrary/Diode/LED.xml b/library/deviceModelLibrary/Diode/LED.xml
index 91eb9169..91eb9169 100644
--- a/src/deviceModelLibrary/Diode/LED.xml
+++ b/library/deviceModelLibrary/Diode/LED.xml
diff --git a/src/deviceModelLibrary/Diode/PowerDiode.lib b/library/deviceModelLibrary/Diode/PowerDiode.lib
index a2f61dce..a2f61dce 100644
--- a/src/deviceModelLibrary/Diode/PowerDiode.lib
+++ b/library/deviceModelLibrary/Diode/PowerDiode.lib
diff --git a/src/deviceModelLibrary/Diode/PowerDiode.xml b/library/deviceModelLibrary/Diode/PowerDiode.xml
index 06dceda1..06dceda1 100644
--- a/src/deviceModelLibrary/Diode/PowerDiode.xml
+++ b/library/deviceModelLibrary/Diode/PowerDiode.xml
diff --git a/src/deviceModelLibrary/Diode/ZenerD1N750.lib b/library/deviceModelLibrary/Diode/ZenerD1N750.lib
index 890c37fe..890c37fe 100644
--- a/src/deviceModelLibrary/Diode/ZenerD1N750.lib
+++ b/library/deviceModelLibrary/Diode/ZenerD1N750.lib
diff --git a/src/deviceModelLibrary/Diode/ZenerD1N750.xml b/library/deviceModelLibrary/Diode/ZenerD1N750.xml
index 546d1156..546d1156 100644
--- a/src/deviceModelLibrary/Diode/ZenerD1N750.xml
+++ b/library/deviceModelLibrary/Diode/ZenerD1N750.xml
diff --git a/src/deviceModelLibrary/IGBT/NIGBT.lib b/library/deviceModelLibrary/IGBT/NIGBT.lib
index 86cd1b4e..86cd1b4e 100644
--- a/src/deviceModelLibrary/IGBT/NIGBT.lib
+++ b/library/deviceModelLibrary/IGBT/NIGBT.lib
diff --git a/src/deviceModelLibrary/IGBT/NIGBT.xml b/library/deviceModelLibrary/IGBT/NIGBT.xml
index 38d9d094..38d9d094 100644
--- a/src/deviceModelLibrary/IGBT/NIGBT.xml
+++ b/library/deviceModelLibrary/IGBT/NIGBT.xml
diff --git a/src/deviceModelLibrary/IGBT/PIGBT.lib b/library/deviceModelLibrary/IGBT/PIGBT.lib
index d4f9e814..d4f9e814 100644
--- a/src/deviceModelLibrary/IGBT/PIGBT.lib
+++ b/library/deviceModelLibrary/IGBT/PIGBT.lib
diff --git a/src/deviceModelLibrary/IGBT/PIGBT.xml b/library/deviceModelLibrary/IGBT/PIGBT.xml
index 1e57f2e3..1e57f2e3 100644
--- a/src/deviceModelLibrary/IGBT/PIGBT.xml
+++ b/library/deviceModelLibrary/IGBT/PIGBT.xml
diff --git a/src/SubcircuitLibrary/LM108/NJF.lib b/library/deviceModelLibrary/JFET/NJF.lib
index dbb2cbae..dbb2cbae 100644
--- a/src/SubcircuitLibrary/LM108/NJF.lib
+++ b/library/deviceModelLibrary/JFET/NJF.lib
diff --git a/src/deviceModelLibrary/JFET/NJF.xml b/library/deviceModelLibrary/JFET/NJF.xml
index 94753691..94753691 100644
--- a/src/deviceModelLibrary/JFET/NJF.xml
+++ b/library/deviceModelLibrary/JFET/NJF.xml
diff --git a/src/deviceModelLibrary/JFET/PJF.lib b/library/deviceModelLibrary/JFET/PJF.lib
index 5589571d..5589571d 100644
--- a/src/deviceModelLibrary/JFET/PJF.lib
+++ b/library/deviceModelLibrary/JFET/PJF.lib
diff --git a/src/deviceModelLibrary/JFET/PJF.xml b/library/deviceModelLibrary/JFET/PJF.xml
index f682f8cb..f682f8cb 100644
--- a/src/deviceModelLibrary/JFET/PJF.xml
+++ b/library/deviceModelLibrary/JFET/PJF.xml
diff --git a/src/deviceModelLibrary/MOS/NMOS-0.5um.lib b/library/deviceModelLibrary/MOS/NMOS-0.5um.lib
index 2e6f4635..2e6f4635 100644
--- a/src/deviceModelLibrary/MOS/NMOS-0.5um.lib
+++ b/library/deviceModelLibrary/MOS/NMOS-0.5um.lib
diff --git a/src/deviceModelLibrary/MOS/NMOS-0.5um.xml b/library/deviceModelLibrary/MOS/NMOS-0.5um.xml
index 08fdf0e3..08fdf0e3 100644
--- a/src/deviceModelLibrary/MOS/NMOS-0.5um.xml
+++ b/library/deviceModelLibrary/MOS/NMOS-0.5um.xml
diff --git a/src/deviceModelLibrary/MOS/NMOS-180nm.lib b/library/deviceModelLibrary/MOS/NMOS-180nm.lib
index 51e9b119..51e9b119 100644
--- a/src/deviceModelLibrary/MOS/NMOS-180nm.lib
+++ b/library/deviceModelLibrary/MOS/NMOS-180nm.lib
diff --git a/src/deviceModelLibrary/MOS/NMOS-180nm.xml b/library/deviceModelLibrary/MOS/NMOS-180nm.xml
index d0249bb6..d0249bb6 100644
--- a/src/deviceModelLibrary/MOS/NMOS-180nm.xml
+++ b/library/deviceModelLibrary/MOS/NMOS-180nm.xml
diff --git a/src/deviceModelLibrary/MOS/NMOS-5um.lib b/library/deviceModelLibrary/MOS/NMOS-5um.lib
index a237e1fe..a237e1fe 100644
--- a/src/deviceModelLibrary/MOS/NMOS-5um.lib
+++ b/library/deviceModelLibrary/MOS/NMOS-5um.lib
diff --git a/src/deviceModelLibrary/MOS/NMOS-5um.xml b/library/deviceModelLibrary/MOS/NMOS-5um.xml
index 358fbdbe..358fbdbe 100644
--- a/src/deviceModelLibrary/MOS/NMOS-5um.xml
+++ b/library/deviceModelLibrary/MOS/NMOS-5um.xml
diff --git a/src/deviceModelLibrary/MOS/PMOS-0.5um.lib b/library/deviceModelLibrary/MOS/PMOS-0.5um.lib
index 848e8b05..848e8b05 100644
--- a/src/deviceModelLibrary/MOS/PMOS-0.5um.lib
+++ b/library/deviceModelLibrary/MOS/PMOS-0.5um.lib
diff --git a/src/deviceModelLibrary/MOS/PMOS-0.5um.xml b/library/deviceModelLibrary/MOS/PMOS-0.5um.xml
index 013d461c..013d461c 100644
--- a/src/deviceModelLibrary/MOS/PMOS-0.5um.xml
+++ b/library/deviceModelLibrary/MOS/PMOS-0.5um.xml
diff --git a/src/deviceModelLibrary/MOS/PMOS-180nm.lib b/library/deviceModelLibrary/MOS/PMOS-180nm.lib
index 032b5b95..032b5b95 100644
--- a/src/deviceModelLibrary/MOS/PMOS-180nm.lib
+++ b/library/deviceModelLibrary/MOS/PMOS-180nm.lib
diff --git a/src/deviceModelLibrary/MOS/PMOS-180nm.xml b/library/deviceModelLibrary/MOS/PMOS-180nm.xml
index 6696752d..6696752d 100644
--- a/src/deviceModelLibrary/MOS/PMOS-180nm.xml
+++ b/library/deviceModelLibrary/MOS/PMOS-180nm.xml
diff --git a/src/deviceModelLibrary/MOS/PMOS-5um.lib b/library/deviceModelLibrary/MOS/PMOS-5um.lib
index 9c3ed976..9c3ed976 100644
--- a/src/deviceModelLibrary/MOS/PMOS-5um.lib
+++ b/library/deviceModelLibrary/MOS/PMOS-5um.lib
diff --git a/src/deviceModelLibrary/MOS/PMOS-5um.xml b/library/deviceModelLibrary/MOS/PMOS-5um.xml
index f68bada2..f68bada2 100644
--- a/src/deviceModelLibrary/MOS/PMOS-5um.xml
+++ b/library/deviceModelLibrary/MOS/PMOS-5um.xml
diff --git a/src/deviceModelLibrary/Misc/CORE.lib b/library/deviceModelLibrary/Misc/CORE.lib
index a7581029..a7581029 100644
--- a/src/deviceModelLibrary/Misc/CORE.lib
+++ b/library/deviceModelLibrary/Misc/CORE.lib
diff --git a/src/deviceModelLibrary/Misc/CORE.xml b/library/deviceModelLibrary/Misc/CORE.xml
index c95d9db0..c95d9db0 100644
--- a/src/deviceModelLibrary/Misc/CORE.xml
+++ b/library/deviceModelLibrary/Misc/CORE.xml
diff --git a/src/deviceModelLibrary/Templates/CORE.lib b/library/deviceModelLibrary/Templates/CORE.lib
index a7581029..a7581029 100644
--- a/src/deviceModelLibrary/Templates/CORE.lib
+++ b/library/deviceModelLibrary/Templates/CORE.lib
diff --git a/src/deviceModelLibrary/Templates/CORE.xml b/library/deviceModelLibrary/Templates/CORE.xml
index c95d9db0..c95d9db0 100644
--- a/src/deviceModelLibrary/Templates/CORE.xml
+++ b/library/deviceModelLibrary/Templates/CORE.xml
diff --git a/src/deviceModelLibrary/Diode/D.lib b/library/deviceModelLibrary/Templates/D.lib
index 8a7fb4da..8a7fb4da 100644
--- a/src/deviceModelLibrary/Diode/D.lib
+++ b/library/deviceModelLibrary/Templates/D.lib
diff --git a/src/deviceModelLibrary/Templates/D.xml b/library/deviceModelLibrary/Templates/D.xml
index 8b6b14c8..8b6b14c8 100644
--- a/src/deviceModelLibrary/Templates/D.xml
+++ b/library/deviceModelLibrary/Templates/D.xml
diff --git a/src/deviceModelLibrary/Templates/NIGBT.lib b/library/deviceModelLibrary/Templates/NIGBT.lib
index 8c09dcbc..8c09dcbc 100644
--- a/src/deviceModelLibrary/Templates/NIGBT.lib
+++ b/library/deviceModelLibrary/Templates/NIGBT.lib
diff --git a/src/deviceModelLibrary/Templates/NIGBT.xml b/library/deviceModelLibrary/Templates/NIGBT.xml
index 97f33196..97f33196 100644
--- a/src/deviceModelLibrary/Templates/NIGBT.xml
+++ b/library/deviceModelLibrary/Templates/NIGBT.xml
diff --git a/src/deviceModelLibrary/JFET/NJF.lib b/library/deviceModelLibrary/Templates/NJF.lib
index dbb2cbae..dbb2cbae 100644
--- a/src/deviceModelLibrary/JFET/NJF.lib
+++ b/library/deviceModelLibrary/Templates/NJF.lib
diff --git a/src/deviceModelLibrary/Templates/NJF.xml b/library/deviceModelLibrary/Templates/NJF.xml
index 94753691..94753691 100644
--- a/src/deviceModelLibrary/Templates/NJF.xml
+++ b/library/deviceModelLibrary/Templates/NJF.xml
diff --git a/src/deviceModelLibrary/Templates/NMOS-0.5um.lib b/library/deviceModelLibrary/Templates/NMOS-0.5um.lib
index 2e6f4635..2e6f4635 100644
--- a/src/deviceModelLibrary/Templates/NMOS-0.5um.lib
+++ b/library/deviceModelLibrary/Templates/NMOS-0.5um.lib
diff --git a/src/deviceModelLibrary/Templates/NMOS-0.5um.xml b/library/deviceModelLibrary/Templates/NMOS-0.5um.xml
index 08fdf0e3..08fdf0e3 100644
--- a/src/deviceModelLibrary/Templates/NMOS-0.5um.xml
+++ b/library/deviceModelLibrary/Templates/NMOS-0.5um.xml
diff --git a/src/deviceModelLibrary/Templates/NMOS-180nm.lib b/library/deviceModelLibrary/Templates/NMOS-180nm.lib
index 51e9b119..51e9b119 100644
--- a/src/deviceModelLibrary/Templates/NMOS-180nm.lib
+++ b/library/deviceModelLibrary/Templates/NMOS-180nm.lib
diff --git a/src/deviceModelLibrary/Templates/NMOS-180nm.xml b/library/deviceModelLibrary/Templates/NMOS-180nm.xml
index d0249bb6..d0249bb6 100644
--- a/src/deviceModelLibrary/Templates/NMOS-180nm.xml
+++ b/library/deviceModelLibrary/Templates/NMOS-180nm.xml
diff --git a/src/deviceModelLibrary/Templates/NMOS-5um.lib b/library/deviceModelLibrary/Templates/NMOS-5um.lib
index a237e1fe..a237e1fe 100644
--- a/src/deviceModelLibrary/Templates/NMOS-5um.lib
+++ b/library/deviceModelLibrary/Templates/NMOS-5um.lib
diff --git a/src/deviceModelLibrary/Templates/NMOS-5um.xml b/library/deviceModelLibrary/Templates/NMOS-5um.xml
index 358fbdbe..358fbdbe 100644
--- a/src/deviceModelLibrary/Templates/NMOS-5um.xml
+++ b/library/deviceModelLibrary/Templates/NMOS-5um.xml
diff --git a/src/SubcircuitLibrary/LM565/NPN.lib b/library/deviceModelLibrary/Templates/NPN.lib
index 6509fe7a..6509fe7a 100644
--- a/src/SubcircuitLibrary/LM565/NPN.lib
+++ b/library/deviceModelLibrary/Templates/NPN.lib
diff --git a/src/deviceModelLibrary/Templates/NPN.xml b/library/deviceModelLibrary/Templates/NPN.xml
index b2698bb1..b2698bb1 100644
--- a/src/deviceModelLibrary/Templates/NPN.xml
+++ b/library/deviceModelLibrary/Templates/NPN.xml
diff --git a/src/deviceModelLibrary/Templates/PIGBT.lib b/library/deviceModelLibrary/Templates/PIGBT.lib
index d4f9e814..d4f9e814 100644
--- a/src/deviceModelLibrary/Templates/PIGBT.lib
+++ b/library/deviceModelLibrary/Templates/PIGBT.lib
diff --git a/src/deviceModelLibrary/Templates/PIGBT.xml b/library/deviceModelLibrary/Templates/PIGBT.xml
index 1e57f2e3..1e57f2e3 100644
--- a/src/deviceModelLibrary/Templates/PIGBT.xml
+++ b/library/deviceModelLibrary/Templates/PIGBT.xml
diff --git a/src/deviceModelLibrary/Templates/PJF.lib b/library/deviceModelLibrary/Templates/PJF.lib
index 5589571d..5589571d 100644
--- a/src/deviceModelLibrary/Templates/PJF.lib
+++ b/library/deviceModelLibrary/Templates/PJF.lib
diff --git a/src/deviceModelLibrary/Templates/PJF.xml b/library/deviceModelLibrary/Templates/PJF.xml
index f682f8cb..f682f8cb 100644
--- a/src/deviceModelLibrary/Templates/PJF.xml
+++ b/library/deviceModelLibrary/Templates/PJF.xml
diff --git a/src/deviceModelLibrary/Templates/PMOS-0.5um.lib b/library/deviceModelLibrary/Templates/PMOS-0.5um.lib
index 848e8b05..848e8b05 100644
--- a/src/deviceModelLibrary/Templates/PMOS-0.5um.lib
+++ b/library/deviceModelLibrary/Templates/PMOS-0.5um.lib
diff --git a/src/deviceModelLibrary/Templates/PMOS-0.5um.xml b/library/deviceModelLibrary/Templates/PMOS-0.5um.xml
index 013d461c..013d461c 100644
--- a/src/deviceModelLibrary/Templates/PMOS-0.5um.xml
+++ b/library/deviceModelLibrary/Templates/PMOS-0.5um.xml
diff --git a/src/deviceModelLibrary/Templates/PMOS-180nm.lib b/library/deviceModelLibrary/Templates/PMOS-180nm.lib
index 032b5b95..032b5b95 100644
--- a/src/deviceModelLibrary/Templates/PMOS-180nm.lib
+++ b/library/deviceModelLibrary/Templates/PMOS-180nm.lib
diff --git a/src/deviceModelLibrary/Templates/PMOS-180nm.xml b/library/deviceModelLibrary/Templates/PMOS-180nm.xml
index 6696752d..6696752d 100644
--- a/src/deviceModelLibrary/Templates/PMOS-180nm.xml
+++ b/library/deviceModelLibrary/Templates/PMOS-180nm.xml
diff --git a/src/deviceModelLibrary/Templates/PMOS-5um.lib b/library/deviceModelLibrary/Templates/PMOS-5um.lib
index 9c3ed976..9c3ed976 100644
--- a/src/deviceModelLibrary/Templates/PMOS-5um.lib
+++ b/library/deviceModelLibrary/Templates/PMOS-5um.lib
diff --git a/src/deviceModelLibrary/Templates/PMOS-5um.xml b/library/deviceModelLibrary/Templates/PMOS-5um.xml
index f68bada2..f68bada2 100644
--- a/src/deviceModelLibrary/Templates/PMOS-5um.xml
+++ b/library/deviceModelLibrary/Templates/PMOS-5um.xml
diff --git a/src/SubcircuitLibrary/LM565/PNP.lib b/library/deviceModelLibrary/Templates/PNP.lib
index 7edda0ea..7edda0ea 100644
--- a/src/SubcircuitLibrary/LM565/PNP.lib
+++ b/library/deviceModelLibrary/Templates/PNP.lib
diff --git a/src/deviceModelLibrary/Templates/PNP.xml b/library/deviceModelLibrary/Templates/PNP.xml
index 681b3fd9..681b3fd9 100644
--- a/src/deviceModelLibrary/Templates/PNP.xml
+++ b/library/deviceModelLibrary/Templates/PNP.xml
diff --git a/src/deviceModelLibrary/Transistor/BC547B.lib b/library/deviceModelLibrary/Transistor/BC547B.lib
index 723537a7..723537a7 100644
--- a/src/deviceModelLibrary/Transistor/BC547B.lib
+++ b/library/deviceModelLibrary/Transistor/BC547B.lib
diff --git a/src/deviceModelLibrary/Transistor/BC547B.xml b/library/deviceModelLibrary/Transistor/BC547B.xml
index da06e5c4..da06e5c4 100644
--- a/src/deviceModelLibrary/Transistor/BC547B.xml
+++ b/library/deviceModelLibrary/Transistor/BC547B.xml
diff --git a/src/SubcircuitLibrary/LM7812/NPN.lib b/library/deviceModelLibrary/Transistor/NPN.lib
index 6509fe7a..6509fe7a 100644
--- a/src/SubcircuitLibrary/LM7812/NPN.lib
+++ b/library/deviceModelLibrary/Transistor/NPN.lib
diff --git a/src/deviceModelLibrary/Transistor/NPN.xml b/library/deviceModelLibrary/Transistor/NPN.xml
index ee2abcbc..ee2abcbc 100644
--- a/src/deviceModelLibrary/Transistor/NPN.xml
+++ b/library/deviceModelLibrary/Transistor/NPN.xml
diff --git a/src/SubcircuitLibrary/LM7812/PNP.lib b/library/deviceModelLibrary/Transistor/PNP.lib
index 7edda0ea..7edda0ea 100644
--- a/src/SubcircuitLibrary/LM7812/PNP.lib
+++ b/library/deviceModelLibrary/Transistor/PNP.lib
diff --git a/src/deviceModelLibrary/Transistor/PNP.xml b/library/deviceModelLibrary/Transistor/PNP.xml
index 681b3fd9..681b3fd9 100644
--- a/src/deviceModelLibrary/Transistor/PNP.xml
+++ b/library/deviceModelLibrary/Transistor/PNP.xml
diff --git a/src/deviceModelLibrary/User Libraries/userDiode.lib b/library/deviceModelLibrary/User Libraries/userDiode.lib
index ef18bb50..ef18bb50 100644
--- a/src/deviceModelLibrary/User Libraries/userDiode.lib
+++ b/library/deviceModelLibrary/User Libraries/userDiode.lib
diff --git a/src/deviceModelLibrary/User Libraries/userDiode.xml b/library/deviceModelLibrary/User Libraries/userDiode.xml
index d8584e1d..d8584e1d 100644
--- a/src/deviceModelLibrary/User Libraries/userDiode.xml
+++ b/library/deviceModelLibrary/User Libraries/userDiode.xml
diff --git a/library/kicadLibrary.tar.xz b/library/kicadLibrary.tar.xz
new file mode 100644
index 00000000..338d3fb9
--- /dev/null
+++ b/library/kicadLibrary.tar.xz
diff --git a/src/modelParamXML/Analog/aswitch.xml b/library/modelParamXML/Analog/aswitch.xml
index fe50ecd3..fe50ecd3 100644
--- a/src/modelParamXML/Analog/aswitch.xml
+++ b/library/modelParamXML/Analog/aswitch.xml
diff --git a/src/modelParamXML/Analog/climit.xml b/library/modelParamXML/Analog/climit.xml
index 0d1f9c7e..0d1f9c7e 100644
--- a/src/modelParamXML/Analog/climit.xml
+++ b/library/modelParamXML/Analog/climit.xml
diff --git a/src/modelParamXML/Analog/d_dt.xml b/library/modelParamXML/Analog/d_dt.xml
index 65494392..65494392 100644
--- a/src/modelParamXML/Analog/d_dt.xml
+++ b/library/modelParamXML/Analog/d_dt.xml
diff --git a/src/modelParamXML/Analog/divide.xml b/library/modelParamXML/Analog/divide.xml
index d501ae4e..d501ae4e 100644
--- a/src/modelParamXML/Analog/divide.xml
+++ b/library/modelParamXML/Analog/divide.xml
diff --git a/src/modelParamXML/Analog/gain.xml b/library/modelParamXML/Analog/gain.xml
index a8656072..a8656072 100644
--- a/src/modelParamXML/Analog/gain.xml
+++ b/library/modelParamXML/Analog/gain.xml
diff --git a/src/modelParamXML/Analog/hyst.xml b/library/modelParamXML/Analog/hyst.xml
index 56a60c0f..56a60c0f 100644
--- a/src/modelParamXML/Analog/hyst.xml
+++ b/library/modelParamXML/Analog/hyst.xml
diff --git a/src/modelParamXML/Analog/ilimit.xml b/library/modelParamXML/Analog/ilimit.xml
index 32b2149f..32b2149f 100644
--- a/src/modelParamXML/Analog/ilimit.xml
+++ b/library/modelParamXML/Analog/ilimit.xml
diff --git a/src/modelParamXML/Analog/int.xml b/library/modelParamXML/Analog/int.xml
index 6ccec625..6ccec625 100644
--- a/src/modelParamXML/Analog/int.xml
+++ b/library/modelParamXML/Analog/int.xml
diff --git a/src/modelParamXML/Analog/limit.xml b/library/modelParamXML/Analog/limit.xml
index c2a1f382..c2a1f382 100644
--- a/src/modelParamXML/Analog/limit.xml
+++ b/library/modelParamXML/Analog/limit.xml
diff --git a/src/modelParamXML/Analog/mult.xml b/library/modelParamXML/Analog/mult.xml
index e41463ff..e41463ff 100644
--- a/src/modelParamXML/Analog/mult.xml
+++ b/library/modelParamXML/Analog/mult.xml
diff --git a/src/modelParamXML/Analog/slew.xml b/library/modelParamXML/Analog/slew.xml
index 2eafde2d..2eafde2d 100644
--- a/src/modelParamXML/Analog/slew.xml
+++ b/library/modelParamXML/Analog/slew.xml
diff --git a/src/modelParamXML/Analog/summer.xml b/library/modelParamXML/Analog/summer.xml
index d9856b62..d9856b62 100644
--- a/src/modelParamXML/Analog/summer.xml
+++ b/library/modelParamXML/Analog/summer.xml
diff --git a/src/modelParamXML/Analog/temp.xml b/library/modelParamXML/Analog/temp.xml
index 20f00004..20f00004 100644
--- a/src/modelParamXML/Analog/temp.xml
+++ b/library/modelParamXML/Analog/temp.xml
diff --git a/src/modelParamXML/Analog/zener.xml b/library/modelParamXML/Analog/zener.xml
index c6e32c36..c6e32c36 100644
--- a/src/modelParamXML/Analog/zener.xml
+++ b/library/modelParamXML/Analog/zener.xml
diff --git a/src/modelParamXML/Digital/d_and.xml b/library/modelParamXML/Digital/d_and.xml
index cd4a1c76..cd4a1c76 100644
--- a/src/modelParamXML/Digital/d_and.xml
+++ b/library/modelParamXML/Digital/d_and.xml
diff --git a/src/modelParamXML/Digital/d_buffer.xml b/library/modelParamXML/Digital/d_buffer.xml
index e0661910..e0661910 100644
--- a/src/modelParamXML/Digital/d_buffer.xml
+++ b/library/modelParamXML/Digital/d_buffer.xml
diff --git a/src/modelParamXML/Digital/d_dff.xml b/library/modelParamXML/Digital/d_dff.xml
index d5010e02..d5010e02 100644
--- a/src/modelParamXML/Digital/d_dff.xml
+++ b/library/modelParamXML/Digital/d_dff.xml
diff --git a/src/modelParamXML/Digital/d_dlatch.xml b/library/modelParamXML/Digital/d_dlatch.xml
index 34e26418..34e26418 100644
--- a/src/modelParamXML/Digital/d_dlatch.xml
+++ b/library/modelParamXML/Digital/d_dlatch.xml
diff --git a/src/modelParamXML/Digital/d_fdiv.xml b/library/modelParamXML/Digital/d_fdiv.xml
index bab4f0d6..bab4f0d6 100644
--- a/src/modelParamXML/Digital/d_fdiv.xml
+++ b/library/modelParamXML/Digital/d_fdiv.xml
diff --git a/src/modelParamXML/Digital/d_inverter.xml b/library/modelParamXML/Digital/d_inverter.xml
index e104712a..e104712a 100644
--- a/src/modelParamXML/Digital/d_inverter.xml
+++ b/library/modelParamXML/Digital/d_inverter.xml
diff --git a/src/modelParamXML/Digital/d_jkff.xml b/library/modelParamXML/Digital/d_jkff.xml
index 78ce59cd..78ce59cd 100644
--- a/src/modelParamXML/Digital/d_jkff.xml
+++ b/library/modelParamXML/Digital/d_jkff.xml
diff --git a/src/modelParamXML/Digital/d_nand.xml b/library/modelParamXML/Digital/d_nand.xml
index 0041419a..0041419a 100644
--- a/src/modelParamXML/Digital/d_nand.xml
+++ b/library/modelParamXML/Digital/d_nand.xml
diff --git a/src/modelParamXML/Digital/d_nor.xml b/library/modelParamXML/Digital/d_nor.xml
index 17a60fd5..17a60fd5 100644
--- a/src/modelParamXML/Digital/d_nor.xml
+++ b/library/modelParamXML/Digital/d_nor.xml
diff --git a/src/modelParamXML/Digital/d_or.xml b/library/modelParamXML/Digital/d_or.xml
index 8362e1b3..8362e1b3 100644
--- a/src/modelParamXML/Digital/d_or.xml
+++ b/library/modelParamXML/Digital/d_or.xml
diff --git a/src/modelParamXML/Digital/d_pulldown.xml b/library/modelParamXML/Digital/d_pulldown.xml
index affd1745..affd1745 100644
--- a/src/modelParamXML/Digital/d_pulldown.xml
+++ b/library/modelParamXML/Digital/d_pulldown.xml
diff --git a/src/modelParamXML/Digital/d_pullup.xml b/library/modelParamXML/Digital/d_pullup.xml
index 1ce491ff..1ce491ff 100644
--- a/src/modelParamXML/Digital/d_pullup.xml
+++ b/library/modelParamXML/Digital/d_pullup.xml
diff --git a/src/modelParamXML/Digital/d_ram.xml b/library/modelParamXML/Digital/d_ram.xml
index 73074201..73074201 100644
--- a/src/modelParamXML/Digital/d_ram.xml
+++ b/library/modelParamXML/Digital/d_ram.xml
diff --git a/src/modelParamXML/Digital/d_source.xml b/library/modelParamXML/Digital/d_source.xml
index 9bd4347c..9bd4347c 100644
--- a/src/modelParamXML/Digital/d_source.xml
+++ b/library/modelParamXML/Digital/d_source.xml
diff --git a/src/modelParamXML/Digital/d_srff.xml b/library/modelParamXML/Digital/d_srff.xml
index 9eb65175..9eb65175 100644
--- a/src/modelParamXML/Digital/d_srff.xml
+++ b/library/modelParamXML/Digital/d_srff.xml
diff --git a/src/modelParamXML/Digital/d_srlatch.xml b/library/modelParamXML/Digital/d_srlatch.xml
index 35dbc061..35dbc061 100644
--- a/src/modelParamXML/Digital/d_srlatch.xml
+++ b/library/modelParamXML/Digital/d_srlatch.xml
diff --git a/src/modelParamXML/Digital/d_state.xml b/library/modelParamXML/Digital/d_state.xml
index 2290a117..2290a117 100644
--- a/src/modelParamXML/Digital/d_state.xml
+++ b/library/modelParamXML/Digital/d_state.xml
diff --git a/src/modelParamXML/Digital/d_tff.xml b/library/modelParamXML/Digital/d_tff.xml
index ed519d2c..ed519d2c 100644
--- a/src/modelParamXML/Digital/d_tff.xml
+++ b/library/modelParamXML/Digital/d_tff.xml
diff --git a/src/modelParamXML/Digital/d_tristate.xml b/library/modelParamXML/Digital/d_tristate.xml
index 2835da30..2835da30 100644
--- a/src/modelParamXML/Digital/d_tristate.xml
+++ b/library/modelParamXML/Digital/d_tristate.xml
diff --git a/src/modelParamXML/Digital/d_xnor.xml b/library/modelParamXML/Digital/d_xnor.xml
index 4b27bc4c..4b27bc4c 100644
--- a/src/modelParamXML/Digital/d_xnor.xml
+++ b/library/modelParamXML/Digital/d_xnor.xml
diff --git a/src/modelParamXML/Digital/d_xor.xml b/library/modelParamXML/Digital/d_xor.xml
index ab238c6d..ab238c6d 100644
--- a/src/modelParamXML/Digital/d_xor.xml
+++ b/library/modelParamXML/Digital/d_xor.xml
diff --git a/src/modelParamXML/Hybrid/adc_bridge_1.xml b/library/modelParamXML/Hybrid/adc_bridge_1.xml
index 8d84cd01..8d84cd01 100644
--- a/src/modelParamXML/Hybrid/adc_bridge_1.xml
+++ b/library/modelParamXML/Hybrid/adc_bridge_1.xml
diff --git a/src/modelParamXML/Hybrid/adc_bridge_2.xml b/library/modelParamXML/Hybrid/adc_bridge_2.xml
index 1e0ced95..1e0ced95 100644
--- a/src/modelParamXML/Hybrid/adc_bridge_2.xml
+++ b/library/modelParamXML/Hybrid/adc_bridge_2.xml
diff --git a/src/modelParamXML/Hybrid/adc_bridge_3.xml b/library/modelParamXML/Hybrid/adc_bridge_3.xml
index 09d41850..09d41850 100644
--- a/src/modelParamXML/Hybrid/adc_bridge_3.xml
+++ b/library/modelParamXML/Hybrid/adc_bridge_3.xml
diff --git a/src/modelParamXML/Hybrid/adc_bridge_4.xml b/library/modelParamXML/Hybrid/adc_bridge_4.xml
index b29201f5..b29201f5 100644
--- a/src/modelParamXML/Hybrid/adc_bridge_4.xml
+++ b/library/modelParamXML/Hybrid/adc_bridge_4.xml
diff --git a/src/modelParamXML/Hybrid/adc_bridge_5.xml b/library/modelParamXML/Hybrid/adc_bridge_5.xml
index bdacf1db..bdacf1db 100644
--- a/src/modelParamXML/Hybrid/adc_bridge_5.xml
+++ b/library/modelParamXML/Hybrid/adc_bridge_5.xml
diff --git a/src/modelParamXML/Hybrid/adc_bridge_6.xml b/library/modelParamXML/Hybrid/adc_bridge_6.xml
index ee60247f..ee60247f 100644
--- a/src/modelParamXML/Hybrid/adc_bridge_6.xml
+++ b/library/modelParamXML/Hybrid/adc_bridge_6.xml
diff --git a/src/modelParamXML/Hybrid/adc_bridge_7.xml b/library/modelParamXML/Hybrid/adc_bridge_7.xml
index df96b366..df96b366 100644
--- a/src/modelParamXML/Hybrid/adc_bridge_7.xml
+++ b/library/modelParamXML/Hybrid/adc_bridge_7.xml
diff --git a/src/modelParamXML/Hybrid/adc_bridge_8.xml b/library/modelParamXML/Hybrid/adc_bridge_8.xml
index cdd7afaa..cdd7afaa 100644
--- a/src/modelParamXML/Hybrid/adc_bridge_8.xml
+++ b/library/modelParamXML/Hybrid/adc_bridge_8.xml
diff --git a/src/modelParamXML/Hybrid/dac_bridge_1.xml b/library/modelParamXML/Hybrid/dac_bridge_1.xml
index c9e4eed1..c9e4eed1 100644
--- a/src/modelParamXML/Hybrid/dac_bridge_1.xml
+++ b/library/modelParamXML/Hybrid/dac_bridge_1.xml
diff --git a/src/modelParamXML/Hybrid/dac_bridge_2.xml b/library/modelParamXML/Hybrid/dac_bridge_2.xml
index c67b22bf..c67b22bf 100644
--- a/src/modelParamXML/Hybrid/dac_bridge_2.xml
+++ b/library/modelParamXML/Hybrid/dac_bridge_2.xml
diff --git a/src/modelParamXML/Hybrid/dac_bridge_3.xml b/library/modelParamXML/Hybrid/dac_bridge_3.xml
index d080f94d..d080f94d 100644
--- a/src/modelParamXML/Hybrid/dac_bridge_3.xml
+++ b/library/modelParamXML/Hybrid/dac_bridge_3.xml
diff --git a/src/modelParamXML/Hybrid/dac_bridge_4.xml b/library/modelParamXML/Hybrid/dac_bridge_4.xml
index 988b575a..988b575a 100644
--- a/src/modelParamXML/Hybrid/dac_bridge_4.xml
+++ b/library/modelParamXML/Hybrid/dac_bridge_4.xml
diff --git a/src/modelParamXML/Hybrid/dac_bridge_5.xml b/library/modelParamXML/Hybrid/dac_bridge_5.xml
index 39d8f2d2..39d8f2d2 100644
--- a/src/modelParamXML/Hybrid/dac_bridge_5.xml
+++ b/library/modelParamXML/Hybrid/dac_bridge_5.xml
diff --git a/src/modelParamXML/Hybrid/dac_bridge_6.xml b/library/modelParamXML/Hybrid/dac_bridge_6.xml
index 2016f971..2016f971 100644
--- a/src/modelParamXML/Hybrid/dac_bridge_6.xml
+++ b/library/modelParamXML/Hybrid/dac_bridge_6.xml
diff --git a/src/modelParamXML/Hybrid/dac_bridge_7.xml b/library/modelParamXML/Hybrid/dac_bridge_7.xml
index 37fb936b..37fb936b 100644
--- a/src/modelParamXML/Hybrid/dac_bridge_7.xml
+++ b/library/modelParamXML/Hybrid/dac_bridge_7.xml
diff --git a/src/modelParamXML/Hybrid/dac_bridge_8.xml b/library/modelParamXML/Hybrid/dac_bridge_8.xml
index 72644ad9..72644ad9 100644
--- a/src/modelParamXML/Hybrid/dac_bridge_8.xml
+++ b/library/modelParamXML/Hybrid/dac_bridge_8.xml
diff --git a/src/modelParamXML/Nghdl/.gitignore b/library/modelParamXML/Nghdl/.gitignore
index 86d0cb27..86d0cb27 100644
--- a/src/modelParamXML/Nghdl/.gitignore
+++ b/library/modelParamXML/Nghdl/.gitignore
diff --git a/src/ngspicetoModelica/Mapping.json b/library/ngspicetoModelica/Mapping.json
index e254d66a..e254d66a 100644
--- a/src/ngspicetoModelica/Mapping.json
+++ b/library/ngspicetoModelica/Mapping.json
diff --git a/src/supportFiles/fp-lib-table b/library/supportFiles/fp-lib-table
index ff605eaf..ff605eaf 100644
--- a/src/supportFiles/fp-lib-table
+++ b/library/supportFiles/fp-lib-table
diff --git a/src/supportFiles/fp-lib-table-online b/library/supportFiles/fp-lib-table-online
index 5b4081ff..5b4081ff 100644
--- a/src/supportFiles/fp-lib-table-online
+++ b/library/supportFiles/fp-lib-table-online
diff --git a/src/SubcircuitLibrary/2bit_upcounter/2bit_upcounter-cache.lib b/src/SubcircuitLibrary/2bit_upcounter/2bit_upcounter-cache.lib
deleted file mode 100644
index b3857f54..00000000
--- a/src/SubcircuitLibrary/2bit_upcounter/2bit_upcounter-cache.lib
+++ /dev/null
@@ -1,62 +0,0 @@
-EESchema-LIBRARY Version 2.3
-#encoding utf-8
-#
-# PORT
-#
-DEF PORT U 0 40 Y Y 26 F N
-F0 "U" 50 100 30 H V C CNN
-F1 "PORT" 0 0 30 H V C CNN
-F2 "" 0 0 60 H V C CNN
-F3 "" 0 0 60 H V C CNN
-DRAW
-A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0
-A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50
-S -100 50 100 -50 0 1 0 N
-X ~ 1 250 0 100 L 30 30 1 1 B
-X ~ 2 250 0 100 L 30 30 2 1 B
-X ~ 3 250 0 100 L 30 30 3 1 B
-X ~ 4 250 0 100 L 30 30 4 1 B
-X ~ 5 250 0 100 L 30 30 5 1 B
-X ~ 6 250 0 100 L 30 30 6 1 B
-X ~ 7 250 0 100 L 30 30 7 1 B
-X ~ 8 250 0 100 L 30 30 8 1 B
-X ~ 9 250 0 100 L 30 30 9 1 B
-X ~ 10 250 0 100 L 30 30 10 1 B
-X ~ 11 250 0 100 L 30 30 11 1 B
-X ~ 12 250 0 100 L 30 30 12 1 B
-X ~ 13 250 0 100 L 30 30 13 1 B
-X ~ 14 250 0 100 L 30 30 14 1 B
-X ~ 15 250 0 100 L 30 30 15 1 B
-X ~ 16 250 0 100 L 30 30 16 1 B
-X ~ 17 250 0 100 L 30 30 17 1 B
-X ~ 18 250 0 100 L 30 30 18 1 B
-X ~ 19 250 0 100 L 30 30 19 1 B
-X ~ 20 250 0 100 L 30 30 20 1 B
-X ~ 21 250 0 100 L 30 30 21 1 B
-X ~ 22 250 0 100 L 30 30 22 1 B
-X ~ 23 250 0 100 L 30 30 23 1 B
-X ~ 24 250 0 100 L 30 30 24 1 B
-X ~ 25 250 0 100 L 30 30 25 1 B
-X ~ 26 250 0 100 L 30 30 26 1 B
-ENDDRAW
-ENDDEF
-#
-# d_dff
-#
-DEF d_dff U 0 40 Y Y 1 F N
-F0 "U" 0 0 60 H V C CNN
-F1 "d_dff" 0 150 60 H V C CNN
-F2 "" 0 0 60 H V C CNN
-F3 "" 0 0 60 H V C CNN
-DRAW
-S 350 450 -350 -400 0 1 0 N
-X Din 1 -550 350 200 R 50 50 1 1 I
-X Clk 2 -550 -300 200 R 50 50 1 1 I C
-X Set 3 0 650 200 D 50 50 1 1 I
-X Reset 4 0 -600 200 U 50 50 1 1 I
-X Dout 5 550 350 200 L 50 50 1 1 O
-X Ndout 6 550 -300 200 L 50 50 1 1 O I
-ENDDRAW
-ENDDEF
-#
-#End Library
diff --git a/src/SubcircuitLibrary/2bit_upcounter/2bit_upcounter.cir b/src/SubcircuitLibrary/2bit_upcounter/2bit_upcounter.cir
deleted file mode 100644
index d5d8760a..00000000
--- a/src/SubcircuitLibrary/2bit_upcounter/2bit_upcounter.cir
+++ /dev/null
@@ -1,13 +0,0 @@
-* /home/mallikarjuna/Downloads/eSim-1.1.2/src/SubcircuitLibrary/2bit_upcounter/2bit_upcounter.cir
-
-* EESchema Netlist Version 1.1 (Spice format) creation date: Sat Jun 22 11:44:38 2019
-
-* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N
-* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0
-
-* Sheet Name: /
-U2  Net-_U2-Pad1_ Net-_U1-Pad1_ Net-_U1-Pad2_ Net-_U1-Pad2_ Net-_U1-Pad3_ Net-_U2-Pad1_ d_dff		
-U3  Net-_U3-Pad1_ Net-_U2-Pad1_ Net-_U1-Pad2_ Net-_U1-Pad2_ Net-_U1-Pad4_ Net-_U3-Pad1_ d_dff		
-U1  Net-_U1-Pad1_ Net-_U1-Pad2_ Net-_U1-Pad3_ Net-_U1-Pad4_ PORT		
-
-.end
diff --git a/src/SubcircuitLibrary/2bit_upcounter/2bit_upcounter.cir.out b/src/SubcircuitLibrary/2bit_upcounter/2bit_upcounter.cir.out
deleted file mode 100644
index 4232f26a..00000000
--- a/src/SubcircuitLibrary/2bit_upcounter/2bit_upcounter.cir.out
+++ /dev/null
@@ -1,20 +0,0 @@
-* /home/mallikarjuna/downloads/esim-1.1.2/src/subcircuitlibrary/2bit_upcounter/2bit_upcounter.cir
-
-* u2  net-_u2-pad1_ net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad2_ net-_u1-pad3_ net-_u2-pad1_ d_dff
-* u3  net-_u3-pad1_ net-_u2-pad1_ net-_u1-pad2_ net-_u1-pad2_ net-_u1-pad4_ net-_u3-pad1_ d_dff
-* u1  net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ port
-a1 net-_u2-pad1_ net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad2_ net-_u1-pad3_ net-_u2-pad1_ u2
-a2 net-_u3-pad1_ net-_u2-pad1_ net-_u1-pad2_ net-_u1-pad2_ net-_u1-pad4_ net-_u3-pad1_ u3
-* Schematic Name: d_dff, NgSpice Name: d_dff
-.model u2 d_dff(ic=0 set_delay=1.0e-9 set_load=1.0e-12 reset_load=1.0e-12 clk_delay=1.0e-9 clk_load=1.0e-12 reset_delay=1.0 data_load=1.0e-12 fall_delay=1.0e-9 rise_delay=1.0e-9 ) 
-* Schematic Name: d_dff, NgSpice Name: d_dff
-.model u3 d_dff(ic=0 set_delay=1.0e-9 set_load=1.0e-12 reset_load=1.0e-12 clk_delay=1.0e-9 clk_load=1.0e-12 reset_delay=1.0 data_load=1.0e-12 fall_delay=1.0e-9 rise_delay=1.0e-9 ) 
-.tran 0e-00 0e-00 0e-00
-
-* Control Statements 
-.control
-run
-print allv > plot_data_v.txt
-print alli > plot_data_i.txt
-.endc
-.end
diff --git a/src/SubcircuitLibrary/2bit_upcounter/2bit_upcounter.pro b/src/SubcircuitLibrary/2bit_upcounter/2bit_upcounter.pro
deleted file mode 100644
index 7fc2f37d..00000000
--- a/src/SubcircuitLibrary/2bit_upcounter/2bit_upcounter.pro
+++ /dev/null
@@ -1,45 +0,0 @@
-update=Sat Jun 22 11:40:56 2019
-version=1
-last_client=eeschema
-[general]
-version=1
-RootSch=
-BoardNm=
-[pcbnew]
-version=1
-LastNetListRead=
-UseCmpFile=1
-PadDrill=0.600000000000
-PadDrillOvalY=0.600000000000
-PadSizeH=1.500000000000
-PadSizeV=1.500000000000
-PcbTextSizeV=1.500000000000
-PcbTextSizeH=1.500000000000
-PcbTextThickness=0.300000000000
-ModuleTextSizeV=1.000000000000
-ModuleTextSizeH=1.000000000000
-ModuleTextSizeThickness=0.150000000000
-SolderMaskClearance=0.000000000000
-SolderMaskMinWidth=0.000000000000
-DrawSegmentWidth=0.200000000000
-BoardOutlineThickness=0.100000000000
-ModuleOutlineThickness=0.150000000000
-[cvpcb]
-version=1
-NetIExt=net
-[eeschema]
-version=1
-LibDir=../../../kicadSchematicLibrary
-[eeschema/libraries]
-LibName1=power
-LibName2=/home/mallikarjuna/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_Analog
-LibName3=/home/mallikarjuna/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_Devices
-LibName4=/home/mallikarjuna/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_Digital
-LibName5=/home/mallikarjuna/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_Hybrid
-LibName6=/home/mallikarjuna/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_Miscellaneous
-LibName7=/home/mallikarjuna/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_Plot
-LibName8=/home/mallikarjuna/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_Power
-LibName9=/home/mallikarjuna/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_Sources
-LibName10=/home/mallikarjuna/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_Subckt
-LibName11=/home/mallikarjuna/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_User
-
diff --git a/src/SubcircuitLibrary/2bit_upcounter/2bit_upcounter.sch b/src/SubcircuitLibrary/2bit_upcounter/2bit_upcounter.sch
deleted file mode 100644
index 45c6e1de..00000000
--- a/src/SubcircuitLibrary/2bit_upcounter/2bit_upcounter.sch
+++ /dev/null
@@ -1,151 +0,0 @@
-EESchema Schematic File Version 2
-LIBS:power
-LIBS:eSim_Analog
-LIBS:eSim_Devices
-LIBS:eSim_Digital
-LIBS:eSim_Hybrid
-LIBS:eSim_Miscellaneous
-LIBS:eSim_Plot
-LIBS:eSim_Power
-LIBS:eSim_Sources
-LIBS:eSim_Subckt
-LIBS:eSim_User
-LIBS:2bit-Up_counter-cache
-EELAYER 25 0
-EELAYER END
-$Descr A4 11693 8268
-encoding utf-8
-Sheet 1 1
-Title ""
-Date ""
-Rev ""
-Comp ""
-Comment1 ""
-Comment2 ""
-Comment3 ""
-Comment4 ""
-$EndDescr
-$Comp
-L d_dff U2
-U 1 1 5D0DC6F1
-P 3900 3400
-F 0 "U2" H 3900 3400 60  0000 C CNN
-F 1 "d_dff" H 3900 3550 60  0000 C CNN
-F 2 "" H 3900 3400 60  0000 C CNN
-F 3 "" H 3900 3400 60  0000 C CNN
-	1    3900 3400
-	1    0    0    -1  
-$EndComp
-$Comp
-L d_dff U3
-U 1 1 5D0DC6F2
-P 5750 3400
-F 0 "U3" H 5750 3400 60  0000 C CNN
-F 1 "d_dff" H 5750 3550 60  0000 C CNN
-F 2 "" H 5750 3400 60  0000 C CNN
-F 3 "" H 5750 3400 60  0000 C CNN
-	1    5750 3400
-	1    0    0    -1  
-$EndComp
-Wire Wire Line
-	3900 2750 3900 2500
-Wire Wire Line
-	3900 2500 5750 2500
-Wire Wire Line
-	5750 2500 5750 2750
-Wire Wire Line
-	3900 4000 3900 4300
-Wire Wire Line
-	3900 4300 5750 4300
-Wire Wire Line
-	5750 4300 5750 4000
-Wire Wire Line
-	4850 2500 4850 4800
-Connection ~ 4850 4300
-Connection ~ 4850 2500
-Wire Wire Line
-	4850 4800 5250 4800
-Wire Wire Line
-	3350 3700 2600 3700
-Wire Wire Line
-	3350 3050 3150 3050
-Wire Wire Line
-	3150 3050 3150 2350
-Wire Wire Line
-	3150 2350 4600 2350
-Wire Wire Line
-	4600 2350 4600 3700
-Wire Wire Line
-	4450 3700 5200 3700
-Connection ~ 4600 3700
-Wire Wire Line
-	5000 3050 5200 3050
-Wire Wire Line
-	5000 3050 5000 2350
-Wire Wire Line
-	5000 2350 6450 2350
-Wire Wire Line
-	6450 2350 6450 3700
-Wire Wire Line
-	6450 3700 6300 3700
-Wire Wire Line
-	4450 3050 4500 3050
-Wire Wire Line
-	4500 3050 4500 2600
-Wire Wire Line
-	4500 2600 6800 2600
-Wire Wire Line
-	6300 3050 7050 3050
-$Comp
-L PORT U1
-U 1 1 5D0DC6F3
-P 2350 3700
-F 0 "U1" H 2400 3800 30  0000 C CNN
-F 1 "PORT" H 2350 3700 30  0000 C CNN
-F 2 "" H 2350 3700 60  0000 C CNN
-F 3 "" H 2350 3700 60  0000 C CNN
-	1    2350 3700
-	1    0    0    -1  
-$EndComp
-$Comp
-L PORT U1
-U 2 1 5D0DC6F4
-P 5500 4800
-F 0 "U1" H 5550 4900 30  0000 C CNN
-F 1 "PORT" H 5500 4800 30  0000 C CNN
-F 2 "" H 5500 4800 60  0000 C CNN
-F 3 "" H 5500 4800 60  0000 C CNN
-	2    5500 4800
-	-1   0    0    1   
-$EndComp
-$Comp
-L PORT U1
-U 3 1 5D0DC6F5
-P 7050 2600
-F 0 "U1" H 7100 2700 30  0000 C CNN
-F 1 "PORT" H 7050 2600 30  0000 C CNN
-F 2 "" H 7050 2600 60  0000 C CNN
-F 3 "" H 7050 2600 60  0000 C CNN
-	3    7050 2600
-	-1   0    0    1   
-$EndComp
-$Comp
-L PORT U1
-U 4 1 5D0DC6F6
-P 7300 3050
-F 0 "U1" H 7350 3150 30  0000 C CNN
-F 1 "PORT" H 7300 3050 30  0000 C CNN
-F 2 "" H 7300 3050 60  0000 C CNN
-F 3 "" H 7300 3050 60  0000 C CNN
-	4    7300 3050
-	-1   0    0    1   
-$EndComp
-Text Notes 2650 3650 0    60   ~ 0
-CLK
-Text Notes 6600 2550 0    60   ~ 0
-O0
-Text Notes 6800 3000 0    60   ~ 0
-O1
-Text Notes 5050 4750 0    60   ~ 0
-EN\n
-$EndSCHEMATC
diff --git a/src/SubcircuitLibrary/2bit_upcounter/2bit_upcounter.sub b/src/SubcircuitLibrary/2bit_upcounter/2bit_upcounter.sub
deleted file mode 100644
index f888aa71..00000000
--- a/src/SubcircuitLibrary/2bit_upcounter/2bit_upcounter.sub
+++ /dev/null
@@ -1,14 +0,0 @@
-* Subcircuit 2bit_upcounter
-.subckt 2bit_upcounter net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ 
-* /home/mallikarjuna/downloads/esim-1.1.2/src/subcircuitlibrary/2bit_upcounter/2bit_upcounter.cir
-* u2  net-_u2-pad1_ net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad2_ net-_u1-pad3_ net-_u2-pad1_ d_dff
-* u3  net-_u3-pad1_ net-_u2-pad1_ net-_u1-pad2_ net-_u1-pad2_ net-_u1-pad4_ net-_u3-pad1_ d_dff
-a1 net-_u2-pad1_ net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad2_ net-_u1-pad3_ net-_u2-pad1_ u2
-a2 net-_u3-pad1_ net-_u2-pad1_ net-_u1-pad2_ net-_u1-pad2_ net-_u1-pad4_ net-_u3-pad1_ u3
-* Schematic Name: d_dff, NgSpice Name: d_dff
-.model u2 d_dff(ic=0 set_delay=1.0e-9 set_load=1.0e-12 reset_load=1.0e-12 clk_delay=1.0e-9 clk_load=1.0e-12 reset_delay=1.0 data_load=1.0e-12 fall_delay=1.0e-9 rise_delay=1.0e-9 )
-* Schematic Name: d_dff, NgSpice Name: d_dff
-.model u3 d_dff(ic=0 set_delay=1.0e-9 set_load=1.0e-12 reset_load=1.0e-12 clk_delay=1.0e-9 clk_load=1.0e-12 reset_delay=1.0 data_load=1.0e-12 fall_delay=1.0e-9 rise_delay=1.0e-9 )
-* Control Statements
-
-.ends 2bit_upcounter
\ No newline at end of file
diff --git a/src/SubcircuitLibrary/2bit_upcounter/2bit_upcounter_Previous_Values.xml b/src/SubcircuitLibrary/2bit_upcounter/2bit_upcounter_Previous_Values.xml
deleted file mode 100644
index 2daa4f78..00000000
--- a/src/SubcircuitLibrary/2bit_upcounter/2bit_upcounter_Previous_Values.xml
+++ /dev/null
@@ -1 +0,0 @@
-<KicadtoNgspice><source /><model><u2 name="type">d_dff<field1 name="Enter IC (default=0)" /><field2 name="Enter Set Delay (default=1.0e-9)" /><field3 name="Enter value for Set Load (default=1.0e-12)" /><field4 name="Enter Clk Delay (default=1.0e-9)" /><field5 name="Enter value for Clk Load (default=1.0e-12)" /><field6 name="Enter Reset Delay (default=1.0)" /><field7 name="Enter value for Data Load (default=1.0e-12)" /><field8 name="Enter Fall Delay (default=1.0e-9)" /><field9 name="Enter value for Reset Load (default=1.0e-12)" /><field10 name="Enter Rise Delay (default=1.0e-9)" /></u2><u3 name="type">d_dff<field11 name="Enter IC (default=0)" /><field12 name="Enter Set Delay (default=1.0e-9)" /><field13 name="Enter value for Set Load (default=1.0e-12)" /><field14 name="Enter Clk Delay (default=1.0e-9)" /><field15 name="Enter value for Clk Load (default=1.0e-12)" /><field16 name="Enter Reset Delay (default=1.0)" /><field17 name="Enter value for Data Load (default=1.0e-12)" /><field18 name="Enter Fall Delay (default=1.0e-9)" /><field19 name="Enter value for Reset Load (default=1.0e-12)" /><field20 name="Enter Rise Delay (default=1.0e-9)" /></u3></model><devicemodel /><subcircuit /><analysis><ac><field1 name="Lin">true</field1><field2 name="Dec">false</field2><field3 name="Oct">false</field3><field4 name="Start Frequency" /><field5 name="Stop Frequency" /><field6 name="No. of points" /><field7 name="Start Fre Combo">Hz</field7><field8 name="Stop Fre Combo">Hz</field8></ac><dc><field1 name="Source 1" /><field2 name="Start" /><field3 name="Increment" /><field4 name="Stop" /><field5 name="Operating Point">0</field5><field6 name="Start Combo">Volts or Amperes</field6><field7 name="Increment Combo">Volts or Amperes</field7><field8 name="Stop Combo">Volts or Amperes</field8><field9 name="Source 2" /><field10 name="Start" /><field11 name="Increment" /><field12 name="Stop" /><field13 name="Start Combo">Volts or Amperes</field13><field14 name="Increment Combo">Volts or Amperes</field14><field15 name="Stop Combo">Volts or Amperes</field15></dc><tran><field1 name="Start Time" /><field2 name="Step Time" /><field3 name="Stop Time" /><field4 name="Start Combo">Sec</field4><field5 name="Step Combo">Sec</field5><field6 name="Stop Combo">Sec</field6></tran></analysis></KicadtoNgspice>
\ No newline at end of file
diff --git a/src/SubcircuitLibrary/4025/4025-cache.lib b/src/SubcircuitLibrary/4025/4025-cache.lib
deleted file mode 100644
index dd565db9..00000000
--- a/src/SubcircuitLibrary/4025/4025-cache.lib
+++ /dev/null
@@ -1,82 +0,0 @@
-EESchema-LIBRARY Version 2.3

-#encoding utf-8

-#

-# PORT

-#

-DEF PORT U 0 40 Y Y 26 F N

-F0 "U" 50 100 30 H V C CNN

-F1 "PORT" 0 0 30 H V C CNN

-F2 "" 0 0 60 H V C CNN

-F3 "" 0 0 60 H V C CNN

-DRAW

-A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0

-A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50

-S -100 50 100 -50 0 1 0 N

-X ~ 1 250 0 100 L 30 30 1 1 B

-X ~ 2 250 0 100 L 30 30 2 1 B

-X ~ 3 250 0 100 L 30 30 3 1 B

-X ~ 4 250 0 100 L 30 30 4 1 B

-X ~ 5 250 0 100 L 30 30 5 1 B

-X ~ 6 250 0 100 L 30 30 6 1 B

-X ~ 7 250 0 100 L 30 30 7 1 B

-X ~ 8 250 0 100 L 30 30 8 1 B

-X ~ 9 250 0 100 L 30 30 9 1 B

-X ~ 10 250 0 100 L 30 30 10 1 B

-X ~ 11 250 0 100 L 30 30 11 1 B

-X ~ 12 250 0 100 L 30 30 12 1 B

-X ~ 13 250 0 100 L 30 30 13 1 B

-X ~ 14 250 0 100 L 30 30 14 1 B

-X ~ 15 250 0 100 L 30 30 15 1 B

-X ~ 16 250 0 100 L 30 30 16 1 B

-X ~ 17 250 0 100 L 30 30 17 1 B

-X ~ 18 250 0 100 L 30 30 18 1 B

-X ~ 19 250 0 100 L 30 30 19 1 B

-X ~ 20 250 0 100 L 30 30 20 1 B

-X ~ 21 250 0 100 L 30 30 21 1 B

-X ~ 22 250 0 100 L 30 30 22 1 B

-X ~ 23 250 0 100 L 30 30 23 1 B

-X ~ 24 250 0 100 L 30 30 24 1 B

-X ~ 25 250 0 100 L 30 30 25 1 B

-X ~ 26 250 0 100 L 30 30 26 1 B

-ENDDRAW

-ENDDEF

-#

-# d_nor

-#

-DEF d_nor U 0 40 Y Y 1 F N

-F0 "U" 0 0 60 H V C CNN

-F1 "d_nor" 50 100 60 H V C CNN

-F2 "" 0 0 60 H V C CNN

-F3 "" 0 0 60 H V C CNN

-DRAW

-A -450 50 224 266 -266 0 1 0 N -250 150 -250 -50

-A -25 -124 325 574 323 0 1 0 N 150 150 250 50

-A 74 125 191 -665 -231 0 1 0 N 150 -50 250 50

-P 2 0 1 0  -250 -50  150 -50 N

-P 2 0 1 0  -250 150  150 150 N

-X IN1 1 -450 100 215 R 50 50 1 1 I

-X IN2 2 -450 0 215 R 50 50 1 1 I

-X OUT 3 450 50 200 L 50 50 1 1 O I

-ENDDRAW

-ENDDEF

-#

-# d_or

-#

-DEF d_or U 0 40 Y Y 1 F N

-F0 "U" 0 0 60 H V C CNN

-F1 "d_or" 0 100 60 H V C CNN

-F2 "" 0 0 60 H V C CNN

-F3 "" 0 0 60 H V C CNN

-DRAW

-A -450 50 224 266 -266 0 1 0 N -250 150 -250 -50

-A -25 -124 325 574 323 0 1 0 N 150 150 250 50

-A 74 125 191 -665 -231 0 1 0 N 150 -50 250 50

-P 2 0 1 0  -250 -50  150 -50 N

-P 2 0 1 0  -250 150  150 150 N

-X IN1 1 -450 100 215 R 50 50 1 1 I

-X IN2 2 -450 0 215 R 50 50 1 1 I

-X OUT 3 450 50 200 L 50 50 1 1 O

-ENDDRAW

-ENDDEF

-#

-#End Library

diff --git a/src/SubcircuitLibrary/4025/4025.cir b/src/SubcircuitLibrary/4025/4025.cir
deleted file mode 100644
index a2431c71..00000000
--- a/src/SubcircuitLibrary/4025/4025.cir
+++ /dev/null
@@ -1,17 +0,0 @@
-* C:\Users\Bhargav\eSim\src\SubcircuitLibrary\4025\4025.cir

-

-* EESchema Netlist Version 1.1 (Spice format) creation date: 05/31/19 09:34:19

-

-* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N

-* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0

-

-* Sheet Name: /

-U3  Net-_U1-Pad3_ Net-_U1-Pad4_ Net-_U3-Pad3_ d_or		

-U6  Net-_U3-Pad3_ Net-_U1-Pad5_ Net-_U1-Pad6_ d_nor		

-U1  Net-_U1-Pad1_ Net-_U1-Pad2_ Net-_U1-Pad3_ Net-_U1-Pad4_ Net-_U1-Pad5_ Net-_U1-Pad6_ ? Net-_U1-Pad8_ Net-_U1-Pad9_ Net-_U1-Pad10_ Net-_U1-Pad11_ Net-_U1-Pad12_ Net-_U1-Pad13_ ? PORT		

-U4  Net-_U1-Pad11_ Net-_U1-Pad12_ Net-_U4-Pad3_ d_or		

-U7  Net-_U4-Pad3_ Net-_U1-Pad13_ Net-_U1-Pad10_ d_nor		

-U2  Net-_U1-Pad1_ Net-_U1-Pad2_ Net-_U2-Pad3_ d_or		

-U5  Net-_U2-Pad3_ Net-_U1-Pad8_ Net-_U1-Pad9_ d_nor		

-

-.end

diff --git a/src/SubcircuitLibrary/4025/4025.cir.out b/src/SubcircuitLibrary/4025/4025.cir.out
deleted file mode 100644
index b22d91a3..00000000
--- a/src/SubcircuitLibrary/4025/4025.cir.out
+++ /dev/null
@@ -1,36 +0,0 @@
-* c:\users\bhargav\esim\src\subcircuitlibrary\4025\4025.cir

-

-* u3  net-_u1-pad3_ net-_u1-pad4_ net-_u3-pad3_ d_or

-* u6  net-_u3-pad3_ net-_u1-pad5_ net-_u1-pad6_ d_nor

-* u1  net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ net-_u1-pad5_ net-_u1-pad6_ ? net-_u1-pad8_ net-_u1-pad9_ net-_u1-pad10_ net-_u1-pad11_ net-_u1-pad12_ net-_u1-pad13_ ? port

-* u4  net-_u1-pad11_ net-_u1-pad12_ net-_u4-pad3_ d_or

-* u7  net-_u4-pad3_ net-_u1-pad13_ net-_u1-pad10_ d_nor

-* u2  net-_u1-pad1_ net-_u1-pad2_ net-_u2-pad3_ d_or

-* u5  net-_u2-pad3_ net-_u1-pad8_ net-_u1-pad9_ d_nor

-a1 [net-_u1-pad3_ net-_u1-pad4_ ] net-_u3-pad3_ u3

-a2 [net-_u3-pad3_ net-_u1-pad5_ ] net-_u1-pad6_ u6

-a3 [net-_u1-pad11_ net-_u1-pad12_ ] net-_u4-pad3_ u4

-a4 [net-_u4-pad3_ net-_u1-pad13_ ] net-_u1-pad10_ u7

-a5 [net-_u1-pad1_ net-_u1-pad2_ ] net-_u2-pad3_ u2

-a6 [net-_u2-pad3_ net-_u1-pad8_ ] net-_u1-pad9_ u5

-* Schematic Name: d_or, NgSpice Name: d_or

-.model u3 d_or(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 

-* Schematic Name: d_nor, NgSpice Name: d_nor

-.model u6 d_nor(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 

-* Schematic Name: d_or, NgSpice Name: d_or

-.model u4 d_or(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 

-* Schematic Name: d_nor, NgSpice Name: d_nor

-.model u7 d_nor(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 

-* Schematic Name: d_or, NgSpice Name: d_or

-.model u2 d_or(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 

-* Schematic Name: d_nor, NgSpice Name: d_nor

-.model u5 d_nor(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 

-.tran 0e-00 0e-00 0e-00

-

-* Control Statements 

-.control

-run

-print allv > plot_data_v.txt

-print alli > plot_data_i.txt

-.endc

-.end

diff --git a/src/SubcircuitLibrary/4025/4025.pro b/src/SubcircuitLibrary/4025/4025.pro
deleted file mode 100644
index 3c05588e..00000000
--- a/src/SubcircuitLibrary/4025/4025.pro
+++ /dev/null
@@ -1,45 +0,0 @@
-update=05/31/19 09:27:16

-version=1

-last_client=eeschema

-[general]

-version=1

-RootSch=

-BoardNm=

-[pcbnew]

-version=1

-LastNetListRead=

-UseCmpFile=1

-PadDrill=0.600000000000

-PadDrillOvalY=0.600000000000

-PadSizeH=1.500000000000

-PadSizeV=1.500000000000

-PcbTextSizeV=1.500000000000

-PcbTextSizeH=1.500000000000

-PcbTextThickness=0.300000000000

-ModuleTextSizeV=1.000000000000

-ModuleTextSizeH=1.000000000000

-ModuleTextSizeThickness=0.150000000000

-SolderMaskClearance=0.000000000000

-SolderMaskMinWidth=0.000000000000

-DrawSegmentWidth=0.200000000000

-BoardOutlineThickness=0.100000000000

-ModuleOutlineThickness=0.150000000000

-[cvpcb]

-version=1

-NetIExt=net

-[eeschema]

-version=1

-LibDir=../../../kicadSchematicLibrary

-[eeschema/libraries]

-LibName1=power

-LibName2=C:/Users/Bhargav/eSim/kicadSchematicLibrary/eSim_Analog

-LibName3=C:/Users/Bhargav/eSim/kicadSchematicLibrary/eSim_Devices

-LibName4=C:/Users/Bhargav/eSim/kicadSchematicLibrary/eSim_Digital

-LibName5=C:/Users/Bhargav/eSim/kicadSchematicLibrary/eSim_Hybrid

-LibName6=C:/Users/Bhargav/eSim/kicadSchematicLibrary/eSim_Miscellaneous

-LibName7=C:/Users/Bhargav/eSim/kicadSchematicLibrary/eSim_Plot

-LibName8=C:/Users/Bhargav/eSim/kicadSchematicLibrary/eSim_Power

-LibName9=C:/Users/Bhargav/eSim/kicadSchematicLibrary/eSim_PSpice

-LibName10=C:/Users/Bhargav/eSim/kicadSchematicLibrary/eSim_Sources

-LibName11=C:/Users/Bhargav/eSim/kicadSchematicLibrary/eSim_Subckt

-LibName12=C:/Users/Bhargav/eSim/kicadSchematicLibrary/eSim_User

diff --git a/src/SubcircuitLibrary/4025/4025.sch b/src/SubcircuitLibrary/4025/4025.sch
deleted file mode 100644
index 2a0cb4bc..00000000
--- a/src/SubcircuitLibrary/4025/4025.sch
+++ /dev/null
@@ -1,302 +0,0 @@
-EESchema Schematic File Version 2

-LIBS:power

-LIBS:eSim_Analog

-LIBS:eSim_Devices

-LIBS:eSim_Digital

-LIBS:eSim_Hybrid

-LIBS:eSim_Miscellaneous

-LIBS:eSim_Plot

-LIBS:eSim_Power

-LIBS:eSim_Sources

-LIBS:eSim_Subckt

-LIBS:eSim_User

-LIBS:4025-cache

-EELAYER 25 0

-EELAYER END

-$Descr A4 11693 8268

-encoding utf-8

-Sheet 1 1

-Title ""

-Date ""

-Rev ""

-Comp ""

-Comment1 ""

-Comment2 ""

-Comment3 ""

-Comment4 ""

-$EndDescr

-$Comp

-L d_or U3

-U 1 1 5CEE0A15

-P 4850 3000

-F 0 "U3" H 4850 3000 60  0000 C CNN

-F 1 "d_or" H 4850 3100 60  0000 C CNN

-F 2 "" H 4850 3000 60  0000 C CNN

-F 3 "" H 4850 3000 60  0000 C CNN

-	1    4850 3000

-	1    0    0    -1  

-$EndComp

-$Comp

-L d_nor U6

-U 1 1 5CEE0AE8

-P 6100 3050

-F 0 "U6" H 6100 3050 60  0000 C CNN

-F 1 "d_nor" H 6150 3150 60  0000 C CNN

-F 2 "" H 6100 3050 60  0000 C CNN

-F 3 "" H 6100 3050 60  0000 C CNN

-	1    6100 3050

-	1    0    0    -1  

-$EndComp

-$Comp

-L PORT U1

-U 3 1 5CEE0B21

-P 3900 2900

-F 0 "U1" H 3950 3000 30  0000 C CNN

-F 1 "PORT" H 3900 2900 30  0000 C CNN

-F 2 "" H 3900 2900 60  0000 C CNN

-F 3 "" H 3900 2900 60  0000 C CNN

-	3    3900 2900

-	1    0    0    -1  

-$EndComp

-$Comp

-L PORT U1

-U 4 1 5CEE0B4F

-P 3900 3150

-F 0 "U1" H 3950 3250 30  0000 C CNN

-F 1 "PORT" H 3900 3150 30  0000 C CNN

-F 2 "" H 3900 3150 60  0000 C CNN

-F 3 "" H 3900 3150 60  0000 C CNN

-	4    3900 3150

-	1    0    0    -1  

-$EndComp

-$Comp

-L PORT U1

-U 8 1 5CEE0B87

-P 5200 4450

-F 0 "U1" H 5250 4550 30  0000 C CNN

-F 1 "PORT" H 5200 4450 30  0000 C CNN

-F 2 "" H 5200 4450 60  0000 C CNN

-F 3 "" H 5200 4450 60  0000 C CNN

-	8    5200 4450

-	1    0    0    -1  

-$EndComp

-$Comp

-L PORT U1

-U 11 1 5CEE0BBA

-P 3900 3500

-F 0 "U1" H 3950 3600 30  0000 C CNN

-F 1 "PORT" H 3900 3500 30  0000 C CNN

-F 2 "" H 3900 3500 60  0000 C CNN

-F 3 "" H 3900 3500 60  0000 C CNN

-	11   3900 3500

-	1    0    0    -1  

-$EndComp

-Wire Wire Line

-	4150 2900 4400 2900

-Wire Wire Line

-	4150 3150 4300 3150

-Wire Wire Line

-	4300 3150 4300 3000

-Wire Wire Line

-	4300 3000 4400 3000

-Wire Wire Line

-	5300 2950 5650 2950

-Wire Wire Line

-	5500 3150 5650 3150

-Wire Wire Line

-	5650 3150 5650 3050

-Wire Wire Line

-	6550 3000 6750 3000

-$Comp

-L d_or U4

-U 1 1 5CEE1CD2

-P 4850 3600

-F 0 "U4" H 4850 3600 60  0000 C CNN

-F 1 "d_or" H 4850 3700 60  0000 C CNN

-F 2 "" H 4850 3600 60  0000 C CNN

-F 3 "" H 4850 3600 60  0000 C CNN

-	1    4850 3600

-	1    0    0    -1  

-$EndComp

-$Comp

-L d_nor U7

-U 1 1 5CEE1CD8

-P 6100 3650

-F 0 "U7" H 6100 3650 60  0000 C CNN

-F 1 "d_nor" H 6150 3750 60  0000 C CNN

-F 2 "" H 6100 3650 60  0000 C CNN

-F 3 "" H 6100 3650 60  0000 C CNN

-	1    6100 3650

-	1    0    0    -1  

-$EndComp

-$Comp

-L PORT U1

-U 5 1 5CEE1CDE

-P 5250 3150

-F 0 "U1" H 5300 3250 30  0000 C CNN

-F 1 "PORT" H 5250 3150 30  0000 C CNN

-F 2 "" H 5250 3150 60  0000 C CNN

-F 3 "" H 5250 3150 60  0000 C CNN

-	5    5250 3150

-	1    0    0    -1  

-$EndComp

-$Comp

-L PORT U1

-U 6 1 5CEE1CE4

-P 7000 3000

-F 0 "U1" H 7050 3100 30  0000 C CNN

-F 1 "PORT" H 7000 3000 30  0000 C CNN

-F 2 "" H 7000 3000 60  0000 C CNN

-F 3 "" H 7000 3000 60  0000 C CNN

-	6    7000 3000

-	-1   0    0    1   

-$EndComp

-$Comp

-L PORT U1

-U 9 1 5CEE1CEA

-P 6950 4300

-F 0 "U1" H 7000 4400 30  0000 C CNN

-F 1 "PORT" H 6950 4300 30  0000 C CNN

-F 2 "" H 6950 4300 60  0000 C CNN

-F 3 "" H 6950 4300 60  0000 C CNN

-	9    6950 4300

-	-1   0    0    1   

-$EndComp

-$Comp

-L PORT U1

-U 12 1 5CEE1CF0

-P 3900 3750

-F 0 "U1" H 3950 3850 30  0000 C CNN

-F 1 "PORT" H 3900 3750 30  0000 C CNN

-F 2 "" H 3900 3750 60  0000 C CNN

-F 3 "" H 3900 3750 60  0000 C CNN

-	12   3900 3750

-	1    0    0    -1  

-$EndComp

-Wire Wire Line

-	4150 3500 4400 3500

-Wire Wire Line

-	4150 3750 4300 3750

-Wire Wire Line

-	4300 3750 4300 3600

-Wire Wire Line

-	4300 3600 4400 3600

-Wire Wire Line

-	5300 3550 5650 3550

-Wire Wire Line

-	5500 3750 5650 3750

-Wire Wire Line

-	5650 3750 5650 3650

-Wire Wire Line

-	6550 3600 6750 3600

-$Comp

-L d_or U2

-U 1 1 5CEE1F80

-P 4800 4300

-F 0 "U2" H 4800 4300 60  0000 C CNN

-F 1 "d_or" H 4800 4400 60  0000 C CNN

-F 2 "" H 4800 4300 60  0000 C CNN

-F 3 "" H 4800 4300 60  0000 C CNN

-	1    4800 4300

-	1    0    0    -1  

-$EndComp

-$Comp

-L d_nor U5

-U 1 1 5CEE1F86

-P 6050 4350

-F 0 "U5" H 6050 4350 60  0000 C CNN

-F 1 "d_nor" H 6100 4450 60  0000 C CNN

-F 2 "" H 6050 4350 60  0000 C CNN

-F 3 "" H 6050 4350 60  0000 C CNN

-	1    6050 4350

-	1    0    0    -1  

-$EndComp

-$Comp

-L PORT U1

-U 1 1 5CEE1F8C

-P 3850 4200

-F 0 "U1" H 3900 4300 30  0000 C CNN

-F 1 "PORT" H 3850 4200 30  0000 C CNN

-F 2 "" H 3850 4200 60  0000 C CNN

-F 3 "" H 3850 4200 60  0000 C CNN

-	1    3850 4200

-	1    0    0    -1  

-$EndComp

-$Comp

-L PORT U1

-U 2 1 5CEE1F92

-P 3850 4450

-F 0 "U1" H 3900 4550 30  0000 C CNN

-F 1 "PORT" H 3850 4450 30  0000 C CNN

-F 2 "" H 3850 4450 60  0000 C CNN

-F 3 "" H 3850 4450 60  0000 C CNN

-	2    3850 4450

-	1    0    0    -1  

-$EndComp

-$Comp

-L PORT U1

-U 7 1 5CEE1F98

-P 8450 3500

-F 0 "U1" H 8500 3600 30  0000 C CNN

-F 1 "PORT" H 8450 3500 30  0000 C CNN

-F 2 "" H 8450 3500 60  0000 C CNN

-F 3 "" H 8450 3500 60  0000 C CNN

-	7    8450 3500

-	-1   0    0    1   

-$EndComp

-$Comp

-L PORT U1

-U 10 1 5CEE1F9E

-P 7000 3600

-F 0 "U1" H 7050 3700 30  0000 C CNN

-F 1 "PORT" H 7000 3600 30  0000 C CNN

-F 2 "" H 7000 3600 60  0000 C CNN

-F 3 "" H 7000 3600 60  0000 C CNN

-	10   7000 3600

-	-1   0    0    1   

-$EndComp

-Wire Wire Line

-	4100 4200 4350 4200

-Wire Wire Line

-	4100 4450 4250 4450

-Wire Wire Line

-	4250 4450 4250 4300

-Wire Wire Line

-	4250 4300 4350 4300

-Wire Wire Line

-	5250 4250 5600 4250

-Wire Wire Line

-	5450 4450 5600 4450

-Wire Wire Line

-	5600 4450 5600 4350

-Wire Wire Line

-	6500 4300 6700 4300

-Wire Wire Line

-	7800 3500 8200 3500

-NoConn ~ 7800 3500

-$Comp

-L PORT U1

-U 13 1 5CEE2827

-P 5250 3750

-F 0 "U1" H 5300 3850 30  0000 C CNN

-F 1 "PORT" H 5250 3750 30  0000 C CNN

-F 2 "" H 5250 3750 60  0000 C CNN

-F 3 "" H 5250 3750 60  0000 C CNN

-	13   5250 3750

-	1    0    0    -1  

-$EndComp

-Wire Wire Line

-	7800 3850 8200 3850

-NoConn ~ 7800 3850

-$Comp

-L PORT U1

-U 14 1 5CEE289D

-P 8450 3850

-F 0 "U1" H 8500 3950 30  0000 C CNN

-F 1 "PORT" H 8450 3850 30  0000 C CNN

-F 2 "" H 8450 3850 60  0000 C CNN

-F 3 "" H 8450 3850 60  0000 C CNN

-	14   8450 3850

-	-1   0    0    1   

-$EndComp

-$EndSCHEMATC

diff --git a/src/SubcircuitLibrary/4025/4025.sub b/src/SubcircuitLibrary/4025/4025.sub
deleted file mode 100644
index 867617fd..00000000
--- a/src/SubcircuitLibrary/4025/4025.sub
+++ /dev/null
@@ -1,30 +0,0 @@
-* Subcircuit 4025

-.subckt 4025 net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ net-_u1-pad5_ net-_u1-pad6_ ? net-_u1-pad8_ net-_u1-pad9_ net-_u1-pad10_ net-_u1-pad11_ net-_u1-pad12_ net-_u1-pad13_ ? 

-* c:\users\bhargav\esim\src\subcircuitlibrary\4025\4025.cir

-* u3  net-_u1-pad3_ net-_u1-pad4_ net-_u3-pad3_ d_or

-* u6  net-_u3-pad3_ net-_u1-pad5_ net-_u1-pad6_ d_nor

-* u4  net-_u1-pad11_ net-_u1-pad12_ net-_u4-pad3_ d_or

-* u7  net-_u4-pad3_ net-_u1-pad13_ net-_u1-pad10_ d_nor

-* u2  net-_u1-pad1_ net-_u1-pad2_ net-_u2-pad3_ d_or

-* u5  net-_u2-pad3_ net-_u1-pad8_ net-_u1-pad9_ d_nor

-a1 [net-_u1-pad3_ net-_u1-pad4_ ] net-_u3-pad3_ u3

-a2 [net-_u3-pad3_ net-_u1-pad5_ ] net-_u1-pad6_ u6

-a3 [net-_u1-pad11_ net-_u1-pad12_ ] net-_u4-pad3_ u4

-a4 [net-_u4-pad3_ net-_u1-pad13_ ] net-_u1-pad10_ u7

-a5 [net-_u1-pad1_ net-_u1-pad2_ ] net-_u2-pad3_ u2

-a6 [net-_u2-pad3_ net-_u1-pad8_ ] net-_u1-pad9_ u5

-* Schematic Name: d_or, NgSpice Name: d_or

-.model u3 d_or(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )

-* Schematic Name: d_nor, NgSpice Name: d_nor

-.model u6 d_nor(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )

-* Schematic Name: d_or, NgSpice Name: d_or

-.model u4 d_or(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )

-* Schematic Name: d_nor, NgSpice Name: d_nor

-.model u7 d_nor(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )

-* Schematic Name: d_or, NgSpice Name: d_or

-.model u2 d_or(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )

-* Schematic Name: d_nor, NgSpice Name: d_nor

-.model u5 d_nor(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )

-* Control Statements

-

-.ends 4025
\ No newline at end of file
diff --git a/src/SubcircuitLibrary/4025/4025_Previous_Values.xml b/src/SubcircuitLibrary/4025/4025_Previous_Values.xml
deleted file mode 100644
index 228a19a0..00000000
--- a/src/SubcircuitLibrary/4025/4025_Previous_Values.xml
+++ /dev/null
@@ -1 +0,0 @@
-<KicadtoNgspice><analysis><ac><field1 name="Lin">true</field1><field2 name="Dec">false</field2><field3 name="Oct">false</field3><field4 name="Start Frequency" /><field5 name="Stop Frequency" /><field6 name="No. of points" /><field7 name="Start Fre Combo">Hz</field7><field8 name="Stop Fre Combo">Hz</field8></ac><dc><field1 name="Source 1" /><field2 name="Start" /><field3 name="Increment" /><field4 name="Stop" /><field5 name="Operating Point">0</field5><field6 name="Start Combo">Volts or Amperes</field6><field7 name="Increment Combo">Volts or Amperes</field7><field8 name="Stop Combo">Volts or Amperes</field8><field9 name="Source 2" /><field10 name="Start" /><field11 name="Increment" /><field12 name="Stop" /><field13 name="Start Combo">Volts or Amperes</field13><field14 name="Increment Combo">Volts or Amperes</field14><field15 name="Stop Combo">Volts or Amperes</field15></dc><tran><field1 name="Start Time" /><field2 name="Step Time" /><field3 name="Stop Time" /><field4 name="Start Combo">Sec</field4><field5 name="Step Combo">Sec</field5><field6 name="Stop Combo">Sec</field6></tran></analysis><source /><model><u3 name="type">d_or<field1 name="Enter Fall Delay (default=1.0e-9)" /><field2 name="Enter Input Load (default=1.0e-12)" /><field3 name="Enter Rise Delay (default=1.0e-9)" /></u3><u6 name="type">d_nor<field4 name="Enter Fall Delay (default=1.0e-9)" /><field5 name="Enter Input Load (default=1.0e-12)" /><field6 name="Enter Rise Delay (default=1.0e-9)" /></u6><u4 name="type">d_or<field7 name="Enter Fall Delay (default=1.0e-9)" /><field8 name="Enter Input Load (default=1.0e-12)" /><field9 name="Enter Rise Delay (default=1.0e-9)" /></u4><u7 name="type">d_nor<field10 name="Enter Fall Delay (default=1.0e-9)" /><field11 name="Enter Input Load (default=1.0e-12)" /><field12 name="Enter Rise Delay (default=1.0e-9)" /></u7><u2 name="type">d_or<field13 name="Enter Fall Delay (default=1.0e-9)" /><field14 name="Enter Input Load (default=1.0e-12)" /><field15 name="Enter Rise Delay (default=1.0e-9)" /></u2><u5 name="type">d_nor<field16 name="Enter Fall Delay (default=1.0e-9)" /><field17 name="Enter Input Load (default=1.0e-12)" /><field18 name="Enter Rise Delay (default=1.0e-9)" /></u5></model><devicemodel /><subcircuit /></KicadtoNgspice>
\ No newline at end of file
diff --git a/src/SubcircuitLibrary/4072/4072-cache.lib b/src/SubcircuitLibrary/4072/4072-cache.lib
deleted file mode 100644
index a3c1c972..00000000
--- a/src/SubcircuitLibrary/4072/4072-cache.lib
+++ /dev/null
@@ -1,63 +0,0 @@
-EESchema-LIBRARY Version 2.3

-#encoding utf-8

-#

-# PORT

-#

-DEF PORT U 0 40 Y Y 26 F N

-F0 "U" 50 100 30 H V C CNN

-F1 "PORT" 0 0 30 H V C CNN

-F2 "" 0 0 60 H V C CNN

-F3 "" 0 0 60 H V C CNN

-DRAW

-A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0

-A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50

-S -100 50 100 -50 0 1 0 N

-X ~ 1 250 0 100 L 30 30 1 1 B

-X ~ 2 250 0 100 L 30 30 2 1 B

-X ~ 3 250 0 100 L 30 30 3 1 B

-X ~ 4 250 0 100 L 30 30 4 1 B

-X ~ 5 250 0 100 L 30 30 5 1 B

-X ~ 6 250 0 100 L 30 30 6 1 B

-X ~ 7 250 0 100 L 30 30 7 1 B

-X ~ 8 250 0 100 L 30 30 8 1 B

-X ~ 9 250 0 100 L 30 30 9 1 B

-X ~ 10 250 0 100 L 30 30 10 1 B

-X ~ 11 250 0 100 L 30 30 11 1 B

-X ~ 12 250 0 100 L 30 30 12 1 B

-X ~ 13 250 0 100 L 30 30 13 1 B

-X ~ 14 250 0 100 L 30 30 14 1 B

-X ~ 15 250 0 100 L 30 30 15 1 B

-X ~ 16 250 0 100 L 30 30 16 1 B

-X ~ 17 250 0 100 L 30 30 17 1 B

-X ~ 18 250 0 100 L 30 30 18 1 B

-X ~ 19 250 0 100 L 30 30 19 1 B

-X ~ 20 250 0 100 L 30 30 20 1 B

-X ~ 21 250 0 100 L 30 30 21 1 B

-X ~ 22 250 0 100 L 30 30 22 1 B

-X ~ 23 250 0 100 L 30 30 23 1 B

-X ~ 24 250 0 100 L 30 30 24 1 B

-X ~ 25 250 0 100 L 30 30 25 1 B

-X ~ 26 250 0 100 L 30 30 26 1 B

-ENDDRAW

-ENDDEF

-#

-# d_or

-#

-DEF d_or U 0 40 Y Y 1 F N

-F0 "U" 0 0 60 H V C CNN

-F1 "d_or" 0 100 60 H V C CNN

-F2 "" 0 0 60 H V C CNN

-F3 "" 0 0 60 H V C CNN

-DRAW

-A -450 50 224 266 -266 0 1 0 N -250 150 -250 -50

-A -25 -124 325 574 323 0 1 0 N 150 150 250 50

-A 74 125 191 -665 -231 0 1 0 N 150 -50 250 50

-P 2 0 1 0  -250 -50  150 -50 N

-P 2 0 1 0  -250 150  150 150 N

-X IN1 1 -450 100 215 R 50 50 1 1 I

-X IN2 2 -450 0 215 R 50 50 1 1 I

-X OUT 3 450 50 200 L 50 50 1 1 O

-ENDDRAW

-ENDDEF

-#

-#End Library

diff --git a/src/SubcircuitLibrary/4072/4072.cir b/src/SubcircuitLibrary/4072/4072.cir
deleted file mode 100644
index 0f2e56f0..00000000
--- a/src/SubcircuitLibrary/4072/4072.cir
+++ /dev/null
@@ -1,17 +0,0 @@
-* C:\Users\Bhargav\eSim\src\SubcircuitLibrary\4072\4072.cir

-

-* EESchema Netlist Version 1.1 (Spice format) creation date: 05/31/19 10:17:30

-

-* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N

-* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0

-

-* Sheet Name: /

-U2  Net-_U1-Pad5_ Net-_U1-Pad2_ Net-_U2-Pad3_ d_or		

-U3  Net-_U1-Pad3_ Net-_U1-Pad4_ Net-_U3-Pad3_ d_or		

-U1  Net-_U1-Pad1_ Net-_U1-Pad2_ Net-_U1-Pad3_ Net-_U1-Pad4_ Net-_U1-Pad5_ ? ? ? Net-_U1-Pad9_ Net-_U1-Pad10_ Net-_U1-Pad11_ Net-_U1-Pad12_ Net-_U1-Pad13_ ? PORT		

-U4  Net-_U1-Pad9_ Net-_U1-Pad10_ Net-_U4-Pad3_ d_or		

-U5  Net-_U1-Pad11_ Net-_U1-Pad12_ Net-_U5-Pad3_ d_or		

-U6  Net-_U2-Pad3_ Net-_U3-Pad3_ Net-_U1-Pad1_ d_or		

-U7  Net-_U4-Pad3_ Net-_U5-Pad3_ Net-_U1-Pad13_ d_or		

-

-.end

diff --git a/src/SubcircuitLibrary/4072/4072.cir.out b/src/SubcircuitLibrary/4072/4072.cir.out
deleted file mode 100644
index 61e8e949..00000000
--- a/src/SubcircuitLibrary/4072/4072.cir.out
+++ /dev/null
@@ -1,36 +0,0 @@
-* c:\users\bhargav\esim\src\subcircuitlibrary\4072\4072.cir

-

-* u2  net-_u1-pad5_ net-_u1-pad2_ net-_u2-pad3_ d_or

-* u3  net-_u1-pad3_ net-_u1-pad4_ net-_u3-pad3_ d_or

-* u1  net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ net-_u1-pad5_ ? ? ? net-_u1-pad9_ net-_u1-pad10_ net-_u1-pad11_ net-_u1-pad12_ net-_u1-pad13_ ? port

-* u4  net-_u1-pad9_ net-_u1-pad10_ net-_u4-pad3_ d_or

-* u5  net-_u1-pad11_ net-_u1-pad12_ net-_u5-pad3_ d_or

-* u6  net-_u2-pad3_ net-_u3-pad3_ net-_u1-pad1_ d_or

-* u7  net-_u4-pad3_ net-_u5-pad3_ net-_u1-pad13_ d_or

-a1 [net-_u1-pad5_ net-_u1-pad2_ ] net-_u2-pad3_ u2

-a2 [net-_u1-pad3_ net-_u1-pad4_ ] net-_u3-pad3_ u3

-a3 [net-_u1-pad9_ net-_u1-pad10_ ] net-_u4-pad3_ u4

-a4 [net-_u1-pad11_ net-_u1-pad12_ ] net-_u5-pad3_ u5

-a5 [net-_u2-pad3_ net-_u3-pad3_ ] net-_u1-pad1_ u6

-a6 [net-_u4-pad3_ net-_u5-pad3_ ] net-_u1-pad13_ u7

-* Schematic Name: d_or, NgSpice Name: d_or

-.model u2 d_or(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 

-* Schematic Name: d_or, NgSpice Name: d_or

-.model u3 d_or(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 

-* Schematic Name: d_or, NgSpice Name: d_or

-.model u4 d_or(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 

-* Schematic Name: d_or, NgSpice Name: d_or

-.model u5 d_or(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 

-* Schematic Name: d_or, NgSpice Name: d_or

-.model u6 d_or(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 

-* Schematic Name: d_or, NgSpice Name: d_or

-.model u7 d_or(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 

-.tran 0e-00 0e-00 0e-00

-

-* Control Statements 

-.control

-run

-print allv > plot_data_v.txt

-print alli > plot_data_i.txt

-.endc

-.end

diff --git a/src/SubcircuitLibrary/4072/4072.pro b/src/SubcircuitLibrary/4072/4072.pro
deleted file mode 100644
index 64662931..00000000
--- a/src/SubcircuitLibrary/4072/4072.pro
+++ /dev/null
@@ -1,45 +0,0 @@
-update=05/31/19 10:11:54

-version=1

-last_client=eeschema

-[general]

-version=1

-RootSch=

-BoardNm=

-[pcbnew]

-version=1

-LastNetListRead=

-UseCmpFile=1

-PadDrill=0.600000000000

-PadDrillOvalY=0.600000000000

-PadSizeH=1.500000000000

-PadSizeV=1.500000000000

-PcbTextSizeV=1.500000000000

-PcbTextSizeH=1.500000000000

-PcbTextThickness=0.300000000000

-ModuleTextSizeV=1.000000000000

-ModuleTextSizeH=1.000000000000

-ModuleTextSizeThickness=0.150000000000

-SolderMaskClearance=0.000000000000

-SolderMaskMinWidth=0.000000000000

-DrawSegmentWidth=0.200000000000

-BoardOutlineThickness=0.100000000000

-ModuleOutlineThickness=0.150000000000

-[cvpcb]

-version=1

-NetIExt=net

-[eeschema]

-version=1

-LibDir=

-[eeschema/libraries]

-LibName1=power

-LibName2=C:/Users/Bhargav/eSim/kicadSchematicLibrary/eSim_Analog

-LibName3=C:/Users/Bhargav/eSim/kicadSchematicLibrary/eSim_Devices

-LibName4=C:/Users/Bhargav/eSim/kicadSchematicLibrary/eSim_Digital

-LibName5=C:/Users/Bhargav/eSim/kicadSchematicLibrary/eSim_Hybrid

-LibName6=C:/Users/Bhargav/eSim/kicadSchematicLibrary/eSim_Miscellaneous

-LibName7=C:/Users/Bhargav/eSim/kicadSchematicLibrary/eSim_Plot

-LibName8=C:/Users/Bhargav/eSim/kicadSchematicLibrary/eSim_Power

-LibName9=C:/Users/Bhargav/eSim/kicadSchematicLibrary/eSim_PSpice

-LibName10=C:/Users/Bhargav/eSim/kicadSchematicLibrary/eSim_Sources

-LibName11=C:/Users/Bhargav/eSim/kicadSchematicLibrary/eSim_Subckt

-LibName12=C:/Users/Bhargav/eSim/kicadSchematicLibrary/eSim_User

diff --git a/src/SubcircuitLibrary/4072/4072.sch b/src/SubcircuitLibrary/4072/4072.sch
deleted file mode 100644
index 782d3e69..00000000
--- a/src/SubcircuitLibrary/4072/4072.sch
+++ /dev/null
@@ -1,334 +0,0 @@
-EESchema Schematic File Version 2

-LIBS:power

-LIBS:device

-LIBS:transistors

-LIBS:conn

-LIBS:linear

-LIBS:regul

-LIBS:74xx

-LIBS:cmos4000

-LIBS:adc-dac

-LIBS:memory

-LIBS:xilinx

-LIBS:microcontrollers

-LIBS:dsp

-LIBS:microchip

-LIBS:analog_switches

-LIBS:motorola

-LIBS:texas

-LIBS:intel

-LIBS:audio

-LIBS:interface

-LIBS:digital-audio

-LIBS:philips

-LIBS:display

-LIBS:cypress

-LIBS:siliconi

-LIBS:opto

-LIBS:atmel

-LIBS:contrib

-LIBS:valves

-LIBS:4002-cache

-EELAYER 25 0

-EELAYER END

-$Descr A4 11693 8268

-encoding utf-8

-Sheet 1 1

-Title ""

-Date ""

-Rev ""

-Comp ""

-Comment1 ""

-Comment2 ""

-Comment3 ""

-Comment4 ""

-$EndDescr

-$Comp

-L d_or U2

-U 1 1 5CF0AF1E

-P 4750 2900

-F 0 "U2" H 4750 2900 60  0000 C CNN

-F 1 "d_or" H 4750 3000 60  0000 C CNN

-F 2 "" H 4750 2900 60  0000 C CNN

-F 3 "" H 4750 2900 60  0000 C CNN

-	1    4750 2900

-	1    0    0    -1  

-$EndComp

-$Comp

-L d_or U3

-U 1 1 5CF0AF1F

-P 4750 3450

-F 0 "U3" H 4750 3450 60  0000 C CNN

-F 1 "d_or" H 4750 3550 60  0000 C CNN

-F 2 "" H 4750 3450 60  0000 C CNN

-F 3 "" H 4750 3450 60  0000 C CNN

-	1    4750 3450

-	1    0    0    -1  

-$EndComp

-Wire Wire Line

-	5200 2850 5400 2850

-Wire Wire Line

-	5400 2850 5400 3000

-Wire Wire Line

-	5400 3000 5550 3000

-Wire Wire Line

-	5200 3400 5400 3400

-Wire Wire Line

-	5400 3400 5400 3100

-Wire Wire Line

-	5400 3100 5550 3100

-Wire Wire Line

-	5650 5350 6050 5350

-Wire Wire Line

-	5650 5550 6050 5550

-Wire Wire Line

-	5650 5800 6050 5800

-Wire Wire Line

-	5650 6000 6050 6000

-NoConn ~ 5650 5350

-NoConn ~ 5650 5550

-NoConn ~ 5650 5800

-NoConn ~ 5650 6000

-$Comp

-L PORT U1

-U 5 1 5CF0AF21

-P 3850 2800

-F 0 "U1" H 3900 2900 30  0000 C CNN

-F 1 "PORT" H 3850 2800 30  0000 C CNN

-F 2 "" H 3850 2800 60  0000 C CNN

-F 3 "" H 3850 2800 60  0000 C CNN

-	5    3850 2800

-	1    0    0    -1  

-$EndComp

-$Comp

-L PORT U1

-U 2 1 5CF0AF22

-P 3900 3050

-F 0 "U1" H 3950 3150 30  0000 C CNN

-F 1 "PORT" H 3900 3050 30  0000 C CNN

-F 2 "" H 3900 3050 60  0000 C CNN

-F 3 "" H 3900 3050 60  0000 C CNN

-	2    3900 3050

-	1    0    0    -1  

-$EndComp

-$Comp

-L PORT U1

-U 3 1 5CF0AF23

-P 3900 3250

-F 0 "U1" H 3950 3350 30  0000 C CNN

-F 1 "PORT" H 3900 3250 30  0000 C CNN

-F 2 "" H 3900 3250 60  0000 C CNN

-F 3 "" H 3900 3250 60  0000 C CNN

-	3    3900 3250

-	1    0    0    -1  

-$EndComp

-$Comp

-L PORT U1

-U 4 1 5CF0AF24

-P 3900 3550

-F 0 "U1" H 3950 3650 30  0000 C CNN

-F 1 "PORT" H 3900 3550 30  0000 C CNN

-F 2 "" H 3900 3550 60  0000 C CNN

-F 3 "" H 3900 3550 60  0000 C CNN

-	4    3900 3550

-	1    0    0    -1  

-$EndComp

-$Comp

-L PORT U1

-U 1 1 5CF0AF25

-P 6950 3050

-F 0 "U1" H 7000 3150 30  0000 C CNN

-F 1 "PORT" H 6950 3050 30  0000 C CNN

-F 2 "" H 6950 3050 60  0000 C CNN

-F 3 "" H 6950 3050 60  0000 C CNN

-	1    6950 3050

-	-1   0    0    1   

-$EndComp

-Wire Wire Line

-	4100 2800 4300 2800

-Wire Wire Line

-	4150 3050 4150 2900

-Wire Wire Line

-	4150 2900 4300 2900

-Wire Wire Line

-	4150 3250 4300 3250

-Wire Wire Line

-	4300 3250 4300 3350

-Wire Wire Line

-	4150 3550 4150 3450

-Wire Wire Line

-	4150 3450 4300 3450

-Wire Wire Line

-	6700 3050 6450 3050

-$Comp

-L d_or U4

-U 1 1 5CF0AF26

-P 4900 4100

-F 0 "U4" H 4900 4100 60  0000 C CNN

-F 1 "d_or" H 4900 4200 60  0000 C CNN

-F 2 "" H 4900 4100 60  0000 C CNN

-F 3 "" H 4900 4100 60  0000 C CNN

-	1    4900 4100

-	1    0    0    -1  

-$EndComp

-$Comp

-L d_or U5

-U 1 1 5CF0AF27

-P 4900 4650

-F 0 "U5" H 4900 4650 60  0000 C CNN

-F 1 "d_or" H 4900 4750 60  0000 C CNN

-F 2 "" H 4900 4650 60  0000 C CNN

-F 3 "" H 4900 4650 60  0000 C CNN

-	1    4900 4650

-	1    0    0    -1  

-$EndComp

-Wire Wire Line

-	5350 4050 5550 4050

-Wire Wire Line

-	5550 4050 5550 4200

-Wire Wire Line

-	5550 4200 5700 4200

-Wire Wire Line

-	5350 4600 5550 4600

-Wire Wire Line

-	5550 4600 5550 4300

-Wire Wire Line

-	5550 4300 5700 4300

-$Comp

-L PORT U1

-U 9 1 5CF0AF29

-P 4000 4000

-F 0 "U1" H 4050 4100 30  0000 C CNN

-F 1 "PORT" H 4000 4000 30  0000 C CNN

-F 2 "" H 4000 4000 60  0000 C CNN

-F 3 "" H 4000 4000 60  0000 C CNN

-	9    4000 4000

-	1    0    0    -1  

-$EndComp

-$Comp

-L PORT U1

-U 10 1 5CF0AF2A

-P 4050 4250

-F 0 "U1" H 4100 4350 30  0000 C CNN

-F 1 "PORT" H 4050 4250 30  0000 C CNN

-F 2 "" H 4050 4250 60  0000 C CNN

-F 3 "" H 4050 4250 60  0000 C CNN

-	10   4050 4250

-	1    0    0    -1  

-$EndComp

-$Comp

-L PORT U1

-U 11 1 5CF0AF2B

-P 4050 4450

-F 0 "U1" H 4100 4550 30  0000 C CNN

-F 1 "PORT" H 4050 4450 30  0000 C CNN

-F 2 "" H 4050 4450 60  0000 C CNN

-F 3 "" H 4050 4450 60  0000 C CNN

-	11   4050 4450

-	1    0    0    -1  

-$EndComp

-$Comp

-L PORT U1

-U 12 1 5CF0AF2C

-P 4050 4750

-F 0 "U1" H 4100 4850 30  0000 C CNN

-F 1 "PORT" H 4050 4750 30  0000 C CNN

-F 2 "" H 4050 4750 60  0000 C CNN

-F 3 "" H 4050 4750 60  0000 C CNN

-	12   4050 4750

-	1    0    0    -1  

-$EndComp

-$Comp

-L PORT U1

-U 13 1 5CF0AF2D

-P 7100 4250

-F 0 "U1" H 7150 4350 30  0000 C CNN

-F 1 "PORT" H 7100 4250 30  0000 C CNN

-F 2 "" H 7100 4250 60  0000 C CNN

-F 3 "" H 7100 4250 60  0000 C CNN

-	13   7100 4250

-	-1   0    0    1   

-$EndComp

-Wire Wire Line

-	4250 4000 4450 4000

-Wire Wire Line

-	4300 4250 4300 4100

-Wire Wire Line

-	4300 4100 4450 4100

-Wire Wire Line

-	4300 4450 4450 4450

-Wire Wire Line

-	4450 4450 4450 4550

-Wire Wire Line

-	4300 4750 4300 4650

-Wire Wire Line

-	4300 4650 4450 4650

-Wire Wire Line

-	6850 4250 6600 4250

-$Comp

-L PORT U1

-U 6 1 5CF0AF2E

-P 6300 5350

-F 0 "U1" H 6350 5450 30  0000 C CNN

-F 1 "PORT" H 6300 5350 30  0000 C CNN

-F 2 "" H 6300 5350 60  0000 C CNN

-F 3 "" H 6300 5350 60  0000 C CNN

-	6    6300 5350

-	-1   0    0    1   

-$EndComp

-$Comp

-L PORT U1

-U 7 1 5CF0AF2F

-P 6300 5550

-F 0 "U1" H 6350 5650 30  0000 C CNN

-F 1 "PORT" H 6300 5550 30  0000 C CNN

-F 2 "" H 6300 5550 60  0000 C CNN

-F 3 "" H 6300 5550 60  0000 C CNN

-	7    6300 5550

-	-1   0    0    1   

-$EndComp

-$Comp

-L PORT U1

-U 8 1 5CF0AF30

-P 6300 5800

-F 0 "U1" H 6350 5900 30  0000 C CNN

-F 1 "PORT" H 6300 5800 30  0000 C CNN

-F 2 "" H 6300 5800 60  0000 C CNN

-F 3 "" H 6300 5800 60  0000 C CNN

-	8    6300 5800

-	-1   0    0    1   

-$EndComp

-$Comp

-L PORT U1

-U 14 1 5CF0AF31

-P 6300 6000

-F 0 "U1" H 6350 6100 30  0000 C CNN

-F 1 "PORT" H 6300 6000 30  0000 C CNN

-F 2 "" H 6300 6000 60  0000 C CNN

-F 3 "" H 6300 6000 60  0000 C CNN

-	14   6300 6000

-	-1   0    0    1   

-$EndComp

-$Comp

-L d_or U6

-U 1 1 5CF0D6D2

-P 6000 3100

-F 0 "U6" H 6000 3100 60  0000 C CNN

-F 1 "d_or" H 6000 3200 60  0000 C CNN

-F 2 "" H 6000 3100 60  0000 C CNN

-F 3 "" H 6000 3100 60  0000 C CNN

-	1    6000 3100

-	1    0    0    -1  

-$EndComp

-$Comp

-L d_or U7

-U 1 1 5CF0D73F

-P 6150 4300

-F 0 "U7" H 6150 4300 60  0000 C CNN

-F 1 "d_or" H 6150 4400 60  0000 C CNN

-F 2 "" H 6150 4300 60  0000 C CNN

-F 3 "" H 6150 4300 60  0000 C CNN

-	1    6150 4300

-	1    0    0    -1  

-$EndComp

-$EndSCHEMATC

diff --git a/src/SubcircuitLibrary/4072/4072.sub b/src/SubcircuitLibrary/4072/4072.sub
deleted file mode 100644
index 174ea00d..00000000
--- a/src/SubcircuitLibrary/4072/4072.sub
+++ /dev/null
@@ -1,30 +0,0 @@
-* Subcircuit 4072

-.subckt 4072 net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ net-_u1-pad5_ ? ? ? net-_u1-pad9_ net-_u1-pad10_ net-_u1-pad11_ net-_u1-pad12_ net-_u1-pad13_ ? 

-* c:\users\bhargav\esim\src\subcircuitlibrary\4072\4072.cir

-* u2  net-_u1-pad5_ net-_u1-pad2_ net-_u2-pad3_ d_or

-* u3  net-_u1-pad3_ net-_u1-pad4_ net-_u3-pad3_ d_or

-* u4  net-_u1-pad9_ net-_u1-pad10_ net-_u4-pad3_ d_or

-* u5  net-_u1-pad11_ net-_u1-pad12_ net-_u5-pad3_ d_or

-* u6  net-_u2-pad3_ net-_u3-pad3_ net-_u1-pad1_ d_or

-* u7  net-_u4-pad3_ net-_u5-pad3_ net-_u1-pad13_ d_or

-a1 [net-_u1-pad5_ net-_u1-pad2_ ] net-_u2-pad3_ u2

-a2 [net-_u1-pad3_ net-_u1-pad4_ ] net-_u3-pad3_ u3

-a3 [net-_u1-pad9_ net-_u1-pad10_ ] net-_u4-pad3_ u4

-a4 [net-_u1-pad11_ net-_u1-pad12_ ] net-_u5-pad3_ u5

-a5 [net-_u2-pad3_ net-_u3-pad3_ ] net-_u1-pad1_ u6

-a6 [net-_u4-pad3_ net-_u5-pad3_ ] net-_u1-pad13_ u7

-* Schematic Name: d_or, NgSpice Name: d_or

-.model u2 d_or(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )

-* Schematic Name: d_or, NgSpice Name: d_or

-.model u3 d_or(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )

-* Schematic Name: d_or, NgSpice Name: d_or

-.model u4 d_or(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )

-* Schematic Name: d_or, NgSpice Name: d_or

-.model u5 d_or(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )

-* Schematic Name: d_or, NgSpice Name: d_or

-.model u6 d_or(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )

-* Schematic Name: d_or, NgSpice Name: d_or

-.model u7 d_or(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )

-* Control Statements

-

-.ends 4072
\ No newline at end of file
diff --git a/src/SubcircuitLibrary/4072/4072_Previous_Values.xml b/src/SubcircuitLibrary/4072/4072_Previous_Values.xml
deleted file mode 100644
index 0ccd120c..00000000
--- a/src/SubcircuitLibrary/4072/4072_Previous_Values.xml
+++ /dev/null
@@ -1 +0,0 @@
-<KicadtoNgspice><analysis><ac><field1 name="Lin">true</field1><field2 name="Dec">false</field2><field3 name="Oct">false</field3><field4 name="Start Frequency" /><field5 name="Stop Frequency" /><field6 name="No. of points" /><field7 name="Start Fre Combo">Hz</field7><field8 name="Stop Fre Combo">Hz</field8></ac><dc><field1 name="Source 1" /><field2 name="Start" /><field3 name="Increment" /><field4 name="Stop" /><field5 name="Operating Point">0</field5><field6 name="Start Combo">Volts or Amperes</field6><field7 name="Increment Combo">Volts or Amperes</field7><field8 name="Stop Combo">Volts or Amperes</field8><field9 name="Source 2" /><field10 name="Start" /><field11 name="Increment" /><field12 name="Stop" /><field13 name="Start Combo">Volts or Amperes</field13><field14 name="Increment Combo">Volts or Amperes</field14><field15 name="Stop Combo">Volts or Amperes</field15></dc><tran><field1 name="Start Time" /><field2 name="Step Time" /><field3 name="Stop Time" /><field4 name="Start Combo">Sec</field4><field5 name="Step Combo">Sec</field5><field6 name="Stop Combo">Sec</field6></tran></analysis><source /><model><u2 name="type">d_or<field1 name="Enter Fall Delay (default=1.0e-9)" /><field2 name="Enter Input Load (default=1.0e-12)" /><field3 name="Enter Rise Delay (default=1.0e-9)" /></u2><u3 name="type">d_or<field4 name="Enter Fall Delay (default=1.0e-9)" /><field5 name="Enter Input Load (default=1.0e-12)" /><field6 name="Enter Rise Delay (default=1.0e-9)" /></u3><u4 name="type">d_or<field7 name="Enter Fall Delay (default=1.0e-9)" /><field8 name="Enter Input Load (default=1.0e-12)" /><field9 name="Enter Rise Delay (default=1.0e-9)" /></u4><u5 name="type">d_or<field10 name="Enter Fall Delay (default=1.0e-9)" /><field11 name="Enter Input Load (default=1.0e-12)" /><field12 name="Enter Rise Delay (default=1.0e-9)" /></u5><u6 name="type">d_or<field13 name="Enter Fall Delay (default=1.0e-9)" /><field14 name="Enter Input Load (default=1.0e-12)" /><field15 name="Enter Rise Delay (default=1.0e-9)" /></u6><u7 name="type">d_or<field16 name="Enter Fall Delay (default=1.0e-9)" /><field17 name="Enter Input Load (default=1.0e-12)" /><field18 name="Enter Rise Delay (default=1.0e-9)" /></u7></model><devicemodel /><subcircuit /></KicadtoNgspice>
\ No newline at end of file
diff --git a/src/SubcircuitLibrary/4_bit_FA/3_and-cache.lib b/src/SubcircuitLibrary/4_bit_FA/3_and-cache.lib
deleted file mode 100644
index 0a3ccf7f..00000000
--- a/src/SubcircuitLibrary/4_bit_FA/3_and-cache.lib
+++ /dev/null
@@ -1,61 +0,0 @@
-EESchema-LIBRARY Version 2.3

-#encoding utf-8

-#

-# PORT

-#

-DEF PORT U 0 40 Y Y 26 F N

-F0 "U" 50 100 30 H V C CNN

-F1 "PORT" 0 0 30 H V C CNN

-F2 "" 0 0 60 H V C CNN

-F3 "" 0 0 60 H V C CNN

-DRAW

-A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0

-A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50

-S -100 50 100 -50 0 1 0 N

-X ~ 1 250 0 100 L 30 30 1 1 B

-X ~ 2 250 0 100 L 30 30 2 1 B

-X ~ 3 250 0 100 L 30 30 3 1 B

-X ~ 4 250 0 100 L 30 30 4 1 B

-X ~ 5 250 0 100 L 30 30 5 1 B

-X ~ 6 250 0 100 L 30 30 6 1 B

-X ~ 7 250 0 100 L 30 30 7 1 B

-X ~ 8 250 0 100 L 30 30 8 1 B

-X ~ 9 250 0 100 L 30 30 9 1 B

-X ~ 10 250 0 100 L 30 30 10 1 B

-X ~ 11 250 0 100 L 30 30 11 1 B

-X ~ 12 250 0 100 L 30 30 12 1 B

-X ~ 13 250 0 100 L 30 30 13 1 B

-X ~ 14 250 0 100 L 30 30 14 1 B

-X ~ 15 250 0 100 L 30 30 15 1 B

-X ~ 16 250 0 100 L 30 30 16 1 B

-X ~ 17 250 0 100 L 30 30 17 1 B

-X ~ 18 250 0 100 L 30 30 18 1 B

-X ~ 19 250 0 100 L 30 30 19 1 B

-X ~ 20 250 0 100 L 30 30 20 1 B

-X ~ 21 250 0 100 L 30 30 21 1 B

-X ~ 22 250 0 100 L 30 30 22 1 B

-X ~ 23 250 0 100 L 30 30 23 1 B

-X ~ 24 250 0 100 L 30 30 24 1 B

-X ~ 25 250 0 100 L 30 30 25 1 B

-X ~ 26 250 0 100 L 30 30 26 1 B

-ENDDRAW

-ENDDEF

-#

-# d_and

-#

-DEF d_and U 0 40 Y Y 1 F N

-F0 "U" 0 0 60 H V C CNN

-F1 "d_and" 50 100 60 H V C CNN

-F2 "" 0 0 60 H V C CNN

-F3 "" 0 0 60 H V C CNN

-DRAW

-A 149 50 100 -894 0 0 1 0 N 150 -50 250 50

-A 150 49 100 6 900 0 1 0 N 250 50 150 150

-P 4 0 1 0  150 -50  -250 -50  -250 150  150 150 N

-X IN1 1 -450 100 200 R 50 50 1 1 I

-X IN2 2 -450 0 200 R 50 50 1 1 I

-X OUT 3 450 50 200 L 50 50 1 1 O

-ENDDRAW

-ENDDEF

-#

-#End Library

diff --git a/src/SubcircuitLibrary/4_bit_FA/3_and.cir b/src/SubcircuitLibrary/4_bit_FA/3_and.cir
deleted file mode 100644
index 15f8954d..00000000
--- a/src/SubcircuitLibrary/4_bit_FA/3_and.cir
+++ /dev/null
@@ -1,13 +0,0 @@
-* C:\Users\malli\eSim\src\SubcircuitLibrary\3_and\3_and.cir

-

-* EESchema Netlist Version 1.1 (Spice format) creation date: 03/26/19 18:42:57

-

-* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N

-* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0

-

-* Sheet Name: /

-U2  Net-_U1-Pad1_ Net-_U1-Pad2_ Net-_U2-Pad3_ d_and		

-U3  Net-_U2-Pad3_ Net-_U1-Pad3_ Net-_U1-Pad4_ d_and		

-U1  Net-_U1-Pad1_ Net-_U1-Pad2_ Net-_U1-Pad3_ Net-_U1-Pad4_ PORT		

-

-.end

diff --git a/src/SubcircuitLibrary/4_bit_FA/3_and.cir.out b/src/SubcircuitLibrary/4_bit_FA/3_and.cir.out
deleted file mode 100644
index e3c96645..00000000
--- a/src/SubcircuitLibrary/4_bit_FA/3_and.cir.out
+++ /dev/null
@@ -1,20 +0,0 @@
-* c:\users\malli\esim\src\subcircuitlibrary\3_and\3_and.cir

-

-* u2  net-_u1-pad1_ net-_u1-pad2_ net-_u2-pad3_ d_and

-* u3  net-_u2-pad3_ net-_u1-pad3_ net-_u1-pad4_ d_and

-* u1  net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ port

-a1 [net-_u1-pad1_ net-_u1-pad2_ ] net-_u2-pad3_ u2

-a2 [net-_u2-pad3_ net-_u1-pad3_ ] net-_u1-pad4_ u3

-* Schematic Name: d_and, NgSpice Name: d_and

-.model u2 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 

-* Schematic Name: d_and, NgSpice Name: d_and

-.model u3 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 

-.tran 0e-00 0e-00 0e-00

-

-* Control Statements 

-.control

-run

-print allv > plot_data_v.txt

-print alli > plot_data_i.txt

-.endc

-.end

diff --git a/src/SubcircuitLibrary/4_bit_FA/3_and.pro b/src/SubcircuitLibrary/4_bit_FA/3_and.pro
deleted file mode 100644
index 1b535492..00000000
--- a/src/SubcircuitLibrary/4_bit_FA/3_and.pro
+++ /dev/null
@@ -1,58 +0,0 @@
-update=03/26/19 18:40:23

-version=1

-last_client=eeschema

-[general]

-version=1

-RootSch=

-BoardNm=

-[pcbnew]

-version=1

-LastNetListRead=

-UseCmpFile=1

-PadDrill=0.600000000000

-PadDrillOvalY=0.600000000000

-PadSizeH=1.500000000000

-PadSizeV=1.500000000000

-PcbTextSizeV=1.500000000000

-PcbTextSizeH=1.500000000000

-PcbTextThickness=0.300000000000

-ModuleTextSizeV=1.000000000000

-ModuleTextSizeH=1.000000000000

-ModuleTextSizeThickness=0.150000000000

-SolderMaskClearance=0.000000000000

-SolderMaskMinWidth=0.000000000000

-DrawSegmentWidth=0.200000000000

-BoardOutlineThickness=0.100000000000

-ModuleOutlineThickness=0.150000000000

-[cvpcb]

-version=1

-NetIExt=net

-[eeschema]

-version=1

-LibDir=

-[eeschema/libraries]

-LibName1=power

-LibName2=texas

-LibName3=intel

-LibName4=audio

-LibName5=interface

-LibName6=digital-audio

-LibName7=philips

-LibName8=display

-LibName9=cypress

-LibName10=siliconi

-LibName11=opto

-LibName12=atmel

-LibName13=contrib

-LibName14=valves

-LibName15=eSim_Analog

-LibName16=eSim_Devices

-LibName17=eSim_Digital

-LibName18=eSim_Hybrid

-LibName19=eSim_Miscellaneous

-LibName20=eSim_Plot

-LibName21=eSim_Power

-LibName22=eSim_PSpice

-LibName23=eSim_Sources

-LibName24=eSim_Subckt

-LibName25=eSim_User

diff --git a/src/SubcircuitLibrary/4_bit_FA/3_and.sch b/src/SubcircuitLibrary/4_bit_FA/3_and.sch
deleted file mode 100644
index 6c8d3d4a..00000000
--- a/src/SubcircuitLibrary/4_bit_FA/3_and.sch
+++ /dev/null
@@ -1,121 +0,0 @@
-EESchema Schematic File Version 2

-LIBS:power

-LIBS:texas

-LIBS:intel

-LIBS:audio

-LIBS:interface

-LIBS:digital-audio

-LIBS:philips

-LIBS:display

-LIBS:cypress

-LIBS:siliconi

-LIBS:opto

-LIBS:atmel

-LIBS:contrib

-LIBS:valves

-LIBS:eSim_Analog

-LIBS:eSim_Devices

-LIBS:eSim_Digital

-LIBS:eSim_Hybrid

-LIBS:eSim_Miscellaneous

-LIBS:eSim_Plot

-LIBS:eSim_Power

-LIBS:eSim_PSpice

-LIBS:eSim_Sources

-LIBS:eSim_Subckt

-LIBS:eSim_User

-EELAYER 25 0

-EELAYER END

-$Descr A4 11693 8268

-encoding utf-8

-Sheet 1 1

-Title ""

-Date ""

-Rev ""

-Comp ""

-Comment1 ""

-Comment2 ""

-Comment3 ""

-Comment4 ""

-$EndDescr

-$Comp

-L d_and U2

-U 1 1 5C9A24D8

-P 4250 2700

-F 0 "U2" H 4250 2700 60  0000 C CNN

-F 1 "d_and" H 4300 2800 60  0000 C CNN

-F 2 "" H 4250 2700 60  0000 C CNN

-F 3 "" H 4250 2700 60  0000 C CNN

-	1    4250 2700

-	1    0    0    -1  

-$EndComp

-$Comp

-L d_and U3

-U 1 1 5C9A2538

-P 5150 2900

-F 0 "U3" H 5150 2900 60  0000 C CNN

-F 1 "d_and" H 5200 3000 60  0000 C CNN

-F 2 "" H 5150 2900 60  0000 C CNN

-F 3 "" H 5150 2900 60  0000 C CNN

-	1    5150 2900

-	1    0    0    -1  

-$EndComp

-$Comp

-L PORT U1

-U 1 1 5C9A259A

-P 3050 2600

-F 0 "U1" H 3100 2700 30  0000 C CNN

-F 1 "PORT" H 3050 2600 30  0000 C CNN

-F 2 "" H 3050 2600 60  0000 C CNN

-F 3 "" H 3050 2600 60  0000 C CNN

-	1    3050 2600

-	1    0    0    -1  

-$EndComp

-$Comp

-L PORT U1

-U 2 1 5C9A25D9

-P 3050 2800

-F 0 "U1" H 3100 2900 30  0000 C CNN

-F 1 "PORT" H 3050 2800 30  0000 C CNN

-F 2 "" H 3050 2800 60  0000 C CNN

-F 3 "" H 3050 2800 60  0000 C CNN

-	2    3050 2800

-	1    0    0    -1  

-$EndComp

-$Comp

-L PORT U1

-U 3 1 5C9A260A

-P 3050 3100

-F 0 "U1" H 3100 3200 30  0000 C CNN

-F 1 "PORT" H 3050 3100 30  0000 C CNN

-F 2 "" H 3050 3100 60  0000 C CNN

-F 3 "" H 3050 3100 60  0000 C CNN

-	3    3050 3100

-	1    0    0    -1  

-$EndComp

-$Comp

-L PORT U1

-U 4 1 5C9A2637

-P 6900 2850

-F 0 "U1" H 6950 2950 30  0000 C CNN

-F 1 "PORT" H 6900 2850 30  0000 C CNN

-F 2 "" H 6900 2850 60  0000 C CNN

-F 3 "" H 6900 2850 60  0000 C CNN

-	4    6900 2850

-	-1   0    0    1   

-$EndComp

-Wire Wire Line

-	4700 2650 4700 2800

-Wire Wire Line

-	5600 2850 6650 2850

-Wire Wire Line

-	3800 2600 3300 2600

-Wire Wire Line

-	3800 2700 3300 2700

-Wire Wire Line

-	3300 2700 3300 2800

-Wire Wire Line

-	3300 3100 4700 3100

-Wire Wire Line

-	4700 3100 4700 2900

-$EndSCHEMATC

diff --git a/src/SubcircuitLibrary/4_bit_FA/3_and.sub b/src/SubcircuitLibrary/4_bit_FA/3_and.sub
deleted file mode 100644
index b949ae4f..00000000
--- a/src/SubcircuitLibrary/4_bit_FA/3_and.sub
+++ /dev/null
@@ -1,14 +0,0 @@
-* Subcircuit 3_and

-.subckt 3_and net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ 

-* c:\users\malli\esim\src\subcircuitlibrary\3_and\3_and.cir

-* u2  net-_u1-pad1_ net-_u1-pad2_ net-_u2-pad3_ d_and

-* u3  net-_u2-pad3_ net-_u1-pad3_ net-_u1-pad4_ d_and

-a1 [net-_u1-pad1_ net-_u1-pad2_ ] net-_u2-pad3_ u2

-a2 [net-_u2-pad3_ net-_u1-pad3_ ] net-_u1-pad4_ u3

-* Schematic Name: d_and, NgSpice Name: d_and

-.model u2 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )

-* Schematic Name: d_and, NgSpice Name: d_and

-.model u3 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )

-* Control Statements

-

-.ends 3_and
\ No newline at end of file
diff --git a/src/SubcircuitLibrary/4_bit_FA/4_OR-cache.lib b/src/SubcircuitLibrary/4_bit_FA/4_OR-cache.lib
deleted file mode 100644
index a3c1c972..00000000
--- a/src/SubcircuitLibrary/4_bit_FA/4_OR-cache.lib
+++ /dev/null
@@ -1,63 +0,0 @@
-EESchema-LIBRARY Version 2.3

-#encoding utf-8

-#

-# PORT

-#

-DEF PORT U 0 40 Y Y 26 F N

-F0 "U" 50 100 30 H V C CNN

-F1 "PORT" 0 0 30 H V C CNN

-F2 "" 0 0 60 H V C CNN

-F3 "" 0 0 60 H V C CNN

-DRAW

-A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0

-A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50

-S -100 50 100 -50 0 1 0 N

-X ~ 1 250 0 100 L 30 30 1 1 B

-X ~ 2 250 0 100 L 30 30 2 1 B

-X ~ 3 250 0 100 L 30 30 3 1 B

-X ~ 4 250 0 100 L 30 30 4 1 B

-X ~ 5 250 0 100 L 30 30 5 1 B

-X ~ 6 250 0 100 L 30 30 6 1 B

-X ~ 7 250 0 100 L 30 30 7 1 B

-X ~ 8 250 0 100 L 30 30 8 1 B

-X ~ 9 250 0 100 L 30 30 9 1 B

-X ~ 10 250 0 100 L 30 30 10 1 B

-X ~ 11 250 0 100 L 30 30 11 1 B

-X ~ 12 250 0 100 L 30 30 12 1 B

-X ~ 13 250 0 100 L 30 30 13 1 B

-X ~ 14 250 0 100 L 30 30 14 1 B

-X ~ 15 250 0 100 L 30 30 15 1 B

-X ~ 16 250 0 100 L 30 30 16 1 B

-X ~ 17 250 0 100 L 30 30 17 1 B

-X ~ 18 250 0 100 L 30 30 18 1 B

-X ~ 19 250 0 100 L 30 30 19 1 B

-X ~ 20 250 0 100 L 30 30 20 1 B

-X ~ 21 250 0 100 L 30 30 21 1 B

-X ~ 22 250 0 100 L 30 30 22 1 B

-X ~ 23 250 0 100 L 30 30 23 1 B

-X ~ 24 250 0 100 L 30 30 24 1 B

-X ~ 25 250 0 100 L 30 30 25 1 B

-X ~ 26 250 0 100 L 30 30 26 1 B

-ENDDRAW

-ENDDEF

-#

-# d_or

-#

-DEF d_or U 0 40 Y Y 1 F N

-F0 "U" 0 0 60 H V C CNN

-F1 "d_or" 0 100 60 H V C CNN

-F2 "" 0 0 60 H V C CNN

-F3 "" 0 0 60 H V C CNN

-DRAW

-A -450 50 224 266 -266 0 1 0 N -250 150 -250 -50

-A -25 -124 325 574 323 0 1 0 N 150 150 250 50

-A 74 125 191 -665 -231 0 1 0 N 150 -50 250 50

-P 2 0 1 0  -250 -50  150 -50 N

-P 2 0 1 0  -250 150  150 150 N

-X IN1 1 -450 100 215 R 50 50 1 1 I

-X IN2 2 -450 0 215 R 50 50 1 1 I

-X OUT 3 450 50 200 L 50 50 1 1 O

-ENDDRAW

-ENDDEF

-#

-#End Library

diff --git a/src/SubcircuitLibrary/4_bit_FA/4_OR.cir b/src/SubcircuitLibrary/4_bit_FA/4_OR.cir
deleted file mode 100644
index 7adbf177..00000000
--- a/src/SubcircuitLibrary/4_bit_FA/4_OR.cir
+++ /dev/null
@@ -1,14 +0,0 @@
-* C:\Users\malli\eSim\src\SubcircuitLibrary\4_OR\4_OR.cir

-

-* EESchema Netlist Version 1.1 (Spice format) creation date: 03/28/19 22:47:12

-

-* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N

-* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0

-

-* Sheet Name: /

-U2  Net-_U1-Pad1_ Net-_U1-Pad2_ Net-_U2-Pad3_ d_or		

-U3  Net-_U1-Pad3_ Net-_U1-Pad4_ Net-_U3-Pad3_ d_or		

-U4  Net-_U2-Pad3_ Net-_U3-Pad3_ Net-_U1-Pad5_ d_or		

-U1  Net-_U1-Pad1_ Net-_U1-Pad2_ Net-_U1-Pad3_ Net-_U1-Pad4_ Net-_U1-Pad5_ PORT		

-

-.end

diff --git a/src/SubcircuitLibrary/4_bit_FA/4_OR.cir.out b/src/SubcircuitLibrary/4_bit_FA/4_OR.cir.out
deleted file mode 100644
index 4388b975..00000000
--- a/src/SubcircuitLibrary/4_bit_FA/4_OR.cir.out
+++ /dev/null
@@ -1,24 +0,0 @@
-* c:\users\malli\esim\src\subcircuitlibrary\4_or\4_or.cir

-

-* u2  net-_u1-pad1_ net-_u1-pad2_ net-_u2-pad3_ d_or

-* u3  net-_u1-pad3_ net-_u1-pad4_ net-_u3-pad3_ d_or

-* u4  net-_u2-pad3_ net-_u3-pad3_ net-_u1-pad5_ d_or

-* u1  net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ net-_u1-pad5_ port

-a1 [net-_u1-pad1_ net-_u1-pad2_ ] net-_u2-pad3_ u2

-a2 [net-_u1-pad3_ net-_u1-pad4_ ] net-_u3-pad3_ u3

-a3 [net-_u2-pad3_ net-_u3-pad3_ ] net-_u1-pad5_ u4

-* Schematic Name: d_or, NgSpice Name: d_or

-.model u2 d_or(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 

-* Schematic Name: d_or, NgSpice Name: d_or

-.model u3 d_or(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 

-* Schematic Name: d_or, NgSpice Name: d_or

-.model u4 d_or(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 

-.tran 0e-00 0e-00 0e-00

-

-* Control Statements 

-.control

-run

-print allv > plot_data_v.txt

-print alli > plot_data_i.txt

-.endc

-.end

diff --git a/src/SubcircuitLibrary/4_bit_FA/4_OR.pro b/src/SubcircuitLibrary/4_bit_FA/4_OR.pro
deleted file mode 100644
index 8bd4bbf5..00000000
--- a/src/SubcircuitLibrary/4_bit_FA/4_OR.pro
+++ /dev/null
@@ -1,45 +0,0 @@
-update=03/28/19 22:43:48

-version=1

-last_client=eeschema

-[general]

-version=1

-RootSch=

-BoardNm=

-[pcbnew]

-version=1

-LastNetListRead=

-UseCmpFile=1

-PadDrill=0.600000000000

-PadDrillOvalY=0.600000000000

-PadSizeH=1.500000000000

-PadSizeV=1.500000000000

-PcbTextSizeV=1.500000000000

-PcbTextSizeH=1.500000000000

-PcbTextThickness=0.300000000000

-ModuleTextSizeV=1.000000000000

-ModuleTextSizeH=1.000000000000

-ModuleTextSizeThickness=0.150000000000

-SolderMaskClearance=0.000000000000

-SolderMaskMinWidth=0.000000000000

-DrawSegmentWidth=0.200000000000

-BoardOutlineThickness=0.100000000000

-ModuleOutlineThickness=0.150000000000

-[cvpcb]

-version=1

-NetIExt=net

-[eeschema]

-version=1

-LibDir=

-[eeschema/libraries]

-LibName1=power

-LibName2=eSim_Analog

-LibName3=eSim_Devices

-LibName4=eSim_Digital

-LibName5=eSim_Hybrid

-LibName6=eSim_Miscellaneous

-LibName7=eSim_Plot

-LibName8=eSim_Power

-LibName9=eSim_PSpice

-LibName10=eSim_Sources

-LibName11=eSim_Subckt

-LibName12=eSim_User

diff --git a/src/SubcircuitLibrary/4_bit_FA/4_OR.sch b/src/SubcircuitLibrary/4_bit_FA/4_OR.sch
deleted file mode 100644
index 2f28896c..00000000
--- a/src/SubcircuitLibrary/4_bit_FA/4_OR.sch
+++ /dev/null
@@ -1,150 +0,0 @@
-EESchema Schematic File Version 2

-LIBS:power

-LIBS:eSim_Analog

-LIBS:eSim_Devices

-LIBS:eSim_Digital

-LIBS:eSim_Hybrid

-LIBS:eSim_Miscellaneous

-LIBS:eSim_Plot

-LIBS:eSim_Power

-LIBS:eSim_PSpice

-LIBS:eSim_Sources

-LIBS:eSim_Subckt

-LIBS:eSim_User

-EELAYER 25 0

-EELAYER END

-$Descr A4 11693 8268

-encoding utf-8

-Sheet 1 1

-Title ""

-Date ""

-Rev ""

-Comp ""

-Comment1 ""

-Comment2 ""

-Comment3 ""

-Comment4 ""

-$EndDescr

-$Comp

-L d_or U2

-U 1 1 5C9D00E1

-P 4300 2950

-F 0 "U2" H 4300 2950 60  0000 C CNN

-F 1 "d_or" H 4300 3050 60  0000 C CNN

-F 2 "" H 4300 2950 60  0000 C CNN

-F 3 "" H 4300 2950 60  0000 C CNN

-	1    4300 2950

-	1    0    0    -1  

-$EndComp

-$Comp

-L d_or U3

-U 1 1 5C9D011F

-P 4300 3350

-F 0 "U3" H 4300 3350 60  0000 C CNN

-F 1 "d_or" H 4300 3450 60  0000 C CNN

-F 2 "" H 4300 3350 60  0000 C CNN

-F 3 "" H 4300 3350 60  0000 C CNN

-	1    4300 3350

-	1    0    0    -1  

-$EndComp

-$Comp

-L d_or U4

-U 1 1 5C9D0141

-P 5250 3150

-F 0 "U4" H 5250 3150 60  0000 C CNN

-F 1 "d_or" H 5250 3250 60  0000 C CNN

-F 2 "" H 5250 3150 60  0000 C CNN

-F 3 "" H 5250 3150 60  0000 C CNN

-	1    5250 3150

-	1    0    0    -1  

-$EndComp

-Wire Wire Line

-	4800 3050 4800 2900

-Wire Wire Line

-	4800 2900 4750 2900

-Wire Wire Line

-	4800 3150 4800 3300

-Wire Wire Line

-	4800 3300 4750 3300

-Wire Wire Line

-	3350 2850 3850 2850

-Wire Wire Line

-	3850 2950 3600 2950

-Wire Wire Line

-	3850 3250 3350 3250

-Wire Wire Line

-	3600 2950 3600 3000

-Wire Wire Line

-	3600 3000 3350 3000

-Wire Wire Line

-	3850 3350 3850 3400

-Wire Wire Line

-	3850 3400 3350 3400

-Wire Wire Line

-	5700 3100 6200 3100

-$Comp

-L PORT U1

-U 1 1 5C9D01F4

-P 3100 2850

-F 0 "U1" H 3150 2950 30  0000 C CNN

-F 1 "PORT" H 3100 2850 30  0000 C CNN

-F 2 "" H 3100 2850 60  0000 C CNN

-F 3 "" H 3100 2850 60  0000 C CNN

-	1    3100 2850

-	1    0    0    -1  

-$EndComp

-$Comp

-L PORT U1

-U 2 1 5C9D022F

-P 3100 3000

-F 0 "U1" H 3150 3100 30  0000 C CNN

-F 1 "PORT" H 3100 3000 30  0000 C CNN

-F 2 "" H 3100 3000 60  0000 C CNN

-F 3 "" H 3100 3000 60  0000 C CNN

-	2    3100 3000

-	1    0    0    -1  

-$EndComp

-$Comp

-L PORT U1

-U 3 1 5C9D0271

-P 3100 3250

-F 0 "U1" H 3150 3350 30  0000 C CNN

-F 1 "PORT" H 3100 3250 30  0000 C CNN

-F 2 "" H 3100 3250 60  0000 C CNN

-F 3 "" H 3100 3250 60  0000 C CNN

-	3    3100 3250

-	1    0    0    -1  

-$EndComp

-$Comp

-L PORT U1

-U 4 1 5C9D0299

-P 3100 3400

-F 0 "U1" H 3150 3500 30  0000 C CNN

-F 1 "PORT" H 3100 3400 30  0000 C CNN

-F 2 "" H 3100 3400 60  0000 C CNN

-F 3 "" H 3100 3400 60  0000 C CNN

-	4    3100 3400

-	1    0    0    -1  

-$EndComp

-$Comp

-L PORT U1

-U 5 1 5C9D02C2

-P 6450 3100

-F 0 "U1" H 6500 3200 30  0000 C CNN

-F 1 "PORT" H 6450 3100 30  0000 C CNN

-F 2 "" H 6450 3100 60  0000 C CNN

-F 3 "" H 6450 3100 60  0000 C CNN

-	5    6450 3100

-	-1   0    0    1   

-$EndComp

-Text Notes 3450 2850 0    60   ~ 12

-in1

-Text Notes 3450 3000 0    60   ~ 12

-in2

-Text Notes 3450 3250 0    60   ~ 12

-in3

-Text Notes 3450 3400 0    60   ~ 12

-in4

-Text Notes 5800 3100 0    60   ~ 12

-out

-$EndSCHEMATC

diff --git a/src/SubcircuitLibrary/4_bit_FA/4_OR.sub b/src/SubcircuitLibrary/4_bit_FA/4_OR.sub
deleted file mode 100644
index 53fc8b33..00000000
--- a/src/SubcircuitLibrary/4_bit_FA/4_OR.sub
+++ /dev/null
@@ -1,18 +0,0 @@
-* Subcircuit 4_OR

-.subckt 4_OR net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ net-_u1-pad5_ 

-* c:\users\malli\esim\src\subcircuitlibrary\4_or\4_or.cir

-* u2  net-_u1-pad1_ net-_u1-pad2_ net-_u2-pad3_ d_or

-* u3  net-_u1-pad3_ net-_u1-pad4_ net-_u3-pad3_ d_or

-* u4  net-_u2-pad3_ net-_u3-pad3_ net-_u1-pad5_ d_or

-a1 [net-_u1-pad1_ net-_u1-pad2_ ] net-_u2-pad3_ u2

-a2 [net-_u1-pad3_ net-_u1-pad4_ ] net-_u3-pad3_ u3

-a3 [net-_u2-pad3_ net-_u3-pad3_ ] net-_u1-pad5_ u4

-* Schematic Name: d_or, NgSpice Name: d_or

-.model u2 d_or(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )

-* Schematic Name: d_or, NgSpice Name: d_or

-.model u3 d_or(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )

-* Schematic Name: d_or, NgSpice Name: d_or

-.model u4 d_or(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )

-* Control Statements

-

-.ends 4_OR
\ No newline at end of file
diff --git a/src/SubcircuitLibrary/4_bit_FA/4_and-cache.lib b/src/SubcircuitLibrary/4_bit_FA/4_and-cache.lib
deleted file mode 100644
index 4cf915be..00000000
--- a/src/SubcircuitLibrary/4_bit_FA/4_and-cache.lib
+++ /dev/null
@@ -1,79 +0,0 @@
-EESchema-LIBRARY Version 2.3

-#encoding utf-8

-#

-# 3_and

-#

-DEF 3_and X 0 40 Y Y 1 F N

-F0 "X" 900 300 60 H V C CNN

-F1 "3_and" 950 500 60 H V C CNN

-F2 "" 0 0 60 H V C CNN

-F3 "" 0 0 60 H V C CNN

-DRAW

-A 950 400 158 716 -716 0 1 0 N 1000 550 1000 250

-P 2 0 1 0  650 550  1000 550 N

-P 3 0 1 0  650 550  650 250  1000 250 N

-X in1 1 450 500 200 R 50 50 1 1 I

-X in2 2 450 400 200 R 50 50 1 1 I

-X in3 3 450 300 200 R 50 50 1 1 I

-X out 4 1300 400 200 L 50 50 1 1 O

-ENDDRAW

-ENDDEF

-#

-# PORT

-#

-DEF PORT U 0 40 Y Y 26 F N

-F0 "U" 50 100 30 H V C CNN

-F1 "PORT" 0 0 30 H V C CNN

-F2 "" 0 0 60 H V C CNN

-F3 "" 0 0 60 H V C CNN

-DRAW

-A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0

-A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50

-S -100 50 100 -50 0 1 0 N

-X ~ 1 250 0 100 L 30 30 1 1 B

-X ~ 2 250 0 100 L 30 30 2 1 B

-X ~ 3 250 0 100 L 30 30 3 1 B

-X ~ 4 250 0 100 L 30 30 4 1 B

-X ~ 5 250 0 100 L 30 30 5 1 B

-X ~ 6 250 0 100 L 30 30 6 1 B

-X ~ 7 250 0 100 L 30 30 7 1 B

-X ~ 8 250 0 100 L 30 30 8 1 B

-X ~ 9 250 0 100 L 30 30 9 1 B

-X ~ 10 250 0 100 L 30 30 10 1 B

-X ~ 11 250 0 100 L 30 30 11 1 B

-X ~ 12 250 0 100 L 30 30 12 1 B

-X ~ 13 250 0 100 L 30 30 13 1 B

-X ~ 14 250 0 100 L 30 30 14 1 B

-X ~ 15 250 0 100 L 30 30 15 1 B

-X ~ 16 250 0 100 L 30 30 16 1 B

-X ~ 17 250 0 100 L 30 30 17 1 B

-X ~ 18 250 0 100 L 30 30 18 1 B

-X ~ 19 250 0 100 L 30 30 19 1 B

-X ~ 20 250 0 100 L 30 30 20 1 B

-X ~ 21 250 0 100 L 30 30 21 1 B

-X ~ 22 250 0 100 L 30 30 22 1 B

-X ~ 23 250 0 100 L 30 30 23 1 B

-X ~ 24 250 0 100 L 30 30 24 1 B

-X ~ 25 250 0 100 L 30 30 25 1 B

-X ~ 26 250 0 100 L 30 30 26 1 B

-ENDDRAW

-ENDDEF

-#

-# d_and

-#

-DEF d_and U 0 40 Y Y 1 F N

-F0 "U" 0 0 60 H V C CNN

-F1 "d_and" 50 100 60 H V C CNN

-F2 "" 0 0 60 H V C CNN

-F3 "" 0 0 60 H V C CNN

-DRAW

-A 149 50 100 -894 0 0 1 0 N 150 -50 250 50

-A 150 49 100 6 900 0 1 0 N 250 50 150 150

-P 4 0 1 0  150 -50  -250 -50  -250 150  150 150 N

-X IN1 1 -450 100 200 R 50 50 1 1 I

-X IN2 2 -450 0 200 R 50 50 1 1 I

-X OUT 3 450 50 200 L 50 50 1 1 O

-ENDDRAW

-ENDDEF

-#

-#End Library

diff --git a/src/SubcircuitLibrary/4_bit_FA/4_and.cir b/src/SubcircuitLibrary/4_bit_FA/4_and.cir
deleted file mode 100644
index 25e839cd..00000000
--- a/src/SubcircuitLibrary/4_bit_FA/4_and.cir
+++ /dev/null
@@ -1,13 +0,0 @@
-* C:\Users\malli\eSim\src\SubcircuitLibrary\4_and\4_and.cir

-

-* EESchema Netlist Version 1.1 (Spice format) creation date: 03/26/19 19:01:09

-

-* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N

-* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0

-

-* Sheet Name: /

-X1  Net-_U1-Pad1_ Net-_U1-Pad2_ Net-_U1-Pad3_ Net-_U2-Pad1_ 3_and		

-U2  Net-_U2-Pad1_ Net-_U1-Pad4_ Net-_U1-Pad5_ d_and		

-U1  Net-_U1-Pad1_ Net-_U1-Pad2_ Net-_U1-Pad3_ Net-_U1-Pad4_ Net-_U1-Pad5_ PORT		

-

-.end

diff --git a/src/SubcircuitLibrary/4_bit_FA/4_and.cir.out b/src/SubcircuitLibrary/4_bit_FA/4_and.cir.out
deleted file mode 100644
index 6e35b18a..00000000
--- a/src/SubcircuitLibrary/4_bit_FA/4_and.cir.out
+++ /dev/null
@@ -1,18 +0,0 @@
-* c:\users\malli\esim\src\subcircuitlibrary\4_and\4_and.cir

-

-.include 3_and.sub

-x1 net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u2-pad1_ 3_and

-* u2  net-_u2-pad1_ net-_u1-pad4_ net-_u1-pad5_ d_and

-* u1  net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ net-_u1-pad5_ port

-a1 [net-_u2-pad1_ net-_u1-pad4_ ] net-_u1-pad5_ u2

-* Schematic Name: d_and, NgSpice Name: d_and

-.model u2 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 

-.tran 0e-00 0e-00 0e-00

-

-* Control Statements 

-.control

-run

-print allv > plot_data_v.txt

-print alli > plot_data_i.txt

-.endc

-.end

diff --git a/src/SubcircuitLibrary/4_bit_FA/4_and.pro b/src/SubcircuitLibrary/4_bit_FA/4_and.pro
deleted file mode 100644
index cc0f1b93..00000000
--- a/src/SubcircuitLibrary/4_bit_FA/4_and.pro
+++ /dev/null
@@ -1,57 +0,0 @@
-update=03/26/19 18:58:33

-version=1

-last_client=eeschema

-[general]

-version=1

-RootSch=

-BoardNm=

-[pcbnew]

-version=1

-LastNetListRead=

-UseCmpFile=1

-PadDrill=0.600000000000

-PadDrillOvalY=0.600000000000

-PadSizeH=1.500000000000

-PadSizeV=1.500000000000

-PcbTextSizeV=1.500000000000

-PcbTextSizeH=1.500000000000

-PcbTextThickness=0.300000000000

-ModuleTextSizeV=1.000000000000

-ModuleTextSizeH=1.000000000000

-ModuleTextSizeThickness=0.150000000000

-SolderMaskClearance=0.000000000000

-SolderMaskMinWidth=0.000000000000

-DrawSegmentWidth=0.200000000000

-BoardOutlineThickness=0.100000000000

-ModuleOutlineThickness=0.150000000000

-[cvpcb]

-version=1

-NetIExt=net

-[eeschema]

-version=1

-LibDir=

-[eeschema/libraries]

-LibName1=texas

-LibName2=intel

-LibName3=audio

-LibName4=interface

-LibName5=digital-audio

-LibName6=philips

-LibName7=display

-LibName8=cypress

-LibName9=siliconi

-LibName10=opto

-LibName11=atmel

-LibName12=contrib

-LibName13=valves

-LibName14=eSim_Analog

-LibName15=eSim_Devices

-LibName16=eSim_Digital

-LibName17=eSim_Hybrid

-LibName18=eSim_Miscellaneous

-LibName19=eSim_Plot

-LibName20=eSim_Power

-LibName21=eSim_PSpice

-LibName22=eSim_Sources

-LibName23=eSim_Subckt

-LibName24=eSim_User

diff --git a/src/SubcircuitLibrary/4_bit_FA/4_and.sch b/src/SubcircuitLibrary/4_bit_FA/4_and.sch
deleted file mode 100644
index bcc3cecf..00000000
--- a/src/SubcircuitLibrary/4_bit_FA/4_and.sch
+++ /dev/null
@@ -1,139 +0,0 @@
-EESchema Schematic File Version 2

-LIBS:texas

-LIBS:intel

-LIBS:audio

-LIBS:interface

-LIBS:digital-audio

-LIBS:philips

-LIBS:display

-LIBS:cypress

-LIBS:siliconi

-LIBS:opto

-LIBS:atmel

-LIBS:contrib

-LIBS:valves

-LIBS:eSim_Analog

-LIBS:eSim_Devices

-LIBS:eSim_Digital

-LIBS:eSim_Hybrid

-LIBS:eSim_Miscellaneous

-LIBS:eSim_Plot

-LIBS:eSim_Power

-LIBS:eSim_PSpice

-LIBS:eSim_Sources

-LIBS:eSim_Subckt

-LIBS:eSim_User

-EELAYER 25 0

-EELAYER END

-$Descr A4 11693 8268

-encoding utf-8

-Sheet 1 1

-Title ""

-Date ""

-Rev ""

-Comp ""

-Comment1 ""

-Comment2 ""

-Comment3 ""

-Comment4 ""

-$EndDescr

-$Comp

-L 3_and X1

-U 1 1 5C9A2915

-P 3700 3500

-F 0 "X1" H 4600 3800 60  0000 C CNN

-F 1 "3_and" H 4650 4000 60  0000 C CNN

-F 2 "" H 3700 3500 60  0000 C CNN

-F 3 "" H 3700 3500 60  0000 C CNN

-	1    3700 3500

-	1    0    0    -1  

-$EndComp

-$Comp

-L d_and U2

-U 1 1 5C9A2940

-P 5450 3400

-F 0 "U2" H 5450 3400 60  0000 C CNN

-F 1 "d_and" H 5500 3500 60  0000 C CNN

-F 2 "" H 5450 3400 60  0000 C CNN

-F 3 "" H 5450 3400 60  0000 C CNN

-	1    5450 3400

-	1    0    0    -1  

-$EndComp

-Wire Wire Line

-	5000 3100 5000 3300

-Wire Wire Line

-	4150 3000 4150 2700

-Wire Wire Line

-	4150 2700 3200 2700

-Wire Wire Line

-	4150 3100 4000 3100

-Wire Wire Line

-	4000 3100 4000 3000

-Wire Wire Line

-	4000 3000 3200 3000

-Wire Wire Line

-	4150 3200 4150 3300

-Wire Wire Line

-	4150 3300 3250 3300

-Wire Wire Line

-	5000 3400 5000 3550

-Wire Wire Line

-	5000 3550 3250 3550

-Wire Wire Line

-	5900 3350 6500 3350

-$Comp

-L PORT U1

-U 1 1 5C9A29B1

-P 2950 2700

-F 0 "U1" H 3000 2800 30  0000 C CNN

-F 1 "PORT" H 2950 2700 30  0000 C CNN

-F 2 "" H 2950 2700 60  0000 C CNN

-F 3 "" H 2950 2700 60  0000 C CNN

-	1    2950 2700

-	1    0    0    -1  

-$EndComp

-$Comp

-L PORT U1

-U 2 1 5C9A29E9

-P 2950 3000

-F 0 "U1" H 3000 3100 30  0000 C CNN

-F 1 "PORT" H 2950 3000 30  0000 C CNN

-F 2 "" H 2950 3000 60  0000 C CNN

-F 3 "" H 2950 3000 60  0000 C CNN

-	2    2950 3000

-	1    0    0    -1  

-$EndComp

-$Comp

-L PORT U1

-U 3 1 5C9A2A0D

-P 3000 3300

-F 0 "U1" H 3050 3400 30  0000 C CNN

-F 1 "PORT" H 3000 3300 30  0000 C CNN

-F 2 "" H 3000 3300 60  0000 C CNN

-F 3 "" H 3000 3300 60  0000 C CNN

-	3    3000 3300

-	1    0    0    -1  

-$EndComp

-$Comp

-L PORT U1

-U 4 1 5C9A2A3C

-P 3000 3550

-F 0 "U1" H 3050 3650 30  0000 C CNN

-F 1 "PORT" H 3000 3550 30  0000 C CNN

-F 2 "" H 3000 3550 60  0000 C CNN

-F 3 "" H 3000 3550 60  0000 C CNN

-	4    3000 3550

-	1    0    0    -1  

-$EndComp

-$Comp

-L PORT U1

-U 5 1 5C9A2A68

-P 6750 3350

-F 0 "U1" H 6800 3450 30  0000 C CNN

-F 1 "PORT" H 6750 3350 30  0000 C CNN

-F 2 "" H 6750 3350 60  0000 C CNN

-F 3 "" H 6750 3350 60  0000 C CNN

-	5    6750 3350

-	-1   0    0    1   

-$EndComp

-$EndSCHEMATC

diff --git a/src/SubcircuitLibrary/4_bit_FA/4_and.sub b/src/SubcircuitLibrary/4_bit_FA/4_and.sub
deleted file mode 100644
index bf20b628..00000000
--- a/src/SubcircuitLibrary/4_bit_FA/4_and.sub
+++ /dev/null
@@ -1,12 +0,0 @@
-* Subcircuit 4_and

-.subckt 4_and net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ net-_u1-pad5_ 

-* c:\users\malli\esim\src\subcircuitlibrary\4_and\4_and.cir

-.include 3_and.sub

-x1 net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u2-pad1_ 3_and

-* u2  net-_u2-pad1_ net-_u1-pad4_ net-_u1-pad5_ d_and

-a1 [net-_u2-pad1_ net-_u1-pad4_ ] net-_u1-pad5_ u2

-* Schematic Name: d_and, NgSpice Name: d_and

-.model u2 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )

-* Control Statements

-

-.ends 4_and
\ No newline at end of file
diff --git a/src/SubcircuitLibrary/4_bit_FA/4_bit_FA-cache.lib b/src/SubcircuitLibrary/4_bit_FA/4_bit_FA-cache.lib
deleted file mode 100644
index f787854a..00000000
--- a/src/SubcircuitLibrary/4_bit_FA/4_bit_FA-cache.lib
+++ /dev/null
@@ -1,172 +0,0 @@
-EESchema-LIBRARY Version 2.3

-#encoding utf-8

-#

-# 3_and

-#

-DEF 3_and X 0 40 Y Y 1 F N

-F0 "X" 900 300 60 H V C CNN

-F1 "3_and" 950 500 60 H V C CNN

-F2 "" 0 0 60 H V C CNN

-F3 "" 0 0 60 H V C CNN

-DRAW

-A 950 400 158 716 -716 0 1 0 N 1000 550 1000 250

-P 2 0 1 0  650 550  1000 550 N

-P 3 0 1 0  650 550  650 250  1000 250 N

-X in1 1 450 500 200 R 50 50 1 1 I

-X in2 2 450 400 200 R 50 50 1 1 I

-X in3 3 450 300 200 R 50 50 1 1 I

-X out 4 1300 400 200 L 50 50 1 1 O

-ENDDRAW

-ENDDEF

-#

-# 4_OR

-#

-DEF 4_OR X 0 40 Y Y 1 F N

-F0 "X" 3900 3050 60 H V C CNN

-F1 "4_OR" 3900 3250 60 H V C CNN

-F2 "" 0 0 60 H V C CNN

-F3 "" 0 0 60 H V C CNN

-DRAW

-A 2950 3150 650 226 -226 0 1 0 N 3550 3400 3550 2900

-A 3677 3284 444 -599 -176 0 1 0 N 3900 2900 4100 3150

-A 3720 3051 393 627 146 0 1 0 N 3900 3400 4100 3150

-P 2 0 1 0  3550 2900  3900 2900 N

-P 2 0 1 0  3550 3400  3900 3400 N

-X in1 1 3400 3300 200 R 50 50 1 1 I

-X in2 2 3400 3200 200 R 50 50 1 1 I

-X in3 3 3400 3100 200 R 50 50 1 1 I

-X in4 4 3400 3000 200 R 50 50 1 1 I

-X out 5 4300 3150 200 L 50 50 1 1 O

-ENDDRAW

-ENDDEF

-#

-# 4_and

-#

-DEF 4_and X 0 40 Y Y 1 F N

-F0 "X" 1500 1050 60 H V C CNN

-F1 "4_and" 1550 1200 60 H V C CNN

-F2 "" 0 0 60 H V C CNN

-F3 "" 0 0 60 H V C CNN

-DRAW

-A 1550 1100 206 760 -760 0 1 0 N 1600 1300 1600 900

-P 2 0 1 0  1250 1300  1600 1300 N

-P 4 0 1 0  1250 1300  1250 900  1500 900  1600 900 N

-X in1 1 1050 1250 200 R 50 50 1 1 I

-X in2 2 1050 1150 200 R 50 50 1 1 I

-X in3 3 1050 1050 200 R 50 50 1 1 I

-X in4 4 1050 950 200 R 50 50 1 1 I

-X out 5 1950 1100 200 L 50 50 1 1 O

-ENDDRAW

-ENDDEF

-#

-# PORT

-#

-DEF PORT U 0 40 Y Y 26 F N

-F0 "U" 50 100 30 H V C CNN

-F1 "PORT" 0 0 30 H V C CNN

-F2 "" 0 0 60 H V C CNN

-F3 "" 0 0 60 H V C CNN

-DRAW

-A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0

-A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50

-S -100 50 100 -50 0 1 0 N

-X ~ 1 250 0 100 L 30 30 1 1 B

-X ~ 2 250 0 100 L 30 30 2 1 B

-X ~ 3 250 0 100 L 30 30 3 1 B

-X ~ 4 250 0 100 L 30 30 4 1 B

-X ~ 5 250 0 100 L 30 30 5 1 B

-X ~ 6 250 0 100 L 30 30 6 1 B

-X ~ 7 250 0 100 L 30 30 7 1 B

-X ~ 8 250 0 100 L 30 30 8 1 B

-X ~ 9 250 0 100 L 30 30 9 1 B

-X ~ 10 250 0 100 L 30 30 10 1 B

-X ~ 11 250 0 100 L 30 30 11 1 B

-X ~ 12 250 0 100 L 30 30 12 1 B

-X ~ 13 250 0 100 L 30 30 13 1 B

-X ~ 14 250 0 100 L 30 30 14 1 B

-X ~ 15 250 0 100 L 30 30 15 1 B

-X ~ 16 250 0 100 L 30 30 16 1 B

-X ~ 17 250 0 100 L 30 30 17 1 B

-X ~ 18 250 0 100 L 30 30 18 1 B

-X ~ 19 250 0 100 L 30 30 19 1 B

-X ~ 20 250 0 100 L 30 30 20 1 B

-X ~ 21 250 0 100 L 30 30 21 1 B

-X ~ 22 250 0 100 L 30 30 22 1 B

-X ~ 23 250 0 100 L 30 30 23 1 B

-X ~ 24 250 0 100 L 30 30 24 1 B

-X ~ 25 250 0 100 L 30 30 25 1 B

-X ~ 26 250 0 100 L 30 30 26 1 B

-ENDDRAW

-ENDDEF

-#

-# d_and

-#

-DEF d_and U 0 40 Y Y 1 F N

-F0 "U" 0 0 60 H V C CNN

-F1 "d_and" 50 100 60 H V C CNN

-F2 "" 0 0 60 H V C CNN

-F3 "" 0 0 60 H V C CNN

-DRAW

-A 149 50 100 -894 0 0 1 0 N 150 -50 250 50

-A 150 49 100 6 900 0 1 0 N 250 50 150 150

-P 4 0 1 0  150 -50  -250 -50  -250 150  150 150 N

-X IN1 1 -450 100 200 R 50 50 1 1 I

-X IN2 2 -450 0 200 R 50 50 1 1 I

-X OUT 3 450 50 200 L 50 50 1 1 O

-ENDDRAW

-ENDDEF

-#

-# d_inverter

-#

-DEF d_inverter U 0 40 Y Y 1 F N

-F0 "U" 0 -100 60 H V C CNN

-F1 "d_inverter" 0 150 60 H V C CNN

-F2 "" 50 -50 60 H V C CNN

-F3 "" 50 -50 60 H V C CNN

-DRAW

-P 4 0 1 0  -100 50  -100 -50  100 0  -100 50 N

-X ~ 1 -300 0 200 R 50 50 1 1 I

-X ~ 2 300 0 200 L 50 50 1 1 O I

-ENDDRAW

-ENDDEF

-#

-# d_or

-#

-DEF d_or U 0 40 Y Y 1 F N

-F0 "U" 0 0 60 H V C CNN

-F1 "d_or" 0 100 60 H V C CNN

-F2 "" 0 0 60 H V C CNN

-F3 "" 0 0 60 H V C CNN

-DRAW

-A -450 50 224 266 -266 0 1 0 N -250 150 -250 -50

-A -25 -124 325 574 323 0 1 0 N 150 150 250 50

-A 74 125 191 -665 -231 0 1 0 N 150 -50 250 50

-P 2 0 1 0  -250 -50  150 -50 N

-P 2 0 1 0  -250 150  150 150 N

-X IN1 1 -450 100 215 R 50 50 1 1 I

-X IN2 2 -450 0 215 R 50 50 1 1 I

-X OUT 3 450 50 200 L 50 50 1 1 O

-ENDDRAW

-ENDDEF

-#

-# d_xor

-#

-DEF d_xor U 0 40 Y Y 1 F N

-F0 "U" 0 0 60 H V C CNN

-F1 "d_xor" 50 100 47 H V C CNN

-F2 "" 0 0 60 H V C CNN

-F3 "" 0 0 60 H V C CNN

-DRAW

-A -450 50 224 266 -266 0 1 0 N -250 150 -250 -50

-A -350 50 180 -337 337 0 1 0 N -200 -50 -200 150

-A -25 -124 325 574 323 0 1 0 N 150 150 250 50

-A 74 125 191 -665 -231 0 1 0 N 150 -50 250 50

-P 2 0 1 0  150 -50  -200 -50 N

-P 2 0 1 0  150 150  -200 150 N

-X IN1 1 -450 100 215 R 50 43 1 1 I

-X IN2 2 -450 0 215 R 50 43 1 1 I

-X OUT 3 450 50 200 L 50 39 1 1 O

-ENDDRAW

-ENDDEF

-#

-#End Library

diff --git a/src/SubcircuitLibrary/4_bit_FA/4_bit_FA.cir b/src/SubcircuitLibrary/4_bit_FA/4_bit_FA.cir
deleted file mode 100644
index 8fe97f7e..00000000
--- a/src/SubcircuitLibrary/4_bit_FA/4_bit_FA.cir
+++ /dev/null
@@ -1,48 +0,0 @@
-* C:\Users\malli\eSim\src\SubcircuitLibrary\4_bit_FA\4_bit_FA.cir

-

-* EESchema Netlist Version 1.1 (Spice format) creation date: 03/28/19 23:04:20

-

-* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N

-* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0

-

-* Sheet Name: /

-U2  Net-_U1-Pad2_ Net-_U1-Pad3_ Net-_U16-Pad2_ d_or		

-U3  Net-_U1-Pad2_ Net-_U1-Pad3_ Net-_U24-Pad2_ d_and		

-U4  Net-_U1-Pad4_ Net-_U1-Pad5_ Net-_U17-Pad2_ d_or		

-U5  Net-_U1-Pad4_ Net-_U1-Pad5_ Net-_U26-Pad2_ d_and		

-U6  Net-_U1-Pad6_ Net-_U1-Pad7_ Net-_U18-Pad2_ d_or		

-U7  Net-_U1-Pad6_ Net-_U1-Pad7_ Net-_U10-Pad2_ d_and		

-U8  Net-_U1-Pad8_ Net-_U1-Pad9_ Net-_U10-Pad1_ d_or		

-U9  Net-_U1-Pad8_ Net-_U1-Pad9_ Net-_U31-Pad2_ d_and		

-U16  Net-_U1-Pad1_ Net-_U16-Pad2_ Net-_U16-Pad3_ d_and		

-U24  Net-_U16-Pad3_ Net-_U24-Pad2_ Net-_U17-Pad1_ d_or		

-U33  Net-_U23-Pad2_ Net-_U24-Pad2_ Net-_U33-Pad3_ d_or		

-U23  Net-_U16-Pad2_ Net-_U23-Pad2_ d_inverter		

-U38  Net-_U1-Pad1_ Net-_U33-Pad3_ Net-_U38-Pad3_ d_xor		

-U42  Net-_U38-Pad3_ Net-_U1-Pad13_ d_inverter		

-U17  Net-_U17-Pad1_ Net-_U17-Pad2_ Net-_U17-Pad3_ d_and		

-U26  Net-_U17-Pad3_ Net-_U26-Pad2_ Net-_U18-Pad1_ d_or		

-U34  Net-_U25-Pad2_ Net-_U26-Pad2_ Net-_U34-Pad3_ d_or		

-U25  Net-_U17-Pad2_ Net-_U25-Pad2_ d_inverter		

-U39  Net-_U17-Pad1_ Net-_U34-Pad3_ Net-_U39-Pad3_ d_xor		

-U44  Net-_U39-Pad3_ Net-_U1-Pad10_ d_inverter		

-U18  Net-_U18-Pad1_ Net-_U18-Pad2_ Net-_U18-Pad3_ d_and		

-U28  Net-_U18-Pad3_ Net-_U10-Pad2_ Net-_U28-Pad3_ d_or		

-U35  Net-_U27-Pad2_ Net-_U10-Pad2_ Net-_U35-Pad3_ d_or		

-U27  Net-_U18-Pad2_ Net-_U27-Pad2_ d_inverter		

-U40  Net-_U18-Pad1_ Net-_U35-Pad3_ Net-_U40-Pad3_ d_xor		

-U45  Net-_U40-Pad3_ Net-_U1-Pad11_ d_inverter		

-U31  Net-_U21-Pad2_ Net-_U31-Pad2_ Net-_U31-Pad3_ d_or		

-U21  Net-_U10-Pad1_ Net-_U21-Pad2_ d_inverter		

-U37  Net-_U28-Pad3_ Net-_U31-Pad3_ Net-_U37-Pad3_ d_xor		

-U43  Net-_U37-Pad3_ Net-_U1-Pad12_ d_inverter		

-U10  Net-_U10-Pad1_ Net-_U10-Pad2_ Net-_U10-Pad3_ d_and		

-U32  Net-_U1-Pad1_ Net-_U32-Pad2_ Net-_U32-Pad3_ d_and		

-U41  Net-_U32-Pad3_ Net-_U41-Pad2_ Net-_U1-Pad14_ d_or		

-U1  Net-_U1-Pad1_ Net-_U1-Pad2_ Net-_U1-Pad3_ Net-_U1-Pad4_ Net-_U1-Pad5_ Net-_U1-Pad6_ Net-_U1-Pad7_ Net-_U1-Pad8_ Net-_U1-Pad9_ Net-_U1-Pad10_ Net-_U1-Pad11_ Net-_U1-Pad12_ Net-_U1-Pad13_ Net-_U1-Pad14_ PORT		

-X1  Net-_U10-Pad1_ Net-_U18-Pad2_ Net-_U17-Pad2_ Net-_U16-Pad2_ Net-_U32-Pad2_ 4_and		

-X4  Net-_U10-Pad1_ Net-_U18-Pad2_ Net-_U26-Pad2_ Net-_X3-Pad3_ 3_and		

-X2  Net-_U10-Pad1_ Net-_U18-Pad2_ Net-_U17-Pad2_ Net-_U24-Pad2_ Net-_X2-Pad5_ 4_and		

-X3  Net-_U31-Pad2_ Net-_U10-Pad3_ Net-_X3-Pad3_ Net-_X2-Pad5_ Net-_U41-Pad2_ 4_OR		

-

-.end

diff --git a/src/SubcircuitLibrary/4_bit_FA/4_bit_FA.cir.out b/src/SubcircuitLibrary/4_bit_FA/4_bit_FA.cir.out
deleted file mode 100644
index 4d05d64a..00000000
--- a/src/SubcircuitLibrary/4_bit_FA/4_bit_FA.cir.out
+++ /dev/null
@@ -1,151 +0,0 @@
-* c:\users\malli\esim\src\subcircuitlibrary\4_bit_fa\4_bit_fa.cir

-

-.include 4_and.sub

-.include 3_and.sub

-.include 4_OR.sub

-* u2  net-_u1-pad2_ net-_u1-pad3_ net-_u16-pad2_ d_or

-* u3  net-_u1-pad2_ net-_u1-pad3_ net-_u24-pad2_ d_and

-* u4  net-_u1-pad4_ net-_u1-pad5_ net-_u17-pad2_ d_or

-* u5  net-_u1-pad4_ net-_u1-pad5_ net-_u26-pad2_ d_and

-* u6  net-_u1-pad6_ net-_u1-pad7_ net-_u18-pad2_ d_or

-* u7  net-_u1-pad6_ net-_u1-pad7_ net-_u10-pad2_ d_and

-* u8  net-_u1-pad8_ net-_u1-pad9_ net-_u10-pad1_ d_or

-* u9  net-_u1-pad8_ net-_u1-pad9_ net-_u31-pad2_ d_and

-* u16  net-_u1-pad1_ net-_u16-pad2_ net-_u16-pad3_ d_and

-* u24  net-_u16-pad3_ net-_u24-pad2_ net-_u17-pad1_ d_or

-* u33  net-_u23-pad2_ net-_u24-pad2_ net-_u33-pad3_ d_or

-* u23  net-_u16-pad2_ net-_u23-pad2_ d_inverter

-* u38  net-_u1-pad1_ net-_u33-pad3_ net-_u38-pad3_ d_xor

-* u42  net-_u38-pad3_ net-_u1-pad13_ d_inverter

-* u17  net-_u17-pad1_ net-_u17-pad2_ net-_u17-pad3_ d_and

-* u26  net-_u17-pad3_ net-_u26-pad2_ net-_u18-pad1_ d_or

-* u34  net-_u25-pad2_ net-_u26-pad2_ net-_u34-pad3_ d_or

-* u25  net-_u17-pad2_ net-_u25-pad2_ d_inverter

-* u39  net-_u17-pad1_ net-_u34-pad3_ net-_u39-pad3_ d_xor

-* u44  net-_u39-pad3_ net-_u1-pad10_ d_inverter

-* u18  net-_u18-pad1_ net-_u18-pad2_ net-_u18-pad3_ d_and

-* u28  net-_u18-pad3_ net-_u10-pad2_ net-_u28-pad3_ d_or

-* u35  net-_u27-pad2_ net-_u10-pad2_ net-_u35-pad3_ d_or

-* u27  net-_u18-pad2_ net-_u27-pad2_ d_inverter

-* u40  net-_u18-pad1_ net-_u35-pad3_ net-_u40-pad3_ d_xor

-* u45  net-_u40-pad3_ net-_u1-pad11_ d_inverter

-* u31  net-_u21-pad2_ net-_u31-pad2_ net-_u31-pad3_ d_or

-* u21  net-_u10-pad1_ net-_u21-pad2_ d_inverter

-* u37  net-_u28-pad3_ net-_u31-pad3_ net-_u37-pad3_ d_xor

-* u43  net-_u37-pad3_ net-_u1-pad12_ d_inverter

-* u10  net-_u10-pad1_ net-_u10-pad2_ net-_u10-pad3_ d_and

-* u32  net-_u1-pad1_ net-_u32-pad2_ net-_u32-pad3_ d_and

-* u41  net-_u32-pad3_ net-_u41-pad2_ net-_u1-pad14_ d_or

-* u1  net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ net-_u1-pad5_ net-_u1-pad6_ net-_u1-pad7_ net-_u1-pad8_ net-_u1-pad9_ net-_u1-pad10_ net-_u1-pad11_ net-_u1-pad12_ net-_u1-pad13_ net-_u1-pad14_ port

-x1 net-_u10-pad1_ net-_u18-pad2_ net-_u17-pad2_ net-_u16-pad2_ net-_u32-pad2_ 4_and

-x4 net-_u10-pad1_ net-_u18-pad2_ net-_u26-pad2_ net-_x3-pad3_ 3_and

-x2 net-_u10-pad1_ net-_u18-pad2_ net-_u17-pad2_ net-_u24-pad2_ net-_x2-pad5_ 4_and

-x3 net-_u31-pad2_ net-_u10-pad3_ net-_x3-pad3_ net-_x2-pad5_ net-_u41-pad2_ 4_OR

-a1 [net-_u1-pad2_ net-_u1-pad3_ ] net-_u16-pad2_ u2

-a2 [net-_u1-pad2_ net-_u1-pad3_ ] net-_u24-pad2_ u3

-a3 [net-_u1-pad4_ net-_u1-pad5_ ] net-_u17-pad2_ u4

-a4 [net-_u1-pad4_ net-_u1-pad5_ ] net-_u26-pad2_ u5

-a5 [net-_u1-pad6_ net-_u1-pad7_ ] net-_u18-pad2_ u6

-a6 [net-_u1-pad6_ net-_u1-pad7_ ] net-_u10-pad2_ u7

-a7 [net-_u1-pad8_ net-_u1-pad9_ ] net-_u10-pad1_ u8

-a8 [net-_u1-pad8_ net-_u1-pad9_ ] net-_u31-pad2_ u9

-a9 [net-_u1-pad1_ net-_u16-pad2_ ] net-_u16-pad3_ u16

-a10 [net-_u16-pad3_ net-_u24-pad2_ ] net-_u17-pad1_ u24

-a11 [net-_u23-pad2_ net-_u24-pad2_ ] net-_u33-pad3_ u33

-a12 net-_u16-pad2_ net-_u23-pad2_ u23

-a13 [net-_u1-pad1_ net-_u33-pad3_ ] net-_u38-pad3_ u38

-a14 net-_u38-pad3_ net-_u1-pad13_ u42

-a15 [net-_u17-pad1_ net-_u17-pad2_ ] net-_u17-pad3_ u17

-a16 [net-_u17-pad3_ net-_u26-pad2_ ] net-_u18-pad1_ u26

-a17 [net-_u25-pad2_ net-_u26-pad2_ ] net-_u34-pad3_ u34

-a18 net-_u17-pad2_ net-_u25-pad2_ u25

-a19 [net-_u17-pad1_ net-_u34-pad3_ ] net-_u39-pad3_ u39

-a20 net-_u39-pad3_ net-_u1-pad10_ u44

-a21 [net-_u18-pad1_ net-_u18-pad2_ ] net-_u18-pad3_ u18

-a22 [net-_u18-pad3_ net-_u10-pad2_ ] net-_u28-pad3_ u28

-a23 [net-_u27-pad2_ net-_u10-pad2_ ] net-_u35-pad3_ u35

-a24 net-_u18-pad2_ net-_u27-pad2_ u27

-a25 [net-_u18-pad1_ net-_u35-pad3_ ] net-_u40-pad3_ u40

-a26 net-_u40-pad3_ net-_u1-pad11_ u45

-a27 [net-_u21-pad2_ net-_u31-pad2_ ] net-_u31-pad3_ u31

-a28 net-_u10-pad1_ net-_u21-pad2_ u21

-a29 [net-_u28-pad3_ net-_u31-pad3_ ] net-_u37-pad3_ u37

-a30 net-_u37-pad3_ net-_u1-pad12_ u43

-a31 [net-_u10-pad1_ net-_u10-pad2_ ] net-_u10-pad3_ u10

-a32 [net-_u1-pad1_ net-_u32-pad2_ ] net-_u32-pad3_ u32

-a33 [net-_u32-pad3_ net-_u41-pad2_ ] net-_u1-pad14_ u41

-* Schematic Name: d_or, NgSpice Name: d_or

-.model u2 d_or(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 

-* Schematic Name: d_and, NgSpice Name: d_and

-.model u3 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 

-* Schematic Name: d_or, NgSpice Name: d_or

-.model u4 d_or(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 

-* Schematic Name: d_and, NgSpice Name: d_and

-.model u5 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 

-* Schematic Name: d_or, NgSpice Name: d_or

-.model u6 d_or(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 

-* Schematic Name: d_and, NgSpice Name: d_and

-.model u7 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 

-* Schematic Name: d_or, NgSpice Name: d_or

-.model u8 d_or(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 

-* Schematic Name: d_and, NgSpice Name: d_and

-.model u9 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 

-* Schematic Name: d_and, NgSpice Name: d_and

-.model u16 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 

-* Schematic Name: d_or, NgSpice Name: d_or

-.model u24 d_or(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 

-* Schematic Name: d_or, NgSpice Name: d_or

-.model u33 d_or(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 

-* Schematic Name: d_inverter, NgSpice Name: d_inverter

-.model u23 d_inverter(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 

-* Schematic Name: d_xor, NgSpice Name: d_xor

-.model u38 d_xor(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 

-* Schematic Name: d_inverter, NgSpice Name: d_inverter

-.model u42 d_inverter(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 

-* Schematic Name: d_and, NgSpice Name: d_and

-.model u17 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 

-* Schematic Name: d_or, NgSpice Name: d_or

-.model u26 d_or(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 

-* Schematic Name: d_or, NgSpice Name: d_or

-.model u34 d_or(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 

-* Schematic Name: d_inverter, NgSpice Name: d_inverter

-.model u25 d_inverter(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 

-* Schematic Name: d_xor, NgSpice Name: d_xor

-.model u39 d_xor(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 

-* Schematic Name: d_inverter, NgSpice Name: d_inverter

-.model u44 d_inverter(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 

-* Schematic Name: d_and, NgSpice Name: d_and

-.model u18 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 

-* Schematic Name: d_or, NgSpice Name: d_or

-.model u28 d_or(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 

-* Schematic Name: d_or, NgSpice Name: d_or

-.model u35 d_or(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 

-* Schematic Name: d_inverter, NgSpice Name: d_inverter

-.model u27 d_inverter(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 

-* Schematic Name: d_xor, NgSpice Name: d_xor

-.model u40 d_xor(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 

-* Schematic Name: d_inverter, NgSpice Name: d_inverter

-.model u45 d_inverter(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 

-* Schematic Name: d_or, NgSpice Name: d_or

-.model u31 d_or(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 

-* Schematic Name: d_inverter, NgSpice Name: d_inverter

-.model u21 d_inverter(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 

-* Schematic Name: d_xor, NgSpice Name: d_xor

-.model u37 d_xor(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 

-* Schematic Name: d_inverter, NgSpice Name: d_inverter

-.model u43 d_inverter(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 

-* Schematic Name: d_and, NgSpice Name: d_and

-.model u10 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 

-* Schematic Name: d_and, NgSpice Name: d_and

-.model u32 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 

-* Schematic Name: d_or, NgSpice Name: d_or

-.model u41 d_or(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 

-.tran 0e-00 0e-00 0e-00

-

-* Control Statements 

-.control

-run

-print allv > plot_data_v.txt

-print alli > plot_data_i.txt

-.endc

-.end

diff --git a/src/SubcircuitLibrary/4_bit_FA/4_bit_FA.pro b/src/SubcircuitLibrary/4_bit_FA/4_bit_FA.pro
deleted file mode 100644
index 2d0c38b5..00000000
--- a/src/SubcircuitLibrary/4_bit_FA/4_bit_FA.pro
+++ /dev/null
@@ -1,58 +0,0 @@
-update=03/28/19 23:02:17

-version=1

-last_client=eeschema

-[general]

-version=1

-RootSch=

-BoardNm=

-[pcbnew]

-version=1

-LastNetListRead=

-UseCmpFile=1

-PadDrill=0.600000000000

-PadDrillOvalY=0.600000000000

-PadSizeH=1.500000000000

-PadSizeV=1.500000000000

-PcbTextSizeV=1.500000000000

-PcbTextSizeH=1.500000000000

-PcbTextThickness=0.300000000000

-ModuleTextSizeV=1.000000000000

-ModuleTextSizeH=1.000000000000

-ModuleTextSizeThickness=0.150000000000

-SolderMaskClearance=0.000000000000

-SolderMaskMinWidth=0.000000000000

-DrawSegmentWidth=0.200000000000

-BoardOutlineThickness=0.100000000000

-ModuleOutlineThickness=0.150000000000

-[cvpcb]

-version=1

-NetIExt=net

-[eeschema]

-version=1

-LibDir=

-[eeschema/libraries]

-LibName1=power

-LibName2=texas

-LibName3=intel

-LibName4=audio

-LibName5=interface

-LibName6=digital-audio

-LibName7=philips

-LibName8=display

-LibName9=cypress

-LibName10=siliconi

-LibName11=opto

-LibName12=atmel

-LibName13=contrib

-LibName14=valves

-LibName15=eSim_Analog

-LibName16=eSim_Devices

-LibName17=eSim_Digital

-LibName18=eSim_Hybrid

-LibName19=eSim_Miscellaneous

-LibName20=eSim_Plot

-LibName21=eSim_Power

-LibName22=eSim_PSpice

-LibName23=eSim_Sources

-LibName24=eSim_User

-LibName25=eSim_Subckt

diff --git a/src/SubcircuitLibrary/4_bit_FA/4_bit_FA.sch b/src/SubcircuitLibrary/4_bit_FA/4_bit_FA.sch
deleted file mode 100644
index d3507ac7..00000000
--- a/src/SubcircuitLibrary/4_bit_FA/4_bit_FA.sch
+++ /dev/null
@@ -1,945 +0,0 @@
-EESchema Schematic File Version 2

-LIBS:power

-LIBS:texas

-LIBS:intel

-LIBS:audio

-LIBS:interface

-LIBS:digital-audio

-LIBS:philips

-LIBS:display

-LIBS:cypress

-LIBS:siliconi

-LIBS:opto

-LIBS:atmel

-LIBS:contrib

-LIBS:valves

-LIBS:eSim_Analog

-LIBS:eSim_Devices

-LIBS:eSim_Digital

-LIBS:eSim_Hybrid

-LIBS:eSim_Miscellaneous

-LIBS:eSim_Plot

-LIBS:eSim_Power

-LIBS:eSim_PSpice

-LIBS:eSim_Sources

-LIBS:eSim_User

-LIBS:eSim_Subckt

-LIBS:4_bit_FA-cache

-EELAYER 25 0

-EELAYER END

-$Descr A4 11693 8268

-encoding utf-8

-Sheet 1 1

-Title ""

-Date ""

-Rev ""

-Comp ""

-Comment1 ""

-Comment2 ""

-Comment3 ""

-Comment4 ""

-$EndDescr

-$Comp

-L d_or U2

-U 1 1 5C963B95

-P 3050 3050

-F 0 "U2" H 3050 3050 60  0000 C CNN

-F 1 "d_or" H 3050 3150 60  0000 C CNN

-F 2 "" H 3050 3050 60  0000 C CNN

-F 3 "" H 3050 3050 60  0000 C CNN

-	1    3050 3050

-	1    0    0    -1  

-$EndComp

-$Comp

-L d_and U3

-U 1 1 5C963C4C

-P 3050 3450

-F 0 "U3" H 3050 3450 60  0000 C CNN

-F 1 "d_and" H 3100 3550 60  0000 C CNN

-F 2 "" H 3050 3450 60  0000 C CNN

-F 3 "" H 3050 3450 60  0000 C CNN

-	1    3050 3450

-	1    0    0    -1  

-$EndComp

-$Comp

-L d_or U4

-U 1 1 5C963CD9

-P 3050 4000

-F 0 "U4" H 3050 4000 60  0000 C CNN

-F 1 "d_or" H 3050 4100 60  0000 C CNN

-F 2 "" H 3050 4000 60  0000 C CNN

-F 3 "" H 3050 4000 60  0000 C CNN

-	1    3050 4000

-	1    0    0    -1  

-$EndComp

-$Comp

-L d_and U5

-U 1 1 5C963CDF

-P 3050 4400

-F 0 "U5" H 3050 4400 60  0000 C CNN

-F 1 "d_and" H 3100 4500 60  0000 C CNN

-F 2 "" H 3050 4400 60  0000 C CNN

-F 3 "" H 3050 4400 60  0000 C CNN

-	1    3050 4400

-	1    0    0    -1  

-$EndComp

-$Comp

-L d_or U6

-U 1 1 5C963D79

-P 3050 4850

-F 0 "U6" H 3050 4850 60  0000 C CNN

-F 1 "d_or" H 3050 4950 60  0000 C CNN

-F 2 "" H 3050 4850 60  0000 C CNN

-F 3 "" H 3050 4850 60  0000 C CNN

-	1    3050 4850

-	1    0    0    -1  

-$EndComp

-$Comp

-L d_and U7

-U 1 1 5C963D7F

-P 3050 5250

-F 0 "U7" H 3050 5250 60  0000 C CNN

-F 1 "d_and" H 3100 5350 60  0000 C CNN

-F 2 "" H 3050 5250 60  0000 C CNN

-F 3 "" H 3050 5250 60  0000 C CNN

-	1    3050 5250

-	1    0    0    -1  

-$EndComp

-$Comp

-L d_or U8

-U 1 1 5C963D85

-P 3050 5800

-F 0 "U8" H 3050 5800 60  0000 C CNN

-F 1 "d_or" H 3050 5900 60  0000 C CNN

-F 2 "" H 3050 5800 60  0000 C CNN

-F 3 "" H 3050 5800 60  0000 C CNN

-	1    3050 5800

-	1    0    0    -1  

-$EndComp

-$Comp

-L d_and U9

-U 1 1 5C963D8B

-P 3050 6200

-F 0 "U9" H 3050 6200 60  0000 C CNN

-F 1 "d_and" H 3100 6300 60  0000 C CNN

-F 2 "" H 3050 6200 60  0000 C CNN

-F 3 "" H 3050 6200 60  0000 C CNN

-	1    3050 6200

-	1    0    0    -1  

-$EndComp

-$Comp

-L d_and U16

-U 1 1 5C963D9B

-P 5550 3200

-F 0 "U16" H 5550 3200 60  0000 C CNN

-F 1 "d_and" H 5600 3300 60  0000 C CNN

-F 2 "" H 5550 3200 60  0000 C CNN

-F 3 "" H 5550 3200 60  0000 C CNN

-	1    5550 3200

-	1    0    0    -1  

-$EndComp

-$Comp

-L d_or U24

-U 1 1 5C963DFB

-P 6450 3400

-F 0 "U24" H 6450 3400 60  0000 C CNN

-F 1 "d_or" H 6450 3500 60  0000 C CNN

-F 2 "" H 6450 3400 60  0000 C CNN

-F 3 "" H 6450 3400 60  0000 C CNN

-	1    6450 3400

-	1    0    0    -1  

-$EndComp

-$Comp

-L d_or U33

-U 1 1 5C963F8F

-P 7800 3450

-F 0 "U33" H 7800 3450 60  0000 C CNN

-F 1 "d_or" H 7800 3550 60  0000 C CNN

-F 2 "" H 7800 3450 60  0000 C CNN

-F 3 "" H 7800 3450 60  0000 C CNN

-	1    7800 3450

-	1    0    0    -1  

-$EndComp

-$Comp

-L d_inverter U23

-U 1 1 5C963FFF

-P 6450 2950

-F 0 "U23" H 6450 2850 60  0000 C CNN

-F 1 "d_inverter" H 6450 3100 60  0000 C CNN

-F 2 "" H 6500 2900 60  0000 C CNN

-F 3 "" H 6500 2900 60  0000 C CNN

-	1    6450 2950

-	1    0    0    -1  

-$EndComp

-$Comp

-L d_xor U38

-U 1 1 5C9640A4

-P 8900 3400

-F 0 "U38" H 8900 3400 60  0000 C CNN

-F 1 "d_xor" H 8950 3500 47  0000 C CNN

-F 2 "" H 8900 3400 60  0000 C CNN

-F 3 "" H 8900 3400 60  0000 C CNN

-	1    8900 3400

-	1    0    0    -1  

-$EndComp

-$Comp

-L d_inverter U42

-U 1 1 5C96410A

-P 9750 3350

-F 0 "U42" H 9750 3250 60  0000 C CNN

-F 1 "d_inverter" H 9750 3500 60  0000 C CNN

-F 2 "" H 9800 3300 60  0000 C CNN

-F 3 "" H 9800 3300 60  0000 C CNN

-	1    9750 3350

-	1    0    0    -1  

-$EndComp

-$Comp

-L d_and U17

-U 1 1 5C964222

-P 5550 4150

-F 0 "U17" H 5550 4150 60  0000 C CNN

-F 1 "d_and" H 5600 4250 60  0000 C CNN

-F 2 "" H 5550 4150 60  0000 C CNN

-F 3 "" H 5550 4150 60  0000 C CNN

-	1    5550 4150

-	1    0    0    -1  

-$EndComp

-$Comp

-L d_or U26

-U 1 1 5C964228

-P 6450 4350

-F 0 "U26" H 6450 4350 60  0000 C CNN

-F 1 "d_or" H 6450 4450 60  0000 C CNN

-F 2 "" H 6450 4350 60  0000 C CNN

-F 3 "" H 6450 4350 60  0000 C CNN

-	1    6450 4350

-	1    0    0    -1  

-$EndComp

-$Comp

-L d_or U34

-U 1 1 5C96422E

-P 7800 4400

-F 0 "U34" H 7800 4400 60  0000 C CNN

-F 1 "d_or" H 7800 4500 60  0000 C CNN

-F 2 "" H 7800 4400 60  0000 C CNN

-F 3 "" H 7800 4400 60  0000 C CNN

-	1    7800 4400

-	1    0    0    -1  

-$EndComp

-$Comp

-L d_inverter U25

-U 1 1 5C964234

-P 6450 3900

-F 0 "U25" H 6450 3800 60  0000 C CNN

-F 1 "d_inverter" H 6450 4050 60  0000 C CNN

-F 2 "" H 6500 3850 60  0000 C CNN

-F 3 "" H 6500 3850 60  0000 C CNN

-	1    6450 3900

-	1    0    0    -1  

-$EndComp

-$Comp

-L d_xor U39

-U 1 1 5C96423A

-P 8900 4350

-F 0 "U39" H 8900 4350 60  0000 C CNN

-F 1 "d_xor" H 8950 4450 47  0000 C CNN

-F 2 "" H 8900 4350 60  0000 C CNN

-F 3 "" H 8900 4350 60  0000 C CNN

-	1    8900 4350

-	1    0    0    -1  

-$EndComp

-$Comp

-L d_inverter U44

-U 1 1 5C964240

-P 9800 4300

-F 0 "U44" H 9800 4200 60  0000 C CNN

-F 1 "d_inverter" H 9800 4450 60  0000 C CNN

-F 2 "" H 9850 4250 60  0000 C CNN

-F 3 "" H 9850 4250 60  0000 C CNN

-	1    9800 4300

-	1    0    0    -1  

-$EndComp

-$Comp

-L d_and U18

-U 1 1 5C964304

-P 5600 4950

-F 0 "U18" H 5600 4950 60  0000 C CNN

-F 1 "d_and" H 5650 5050 60  0000 C CNN

-F 2 "" H 5600 4950 60  0000 C CNN

-F 3 "" H 5600 4950 60  0000 C CNN

-	1    5600 4950

-	1    0    0    -1  

-$EndComp

-$Comp

-L d_or U28

-U 1 1 5C96430A

-P 6500 5150

-F 0 "U28" H 6500 5150 60  0000 C CNN

-F 1 "d_or" H 6500 5250 60  0000 C CNN

-F 2 "" H 6500 5150 60  0000 C CNN

-F 3 "" H 6500 5150 60  0000 C CNN

-	1    6500 5150

-	1    0    0    -1  

-$EndComp

-$Comp

-L d_or U35

-U 1 1 5C964310

-P 7850 5200

-F 0 "U35" H 7850 5200 60  0000 C CNN

-F 1 "d_or" H 7850 5300 60  0000 C CNN

-F 2 "" H 7850 5200 60  0000 C CNN

-F 3 "" H 7850 5200 60  0000 C CNN

-	1    7850 5200

-	1    0    0    -1  

-$EndComp

-$Comp

-L d_inverter U27

-U 1 1 5C964316

-P 6500 4700

-F 0 "U27" H 6500 4600 60  0000 C CNN

-F 1 "d_inverter" H 6500 4850 60  0000 C CNN

-F 2 "" H 6550 4650 60  0000 C CNN

-F 3 "" H 6550 4650 60  0000 C CNN

-	1    6500 4700

-	1    0    0    -1  

-$EndComp

-$Comp

-L d_xor U40

-U 1 1 5C96431C

-P 8950 5150

-F 0 "U40" H 8950 5150 60  0000 C CNN

-F 1 "d_xor" H 9000 5250 47  0000 C CNN

-F 2 "" H 8950 5150 60  0000 C CNN

-F 3 "" H 8950 5150 60  0000 C CNN

-	1    8950 5150

-	1    0    0    -1  

-$EndComp

-$Comp

-L d_inverter U45

-U 1 1 5C964322

-P 9850 5100

-F 0 "U45" H 9850 5000 60  0000 C CNN

-F 1 "d_inverter" H 9850 5250 60  0000 C CNN

-F 2 "" H 9900 5050 60  0000 C CNN

-F 3 "" H 9900 5050 60  0000 C CNN

-	1    9850 5100

-	1    0    0    -1  

-$EndComp

-$Comp

-L d_or U31

-U 1 1 5C964476

-P 7750 6200

-F 0 "U31" H 7750 6200 60  0000 C CNN

-F 1 "d_or" H 7750 6300 60  0000 C CNN

-F 2 "" H 7750 6200 60  0000 C CNN

-F 3 "" H 7750 6200 60  0000 C CNN

-	1    7750 6200

-	1    0    0    -1  

-$EndComp

-$Comp

-L d_inverter U21

-U 1 1 5C96447C

-P 6400 5700

-F 0 "U21" H 6400 5600 60  0000 C CNN

-F 1 "d_inverter" H 6400 5850 60  0000 C CNN

-F 2 "" H 6450 5650 60  0000 C CNN

-F 3 "" H 6450 5650 60  0000 C CNN

-	1    6400 5700

-	1    0    0    -1  

-$EndComp

-$Comp

-L d_xor U37

-U 1 1 5C964482

-P 8850 6150

-F 0 "U37" H 8850 6150 60  0000 C CNN

-F 1 "d_xor" H 8900 6250 47  0000 C CNN

-F 2 "" H 8850 6150 60  0000 C CNN

-F 3 "" H 8850 6150 60  0000 C CNN

-	1    8850 6150

-	1    0    0    -1  

-$EndComp

-$Comp

-L d_inverter U43

-U 1 1 5C964488

-P 9750 6100

-F 0 "U43" H 9750 6000 60  0000 C CNN

-F 1 "d_inverter" H 9750 6250 60  0000 C CNN

-F 2 "" H 9800 6050 60  0000 C CNN

-F 3 "" H 9800 6050 60  0000 C CNN

-	1    9750 6100

-	1    0    0    -1  

-$EndComp

-$Comp

-L d_and U10

-U 1 1 5C966120

-P 5450 1650

-F 0 "U10" H 5450 1650 60  0000 C CNN

-F 1 "d_and" H 5500 1750 60  0000 C CNN

-F 2 "" H 5450 1650 60  0000 C CNN

-F 3 "" H 5450 1650 60  0000 C CNN

-	1    5450 1650

-	1    0    0    -1  

-$EndComp

-$Comp

-L d_and U32

-U 1 1 5C968A9C

-P 7800 1150

-F 0 "U32" H 7800 1150 60  0000 C CNN

-F 1 "d_and" H 7850 1250 60  0000 C CNN

-F 2 "" H 7800 1150 60  0000 C CNN

-F 3 "" H 7800 1150 60  0000 C CNN

-	1    7800 1150

-	1    0    0    -1  

-$EndComp

-$Comp

-L d_or U41

-U 1 1 5C968DBD

-P 9400 1500

-F 0 "U41" H 9400 1500 60  0000 C CNN

-F 1 "d_or" H 9400 1600 60  0000 C CNN

-F 2 "" H 9400 1500 60  0000 C CNN

-F 3 "" H 9400 1500 60  0000 C CNN

-	1    9400 1500

-	1    0    0    -1  

-$EndComp

-Wire Wire Line

-	9450 3350 9350 3350

-Wire Wire Line

-	6750 2950 7350 2950

-Wire Wire Line

-	7350 2950 7350 3350

-Wire Wire Line

-	6000 3150 6000 3300

-Wire Wire Line

-	9500 4300 9350 4300

-Wire Wire Line

-	9550 5100 9400 5100

-Wire Wire Line

-	9450 6100 9300 6100

-Wire Wire Line

-	7350 4300 7350 3900

-Wire Wire Line

-	7350 3900 6750 3900

-Wire Wire Line

-	7400 5100 7400 4700

-Wire Wire Line

-	7400 4700 6800 4700

-Wire Wire Line

-	7300 6100 7300 5700

-Wire Wire Line

-	7300 5700 6700 5700

-Wire Wire Line

-	6050 4900 6050 5050

-Wire Wire Line

-	6000 4100 6000 4250

-Wire Wire Line

-	8250 3400 8450 3400

-Wire Wire Line

-	8250 4350 8450 4350

-Wire Wire Line

-	8200 6150 8400 6150

-Wire Wire Line

-	8500 5150 8300 5150

-Wire Wire Line

-	8450 2700 8450 3300

-Wire Wire Line

-	3400 2700 8450 2700

-Wire Wire Line

-	4950 2700 4950 3100

-Wire Wire Line

-	4950 3100 5100 3100

-Wire Wire Line

-	3500 2950 6150 2950

-Wire Wire Line

-	3500 2950 3500 3000

-Wire Wire Line

-	5100 3200 4850 3200

-Wire Wire Line

-	4850 3200 4850 2950

-Connection ~ 4850 2950

-Wire Wire Line

-	3500 3400 6000 3400

-Wire Wire Line

-	5850 3400 5850 3500

-Wire Wire Line

-	5850 3500 7350 3500

-Wire Wire Line

-	7350 3500 7350 3450

-Connection ~ 5850 3400

-Wire Wire Line

-	5100 4050 5000 4050

-Wire Wire Line

-	5000 4050 5000 3700

-Wire Wire Line

-	5000 3700 8400 3700

-Wire Wire Line

-	8400 3700 8400 4250

-Wire Wire Line

-	8400 4250 8450 4250

-Wire Wire Line

-	6900 3350 6900 3700

-Connection ~ 6900 3700

-Wire Wire Line

-	3500 3900 6150 3900

-Wire Wire Line

-	3500 3900 3500 3950

-Wire Wire Line

-	5100 4150 4950 4150

-Wire Wire Line

-	4950 4150 4950 3900

-Connection ~ 4950 3900

-Wire Wire Line

-	3500 4350 6000 4350

-Wire Wire Line

-	7350 4400 7350 4450

-Wire Wire Line

-	7350 4450 5850 4450

-Wire Wire Line

-	5850 4450 5850 4350

-Connection ~ 5850 4350

-Wire Wire Line

-	8500 5050 8400 5050

-Wire Wire Line

-	8400 5050 8400 4500

-Wire Wire Line

-	8400 4500 5050 4500

-Wire Wire Line

-	5050 4500 5050 4850

-Wire Wire Line

-	5050 4850 5150 4850

-Wire Wire Line

-	6900 4300 7000 4300

-Wire Wire Line

-	7000 4300 7000 4500

-Connection ~ 7000 4500

-Wire Wire Line

-	3500 4700 6200 4700

-Wire Wire Line

-	3500 4700 3500 4800

-Wire Wire Line

-	5150 4950 4950 4950

-Wire Wire Line

-	4950 4950 4950 4700

-Connection ~ 4950 4700

-Wire Wire Line

-	3500 5150 6050 5150

-Wire Wire Line

-	3500 5150 3500 5200

-Wire Wire Line

-	7400 5200 7400 5250

-Wire Wire Line

-	7400 5250 5900 5250

-Wire Wire Line

-	5900 5250 5900 5150

-Connection ~ 5900 5150

-Wire Wire Line

-	3500 5700 6100 5700

-Wire Wire Line

-	3500 5700 3500 5750

-Wire Wire Line

-	3500 6150 7100 6150

-Wire Wire Line

-	8250 5500 8250 6050

-Wire Wire Line

-	8250 6050 8400 6050

-Wire Wire Line

-	7100 6150 7100 6200

-Wire Wire Line

-	7100 6200 7300 6200

-Wire Wire Line

-	8250 5500 7050 5500

-Wire Wire Line

-	7050 5500 7050 5100

-Wire Wire Line

-	7050 5100 6950 5100

-Wire Wire Line

-	2000 2950 2600 2950

-Wire Wire Line

-	2000 3450 2600 3450

-Wire Wire Line

-	2600 3050 2350 3050

-Wire Wire Line

-	2350 3050 2350 3450

-Connection ~ 2350 3450

-Wire Wire Line

-	2600 3350 2500 3350

-Wire Wire Line

-	2500 3350 2500 2950

-Connection ~ 2500 2950

-Wire Wire Line

-	2000 3900 2600 3900

-Wire Wire Line

-	2000 4400 2600 4400

-Wire Wire Line

-	2600 4300 2450 4300

-Wire Wire Line

-	2450 4300 2450 3900

-Connection ~ 2450 3900

-Wire Wire Line

-	2600 4000 2350 4000

-Wire Wire Line

-	2350 4000 2350 4400

-Connection ~ 2350 4400

-Wire Wire Line

-	2000 4750 2600 4750

-Wire Wire Line

-	2000 5250 2600 5250

-Wire Wire Line

-	2600 4850 2350 4850

-Wire Wire Line

-	2350 4850 2350 5250

-Connection ~ 2350 5250

-Wire Wire Line

-	2600 5150 2450 5150

-Wire Wire Line

-	2450 5150 2450 4750

-Connection ~ 2450 4750

-Wire Wire Line

-	2050 5700 2600 5700

-Wire Wire Line

-	2100 6200 2600 6200

-Wire Wire Line

-	2600 6100 2450 6100

-Wire Wire Line

-	2450 6100 2450 5700

-Connection ~ 2450 5700

-Wire Wire Line

-	2600 5800 2500 5800

-Wire Wire Line

-	2500 5800 2500 6200

-Connection ~ 2500 6200

-Wire Wire Line

-	4600 3400 4600 2500

-Wire Wire Line

-	4600 2500 5450 2500

-Connection ~ 4600 3400

-Wire Wire Line

-	4400 2400 5450 2400

-Wire Wire Line

-	4400 1200 4400 3900

-Wire Wire Line

-	4500 2950 4500 1300

-Wire Wire Line

-	4500 1300 5450 1300

-Connection ~ 4500 2950

-Wire Wire Line

-	4100 2300 5450 2300

-Wire Wire Line

-	3800 2200 5450 2200

-Wire Wire Line

-	3800 1000 3800 5700

-Connection ~ 3800 5700

-Wire Wire Line

-	5950 2100 4300 2100

-Wire Wire Line

-	4300 2100 4300 4350

-Connection ~ 4300 4350

-Connection ~ 4400 3900

-Wire Wire Line

-	4100 2300 4100 4700

-Connection ~ 4100 4700

-Wire Wire Line

-	4100 2000 5950 2000

-Wire Wire Line

-	4100 1100 4100 2350

-Connection ~ 4100 2350

-Wire Wire Line

-	3800 1900 5950 1900

-Connection ~ 3800 2200

-Wire Wire Line

-	5000 1550 3800 1550

-Connection ~ 3800 1900

-Wire Wire Line

-	5000 1650 3950 1650

-Wire Wire Line

-	3950 1650 3950 5150

-Connection ~ 3950 5150

-Wire Wire Line

-	4400 1200 5450 1200

-Connection ~ 4400 2400

-Wire Wire Line

-	4100 1100 5450 1100

-Connection ~ 4100 2000

-Wire Wire Line

-	3800 1000 5450 1000

-Connection ~ 3800 1550

-Wire Wire Line

-	5900 1600 7550 1600

-Wire Wire Line

-	7150 900  7150 1500

-Wire Wire Line

-	7150 900  3700 900 

-Wire Wire Line

-	3700 900  3700 6150

-Connection ~ 3700 6150

-Wire Wire Line

-	6350 1150 7350 1150

-Wire Wire Line

-	7350 750  7350 1050

-Wire Wire Line

-	2000 750  7350 750 

-Wire Wire Line

-	8950 1500 8950 1750

-Wire Wire Line

-	8950 1400 8950 1100

-Wire Wire Line

-	8950 1100 8250 1100

-Wire Wire Line

-	9850 1450 10500 1450

-Wire Wire Line

-	10050 3350 10450 3350

-Wire Wire Line

-	3400 750  3400 2700

-Connection ~ 4950 2700

-Connection ~ 3400 750 

-Wire Wire Line

-	10100 4300 10400 4300

-Wire Wire Line

-	10150 5100 10400 5100

-Wire Wire Line

-	10050 6100 10400 6100

-$Comp

-L PORT U1

-U 1 1 5C969A23

-P 1750 750

-F 0 "U1" H 1800 850 30  0000 C CNN

-F 1 "PORT" H 1750 750 30  0000 C CNN

-F 2 "" H 1750 750 60  0000 C CNN

-F 3 "" H 1750 750 60  0000 C CNN

-	1    1750 750 

-	1    0    0    -1  

-$EndComp

-$Comp

-L PORT U1

-U 2 1 5C969AF9

-P 1750 2950

-F 0 "U1" H 1800 3050 30  0000 C CNN

-F 1 "PORT" H 1750 2950 30  0000 C CNN

-F 2 "" H 1750 2950 60  0000 C CNN

-F 3 "" H 1750 2950 60  0000 C CNN

-	2    1750 2950

-	1    0    0    -1  

-$EndComp

-$Comp

-L PORT U1

-U 3 1 5C969BCD

-P 1750 3450

-F 0 "U1" H 1800 3550 30  0000 C CNN

-F 1 "PORT" H 1750 3450 30  0000 C CNN

-F 2 "" H 1750 3450 60  0000 C CNN

-F 3 "" H 1750 3450 60  0000 C CNN

-	3    1750 3450

-	1    0    0    -1  

-$EndComp

-$Comp

-L PORT U1

-U 4 1 5C969C7A

-P 1750 3900

-F 0 "U1" H 1800 4000 30  0000 C CNN

-F 1 "PORT" H 1750 3900 30  0000 C CNN

-F 2 "" H 1750 3900 60  0000 C CNN

-F 3 "" H 1750 3900 60  0000 C CNN

-	4    1750 3900

-	1    0    0    -1  

-$EndComp

-$Comp

-L PORT U1

-U 5 1 5C969D28

-P 1750 4400

-F 0 "U1" H 1800 4500 30  0000 C CNN

-F 1 "PORT" H 1750 4400 30  0000 C CNN

-F 2 "" H 1750 4400 60  0000 C CNN

-F 3 "" H 1750 4400 60  0000 C CNN

-	5    1750 4400

-	1    0    0    -1  

-$EndComp

-$Comp

-L PORT U1

-U 6 1 5C969DDF

-P 1750 4750

-F 0 "U1" H 1800 4850 30  0000 C CNN

-F 1 "PORT" H 1750 4750 30  0000 C CNN

-F 2 "" H 1750 4750 60  0000 C CNN

-F 3 "" H 1750 4750 60  0000 C CNN

-	6    1750 4750

-	1    0    0    -1  

-$EndComp

-$Comp

-L PORT U1

-U 7 1 5C969E93

-P 1750 5250

-F 0 "U1" H 1800 5350 30  0000 C CNN

-F 1 "PORT" H 1750 5250 30  0000 C CNN

-F 2 "" H 1750 5250 60  0000 C CNN

-F 3 "" H 1750 5250 60  0000 C CNN

-	7    1750 5250

-	1    0    0    -1  

-$EndComp

-$Comp

-L PORT U1

-U 8 1 5C969F4E

-P 1800 5700

-F 0 "U1" H 1850 5800 30  0000 C CNN

-F 1 "PORT" H 1800 5700 30  0000 C CNN

-F 2 "" H 1800 5700 60  0000 C CNN

-F 3 "" H 1800 5700 60  0000 C CNN

-	8    1800 5700

-	1    0    0    -1  

-$EndComp

-$Comp

-L PORT U1

-U 9 1 5C96A00E

-P 1850 6200

-F 0 "U1" H 1900 6300 30  0000 C CNN

-F 1 "PORT" H 1850 6200 30  0000 C CNN

-F 2 "" H 1850 6200 60  0000 C CNN

-F 3 "" H 1850 6200 60  0000 C CNN

-	9    1850 6200

-	1    0    0    -1  

-$EndComp

-$Comp

-L PORT U1

-U 14 1 5C96A0CF

-P 10750 1450

-F 0 "U1" H 10800 1550 30  0000 C CNN

-F 1 "PORT" H 10750 1450 30  0000 C CNN

-F 2 "" H 10750 1450 60  0000 C CNN

-F 3 "" H 10750 1450 60  0000 C CNN

-	14   10750 1450

-	-1   0    0    1   

-$EndComp

-$Comp

-L PORT U1

-U 13 1 5C96A273

-P 10700 3350

-F 0 "U1" H 10750 3450 30  0000 C CNN

-F 1 "PORT" H 10700 3350 30  0000 C CNN

-F 2 "" H 10700 3350 60  0000 C CNN

-F 3 "" H 10700 3350 60  0000 C CNN

-	13   10700 3350

-	-1   0    0    1   

-$EndComp

-$Comp

-L PORT U1

-U 10 1 5C96A464

-P 10650 4300

-F 0 "U1" H 10700 4400 30  0000 C CNN

-F 1 "PORT" H 10650 4300 30  0000 C CNN

-F 2 "" H 10650 4300 60  0000 C CNN

-F 3 "" H 10650 4300 60  0000 C CNN

-	10   10650 4300

-	-1   0    0    1   

-$EndComp

-$Comp

-L PORT U1

-U 11 1 5C96A53A

-P 10650 5100

-F 0 "U1" H 10700 5200 30  0000 C CNN

-F 1 "PORT" H 10650 5100 30  0000 C CNN

-F 2 "" H 10650 5100 60  0000 C CNN

-F 3 "" H 10650 5100 60  0000 C CNN

-	11   10650 5100

-	-1   0    0    1   

-$EndComp

-$Comp

-L PORT U1

-U 12 1 5C96A619

-P 10650 6100

-F 0 "U1" H 10700 6200 30  0000 C CNN

-F 1 "PORT" H 10650 6100 30  0000 C CNN

-F 2 "" H 10650 6100 60  0000 C CNN

-F 3 "" H 10650 6100 60  0000 C CNN

-	12   10650 6100

-	-1   0    0    1   

-$EndComp

-Text Notes 10200 3350 0    60   ~ 12

-S0

-Text Notes 10200 4300 0    60   ~ 12

-S1\n

-Text Notes 10200 5100 0    60   ~ 12

-S2

-Text Notes 10150 6100 0    60   ~ 12

-S3

-Text Notes 10050 1450 0    60   ~ 12

-Cout\n

-Text Notes 2250 750  0    60   ~ 12

-Cin\n

-Text Notes 2050 2950 0    60   ~ 12

-A0\n

-Text Notes 2050 3450 0    60   ~ 12

-B0\n

-Text Notes 2050 3900 0    60   ~ 12

-A1

-Text Notes 2050 4400 0    60   ~ 12

-B1

-Text Notes 2050 4750 0    60   ~ 12

-A2

-Text Notes 2050 5250 0    60   ~ 12

-B2

-Text Notes 2100 5700 0    60   ~ 12

-A3

-Text Notes 2150 6200 0    60   ~ 12

-B3

-$Comp

-L 4_and X1

-U 1 1 5C9D037C

-P 4400 2250

-F 0 "X1" H 5900 3300 60  0000 C CNN

-F 1 "4_and" H 5950 3450 60  0000 C CNN

-F 2 "" H 4400 2250 60  0000 C CNN

-F 3 "" H 4400 2250 60  0000 C CNN

-	1    4400 2250

-	1    0    0    -1  

-$EndComp

-$Comp

-L 3_and X4

-U 1 1 5C9D0A45

-P 5500 2400

-F 0 "X4" H 6400 2700 60  0000 C CNN

-F 1 "3_and" H 6450 2900 60  0000 C CNN

-F 2 "" H 5500 2400 60  0000 C CNN

-F 3 "" H 5500 2400 60  0000 C CNN

-	1    5500 2400

-	1    0    0    -1  

-$EndComp

-$Comp

-L 4_and X2

-U 1 1 5C9D0E20

-P 4400 3450

-F 0 "X2" H 5900 4500 60  0000 C CNN

-F 1 "4_and" H 5950 4650 60  0000 C CNN

-F 2 "" H 4400 3450 60  0000 C CNN

-F 3 "" H 4400 3450 60  0000 C CNN

-	1    4400 3450

-	1    0    0    -1  

-$EndComp

-$Comp

-L 4_OR X3

-U 1 1 5C9D1513

-P 4450 4900

-F 0 "X3" H 8350 7950 60  0000 C CNN

-F 1 "4_OR" H 8350 8150 60  0000 C CNN

-F 2 "" H 4450 4900 60  0000 C CNN

-F 3 "" H 4450 4900 60  0000 C CNN

-	1    4450 4900

-	1    0    0    -1  

-$EndComp

-Wire Wire Line

-	8950 1750 8750 1750

-Wire Wire Line

-	7150 1500 7850 1500

-Wire Wire Line

-	7850 1500 7850 1600

-Wire Wire Line

-	7550 1600 7550 1700

-Wire Wire Line

-	7550 1700 7850 1700

-Wire Wire Line

-	6800 2000 6800 1800

-Wire Wire Line

-	6800 1800 7850 1800

-Wire Wire Line

-	6350 2350 7850 2350

-Wire Wire Line

-	7850 2350 7850 1900

-$EndSCHEMATC

diff --git a/src/SubcircuitLibrary/4_bit_FA/4_bit_FA.sub b/src/SubcircuitLibrary/4_bit_FA/4_bit_FA.sub
deleted file mode 100644
index 2f2bc4ef..00000000
--- a/src/SubcircuitLibrary/4_bit_FA/4_bit_FA.sub
+++ /dev/null
@@ -1,145 +0,0 @@
-* Subcircuit 4_bit_FA

-.subckt 4_bit_FA net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ net-_u1-pad5_ net-_u1-pad6_ net-_u1-pad7_ net-_u1-pad8_ net-_u1-pad9_ net-_u1-pad10_ net-_u1-pad11_ net-_u1-pad12_ net-_u1-pad13_ net-_u1-pad14_ 

-* c:\users\malli\esim\src\subcircuitlibrary\4_bit_fa\4_bit_fa.cir

-.include 4_and.sub

-.include 3_and.sub

-.include 4_OR.sub

-* u2  net-_u1-pad2_ net-_u1-pad3_ net-_u16-pad2_ d_or

-* u3  net-_u1-pad2_ net-_u1-pad3_ net-_u24-pad2_ d_and

-* u4  net-_u1-pad4_ net-_u1-pad5_ net-_u17-pad2_ d_or

-* u5  net-_u1-pad4_ net-_u1-pad5_ net-_u26-pad2_ d_and

-* u6  net-_u1-pad6_ net-_u1-pad7_ net-_u18-pad2_ d_or

-* u7  net-_u1-pad6_ net-_u1-pad7_ net-_u10-pad2_ d_and

-* u8  net-_u1-pad8_ net-_u1-pad9_ net-_u10-pad1_ d_or

-* u9  net-_u1-pad8_ net-_u1-pad9_ net-_u31-pad2_ d_and

-* u16  net-_u1-pad1_ net-_u16-pad2_ net-_u16-pad3_ d_and

-* u24  net-_u16-pad3_ net-_u24-pad2_ net-_u17-pad1_ d_or

-* u33  net-_u23-pad2_ net-_u24-pad2_ net-_u33-pad3_ d_or

-* u23  net-_u16-pad2_ net-_u23-pad2_ d_inverter

-* u38  net-_u1-pad1_ net-_u33-pad3_ net-_u38-pad3_ d_xor

-* u42  net-_u38-pad3_ net-_u1-pad13_ d_inverter

-* u17  net-_u17-pad1_ net-_u17-pad2_ net-_u17-pad3_ d_and

-* u26  net-_u17-pad3_ net-_u26-pad2_ net-_u18-pad1_ d_or

-* u34  net-_u25-pad2_ net-_u26-pad2_ net-_u34-pad3_ d_or

-* u25  net-_u17-pad2_ net-_u25-pad2_ d_inverter

-* u39  net-_u17-pad1_ net-_u34-pad3_ net-_u39-pad3_ d_xor

-* u44  net-_u39-pad3_ net-_u1-pad10_ d_inverter

-* u18  net-_u18-pad1_ net-_u18-pad2_ net-_u18-pad3_ d_and

-* u28  net-_u18-pad3_ net-_u10-pad2_ net-_u28-pad3_ d_or

-* u35  net-_u27-pad2_ net-_u10-pad2_ net-_u35-pad3_ d_or

-* u27  net-_u18-pad2_ net-_u27-pad2_ d_inverter

-* u40  net-_u18-pad1_ net-_u35-pad3_ net-_u40-pad3_ d_xor

-* u45  net-_u40-pad3_ net-_u1-pad11_ d_inverter

-* u31  net-_u21-pad2_ net-_u31-pad2_ net-_u31-pad3_ d_or

-* u21  net-_u10-pad1_ net-_u21-pad2_ d_inverter

-* u37  net-_u28-pad3_ net-_u31-pad3_ net-_u37-pad3_ d_xor

-* u43  net-_u37-pad3_ net-_u1-pad12_ d_inverter

-* u10  net-_u10-pad1_ net-_u10-pad2_ net-_u10-pad3_ d_and

-* u32  net-_u1-pad1_ net-_u32-pad2_ net-_u32-pad3_ d_and

-* u41  net-_u32-pad3_ net-_u41-pad2_ net-_u1-pad14_ d_or

-x1 net-_u10-pad1_ net-_u18-pad2_ net-_u17-pad2_ net-_u16-pad2_ net-_u32-pad2_ 4_and

-x4 net-_u10-pad1_ net-_u18-pad2_ net-_u26-pad2_ net-_x3-pad3_ 3_and

-x2 net-_u10-pad1_ net-_u18-pad2_ net-_u17-pad2_ net-_u24-pad2_ net-_x2-pad5_ 4_and

-x3 net-_u31-pad2_ net-_u10-pad3_ net-_x3-pad3_ net-_x2-pad5_ net-_u41-pad2_ 4_OR

-a1 [net-_u1-pad2_ net-_u1-pad3_ ] net-_u16-pad2_ u2

-a2 [net-_u1-pad2_ net-_u1-pad3_ ] net-_u24-pad2_ u3

-a3 [net-_u1-pad4_ net-_u1-pad5_ ] net-_u17-pad2_ u4

-a4 [net-_u1-pad4_ net-_u1-pad5_ ] net-_u26-pad2_ u5

-a5 [net-_u1-pad6_ net-_u1-pad7_ ] net-_u18-pad2_ u6

-a6 [net-_u1-pad6_ net-_u1-pad7_ ] net-_u10-pad2_ u7

-a7 [net-_u1-pad8_ net-_u1-pad9_ ] net-_u10-pad1_ u8

-a8 [net-_u1-pad8_ net-_u1-pad9_ ] net-_u31-pad2_ u9

-a9 [net-_u1-pad1_ net-_u16-pad2_ ] net-_u16-pad3_ u16

-a10 [net-_u16-pad3_ net-_u24-pad2_ ] net-_u17-pad1_ u24

-a11 [net-_u23-pad2_ net-_u24-pad2_ ] net-_u33-pad3_ u33

-a12 net-_u16-pad2_ net-_u23-pad2_ u23

-a13 [net-_u1-pad1_ net-_u33-pad3_ ] net-_u38-pad3_ u38

-a14 net-_u38-pad3_ net-_u1-pad13_ u42

-a15 [net-_u17-pad1_ net-_u17-pad2_ ] net-_u17-pad3_ u17

-a16 [net-_u17-pad3_ net-_u26-pad2_ ] net-_u18-pad1_ u26

-a17 [net-_u25-pad2_ net-_u26-pad2_ ] net-_u34-pad3_ u34

-a18 net-_u17-pad2_ net-_u25-pad2_ u25

-a19 [net-_u17-pad1_ net-_u34-pad3_ ] net-_u39-pad3_ u39

-a20 net-_u39-pad3_ net-_u1-pad10_ u44

-a21 [net-_u18-pad1_ net-_u18-pad2_ ] net-_u18-pad3_ u18

-a22 [net-_u18-pad3_ net-_u10-pad2_ ] net-_u28-pad3_ u28

-a23 [net-_u27-pad2_ net-_u10-pad2_ ] net-_u35-pad3_ u35

-a24 net-_u18-pad2_ net-_u27-pad2_ u27

-a25 [net-_u18-pad1_ net-_u35-pad3_ ] net-_u40-pad3_ u40

-a26 net-_u40-pad3_ net-_u1-pad11_ u45

-a27 [net-_u21-pad2_ net-_u31-pad2_ ] net-_u31-pad3_ u31

-a28 net-_u10-pad1_ net-_u21-pad2_ u21

-a29 [net-_u28-pad3_ net-_u31-pad3_ ] net-_u37-pad3_ u37

-a30 net-_u37-pad3_ net-_u1-pad12_ u43

-a31 [net-_u10-pad1_ net-_u10-pad2_ ] net-_u10-pad3_ u10

-a32 [net-_u1-pad1_ net-_u32-pad2_ ] net-_u32-pad3_ u32

-a33 [net-_u32-pad3_ net-_u41-pad2_ ] net-_u1-pad14_ u41

-* Schematic Name: d_or, NgSpice Name: d_or

-.model u2 d_or(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )

-* Schematic Name: d_and, NgSpice Name: d_and

-.model u3 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )

-* Schematic Name: d_or, NgSpice Name: d_or

-.model u4 d_or(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )

-* Schematic Name: d_and, NgSpice Name: d_and

-.model u5 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )

-* Schematic Name: d_or, NgSpice Name: d_or

-.model u6 d_or(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )

-* Schematic Name: d_and, NgSpice Name: d_and

-.model u7 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )

-* Schematic Name: d_or, NgSpice Name: d_or

-.model u8 d_or(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )

-* Schematic Name: d_and, NgSpice Name: d_and

-.model u9 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )

-* Schematic Name: d_and, NgSpice Name: d_and

-.model u16 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )

-* Schematic Name: d_or, NgSpice Name: d_or

-.model u24 d_or(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )

-* Schematic Name: d_or, NgSpice Name: d_or

-.model u33 d_or(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )

-* Schematic Name: d_inverter, NgSpice Name: d_inverter

-.model u23 d_inverter(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )

-* Schematic Name: d_xor, NgSpice Name: d_xor

-.model u38 d_xor(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )

-* Schematic Name: d_inverter, NgSpice Name: d_inverter

-.model u42 d_inverter(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )

-* Schematic Name: d_and, NgSpice Name: d_and

-.model u17 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )

-* Schematic Name: d_or, NgSpice Name: d_or

-.model u26 d_or(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )

-* Schematic Name: d_or, NgSpice Name: d_or

-.model u34 d_or(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )

-* Schematic Name: d_inverter, NgSpice Name: d_inverter

-.model u25 d_inverter(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )

-* Schematic Name: d_xor, NgSpice Name: d_xor

-.model u39 d_xor(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )

-* Schematic Name: d_inverter, NgSpice Name: d_inverter

-.model u44 d_inverter(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )

-* Schematic Name: d_and, NgSpice Name: d_and

-.model u18 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )

-* Schematic Name: d_or, NgSpice Name: d_or

-.model u28 d_or(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )

-* Schematic Name: d_or, NgSpice Name: d_or

-.model u35 d_or(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )

-* Schematic Name: d_inverter, NgSpice Name: d_inverter

-.model u27 d_inverter(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )

-* Schematic Name: d_xor, NgSpice Name: d_xor

-.model u40 d_xor(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )

-* Schematic Name: d_inverter, NgSpice Name: d_inverter

-.model u45 d_inverter(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )

-* Schematic Name: d_or, NgSpice Name: d_or

-.model u31 d_or(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )

-* Schematic Name: d_inverter, NgSpice Name: d_inverter

-.model u21 d_inverter(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )

-* Schematic Name: d_xor, NgSpice Name: d_xor

-.model u37 d_xor(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )

-* Schematic Name: d_inverter, NgSpice Name: d_inverter

-.model u43 d_inverter(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )

-* Schematic Name: d_and, NgSpice Name: d_and

-.model u10 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )

-* Schematic Name: d_and, NgSpice Name: d_and

-.model u32 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )

-* Schematic Name: d_or, NgSpice Name: d_or

-.model u41 d_or(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )

-* Control Statements

-

-.ends 4_bit_FA
\ No newline at end of file
diff --git a/src/SubcircuitLibrary/4_bit_FA/4_bit_FA_Previous_Values.xml b/src/SubcircuitLibrary/4_bit_FA/4_bit_FA_Previous_Values.xml
deleted file mode 100644
index 49a53e5c..00000000
--- a/src/SubcircuitLibrary/4_bit_FA/4_bit_FA_Previous_Values.xml
+++ /dev/null
@@ -1 +0,0 @@
-<KicadtoNgspice><source /><model><u2 name="type">d_or<field1 name="Enter Fall Delay (default=1.0e-9)" /><field2 name="Enter Input Load (default=1.0e-12)" /><field3 name="Enter Rise Delay (default=1.0e-9)" /></u2><u3 name="type">d_and<field4 name="Enter Fall Delay (default=1.0e-9)" /><field5 name="Enter Input Load (default=1.0e-12)" /><field6 name="Enter Rise Delay (default=1.0e-9)" /></u3><u4 name="type">d_or<field7 name="Enter Fall Delay (default=1.0e-9)" /><field8 name="Enter Input Load (default=1.0e-12)" /><field9 name="Enter Rise Delay (default=1.0e-9)" /></u4><u5 name="type">d_and<field10 name="Enter Fall Delay (default=1.0e-9)" /><field11 name="Enter Input Load (default=1.0e-12)" /><field12 name="Enter Rise Delay (default=1.0e-9)" /></u5><u6 name="type">d_or<field13 name="Enter Fall Delay (default=1.0e-9)" /><field14 name="Enter Input Load (default=1.0e-12)" /><field15 name="Enter Rise Delay (default=1.0e-9)" /></u6><u7 name="type">d_and<field16 name="Enter Fall Delay (default=1.0e-9)" /><field17 name="Enter Input Load (default=1.0e-12)" /><field18 name="Enter Rise Delay (default=1.0e-9)" /></u7><u8 name="type">d_or<field19 name="Enter Fall Delay (default=1.0e-9)" /><field20 name="Enter Input Load (default=1.0e-12)" /><field21 name="Enter Rise Delay (default=1.0e-9)" /></u8><u9 name="type">d_and<field22 name="Enter Fall Delay (default=1.0e-9)" /><field23 name="Enter Input Load (default=1.0e-12)" /><field24 name="Enter Rise Delay (default=1.0e-9)" /></u9><u16 name="type">d_and<field25 name="Enter Fall Delay (default=1.0e-9)" /><field26 name="Enter Input Load (default=1.0e-12)" /><field27 name="Enter Rise Delay (default=1.0e-9)" /></u16><u24 name="type">d_or<field28 name="Enter Fall Delay (default=1.0e-9)" /><field29 name="Enter Input Load (default=1.0e-12)" /><field30 name="Enter Rise Delay (default=1.0e-9)" /></u24><u33 name="type">d_or<field31 name="Enter Fall Delay (default=1.0e-9)" /><field32 name="Enter Input Load (default=1.0e-12)" /><field33 name="Enter Rise Delay (default=1.0e-9)" /></u33><u23 name="type">d_inverter<field34 name="Enter Fall Delay (default=1.0e-9)" /><field35 name="Enter Input Load (default=1.0e-12)" /><field36 name="Enter Rise Delay (default=1.0e-9)" /></u23><u38 name="type">d_xor<field37 name="Enter Fall Delay (default=1.0e-9)" /><field38 name="Enter Input Load (default=1.0e-12)" /><field39 name="Enter Rise Delay (default=1.0e-9)" /></u38><u42 name="type">d_inverter<field40 name="Enter Fall Delay (default=1.0e-9)" /><field41 name="Enter Input Load (default=1.0e-12)" /><field42 name="Enter Rise Delay (default=1.0e-9)" /></u42><u17 name="type">d_and<field43 name="Enter Fall Delay (default=1.0e-9)" /><field44 name="Enter Input Load (default=1.0e-12)" /><field45 name="Enter Rise Delay (default=1.0e-9)" /></u17><u26 name="type">d_or<field46 name="Enter Fall Delay (default=1.0e-9)" /><field47 name="Enter Input Load (default=1.0e-12)" /><field48 name="Enter Rise Delay (default=1.0e-9)" /></u26><u34 name="type">d_or<field49 name="Enter Fall Delay (default=1.0e-9)" /><field50 name="Enter Input Load (default=1.0e-12)" /><field51 name="Enter Rise Delay (default=1.0e-9)" /></u34><u25 name="type">d_inverter<field52 name="Enter Fall Delay (default=1.0e-9)" /><field53 name="Enter Input Load (default=1.0e-12)" /><field54 name="Enter Rise Delay (default=1.0e-9)" /></u25><u39 name="type">d_xor<field55 name="Enter Fall Delay (default=1.0e-9)" /><field56 name="Enter Input Load (default=1.0e-12)" /><field57 name="Enter Rise Delay (default=1.0e-9)" /></u39><u44 name="type">d_inverter<field58 name="Enter Fall Delay (default=1.0e-9)" /><field59 name="Enter Input Load (default=1.0e-12)" /><field60 name="Enter Rise Delay (default=1.0e-9)" /></u44><u18 name="type">d_and<field61 name="Enter Fall Delay (default=1.0e-9)" /><field62 name="Enter Input Load (default=1.0e-12)" /><field63 name="Enter Rise Delay (default=1.0e-9)" /></u18><u28 name="type">d_or<field64 name="Enter Fall Delay (default=1.0e-9)" /><field65 name="Enter Input Load (default=1.0e-12)" /><field66 name="Enter Rise Delay (default=1.0e-9)" /></u28><u35 name="type">d_or<field67 name="Enter Fall Delay (default=1.0e-9)" /><field68 name="Enter Input Load (default=1.0e-12)" /><field69 name="Enter Rise Delay (default=1.0e-9)" /></u35><u27 name="type">d_inverter<field70 name="Enter Fall Delay (default=1.0e-9)" /><field71 name="Enter Input Load (default=1.0e-12)" /><field72 name="Enter Rise Delay (default=1.0e-9)" /></u27><u40 name="type">d_xor<field73 name="Enter Fall Delay (default=1.0e-9)" /><field74 name="Enter Input Load (default=1.0e-12)" /><field75 name="Enter Rise Delay (default=1.0e-9)" /></u40><u45 name="type">d_inverter<field76 name="Enter Fall Delay (default=1.0e-9)" /><field77 name="Enter Input Load (default=1.0e-12)" /><field78 name="Enter Rise Delay (default=1.0e-9)" /></u45><u31 name="type">d_or<field79 name="Enter Fall Delay (default=1.0e-9)" /><field80 name="Enter Input Load (default=1.0e-12)" /><field81 name="Enter Rise Delay (default=1.0e-9)" /></u31><u21 name="type">d_inverter<field82 name="Enter Fall Delay (default=1.0e-9)" /><field83 name="Enter Input Load (default=1.0e-12)" /><field84 name="Enter Rise Delay (default=1.0e-9)" /></u21><u37 name="type">d_xor<field85 name="Enter Fall Delay (default=1.0e-9)" /><field86 name="Enter Input Load (default=1.0e-12)" /><field87 name="Enter Rise Delay (default=1.0e-9)" /></u37><u43 name="type">d_inverter<field88 name="Enter Fall Delay (default=1.0e-9)" /><field89 name="Enter Input Load (default=1.0e-12)" /><field90 name="Enter Rise Delay (default=1.0e-9)" /></u43><u14 name="type">d_and<field91 name="Enter Fall Delay (default=1.0e-9)" /><field92 name="Enter Input Load (default=1.0e-12)" /><field93 name="Enter Rise Delay (default=1.0e-9)" /></u14><u15 name="type">d_and<field94 name="Enter Fall Delay (default=1.0e-9)" /><field95 name="Enter Input Load (default=1.0e-12)" /><field96 name="Enter Rise Delay (default=1.0e-9)" /></u15><u10 name="type">d_and<field97 name="Enter Fall Delay (default=1.0e-9)" /><field98 name="Enter Input Load (default=1.0e-12)" /><field99 name="Enter Rise Delay (default=1.0e-9)" /></u10><u11 name="type">d_and<field100 name="Enter Fall Delay (default=1.0e-9)" /><field101 name="Enter Input Load (default=1.0e-12)" /><field102 name="Enter Rise Delay (default=1.0e-9)" /></u11><u19 name="type">d_and<field103 name="Enter Fall Delay (default=1.0e-9)" /><field104 name="Enter Input Load (default=1.0e-12)" /><field105 name="Enter Rise Delay (default=1.0e-9)" /></u19><u22 name="type">d_and<field106 name="Enter Fall Delay (default=1.0e-9)" /><field107 name="Enter Input Load (default=1.0e-12)" /><field108 name="Enter Rise Delay (default=1.0e-9)" /></u22><u12 name="type">d_and<field109 name="Enter Fall Delay (default=1.0e-9)" /><field110 name="Enter Input Load (default=1.0e-12)" /><field111 name="Enter Rise Delay (default=1.0e-9)" /></u12><u13 name="type">d_and<field112 name="Enter Fall Delay (default=1.0e-9)" /><field113 name="Enter Input Load (default=1.0e-12)" /><field114 name="Enter Rise Delay (default=1.0e-9)" /></u13><u20 name="type">d_and<field115 name="Enter Fall Delay (default=1.0e-9)" /><field116 name="Enter Input Load (default=1.0e-12)" /><field117 name="Enter Rise Delay (default=1.0e-9)" /></u20><u29 name="type">d_or<field118 name="Enter Fall Delay (default=1.0e-9)" /><field119 name="Enter Input Load (default=1.0e-12)" /><field120 name="Enter Rise Delay (default=1.0e-9)" /></u29><u36 name="type">d_or<field121 name="Enter Fall Delay (default=1.0e-9)" /><field122 name="Enter Input Load (default=1.0e-12)" /><field123 name="Enter Rise Delay (default=1.0e-9)" /></u36><u30 name="type">d_or<field124 name="Enter Fall Delay (default=1.0e-9)" /><field125 name="Enter Input Load (default=1.0e-12)" /><field126 name="Enter Rise Delay (default=1.0e-9)" /></u30><u32 name="type">d_and<field127 name="Enter Fall Delay (default=1.0e-9)" /><field128 name="Enter Input Load (default=1.0e-12)" /><field129 name="Enter Rise Delay (default=1.0e-9)" /></u32><u41 name="type">d_or<field130 name="Enter Fall Delay (default=1.0e-9)" /><field131 name="Enter Input Load (default=1.0e-12)" /><field132 name="Enter Rise Delay (default=1.0e-9)" /></u41></model><devicemodel /><subcircuit><x2><field>C:\Users\malli\eSim\src\SubcircuitLibrary\4_and</field></x2><x3><field>C:\Users\malli\eSim\src\SubcircuitLibrary\4_OR</field></x3><x1><field>C:\Users\malli\eSim\src\SubcircuitLibrary\4_and</field></x1><x4><field>C:\Users\malli\eSim\src\SubcircuitLibrary\3_and</field></x4></subcircuit><analysis><ac><field1 name="Lin">true</field1><field2 name="Dec">false</field2><field3 name="Oct">false</field3><field4 name="Start Frequency" /><field5 name="Stop Frequency" /><field6 name="No. of points" /><field7 name="Start Fre Combo">Hz</field7><field8 name="Stop Fre Combo">Hz</field8></ac><dc><field1 name="Source 1" /><field2 name="Start" /><field3 name="Increment" /><field4 name="Stop" /><field5 name="Operating Point">0</field5><field6 name="Start Combo">Volts or Amperes</field6><field7 name="Increment Combo">Volts or Amperes</field7><field8 name="Stop Combo">Volts or Amperes</field8><field9 name="Source 2" /><field10 name="Start" /><field11 name="Increment" /><field12 name="Stop" /><field13 name="Start Combo">Volts or Amperes</field13><field14 name="Increment Combo">Volts or Amperes</field14><field15 name="Stop Combo">Volts or Amperes</field15></dc><tran><field1 name="Start Time" /><field2 name="Step Time" /><field3 name="Stop Time" /><field4 name="Start Combo">Sec</field4><field5 name="Step Combo">Sec</field5><field6 name="Stop Combo">Sec</field6></tran></analysis></KicadtoNgspice>
\ No newline at end of file
diff --git a/src/SubcircuitLibrary/5_nand/3_and-cache.lib b/src/SubcircuitLibrary/5_nand/3_and-cache.lib
deleted file mode 100644
index 0a3ccf7f..00000000
--- a/src/SubcircuitLibrary/5_nand/3_and-cache.lib
+++ /dev/null
@@ -1,61 +0,0 @@
-EESchema-LIBRARY Version 2.3

-#encoding utf-8

-#

-# PORT

-#

-DEF PORT U 0 40 Y Y 26 F N

-F0 "U" 50 100 30 H V C CNN

-F1 "PORT" 0 0 30 H V C CNN

-F2 "" 0 0 60 H V C CNN

-F3 "" 0 0 60 H V C CNN

-DRAW

-A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0

-A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50

-S -100 50 100 -50 0 1 0 N

-X ~ 1 250 0 100 L 30 30 1 1 B

-X ~ 2 250 0 100 L 30 30 2 1 B

-X ~ 3 250 0 100 L 30 30 3 1 B

-X ~ 4 250 0 100 L 30 30 4 1 B

-X ~ 5 250 0 100 L 30 30 5 1 B

-X ~ 6 250 0 100 L 30 30 6 1 B

-X ~ 7 250 0 100 L 30 30 7 1 B

-X ~ 8 250 0 100 L 30 30 8 1 B

-X ~ 9 250 0 100 L 30 30 9 1 B

-X ~ 10 250 0 100 L 30 30 10 1 B

-X ~ 11 250 0 100 L 30 30 11 1 B

-X ~ 12 250 0 100 L 30 30 12 1 B

-X ~ 13 250 0 100 L 30 30 13 1 B

-X ~ 14 250 0 100 L 30 30 14 1 B

-X ~ 15 250 0 100 L 30 30 15 1 B

-X ~ 16 250 0 100 L 30 30 16 1 B

-X ~ 17 250 0 100 L 30 30 17 1 B

-X ~ 18 250 0 100 L 30 30 18 1 B

-X ~ 19 250 0 100 L 30 30 19 1 B

-X ~ 20 250 0 100 L 30 30 20 1 B

-X ~ 21 250 0 100 L 30 30 21 1 B

-X ~ 22 250 0 100 L 30 30 22 1 B

-X ~ 23 250 0 100 L 30 30 23 1 B

-X ~ 24 250 0 100 L 30 30 24 1 B

-X ~ 25 250 0 100 L 30 30 25 1 B

-X ~ 26 250 0 100 L 30 30 26 1 B

-ENDDRAW

-ENDDEF

-#

-# d_and

-#

-DEF d_and U 0 40 Y Y 1 F N

-F0 "U" 0 0 60 H V C CNN

-F1 "d_and" 50 100 60 H V C CNN

-F2 "" 0 0 60 H V C CNN

-F3 "" 0 0 60 H V C CNN

-DRAW

-A 149 50 100 -894 0 0 1 0 N 150 -50 250 50

-A 150 49 100 6 900 0 1 0 N 250 50 150 150

-P 4 0 1 0  150 -50  -250 -50  -250 150  150 150 N

-X IN1 1 -450 100 200 R 50 50 1 1 I

-X IN2 2 -450 0 200 R 50 50 1 1 I

-X OUT 3 450 50 200 L 50 50 1 1 O

-ENDDRAW

-ENDDEF

-#

-#End Library

diff --git a/src/SubcircuitLibrary/5_nand/3_and.cir b/src/SubcircuitLibrary/5_nand/3_and.cir
deleted file mode 100644
index 15f8954d..00000000
--- a/src/SubcircuitLibrary/5_nand/3_and.cir
+++ /dev/null
@@ -1,13 +0,0 @@
-* C:\Users\malli\eSim\src\SubcircuitLibrary\3_and\3_and.cir

-

-* EESchema Netlist Version 1.1 (Spice format) creation date: 03/26/19 18:42:57

-

-* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N

-* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0

-

-* Sheet Name: /

-U2  Net-_U1-Pad1_ Net-_U1-Pad2_ Net-_U2-Pad3_ d_and		

-U3  Net-_U2-Pad3_ Net-_U1-Pad3_ Net-_U1-Pad4_ d_and		

-U1  Net-_U1-Pad1_ Net-_U1-Pad2_ Net-_U1-Pad3_ Net-_U1-Pad4_ PORT		

-

-.end

diff --git a/src/SubcircuitLibrary/5_nand/3_and.cir.out b/src/SubcircuitLibrary/5_nand/3_and.cir.out
deleted file mode 100644
index e3c96645..00000000
--- a/src/SubcircuitLibrary/5_nand/3_and.cir.out
+++ /dev/null
@@ -1,20 +0,0 @@
-* c:\users\malli\esim\src\subcircuitlibrary\3_and\3_and.cir

-

-* u2  net-_u1-pad1_ net-_u1-pad2_ net-_u2-pad3_ d_and

-* u3  net-_u2-pad3_ net-_u1-pad3_ net-_u1-pad4_ d_and

-* u1  net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ port

-a1 [net-_u1-pad1_ net-_u1-pad2_ ] net-_u2-pad3_ u2

-a2 [net-_u2-pad3_ net-_u1-pad3_ ] net-_u1-pad4_ u3

-* Schematic Name: d_and, NgSpice Name: d_and

-.model u2 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 

-* Schematic Name: d_and, NgSpice Name: d_and

-.model u3 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 

-.tran 0e-00 0e-00 0e-00

-

-* Control Statements 

-.control

-run

-print allv > plot_data_v.txt

-print alli > plot_data_i.txt

-.endc

-.end

diff --git a/src/SubcircuitLibrary/5_nand/3_and.pro b/src/SubcircuitLibrary/5_nand/3_and.pro
deleted file mode 100644
index 0fdf4d25..00000000
--- a/src/SubcircuitLibrary/5_nand/3_and.pro
+++ /dev/null
@@ -1,44 +0,0 @@
-update=05/31/19 15:26:09

-version=1

-last_client=eeschema

-[general]

-version=1

-RootSch=

-BoardNm=

-[pcbnew]

-version=1

-LastNetListRead=

-UseCmpFile=1

-PadDrill=0.600000000000

-PadDrillOvalY=0.600000000000

-PadSizeH=1.500000000000

-PadSizeV=1.500000000000

-PcbTextSizeV=1.500000000000

-PcbTextSizeH=1.500000000000

-PcbTextThickness=0.300000000000

-ModuleTextSizeV=1.000000000000

-ModuleTextSizeH=1.000000000000

-ModuleTextSizeThickness=0.150000000000

-SolderMaskClearance=0.000000000000

-SolderMaskMinWidth=0.000000000000

-DrawSegmentWidth=0.200000000000

-BoardOutlineThickness=0.100000000000

-ModuleOutlineThickness=0.150000000000

-[cvpcb]

-version=1

-NetIExt=net

-[eeschema]

-version=1

-LibDir=../../../kicadSchematicLibrary

-[eeschema/libraries]

-LibName1=eSim_Analog

-LibName2=eSim_Devices

-LibName3=eSim_Digital

-LibName4=eSim_Hybrid

-LibName5=eSim_Miscellaneous

-LibName6=eSim_Plot

-LibName7=eSim_Power

-LibName8=eSim_PSpice

-LibName9=eSim_Sources

-LibName10=eSim_Subckt

-LibName11=eSim_User

diff --git a/src/SubcircuitLibrary/5_nand/3_and.sch b/src/SubcircuitLibrary/5_nand/3_and.sch
deleted file mode 100644
index c853bf49..00000000
--- a/src/SubcircuitLibrary/5_nand/3_and.sch
+++ /dev/null
@@ -1,130 +0,0 @@
-EESchema Schematic File Version 2

-LIBS:power

-LIBS:texas

-LIBS:intel

-LIBS:audio

-LIBS:interface

-LIBS:digital-audio

-LIBS:philips

-LIBS:display

-LIBS:cypress

-LIBS:siliconi

-LIBS:opto

-LIBS:atmel

-LIBS:contrib

-LIBS:valves

-LIBS:eSim_Analog

-LIBS:eSim_Devices

-LIBS:eSim_Digital

-LIBS:eSim_Hybrid

-LIBS:eSim_Miscellaneous

-LIBS:eSim_Plot

-LIBS:eSim_Power

-LIBS:eSim_PSpice

-LIBS:eSim_Sources

-LIBS:eSim_Subckt

-LIBS:eSim_User

-LIBS:3_and-cache

-EELAYER 25 0

-EELAYER END

-$Descr A4 11693 8268

-encoding utf-8

-Sheet 1 1

-Title ""

-Date ""

-Rev ""

-Comp ""

-Comment1 ""

-Comment2 ""

-Comment3 ""

-Comment4 ""

-$EndDescr

-$Comp

-L d_and U2

-U 1 1 5C9A24D8

-P 4250 2700

-F 0 "U2" H 4250 2700 60  0000 C CNN

-F 1 "d_and" H 4300 2800 60  0000 C CNN

-F 2 "" H 4250 2700 60  0000 C CNN

-F 3 "" H 4250 2700 60  0000 C CNN

-	1    4250 2700

-	1    0    0    -1  

-$EndComp

-$Comp

-L d_and U3

-U 1 1 5C9A2538

-P 5150 2900

-F 0 "U3" H 5150 2900 60  0000 C CNN

-F 1 "d_and" H 5200 3000 60  0000 C CNN

-F 2 "" H 5150 2900 60  0000 C CNN

-F 3 "" H 5150 2900 60  0000 C CNN

-	1    5150 2900

-	1    0    0    -1  

-$EndComp

-$Comp

-L PORT U1

-U 1 1 5C9A259A

-P 3050 2600

-F 0 "U1" H 3100 2700 30  0000 C CNN

-F 1 "PORT" H 3050 2600 30  0000 C CNN

-F 2 "" H 3050 2600 60  0000 C CNN

-F 3 "" H 3050 2600 60  0000 C CNN

-	1    3050 2600

-	1    0    0    -1  

-$EndComp

-$Comp

-L PORT U1

-U 2 1 5C9A25D9

-P 3050 2800

-F 0 "U1" H 3100 2900 30  0000 C CNN

-F 1 "PORT" H 3050 2800 30  0000 C CNN

-F 2 "" H 3050 2800 60  0000 C CNN

-F 3 "" H 3050 2800 60  0000 C CNN

-	2    3050 2800

-	1    0    0    -1  

-$EndComp

-$Comp

-L PORT U1

-U 3 1 5C9A260A

-P 3050 3100

-F 0 "U1" H 3100 3200 30  0000 C CNN

-F 1 "PORT" H 3050 3100 30  0000 C CNN

-F 2 "" H 3050 3100 60  0000 C CNN

-F 3 "" H 3050 3100 60  0000 C CNN

-	3    3050 3100

-	1    0    0    -1  

-$EndComp

-$Comp

-L PORT U1

-U 4 1 5C9A2637

-P 6900 2850

-F 0 "U1" H 6950 2950 30  0000 C CNN

-F 1 "PORT" H 6900 2850 30  0000 C CNN

-F 2 "" H 6900 2850 60  0000 C CNN

-F 3 "" H 6900 2850 60  0000 C CNN

-	4    6900 2850

-	-1   0    0    1   

-$EndComp

-Wire Wire Line

-	4700 2650 4700 2800

-Wire Wire Line

-	5600 2850 6650 2850

-Wire Wire Line

-	3800 2600 3300 2600

-Wire Wire Line

-	3800 2700 3300 2700

-Wire Wire Line

-	3300 2700 3300 2800

-Wire Wire Line

-	3300 3100 4700 3100

-Wire Wire Line

-	4700 3100 4700 2900

-Text Notes 3500 2600 0    60   ~ 12

-in1

-Text Notes 3450 2800 0    60   ~ 12

-in2\n

-Text Notes 3500 3100 0    60   ~ 12

-in3

-Text Notes 6100 2850 0    60   ~ 12

-out

-$EndSCHEMATC

diff --git a/src/SubcircuitLibrary/5_nand/3_and.sub b/src/SubcircuitLibrary/5_nand/3_and.sub
deleted file mode 100644
index b949ae4f..00000000
--- a/src/SubcircuitLibrary/5_nand/3_and.sub
+++ /dev/null
@@ -1,14 +0,0 @@
-* Subcircuit 3_and

-.subckt 3_and net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ 

-* c:\users\malli\esim\src\subcircuitlibrary\3_and\3_and.cir

-* u2  net-_u1-pad1_ net-_u1-pad2_ net-_u2-pad3_ d_and

-* u3  net-_u2-pad3_ net-_u1-pad3_ net-_u1-pad4_ d_and

-a1 [net-_u1-pad1_ net-_u1-pad2_ ] net-_u2-pad3_ u2

-a2 [net-_u2-pad3_ net-_u1-pad3_ ] net-_u1-pad4_ u3

-* Schematic Name: d_and, NgSpice Name: d_and

-.model u2 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )

-* Schematic Name: d_and, NgSpice Name: d_and

-.model u3 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )

-* Control Statements

-

-.ends 3_and
\ No newline at end of file
diff --git a/src/SubcircuitLibrary/5_nand/5_and-cache.lib b/src/SubcircuitLibrary/5_nand/5_and-cache.lib
deleted file mode 100644
index 4cf915be..00000000
--- a/src/SubcircuitLibrary/5_nand/5_and-cache.lib
+++ /dev/null
@@ -1,79 +0,0 @@
-EESchema-LIBRARY Version 2.3

-#encoding utf-8

-#

-# 3_and

-#

-DEF 3_and X 0 40 Y Y 1 F N

-F0 "X" 900 300 60 H V C CNN

-F1 "3_and" 950 500 60 H V C CNN

-F2 "" 0 0 60 H V C CNN

-F3 "" 0 0 60 H V C CNN

-DRAW

-A 950 400 158 716 -716 0 1 0 N 1000 550 1000 250

-P 2 0 1 0  650 550  1000 550 N

-P 3 0 1 0  650 550  650 250  1000 250 N

-X in1 1 450 500 200 R 50 50 1 1 I

-X in2 2 450 400 200 R 50 50 1 1 I

-X in3 3 450 300 200 R 50 50 1 1 I

-X out 4 1300 400 200 L 50 50 1 1 O

-ENDDRAW

-ENDDEF

-#

-# PORT

-#

-DEF PORT U 0 40 Y Y 26 F N

-F0 "U" 50 100 30 H V C CNN

-F1 "PORT" 0 0 30 H V C CNN

-F2 "" 0 0 60 H V C CNN

-F3 "" 0 0 60 H V C CNN

-DRAW

-A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0

-A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50

-S -100 50 100 -50 0 1 0 N

-X ~ 1 250 0 100 L 30 30 1 1 B

-X ~ 2 250 0 100 L 30 30 2 1 B

-X ~ 3 250 0 100 L 30 30 3 1 B

-X ~ 4 250 0 100 L 30 30 4 1 B

-X ~ 5 250 0 100 L 30 30 5 1 B

-X ~ 6 250 0 100 L 30 30 6 1 B

-X ~ 7 250 0 100 L 30 30 7 1 B

-X ~ 8 250 0 100 L 30 30 8 1 B

-X ~ 9 250 0 100 L 30 30 9 1 B

-X ~ 10 250 0 100 L 30 30 10 1 B

-X ~ 11 250 0 100 L 30 30 11 1 B

-X ~ 12 250 0 100 L 30 30 12 1 B

-X ~ 13 250 0 100 L 30 30 13 1 B

-X ~ 14 250 0 100 L 30 30 14 1 B

-X ~ 15 250 0 100 L 30 30 15 1 B

-X ~ 16 250 0 100 L 30 30 16 1 B

-X ~ 17 250 0 100 L 30 30 17 1 B

-X ~ 18 250 0 100 L 30 30 18 1 B

-X ~ 19 250 0 100 L 30 30 19 1 B

-X ~ 20 250 0 100 L 30 30 20 1 B

-X ~ 21 250 0 100 L 30 30 21 1 B

-X ~ 22 250 0 100 L 30 30 22 1 B

-X ~ 23 250 0 100 L 30 30 23 1 B

-X ~ 24 250 0 100 L 30 30 24 1 B

-X ~ 25 250 0 100 L 30 30 25 1 B

-X ~ 26 250 0 100 L 30 30 26 1 B

-ENDDRAW

-ENDDEF

-#

-# d_and

-#

-DEF d_and U 0 40 Y Y 1 F N

-F0 "U" 0 0 60 H V C CNN

-F1 "d_and" 50 100 60 H V C CNN

-F2 "" 0 0 60 H V C CNN

-F3 "" 0 0 60 H V C CNN

-DRAW

-A 149 50 100 -894 0 0 1 0 N 150 -50 250 50

-A 150 49 100 6 900 0 1 0 N 250 50 150 150

-P 4 0 1 0  150 -50  -250 -50  -250 150  150 150 N

-X IN1 1 -450 100 200 R 50 50 1 1 I

-X IN2 2 -450 0 200 R 50 50 1 1 I

-X OUT 3 450 50 200 L 50 50 1 1 O

-ENDDRAW

-ENDDEF

-#

-#End Library

diff --git a/src/SubcircuitLibrary/5_nand/5_and.cir b/src/SubcircuitLibrary/5_nand/5_and.cir
deleted file mode 100644
index ca1199bd..00000000
--- a/src/SubcircuitLibrary/5_nand/5_and.cir
+++ /dev/null
@@ -1,14 +0,0 @@
-* C:\Users\malli\eSim\src\SubcircuitLibrary\5_and\5_and.cir

-

-* EESchema Netlist Version 1.1 (Spice format) creation date: 03/26/19 18:53:13

-

-* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N

-* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0

-

-* Sheet Name: /

-X1  Net-_U1-Pad1_ Net-_U1-Pad2_ Net-_U1-Pad3_ Net-_U3-Pad1_ 3_and		

-U2  Net-_U1-Pad4_ Net-_U1-Pad5_ Net-_U2-Pad3_ d_and		

-U3  Net-_U3-Pad1_ Net-_U2-Pad3_ Net-_U1-Pad6_ d_and		

-U1  Net-_U1-Pad1_ Net-_U1-Pad2_ Net-_U1-Pad3_ Net-_U1-Pad4_ Net-_U1-Pad5_ Net-_U1-Pad6_ PORT		

-

-.end

diff --git a/src/SubcircuitLibrary/5_nand/5_and.cir.out b/src/SubcircuitLibrary/5_nand/5_and.cir.out
deleted file mode 100644
index 20d3f8a5..00000000
--- a/src/SubcircuitLibrary/5_nand/5_and.cir.out
+++ /dev/null
@@ -1,22 +0,0 @@
-* c:\users\malli\esim\src\subcircuitlibrary\5_and\5_and.cir

-

-.include 3_and.sub

-x1 net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u3-pad1_ 3_and

-* u2  net-_u1-pad4_ net-_u1-pad5_ net-_u2-pad3_ d_and

-* u3  net-_u3-pad1_ net-_u2-pad3_ net-_u1-pad6_ d_and

-* u1  net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ net-_u1-pad5_ net-_u1-pad6_ port

-a1 [net-_u1-pad4_ net-_u1-pad5_ ] net-_u2-pad3_ u2

-a2 [net-_u3-pad1_ net-_u2-pad3_ ] net-_u1-pad6_ u3

-* Schematic Name: d_and, NgSpice Name: d_and

-.model u2 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 

-* Schematic Name: d_and, NgSpice Name: d_and

-.model u3 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 

-.tran 0e-00 0e-00 0e-00

-

-* Control Statements 

-.control

-run

-print allv > plot_data_v.txt

-print alli > plot_data_i.txt

-.endc

-.end

diff --git a/src/SubcircuitLibrary/5_nand/5_and.pro b/src/SubcircuitLibrary/5_nand/5_and.pro
deleted file mode 100644
index a9d6304f..00000000
--- a/src/SubcircuitLibrary/5_nand/5_and.pro
+++ /dev/null
@@ -1,50 +0,0 @@
-update=06/01/19 11:31:03

-version=1

-last_client=eeschema

-[general]

-version=1

-RootSch=

-BoardNm=

-[pcbnew]

-version=1

-LastNetListRead=

-UseCmpFile=1

-PadDrill=0.600000000000

-PadDrillOvalY=0.600000000000

-PadSizeH=1.500000000000

-PadSizeV=1.500000000000

-PcbTextSizeV=1.500000000000

-PcbTextSizeH=1.500000000000

-PcbTextThickness=0.300000000000

-ModuleTextSizeV=1.000000000000

-ModuleTextSizeH=1.000000000000

-ModuleTextSizeThickness=0.150000000000

-SolderMaskClearance=0.000000000000

-SolderMaskMinWidth=0.000000000000

-DrawSegmentWidth=0.200000000000

-BoardOutlineThickness=0.100000000000

-ModuleOutlineThickness=0.150000000000

-[cvpcb]

-version=1

-NetIExt=net

-[eeschema]

-version=1

-LibDir=../../../kicadSchematicLibrary

-[eeschema/libraries]

-LibName1=cypress

-LibName2=siliconi

-LibName3=opto

-LibName4=atmel

-LibName5=contrib

-LibName6=valves

-LibName7=eSim_Analog

-LibName8=eSim_Devices

-LibName9=eSim_Digital

-LibName10=eSim_Hybrid

-LibName11=eSim_Miscellaneous

-LibName12=eSim_Plot

-LibName13=eSim_Power

-LibName14=eSim_PSpice

-LibName15=eSim_Sources

-LibName16=eSim_Subckt

-LibName17=eSim_User

diff --git a/src/SubcircuitLibrary/5_nand/5_and.sch b/src/SubcircuitLibrary/5_nand/5_and.sch
deleted file mode 100644
index 0d86cdec..00000000
--- a/src/SubcircuitLibrary/5_nand/5_and.sch
+++ /dev/null
@@ -1,171 +0,0 @@
-EESchema Schematic File Version 2

-LIBS:cypress

-LIBS:siliconi

-LIBS:opto

-LIBS:atmel

-LIBS:contrib

-LIBS:valves

-LIBS:eSim_Analog

-LIBS:eSim_Devices

-LIBS:eSim_Digital

-LIBS:eSim_Hybrid

-LIBS:eSim_Miscellaneous

-LIBS:eSim_Plot

-LIBS:eSim_Power

-LIBS:eSim_PSpice

-LIBS:eSim_Sources

-LIBS:eSim_Subckt

-LIBS:eSim_User

-LIBS:5_and-cache

-EELAYER 25 0

-EELAYER END

-$Descr A4 11693 8268

-encoding utf-8

-Sheet 1 1

-Title ""

-Date ""

-Rev ""

-Comp ""

-Comment1 ""

-Comment2 ""

-Comment3 ""

-Comment4 ""

-$EndDescr

-$Comp

-L 3_and X1

-U 1 1 5C9A2741

-P 3800 3350

-F 0 "X1" H 4700 3650 60  0000 C CNN

-F 1 "3_and" H 4750 3850 60  0000 C CNN

-F 2 "" H 3800 3350 60  0000 C CNN

-F 3 "" H 3800 3350 60  0000 C CNN

-	1    3800 3350

-	1    0    0    -1  

-$EndComp

-$Comp

-L d_and U2

-U 1 1 5C9A2764

-P 4650 3400

-F 0 "U2" H 4650 3400 60  0000 C CNN

-F 1 "d_and" H 4700 3500 60  0000 C CNN

-F 2 "" H 4650 3400 60  0000 C CNN

-F 3 "" H 4650 3400 60  0000 C CNN

-	1    4650 3400

-	1    0    0    -1  

-$EndComp

-$Comp

-L d_and U3

-U 1 1 5C9A2791

-P 5550 3200

-F 0 "U3" H 5550 3200 60  0000 C CNN

-F 1 "d_and" H 5600 3300 60  0000 C CNN

-F 2 "" H 5550 3200 60  0000 C CNN

-F 3 "" H 5550 3200 60  0000 C CNN

-	1    5550 3200

-	1    0    0    -1  

-$EndComp

-Wire Wire Line

-	5100 3100 5100 2950

-Wire Wire Line

-	5100 3200 5100 3350

-Wire Wire Line

-	4250 2850 4250 2700

-Wire Wire Line

-	4250 2700 3600 2700

-Wire Wire Line

-	4250 2950 4150 2950

-Wire Wire Line

-	4150 2950 4150 2900

-Wire Wire Line

-	4150 2900 3600 2900

-Wire Wire Line

-	4200 3300 3600 3300

-Wire Wire Line

-	4250 3050 4250 3100

-Wire Wire Line

-	4250 3100 3600 3100

-Wire Wire Line

-	4200 3400 4200 3500

-Wire Wire Line

-	4200 3500 3600 3500

-Wire Wire Line

-	6000 3150 6500 3150

-$Comp

-L PORT U1

-U 1 1 5C9A2865

-P 3350 2700

-F 0 "U1" H 3400 2800 30  0000 C CNN

-F 1 "PORT" H 3350 2700 30  0000 C CNN

-F 2 "" H 3350 2700 60  0000 C CNN

-F 3 "" H 3350 2700 60  0000 C CNN

-	1    3350 2700

-	1    0    0    -1  

-$EndComp

-$Comp

-L PORT U1

-U 2 1 5C9A28B6

-P 3350 2900

-F 0 "U1" H 3400 3000 30  0000 C CNN

-F 1 "PORT" H 3350 2900 30  0000 C CNN

-F 2 "" H 3350 2900 60  0000 C CNN

-F 3 "" H 3350 2900 60  0000 C CNN

-	2    3350 2900

-	1    0    0    -1  

-$EndComp

-$Comp

-L PORT U1

-U 3 1 5C9A28D9

-P 3350 3100

-F 0 "U1" H 3400 3200 30  0000 C CNN

-F 1 "PORT" H 3350 3100 30  0000 C CNN

-F 2 "" H 3350 3100 60  0000 C CNN

-F 3 "" H 3350 3100 60  0000 C CNN

-	3    3350 3100

-	1    0    0    -1  

-$EndComp

-$Comp

-L PORT U1

-U 4 1 5C9A28FF

-P 3350 3300

-F 0 "U1" H 3400 3400 30  0000 C CNN

-F 1 "PORT" H 3350 3300 30  0000 C CNN

-F 2 "" H 3350 3300 60  0000 C CNN

-F 3 "" H 3350 3300 60  0000 C CNN

-	4    3350 3300

-	1    0    0    -1  

-$EndComp

-$Comp

-L PORT U1

-U 5 1 5C9A2928

-P 3350 3500

-F 0 "U1" H 3400 3600 30  0000 C CNN

-F 1 "PORT" H 3350 3500 30  0000 C CNN

-F 2 "" H 3350 3500 60  0000 C CNN

-F 3 "" H 3350 3500 60  0000 C CNN

-	5    3350 3500

-	1    0    0    -1  

-$EndComp

-$Comp

-L PORT U1

-U 6 1 5C9A2958

-P 6750 3150

-F 0 "U1" H 6800 3250 30  0000 C CNN

-F 1 "PORT" H 6750 3150 30  0000 C CNN

-F 2 "" H 6750 3150 60  0000 C CNN

-F 3 "" H 6750 3150 60  0000 C CNN

-	6    6750 3150

-	-1   0    0    1   

-$EndComp

-Text Notes 3800 2700 0    60   ~ 12

-in1

-Text Notes 3800 2900 0    60   ~ 12

-in2

-Text Notes 3800 3100 0    60   ~ 12

-in3

-Text Notes 3800 3300 0    60   ~ 12

-in4

-Text Notes 3800 3500 0    60   ~ 12

-in5

-Text Notes 6150 3150 0    60   ~ 12

-out

-$EndSCHEMATC

diff --git a/src/SubcircuitLibrary/5_nand/5_and.sub b/src/SubcircuitLibrary/5_nand/5_and.sub
deleted file mode 100644
index 9d929fcb..00000000
--- a/src/SubcircuitLibrary/5_nand/5_and.sub
+++ /dev/null
@@ -1,16 +0,0 @@
-* Subcircuit 5_and

-.subckt 5_and net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ net-_u1-pad5_ net-_u1-pad6_ 

-* c:\users\malli\esim\src\subcircuitlibrary\5_and\5_and.cir

-.include 3_and.sub

-x1 net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u3-pad1_ 3_and

-* u2  net-_u1-pad4_ net-_u1-pad5_ net-_u2-pad3_ d_and

-* u3  net-_u3-pad1_ net-_u2-pad3_ net-_u1-pad6_ d_and

-a1 [net-_u1-pad4_ net-_u1-pad5_ ] net-_u2-pad3_ u2

-a2 [net-_u3-pad1_ net-_u2-pad3_ ] net-_u1-pad6_ u3

-* Schematic Name: d_and, NgSpice Name: d_and

-.model u2 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )

-* Schematic Name: d_and, NgSpice Name: d_and

-.model u3 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )

-* Control Statements

-

-.ends 5_and
\ No newline at end of file
diff --git a/src/SubcircuitLibrary/5_nand/5_nand-cache.lib b/src/SubcircuitLibrary/5_nand/5_nand-cache.lib
deleted file mode 100644
index cb517be1..00000000
--- a/src/SubcircuitLibrary/5_nand/5_nand-cache.lib
+++ /dev/null
@@ -1,78 +0,0 @@
-EESchema-LIBRARY Version 2.3
-#encoding utf-8
-#
-# 5_and
-#
-DEF 5_and X 0 40 Y Y 1 F N
-F0 "X" 50 -100 60 H V C CNN
-F1 "5_and" 100 150 60 H V C CNN
-F2 "" 0 0 60 H V C CNN
-F3 "" 0 0 60 H V C CNN
-DRAW
-A 100 0 255 787 -787 0 1 0 N 150 250 150 -250
-P 2 0 1 0 -250 250 150 250 N
-P 3 0 1 0 -250 250 -250 -250 150 -250 N
-X in1 1 -450 200 200 R 50 50 1 1 I
-X in2 2 -450 100 200 R 50 50 1 1 I
-X in3 3 -450 0 200 R 50 50 1 1 I
-X in4 4 -450 -100 200 R 50 50 1 1 I
-X in5 5 -450 -200 200 R 50 50 1 1 I
-X out 6 550 0 200 L 50 50 1 1 O
-ENDDRAW
-ENDDEF
-#
-# PORT
-#
-DEF PORT U 0 40 Y Y 26 F N
-F0 "U" 50 100 30 H V C CNN
-F1 "PORT" 0 0 30 H V C CNN
-F2 "" 0 0 60 H V C CNN
-F3 "" 0 0 60 H V C CNN
-DRAW
-A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0
-A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50
-S -100 50 100 -50 0 1 0 N
-X ~ 1 250 0 100 L 30 30 1 1 B
-X ~ 2 250 0 100 L 30 30 2 1 B
-X ~ 3 250 0 100 L 30 30 3 1 B
-X ~ 4 250 0 100 L 30 30 4 1 B
-X ~ 5 250 0 100 L 30 30 5 1 B
-X ~ 6 250 0 100 L 30 30 6 1 B
-X ~ 7 250 0 100 L 30 30 7 1 B
-X ~ 8 250 0 100 L 30 30 8 1 B
-X ~ 9 250 0 100 L 30 30 9 1 B
-X ~ 10 250 0 100 L 30 30 10 1 B
-X ~ 11 250 0 100 L 30 30 11 1 B
-X ~ 12 250 0 100 L 30 30 12 1 B
-X ~ 13 250 0 100 L 30 30 13 1 B
-X ~ 14 250 0 100 L 30 30 14 1 B
-X ~ 15 250 0 100 L 30 30 15 1 B
-X ~ 16 250 0 100 L 30 30 16 1 B
-X ~ 17 250 0 100 L 30 30 17 1 B
-X ~ 18 250 0 100 L 30 30 18 1 B
-X ~ 19 250 0 100 L 30 30 19 1 B
-X ~ 20 250 0 100 L 30 30 20 1 B
-X ~ 21 250 0 100 L 30 30 21 1 B
-X ~ 22 250 0 100 L 30 30 22 1 B
-X ~ 23 250 0 100 L 30 30 23 1 B
-X ~ 24 250 0 100 L 30 30 24 1 B
-X ~ 25 250 0 100 L 30 30 25 1 B
-X ~ 26 250 0 100 L 30 30 26 1 B
-ENDDRAW
-ENDDEF
-#
-# d_inverter
-#
-DEF d_inverter U 0 40 Y Y 1 F N
-F0 "U" 0 -100 60 H V C CNN
-F1 "d_inverter" 0 150 60 H V C CNN
-F2 "" 50 -50 60 H V C CNN
-F3 "" 50 -50 60 H V C CNN
-DRAW
-P 4 0 1 0 -100 50 -100 -50 100 0 -100 50 N
-X ~ 1 -300 0 200 R 50 50 1 1 I
-X ~ 2 300 0 200 L 50 50 1 1 O I
-ENDDRAW
-ENDDEF
-#
-#End Library
diff --git a/src/SubcircuitLibrary/5_nand/5_nand.cir b/src/SubcircuitLibrary/5_nand/5_nand.cir
deleted file mode 100644
index e833d0f4..00000000
--- a/src/SubcircuitLibrary/5_nand/5_nand.cir
+++ /dev/null
@@ -1,13 +0,0 @@
-* /home/mallikarjuna/Downloads/eSim-1.1.2/src/SubcircuitLibrary/5_nand/5_nand.cir
-
-* EESchema Netlist Version 1.1 (Spice format) creation date: Fri Jun 21 16:57:27 2019
-
-* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N
-* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0
-
-* Sheet Name: /
-X1  Net-_U1-Pad1_ Net-_U1-Pad2_ Net-_U1-Pad3_ Net-_U1-Pad4_ Net-_U1-Pad5_ Net-_U2-Pad1_ 5_and		
-U2  Net-_U2-Pad1_ Net-_U1-Pad6_ d_inverter		
-U1  Net-_U1-Pad1_ Net-_U1-Pad2_ Net-_U1-Pad3_ Net-_U1-Pad4_ Net-_U1-Pad5_ Net-_U1-Pad6_ PORT		
-
-.end
diff --git a/src/SubcircuitLibrary/5_nand/5_nand.cir.out b/src/SubcircuitLibrary/5_nand/5_nand.cir.out
deleted file mode 100644
index 164de911..00000000
--- a/src/SubcircuitLibrary/5_nand/5_nand.cir.out
+++ /dev/null
@@ -1,18 +0,0 @@
-* /home/mallikarjuna/downloads/esim-1.1.2/src/subcircuitlibrary/5_nand/5_nand.cir
-
-.include 5_and.sub
-x1 net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ net-_u1-pad5_ net-_u2-pad1_ 5_and
-* u2  net-_u2-pad1_ net-_u1-pad6_ d_inverter
-* u1  net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ net-_u1-pad5_ net-_u1-pad6_ port
-a1 net-_u2-pad1_ net-_u1-pad6_ u2
-* Schematic Name: d_inverter, NgSpice Name: d_inverter
-.model u2 d_inverter(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 
-.tran 0e-00 0e-00 0e-00
-
-* Control Statements 
-.control
-run
-print allv > plot_data_v.txt
-print alli > plot_data_i.txt
-.endc
-.end
diff --git a/src/SubcircuitLibrary/5_nand/5_nand.pro b/src/SubcircuitLibrary/5_nand/5_nand.pro
deleted file mode 100644
index b7d23f44..00000000
--- a/src/SubcircuitLibrary/5_nand/5_nand.pro
+++ /dev/null
@@ -1,83 +0,0 @@
-update=Fri Jun 21 16:46:10 2019
-version=1
-last_client=eeschema
-[general]
-version=1
-RootSch=
-BoardNm=
-[pcbnew]
-version=1
-LastNetListRead=
-UseCmpFile=1
-PadDrill=0.600000000000
-PadDrillOvalY=0.600000000000
-PadSizeH=1.500000000000
-PadSizeV=1.500000000000
-PcbTextSizeV=1.500000000000
-PcbTextSizeH=1.500000000000
-PcbTextThickness=0.300000000000
-ModuleTextSizeV=1.000000000000
-ModuleTextSizeH=1.000000000000
-ModuleTextSizeThickness=0.150000000000
-SolderMaskClearance=0.000000000000
-SolderMaskMinWidth=0.000000000000
-DrawSegmentWidth=0.200000000000
-BoardOutlineThickness=0.100000000000
-ModuleOutlineThickness=0.150000000000
-[cvpcb]
-version=1
-NetIExt=net
-[eeschema]
-version=1
-LibDir=../../../kicadSchematicLibrary
-[eeschema/libraries]
-LibName1=adc-dac
-LibName2=memory
-LibName3=xilinx
-LibName4=microcontrollers
-LibName5=dsp
-LibName6=microchip
-LibName7=analog_switches
-LibName8=motorola
-LibName9=texas
-LibName10=intel
-LibName11=audio
-LibName12=interface
-LibName13=digital-audio
-LibName14=philips
-LibName15=display
-LibName16=cypress
-LibName17=siliconi
-LibName18=opto
-LibName19=atmel
-LibName20=contrib
-LibName21=power
-LibName22=device
-LibName23=transistors
-LibName24=conn
-LibName25=linear
-LibName26=regul
-LibName27=74xx
-LibName28=cmos4000
-LibName29=eSim_Analog
-LibName30=eSim_Devices
-LibName31=eSim_Digital
-LibName32=eSim_Hybrid
-LibName33=eSim_Miscellaneous
-LibName34=eSim_Power
-LibName35=eSim_Sources
-LibName36=eSim_Subckt
-LibName37=eSim_User
-LibName38=eSim_Plot
-LibName39=eSim_PSpice
-LibName40=/home/mallikarjuna/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_Analog
-LibName41=/home/mallikarjuna/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_Devices
-LibName42=/home/mallikarjuna/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_Digital
-LibName43=/home/mallikarjuna/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_Hybrid
-LibName44=/home/mallikarjuna/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_Miscellaneous
-LibName45=/home/mallikarjuna/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_Plot
-LibName46=/home/mallikarjuna/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_Power
-LibName47=/home/mallikarjuna/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_Sources
-LibName48=/home/mallikarjuna/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_Subckt
-LibName49=/home/mallikarjuna/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_User
-
diff --git a/src/SubcircuitLibrary/5_nand/5_nand.sch b/src/SubcircuitLibrary/5_nand/5_nand.sch
deleted file mode 100644
index 86379b08..00000000
--- a/src/SubcircuitLibrary/5_nand/5_nand.sch
+++ /dev/null
@@ -1,175 +0,0 @@
-EESchema Schematic File Version 2
-LIBS:adc-dac
-LIBS:memory
-LIBS:xilinx
-LIBS:microcontrollers
-LIBS:dsp
-LIBS:microchip
-LIBS:analog_switches
-LIBS:motorola
-LIBS:texas
-LIBS:intel
-LIBS:audio
-LIBS:interface
-LIBS:digital-audio
-LIBS:philips
-LIBS:display
-LIBS:cypress
-LIBS:siliconi
-LIBS:opto
-LIBS:atmel
-LIBS:contrib
-LIBS:power
-LIBS:device
-LIBS:transistors
-LIBS:conn
-LIBS:linear
-LIBS:regul
-LIBS:74xx
-LIBS:cmos4000
-LIBS:eSim_Analog
-LIBS:eSim_Devices
-LIBS:eSim_Digital
-LIBS:eSim_Hybrid
-LIBS:eSim_Miscellaneous
-LIBS:eSim_Power
-LIBS:eSim_Sources
-LIBS:eSim_Subckt
-LIBS:eSim_User
-LIBS:eSim_Plot
-LIBS:eSim_PSpice
-EELAYER 25 0
-EELAYER END
-$Descr A4 11693 8268
-encoding utf-8
-Sheet 1 1
-Title ""
-Date ""
-Rev ""
-Comp ""
-Comment1 ""
-Comment2 ""
-Comment3 ""
-Comment4 ""
-$EndDescr
-$Comp
-L 5_and X1
-U 1 1 5D0CBD44
-P 4150 3700
-F 0 "X1" H 4200 3600 60  0000 C CNN
-F 1 "5_and" H 4250 3850 60  0000 C CNN
-F 2 "" H 4150 3700 60  0000 C CNN
-F 3 "" H 4150 3700 60  0000 C CNN
-	1    4150 3700
-	1    0    0    -1  
-$EndComp
-$Comp
-L d_inverter U2
-U 1 1 5D0CBD97
-P 5150 3700
-F 0 "U2" H 5150 3600 60  0000 C CNN
-F 1 "d_inverter" H 5150 3850 60  0000 C CNN
-F 2 "" H 5200 3650 60  0000 C CNN
-F 3 "" H 5200 3650 60  0000 C CNN
-	1    5150 3700
-	1    0    0    -1  
-$EndComp
-$Comp
-L PORT U1
-U 1 1 5D0CBDBE
-P 2900 2900
-F 0 "U1" H 2950 3000 30  0000 C CNN
-F 1 "PORT" H 2900 2900 30  0000 C CNN
-F 2 "" H 2900 2900 60  0000 C CNN
-F 3 "" H 2900 2900 60  0000 C CNN
-	1    2900 2900
-	1    0    0    -1  
-$EndComp
-$Comp
-L PORT U1
-U 2 1 5D0CBDF4
-P 2900 3150
-F 0 "U1" H 2950 3250 30  0000 C CNN
-F 1 "PORT" H 2900 3150 30  0000 C CNN
-F 2 "" H 2900 3150 60  0000 C CNN
-F 3 "" H 2900 3150 60  0000 C CNN
-	2    2900 3150
-	1    0    0    -1  
-$EndComp
-$Comp
-L PORT U1
-U 3 1 5D0CBE16
-P 2900 3400
-F 0 "U1" H 2950 3500 30  0000 C CNN
-F 1 "PORT" H 2900 3400 30  0000 C CNN
-F 2 "" H 2900 3400 60  0000 C CNN
-F 3 "" H 2900 3400 60  0000 C CNN
-	3    2900 3400
-	1    0    0    -1  
-$EndComp
-$Comp
-L PORT U1
-U 4 1 5D0CBE3F
-P 2900 3750
-F 0 "U1" H 2950 3850 30  0000 C CNN
-F 1 "PORT" H 2900 3750 30  0000 C CNN
-F 2 "" H 2900 3750 60  0000 C CNN
-F 3 "" H 2900 3750 60  0000 C CNN
-	4    2900 3750
-	1    0    0    -1  
-$EndComp
-$Comp
-L PORT U1
-U 5 1 5D0CBE6B
-P 2900 4150
-F 0 "U1" H 2950 4250 30  0000 C CNN
-F 1 "PORT" H 2900 4150 30  0000 C CNN
-F 2 "" H 2900 4150 60  0000 C CNN
-F 3 "" H 2900 4150 60  0000 C CNN
-	5    2900 4150
-	1    0    0    -1  
-$EndComp
-$Comp
-L PORT U1
-U 6 1 5D0CBE9C
-P 6200 3700
-F 0 "U1" H 6250 3800 30  0000 C CNN
-F 1 "PORT" H 6200 3700 30  0000 C CNN
-F 2 "" H 6200 3700 60  0000 C CNN
-F 3 "" H 6200 3700 60  0000 C CNN
-	6    6200 3700
-	-1   0    0    1   
-$EndComp
-Wire Wire Line
-	3150 2900 3700 2900
-Wire Wire Line
-	3700 2900 3700 3500
-Wire Wire Line
-	3700 3600 3500 3600
-Wire Wire Line
-	3500 3600 3500 3150
-Wire Wire Line
-	3500 3150 3150 3150
-Wire Wire Line
-	3150 3400 3350 3400
-Wire Wire Line
-	3350 3400 3350 3700
-Wire Wire Line
-	3350 3700 3700 3700
-Wire Wire Line
-	3700 3800 3250 3800
-Wire Wire Line
-	3250 3800 3250 3750
-Wire Wire Line
-	3250 3750 3150 3750
-Wire Wire Line
-	3150 4150 3350 4150
-Wire Wire Line
-	3350 4150 3350 3900
-Wire Wire Line
-	3350 3900 3700 3900
-Wire Wire Line
-	4700 3700 4850 3700
-Wire Wire Line
-	5450 3700 5950 3700
-$EndSCHEMATC
diff --git a/src/SubcircuitLibrary/5_nand/5_nand.sub b/src/SubcircuitLibrary/5_nand/5_nand.sub
deleted file mode 100644
index c3e041fa..00000000
--- a/src/SubcircuitLibrary/5_nand/5_nand.sub
+++ /dev/null
@@ -1,12 +0,0 @@
-* Subcircuit 5_nand
-.subckt 5_nand net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ net-_u1-pad5_ net-_u1-pad6_ 
-* /home/mallikarjuna/downloads/esim-1.1.2/src/subcircuitlibrary/5_nand/5_nand.cir
-.include 5_and.sub
-x1 net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ net-_u1-pad5_ net-_u2-pad1_ 5_and
-* u2  net-_u2-pad1_ net-_u1-pad6_ d_inverter
-a1 net-_u2-pad1_ net-_u1-pad6_ u2
-* Schematic Name: d_inverter, NgSpice Name: d_inverter
-.model u2 d_inverter(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )
-* Control Statements
-
-.ends 5_nand
\ No newline at end of file
diff --git a/src/SubcircuitLibrary/5_nand/5_nand_Previous_Values.xml b/src/SubcircuitLibrary/5_nand/5_nand_Previous_Values.xml
deleted file mode 100644
index c4b4cde2..00000000
--- a/src/SubcircuitLibrary/5_nand/5_nand_Previous_Values.xml
+++ /dev/null
@@ -1 +0,0 @@
-<KicadtoNgspice><analysis><ac><field1 name="Lin">true</field1><field2 name="Dec">false</field2><field3 name="Oct">false</field3><field4 name="Start Frequency" /><field5 name="Stop Frequency" /><field6 name="No. of points" /><field7 name="Start Fre Combo">Hz</field7><field8 name="Stop Fre Combo">Hz</field8></ac><dc><field1 name="Source 1" /><field2 name="Start" /><field3 name="Increment" /><field4 name="Stop" /><field5 name="Operating Point">0</field5><field6 name="Start Combo">Volts or Amperes</field6><field7 name="Increment Combo">Volts or Amperes</field7><field8 name="Stop Combo">Volts or Amperes</field8><field9 name="Source 2" /><field10 name="Start" /><field11 name="Increment" /><field12 name="Stop" /><field13 name="Start Combo">Volts or Amperes</field13><field14 name="Increment Combo">Volts or Amperes</field14><field15 name="Stop Combo">Volts or Amperes</field15></dc><tran><field1 name="Start Time" /><field2 name="Step Time" /><field3 name="Stop Time" /><field4 name="Start Combo">Sec</field4><field5 name="Step Combo">Sec</field5><field6 name="Stop Combo">Sec</field6></tran></analysis><source /><model><u2 name="type">d_inverter<field1 name="Enter Fall Delay (default=1.0e-9)" /><field2 name="Enter Input Load (default=1.0e-12)" /><field3 name="Enter Rise Delay (default=1.0e-9)" /></u2></model><devicemodel /><subcircuit><x1><field>/home/mallikarjuna/Downloads/eSim-1.1.2/src/SubcircuitLibrary/5_and</field></x1></subcircuit></KicadtoNgspice>
\ No newline at end of file
diff --git a/src/SubcircuitLibrary/5_nor/3_and-cache.lib b/src/SubcircuitLibrary/5_nor/3_and-cache.lib
deleted file mode 100644
index 0a3ccf7f..00000000
--- a/src/SubcircuitLibrary/5_nor/3_and-cache.lib
+++ /dev/null
@@ -1,61 +0,0 @@
-EESchema-LIBRARY Version 2.3

-#encoding utf-8

-#

-# PORT

-#

-DEF PORT U 0 40 Y Y 26 F N

-F0 "U" 50 100 30 H V C CNN

-F1 "PORT" 0 0 30 H V C CNN

-F2 "" 0 0 60 H V C CNN

-F3 "" 0 0 60 H V C CNN

-DRAW

-A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0

-A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50

-S -100 50 100 -50 0 1 0 N

-X ~ 1 250 0 100 L 30 30 1 1 B

-X ~ 2 250 0 100 L 30 30 2 1 B

-X ~ 3 250 0 100 L 30 30 3 1 B

-X ~ 4 250 0 100 L 30 30 4 1 B

-X ~ 5 250 0 100 L 30 30 5 1 B

-X ~ 6 250 0 100 L 30 30 6 1 B

-X ~ 7 250 0 100 L 30 30 7 1 B

-X ~ 8 250 0 100 L 30 30 8 1 B

-X ~ 9 250 0 100 L 30 30 9 1 B

-X ~ 10 250 0 100 L 30 30 10 1 B

-X ~ 11 250 0 100 L 30 30 11 1 B

-X ~ 12 250 0 100 L 30 30 12 1 B

-X ~ 13 250 0 100 L 30 30 13 1 B

-X ~ 14 250 0 100 L 30 30 14 1 B

-X ~ 15 250 0 100 L 30 30 15 1 B

-X ~ 16 250 0 100 L 30 30 16 1 B

-X ~ 17 250 0 100 L 30 30 17 1 B

-X ~ 18 250 0 100 L 30 30 18 1 B

-X ~ 19 250 0 100 L 30 30 19 1 B

-X ~ 20 250 0 100 L 30 30 20 1 B

-X ~ 21 250 0 100 L 30 30 21 1 B

-X ~ 22 250 0 100 L 30 30 22 1 B

-X ~ 23 250 0 100 L 30 30 23 1 B

-X ~ 24 250 0 100 L 30 30 24 1 B

-X ~ 25 250 0 100 L 30 30 25 1 B

-X ~ 26 250 0 100 L 30 30 26 1 B

-ENDDRAW

-ENDDEF

-#

-# d_and

-#

-DEF d_and U 0 40 Y Y 1 F N

-F0 "U" 0 0 60 H V C CNN

-F1 "d_and" 50 100 60 H V C CNN

-F2 "" 0 0 60 H V C CNN

-F3 "" 0 0 60 H V C CNN

-DRAW

-A 149 50 100 -894 0 0 1 0 N 150 -50 250 50

-A 150 49 100 6 900 0 1 0 N 250 50 150 150

-P 4 0 1 0  150 -50  -250 -50  -250 150  150 150 N

-X IN1 1 -450 100 200 R 50 50 1 1 I

-X IN2 2 -450 0 200 R 50 50 1 1 I

-X OUT 3 450 50 200 L 50 50 1 1 O

-ENDDRAW

-ENDDEF

-#

-#End Library

diff --git a/src/SubcircuitLibrary/5_nor/3_and.cir b/src/SubcircuitLibrary/5_nor/3_and.cir
deleted file mode 100644
index 15f8954d..00000000
--- a/src/SubcircuitLibrary/5_nor/3_and.cir
+++ /dev/null
@@ -1,13 +0,0 @@
-* C:\Users\malli\eSim\src\SubcircuitLibrary\3_and\3_and.cir

-

-* EESchema Netlist Version 1.1 (Spice format) creation date: 03/26/19 18:42:57

-

-* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N

-* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0

-

-* Sheet Name: /

-U2  Net-_U1-Pad1_ Net-_U1-Pad2_ Net-_U2-Pad3_ d_and		

-U3  Net-_U2-Pad3_ Net-_U1-Pad3_ Net-_U1-Pad4_ d_and		

-U1  Net-_U1-Pad1_ Net-_U1-Pad2_ Net-_U1-Pad3_ Net-_U1-Pad4_ PORT		

-

-.end

diff --git a/src/SubcircuitLibrary/5_nor/3_and.cir.out b/src/SubcircuitLibrary/5_nor/3_and.cir.out
deleted file mode 100644
index e3c96645..00000000
--- a/src/SubcircuitLibrary/5_nor/3_and.cir.out
+++ /dev/null
@@ -1,20 +0,0 @@
-* c:\users\malli\esim\src\subcircuitlibrary\3_and\3_and.cir

-

-* u2  net-_u1-pad1_ net-_u1-pad2_ net-_u2-pad3_ d_and

-* u3  net-_u2-pad3_ net-_u1-pad3_ net-_u1-pad4_ d_and

-* u1  net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ port

-a1 [net-_u1-pad1_ net-_u1-pad2_ ] net-_u2-pad3_ u2

-a2 [net-_u2-pad3_ net-_u1-pad3_ ] net-_u1-pad4_ u3

-* Schematic Name: d_and, NgSpice Name: d_and

-.model u2 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 

-* Schematic Name: d_and, NgSpice Name: d_and

-.model u3 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 

-.tran 0e-00 0e-00 0e-00

-

-* Control Statements 

-.control

-run

-print allv > plot_data_v.txt

-print alli > plot_data_i.txt

-.endc

-.end

diff --git a/src/SubcircuitLibrary/5_nor/3_and.pro b/src/SubcircuitLibrary/5_nor/3_and.pro
deleted file mode 100644
index 0fdf4d25..00000000
--- a/src/SubcircuitLibrary/5_nor/3_and.pro
+++ /dev/null
@@ -1,44 +0,0 @@
-update=05/31/19 15:26:09

-version=1

-last_client=eeschema

-[general]

-version=1

-RootSch=

-BoardNm=

-[pcbnew]

-version=1

-LastNetListRead=

-UseCmpFile=1

-PadDrill=0.600000000000

-PadDrillOvalY=0.600000000000

-PadSizeH=1.500000000000

-PadSizeV=1.500000000000

-PcbTextSizeV=1.500000000000

-PcbTextSizeH=1.500000000000

-PcbTextThickness=0.300000000000

-ModuleTextSizeV=1.000000000000

-ModuleTextSizeH=1.000000000000

-ModuleTextSizeThickness=0.150000000000

-SolderMaskClearance=0.000000000000

-SolderMaskMinWidth=0.000000000000

-DrawSegmentWidth=0.200000000000

-BoardOutlineThickness=0.100000000000

-ModuleOutlineThickness=0.150000000000

-[cvpcb]

-version=1

-NetIExt=net

-[eeschema]

-version=1

-LibDir=../../../kicadSchematicLibrary

-[eeschema/libraries]

-LibName1=eSim_Analog

-LibName2=eSim_Devices

-LibName3=eSim_Digital

-LibName4=eSim_Hybrid

-LibName5=eSim_Miscellaneous

-LibName6=eSim_Plot

-LibName7=eSim_Power

-LibName8=eSim_PSpice

-LibName9=eSim_Sources

-LibName10=eSim_Subckt

-LibName11=eSim_User

diff --git a/src/SubcircuitLibrary/5_nor/3_and.sch b/src/SubcircuitLibrary/5_nor/3_and.sch
deleted file mode 100644
index c853bf49..00000000
--- a/src/SubcircuitLibrary/5_nor/3_and.sch
+++ /dev/null
@@ -1,130 +0,0 @@
-EESchema Schematic File Version 2

-LIBS:power

-LIBS:texas

-LIBS:intel

-LIBS:audio

-LIBS:interface

-LIBS:digital-audio

-LIBS:philips

-LIBS:display

-LIBS:cypress

-LIBS:siliconi

-LIBS:opto

-LIBS:atmel

-LIBS:contrib

-LIBS:valves

-LIBS:eSim_Analog

-LIBS:eSim_Devices

-LIBS:eSim_Digital

-LIBS:eSim_Hybrid

-LIBS:eSim_Miscellaneous

-LIBS:eSim_Plot

-LIBS:eSim_Power

-LIBS:eSim_PSpice

-LIBS:eSim_Sources

-LIBS:eSim_Subckt

-LIBS:eSim_User

-LIBS:3_and-cache

-EELAYER 25 0

-EELAYER END

-$Descr A4 11693 8268

-encoding utf-8

-Sheet 1 1

-Title ""

-Date ""

-Rev ""

-Comp ""

-Comment1 ""

-Comment2 ""

-Comment3 ""

-Comment4 ""

-$EndDescr

-$Comp

-L d_and U2

-U 1 1 5C9A24D8

-P 4250 2700

-F 0 "U2" H 4250 2700 60  0000 C CNN

-F 1 "d_and" H 4300 2800 60  0000 C CNN

-F 2 "" H 4250 2700 60  0000 C CNN

-F 3 "" H 4250 2700 60  0000 C CNN

-	1    4250 2700

-	1    0    0    -1  

-$EndComp

-$Comp

-L d_and U3

-U 1 1 5C9A2538

-P 5150 2900

-F 0 "U3" H 5150 2900 60  0000 C CNN

-F 1 "d_and" H 5200 3000 60  0000 C CNN

-F 2 "" H 5150 2900 60  0000 C CNN

-F 3 "" H 5150 2900 60  0000 C CNN

-	1    5150 2900

-	1    0    0    -1  

-$EndComp

-$Comp

-L PORT U1

-U 1 1 5C9A259A

-P 3050 2600

-F 0 "U1" H 3100 2700 30  0000 C CNN

-F 1 "PORT" H 3050 2600 30  0000 C CNN

-F 2 "" H 3050 2600 60  0000 C CNN

-F 3 "" H 3050 2600 60  0000 C CNN

-	1    3050 2600

-	1    0    0    -1  

-$EndComp

-$Comp

-L PORT U1

-U 2 1 5C9A25D9

-P 3050 2800

-F 0 "U1" H 3100 2900 30  0000 C CNN

-F 1 "PORT" H 3050 2800 30  0000 C CNN

-F 2 "" H 3050 2800 60  0000 C CNN

-F 3 "" H 3050 2800 60  0000 C CNN

-	2    3050 2800

-	1    0    0    -1  

-$EndComp

-$Comp

-L PORT U1

-U 3 1 5C9A260A

-P 3050 3100

-F 0 "U1" H 3100 3200 30  0000 C CNN

-F 1 "PORT" H 3050 3100 30  0000 C CNN

-F 2 "" H 3050 3100 60  0000 C CNN

-F 3 "" H 3050 3100 60  0000 C CNN

-	3    3050 3100

-	1    0    0    -1  

-$EndComp

-$Comp

-L PORT U1

-U 4 1 5C9A2637

-P 6900 2850

-F 0 "U1" H 6950 2950 30  0000 C CNN

-F 1 "PORT" H 6900 2850 30  0000 C CNN

-F 2 "" H 6900 2850 60  0000 C CNN

-F 3 "" H 6900 2850 60  0000 C CNN

-	4    6900 2850

-	-1   0    0    1   

-$EndComp

-Wire Wire Line

-	4700 2650 4700 2800

-Wire Wire Line

-	5600 2850 6650 2850

-Wire Wire Line

-	3800 2600 3300 2600

-Wire Wire Line

-	3800 2700 3300 2700

-Wire Wire Line

-	3300 2700 3300 2800

-Wire Wire Line

-	3300 3100 4700 3100

-Wire Wire Line

-	4700 3100 4700 2900

-Text Notes 3500 2600 0    60   ~ 12

-in1

-Text Notes 3450 2800 0    60   ~ 12

-in2\n

-Text Notes 3500 3100 0    60   ~ 12

-in3

-Text Notes 6100 2850 0    60   ~ 12

-out

-$EndSCHEMATC

diff --git a/src/SubcircuitLibrary/5_nor/3_and.sub b/src/SubcircuitLibrary/5_nor/3_and.sub
deleted file mode 100644
index b949ae4f..00000000
--- a/src/SubcircuitLibrary/5_nor/3_and.sub
+++ /dev/null
@@ -1,14 +0,0 @@
-* Subcircuit 3_and

-.subckt 3_and net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ 

-* c:\users\malli\esim\src\subcircuitlibrary\3_and\3_and.cir

-* u2  net-_u1-pad1_ net-_u1-pad2_ net-_u2-pad3_ d_and

-* u3  net-_u2-pad3_ net-_u1-pad3_ net-_u1-pad4_ d_and

-a1 [net-_u1-pad1_ net-_u1-pad2_ ] net-_u2-pad3_ u2

-a2 [net-_u2-pad3_ net-_u1-pad3_ ] net-_u1-pad4_ u3

-* Schematic Name: d_and, NgSpice Name: d_and

-.model u2 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )

-* Schematic Name: d_and, NgSpice Name: d_and

-.model u3 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )

-* Control Statements

-

-.ends 3_and
\ No newline at end of file
diff --git a/src/SubcircuitLibrary/5_nor/5_and-cache.lib b/src/SubcircuitLibrary/5_nor/5_and-cache.lib
deleted file mode 100644
index 4cf915be..00000000
--- a/src/SubcircuitLibrary/5_nor/5_and-cache.lib
+++ /dev/null
@@ -1,79 +0,0 @@
-EESchema-LIBRARY Version 2.3

-#encoding utf-8

-#

-# 3_and

-#

-DEF 3_and X 0 40 Y Y 1 F N

-F0 "X" 900 300 60 H V C CNN

-F1 "3_and" 950 500 60 H V C CNN

-F2 "" 0 0 60 H V C CNN

-F3 "" 0 0 60 H V C CNN

-DRAW

-A 950 400 158 716 -716 0 1 0 N 1000 550 1000 250

-P 2 0 1 0  650 550  1000 550 N

-P 3 0 1 0  650 550  650 250  1000 250 N

-X in1 1 450 500 200 R 50 50 1 1 I

-X in2 2 450 400 200 R 50 50 1 1 I

-X in3 3 450 300 200 R 50 50 1 1 I

-X out 4 1300 400 200 L 50 50 1 1 O

-ENDDRAW

-ENDDEF

-#

-# PORT

-#

-DEF PORT U 0 40 Y Y 26 F N

-F0 "U" 50 100 30 H V C CNN

-F1 "PORT" 0 0 30 H V C CNN

-F2 "" 0 0 60 H V C CNN

-F3 "" 0 0 60 H V C CNN

-DRAW

-A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0

-A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50

-S -100 50 100 -50 0 1 0 N

-X ~ 1 250 0 100 L 30 30 1 1 B

-X ~ 2 250 0 100 L 30 30 2 1 B

-X ~ 3 250 0 100 L 30 30 3 1 B

-X ~ 4 250 0 100 L 30 30 4 1 B

-X ~ 5 250 0 100 L 30 30 5 1 B

-X ~ 6 250 0 100 L 30 30 6 1 B

-X ~ 7 250 0 100 L 30 30 7 1 B

-X ~ 8 250 0 100 L 30 30 8 1 B

-X ~ 9 250 0 100 L 30 30 9 1 B

-X ~ 10 250 0 100 L 30 30 10 1 B

-X ~ 11 250 0 100 L 30 30 11 1 B

-X ~ 12 250 0 100 L 30 30 12 1 B

-X ~ 13 250 0 100 L 30 30 13 1 B

-X ~ 14 250 0 100 L 30 30 14 1 B

-X ~ 15 250 0 100 L 30 30 15 1 B

-X ~ 16 250 0 100 L 30 30 16 1 B

-X ~ 17 250 0 100 L 30 30 17 1 B

-X ~ 18 250 0 100 L 30 30 18 1 B

-X ~ 19 250 0 100 L 30 30 19 1 B

-X ~ 20 250 0 100 L 30 30 20 1 B

-X ~ 21 250 0 100 L 30 30 21 1 B

-X ~ 22 250 0 100 L 30 30 22 1 B

-X ~ 23 250 0 100 L 30 30 23 1 B

-X ~ 24 250 0 100 L 30 30 24 1 B

-X ~ 25 250 0 100 L 30 30 25 1 B

-X ~ 26 250 0 100 L 30 30 26 1 B

-ENDDRAW

-ENDDEF

-#

-# d_and

-#

-DEF d_and U 0 40 Y Y 1 F N

-F0 "U" 0 0 60 H V C CNN

-F1 "d_and" 50 100 60 H V C CNN

-F2 "" 0 0 60 H V C CNN

-F3 "" 0 0 60 H V C CNN

-DRAW

-A 149 50 100 -894 0 0 1 0 N 150 -50 250 50

-A 150 49 100 6 900 0 1 0 N 250 50 150 150

-P 4 0 1 0  150 -50  -250 -50  -250 150  150 150 N

-X IN1 1 -450 100 200 R 50 50 1 1 I

-X IN2 2 -450 0 200 R 50 50 1 1 I

-X OUT 3 450 50 200 L 50 50 1 1 O

-ENDDRAW

-ENDDEF

-#

-#End Library

diff --git a/src/SubcircuitLibrary/5_nor/5_and.cir b/src/SubcircuitLibrary/5_nor/5_and.cir
deleted file mode 100644
index ca1199bd..00000000
--- a/src/SubcircuitLibrary/5_nor/5_and.cir
+++ /dev/null
@@ -1,14 +0,0 @@
-* C:\Users\malli\eSim\src\SubcircuitLibrary\5_and\5_and.cir

-

-* EESchema Netlist Version 1.1 (Spice format) creation date: 03/26/19 18:53:13

-

-* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N

-* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0

-

-* Sheet Name: /

-X1  Net-_U1-Pad1_ Net-_U1-Pad2_ Net-_U1-Pad3_ Net-_U3-Pad1_ 3_and		

-U2  Net-_U1-Pad4_ Net-_U1-Pad5_ Net-_U2-Pad3_ d_and		

-U3  Net-_U3-Pad1_ Net-_U2-Pad3_ Net-_U1-Pad6_ d_and		

-U1  Net-_U1-Pad1_ Net-_U1-Pad2_ Net-_U1-Pad3_ Net-_U1-Pad4_ Net-_U1-Pad5_ Net-_U1-Pad6_ PORT		

-

-.end

diff --git a/src/SubcircuitLibrary/5_nor/5_and.cir.out b/src/SubcircuitLibrary/5_nor/5_and.cir.out
deleted file mode 100644
index 20d3f8a5..00000000
--- a/src/SubcircuitLibrary/5_nor/5_and.cir.out
+++ /dev/null
@@ -1,22 +0,0 @@
-* c:\users\malli\esim\src\subcircuitlibrary\5_and\5_and.cir

-

-.include 3_and.sub

-x1 net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u3-pad1_ 3_and

-* u2  net-_u1-pad4_ net-_u1-pad5_ net-_u2-pad3_ d_and

-* u3  net-_u3-pad1_ net-_u2-pad3_ net-_u1-pad6_ d_and

-* u1  net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ net-_u1-pad5_ net-_u1-pad6_ port

-a1 [net-_u1-pad4_ net-_u1-pad5_ ] net-_u2-pad3_ u2

-a2 [net-_u3-pad1_ net-_u2-pad3_ ] net-_u1-pad6_ u3

-* Schematic Name: d_and, NgSpice Name: d_and

-.model u2 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 

-* Schematic Name: d_and, NgSpice Name: d_and

-.model u3 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 

-.tran 0e-00 0e-00 0e-00

-

-* Control Statements 

-.control

-run

-print allv > plot_data_v.txt

-print alli > plot_data_i.txt

-.endc

-.end

diff --git a/src/SubcircuitLibrary/5_nor/5_and.pro b/src/SubcircuitLibrary/5_nor/5_and.pro
deleted file mode 100644
index a9d6304f..00000000
--- a/src/SubcircuitLibrary/5_nor/5_and.pro
+++ /dev/null
@@ -1,50 +0,0 @@
-update=06/01/19 11:31:03

-version=1

-last_client=eeschema

-[general]

-version=1

-RootSch=

-BoardNm=

-[pcbnew]

-version=1

-LastNetListRead=

-UseCmpFile=1

-PadDrill=0.600000000000

-PadDrillOvalY=0.600000000000

-PadSizeH=1.500000000000

-PadSizeV=1.500000000000

-PcbTextSizeV=1.500000000000

-PcbTextSizeH=1.500000000000

-PcbTextThickness=0.300000000000

-ModuleTextSizeV=1.000000000000

-ModuleTextSizeH=1.000000000000

-ModuleTextSizeThickness=0.150000000000

-SolderMaskClearance=0.000000000000

-SolderMaskMinWidth=0.000000000000

-DrawSegmentWidth=0.200000000000

-BoardOutlineThickness=0.100000000000

-ModuleOutlineThickness=0.150000000000

-[cvpcb]

-version=1

-NetIExt=net

-[eeschema]

-version=1

-LibDir=../../../kicadSchematicLibrary

-[eeschema/libraries]

-LibName1=cypress

-LibName2=siliconi

-LibName3=opto

-LibName4=atmel

-LibName5=contrib

-LibName6=valves

-LibName7=eSim_Analog

-LibName8=eSim_Devices

-LibName9=eSim_Digital

-LibName10=eSim_Hybrid

-LibName11=eSim_Miscellaneous

-LibName12=eSim_Plot

-LibName13=eSim_Power

-LibName14=eSim_PSpice

-LibName15=eSim_Sources

-LibName16=eSim_Subckt

-LibName17=eSim_User

diff --git a/src/SubcircuitLibrary/5_nor/5_and.sch b/src/SubcircuitLibrary/5_nor/5_and.sch
deleted file mode 100644
index 0d86cdec..00000000
--- a/src/SubcircuitLibrary/5_nor/5_and.sch
+++ /dev/null
@@ -1,171 +0,0 @@
-EESchema Schematic File Version 2

-LIBS:cypress

-LIBS:siliconi

-LIBS:opto

-LIBS:atmel

-LIBS:contrib

-LIBS:valves

-LIBS:eSim_Analog

-LIBS:eSim_Devices

-LIBS:eSim_Digital

-LIBS:eSim_Hybrid

-LIBS:eSim_Miscellaneous

-LIBS:eSim_Plot

-LIBS:eSim_Power

-LIBS:eSim_PSpice

-LIBS:eSim_Sources

-LIBS:eSim_Subckt

-LIBS:eSim_User

-LIBS:5_and-cache

-EELAYER 25 0

-EELAYER END

-$Descr A4 11693 8268

-encoding utf-8

-Sheet 1 1

-Title ""

-Date ""

-Rev ""

-Comp ""

-Comment1 ""

-Comment2 ""

-Comment3 ""

-Comment4 ""

-$EndDescr

-$Comp

-L 3_and X1

-U 1 1 5C9A2741

-P 3800 3350

-F 0 "X1" H 4700 3650 60  0000 C CNN

-F 1 "3_and" H 4750 3850 60  0000 C CNN

-F 2 "" H 3800 3350 60  0000 C CNN

-F 3 "" H 3800 3350 60  0000 C CNN

-	1    3800 3350

-	1    0    0    -1  

-$EndComp

-$Comp

-L d_and U2

-U 1 1 5C9A2764

-P 4650 3400

-F 0 "U2" H 4650 3400 60  0000 C CNN

-F 1 "d_and" H 4700 3500 60  0000 C CNN

-F 2 "" H 4650 3400 60  0000 C CNN

-F 3 "" H 4650 3400 60  0000 C CNN

-	1    4650 3400

-	1    0    0    -1  

-$EndComp

-$Comp

-L d_and U3

-U 1 1 5C9A2791

-P 5550 3200

-F 0 "U3" H 5550 3200 60  0000 C CNN

-F 1 "d_and" H 5600 3300 60  0000 C CNN

-F 2 "" H 5550 3200 60  0000 C CNN

-F 3 "" H 5550 3200 60  0000 C CNN

-	1    5550 3200

-	1    0    0    -1  

-$EndComp

-Wire Wire Line

-	5100 3100 5100 2950

-Wire Wire Line

-	5100 3200 5100 3350

-Wire Wire Line

-	4250 2850 4250 2700

-Wire Wire Line

-	4250 2700 3600 2700

-Wire Wire Line

-	4250 2950 4150 2950

-Wire Wire Line

-	4150 2950 4150 2900

-Wire Wire Line

-	4150 2900 3600 2900

-Wire Wire Line

-	4200 3300 3600 3300

-Wire Wire Line

-	4250 3050 4250 3100

-Wire Wire Line

-	4250 3100 3600 3100

-Wire Wire Line

-	4200 3400 4200 3500

-Wire Wire Line

-	4200 3500 3600 3500

-Wire Wire Line

-	6000 3150 6500 3150

-$Comp

-L PORT U1

-U 1 1 5C9A2865

-P 3350 2700

-F 0 "U1" H 3400 2800 30  0000 C CNN

-F 1 "PORT" H 3350 2700 30  0000 C CNN

-F 2 "" H 3350 2700 60  0000 C CNN

-F 3 "" H 3350 2700 60  0000 C CNN

-	1    3350 2700

-	1    0    0    -1  

-$EndComp

-$Comp

-L PORT U1

-U 2 1 5C9A28B6

-P 3350 2900

-F 0 "U1" H 3400 3000 30  0000 C CNN

-F 1 "PORT" H 3350 2900 30  0000 C CNN

-F 2 "" H 3350 2900 60  0000 C CNN

-F 3 "" H 3350 2900 60  0000 C CNN

-	2    3350 2900

-	1    0    0    -1  

-$EndComp

-$Comp

-L PORT U1

-U 3 1 5C9A28D9

-P 3350 3100

-F 0 "U1" H 3400 3200 30  0000 C CNN

-F 1 "PORT" H 3350 3100 30  0000 C CNN

-F 2 "" H 3350 3100 60  0000 C CNN

-F 3 "" H 3350 3100 60  0000 C CNN

-	3    3350 3100

-	1    0    0    -1  

-$EndComp

-$Comp

-L PORT U1

-U 4 1 5C9A28FF

-P 3350 3300

-F 0 "U1" H 3400 3400 30  0000 C CNN

-F 1 "PORT" H 3350 3300 30  0000 C CNN

-F 2 "" H 3350 3300 60  0000 C CNN

-F 3 "" H 3350 3300 60  0000 C CNN

-	4    3350 3300

-	1    0    0    -1  

-$EndComp

-$Comp

-L PORT U1

-U 5 1 5C9A2928

-P 3350 3500

-F 0 "U1" H 3400 3600 30  0000 C CNN

-F 1 "PORT" H 3350 3500 30  0000 C CNN

-F 2 "" H 3350 3500 60  0000 C CNN

-F 3 "" H 3350 3500 60  0000 C CNN

-	5    3350 3500

-	1    0    0    -1  

-$EndComp

-$Comp

-L PORT U1

-U 6 1 5C9A2958

-P 6750 3150

-F 0 "U1" H 6800 3250 30  0000 C CNN

-F 1 "PORT" H 6750 3150 30  0000 C CNN

-F 2 "" H 6750 3150 60  0000 C CNN

-F 3 "" H 6750 3150 60  0000 C CNN

-	6    6750 3150

-	-1   0    0    1   

-$EndComp

-Text Notes 3800 2700 0    60   ~ 12

-in1

-Text Notes 3800 2900 0    60   ~ 12

-in2

-Text Notes 3800 3100 0    60   ~ 12

-in3

-Text Notes 3800 3300 0    60   ~ 12

-in4

-Text Notes 3800 3500 0    60   ~ 12

-in5

-Text Notes 6150 3150 0    60   ~ 12

-out

-$EndSCHEMATC

diff --git a/src/SubcircuitLibrary/5_nor/5_and.sub b/src/SubcircuitLibrary/5_nor/5_and.sub
deleted file mode 100644
index 9d929fcb..00000000
--- a/src/SubcircuitLibrary/5_nor/5_and.sub
+++ /dev/null
@@ -1,16 +0,0 @@
-* Subcircuit 5_and

-.subckt 5_and net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ net-_u1-pad5_ net-_u1-pad6_ 

-* c:\users\malli\esim\src\subcircuitlibrary\5_and\5_and.cir

-.include 3_and.sub

-x1 net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u3-pad1_ 3_and

-* u2  net-_u1-pad4_ net-_u1-pad5_ net-_u2-pad3_ d_and

-* u3  net-_u3-pad1_ net-_u2-pad3_ net-_u1-pad6_ d_and

-a1 [net-_u1-pad4_ net-_u1-pad5_ ] net-_u2-pad3_ u2

-a2 [net-_u3-pad1_ net-_u2-pad3_ ] net-_u1-pad6_ u3

-* Schematic Name: d_and, NgSpice Name: d_and

-.model u2 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )

-* Schematic Name: d_and, NgSpice Name: d_and

-.model u3 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )

-* Control Statements

-

-.ends 5_and
\ No newline at end of file
diff --git a/src/SubcircuitLibrary/5_nor/5_and_Previous_Values.xml b/src/SubcircuitLibrary/5_nor/5_and_Previous_Values.xml
deleted file mode 100644
index ae2c08a7..00000000
--- a/src/SubcircuitLibrary/5_nor/5_and_Previous_Values.xml
+++ /dev/null
@@ -1 +0,0 @@
-<KicadtoNgspice><source /><model><u2 name="type">d_and<field1 name="Enter Fall Delay (default=1.0e-9)" /><field2 name="Enter Input Load (default=1.0e-12)" /><field3 name="Enter Rise Delay (default=1.0e-9)" /></u2><u3 name="type">d_and<field4 name="Enter Fall Delay (default=1.0e-9)" /><field5 name="Enter Input Load (default=1.0e-12)" /><field6 name="Enter Rise Delay (default=1.0e-9)" /></u3></model><devicemodel /><subcircuit><x1><field>C:\Users\malli\eSim\src\SubcircuitLibrary\3_and</field></x1></subcircuit><analysis><ac><field1 name="Lin">true</field1><field2 name="Dec">false</field2><field3 name="Oct">false</field3><field4 name="Start Frequency" /><field5 name="Stop Frequency" /><field6 name="No. of points" /><field7 name="Start Fre Combo">Hz</field7><field8 name="Stop Fre Combo">Hz</field8></ac><dc><field1 name="Source 1" /><field2 name="Start" /><field3 name="Increment" /><field4 name="Stop" /><field5 name="Operating Point">0</field5><field6 name="Start Combo">Volts or Amperes</field6><field7 name="Increment Combo">Volts or Amperes</field7><field8 name="Stop Combo">Volts or Amperes</field8><field9 name="Source 2" /><field10 name="Start" /><field11 name="Increment" /><field12 name="Stop" /><field13 name="Start Combo">Volts or Amperes</field13><field14 name="Increment Combo">Volts or Amperes</field14><field15 name="Stop Combo">Volts or Amperes</field15></dc><tran><field1 name="Start Time" /><field2 name="Step Time" /><field3 name="Stop Time" /><field4 name="Start Combo">Sec</field4><field5 name="Step Combo">Sec</field5><field6 name="Stop Combo">Sec</field6></tran></analysis></KicadtoNgspice>
\ No newline at end of file
diff --git a/src/SubcircuitLibrary/5_nor/5_nor-cache.lib b/src/SubcircuitLibrary/5_nor/5_nor-cache.lib
deleted file mode 100644
index 7098010f..00000000
--- a/src/SubcircuitLibrary/5_nor/5_nor-cache.lib
+++ /dev/null
@@ -1,95 +0,0 @@
-EESchema-LIBRARY Version 2.3
-#encoding utf-8
-#
-# 5_and
-#
-DEF 5_and X 0 40 Y Y 1 F N
-F0 "X" 50 -100 60 H V C CNN
-F1 "5_and" 100 150 60 H V C CNN
-F2 "" 0 0 60 H V C CNN
-F3 "" 0 0 60 H V C CNN
-DRAW
-A 100 0 255 787 -787 0 1 0 N 150 250 150 -250
-P 2 0 1 0 -250 250 150 250 N
-P 3 0 1 0 -250 250 -250 -250 150 -250 N
-X in1 1 -450 200 200 R 50 50 1 1 I
-X in2 2 -450 100 200 R 50 50 1 1 I
-X in3 3 -450 0 200 R 50 50 1 1 I
-X in4 4 -450 -100 200 R 50 50 1 1 I
-X in5 5 -450 -200 200 R 50 50 1 1 I
-X out 6 550 0 200 L 50 50 1 1 O
-ENDDRAW
-ENDDEF
-#
-# PORT
-#
-DEF PORT U 0 40 Y Y 26 F N
-F0 "U" 50 100 30 H V C CNN
-F1 "PORT" 0 0 30 H V C CNN
-F2 "" 0 0 60 H V C CNN
-F3 "" 0 0 60 H V C CNN
-DRAW
-A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0
-A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50
-S -100 50 100 -50 0 1 0 N
-X ~ 1 250 0 100 L 30 30 1 1 B
-X ~ 2 250 0 100 L 30 30 2 1 B
-X ~ 3 250 0 100 L 30 30 3 1 B
-X ~ 4 250 0 100 L 30 30 4 1 B
-X ~ 5 250 0 100 L 30 30 5 1 B
-X ~ 6 250 0 100 L 30 30 6 1 B
-X ~ 7 250 0 100 L 30 30 7 1 B
-X ~ 8 250 0 100 L 30 30 8 1 B
-X ~ 9 250 0 100 L 30 30 9 1 B
-X ~ 10 250 0 100 L 30 30 10 1 B
-X ~ 11 250 0 100 L 30 30 11 1 B
-X ~ 12 250 0 100 L 30 30 12 1 B
-X ~ 13 250 0 100 L 30 30 13 1 B
-X ~ 14 250 0 100 L 30 30 14 1 B
-X ~ 15 250 0 100 L 30 30 15 1 B
-X ~ 16 250 0 100 L 30 30 16 1 B
-X ~ 17 250 0 100 L 30 30 17 1 B
-X ~ 18 250 0 100 L 30 30 18 1 B
-X ~ 19 250 0 100 L 30 30 19 1 B
-X ~ 20 250 0 100 L 30 30 20 1 B
-X ~ 21 250 0 100 L 30 30 21 1 B
-X ~ 22 250 0 100 L 30 30 22 1 B
-X ~ 23 250 0 100 L 30 30 23 1 B
-X ~ 24 250 0 100 L 30 30 24 1 B
-X ~ 25 250 0 100 L 30 30 25 1 B
-X ~ 26 250 0 100 L 30 30 26 1 B
-ENDDRAW
-ENDDEF
-#
-# d_and
-#
-DEF d_and U 0 40 Y Y 1 F N
-F0 "U" 0 0 60 H V C CNN
-F1 "d_and" 50 100 60 H V C CNN
-F2 "" 0 0 60 H V C CNN
-F3 "" 0 0 60 H V C CNN
-DRAW
-A 149 50 100 -894 0 0 1 0 N 150 -50 250 50
-A 150 49 100 6 900 0 1 0 N 250 50 150 150
-P 4 0 1 0 150 -50 -250 -50 -250 150 150 150 N
-X IN1 1 -450 100 200 R 50 50 1 1 I
-X IN2 2 -450 0 200 R 50 50 1 1 I
-X OUT 3 450 50 200 L 50 50 1 1 O
-ENDDRAW
-ENDDEF
-#
-# d_inverter
-#
-DEF d_inverter U 0 40 Y Y 1 F N
-F0 "U" 0 -100 60 H V C CNN
-F1 "d_inverter" 0 150 60 H V C CNN
-F2 "" 50 -50 60 H V C CNN
-F3 "" 50 -50 60 H V C CNN
-DRAW
-P 4 0 1 0 -100 50 -100 -50 100 0 -100 50 N
-X ~ 1 -300 0 200 R 50 50 1 1 I
-X ~ 2 300 0 200 L 50 50 1 1 O I
-ENDDRAW
-ENDDEF
-#
-#End Library
diff --git a/src/SubcircuitLibrary/5_nor/5_nor.cir b/src/SubcircuitLibrary/5_nor/5_nor.cir
deleted file mode 100644
index 0e4db1ea..00000000
--- a/src/SubcircuitLibrary/5_nor/5_nor.cir
+++ /dev/null
@@ -1,19 +0,0 @@
-* /home/mallikarjuna/Downloads/eSim-1.1.2/src/SubcircuitLibrary/5_nor/5_nor.cir
-
-* EESchema Netlist Version 1.1 (Spice format) creation date: Tue Jun 25 23:34:56 2019
-
-* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N
-* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0
-
-* Sheet Name: /
-U8  Net-_U8-Pad1_ Net-_U7-Pad2_ Net-_U1-Pad7_ d_and		
-U2  Net-_U1-Pad1_ Net-_U2-Pad2_ d_inverter		
-U3  Net-_U1-Pad2_ Net-_U3-Pad2_ d_inverter		
-U4  Net-_U1-Pad3_ Net-_U4-Pad2_ d_inverter		
-U5  Net-_U1-Pad4_ Net-_U5-Pad2_ d_inverter		
-U6  Net-_U1-Pad5_ Net-_U6-Pad2_ d_inverter		
-U7  Net-_U1-Pad6_ Net-_U7-Pad2_ d_inverter		
-U1  Net-_U1-Pad1_ Net-_U1-Pad2_ Net-_U1-Pad3_ Net-_U1-Pad4_ Net-_U1-Pad5_ Net-_U1-Pad6_ Net-_U1-Pad7_ PORT		
-X1  Net-_U2-Pad2_ Net-_U3-Pad2_ Net-_U4-Pad2_ Net-_U5-Pad2_ Net-_U6-Pad2_ Net-_U8-Pad1_ 5_and		
-
-.end
diff --git a/src/SubcircuitLibrary/5_nor/5_nor.cir.out b/src/SubcircuitLibrary/5_nor/5_nor.cir.out
deleted file mode 100644
index bc90e004..00000000
--- a/src/SubcircuitLibrary/5_nor/5_nor.cir.out
+++ /dev/null
@@ -1,42 +0,0 @@
-* /home/mallikarjuna/downloads/esim-1.1.2/src/subcircuitlibrary/5_nor/5_nor.cir
-
-.include 5_and.sub
-* u8  net-_u8-pad1_ net-_u7-pad2_ net-_u1-pad7_ d_and
-* u2  net-_u1-pad1_ net-_u2-pad2_ d_inverter
-* u3  net-_u1-pad2_ net-_u3-pad2_ d_inverter
-* u4  net-_u1-pad3_ net-_u4-pad2_ d_inverter
-* u5  net-_u1-pad4_ net-_u5-pad2_ d_inverter
-* u6  net-_u1-pad5_ net-_u6-pad2_ d_inverter
-* u7  net-_u1-pad6_ net-_u7-pad2_ d_inverter
-* u1  net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ net-_u1-pad5_ net-_u1-pad6_ net-_u1-pad7_ port
-x1 net-_u2-pad2_ net-_u3-pad2_ net-_u4-pad2_ net-_u5-pad2_ net-_u6-pad2_ net-_u8-pad1_ 5_and
-a1 [net-_u8-pad1_ net-_u7-pad2_ ] net-_u1-pad7_ u8
-a2 net-_u1-pad1_ net-_u2-pad2_ u2
-a3 net-_u1-pad2_ net-_u3-pad2_ u3
-a4 net-_u1-pad3_ net-_u4-pad2_ u4
-a5 net-_u1-pad4_ net-_u5-pad2_ u5
-a6 net-_u1-pad5_ net-_u6-pad2_ u6
-a7 net-_u1-pad6_ net-_u7-pad2_ u7
-* Schematic Name: d_and, NgSpice Name: d_and
-.model u8 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 
-* Schematic Name: d_inverter, NgSpice Name: d_inverter
-.model u2 d_inverter(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 
-* Schematic Name: d_inverter, NgSpice Name: d_inverter
-.model u3 d_inverter(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 
-* Schematic Name: d_inverter, NgSpice Name: d_inverter
-.model u4 d_inverter(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 
-* Schematic Name: d_inverter, NgSpice Name: d_inverter
-.model u5 d_inverter(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 
-* Schematic Name: d_inverter, NgSpice Name: d_inverter
-.model u6 d_inverter(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 
-* Schematic Name: d_inverter, NgSpice Name: d_inverter
-.model u7 d_inverter(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 
-.tran 0e-00 0e-00 0e-00
-
-* Control Statements 
-.control
-run
-print allv > plot_data_v.txt
-print alli > plot_data_i.txt
-.endc
-.end
diff --git a/src/SubcircuitLibrary/5_nor/5_nor.pro b/src/SubcircuitLibrary/5_nor/5_nor.pro
deleted file mode 100644
index 4716d4ae..00000000
--- a/src/SubcircuitLibrary/5_nor/5_nor.pro
+++ /dev/null
@@ -1,73 +0,0 @@
-update=Tue Jun 25 23:32:34 2019
-version=1
-last_client=eeschema
-[general]
-version=1
-RootSch=
-BoardNm=
-[pcbnew]
-version=1
-LastNetListRead=
-UseCmpFile=1
-PadDrill=0.600000000000
-PadDrillOvalY=0.600000000000
-PadSizeH=1.500000000000
-PadSizeV=1.500000000000
-PcbTextSizeV=1.500000000000
-PcbTextSizeH=1.500000000000
-PcbTextThickness=0.300000000000
-ModuleTextSizeV=1.000000000000
-ModuleTextSizeH=1.000000000000
-ModuleTextSizeThickness=0.150000000000
-SolderMaskClearance=0.000000000000
-SolderMaskMinWidth=0.000000000000
-DrawSegmentWidth=0.200000000000
-BoardOutlineThickness=0.100000000000
-ModuleOutlineThickness=0.150000000000
-[cvpcb]
-version=1
-NetIExt=net
-[eeschema]
-version=1
-LibDir=../../../kicadSchematicLibrary
-[eeschema/libraries]
-LibName1=adc-dac
-LibName2=memory
-LibName3=xilinx
-LibName4=microcontrollers
-LibName5=dsp
-LibName6=microchip
-LibName7=analog_switches
-LibName8=motorola
-LibName9=texas
-LibName10=intel
-LibName11=audio
-LibName12=interface
-LibName13=digital-audio
-LibName14=philips
-LibName15=display
-LibName16=cypress
-LibName17=siliconi
-LibName18=opto
-LibName19=atmel
-LibName20=contrib
-LibName21=power
-LibName22=device
-LibName23=transistors
-LibName24=conn
-LibName25=linear
-LibName26=regul
-LibName27=74xx
-LibName28=cmos4000
-LibName29=eSim_Analog
-LibName30=eSim_Devices
-LibName31=eSim_Digital
-LibName32=eSim_Hybrid
-LibName33=eSim_Miscellaneous
-LibName34=eSim_Power
-LibName35=eSim_Sources
-LibName36=eSim_User
-LibName37=eSim_Plot
-LibName38=eSim_PSpice
-LibName39=/home/mallikarjuna/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_Subckt
-
diff --git a/src/SubcircuitLibrary/5_nor/5_nor.sch b/src/SubcircuitLibrary/5_nor/5_nor.sch
deleted file mode 100644
index 6bb6fcb8..00000000
--- a/src/SubcircuitLibrary/5_nor/5_nor.sch
+++ /dev/null
@@ -1,275 +0,0 @@
-EESchema Schematic File Version 2
-LIBS:adc-dac
-LIBS:memory
-LIBS:xilinx
-LIBS:microcontrollers
-LIBS:dsp
-LIBS:microchip
-LIBS:analog_switches
-LIBS:motorola
-LIBS:texas
-LIBS:intel
-LIBS:audio
-LIBS:interface
-LIBS:digital-audio
-LIBS:philips
-LIBS:display
-LIBS:cypress
-LIBS:siliconi
-LIBS:opto
-LIBS:atmel
-LIBS:contrib
-LIBS:power
-LIBS:device
-LIBS:transistors
-LIBS:conn
-LIBS:linear
-LIBS:regul
-LIBS:74xx
-LIBS:cmos4000
-LIBS:eSim_Analog
-LIBS:eSim_Devices
-LIBS:eSim_Digital
-LIBS:eSim_Hybrid
-LIBS:eSim_Miscellaneous
-LIBS:eSim_Power
-LIBS:eSim_Sources
-LIBS:eSim_User
-LIBS:eSim_Plot
-LIBS:eSim_PSpice
-LIBS:eSim_Subckt
-LIBS:c_gate-cache
-EELAYER 25 0
-EELAYER END
-$Descr A4 11693 8268
-encoding utf-8
-Sheet 1 1
-Title ""
-Date ""
-Rev ""
-Comp ""
-Comment1 ""
-Comment2 ""
-Comment3 ""
-Comment4 ""
-$EndDescr
-$Comp
-L d_and U8
-U 1 1 5D126275
-P 5600 3300
-F 0 "U8" H 5600 3300 60  0000 C CNN
-F 1 "d_and" H 5650 3400 60  0000 C CNN
-F 2 "" H 5600 3300 60  0000 C CNN
-F 3 "" H 5600 3300 60  0000 C CNN
-	1    5600 3300
-	1    0    0    -1  
-$EndComp
-Wire Wire Line
-	5150 3200 5150 2850
-Wire Wire Line
-	4150 2650 4150 2350
-Wire Wire Line
-	4150 2350 3600 2350
-Wire Wire Line
-	4150 2750 4050 2750
-Wire Wire Line
-	4050 2750 4050 2550
-Wire Wire Line
-	4050 2550 3600 2550
-Wire Wire Line
-	4150 2850 3700 2850
-Wire Wire Line
-	3700 2850 3700 2750
-Wire Wire Line
-	3700 2750 3600 2750
-Wire Wire Line
-	4150 2950 3600 2950
-Wire Wire Line
-	4150 3050 4150 3150
-Wire Wire Line
-	4150 3150 3600 3150
-Wire Wire Line
-	5150 3300 3600 3300
-$Comp
-L d_inverter U2
-U 1 1 5D126276
-P 3300 2350
-F 0 "U2" H 3300 2250 60  0000 C CNN
-F 1 "d_inverter" H 3300 2500 60  0000 C CNN
-F 2 "" H 3350 2300 60  0000 C CNN
-F 3 "" H 3350 2300 60  0000 C CNN
-	1    3300 2350
-	1    0    0    -1  
-$EndComp
-$Comp
-L d_inverter U3
-U 1 1 5D126277
-P 3300 2550
-F 0 "U3" H 3300 2450 60  0000 C CNN
-F 1 "d_inverter" H 3300 2700 60  0000 C CNN
-F 2 "" H 3350 2500 60  0000 C CNN
-F 3 "" H 3350 2500 60  0000 C CNN
-	1    3300 2550
-	1    0    0    -1  
-$EndComp
-$Comp
-L d_inverter U4
-U 1 1 5D126278
-P 3300 2750
-F 0 "U4" H 3300 2650 60  0000 C CNN
-F 1 "d_inverter" H 3300 2900 60  0000 C CNN
-F 2 "" H 3350 2700 60  0000 C CNN
-F 3 "" H 3350 2700 60  0000 C CNN
-	1    3300 2750
-	1    0    0    -1  
-$EndComp
-$Comp
-L d_inverter U5
-U 1 1 5D126279
-P 3300 2950
-F 0 "U5" H 3300 2850 60  0000 C CNN
-F 1 "d_inverter" H 3300 3100 60  0000 C CNN
-F 2 "" H 3350 2900 60  0000 C CNN
-F 3 "" H 3350 2900 60  0000 C CNN
-	1    3300 2950
-	1    0    0    -1  
-$EndComp
-$Comp
-L d_inverter U6
-U 1 1 5D12627A
-P 3300 3150
-F 0 "U6" H 3300 3050 60  0000 C CNN
-F 1 "d_inverter" H 3300 3300 60  0000 C CNN
-F 2 "" H 3350 3100 60  0000 C CNN
-F 3 "" H 3350 3100 60  0000 C CNN
-	1    3300 3150
-	1    0    0    -1  
-$EndComp
-$Comp
-L d_inverter U7
-U 1 1 5D12627B
-P 3300 3300
-F 0 "U7" H 3300 3200 60  0000 C CNN
-F 1 "d_inverter" H 3300 3450 60  0000 C CNN
-F 2 "" H 3350 3250 60  0000 C CNN
-F 3 "" H 3350 3250 60  0000 C CNN
-	1    3300 3300
-	1    0    0    -1  
-$EndComp
-Wire Wire Line
-	3000 2350 2000 2350
-Wire Wire Line
-	3000 2550 2000 2550
-Wire Wire Line
-	3000 2750 2050 2750
-Wire Wire Line
-	3000 2950 2050 2950
-Wire Wire Line
-	3000 3150 2050 3150
-Wire Wire Line
-	3000 3300 2050 3300
-Wire Wire Line
-	6050 3250 6950 3250
-$Comp
-L PORT U1
-U 1 1 5D12627C
-P 1750 2350
-F 0 "U1" H 1800 2450 30  0000 C CNN
-F 1 "PORT" H 1750 2350 30  0000 C CNN
-F 2 "" H 1750 2350 60  0000 C CNN
-F 3 "" H 1750 2350 60  0000 C CNN
-	1    1750 2350
-	1    0    0    -1  
-$EndComp
-$Comp
-L PORT U1
-U 2 1 5D12627D
-P 1750 2550
-F 0 "U1" H 1800 2650 30  0000 C CNN
-F 1 "PORT" H 1750 2550 30  0000 C CNN
-F 2 "" H 1750 2550 60  0000 C CNN
-F 3 "" H 1750 2550 60  0000 C CNN
-	2    1750 2550
-	1    0    0    -1  
-$EndComp
-$Comp
-L PORT U1
-U 3 1 5D12627E
-P 1800 2750
-F 0 "U1" H 1850 2850 30  0000 C CNN
-F 1 "PORT" H 1800 2750 30  0000 C CNN
-F 2 "" H 1800 2750 60  0000 C CNN
-F 3 "" H 1800 2750 60  0000 C CNN
-	3    1800 2750
-	1    0    0    -1  
-$EndComp
-$Comp
-L PORT U1
-U 4 1 5D12627F
-P 1800 2950
-F 0 "U1" H 1850 3050 30  0000 C CNN
-F 1 "PORT" H 1800 2950 30  0000 C CNN
-F 2 "" H 1800 2950 60  0000 C CNN
-F 3 "" H 1800 2950 60  0000 C CNN
-	4    1800 2950
-	1    0    0    -1  
-$EndComp
-$Comp
-L PORT U1
-U 5 1 5D126280
-P 1800 3150
-F 0 "U1" H 1850 3250 30  0000 C CNN
-F 1 "PORT" H 1800 3150 30  0000 C CNN
-F 2 "" H 1800 3150 60  0000 C CNN
-F 3 "" H 1800 3150 60  0000 C CNN
-	5    1800 3150
-	1    0    0    -1  
-$EndComp
-$Comp
-L PORT U1
-U 6 1 5D126281
-P 1800 3300
-F 0 "U1" H 1850 3400 30  0000 C CNN
-F 1 "PORT" H 1800 3300 30  0000 C CNN
-F 2 "" H 1800 3300 60  0000 C CNN
-F 3 "" H 1800 3300 60  0000 C CNN
-	6    1800 3300
-	1    0    0    -1  
-$EndComp
-$Comp
-L PORT U1
-U 7 1 5D126282
-P 7200 3250
-F 0 "U1" H 7250 3350 30  0000 C CNN
-F 1 "PORT" H 7200 3250 30  0000 C CNN
-F 2 "" H 7200 3250 60  0000 C CNN
-F 3 "" H 7200 3250 60  0000 C CNN
-	7    7200 3250
-	-1   0    0    1   
-$EndComp
-Text Notes 2400 2350 0    60   ~ 12
-in1
-Text Notes 2400 2550 0    60   ~ 12
-in2
-Text Notes 2400 2750 0    60   ~ 12
-in3
-Text Notes 2400 2950 0    60   ~ 12
-in4
-Text Notes 2400 3150 0    60   ~ 12
-in5
-Text Notes 2400 3300 0    60   ~ 12
-in6
-Text Notes 6350 3250 0    60   ~ 12
-out
-$Comp
-L 5_and X1
-U 1 1 5D1262D5
-P 4600 2850
-F 0 "X1" H 4650 2750 60  0000 C CNN
-F 1 "5_and" H 4700 3000 60  0000 C CNN
-F 2 "" H 4600 2850 60  0000 C CNN
-F 3 "" H 4600 2850 60  0000 C CNN
-	1    4600 2850
-	1    0    0    -1  
-$EndComp
-$EndSCHEMATC
diff --git a/src/SubcircuitLibrary/5_nor/5_nor.sub b/src/SubcircuitLibrary/5_nor/5_nor.sub
deleted file mode 100644
index dbcdb750..00000000
--- a/src/SubcircuitLibrary/5_nor/5_nor.sub
+++ /dev/null
@@ -1,36 +0,0 @@
-* Subcircuit 5_nor
-.subckt 5_nor net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ net-_u1-pad5_ net-_u1-pad6_ net-_u1-pad7_ 
-* /home/mallikarjuna/downloads/esim-1.1.2/src/subcircuitlibrary/5_nor/5_nor.cir
-.include 5_and.sub
-* u8  net-_u8-pad1_ net-_u7-pad2_ net-_u1-pad7_ d_and
-* u2  net-_u1-pad1_ net-_u2-pad2_ d_inverter
-* u3  net-_u1-pad2_ net-_u3-pad2_ d_inverter
-* u4  net-_u1-pad3_ net-_u4-pad2_ d_inverter
-* u5  net-_u1-pad4_ net-_u5-pad2_ d_inverter
-* u6  net-_u1-pad5_ net-_u6-pad2_ d_inverter
-* u7  net-_u1-pad6_ net-_u7-pad2_ d_inverter
-x1 net-_u2-pad2_ net-_u3-pad2_ net-_u4-pad2_ net-_u5-pad2_ net-_u6-pad2_ net-_u8-pad1_ 5_and
-a1 [net-_u8-pad1_ net-_u7-pad2_ ] net-_u1-pad7_ u8
-a2 net-_u1-pad1_ net-_u2-pad2_ u2
-a3 net-_u1-pad2_ net-_u3-pad2_ u3
-a4 net-_u1-pad3_ net-_u4-pad2_ u4
-a5 net-_u1-pad4_ net-_u5-pad2_ u5
-a6 net-_u1-pad5_ net-_u6-pad2_ u6
-a7 net-_u1-pad6_ net-_u7-pad2_ u7
-* Schematic Name: d_and, NgSpice Name: d_and
-.model u8 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )
-* Schematic Name: d_inverter, NgSpice Name: d_inverter
-.model u2 d_inverter(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )
-* Schematic Name: d_inverter, NgSpice Name: d_inverter
-.model u3 d_inverter(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )
-* Schematic Name: d_inverter, NgSpice Name: d_inverter
-.model u4 d_inverter(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )
-* Schematic Name: d_inverter, NgSpice Name: d_inverter
-.model u5 d_inverter(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )
-* Schematic Name: d_inverter, NgSpice Name: d_inverter
-.model u6 d_inverter(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )
-* Schematic Name: d_inverter, NgSpice Name: d_inverter
-.model u7 d_inverter(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )
-* Control Statements
-
-.ends 5_nor
\ No newline at end of file
diff --git a/src/SubcircuitLibrary/5_nor/5_nor_Previous_Values.xml b/src/SubcircuitLibrary/5_nor/5_nor_Previous_Values.xml
deleted file mode 100644
index 75f5258c..00000000
--- a/src/SubcircuitLibrary/5_nor/5_nor_Previous_Values.xml
+++ /dev/null
@@ -1 +0,0 @@
-<KicadtoNgspice><analysis><ac><field1 name="Lin">true</field1><field2 name="Dec">false</field2><field3 name="Oct">false</field3><field4 name="Start Frequency" /><field5 name="Stop Frequency" /><field6 name="No. of points" /><field7 name="Start Fre Combo">Hz</field7><field8 name="Stop Fre Combo">Hz</field8></ac><dc><field1 name="Source 1" /><field2 name="Start" /><field3 name="Increment" /><field4 name="Stop" /><field5 name="Operating Point">0</field5><field6 name="Start Combo">Volts or Amperes</field6><field7 name="Increment Combo">Volts or Amperes</field7><field8 name="Stop Combo">Volts or Amperes</field8><field9 name="Source 2" /><field10 name="Start" /><field11 name="Increment" /><field12 name="Stop" /><field13 name="Start Combo">Volts or Amperes</field13><field14 name="Increment Combo">Volts or Amperes</field14><field15 name="Stop Combo">Volts or Amperes</field15></dc><tran><field1 name="Start Time" /><field2 name="Step Time" /><field3 name="Stop Time" /><field4 name="Start Combo">Sec</field4><field5 name="Step Combo">Sec</field5><field6 name="Stop Combo">Sec</field6></tran></analysis><source /><model><u8 name="type">d_and<field1 name="Enter Fall Delay (default=1.0e-9)" /><field2 name="Enter Input Load (default=1.0e-12)" /><field3 name="Enter Rise Delay (default=1.0e-9)" /></u8><u2 name="type">d_inverter<field4 name="Enter Fall Delay (default=1.0e-9)" /><field5 name="Enter Input Load (default=1.0e-12)" /><field6 name="Enter Rise Delay (default=1.0e-9)" /></u2><u3 name="type">d_inverter<field7 name="Enter Fall Delay (default=1.0e-9)" /><field8 name="Enter Input Load (default=1.0e-12)" /><field9 name="Enter Rise Delay (default=1.0e-9)" /></u3><u4 name="type">d_inverter<field10 name="Enter Fall Delay (default=1.0e-9)" /><field11 name="Enter Input Load (default=1.0e-12)" /><field12 name="Enter Rise Delay (default=1.0e-9)" /></u4><u5 name="type">d_inverter<field13 name="Enter Fall Delay (default=1.0e-9)" /><field14 name="Enter Input Load (default=1.0e-12)" /><field15 name="Enter Rise Delay (default=1.0e-9)" /></u5><u6 name="type">d_inverter<field16 name="Enter Fall Delay (default=1.0e-9)" /><field17 name="Enter Input Load (default=1.0e-12)" /><field18 name="Enter Rise Delay (default=1.0e-9)" /></u6><u7 name="type">d_inverter<field19 name="Enter Fall Delay (default=1.0e-9)" /><field20 name="Enter Input Load (default=1.0e-12)" /><field21 name="Enter Rise Delay (default=1.0e-9)" /></u7></model><devicemodel /><subcircuit><x1><field>/home/mallikarjuna/Downloads/eSim-1.1.2/src/SubcircuitLibrary/5_and</field></x1></subcircuit></KicadtoNgspice>
\ No newline at end of file
diff --git a/src/SubcircuitLibrary/5bit-Ripple_carry_adder/5bit-Ripple_carry_adder-cache.lib b/src/SubcircuitLibrary/5bit-Ripple_carry_adder/5bit-Ripple_carry_adder-cache.lib
deleted file mode 100644
index b75ae867..00000000
--- a/src/SubcircuitLibrary/5bit-Ripple_carry_adder/5bit-Ripple_carry_adder-cache.lib
+++ /dev/null
@@ -1,61 +0,0 @@
-EESchema-LIBRARY Version 2.3
-#encoding utf-8
-#
-# Full-Adder
-#
-DEF Full-Adder X 0 40 Y Y 1 F N
-F0 "X" 0 0 60 H V C CNN
-F1 "Full-Adder" 0 0 60 H V C CNN
-F2 "" 0 0 60 H V C CNN
-F3 "" 0 0 60 H V C CNN
-DRAW
-S -300 200 300 -200 0 1 0 N
-X A 1 -500 150 200 R 50 50 1 1 I
-X B 2 -500 0 200 R 50 50 1 1 I
-X Cin 3 -500 -150 200 R 50 50 1 1 I
-X Out 4 500 100 200 L 50 50 1 1 I
-X Cout 5 500 -100 200 L 50 50 1 1 I
-ENDDRAW
-ENDDEF
-#
-# PORT
-#
-DEF PORT U 0 40 Y Y 26 F N
-F0 "U" 50 100 30 H V C CNN
-F1 "PORT" 0 0 30 H V C CNN
-F2 "" 0 0 60 H V C CNN
-F3 "" 0 0 60 H V C CNN
-DRAW
-A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0
-A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50
-S -100 50 100 -50 0 1 0 N
-X ~ 1 250 0 100 L 30 30 1 1 B
-X ~ 2 250 0 100 L 30 30 2 1 B
-X ~ 3 250 0 100 L 30 30 3 1 B
-X ~ 4 250 0 100 L 30 30 4 1 B
-X ~ 5 250 0 100 L 30 30 5 1 B
-X ~ 6 250 0 100 L 30 30 6 1 B
-X ~ 7 250 0 100 L 30 30 7 1 B
-X ~ 8 250 0 100 L 30 30 8 1 B
-X ~ 9 250 0 100 L 30 30 9 1 B
-X ~ 10 250 0 100 L 30 30 10 1 B
-X ~ 11 250 0 100 L 30 30 11 1 B
-X ~ 12 250 0 100 L 30 30 12 1 B
-X ~ 13 250 0 100 L 30 30 13 1 B
-X ~ 14 250 0 100 L 30 30 14 1 B
-X ~ 15 250 0 100 L 30 30 15 1 B
-X ~ 16 250 0 100 L 30 30 16 1 B
-X ~ 17 250 0 100 L 30 30 17 1 B
-X ~ 18 250 0 100 L 30 30 18 1 B
-X ~ 19 250 0 100 L 30 30 19 1 B
-X ~ 20 250 0 100 L 30 30 20 1 B
-X ~ 21 250 0 100 L 30 30 21 1 B
-X ~ 22 250 0 100 L 30 30 22 1 B
-X ~ 23 250 0 100 L 30 30 23 1 B
-X ~ 24 250 0 100 L 30 30 24 1 B
-X ~ 25 250 0 100 L 30 30 25 1 B
-X ~ 26 250 0 100 L 30 30 26 1 B
-ENDDRAW
-ENDDEF
-#
-#End Library
diff --git a/src/SubcircuitLibrary/5bit-Ripple_carry_adder/5bit-Ripple_carry_adder.cir b/src/SubcircuitLibrary/5bit-Ripple_carry_adder/5bit-Ripple_carry_adder.cir
deleted file mode 100644
index 84b7b723..00000000
--- a/src/SubcircuitLibrary/5bit-Ripple_carry_adder/5bit-Ripple_carry_adder.cir
+++ /dev/null
@@ -1,16 +0,0 @@
-* C:\esim\eSim\src\SubcircuitLibrary\5bit-Ripple_carry_adder\5bit-Ripple_carry_adder.cir

-

-* EESchema Netlist Version 1.1 (Spice format) creation date: 03/23/19 02:16:47

-

-* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N

-* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0

-

-* Sheet Name: /

-X4  Net-_U1-Pad1_ Net-_U1-Pad2_ Net-_X4-Pad3_ Net-_U1-Pad4_ ? Full-Adder		

-X5  Net-_U1-Pad3_ Net-_U1-Pad5_ Net-_X5-Pad3_ Net-_U1-Pad7_ Net-_X4-Pad3_ Full-Adder		

-X6  Net-_U1-Pad6_ Net-_U1-Pad8_ Net-_X6-Pad3_ Net-_U1-Pad10_ Net-_X5-Pad3_ Full-Adder		

-X7  Net-_U1-Pad9_ Net-_U1-Pad11_ Net-_X7-Pad3_ Net-_U1-Pad13_ Net-_X6-Pad3_ Full-Adder		

-X8  Net-_U1-Pad12_ Net-_U1-Pad14_ Net-_U1-Pad15_ Net-_U1-Pad16_ Net-_X7-Pad3_ Full-Adder		

-U1  Net-_U1-Pad1_ Net-_U1-Pad2_ Net-_U1-Pad3_ Net-_U1-Pad4_ Net-_U1-Pad5_ Net-_U1-Pad6_ Net-_U1-Pad7_ Net-_U1-Pad8_ Net-_U1-Pad9_ Net-_U1-Pad10_ Net-_U1-Pad11_ Net-_U1-Pad12_ Net-_U1-Pad13_ Net-_U1-Pad14_ Net-_U1-Pad15_ Net-_U1-Pad16_ PORT		

-

-.end

diff --git a/src/SubcircuitLibrary/5bit-Ripple_carry_adder/5bit-Ripple_carry_adder.cir.out b/src/SubcircuitLibrary/5bit-Ripple_carry_adder/5bit-Ripple_carry_adder.cir.out
deleted file mode 100644
index dfda0a3b..00000000
--- a/src/SubcircuitLibrary/5bit-Ripple_carry_adder/5bit-Ripple_carry_adder.cir.out
+++ /dev/null
@@ -1,18 +0,0 @@
-* c:\esim\esim\src\subcircuitlibrary\5bit-ripple_carry_adder\5bit-ripple_carry_adder.cir

-

-.include Full-Adder.sub

-x4 net-_u1-pad1_ net-_u1-pad2_ net-_x4-pad3_ net-_u1-pad4_ ? Full-Adder

-x5 net-_u1-pad3_ net-_u1-pad5_ net-_x5-pad3_ net-_u1-pad7_ net-_x4-pad3_ Full-Adder

-x6 net-_u1-pad6_ net-_u1-pad8_ net-_x6-pad3_ net-_u1-pad10_ net-_x5-pad3_ Full-Adder

-x7 net-_u1-pad9_ net-_u1-pad11_ net-_x7-pad3_ net-_u1-pad13_ net-_x6-pad3_ Full-Adder

-x8 net-_u1-pad12_ net-_u1-pad14_ net-_u1-pad15_ net-_u1-pad16_ net-_x7-pad3_ Full-Adder

-* u1  net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ net-_u1-pad5_ net-_u1-pad6_ net-_u1-pad7_ net-_u1-pad8_ net-_u1-pad9_ net-_u1-pad10_ net-_u1-pad11_ net-_u1-pad12_ net-_u1-pad13_ net-_u1-pad14_ net-_u1-pad15_ net-_u1-pad16_ port

-.ac lin 0 0Hz 0Hz

-

-* Control Statements 

-.control

-run

-print allv > plot_data_v.txt

-print alli > plot_data_i.txt

-.endc

-.end

diff --git a/src/SubcircuitLibrary/5bit-Ripple_carry_adder/5bit-Ripple_carry_adder.pro b/src/SubcircuitLibrary/5bit-Ripple_carry_adder/5bit-Ripple_carry_adder.pro
deleted file mode 100644
index d3bfc6c4..00000000
--- a/src/SubcircuitLibrary/5bit-Ripple_carry_adder/5bit-Ripple_carry_adder.pro
+++ /dev/null
@@ -1,44 +0,0 @@
-update=Sat Jun 22 12:25:13 2019
-version=1
-last_client=eeschema
-[general]
-version=1
-RootSch=
-BoardNm=
-[pcbnew]
-version=1
-LastNetListRead=
-UseCmpFile=1
-PadDrill=0.600000000000
-PadDrillOvalY=0.600000000000
-PadSizeH=1.500000000000
-PadSizeV=1.500000000000
-PcbTextSizeV=1.500000000000
-PcbTextSizeH=1.500000000000
-PcbTextThickness=0.300000000000
-ModuleTextSizeV=1.000000000000
-ModuleTextSizeH=1.000000000000
-ModuleTextSizeThickness=0.150000000000
-SolderMaskClearance=0.000000000000
-SolderMaskMinWidth=0.000000000000
-DrawSegmentWidth=0.200000000000
-BoardOutlineThickness=0.100000000000
-ModuleOutlineThickness=0.150000000000
-[cvpcb]
-version=1
-NetIExt=net
-[eeschema]
-version=1
-LibDir=../../../eSim-1.1.2/kicadSchematicLibrary
-[eeschema/libraries]
-LibName1=9bit-BoothMultiplier-cache
-LibName2=eSim_Analog
-LibName3=eSim_Devices
-LibName4=eSim_Digital
-LibName5=eSim_Hybrid
-LibName6=eSim_Miscellaneous
-LibName7=eSim_Plot
-LibName8=eSim_Power
-LibName9=eSim_Sources
-LibName10=eSim_Subckt
-LibName11=eSim_User
diff --git a/src/SubcircuitLibrary/5bit-Ripple_carry_adder/5bit-Ripple_carry_adder.sch b/src/SubcircuitLibrary/5bit-Ripple_carry_adder/5bit-Ripple_carry_adder.sch
deleted file mode 100644
index dd2e9165..00000000
--- a/src/SubcircuitLibrary/5bit-Ripple_carry_adder/5bit-Ripple_carry_adder.sch
+++ /dev/null
@@ -1,386 +0,0 @@
-EESchema Schematic File Version 2
-LIBS:eSim_Analog
-LIBS:eSim_Devices
-LIBS:eSim_Digital
-LIBS:eSim_Hybrid
-LIBS:eSim_Miscellaneous
-LIBS:eSim_Plot
-LIBS:eSim_Power
-LIBS:eSim_Sources
-LIBS:eSim_Subckt
-LIBS:eSim_User
-LIBS:5bit-Ripple_carry_adder-cache
-EELAYER 25 0
-EELAYER END
-$Descr A4 11693 8268
-encoding utf-8
-Sheet 1 1
-Title ""
-Date ""
-Rev ""
-Comp ""
-Comment1 ""
-Comment2 ""
-Comment3 ""
-Comment4 ""
-$EndDescr
-$Comp
-L Full-Adder X4
-U 1 1 5C93C7FA
-P 3000 3550
-F 0 "X4" H 3000 3550 60  0000 C CNN
-F 1 "Full-Adder" H 3000 3550 60  0000 C CNN
-F 2 "" H 3000 3550 60  0000 C CNN
-F 3 "" H 3000 3550 60  0000 C CNN
-	1    3000 3550
-	1    0    0    -1  
-$EndComp
-$Comp
-L Full-Adder X5
-U 1 1 5C93C84A
-P 4350 3550
-F 0 "X5" H 4350 3550 60  0000 C CNN
-F 1 "Full-Adder" H 4350 3550 60  0000 C CNN
-F 2 "" H 4350 3550 60  0000 C CNN
-F 3 "" H 4350 3550 60  0000 C CNN
-	1    4350 3550
-	1    0    0    -1  
-$EndComp
-$Comp
-L Full-Adder X6
-U 1 1 5C93C897
-P 5700 3550
-F 0 "X6" H 5700 3550 60  0000 C CNN
-F 1 "Full-Adder" H 5700 3550 60  0000 C CNN
-F 2 "" H 5700 3550 60  0000 C CNN
-F 3 "" H 5700 3550 60  0000 C CNN
-	1    5700 3550
-	1    0    0    -1  
-$EndComp
-$Comp
-L Full-Adder X7
-U 1 1 5C93C961
-P 7000 3550
-F 0 "X7" H 7000 3550 60  0000 C CNN
-F 1 "Full-Adder" H 7000 3550 60  0000 C CNN
-F 2 "" H 7000 3550 60  0000 C CNN
-F 3 "" H 7000 3550 60  0000 C CNN
-	1    7000 3550
-	1    0    0    -1  
-$EndComp
-$Comp
-L Full-Adder X8
-U 1 1 5C93C9A8
-P 8250 3550
-F 0 "X8" H 8250 3550 60  0000 C CNN
-F 1 "Full-Adder" H 8250 3550 60  0000 C CNN
-F 2 "" H 8250 3550 60  0000 C CNN
-F 3 "" H 8250 3550 60  0000 C CNN
-	1    8250 3550
-	1    0    0    -1  
-$EndComp
-Wire Wire Line
-	3500 3450 3650 3450
-Wire Wire Line
-	3650 3450 3650 4800
-Wire Wire Line
-	2500 3700 2500 3850
-Wire Wire Line
-	2500 3850 4900 3850
-Wire Wire Line
-	4900 3850 4900 3650
-Wire Wire Line
-	4900 3650 4850 3650
-Wire Wire Line
-	4850 3450 4950 3450
-Wire Wire Line
-	4950 3450 4950 4800
-Wire Wire Line
-	3850 3700 3850 3900
-Wire Wire Line
-	3850 3900 6250 3900
-Wire Wire Line
-	6250 3900 6250 3650
-Wire Wire Line
-	6250 3650 6200 3650
-Wire Wire Line
-	5200 3700 5200 3850
-Wire Wire Line
-	5200 3850 7550 3850
-Wire Wire Line
-	7550 3850 7550 3650
-Wire Wire Line
-	7550 3650 7500 3650
-Wire Wire Line
-	6500 3900 8750 3900
-Wire Wire Line
-	8750 3900 8750 3650
-Wire Wire Line
-	8750 3450 8800 3450
-Wire Wire Line
-	8800 3450 8800 4950
-Wire Wire Line
-	7500 3450 7600 3450
-Wire Wire Line
-	7600 3450 7600 4850
-Wire Wire Line
-	6200 3450 6300 3450
-Wire Wire Line
-	6300 3450 6300 4800
-Wire Wire Line
-	7750 3700 7750 3850
-Wire Wire Line
-	7750 3850 8000 3850
-Wire Wire Line
-	8000 3850 8000 4900
-Wire Wire Line
-	2350 3400 2500 3400
-Wire Wire Line
-	2350 2200 2350 3400
-Wire Wire Line
-	2450 3550 2500 3550
-Wire Wire Line
-	2450 2550 2450 3550
-Wire Wire Line
-	3650 3400 3850 3400
-Wire Wire Line
-	3650 2200 3650 3400
-Wire Wire Line
-	7600 3400 7750 3400
-Wire Wire Line
-	7600 2200 7600 3400
-Wire Wire Line
-	6300 3400 6500 3400
-Wire Wire Line
-	6300 2200 6300 3400
-Wire Wire Line
-	6400 3550 6500 3550
-Wire Wire Line
-	6400 2550 6400 3550
-Wire Wire Line
-	4950 3400 5200 3400
-Wire Wire Line
-	4950 2200 4950 3400
-Wire Wire Line
-	5050 3550 5200 3550
-Wire Wire Line
-	5050 2500 5050 3550
-Text Notes 7550 2750 1    60   ~ 0
-A0
-Text Notes 6200 2750 1    60   ~ 0
-A1
-Text Notes 4900 2750 1    60   ~ 0
-A2
-Text Notes 3600 2750 1    60   ~ 0
-A3
-Text Notes 2300 2750 1    60   ~ 0
-A4
-Text Notes 7800 2900 3    60   ~ 0
-B0
-Text Notes 6500 3050 1    60   ~ 0
-B1
-Text Notes 5150 3050 1    60   ~ 0
-B2
-Text Notes 3850 3050 1    60   ~ 0
-B3
-Text Notes 2550 3050 1    60   ~ 0
-B4
-Text Notes 8750 4700 1    60   ~ 0
-O0
-Text Notes 7550 4700 1    60   ~ 0
-O1
-Text Notes 6250 4650 1    60   ~ 0
-O2
-Text Notes 4900 4650 1    60   ~ 0
-O3
-Text Notes 3600 4650 1    60   ~ 0
-O4
-Wire Wire Line
-	7700 2550 7700 3550
-Wire Wire Line
-	7700 3550 7750 3550
-Wire Wire Line
-	3850 3550 3750 3550
-Wire Wire Line
-	3750 3550 3750 2550
-Wire Wire Line
-	6500 3900 6500 3700
-$Comp
-L PORT U1
-U 12 1 5C95CA38
-P 7600 1950
-F 0 "U1" H 7650 2050 30  0000 C CNN
-F 1 "PORT" H 7600 1950 30  0000 C CNN
-F 2 "" H 7600 1950 60  0000 C CNN
-F 3 "" H 7600 1950 60  0000 C CNN
-	12   7600 1950
-	0    1    1    0   
-$EndComp
-$Comp
-L PORT U1
-U 9 1 5C95CAA1
-P 6300 1950
-F 0 "U1" H 6350 2050 30  0000 C CNN
-F 1 "PORT" H 6300 1950 30  0000 C CNN
-F 2 "" H 6300 1950 60  0000 C CNN
-F 3 "" H 6300 1950 60  0000 C CNN
-	9    6300 1950
-	0    1    1    0   
-$EndComp
-$Comp
-L PORT U1
-U 6 1 5C95CAD4
-P 4950 1950
-F 0 "U1" H 5000 2050 30  0000 C CNN
-F 1 "PORT" H 4950 1950 30  0000 C CNN
-F 2 "" H 4950 1950 60  0000 C CNN
-F 3 "" H 4950 1950 60  0000 C CNN
-	6    4950 1950
-	0    1    1    0   
-$EndComp
-$Comp
-L PORT U1
-U 3 1 5C95CB01
-P 3650 1950
-F 0 "U1" H 3700 2050 30  0000 C CNN
-F 1 "PORT" H 3650 1950 30  0000 C CNN
-F 2 "" H 3650 1950 60  0000 C CNN
-F 3 "" H 3650 1950 60  0000 C CNN
-	3    3650 1950
-	0    1    1    0   
-$EndComp
-$Comp
-L PORT U1
-U 1 1 5C95CB34
-P 2350 1950
-F 0 "U1" H 2400 2050 30  0000 C CNN
-F 1 "PORT" H 2350 1950 30  0000 C CNN
-F 2 "" H 2350 1950 60  0000 C CNN
-F 3 "" H 2350 1950 60  0000 C CNN
-	1    2350 1950
-	0    1    1    0   
-$EndComp
-$Comp
-L PORT U1
-U 14 1 5C95CB65
-P 7700 2300
-F 0 "U1" H 7750 2400 30  0000 C CNN
-F 1 "PORT" H 7700 2300 30  0000 C CNN
-F 2 "" H 7700 2300 60  0000 C CNN
-F 3 "" H 7700 2300 60  0000 C CNN
-	14   7700 2300
-	0    1    1    0   
-$EndComp
-$Comp
-L PORT U1
-U 11 1 5C95CBEC
-P 6400 2300
-F 0 "U1" H 6450 2400 30  0000 C CNN
-F 1 "PORT" H 6400 2300 30  0000 C CNN
-F 2 "" H 6400 2300 60  0000 C CNN
-F 3 "" H 6400 2300 60  0000 C CNN
-	11   6400 2300
-	0    1    1    0   
-$EndComp
-$Comp
-L PORT U1
-U 8 1 5C95CC27
-P 5050 2250
-F 0 "U1" H 5100 2350 30  0000 C CNN
-F 1 "PORT" H 5050 2250 30  0000 C CNN
-F 2 "" H 5050 2250 60  0000 C CNN
-F 3 "" H 5050 2250 60  0000 C CNN
-	8    5050 2250
-	0    1    1    0   
-$EndComp
-$Comp
-L PORT U1
-U 5 1 5C95CC5E
-P 3750 2300
-F 0 "U1" H 3800 2400 30  0000 C CNN
-F 1 "PORT" H 3750 2300 30  0000 C CNN
-F 2 "" H 3750 2300 60  0000 C CNN
-F 3 "" H 3750 2300 60  0000 C CNN
-	5    3750 2300
-	0    1    1    0   
-$EndComp
-$Comp
-L PORT U1
-U 2 1 5C95CC9F
-P 2450 2300
-F 0 "U1" H 2500 2400 30  0000 C CNN
-F 1 "PORT" H 2450 2300 30  0000 C CNN
-F 2 "" H 2450 2300 60  0000 C CNN
-F 3 "" H 2450 2300 60  0000 C CNN
-	2    2450 2300
-	0    1    1    0   
-$EndComp
-$Comp
-L PORT U1
-U 15 1 5C95D6FB
-P 8000 5150
-F 0 "U1" H 8050 5250 30  0000 C CNN
-F 1 "PORT" H 8000 5150 30  0000 C CNN
-F 2 "" H 8000 5150 60  0000 C CNN
-F 3 "" H 8000 5150 60  0000 C CNN
-	15   8000 5150
-	0    -1   -1   0   
-$EndComp
-$Comp
-L PORT U1
-U 16 1 5C95D772
-P 8800 5200
-F 0 "U1" H 8850 5300 30  0000 C CNN
-F 1 "PORT" H 8800 5200 30  0000 C CNN
-F 2 "" H 8800 5200 60  0000 C CNN
-F 3 "" H 8800 5200 60  0000 C CNN
-	16   8800 5200
-	0    -1   -1   0   
-$EndComp
-$Comp
-L PORT U1
-U 13 1 5C95D7ED
-P 7600 5100
-F 0 "U1" H 7650 5200 30  0000 C CNN
-F 1 "PORT" H 7600 5100 30  0000 C CNN
-F 2 "" H 7600 5100 60  0000 C CNN
-F 3 "" H 7600 5100 60  0000 C CNN
-	13   7600 5100
-	0    -1   -1   0   
-$EndComp
-$Comp
-L PORT U1
-U 10 1 5C95D844
-P 6300 5050
-F 0 "U1" H 6350 5150 30  0000 C CNN
-F 1 "PORT" H 6300 5050 30  0000 C CNN
-F 2 "" H 6300 5050 60  0000 C CNN
-F 3 "" H 6300 5050 60  0000 C CNN
-	10   6300 5050
-	0    -1   -1   0   
-$EndComp
-$Comp
-L PORT U1
-U 7 1 5C95D899
-P 4950 5050
-F 0 "U1" H 5000 5150 30  0000 C CNN
-F 1 "PORT" H 4950 5050 30  0000 C CNN
-F 2 "" H 4950 5050 60  0000 C CNN
-F 3 "" H 4950 5050 60  0000 C CNN
-	7    4950 5050
-	0    -1   -1   0   
-$EndComp
-$Comp
-L PORT U1
-U 4 1 5C95D8EA
-P 3650 5050
-F 0 "U1" H 3700 5150 30  0000 C CNN
-F 1 "PORT" H 3650 5050 30  0000 C CNN
-F 2 "" H 3650 5050 60  0000 C CNN
-F 3 "" H 3650 5050 60  0000 C CNN
-	4    3650 5050
-	0    -1   -1   0   
-$EndComp
-Text Notes 7950 4700 1    60   ~ 0
-Cin
-$EndSCHEMATC
diff --git a/src/SubcircuitLibrary/5bit-Ripple_carry_adder/5bit-Ripple_carry_adder.sub b/src/SubcircuitLibrary/5bit-Ripple_carry_adder/5bit-Ripple_carry_adder.sub
deleted file mode 100644
index 675975d9..00000000
--- a/src/SubcircuitLibrary/5bit-Ripple_carry_adder/5bit-Ripple_carry_adder.sub
+++ /dev/null
@@ -1,12 +0,0 @@
-* Subcircuit 5bit-Ripple_carry_adder

-.subckt 5bit-Ripple_carry_adder net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ net-_u1-pad5_ net-_u1-pad6_ net-_u1-pad7_ net-_u1-pad8_ net-_u1-pad9_ net-_u1-pad10_ net-_u1-pad11_ net-_u1-pad12_ net-_u1-pad13_ net-_u1-pad14_ net-_u1-pad15_ net-_u1-pad16_ 

-* c:\esim\esim\src\subcircuitlibrary\5bit-ripple_carry_adder\5bit-ripple_carry_adder.cir

-.include Full-Adder.sub

-x4 net-_u1-pad1_ net-_u1-pad2_ net-_x4-pad3_ net-_u1-pad4_ ? Full-Adder

-x5 net-_u1-pad3_ net-_u1-pad5_ net-_x5-pad3_ net-_u1-pad7_ net-_x4-pad3_ Full-Adder

-x6 net-_u1-pad6_ net-_u1-pad8_ net-_x6-pad3_ net-_u1-pad10_ net-_x5-pad3_ Full-Adder

-x7 net-_u1-pad9_ net-_u1-pad11_ net-_x7-pad3_ net-_u1-pad13_ net-_x6-pad3_ Full-Adder

-x8 net-_u1-pad12_ net-_u1-pad14_ net-_u1-pad15_ net-_u1-pad16_ net-_x7-pad3_ Full-Adder

-* Control Statements

-

-.ends 5bit-Ripple_carry_adder
\ No newline at end of file
diff --git a/src/SubcircuitLibrary/5bit-Ripple_carry_adder/5bit-Ripple_carry_adder_Previous_Values.xml b/src/SubcircuitLibrary/5bit-Ripple_carry_adder/5bit-Ripple_carry_adder_Previous_Values.xml
deleted file mode 100644
index 8fbbb417..00000000
--- a/src/SubcircuitLibrary/5bit-Ripple_carry_adder/5bit-Ripple_carry_adder_Previous_Values.xml
+++ /dev/null
@@ -1 +0,0 @@
-<KicadtoNgspice><analysis><ac><field1 name="Lin">true</field1><field2 name="Dec">false</field2><field3 name="Oct">false</field3><field4 name="Start Frequency" /><field5 name="Stop Frequency" /><field6 name="No. of points" /><field7 name="Start Fre Combo">Hz</field7><field8 name="Stop Fre Combo">Hz</field8></ac><dc><field1 name="Source 1" /><field2 name="Start" /><field3 name="Increment" /><field4 name="Stop" /><field5 name="Operating Point">0</field5><field6 name="Start Combo">Volts or Amperes</field6><field7 name="Increment Combo">Volts or Amperes</field7><field8 name="Stop Combo">Volts or Amperes</field8><field9 name="Source 2" /><field10 name="Start" /><field11 name="Increment" /><field12 name="Stop" /><field13 name="Start Combo">Volts or Amperes</field13><field14 name="Increment Combo">Volts or Amperes</field14><field15 name="Stop Combo">Volts or Amperes</field15></dc><tran><field1 name="Start Time" /><field2 name="Step Time" /><field3 name="Stop Time" /><field4 name="Start Combo">Sec</field4><field5 name="Step Combo">Sec</field5><field6 name="Stop Combo">Sec</field6></tran></analysis><source /><model /><devicemodel /><subcircuit><x8><field>C:\esim\eSim\src\SubcircuitLibrary\Full-Adder</field></x8><x6><field>C:\esim\eSim\src\SubcircuitLibrary\Full-Adder</field></x6><x7><field>C:\esim\eSim\src\SubcircuitLibrary\Full-Adder</field></x7><x4><field>C:\esim\eSim\src\SubcircuitLibrary\Full-Adder</field></x4><x5><field>C:\esim\eSim\src\SubcircuitLibrary\Full-Adder</field></x5></subcircuit></KicadtoNgspice>
\ No newline at end of file
diff --git a/src/SubcircuitLibrary/5bit-Ripple_carry_adder/Full-Adder-cache.lib b/src/SubcircuitLibrary/5bit-Ripple_carry_adder/Full-Adder-cache.lib
deleted file mode 100644
index cba68b20..00000000
--- a/src/SubcircuitLibrary/5bit-Ripple_carry_adder/Full-Adder-cache.lib
+++ /dev/null
@@ -1,100 +0,0 @@
-EESchema-LIBRARY Version 2.3

-#encoding utf-8

-#

-# PORT

-#

-DEF PORT U 0 40 Y Y 26 F N

-F0 "U" 50 100 30 H V C CNN

-F1 "PORT" 0 0 30 H V C CNN

-F2 "" 0 0 60 H V C CNN

-F3 "" 0 0 60 H V C CNN

-DRAW

-A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0

-A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50

-S -100 50 100 -50 0 1 0 N

-X ~ 1 250 0 100 L 30 30 1 1 B

-X ~ 2 250 0 100 L 30 30 2 1 B

-X ~ 3 250 0 100 L 30 30 3 1 B

-X ~ 4 250 0 100 L 30 30 4 1 B

-X ~ 5 250 0 100 L 30 30 5 1 B

-X ~ 6 250 0 100 L 30 30 6 1 B

-X ~ 7 250 0 100 L 30 30 7 1 B

-X ~ 8 250 0 100 L 30 30 8 1 B

-X ~ 9 250 0 100 L 30 30 9 1 B

-X ~ 10 250 0 100 L 30 30 10 1 B

-X ~ 11 250 0 100 L 30 30 11 1 B

-X ~ 12 250 0 100 L 30 30 12 1 B

-X ~ 13 250 0 100 L 30 30 13 1 B

-X ~ 14 250 0 100 L 30 30 14 1 B

-X ~ 15 250 0 100 L 30 30 15 1 B

-X ~ 16 250 0 100 L 30 30 16 1 B

-X ~ 17 250 0 100 L 30 30 17 1 B

-X ~ 18 250 0 100 L 30 30 18 1 B

-X ~ 19 250 0 100 L 30 30 19 1 B

-X ~ 20 250 0 100 L 30 30 20 1 B

-X ~ 21 250 0 100 L 30 30 21 1 B

-X ~ 22 250 0 100 L 30 30 22 1 B

-X ~ 23 250 0 100 L 30 30 23 1 B

-X ~ 24 250 0 100 L 30 30 24 1 B

-X ~ 25 250 0 100 L 30 30 25 1 B

-X ~ 26 250 0 100 L 30 30 26 1 B

-ENDDRAW

-ENDDEF

-#

-# d_and

-#

-DEF d_and U 0 40 Y Y 1 F N

-F0 "U" 0 0 60 H V C CNN

-F1 "d_and" 50 100 60 H V C CNN

-F2 "" 0 0 60 H V C CNN

-F3 "" 0 0 60 H V C CNN

-DRAW

-A 149 50 100 -894 0 0 1 0 N 150 -50 250 50

-A 150 49 100 6 900 0 1 0 N 250 50 150 150

-P 4 0 1 0  150 -50  -250 -50  -250 150  150 150 N

-X IN1 1 -450 100 200 R 50 50 1 1 I

-X IN2 2 -450 0 200 R 50 50 1 1 I

-X OUT 3 450 50 200 L 50 50 1 1 O

-ENDDRAW

-ENDDEF

-#

-# d_or

-#

-DEF d_or U 0 40 Y Y 1 F N

-F0 "U" 0 0 60 H V C CNN

-F1 "d_or" 0 100 60 H V C CNN

-F2 "" 0 0 60 H V C CNN

-F3 "" 0 0 60 H V C CNN

-DRAW

-A -450 50 224 266 -266 0 1 0 N -250 150 -250 -50

-A -25 -124 325 574 323 0 1 0 N 150 150 250 50

-A 74 125 191 -665 -231 0 1 0 N 150 -50 250 50

-P 2 0 1 0  -250 -50  150 -50 N

-P 2 0 1 0  -250 150  150 150 N

-X IN1 1 -450 100 215 R 50 50 1 1 I

-X IN2 2 -450 0 215 R 50 50 1 1 I

-X OUT 3 450 50 200 L 50 50 1 1 O

-ENDDRAW

-ENDDEF

-#

-# d_xor

-#

-DEF d_xor U 0 40 Y Y 1 F N

-F0 "U" 0 0 60 H V C CNN

-F1 "d_xor" 50 100 47 H V C CNN

-F2 "" 0 0 60 H V C CNN

-F3 "" 0 0 60 H V C CNN

-DRAW

-A -450 50 224 266 -266 0 1 0 N -250 150 -250 -50

-A -350 50 180 -337 337 0 1 0 N -200 -50 -200 150

-A -25 -124 325 574 323 0 1 0 N 150 150 250 50

-A 74 125 191 -665 -231 0 1 0 N 150 -50 250 50

-P 2 0 1 0  150 -50  -200 -50 N

-P 2 0 1 0  150 150  -200 150 N

-X IN1 1 -450 100 215 R 50 43 1 1 I

-X IN2 2 -450 0 215 R 50 43 1 1 I

-X OUT 3 450 50 200 L 50 39 1 1 O

-ENDDRAW

-ENDDEF

-#

-#End Library

diff --git a/src/SubcircuitLibrary/5bit-Ripple_carry_adder/Full-Adder.cir b/src/SubcircuitLibrary/5bit-Ripple_carry_adder/Full-Adder.cir
deleted file mode 100644
index ea7aed36..00000000
--- a/src/SubcircuitLibrary/5bit-Ripple_carry_adder/Full-Adder.cir
+++ /dev/null
@@ -1,16 +0,0 @@
-* C:\esim\eSim\src\SubcircuitLibrary\Full-Adder\Full-Adder.cir

-

-* EESchema Netlist Version 1.1 (Spice format) creation date: 03/21/19 17:15:52

-

-* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N

-* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0

-

-* Sheet Name: /

-U1  Net-_U1-Pad1_ Net-_U1-Pad2_ Net-_U1-Pad3_ Net-_U1-Pad4_ Net-_U1-Pad5_ PORT		

-U2  Net-_U1-Pad1_ Net-_U1-Pad2_ Net-_U2-Pad3_ d_xor		

-U5  Net-_U2-Pad3_ Net-_U1-Pad3_ Net-_U1-Pad4_ d_xor		

-U4  Net-_U2-Pad3_ Net-_U1-Pad3_ Net-_U4-Pad3_ d_and		

-U3  Net-_U1-Pad1_ Net-_U1-Pad2_ Net-_U3-Pad3_ d_and		

-U6  Net-_U3-Pad3_ Net-_U4-Pad3_ Net-_U1-Pad5_ d_or		

-

-.end

diff --git a/src/SubcircuitLibrary/5bit-Ripple_carry_adder/Full-Adder.cir.out b/src/SubcircuitLibrary/5bit-Ripple_carry_adder/Full-Adder.cir.out
deleted file mode 100644
index 086d8b71..00000000
--- a/src/SubcircuitLibrary/5bit-Ripple_carry_adder/Full-Adder.cir.out
+++ /dev/null
@@ -1,32 +0,0 @@
-* c:\esim\esim\src\subcircuitlibrary\full-adder\full-adder.cir

-

-* u1  net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ net-_u1-pad5_ port

-* u2  net-_u1-pad1_ net-_u1-pad2_ net-_u2-pad3_ d_xor

-* u5  net-_u2-pad3_ net-_u1-pad3_ net-_u1-pad4_ d_xor

-* u4  net-_u2-pad3_ net-_u1-pad3_ net-_u4-pad3_ d_and

-* u3  net-_u1-pad1_ net-_u1-pad2_ net-_u3-pad3_ d_and

-* u6  net-_u3-pad3_ net-_u4-pad3_ net-_u1-pad5_ d_or

-a1 [net-_u1-pad1_ net-_u1-pad2_ ] net-_u2-pad3_ u2

-a2 [net-_u2-pad3_ net-_u1-pad3_ ] net-_u1-pad4_ u5

-a3 [net-_u2-pad3_ net-_u1-pad3_ ] net-_u4-pad3_ u4

-a4 [net-_u1-pad1_ net-_u1-pad2_ ] net-_u3-pad3_ u3

-a5 [net-_u3-pad3_ net-_u4-pad3_ ] net-_u1-pad5_ u6

-* Schematic Name: d_xor, NgSpice Name: d_xor

-.model u2 d_xor(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 

-* Schematic Name: d_xor, NgSpice Name: d_xor

-.model u5 d_xor(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 

-* Schematic Name: d_and, NgSpice Name: d_and

-.model u4 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 

-* Schematic Name: d_and, NgSpice Name: d_and

-.model u3 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 

-* Schematic Name: d_or, NgSpice Name: d_or

-.model u6 d_or(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 

-.ac lin 0 0Hz 0Hz

-

-* Control Statements 

-.control

-run

-print allv > plot_data_v.txt

-print alli > plot_data_i.txt

-.endc

-.end

diff --git a/src/SubcircuitLibrary/5bit-Ripple_carry_adder/Full-Adder.pro b/src/SubcircuitLibrary/5bit-Ripple_carry_adder/Full-Adder.pro
deleted file mode 100644
index 7089d69d..00000000
--- a/src/SubcircuitLibrary/5bit-Ripple_carry_adder/Full-Adder.pro
+++ /dev/null
@@ -1,74 +0,0 @@
-update=03/21/19 17:06:42

-version=1

-last_client=eeschema

-[general]

-version=1

-RootSch=

-BoardNm=

-[pcbnew]

-version=1

-LastNetListRead=

-UseCmpFile=1

-PadDrill=0.600000000000

-PadDrillOvalY=0.600000000000

-PadSizeH=1.500000000000

-PadSizeV=1.500000000000

-PcbTextSizeV=1.500000000000

-PcbTextSizeH=1.500000000000

-PcbTextThickness=0.300000000000

-ModuleTextSizeV=1.000000000000

-ModuleTextSizeH=1.000000000000

-ModuleTextSizeThickness=0.150000000000

-SolderMaskClearance=0.000000000000

-SolderMaskMinWidth=0.000000000000

-DrawSegmentWidth=0.200000000000

-BoardOutlineThickness=0.100000000000

-ModuleOutlineThickness=0.150000000000

-[cvpcb]

-version=1

-NetIExt=net

-[eeschema]

-version=1

-LibDir=

-[eeschema/libraries]

-LibName1=eSim_Analog

-LibName2=eSim_Devices

-LibName3=eSim_Digital

-LibName4=eSim_Hybrid

-LibName5=eSim_Miscellaneous

-LibName6=eSim_Plot

-LibName7=eSim_Power

-LibName8=eSim_PSpice

-LibName9=eSim_Sources

-LibName10=eSim_Subckt

-LibName11=eSim_User

-LibName12=half-adder

-LibName13=power

-LibName14=device

-LibName15=transistors

-LibName16=conn

-LibName17=linear

-LibName18=regul

-LibName19=74xx

-LibName20=cmos4000

-LibName21=adc-dac

-LibName22=memory

-LibName23=xilinx

-LibName24=microcontrollers

-LibName25=dsp

-LibName26=microchip

-LibName27=analog_switches

-LibName28=motorola

-LibName29=texas

-LibName30=intel

-LibName31=audio

-LibName32=interface

-LibName33=digital-audio

-LibName34=philips

-LibName35=display

-LibName36=cypress

-LibName37=siliconi

-LibName38=opto

-LibName39=atmel

-LibName40=contrib

-LibName41=valves

diff --git a/src/SubcircuitLibrary/5bit-Ripple_carry_adder/Full-Adder.sch b/src/SubcircuitLibrary/5bit-Ripple_carry_adder/Full-Adder.sch
deleted file mode 100644
index 981e7cdb..00000000
--- a/src/SubcircuitLibrary/5bit-Ripple_carry_adder/Full-Adder.sch
+++ /dev/null
@@ -1,226 +0,0 @@
-EESchema Schematic File Version 2

-LIBS:eSim_Analog

-LIBS:eSim_Devices

-LIBS:eSim_Digital

-LIBS:eSim_Hybrid

-LIBS:eSim_Miscellaneous

-LIBS:eSim_Plot

-LIBS:eSim_Power

-LIBS:eSim_PSpice

-LIBS:eSim_Sources

-LIBS:eSim_Subckt

-LIBS:eSim_User

-LIBS:half-adder

-LIBS:power

-LIBS:device

-LIBS:transistors

-LIBS:conn

-LIBS:linear

-LIBS:regul

-LIBS:74xx

-LIBS:cmos4000

-LIBS:adc-dac

-LIBS:memory

-LIBS:xilinx

-LIBS:microcontrollers

-LIBS:dsp

-LIBS:microchip

-LIBS:analog_switches

-LIBS:motorola

-LIBS:texas

-LIBS:intel

-LIBS:audio

-LIBS:interface

-LIBS:digital-audio

-LIBS:philips

-LIBS:display

-LIBS:cypress

-LIBS:siliconi

-LIBS:opto

-LIBS:atmel

-LIBS:contrib

-LIBS:valves

-LIBS:Full-Adder-cache

-EELAYER 25 0

-EELAYER END

-$Descr A4 11693 8268

-encoding utf-8

-Sheet 1 1

-Title ""

-Date ""

-Rev ""

-Comp ""

-Comment1 ""

-Comment2 ""

-Comment3 ""

-Comment4 ""

-$EndDescr

-$Comp

-L PORT U1

-U 1 1 5C93775D

-P 4100 2800

-F 0 "U1" H 4150 2900 30  0000 C CNN

-F 1 "PORT" H 4100 2800 30  0000 C CNN

-F 2 "" H 4100 2800 60  0000 C CNN

-F 3 "" H 4100 2800 60  0000 C CNN

-	1    4100 2800

-	1    0    0    -1  

-$EndComp

-$Comp

-L PORT U1

-U 2 1 5C9377A8

-P 4100 3100

-F 0 "U1" H 4150 3200 30  0000 C CNN

-F 1 "PORT" H 4100 3100 30  0000 C CNN

-F 2 "" H 4100 3100 60  0000 C CNN

-F 3 "" H 4100 3100 60  0000 C CNN

-	2    4100 3100

-	1    0    0    -1  

-$EndComp

-$Comp

-L PORT U1

-U 3 1 5C9377CD

-P 4100 3400

-F 0 "U1" H 4150 3500 30  0000 C CNN

-F 1 "PORT" H 4100 3400 30  0000 C CNN

-F 2 "" H 4100 3400 60  0000 C CNN

-F 3 "" H 4100 3400 60  0000 C CNN

-	3    4100 3400

-	1    0    0    -1  

-$EndComp

-$Comp

-L PORT U1

-U 4 1 5C9377F2

-P 8450 2900

-F 0 "U1" H 8500 3000 30  0000 C CNN

-F 1 "PORT" H 8450 2900 30  0000 C CNN

-F 2 "" H 8450 2900 60  0000 C CNN

-F 3 "" H 8450 2900 60  0000 C CNN

-	4    8450 2900

-	-1   0    0    1   

-$EndComp

-$Comp

-L PORT U1

-U 5 1 5C937851

-P 8450 3200

-F 0 "U1" H 8500 3300 30  0000 C CNN

-F 1 "PORT" H 8450 3200 30  0000 C CNN

-F 2 "" H 8450 3200 60  0000 C CNN

-F 3 "" H 8450 3200 60  0000 C CNN

-	5    8450 3200

-	-1   0    0    1   

-$EndComp

-$Comp

-L d_xor U2

-U 1 1 5C93788C

-P 5150 2900

-F 0 "U2" H 5150 2900 60  0000 C CNN

-F 1 "d_xor" H 5200 3000 47  0000 C CNN

-F 2 "" H 5150 2900 60  0000 C CNN

-F 3 "" H 5150 2900 60  0000 C CNN

-	1    5150 2900

-	1    0    0    -1  

-$EndComp

-$Comp

-L d_xor U5

-U 1 1 5C9378DF

-P 6400 2950

-F 0 "U5" H 6400 2950 60  0000 C CNN

-F 1 "d_xor" H 6450 3050 47  0000 C CNN

-F 2 "" H 6400 2950 60  0000 C CNN

-F 3 "" H 6400 2950 60  0000 C CNN

-	1    6400 2950

-	1    0    0    -1  

-$EndComp

-$Comp

-L d_and U4

-U 1 1 5C937928

-P 6150 3300

-F 0 "U4" H 6150 3300 60  0000 C CNN

-F 1 "d_and" H 6200 3400 60  0000 C CNN

-F 2 "" H 6150 3300 60  0000 C CNN

-F 3 "" H 6150 3300 60  0000 C CNN

-	1    6150 3300

-	1    0    0    -1  

-$EndComp

-$Comp

-L d_and U3

-U 1 1 5C9379CF

-P 5200 3500

-F 0 "U3" H 5200 3500 60  0000 C CNN

-F 1 "d_and" H 5250 3600 60  0000 C CNN

-F 2 "" H 5200 3500 60  0000 C CNN

-F 3 "" H 5200 3500 60  0000 C CNN

-	1    5200 3500

-	1    0    0    -1  

-$EndComp

-$Comp

-L d_or U6

-U 1 1 5C937A14

-P 7250 3550

-F 0 "U6" H 7250 3550 60  0000 C CNN

-F 1 "d_or" H 7250 3650 60  0000 C CNN

-F 2 "" H 7250 3550 60  0000 C CNN

-F 3 "" H 7250 3550 60  0000 C CNN

-	1    7250 3550

-	1    0    0    -1  

-$EndComp

-Wire Wire Line

-	4350 2800 4700 2800

-Wire Wire Line

-	4350 3100 4700 3100

-Wire Wire Line

-	4700 3100 4700 2900

-Wire Wire Line

-	5600 2850 5950 2850

-Wire Wire Line

-	4350 3400 4400 3400

-Wire Wire Line

-	4400 3400 4400 3150

-Wire Wire Line

-	4400 3150 5450 3150

-Wire Wire Line

-	5450 3150 5450 2950

-Wire Wire Line

-	5450 2950 5950 2950

-Wire Wire Line

-	6850 2900 8200 2900

-Wire Wire Line

-	4450 2800 4450 3400

-Wire Wire Line

-	4450 3400 4750 3400

-Connection ~ 4450 2800

-Wire Wire Line

-	4600 3100 4600 3500

-Wire Wire Line

-	4600 3500 4750 3500

-Connection ~ 4600 3100

-Wire Wire Line

-	5650 3450 6800 3450

-Wire Wire Line

-	4400 3300 5700 3300

-Connection ~ 4400 3300

-Wire Wire Line

-	5700 3200 5700 2850

-Connection ~ 5700 2850

-Wire Wire Line

-	6600 3250 6650 3250

-Wire Wire Line

-	6650 3250 6650 3550

-Wire Wire Line

-	6650 3550 6800 3550

-Wire Wire Line

-	7700 3500 7700 3200

-Wire Wire Line

-	7700 3200 8200 3200

-Text Notes 4400 2750 0    60   ~ 0

-A

-Text Notes 4400 3050 0    60   ~ 0

-B

-Text Notes 4350 3500 0    60   ~ 0

-Cin

-Text Notes 7950 2850 0    60   ~ 0

-Sum

-Text Notes 7950 3150 0    60   ~ 0

-Cout

-$EndSCHEMATC

diff --git a/src/SubcircuitLibrary/5bit-Ripple_carry_adder/Full-Adder.sub b/src/SubcircuitLibrary/5bit-Ripple_carry_adder/Full-Adder.sub
deleted file mode 100644
index 0ea4496d..00000000
--- a/src/SubcircuitLibrary/5bit-Ripple_carry_adder/Full-Adder.sub
+++ /dev/null
@@ -1,26 +0,0 @@
-* Subcircuit Full-Adder

-.subckt Full-Adder net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ net-_u1-pad5_ 

-* c:\esim\esim\src\subcircuitlibrary\full-adder\full-adder.cir

-* u2  net-_u1-pad1_ net-_u1-pad2_ net-_u2-pad3_ d_xor

-* u5  net-_u2-pad3_ net-_u1-pad3_ net-_u1-pad4_ d_xor

-* u4  net-_u2-pad3_ net-_u1-pad3_ net-_u4-pad3_ d_and

-* u3  net-_u1-pad1_ net-_u1-pad2_ net-_u3-pad3_ d_and

-* u6  net-_u3-pad3_ net-_u4-pad3_ net-_u1-pad5_ d_or

-a1 [net-_u1-pad1_ net-_u1-pad2_ ] net-_u2-pad3_ u2

-a2 [net-_u2-pad3_ net-_u1-pad3_ ] net-_u1-pad4_ u5

-a3 [net-_u2-pad3_ net-_u1-pad3_ ] net-_u4-pad3_ u4

-a4 [net-_u1-pad1_ net-_u1-pad2_ ] net-_u3-pad3_ u3

-a5 [net-_u3-pad3_ net-_u4-pad3_ ] net-_u1-pad5_ u6

-* Schematic Name: d_xor, NgSpice Name: d_xor

-.model u2 d_xor(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )

-* Schematic Name: d_xor, NgSpice Name: d_xor

-.model u5 d_xor(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )

-* Schematic Name: d_and, NgSpice Name: d_and

-.model u4 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )

-* Schematic Name: d_and, NgSpice Name: d_and

-.model u3 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )

-* Schematic Name: d_or, NgSpice Name: d_or

-.model u6 d_or(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )

-* Control Statements

-

-.ends Full-Adder
\ No newline at end of file
diff --git a/src/SubcircuitLibrary/5bit-Ripple_carry_adder/Full-Adder_Previous_Values.xml b/src/SubcircuitLibrary/5bit-Ripple_carry_adder/Full-Adder_Previous_Values.xml
deleted file mode 100644
index c7136641..00000000
--- a/src/SubcircuitLibrary/5bit-Ripple_carry_adder/Full-Adder_Previous_Values.xml
+++ /dev/null
@@ -1 +0,0 @@
-<KicadtoNgspice><analysis><ac><field1 name="Lin">true</field1><field2 name="Dec">false</field2><field3 name="Oct">false</field3><field4 name="Start Frequency" /><field5 name="Stop Frequency" /><field6 name="No. of points" /><field7 name="Start Fre Combo">Hz</field7><field8 name="Stop Fre Combo">Hz</field8></ac><dc><field1 name="Source 1" /><field2 name="Start" /><field3 name="Increment" /><field4 name="Stop" /><field5 name="Operating Point">0</field5><field6 name="Start Combo">Volts or Amperes</field6><field7 name="Increment Combo">Volts or Amperes</field7><field8 name="Stop Combo">Volts or Amperes</field8><field9 name="Source 2" /><field10 name="Start" /><field11 name="Increment" /><field12 name="Stop" /><field13 name="Start Combo">Volts or Amperes</field13><field14 name="Increment Combo">Volts or Amperes</field14><field15 name="Stop Combo">Volts or Amperes</field15></dc><tran><field1 name="Start Time" /><field2 name="Step Time" /><field3 name="Stop Time" /><field4 name="Start Combo">Sec</field4><field5 name="Step Combo">Sec</field5><field6 name="Stop Combo">Sec</field6></tran></analysis><source /><model><u2 name="type">d_xor<field1 name="Enter Fall Delay (default=1.0e-9)" /><field2 name="Enter Input Load (default=1.0e-12)" /><field3 name="Enter Rise Delay (default=1.0e-9)" /></u2><u5 name="type">d_xor<field4 name="Enter Fall Delay (default=1.0e-9)" /><field5 name="Enter Input Load (default=1.0e-12)" /><field6 name="Enter Rise Delay (default=1.0e-9)" /></u5><u4 name="type">d_and<field7 name="Enter Fall Delay (default=1.0e-9)" /><field8 name="Enter Input Load (default=1.0e-12)" /><field9 name="Enter Rise Delay (default=1.0e-9)" /></u4><u3 name="type">d_and<field10 name="Enter Fall Delay (default=1.0e-9)" /><field11 name="Enter Input Load (default=1.0e-12)" /><field12 name="Enter Rise Delay (default=1.0e-9)" /></u3><u6 name="type">d_or<field13 name="Enter Fall Delay (default=1.0e-9)" /><field14 name="Enter Input Load (default=1.0e-12)" /><field15 name="Enter Rise Delay (default=1.0e-9)" /></u6></model><devicemodel /><subcircuit /></KicadtoNgspice>
\ No newline at end of file
diff --git a/src/SubcircuitLibrary/74153/3_and_Previous_Values.xml b/src/SubcircuitLibrary/74153/3_and_Previous_Values.xml
deleted file mode 100644
index abc5faaa..00000000
--- a/src/SubcircuitLibrary/74153/3_and_Previous_Values.xml
+++ /dev/null
@@ -1 +0,0 @@
-<KicadtoNgspice><source /><model><u2 name="type">d_and<field1 name="Enter Fall Delay (default=1.0e-9)" /><field2 name="Enter Input Load (default=1.0e-12)" /><field3 name="Enter Rise Delay (default=1.0e-9)" /></u2><u3 name="type">d_and<field4 name="Enter Fall Delay (default=1.0e-9)" /><field5 name="Enter Input Load (default=1.0e-12)" /><field6 name="Enter Rise Delay (default=1.0e-9)" /></u3></model><devicemodel /><subcircuit /><analysis><ac><field1 name="Lin">true</field1><field2 name="Dec">false</field2><field3 name="Oct">false</field3><field4 name="Start Frequency" /><field5 name="Stop Frequency" /><field6 name="No. of points" /><field7 name="Start Fre Combo">Hz</field7><field8 name="Stop Fre Combo">Hz</field8></ac><dc><field1 name="Source 1" /><field2 name="Start" /><field3 name="Increment" /><field4 name="Stop" /><field5 name="Operating Point">0</field5><field6 name="Start Combo">Volts or Amperes</field6><field7 name="Increment Combo">Volts or Amperes</field7><field8 name="Stop Combo">Volts or Amperes</field8><field9 name="Source 2" /><field10 name="Start" /><field11 name="Increment" /><field12 name="Stop" /><field13 name="Start Combo">Volts or Amperes</field13><field14 name="Increment Combo">Volts or Amperes</field14><field15 name="Stop Combo">Volts or Amperes</field15></dc><tran><field1 name="Start Time" /><field2 name="Step Time" /><field3 name="Stop Time" /><field4 name="Start Combo">Sec</field4><field5 name="Step Combo">Sec</field5><field6 name="Stop Combo">Sec</field6></tran></analysis></KicadtoNgspice>
\ No newline at end of file
diff --git a/src/SubcircuitLibrary/74153/4_OR_Previous_Values.xml b/src/SubcircuitLibrary/74153/4_OR_Previous_Values.xml
deleted file mode 100644
index 23698d37..00000000
--- a/src/SubcircuitLibrary/74153/4_OR_Previous_Values.xml
+++ /dev/null
@@ -1 +0,0 @@
-<KicadtoNgspice><analysis><ac><field1 name="Lin">true</field1><field2 name="Dec">false</field2><field3 name="Oct">false</field3><field4 name="Start Frequency" /><field5 name="Stop Frequency" /><field6 name="No. of points" /><field7 name="Start Fre Combo">Hz</field7><field8 name="Stop Fre Combo">Hz</field8></ac><dc><field1 name="Source 1" /><field2 name="Start" /><field3 name="Increment" /><field4 name="Stop" /><field5 name="Operating Point">0</field5><field6 name="Start Combo">Volts or Amperes</field6><field7 name="Increment Combo">Volts or Amperes</field7><field8 name="Stop Combo">Volts or Amperes</field8><field9 name="Source 2" /><field10 name="Start" /><field11 name="Increment" /><field12 name="Stop" /><field13 name="Start Combo">Volts or Amperes</field13><field14 name="Increment Combo">Volts or Amperes</field14><field15 name="Stop Combo">Volts or Amperes</field15></dc><tran><field1 name="Start Time" /><field2 name="Step Time" /><field3 name="Stop Time" /><field4 name="Start Combo">Sec</field4><field5 name="Step Combo">Sec</field5><field6 name="Stop Combo">Sec</field6></tran></analysis><source /><model><u2 name="type">d_or<field1 name="Enter Fall Delay (default=1.0e-9)" /><field2 name="Enter Input Load (default=1.0e-12)" /><field3 name="Enter Rise Delay (default=1.0e-9)" /></u2><u3 name="type">d_or<field4 name="Enter Fall Delay (default=1.0e-9)" /><field5 name="Enter Input Load (default=1.0e-12)" /><field6 name="Enter Rise Delay (default=1.0e-9)" /></u3><u4 name="type">d_or<field7 name="Enter Fall Delay (default=1.0e-9)" /><field8 name="Enter Input Load (default=1.0e-12)" /><field9 name="Enter Rise Delay (default=1.0e-9)" /></u4></model><devicemodel /><subcircuit /></KicadtoNgspice>
\ No newline at end of file
diff --git a/src/SubcircuitLibrary/74153/4_and-rescue.lib b/src/SubcircuitLibrary/74153/4_and-rescue.lib
deleted file mode 100644
index 6b2c17f7..00000000
--- a/src/SubcircuitLibrary/74153/4_and-rescue.lib
+++ /dev/null
@@ -1,22 +0,0 @@
-EESchema-LIBRARY Version 2.3

-#encoding utf-8

-#

-# 3_and-RESCUE-4_and

-#

-DEF 3_and-RESCUE-4_and X 0 40 Y Y 1 F N

-F0 "X" 900 300 60 H V C CNN

-F1 "3_and-RESCUE-4_and" 950 500 60 H V C CNN

-F2 "" 0 0 60 H V C CNN

-F3 "" 0 0 60 H V C CNN

-DRAW

-A 950 400 158 716 -716 0 1 0 N 1000 550 1000 250

-P 2 0 1 0  650 550  1000 550 N

-P 3 0 1 0  650 550  650 250  1000 250 N

-X in1 1 450 500 200 R 50 50 1 1 I

-X in2 2 450 400 200 R 50 50 1 1 I

-X in3 3 450 300 200 R 50 50 1 1 I

-X out 4 1300 400 200 L 50 50 1 1 O

-ENDDRAW

-ENDDEF

-#

-#End Library

diff --git a/src/SubcircuitLibrary/74153/analysis b/src/SubcircuitLibrary/74153/analysis
deleted file mode 100644
index ebd5c0a9..00000000
--- a/src/SubcircuitLibrary/74153/analysis
+++ /dev/null
@@ -1 +0,0 @@
-.tran 0e-00 0e-00 0e-00
\ No newline at end of file
diff --git a/src/SubcircuitLibrary/74157/3_and_Previous_Values.xml b/src/SubcircuitLibrary/74157/3_and_Previous_Values.xml
deleted file mode 100644
index abc5faaa..00000000
--- a/src/SubcircuitLibrary/74157/3_and_Previous_Values.xml
+++ /dev/null
@@ -1 +0,0 @@
-<KicadtoNgspice><source /><model><u2 name="type">d_and<field1 name="Enter Fall Delay (default=1.0e-9)" /><field2 name="Enter Input Load (default=1.0e-12)" /><field3 name="Enter Rise Delay (default=1.0e-9)" /></u2><u3 name="type">d_and<field4 name="Enter Fall Delay (default=1.0e-9)" /><field5 name="Enter Input Load (default=1.0e-12)" /><field6 name="Enter Rise Delay (default=1.0e-9)" /></u3></model><devicemodel /><subcircuit /><analysis><ac><field1 name="Lin">true</field1><field2 name="Dec">false</field2><field3 name="Oct">false</field3><field4 name="Start Frequency" /><field5 name="Stop Frequency" /><field6 name="No. of points" /><field7 name="Start Fre Combo">Hz</field7><field8 name="Stop Fre Combo">Hz</field8></ac><dc><field1 name="Source 1" /><field2 name="Start" /><field3 name="Increment" /><field4 name="Stop" /><field5 name="Operating Point">0</field5><field6 name="Start Combo">Volts or Amperes</field6><field7 name="Increment Combo">Volts or Amperes</field7><field8 name="Stop Combo">Volts or Amperes</field8><field9 name="Source 2" /><field10 name="Start" /><field11 name="Increment" /><field12 name="Stop" /><field13 name="Start Combo">Volts or Amperes</field13><field14 name="Increment Combo">Volts or Amperes</field14><field15 name="Stop Combo">Volts or Amperes</field15></dc><tran><field1 name="Start Time" /><field2 name="Step Time" /><field3 name="Stop Time" /><field4 name="Start Combo">Sec</field4><field5 name="Step Combo">Sec</field5><field6 name="Stop Combo">Sec</field6></tran></analysis></KicadtoNgspice>
\ No newline at end of file
diff --git a/src/SubcircuitLibrary/74157/74157-rescue.lib b/src/SubcircuitLibrary/74157/74157-rescue.lib
deleted file mode 100644
index cac27fc1..00000000
--- a/src/SubcircuitLibrary/74157/74157-rescue.lib
+++ /dev/null
@@ -1,22 +0,0 @@
-EESchema-LIBRARY Version 2.3
-#encoding utf-8
-#
-# 3_and-RESCUE-74157
-#
-DEF 3_and-RESCUE-74157 X 0 40 Y Y 1 F N
-F0 "X" 900 300 60 H V C CNN
-F1 "3_and-RESCUE-74157" 950 500 60 H V C CNN
-F2 "" 0 0 60 H V C CNN
-F3 "" 0 0 60 H V C CNN
-DRAW
-A 950 400 158 716 -716 0 1 0 N 1000 550 1000 250
-P 2 0 1 0 650 550 1000 550 N
-P 3 0 1 0 650 550 650 250 1000 250 N
-X in1 1 450 500 200 R 50 50 1 1 I
-X in2 2 450 400 200 R 50 50 1 1 I
-X in3 3 450 300 200 R 50 50 1 1 I
-X out 4 1300 400 200 L 50 50 1 1 O
-ENDDRAW
-ENDDEF
-#
-#End Library
diff --git a/src/SubcircuitLibrary/74157/analysis b/src/SubcircuitLibrary/74157/analysis
deleted file mode 100644
index ebd5c0a9..00000000
--- a/src/SubcircuitLibrary/74157/analysis
+++ /dev/null
@@ -1 +0,0 @@
-.tran 0e-00 0e-00 0e-00
\ No newline at end of file
diff --git a/src/SubcircuitLibrary/7485/3_and_Previous_Values.xml b/src/SubcircuitLibrary/7485/3_and_Previous_Values.xml
deleted file mode 100644
index abc5faaa..00000000
--- a/src/SubcircuitLibrary/7485/3_and_Previous_Values.xml
+++ /dev/null
@@ -1 +0,0 @@
-<KicadtoNgspice><source /><model><u2 name="type">d_and<field1 name="Enter Fall Delay (default=1.0e-9)" /><field2 name="Enter Input Load (default=1.0e-12)" /><field3 name="Enter Rise Delay (default=1.0e-9)" /></u2><u3 name="type">d_and<field4 name="Enter Fall Delay (default=1.0e-9)" /><field5 name="Enter Input Load (default=1.0e-12)" /><field6 name="Enter Rise Delay (default=1.0e-9)" /></u3></model><devicemodel /><subcircuit /><analysis><ac><field1 name="Lin">true</field1><field2 name="Dec">false</field2><field3 name="Oct">false</field3><field4 name="Start Frequency" /><field5 name="Stop Frequency" /><field6 name="No. of points" /><field7 name="Start Fre Combo">Hz</field7><field8 name="Stop Fre Combo">Hz</field8></ac><dc><field1 name="Source 1" /><field2 name="Start" /><field3 name="Increment" /><field4 name="Stop" /><field5 name="Operating Point">0</field5><field6 name="Start Combo">Volts or Amperes</field6><field7 name="Increment Combo">Volts or Amperes</field7><field8 name="Stop Combo">Volts or Amperes</field8><field9 name="Source 2" /><field10 name="Start" /><field11 name="Increment" /><field12 name="Stop" /><field13 name="Start Combo">Volts or Amperes</field13><field14 name="Increment Combo">Volts or Amperes</field14><field15 name="Stop Combo">Volts or Amperes</field15></dc><tran><field1 name="Start Time" /><field2 name="Step Time" /><field3 name="Stop Time" /><field4 name="Start Combo">Sec</field4><field5 name="Step Combo">Sec</field5><field6 name="Stop Combo">Sec</field6></tran></analysis></KicadtoNgspice>
\ No newline at end of file
diff --git a/src/SubcircuitLibrary/7485/4_and-rescue.lib b/src/SubcircuitLibrary/7485/4_and-rescue.lib
deleted file mode 100644
index 6b2c17f7..00000000
--- a/src/SubcircuitLibrary/7485/4_and-rescue.lib
+++ /dev/null
@@ -1,22 +0,0 @@
-EESchema-LIBRARY Version 2.3

-#encoding utf-8

-#

-# 3_and-RESCUE-4_and

-#

-DEF 3_and-RESCUE-4_and X 0 40 Y Y 1 F N

-F0 "X" 900 300 60 H V C CNN

-F1 "3_and-RESCUE-4_and" 950 500 60 H V C CNN

-F2 "" 0 0 60 H V C CNN

-F3 "" 0 0 60 H V C CNN

-DRAW

-A 950 400 158 716 -716 0 1 0 N 1000 550 1000 250

-P 2 0 1 0  650 550  1000 550 N

-P 3 0 1 0  650 550  650 250  1000 250 N

-X in1 1 450 500 200 R 50 50 1 1 I

-X in2 2 450 400 200 R 50 50 1 1 I

-X in3 3 450 300 200 R 50 50 1 1 I

-X out 4 1300 400 200 L 50 50 1 1 O

-ENDDRAW

-ENDDEF

-#

-#End Library

diff --git a/src/SubcircuitLibrary/7485/4_and_Previous_Values.xml b/src/SubcircuitLibrary/7485/4_and_Previous_Values.xml
deleted file mode 100644
index f2ba0130..00000000
--- a/src/SubcircuitLibrary/7485/4_and_Previous_Values.xml
+++ /dev/null
@@ -1 +0,0 @@
-<KicadtoNgspice><source /><model><u2 name="type">d_and<field1 name="Enter Fall Delay (default=1.0e-9)" /><field2 name="Enter Input Load (default=1.0e-12)" /><field3 name="Enter Rise Delay (default=1.0e-9)" /></u2></model><devicemodel /><subcircuit><x1><field>C:\Users\malli\eSim\src\SubcircuitLibrary\3_and</field></x1></subcircuit><analysis><ac><field1 name="Lin">true</field1><field2 name="Dec">false</field2><field3 name="Oct">false</field3><field4 name="Start Frequency" /><field5 name="Stop Frequency" /><field6 name="No. of points" /><field7 name="Start Fre Combo">Hz</field7><field8 name="Stop Fre Combo">Hz</field8></ac><dc><field1 name="Source 1" /><field2 name="Start" /><field3 name="Increment" /><field4 name="Stop" /><field5 name="Operating Point">0</field5><field6 name="Start Combo">Volts or Amperes</field6><field7 name="Increment Combo">Volts or Amperes</field7><field8 name="Stop Combo">Volts or Amperes</field8><field9 name="Source 2" /><field10 name="Start" /><field11 name="Increment" /><field12 name="Stop" /><field13 name="Start Combo">Volts or Amperes</field13><field14 name="Increment Combo">Volts or Amperes</field14><field15 name="Stop Combo">Volts or Amperes</field15></dc><tran><field1 name="Start Time" /><field2 name="Step Time" /><field3 name="Stop Time" /><field4 name="Start Combo">Sec</field4><field5 name="Step Combo">Sec</field5><field6 name="Stop Combo">Sec</field6></tran></analysis></KicadtoNgspice>
\ No newline at end of file
diff --git a/src/SubcircuitLibrary/7485/5_and_Previous_Values.xml b/src/SubcircuitLibrary/7485/5_and_Previous_Values.xml
deleted file mode 100644
index ae2c08a7..00000000
--- a/src/SubcircuitLibrary/7485/5_and_Previous_Values.xml
+++ /dev/null
@@ -1 +0,0 @@
-<KicadtoNgspice><source /><model><u2 name="type">d_and<field1 name="Enter Fall Delay (default=1.0e-9)" /><field2 name="Enter Input Load (default=1.0e-12)" /><field3 name="Enter Rise Delay (default=1.0e-9)" /></u2><u3 name="type">d_and<field4 name="Enter Fall Delay (default=1.0e-9)" /><field5 name="Enter Input Load (default=1.0e-12)" /><field6 name="Enter Rise Delay (default=1.0e-9)" /></u3></model><devicemodel /><subcircuit><x1><field>C:\Users\malli\eSim\src\SubcircuitLibrary\3_and</field></x1></subcircuit><analysis><ac><field1 name="Lin">true</field1><field2 name="Dec">false</field2><field3 name="Oct">false</field3><field4 name="Start Frequency" /><field5 name="Stop Frequency" /><field6 name="No. of points" /><field7 name="Start Fre Combo">Hz</field7><field8 name="Stop Fre Combo">Hz</field8></ac><dc><field1 name="Source 1" /><field2 name="Start" /><field3 name="Increment" /><field4 name="Stop" /><field5 name="Operating Point">0</field5><field6 name="Start Combo">Volts or Amperes</field6><field7 name="Increment Combo">Volts or Amperes</field7><field8 name="Stop Combo">Volts or Amperes</field8><field9 name="Source 2" /><field10 name="Start" /><field11 name="Increment" /><field12 name="Stop" /><field13 name="Start Combo">Volts or Amperes</field13><field14 name="Increment Combo">Volts or Amperes</field14><field15 name="Stop Combo">Volts or Amperes</field15></dc><tran><field1 name="Start Time" /><field2 name="Step Time" /><field3 name="Stop Time" /><field4 name="Start Combo">Sec</field4><field5 name="Step Combo">Sec</field5><field6 name="Stop Combo">Sec</field6></tran></analysis></KicadtoNgspice>
\ No newline at end of file
diff --git a/src/SubcircuitLibrary/7485/5_nor-cache.lib b/src/SubcircuitLibrary/7485/5_nor-cache.lib
deleted file mode 100644
index 7098010f..00000000
--- a/src/SubcircuitLibrary/7485/5_nor-cache.lib
+++ /dev/null
@@ -1,95 +0,0 @@
-EESchema-LIBRARY Version 2.3
-#encoding utf-8
-#
-# 5_and
-#
-DEF 5_and X 0 40 Y Y 1 F N
-F0 "X" 50 -100 60 H V C CNN
-F1 "5_and" 100 150 60 H V C CNN
-F2 "" 0 0 60 H V C CNN
-F3 "" 0 0 60 H V C CNN
-DRAW
-A 100 0 255 787 -787 0 1 0 N 150 250 150 -250
-P 2 0 1 0 -250 250 150 250 N
-P 3 0 1 0 -250 250 -250 -250 150 -250 N
-X in1 1 -450 200 200 R 50 50 1 1 I
-X in2 2 -450 100 200 R 50 50 1 1 I
-X in3 3 -450 0 200 R 50 50 1 1 I
-X in4 4 -450 -100 200 R 50 50 1 1 I
-X in5 5 -450 -200 200 R 50 50 1 1 I
-X out 6 550 0 200 L 50 50 1 1 O
-ENDDRAW
-ENDDEF
-#
-# PORT
-#
-DEF PORT U 0 40 Y Y 26 F N
-F0 "U" 50 100 30 H V C CNN
-F1 "PORT" 0 0 30 H V C CNN
-F2 "" 0 0 60 H V C CNN
-F3 "" 0 0 60 H V C CNN
-DRAW
-A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0
-A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50
-S -100 50 100 -50 0 1 0 N
-X ~ 1 250 0 100 L 30 30 1 1 B
-X ~ 2 250 0 100 L 30 30 2 1 B
-X ~ 3 250 0 100 L 30 30 3 1 B
-X ~ 4 250 0 100 L 30 30 4 1 B
-X ~ 5 250 0 100 L 30 30 5 1 B
-X ~ 6 250 0 100 L 30 30 6 1 B
-X ~ 7 250 0 100 L 30 30 7 1 B
-X ~ 8 250 0 100 L 30 30 8 1 B
-X ~ 9 250 0 100 L 30 30 9 1 B
-X ~ 10 250 0 100 L 30 30 10 1 B
-X ~ 11 250 0 100 L 30 30 11 1 B
-X ~ 12 250 0 100 L 30 30 12 1 B
-X ~ 13 250 0 100 L 30 30 13 1 B
-X ~ 14 250 0 100 L 30 30 14 1 B
-X ~ 15 250 0 100 L 30 30 15 1 B
-X ~ 16 250 0 100 L 30 30 16 1 B
-X ~ 17 250 0 100 L 30 30 17 1 B
-X ~ 18 250 0 100 L 30 30 18 1 B
-X ~ 19 250 0 100 L 30 30 19 1 B
-X ~ 20 250 0 100 L 30 30 20 1 B
-X ~ 21 250 0 100 L 30 30 21 1 B
-X ~ 22 250 0 100 L 30 30 22 1 B
-X ~ 23 250 0 100 L 30 30 23 1 B
-X ~ 24 250 0 100 L 30 30 24 1 B
-X ~ 25 250 0 100 L 30 30 25 1 B
-X ~ 26 250 0 100 L 30 30 26 1 B
-ENDDRAW
-ENDDEF
-#
-# d_and
-#
-DEF d_and U 0 40 Y Y 1 F N
-F0 "U" 0 0 60 H V C CNN
-F1 "d_and" 50 100 60 H V C CNN
-F2 "" 0 0 60 H V C CNN
-F3 "" 0 0 60 H V C CNN
-DRAW
-A 149 50 100 -894 0 0 1 0 N 150 -50 250 50
-A 150 49 100 6 900 0 1 0 N 250 50 150 150
-P 4 0 1 0 150 -50 -250 -50 -250 150 150 150 N
-X IN1 1 -450 100 200 R 50 50 1 1 I
-X IN2 2 -450 0 200 R 50 50 1 1 I
-X OUT 3 450 50 200 L 50 50 1 1 O
-ENDDRAW
-ENDDEF
-#
-# d_inverter
-#
-DEF d_inverter U 0 40 Y Y 1 F N
-F0 "U" 0 -100 60 H V C CNN
-F1 "d_inverter" 0 150 60 H V C CNN
-F2 "" 50 -50 60 H V C CNN
-F3 "" 50 -50 60 H V C CNN
-DRAW
-P 4 0 1 0 -100 50 -100 -50 100 0 -100 50 N
-X ~ 1 -300 0 200 R 50 50 1 1 I
-X ~ 2 300 0 200 L 50 50 1 1 O I
-ENDDRAW
-ENDDEF
-#
-#End Library
diff --git a/src/SubcircuitLibrary/7485/5_nor.cir b/src/SubcircuitLibrary/7485/5_nor.cir
deleted file mode 100644
index 0e4db1ea..00000000
--- a/src/SubcircuitLibrary/7485/5_nor.cir
+++ /dev/null
@@ -1,19 +0,0 @@
-* /home/mallikarjuna/Downloads/eSim-1.1.2/src/SubcircuitLibrary/5_nor/5_nor.cir
-
-* EESchema Netlist Version 1.1 (Spice format) creation date: Tue Jun 25 23:34:56 2019
-
-* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N
-* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0
-
-* Sheet Name: /
-U8  Net-_U8-Pad1_ Net-_U7-Pad2_ Net-_U1-Pad7_ d_and		
-U2  Net-_U1-Pad1_ Net-_U2-Pad2_ d_inverter		
-U3  Net-_U1-Pad2_ Net-_U3-Pad2_ d_inverter		
-U4  Net-_U1-Pad3_ Net-_U4-Pad2_ d_inverter		
-U5  Net-_U1-Pad4_ Net-_U5-Pad2_ d_inverter		
-U6  Net-_U1-Pad5_ Net-_U6-Pad2_ d_inverter		
-U7  Net-_U1-Pad6_ Net-_U7-Pad2_ d_inverter		
-U1  Net-_U1-Pad1_ Net-_U1-Pad2_ Net-_U1-Pad3_ Net-_U1-Pad4_ Net-_U1-Pad5_ Net-_U1-Pad6_ Net-_U1-Pad7_ PORT		
-X1  Net-_U2-Pad2_ Net-_U3-Pad2_ Net-_U4-Pad2_ Net-_U5-Pad2_ Net-_U6-Pad2_ Net-_U8-Pad1_ 5_and		
-
-.end
diff --git a/src/SubcircuitLibrary/7485/5_nor.cir.out b/src/SubcircuitLibrary/7485/5_nor.cir.out
deleted file mode 100644
index bc90e004..00000000
--- a/src/SubcircuitLibrary/7485/5_nor.cir.out
+++ /dev/null
@@ -1,42 +0,0 @@
-* /home/mallikarjuna/downloads/esim-1.1.2/src/subcircuitlibrary/5_nor/5_nor.cir
-
-.include 5_and.sub
-* u8  net-_u8-pad1_ net-_u7-pad2_ net-_u1-pad7_ d_and
-* u2  net-_u1-pad1_ net-_u2-pad2_ d_inverter
-* u3  net-_u1-pad2_ net-_u3-pad2_ d_inverter
-* u4  net-_u1-pad3_ net-_u4-pad2_ d_inverter
-* u5  net-_u1-pad4_ net-_u5-pad2_ d_inverter
-* u6  net-_u1-pad5_ net-_u6-pad2_ d_inverter
-* u7  net-_u1-pad6_ net-_u7-pad2_ d_inverter
-* u1  net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ net-_u1-pad5_ net-_u1-pad6_ net-_u1-pad7_ port
-x1 net-_u2-pad2_ net-_u3-pad2_ net-_u4-pad2_ net-_u5-pad2_ net-_u6-pad2_ net-_u8-pad1_ 5_and
-a1 [net-_u8-pad1_ net-_u7-pad2_ ] net-_u1-pad7_ u8
-a2 net-_u1-pad1_ net-_u2-pad2_ u2
-a3 net-_u1-pad2_ net-_u3-pad2_ u3
-a4 net-_u1-pad3_ net-_u4-pad2_ u4
-a5 net-_u1-pad4_ net-_u5-pad2_ u5
-a6 net-_u1-pad5_ net-_u6-pad2_ u6
-a7 net-_u1-pad6_ net-_u7-pad2_ u7
-* Schematic Name: d_and, NgSpice Name: d_and
-.model u8 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 
-* Schematic Name: d_inverter, NgSpice Name: d_inverter
-.model u2 d_inverter(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 
-* Schematic Name: d_inverter, NgSpice Name: d_inverter
-.model u3 d_inverter(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 
-* Schematic Name: d_inverter, NgSpice Name: d_inverter
-.model u4 d_inverter(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 
-* Schematic Name: d_inverter, NgSpice Name: d_inverter
-.model u5 d_inverter(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 
-* Schematic Name: d_inverter, NgSpice Name: d_inverter
-.model u6 d_inverter(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 
-* Schematic Name: d_inverter, NgSpice Name: d_inverter
-.model u7 d_inverter(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 
-.tran 0e-00 0e-00 0e-00
-
-* Control Statements 
-.control
-run
-print allv > plot_data_v.txt
-print alli > plot_data_i.txt
-.endc
-.end
diff --git a/src/SubcircuitLibrary/7485/5_nor.pro b/src/SubcircuitLibrary/7485/5_nor.pro
deleted file mode 100644
index 4716d4ae..00000000
--- a/src/SubcircuitLibrary/7485/5_nor.pro
+++ /dev/null
@@ -1,73 +0,0 @@
-update=Tue Jun 25 23:32:34 2019
-version=1
-last_client=eeschema
-[general]
-version=1
-RootSch=
-BoardNm=
-[pcbnew]
-version=1
-LastNetListRead=
-UseCmpFile=1
-PadDrill=0.600000000000
-PadDrillOvalY=0.600000000000
-PadSizeH=1.500000000000
-PadSizeV=1.500000000000
-PcbTextSizeV=1.500000000000
-PcbTextSizeH=1.500000000000
-PcbTextThickness=0.300000000000
-ModuleTextSizeV=1.000000000000
-ModuleTextSizeH=1.000000000000
-ModuleTextSizeThickness=0.150000000000
-SolderMaskClearance=0.000000000000
-SolderMaskMinWidth=0.000000000000
-DrawSegmentWidth=0.200000000000
-BoardOutlineThickness=0.100000000000
-ModuleOutlineThickness=0.150000000000
-[cvpcb]
-version=1
-NetIExt=net
-[eeschema]
-version=1
-LibDir=../../../kicadSchematicLibrary
-[eeschema/libraries]
-LibName1=adc-dac
-LibName2=memory
-LibName3=xilinx
-LibName4=microcontrollers
-LibName5=dsp
-LibName6=microchip
-LibName7=analog_switches
-LibName8=motorola
-LibName9=texas
-LibName10=intel
-LibName11=audio
-LibName12=interface
-LibName13=digital-audio
-LibName14=philips
-LibName15=display
-LibName16=cypress
-LibName17=siliconi
-LibName18=opto
-LibName19=atmel
-LibName20=contrib
-LibName21=power
-LibName22=device
-LibName23=transistors
-LibName24=conn
-LibName25=linear
-LibName26=regul
-LibName27=74xx
-LibName28=cmos4000
-LibName29=eSim_Analog
-LibName30=eSim_Devices
-LibName31=eSim_Digital
-LibName32=eSim_Hybrid
-LibName33=eSim_Miscellaneous
-LibName34=eSim_Power
-LibName35=eSim_Sources
-LibName36=eSim_User
-LibName37=eSim_Plot
-LibName38=eSim_PSpice
-LibName39=/home/mallikarjuna/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_Subckt
-
diff --git a/src/SubcircuitLibrary/7485/5_nor.sch b/src/SubcircuitLibrary/7485/5_nor.sch
deleted file mode 100644
index 6bb6fcb8..00000000
--- a/src/SubcircuitLibrary/7485/5_nor.sch
+++ /dev/null
@@ -1,275 +0,0 @@
-EESchema Schematic File Version 2
-LIBS:adc-dac
-LIBS:memory
-LIBS:xilinx
-LIBS:microcontrollers
-LIBS:dsp
-LIBS:microchip
-LIBS:analog_switches
-LIBS:motorola
-LIBS:texas
-LIBS:intel
-LIBS:audio
-LIBS:interface
-LIBS:digital-audio
-LIBS:philips
-LIBS:display
-LIBS:cypress
-LIBS:siliconi
-LIBS:opto
-LIBS:atmel
-LIBS:contrib
-LIBS:power
-LIBS:device
-LIBS:transistors
-LIBS:conn
-LIBS:linear
-LIBS:regul
-LIBS:74xx
-LIBS:cmos4000
-LIBS:eSim_Analog
-LIBS:eSim_Devices
-LIBS:eSim_Digital
-LIBS:eSim_Hybrid
-LIBS:eSim_Miscellaneous
-LIBS:eSim_Power
-LIBS:eSim_Sources
-LIBS:eSim_User
-LIBS:eSim_Plot
-LIBS:eSim_PSpice
-LIBS:eSim_Subckt
-LIBS:c_gate-cache
-EELAYER 25 0
-EELAYER END
-$Descr A4 11693 8268
-encoding utf-8
-Sheet 1 1
-Title ""
-Date ""
-Rev ""
-Comp ""
-Comment1 ""
-Comment2 ""
-Comment3 ""
-Comment4 ""
-$EndDescr
-$Comp
-L d_and U8
-U 1 1 5D126275
-P 5600 3300
-F 0 "U8" H 5600 3300 60  0000 C CNN
-F 1 "d_and" H 5650 3400 60  0000 C CNN
-F 2 "" H 5600 3300 60  0000 C CNN
-F 3 "" H 5600 3300 60  0000 C CNN
-	1    5600 3300
-	1    0    0    -1  
-$EndComp
-Wire Wire Line
-	5150 3200 5150 2850
-Wire Wire Line
-	4150 2650 4150 2350
-Wire Wire Line
-	4150 2350 3600 2350
-Wire Wire Line
-	4150 2750 4050 2750
-Wire Wire Line
-	4050 2750 4050 2550
-Wire Wire Line
-	4050 2550 3600 2550
-Wire Wire Line
-	4150 2850 3700 2850
-Wire Wire Line
-	3700 2850 3700 2750
-Wire Wire Line
-	3700 2750 3600 2750
-Wire Wire Line
-	4150 2950 3600 2950
-Wire Wire Line
-	4150 3050 4150 3150
-Wire Wire Line
-	4150 3150 3600 3150
-Wire Wire Line
-	5150 3300 3600 3300
-$Comp
-L d_inverter U2
-U 1 1 5D126276
-P 3300 2350
-F 0 "U2" H 3300 2250 60  0000 C CNN
-F 1 "d_inverter" H 3300 2500 60  0000 C CNN
-F 2 "" H 3350 2300 60  0000 C CNN
-F 3 "" H 3350 2300 60  0000 C CNN
-	1    3300 2350
-	1    0    0    -1  
-$EndComp
-$Comp
-L d_inverter U3
-U 1 1 5D126277
-P 3300 2550
-F 0 "U3" H 3300 2450 60  0000 C CNN
-F 1 "d_inverter" H 3300 2700 60  0000 C CNN
-F 2 "" H 3350 2500 60  0000 C CNN
-F 3 "" H 3350 2500 60  0000 C CNN
-	1    3300 2550
-	1    0    0    -1  
-$EndComp
-$Comp
-L d_inverter U4
-U 1 1 5D126278
-P 3300 2750
-F 0 "U4" H 3300 2650 60  0000 C CNN
-F 1 "d_inverter" H 3300 2900 60  0000 C CNN
-F 2 "" H 3350 2700 60  0000 C CNN
-F 3 "" H 3350 2700 60  0000 C CNN
-	1    3300 2750
-	1    0    0    -1  
-$EndComp
-$Comp
-L d_inverter U5
-U 1 1 5D126279
-P 3300 2950
-F 0 "U5" H 3300 2850 60  0000 C CNN
-F 1 "d_inverter" H 3300 3100 60  0000 C CNN
-F 2 "" H 3350 2900 60  0000 C CNN
-F 3 "" H 3350 2900 60  0000 C CNN
-	1    3300 2950
-	1    0    0    -1  
-$EndComp
-$Comp
-L d_inverter U6
-U 1 1 5D12627A
-P 3300 3150
-F 0 "U6" H 3300 3050 60  0000 C CNN
-F 1 "d_inverter" H 3300 3300 60  0000 C CNN
-F 2 "" H 3350 3100 60  0000 C CNN
-F 3 "" H 3350 3100 60  0000 C CNN
-	1    3300 3150
-	1    0    0    -1  
-$EndComp
-$Comp
-L d_inverter U7
-U 1 1 5D12627B
-P 3300 3300
-F 0 "U7" H 3300 3200 60  0000 C CNN
-F 1 "d_inverter" H 3300 3450 60  0000 C CNN
-F 2 "" H 3350 3250 60  0000 C CNN
-F 3 "" H 3350 3250 60  0000 C CNN
-	1    3300 3300
-	1    0    0    -1  
-$EndComp
-Wire Wire Line
-	3000 2350 2000 2350
-Wire Wire Line
-	3000 2550 2000 2550
-Wire Wire Line
-	3000 2750 2050 2750
-Wire Wire Line
-	3000 2950 2050 2950
-Wire Wire Line
-	3000 3150 2050 3150
-Wire Wire Line
-	3000 3300 2050 3300
-Wire Wire Line
-	6050 3250 6950 3250
-$Comp
-L PORT U1
-U 1 1 5D12627C
-P 1750 2350
-F 0 "U1" H 1800 2450 30  0000 C CNN
-F 1 "PORT" H 1750 2350 30  0000 C CNN
-F 2 "" H 1750 2350 60  0000 C CNN
-F 3 "" H 1750 2350 60  0000 C CNN
-	1    1750 2350
-	1    0    0    -1  
-$EndComp
-$Comp
-L PORT U1
-U 2 1 5D12627D
-P 1750 2550
-F 0 "U1" H 1800 2650 30  0000 C CNN
-F 1 "PORT" H 1750 2550 30  0000 C CNN
-F 2 "" H 1750 2550 60  0000 C CNN
-F 3 "" H 1750 2550 60  0000 C CNN
-	2    1750 2550
-	1    0    0    -1  
-$EndComp
-$Comp
-L PORT U1
-U 3 1 5D12627E
-P 1800 2750
-F 0 "U1" H 1850 2850 30  0000 C CNN
-F 1 "PORT" H 1800 2750 30  0000 C CNN
-F 2 "" H 1800 2750 60  0000 C CNN
-F 3 "" H 1800 2750 60  0000 C CNN
-	3    1800 2750
-	1    0    0    -1  
-$EndComp
-$Comp
-L PORT U1
-U 4 1 5D12627F
-P 1800 2950
-F 0 "U1" H 1850 3050 30  0000 C CNN
-F 1 "PORT" H 1800 2950 30  0000 C CNN
-F 2 "" H 1800 2950 60  0000 C CNN
-F 3 "" H 1800 2950 60  0000 C CNN
-	4    1800 2950
-	1    0    0    -1  
-$EndComp
-$Comp
-L PORT U1
-U 5 1 5D126280
-P 1800 3150
-F 0 "U1" H 1850 3250 30  0000 C CNN
-F 1 "PORT" H 1800 3150 30  0000 C CNN
-F 2 "" H 1800 3150 60  0000 C CNN
-F 3 "" H 1800 3150 60  0000 C CNN
-	5    1800 3150
-	1    0    0    -1  
-$EndComp
-$Comp
-L PORT U1
-U 6 1 5D126281
-P 1800 3300
-F 0 "U1" H 1850 3400 30  0000 C CNN
-F 1 "PORT" H 1800 3300 30  0000 C CNN
-F 2 "" H 1800 3300 60  0000 C CNN
-F 3 "" H 1800 3300 60  0000 C CNN
-	6    1800 3300
-	1    0    0    -1  
-$EndComp
-$Comp
-L PORT U1
-U 7 1 5D126282
-P 7200 3250
-F 0 "U1" H 7250 3350 30  0000 C CNN
-F 1 "PORT" H 7200 3250 30  0000 C CNN
-F 2 "" H 7200 3250 60  0000 C CNN
-F 3 "" H 7200 3250 60  0000 C CNN
-	7    7200 3250
-	-1   0    0    1   
-$EndComp
-Text Notes 2400 2350 0    60   ~ 12
-in1
-Text Notes 2400 2550 0    60   ~ 12
-in2
-Text Notes 2400 2750 0    60   ~ 12
-in3
-Text Notes 2400 2950 0    60   ~ 12
-in4
-Text Notes 2400 3150 0    60   ~ 12
-in5
-Text Notes 2400 3300 0    60   ~ 12
-in6
-Text Notes 6350 3250 0    60   ~ 12
-out
-$Comp
-L 5_and X1
-U 1 1 5D1262D5
-P 4600 2850
-F 0 "X1" H 4650 2750 60  0000 C CNN
-F 1 "5_and" H 4700 3000 60  0000 C CNN
-F 2 "" H 4600 2850 60  0000 C CNN
-F 3 "" H 4600 2850 60  0000 C CNN
-	1    4600 2850
-	1    0    0    -1  
-$EndComp
-$EndSCHEMATC
diff --git a/src/SubcircuitLibrary/7485/5_nor.sub b/src/SubcircuitLibrary/7485/5_nor.sub
deleted file mode 100644
index dbcdb750..00000000
--- a/src/SubcircuitLibrary/7485/5_nor.sub
+++ /dev/null
@@ -1,36 +0,0 @@
-* Subcircuit 5_nor
-.subckt 5_nor net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ net-_u1-pad5_ net-_u1-pad6_ net-_u1-pad7_ 
-* /home/mallikarjuna/downloads/esim-1.1.2/src/subcircuitlibrary/5_nor/5_nor.cir
-.include 5_and.sub
-* u8  net-_u8-pad1_ net-_u7-pad2_ net-_u1-pad7_ d_and
-* u2  net-_u1-pad1_ net-_u2-pad2_ d_inverter
-* u3  net-_u1-pad2_ net-_u3-pad2_ d_inverter
-* u4  net-_u1-pad3_ net-_u4-pad2_ d_inverter
-* u5  net-_u1-pad4_ net-_u5-pad2_ d_inverter
-* u6  net-_u1-pad5_ net-_u6-pad2_ d_inverter
-* u7  net-_u1-pad6_ net-_u7-pad2_ d_inverter
-x1 net-_u2-pad2_ net-_u3-pad2_ net-_u4-pad2_ net-_u5-pad2_ net-_u6-pad2_ net-_u8-pad1_ 5_and
-a1 [net-_u8-pad1_ net-_u7-pad2_ ] net-_u1-pad7_ u8
-a2 net-_u1-pad1_ net-_u2-pad2_ u2
-a3 net-_u1-pad2_ net-_u3-pad2_ u3
-a4 net-_u1-pad3_ net-_u4-pad2_ u4
-a5 net-_u1-pad4_ net-_u5-pad2_ u5
-a6 net-_u1-pad5_ net-_u6-pad2_ u6
-a7 net-_u1-pad6_ net-_u7-pad2_ u7
-* Schematic Name: d_and, NgSpice Name: d_and
-.model u8 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )
-* Schematic Name: d_inverter, NgSpice Name: d_inverter
-.model u2 d_inverter(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )
-* Schematic Name: d_inverter, NgSpice Name: d_inverter
-.model u3 d_inverter(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )
-* Schematic Name: d_inverter, NgSpice Name: d_inverter
-.model u4 d_inverter(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )
-* Schematic Name: d_inverter, NgSpice Name: d_inverter
-.model u5 d_inverter(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )
-* Schematic Name: d_inverter, NgSpice Name: d_inverter
-.model u6 d_inverter(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )
-* Schematic Name: d_inverter, NgSpice Name: d_inverter
-.model u7 d_inverter(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )
-* Control Statements
-
-.ends 5_nor
\ No newline at end of file
diff --git a/src/SubcircuitLibrary/7485/5_nor_Previous_Values.xml b/src/SubcircuitLibrary/7485/5_nor_Previous_Values.xml
deleted file mode 100644
index 75f5258c..00000000
--- a/src/SubcircuitLibrary/7485/5_nor_Previous_Values.xml
+++ /dev/null
@@ -1 +0,0 @@
-<KicadtoNgspice><analysis><ac><field1 name="Lin">true</field1><field2 name="Dec">false</field2><field3 name="Oct">false</field3><field4 name="Start Frequency" /><field5 name="Stop Frequency" /><field6 name="No. of points" /><field7 name="Start Fre Combo">Hz</field7><field8 name="Stop Fre Combo">Hz</field8></ac><dc><field1 name="Source 1" /><field2 name="Start" /><field3 name="Increment" /><field4 name="Stop" /><field5 name="Operating Point">0</field5><field6 name="Start Combo">Volts or Amperes</field6><field7 name="Increment Combo">Volts or Amperes</field7><field8 name="Stop Combo">Volts or Amperes</field8><field9 name="Source 2" /><field10 name="Start" /><field11 name="Increment" /><field12 name="Stop" /><field13 name="Start Combo">Volts or Amperes</field13><field14 name="Increment Combo">Volts or Amperes</field14><field15 name="Stop Combo">Volts or Amperes</field15></dc><tran><field1 name="Start Time" /><field2 name="Step Time" /><field3 name="Stop Time" /><field4 name="Start Combo">Sec</field4><field5 name="Step Combo">Sec</field5><field6 name="Stop Combo">Sec</field6></tran></analysis><source /><model><u8 name="type">d_and<field1 name="Enter Fall Delay (default=1.0e-9)" /><field2 name="Enter Input Load (default=1.0e-12)" /><field3 name="Enter Rise Delay (default=1.0e-9)" /></u8><u2 name="type">d_inverter<field4 name="Enter Fall Delay (default=1.0e-9)" /><field5 name="Enter Input Load (default=1.0e-12)" /><field6 name="Enter Rise Delay (default=1.0e-9)" /></u2><u3 name="type">d_inverter<field7 name="Enter Fall Delay (default=1.0e-9)" /><field8 name="Enter Input Load (default=1.0e-12)" /><field9 name="Enter Rise Delay (default=1.0e-9)" /></u3><u4 name="type">d_inverter<field10 name="Enter Fall Delay (default=1.0e-9)" /><field11 name="Enter Input Load (default=1.0e-12)" /><field12 name="Enter Rise Delay (default=1.0e-9)" /></u4><u5 name="type">d_inverter<field13 name="Enter Fall Delay (default=1.0e-9)" /><field14 name="Enter Input Load (default=1.0e-12)" /><field15 name="Enter Rise Delay (default=1.0e-9)" /></u5><u6 name="type">d_inverter<field16 name="Enter Fall Delay (default=1.0e-9)" /><field17 name="Enter Input Load (default=1.0e-12)" /><field18 name="Enter Rise Delay (default=1.0e-9)" /></u6><u7 name="type">d_inverter<field19 name="Enter Fall Delay (default=1.0e-9)" /><field20 name="Enter Input Load (default=1.0e-12)" /><field21 name="Enter Rise Delay (default=1.0e-9)" /></u7></model><devicemodel /><subcircuit><x1><field>/home/mallikarjuna/Downloads/eSim-1.1.2/src/SubcircuitLibrary/5_and</field></x1></subcircuit></KicadtoNgspice>
\ No newline at end of file
diff --git a/src/SubcircuitLibrary/7485/analysis b/src/SubcircuitLibrary/7485/analysis
deleted file mode 100644
index ebd5c0a9..00000000
--- a/src/SubcircuitLibrary/7485/analysis
+++ /dev/null
@@ -1 +0,0 @@
-.tran 0e-00 0e-00 0e-00
\ No newline at end of file
diff --git a/src/SubcircuitLibrary/9bit-Right_shift_register/9bit-Right_shift_register-cache.lib b/src/SubcircuitLibrary/9bit-Right_shift_register/9bit-Right_shift_register-cache.lib
deleted file mode 100644
index f5944a63..00000000
--- a/src/SubcircuitLibrary/9bit-Right_shift_register/9bit-Right_shift_register-cache.lib
+++ /dev/null
@@ -1,112 +0,0 @@
-EESchema-LIBRARY Version 2.3
-#encoding utf-8
-#
-# PORT
-#
-DEF PORT U 0 40 Y Y 26 F N
-F0 "U" 50 100 30 H V C CNN
-F1 "PORT" 0 0 30 H V C CNN
-F2 "" 0 0 60 H V C CNN
-F3 "" 0 0 60 H V C CNN
-DRAW
-A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0
-A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50
-S -100 50 100 -50 0 1 0 N
-X ~ 1 250 0 100 L 30 30 1 1 B
-X ~ 2 250 0 100 L 30 30 2 1 B
-X ~ 3 250 0 100 L 30 30 3 1 B
-X ~ 4 250 0 100 L 30 30 4 1 B
-X ~ 5 250 0 100 L 30 30 5 1 B
-X ~ 6 250 0 100 L 30 30 6 1 B
-X ~ 7 250 0 100 L 30 30 7 1 B
-X ~ 8 250 0 100 L 30 30 8 1 B
-X ~ 9 250 0 100 L 30 30 9 1 B
-X ~ 10 250 0 100 L 30 30 10 1 B
-X ~ 11 250 0 100 L 30 30 11 1 B
-X ~ 12 250 0 100 L 30 30 12 1 B
-X ~ 13 250 0 100 L 30 30 13 1 B
-X ~ 14 250 0 100 L 30 30 14 1 B
-X ~ 15 250 0 100 L 30 30 15 1 B
-X ~ 16 250 0 100 L 30 30 16 1 B
-X ~ 17 250 0 100 L 30 30 17 1 B
-X ~ 18 250 0 100 L 30 30 18 1 B
-X ~ 19 250 0 100 L 30 30 19 1 B
-X ~ 20 250 0 100 L 30 30 20 1 B
-X ~ 21 250 0 100 L 30 30 21 1 B
-X ~ 22 250 0 100 L 30 30 22 1 B
-X ~ 23 250 0 100 L 30 30 23 1 B
-X ~ 24 250 0 100 L 30 30 24 1 B
-X ~ 25 250 0 100 L 30 30 25 1 B
-X ~ 26 250 0 100 L 30 30 26 1 B
-ENDDRAW
-ENDDEF
-#
-# d_and
-#
-DEF d_and U 0 40 Y Y 1 F N
-F0 "U" 0 0 60 H V C CNN
-F1 "d_and" 50 100 60 H V C CNN
-F2 "" 0 0 60 H V C CNN
-F3 "" 0 0 60 H V C CNN
-DRAW
-A 149 50 100 -894 0 0 1 0 N 150 -50 250 50
-A 150 49 100 6 900 0 1 0 N 250 50 150 150
-P 4 0 1 0 150 -50 -250 -50 -250 150 150 150 N
-X IN1 1 -450 100 200 R 50 50 1 1 I
-X IN2 2 -450 0 200 R 50 50 1 1 I
-X OUT 3 450 50 200 L 50 50 1 1 O
-ENDDRAW
-ENDDEF
-#
-# d_dff
-#
-DEF d_dff U 0 40 Y Y 1 F N
-F0 "U" 0 0 60 H V C CNN
-F1 "d_dff" 0 150 60 H V C CNN
-F2 "" 0 0 60 H V C CNN
-F3 "" 0 0 60 H V C CNN
-DRAW
-S 350 450 -350 -400 0 1 0 N
-X Din 1 -550 350 200 R 50 50 1 1 I
-X Clk 2 -550 -300 200 R 50 50 1 1 I C
-X Set 3 0 650 200 D 50 50 1 1 I
-X Reset 4 0 -600 200 U 50 50 1 1 I
-X Dout 5 550 350 200 L 50 50 1 1 O
-X Ndout 6 550 -300 200 L 50 50 1 1 O I
-ENDDRAW
-ENDDEF
-#
-# d_inverter
-#
-DEF d_inverter U 0 40 Y Y 1 F N
-F0 "U" 0 -100 60 H V C CNN
-F1 "d_inverter" 0 150 60 H V C CNN
-F2 "" 50 -50 60 H V C CNN
-F3 "" 50 -50 60 H V C CNN
-DRAW
-P 4 0 1 0 -100 50 -100 -50 100 0 -100 50 N
-X ~ 1 -300 0 200 R 50 50 1 1 I
-X ~ 2 300 0 200 L 50 50 1 1 O I
-ENDDRAW
-ENDDEF
-#
-# d_or
-#
-DEF d_or U 0 40 Y Y 1 F N
-F0 "U" 0 0 60 H V C CNN
-F1 "d_or" 0 100 60 H V C CNN
-F2 "" 0 0 60 H V C CNN
-F3 "" 0 0 60 H V C CNN
-DRAW
-A -450 50 224 266 -266 0 1 0 N -250 150 -250 -50
-A -25 -124 325 574 323 0 1 0 N 150 150 250 50
-A 74 125 191 -665 -231 0 1 0 N 150 -50 250 50
-P 2 0 1 0 -250 -50 150 -50 N
-P 2 0 1 0 -250 150 150 150 N
-X IN1 1 -450 100 215 R 50 50 1 1 I
-X IN2 2 -450 0 215 R 50 50 1 1 I
-X OUT 3 450 50 200 L 50 50 1 1 O
-ENDDRAW
-ENDDEF
-#
-#End Library
diff --git a/src/SubcircuitLibrary/9bit-Right_shift_register/9bit-Right_shift_register.cir b/src/SubcircuitLibrary/9bit-Right_shift_register/9bit-Right_shift_register.cir
deleted file mode 100644
index 52ab8ff8..00000000
--- a/src/SubcircuitLibrary/9bit-Right_shift_register/9bit-Right_shift_register.cir
+++ /dev/null
@@ -1,56 +0,0 @@
-* C:\esim\eSim\src\SubcircuitLibrary\9bit-Right_shift_register\9bit-Right_shift_register.cir

-

-* EESchema Netlist Version 1.1 (Spice format) creation date: 03/24/19 01:43:15

-

-* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N

-* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0

-

-* Sheet Name: /

-U3  Net-_U20-Pad3_ Net-_U1-Pad2_ Net-_U1-Pad3_ Net-_U1-Pad3_ Net-_U26-Pad2_ ? d_dff		

-U4  Net-_U25-Pad3_ Net-_U1-Pad2_ Net-_U1-Pad3_ Net-_U1-Pad3_ Net-_U30-Pad2_ ? d_dff		

-U6  Net-_U29-Pad3_ Net-_U1-Pad2_ Net-_U1-Pad3_ Net-_U1-Pad3_ Net-_U34-Pad2_ ? d_dff		

-U15  Net-_U15-Pad1_ Net-_U1-Pad2_ Net-_U1-Pad3_ Net-_U1-Pad3_ Net-_U15-Pad5_ ? d_dff		

-U2  Net-_U14-Pad3_ Net-_U1-Pad2_ Net-_U1-Pad3_ Net-_U1-Pad3_ Net-_U2-Pad5_ ? d_dff		

-U1  Net-_U1-Pad1_ Net-_U1-Pad2_ Net-_U1-Pad3_ Net-_U1-Pad3_ Net-_U1-Pad5_ ? d_dff		

-U18  Net-_U18-Pad1_ Net-_U1-Pad2_ Net-_U1-Pad3_ Net-_U1-Pad3_ Net-_U18-Pad5_ ? d_dff		

-U11  Net-_U11-Pad1_ Net-_U10-Pad3_ Net-_U1-Pad1_ d_or		

-U14  Net-_U14-Pad1_ Net-_U13-Pad3_ Net-_U14-Pad3_ d_or		

-U20  Net-_U20-Pad1_ Net-_U19-Pad3_ Net-_U20-Pad3_ d_or		

-U10  Net-_U10-Pad1_ Net-_U10-Pad2_ Net-_U10-Pad3_ d_and		

-U8  Net-_U7-Pad2_ Net-_U5-Pad1_ Net-_U11-Pad1_ d_and		

-U7  Net-_U10-Pad1_ Net-_U7-Pad2_ d_inverter		

-U13  Net-_U12-Pad2_ Net-_U13-Pad2_ Net-_U13-Pad3_ d_and		

-U16  Net-_U10-Pad1_ Net-_U1-Pad5_ Net-_U14-Pad1_ d_and		

-U12  Net-_U10-Pad1_ Net-_U12-Pad2_ d_inverter		

-U19  Net-_U17-Pad2_ Net-_U19-Pad2_ Net-_U19-Pad3_ d_and		

-U21  Net-_U10-Pad1_ Net-_U2-Pad5_ Net-_U20-Pad1_ d_and		

-U17  Net-_U10-Pad1_ Net-_U17-Pad2_ d_inverter		

-U25  Net-_U23-Pad3_ Net-_U25-Pad2_ Net-_U25-Pad3_ d_or		

-U23  Net-_U22-Pad2_ Net-_U23-Pad2_ Net-_U23-Pad3_ d_and		

-U26  Net-_U10-Pad1_ Net-_U26-Pad2_ Net-_U25-Pad2_ d_and		

-U22  Net-_U10-Pad1_ Net-_U22-Pad2_ d_inverter		

-U29  Net-_U28-Pad3_ Net-_U29-Pad2_ Net-_U29-Pad3_ d_or		

-U28  Net-_U27-Pad2_ Net-_U28-Pad2_ Net-_U28-Pad3_ d_and		

-U30  Net-_U10-Pad1_ Net-_U30-Pad2_ Net-_U29-Pad2_ d_and		

-U27  Net-_U10-Pad1_ Net-_U27-Pad2_ d_inverter		

-U33  Net-_U32-Pad3_ Net-_U33-Pad2_ Net-_U33-Pad3_ d_or		

-U40  Net-_U38-Pad3_ Net-_U40-Pad2_ Net-_U15-Pad1_ d_or		

-U32  Net-_U31-Pad2_ Net-_U32-Pad2_ Net-_U32-Pad3_ d_and		

-U34  Net-_U10-Pad1_ Net-_U34-Pad2_ Net-_U33-Pad2_ d_and		

-U38  Net-_U37-Pad2_ Net-_U38-Pad2_ Net-_U38-Pad3_ d_and		

-U42  Net-_U10-Pad1_ Net-_U42-Pad2_ Net-_U40-Pad2_ d_and		

-U31  Net-_U10-Pad1_ Net-_U31-Pad2_ d_inverter		

-U37  Net-_U10-Pad1_ Net-_U37-Pad2_ d_inverter		

-U39  Net-_U36-Pad3_ Net-_U39-Pad2_ Net-_U18-Pad1_ d_or		

-U36  Net-_U36-Pad1_ Net-_U35-Pad2_ Net-_U36-Pad3_ d_and		

-U41  Net-_U15-Pad5_ Net-_U10-Pad1_ Net-_U39-Pad2_ d_and		

-U9  Net-_U33-Pad3_ Net-_U1-Pad2_ Net-_U1-Pad3_ Net-_U1-Pad3_ Net-_U42-Pad2_ ? d_dff		

-U35  Net-_U10-Pad1_ Net-_U35-Pad2_ d_inverter		

-U24  Net-_U24-Pad1_ Net-_U1-Pad2_ Net-_U1-Pad3_ Net-_U1-Pad3_ Net-_U10-Pad2_ ? d_dff		

-U45  Net-_U45-Pad1_ Net-_U44-Pad3_ Net-_U24-Pad1_ d_or		

-U46  Net-_U18-Pad5_ Net-_U10-Pad1_ Net-_U45-Pad1_ d_and		

-U44  Net-_U44-Pad1_ Net-_U43-Pad2_ Net-_U44-Pad3_ d_and		

-U43  Net-_U10-Pad1_ Net-_U43-Pad2_ d_inverter		

-U5  Net-_U5-Pad1_ Net-_U1-Pad3_ Net-_U1-Pad2_ Net-_U13-Pad2_ Net-_U44-Pad1_ Net-_U19-Pad2_ Net-_U23-Pad2_ Net-_U10-Pad2_ Net-_U2-Pad5_ Net-_U30-Pad2_ Net-_U42-Pad2_ Net-_U18-Pad5_ Net-_U28-Pad2_ Net-_U1-Pad5_ Net-_U26-Pad2_ Net-_U34-Pad2_ Net-_U15-Pad5_ Net-_U36-Pad1_ Net-_U32-Pad2_ Net-_U38-Pad2_ Net-_U10-Pad1_ PORT		

-

-.end

diff --git a/src/SubcircuitLibrary/9bit-Right_shift_register/9bit-Right_shift_register.cir.out b/src/SubcircuitLibrary/9bit-Right_shift_register/9bit-Right_shift_register.cir.out
deleted file mode 100644
index cff41387..00000000
--- a/src/SubcircuitLibrary/9bit-Right_shift_register/9bit-Right_shift_register.cir.out
+++ /dev/null
@@ -1,192 +0,0 @@
-* c:\esim\esim\src\subcircuitlibrary\9bit-right_shift_register\9bit-right_shift_register.cir

-

-* u3  net-_u20-pad3_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad3_ net-_u26-pad2_ ? d_dff

-* u4  net-_u25-pad3_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad3_ net-_u30-pad2_ ? d_dff

-* u6  net-_u29-pad3_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad3_ net-_u34-pad2_ ? d_dff

-* u15  net-_u15-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad3_ net-_u15-pad5_ ? d_dff

-* u2  net-_u14-pad3_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad3_ net-_u2-pad5_ ? d_dff

-* u1  net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad3_ net-_u1-pad5_ ? d_dff

-* u18  net-_u18-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad3_ net-_u18-pad5_ ? d_dff

-* u11  net-_u11-pad1_ net-_u10-pad3_ net-_u1-pad1_ d_or

-* u14  net-_u14-pad1_ net-_u13-pad3_ net-_u14-pad3_ d_or

-* u20  net-_u20-pad1_ net-_u19-pad3_ net-_u20-pad3_ d_or

-* u10  net-_u10-pad1_ net-_u10-pad2_ net-_u10-pad3_ d_and

-* u8  net-_u7-pad2_ net-_u5-pad1_ net-_u11-pad1_ d_and

-* u7  net-_u10-pad1_ net-_u7-pad2_ d_inverter

-* u13  net-_u12-pad2_ net-_u13-pad2_ net-_u13-pad3_ d_and

-* u16  net-_u10-pad1_ net-_u1-pad5_ net-_u14-pad1_ d_and

-* u12  net-_u10-pad1_ net-_u12-pad2_ d_inverter

-* u19  net-_u17-pad2_ net-_u19-pad2_ net-_u19-pad3_ d_and

-* u21  net-_u10-pad1_ net-_u2-pad5_ net-_u20-pad1_ d_and

-* u17  net-_u10-pad1_ net-_u17-pad2_ d_inverter

-* u25  net-_u23-pad3_ net-_u25-pad2_ net-_u25-pad3_ d_or

-* u23  net-_u22-pad2_ net-_u23-pad2_ net-_u23-pad3_ d_and

-* u26  net-_u10-pad1_ net-_u26-pad2_ net-_u25-pad2_ d_and

-* u22  net-_u10-pad1_ net-_u22-pad2_ d_inverter

-* u29  net-_u28-pad3_ net-_u29-pad2_ net-_u29-pad3_ d_or

-* u28  net-_u27-pad2_ net-_u28-pad2_ net-_u28-pad3_ d_and

-* u30  net-_u10-pad1_ net-_u30-pad2_ net-_u29-pad2_ d_and

-* u27  net-_u10-pad1_ net-_u27-pad2_ d_inverter

-* u33  net-_u32-pad3_ net-_u33-pad2_ net-_u33-pad3_ d_or

-* u40  net-_u38-pad3_ net-_u40-pad2_ net-_u15-pad1_ d_or

-* u32  net-_u31-pad2_ net-_u32-pad2_ net-_u32-pad3_ d_and

-* u34  net-_u10-pad1_ net-_u34-pad2_ net-_u33-pad2_ d_and

-* u38  net-_u37-pad2_ net-_u38-pad2_ net-_u38-pad3_ d_and

-* u42  net-_u10-pad1_ net-_u42-pad2_ net-_u40-pad2_ d_and

-* u31  net-_u10-pad1_ net-_u31-pad2_ d_inverter

-* u37  net-_u10-pad1_ net-_u37-pad2_ d_inverter

-* u39  net-_u36-pad3_ net-_u39-pad2_ net-_u18-pad1_ d_or

-* u36  net-_u36-pad1_ net-_u35-pad2_ net-_u36-pad3_ d_and

-* u41  net-_u15-pad5_ net-_u10-pad1_ net-_u39-pad2_ d_and

-* u9  net-_u33-pad3_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad3_ net-_u42-pad2_ ? d_dff

-* u35  net-_u10-pad1_ net-_u35-pad2_ d_inverter

-* u24  net-_u24-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad3_ net-_u10-pad2_ ? d_dff

-* u45  net-_u45-pad1_ net-_u44-pad3_ net-_u24-pad1_ d_or

-* u46  net-_u18-pad5_ net-_u10-pad1_ net-_u45-pad1_ d_and

-* u44  net-_u44-pad1_ net-_u43-pad2_ net-_u44-pad3_ d_and

-* u43  net-_u10-pad1_ net-_u43-pad2_ d_inverter

-* u5  net-_u5-pad1_ net-_u1-pad3_ net-_u1-pad2_ net-_u13-pad2_ net-_u44-pad1_ net-_u19-pad2_ net-_u23-pad2_ net-_u10-pad2_ net-_u2-pad5_ net-_u30-pad2_ net-_u42-pad2_ net-_u18-pad5_ net-_u28-pad2_ net-_u1-pad5_ net-_u26-pad2_ net-_u34-pad2_ net-_u15-pad5_ net-_u36-pad1_ net-_u32-pad2_ net-_u38-pad2_ net-_u10-pad1_ port

-a1 net-_u20-pad3_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad3_ net-_u26-pad2_ ? u3

-a2 net-_u25-pad3_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad3_ net-_u30-pad2_ ? u4

-a3 net-_u29-pad3_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad3_ net-_u34-pad2_ ? u6

-a4 net-_u15-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad3_ net-_u15-pad5_ ? u15

-a5 net-_u14-pad3_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad3_ net-_u2-pad5_ ? u2

-a6 net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad3_ net-_u1-pad5_ ? u1

-a7 net-_u18-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad3_ net-_u18-pad5_ ? u18

-a8 [net-_u11-pad1_ net-_u10-pad3_ ] net-_u1-pad1_ u11

-a9 [net-_u14-pad1_ net-_u13-pad3_ ] net-_u14-pad3_ u14

-a10 [net-_u20-pad1_ net-_u19-pad3_ ] net-_u20-pad3_ u20

-a11 [net-_u10-pad1_ net-_u10-pad2_ ] net-_u10-pad3_ u10

-a12 [net-_u7-pad2_ net-_u5-pad1_ ] net-_u11-pad1_ u8

-a13 net-_u10-pad1_ net-_u7-pad2_ u7

-a14 [net-_u12-pad2_ net-_u13-pad2_ ] net-_u13-pad3_ u13

-a15 [net-_u10-pad1_ net-_u1-pad5_ ] net-_u14-pad1_ u16

-a16 net-_u10-pad1_ net-_u12-pad2_ u12

-a17 [net-_u17-pad2_ net-_u19-pad2_ ] net-_u19-pad3_ u19

-a18 [net-_u10-pad1_ net-_u2-pad5_ ] net-_u20-pad1_ u21

-a19 net-_u10-pad1_ net-_u17-pad2_ u17

-a20 [net-_u23-pad3_ net-_u25-pad2_ ] net-_u25-pad3_ u25

-a21 [net-_u22-pad2_ net-_u23-pad2_ ] net-_u23-pad3_ u23

-a22 [net-_u10-pad1_ net-_u26-pad2_ ] net-_u25-pad2_ u26

-a23 net-_u10-pad1_ net-_u22-pad2_ u22

-a24 [net-_u28-pad3_ net-_u29-pad2_ ] net-_u29-pad3_ u29

-a25 [net-_u27-pad2_ net-_u28-pad2_ ] net-_u28-pad3_ u28

-a26 [net-_u10-pad1_ net-_u30-pad2_ ] net-_u29-pad2_ u30

-a27 net-_u10-pad1_ net-_u27-pad2_ u27

-a28 [net-_u32-pad3_ net-_u33-pad2_ ] net-_u33-pad3_ u33

-a29 [net-_u38-pad3_ net-_u40-pad2_ ] net-_u15-pad1_ u40

-a30 [net-_u31-pad2_ net-_u32-pad2_ ] net-_u32-pad3_ u32

-a31 [net-_u10-pad1_ net-_u34-pad2_ ] net-_u33-pad2_ u34

-a32 [net-_u37-pad2_ net-_u38-pad2_ ] net-_u38-pad3_ u38

-a33 [net-_u10-pad1_ net-_u42-pad2_ ] net-_u40-pad2_ u42

-a34 net-_u10-pad1_ net-_u31-pad2_ u31

-a35 net-_u10-pad1_ net-_u37-pad2_ u37

-a36 [net-_u36-pad3_ net-_u39-pad2_ ] net-_u18-pad1_ u39

-a37 [net-_u36-pad1_ net-_u35-pad2_ ] net-_u36-pad3_ u36

-a38 [net-_u15-pad5_ net-_u10-pad1_ ] net-_u39-pad2_ u41

-a39 net-_u33-pad3_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad3_ net-_u42-pad2_ ? u9

-a40 net-_u10-pad1_ net-_u35-pad2_ u35

-a41 net-_u24-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad3_ net-_u10-pad2_ ? u24

-a42 [net-_u45-pad1_ net-_u44-pad3_ ] net-_u24-pad1_ u45

-a43 [net-_u18-pad5_ net-_u10-pad1_ ] net-_u45-pad1_ u46

-a44 [net-_u44-pad1_ net-_u43-pad2_ ] net-_u44-pad3_ u44

-a45 net-_u10-pad1_ net-_u43-pad2_ u43

-* Schematic Name: d_dff, NgSpice Name: d_dff

-.model u3 d_dff(ic=0 set_delay=1.0e-9 set_load=1.0e-12 reset_load=1.0e-12 clk_delay=1.0e-9 clk_load=1.0e-12 reset_delay=1.0 data_load=1.0e-12 fall_delay=1.0e-9 rise_delay=1.0e-9 ) 

-* Schematic Name: d_dff, NgSpice Name: d_dff

-.model u4 d_dff(ic=0 set_delay=1.0e-9 set_load=1.0e-12 reset_load=1.0e-12 clk_delay=1.0e-9 clk_load=1.0e-12 reset_delay=1.0 data_load=1.0e-12 fall_delay=1.0e-9 rise_delay=1.0e-9 ) 

-* Schematic Name: d_dff, NgSpice Name: d_dff

-.model u6 d_dff(ic=0 set_delay=1.0e-9 set_load=1.0e-12 reset_load=1.0e-12 clk_delay=1.0e-9 clk_load=1.0e-12 reset_delay=1.0 data_load=1.0e-12 fall_delay=1.0e-9 rise_delay=1.0e-9 ) 

-* Schematic Name: d_dff, NgSpice Name: d_dff

-.model u15 d_dff(ic=0 set_delay=1.0e-9 set_load=1.0e-12 reset_load=1.0e-12 clk_delay=1.0e-9 clk_load=1.0e-12 reset_delay=1.0 data_load=1.0e-12 fall_delay=1.0e-9 rise_delay=1.0e-9 ) 

-* Schematic Name: d_dff, NgSpice Name: d_dff

-.model u2 d_dff(ic=0 set_delay=1.0e-9 set_load=1.0e-12 reset_load=1.0e-12 clk_delay=1.0e-9 clk_load=1.0e-12 reset_delay=1.0 data_load=1.0e-12 fall_delay=1.0e-9 rise_delay=1.0e-9 ) 

-* Schematic Name: d_dff, NgSpice Name: d_dff

-.model u1 d_dff(ic=0 set_delay=1.0e-9 set_load=1.0e-12 reset_load=1.0e-12 clk_delay=1.0e-9 clk_load=1.0e-12 reset_delay=1.0 data_load=1.0e-12 fall_delay=1.0e-9 rise_delay=1.0e-9 ) 

-* Schematic Name: d_dff, NgSpice Name: d_dff

-.model u18 d_dff(ic=0 set_delay=1.0e-9 set_load=1.0e-12 reset_load=1.0e-12 clk_delay=1.0e-9 clk_load=1.0e-12 reset_delay=1.0 data_load=1.0e-12 fall_delay=1.0e-9 rise_delay=1.0e-9 ) 

-* Schematic Name: d_or, NgSpice Name: d_or

-.model u11 d_or(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 

-* Schematic Name: d_or, NgSpice Name: d_or

-.model u14 d_or(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 

-* Schematic Name: d_or, NgSpice Name: d_or

-.model u20 d_or(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 

-* Schematic Name: d_and, NgSpice Name: d_and

-.model u10 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 

-* Schematic Name: d_and, NgSpice Name: d_and

-.model u8 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 

-* Schematic Name: d_inverter, NgSpice Name: d_inverter

-.model u7 d_inverter(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 

-* Schematic Name: d_and, NgSpice Name: d_and

-.model u13 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 

-* Schematic Name: d_and, NgSpice Name: d_and

-.model u16 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 

-* Schematic Name: d_inverter, NgSpice Name: d_inverter

-.model u12 d_inverter(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 

-* Schematic Name: d_and, NgSpice Name: d_and

-.model u19 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 

-* Schematic Name: d_and, NgSpice Name: d_and

-.model u21 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 

-* Schematic Name: d_inverter, NgSpice Name: d_inverter

-.model u17 d_inverter(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 

-* Schematic Name: d_or, NgSpice Name: d_or

-.model u25 d_or(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 

-* Schematic Name: d_and, NgSpice Name: d_and

-.model u23 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 

-* Schematic Name: d_and, NgSpice Name: d_and

-.model u26 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 

-* Schematic Name: d_inverter, NgSpice Name: d_inverter

-.model u22 d_inverter(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 

-* Schematic Name: d_or, NgSpice Name: d_or

-.model u29 d_or(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 

-* Schematic Name: d_and, NgSpice Name: d_and

-.model u28 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 

-* Schematic Name: d_and, NgSpice Name: d_and

-.model u30 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 

-* Schematic Name: d_inverter, NgSpice Name: d_inverter

-.model u27 d_inverter(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 

-* Schematic Name: d_or, NgSpice Name: d_or

-.model u33 d_or(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 

-* Schematic Name: d_or, NgSpice Name: d_or

-.model u40 d_or(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 

-* Schematic Name: d_and, NgSpice Name: d_and

-.model u32 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 

-* Schematic Name: d_and, NgSpice Name: d_and

-.model u34 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 

-* Schematic Name: d_and, NgSpice Name: d_and

-.model u38 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 

-* Schematic Name: d_and, NgSpice Name: d_and

-.model u42 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 

-* Schematic Name: d_inverter, NgSpice Name: d_inverter

-.model u31 d_inverter(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 

-* Schematic Name: d_inverter, NgSpice Name: d_inverter

-.model u37 d_inverter(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 

-* Schematic Name: d_or, NgSpice Name: d_or

-.model u39 d_or(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 

-* Schematic Name: d_and, NgSpice Name: d_and

-.model u36 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 

-* Schematic Name: d_and, NgSpice Name: d_and

-.model u41 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 

-* Schematic Name: d_dff, NgSpice Name: d_dff

-.model u9 d_dff(ic=0 set_delay=1.0e-9 set_load=1.0e-12 reset_load=1.0e-12 clk_delay=1.0e-9 clk_load=1.0e-12 reset_delay=1.0 data_load=1.0e-12 fall_delay=1.0e-9 rise_delay=1.0e-9 ) 

-* Schematic Name: d_inverter, NgSpice Name: d_inverter

-.model u35 d_inverter(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 

-* Schematic Name: d_dff, NgSpice Name: d_dff

-.model u24 d_dff(ic=0 set_delay=1.0e-9 set_load=1.0e-12 reset_load=1.0e-12 clk_delay=1.0e-9 clk_load=1.0e-12 reset_delay=1.0 data_load=1.0e-12 fall_delay=1.0e-9 rise_delay=1.0e-9 ) 

-* Schematic Name: d_or, NgSpice Name: d_or

-.model u45 d_or(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 

-* Schematic Name: d_and, NgSpice Name: d_and

-.model u46 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 

-* Schematic Name: d_and, NgSpice Name: d_and

-.model u44 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 

-* Schematic Name: d_inverter, NgSpice Name: d_inverter

-.model u43 d_inverter(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 

-.ac lin 0 0Hz 0Hz

-

-* Control Statements 

-.control

-run

-print allv > plot_data_v.txt

-print alli > plot_data_i.txt

-.endc

-.end

diff --git a/src/SubcircuitLibrary/9bit-Right_shift_register/9bit-Right_shift_register.pro b/src/SubcircuitLibrary/9bit-Right_shift_register/9bit-Right_shift_register.pro
deleted file mode 100644
index ec294cbd..00000000
--- a/src/SubcircuitLibrary/9bit-Right_shift_register/9bit-Right_shift_register.pro
+++ /dev/null
@@ -1,85 +0,0 @@
-update=Sat Jun 22 13:15:27 2019
-version=1
-last_client=eeschema
-[general]
-version=1
-RootSch=
-BoardNm=
-[pcbnew]
-version=1
-LastNetListRead=
-UseCmpFile=1
-PadDrill=0.600000000000
-PadDrillOvalY=0.600000000000
-PadSizeH=1.500000000000
-PadSizeV=1.500000000000
-PcbTextSizeV=1.500000000000
-PcbTextSizeH=1.500000000000
-PcbTextThickness=0.300000000000
-ModuleTextSizeV=1.000000000000
-ModuleTextSizeH=1.000000000000
-ModuleTextSizeThickness=0.150000000000
-SolderMaskClearance=0.000000000000
-SolderMaskMinWidth=0.000000000000
-DrawSegmentWidth=0.200000000000
-BoardOutlineThickness=0.100000000000
-ModuleOutlineThickness=0.150000000000
-[cvpcb]
-version=1
-NetIExt=net
-[schematic_editor]
-version=1
-PageLayoutDescrFile=
-PlotDirectoryName=
-SubpartIdSeparator=0
-SubpartFirstId=65
-NetFmtName=
-SpiceForceRefPrefix=0
-SpiceUseNetNumbers=0
-LabSize=60
-[eeschema]
-version=1
-LibDir=../../Abhradip_9bit-ShiftRegister/9bit-ShiftRegister;../../../eSim-1.1.2/kicadSchematicLibrary
-[eeschema/libraries]
-LibName1=power
-LibName2=device
-LibName3=transistors
-LibName4=conn
-LibName5=linear
-LibName6=regul
-LibName7=74xx
-LibName8=cmos4000
-LibName9=adc-dac
-LibName10=memory
-LibName11=xilinx
-LibName12=microcontrollers
-LibName13=dsp
-LibName14=microchip
-LibName15=analog_switches
-LibName16=motorola
-LibName17=texas
-LibName18=intel
-LibName19=audio
-LibName20=interface
-LibName21=digital-audio
-LibName22=philips
-LibName23=display
-LibName24=cypress
-LibName25=siliconi
-LibName26=opto
-LibName27=atmel
-LibName28=contrib
-LibName29=valves
-LibName30=half-adder
-LibName31=9bit-Right_shift_register-cache
-LibName32=/home/mallikarjuna/Downloads/Abhradip/Abhradip_9bit-ShiftRegister/9bit-ShiftRegister/9bit-ShiftRegister-cache
-LibName33=eSim_Analog
-LibName34=eSim_Devices
-LibName35=eSim_Digital
-LibName36=eSim_Hybrid
-LibName37=eSim_Miscellaneous
-LibName38=eSim_Plot
-LibName39=eSim_Power
-LibName40=eSim_Sources
-LibName41=eSim_Subckt
-LibName42=eSim_User
diff --git a/src/SubcircuitLibrary/9bit-Right_shift_register/9bit-Right_shift_register.sch b/src/SubcircuitLibrary/9bit-Right_shift_register/9bit-Right_shift_register.sch
deleted file mode 100644
index b14a8f30..00000000
--- a/src/SubcircuitLibrary/9bit-Right_shift_register/9bit-Right_shift_register.sch
+++ /dev/null
@@ -1,1495 +0,0 @@
-EESchema Schematic File Version 2
-LIBS:power
-LIBS:device
-LIBS:transistors
-LIBS:conn
-LIBS:linear
-LIBS:regul
-LIBS:74xx
-LIBS:cmos4000
-LIBS:adc-dac
-LIBS:memory
-LIBS:xilinx
-LIBS:microcontrollers
-LIBS:dsp
-LIBS:microchip
-LIBS:analog_switches
-LIBS:motorola
-LIBS:texas
-LIBS:intel
-LIBS:audio
-LIBS:interface
-LIBS:digital-audio
-LIBS:philips
-LIBS:display
-LIBS:cypress
-LIBS:siliconi
-LIBS:opto
-LIBS:atmel
-LIBS:contrib
-LIBS:valves
-LIBS:eSim_Analog
-LIBS:eSim_Devices
-LIBS:eSim_Digital
-LIBS:eSim_Hybrid
-LIBS:eSim_Miscellaneous
-LIBS:eSim_Plot
-LIBS:eSim_Power
-LIBS:eSim_PSpice
-LIBS:eSim_Sources
-LIBS:eSim_Subckt
-LIBS:eSim_User
-LIBS:9bit-Right_shift_register-cache
-EELAYER 25 0
-EELAYER END
-$Descr A3 16535 11693
-encoding utf-8
-Sheet 1 1
-Title ""
-Date ""
-Rev ""
-Comp ""
-Comment1 ""
-Comment2 ""
-Comment3 ""
-Comment4 ""
-$EndDescr
-$Comp
-L d_dff U3
-U 1 1 5C9296A4
-P 5950 4850
-F 0 "U3" H 5950 4850 60  0000 C CNN
-F 1 "d_dff" H 5950 5000 60  0000 C CNN
-F 2 "" H 5950 4850 60  0000 C CNN
-F 3 "" H 5950 4850 60  0000 C CNN
-	1    5950 4850
-	1    0    0    -1  
-$EndComp
-$Comp
-L d_dff U4
-U 1 1 5C9296E7
-P 7250 4850
-F 0 "U4" H 7250 4850 60  0000 C CNN
-F 1 "d_dff" H 7250 5000 60  0000 C CNN
-F 2 "" H 7250 4850 60  0000 C CNN
-F 3 "" H 7250 4850 60  0000 C CNN
-	1    7250 4850
-	1    0    0    -1  
-$EndComp
-$Comp
-L d_dff U6
-U 1 1 5C92970E
-P 8550 4850
-F 0 "U6" H 8550 4850 60  0000 C CNN
-F 1 "d_dff" H 8550 5000 60  0000 C CNN
-F 2 "" H 8550 4850 60  0000 C CNN
-F 3 "" H 8550 4850 60  0000 C CNN
-	1    8550 4850
-	1    0    0    -1  
-$EndComp
-$Comp
-L d_dff U15
-U 1 1 5C92975C
-P 11150 4850
-F 0 "U15" H 11150 4850 60  0000 C CNN
-F 1 "d_dff" H 11150 5000 60  0000 C CNN
-F 2 "" H 11150 4850 60  0000 C CNN
-F 3 "" H 11150 4850 60  0000 C CNN
-	1    11150 4850
-	1    0    0    -1  
-$EndComp
-$Comp
-L d_dff U2
-U 1 1 5C929793
-P 4650 4850
-F 0 "U2" H 4650 4850 60  0000 C CNN
-F 1 "d_dff" H 4650 5000 60  0000 C CNN
-F 2 "" H 4650 4850 60  0000 C CNN
-F 3 "" H 4650 4850 60  0000 C CNN
-	1    4650 4850
-	1    0    0    -1  
-$EndComp
-$Comp
-L d_dff U1
-U 1 1 5C9297E2
-P 3350 4850
-F 0 "U1" H 3350 4850 60  0000 C CNN
-F 1 "d_dff" H 3350 5000 60  0000 C CNN
-F 2 "" H 3350 4850 60  0000 C CNN
-F 3 "" H 3350 4850 60  0000 C CNN
-	1    3350 4850
-	1    0    0    -1  
-$EndComp
-$Comp
-L d_dff U18
-U 1 1 5C92A1EB
-P 12450 4850
-F 0 "U18" H 12450 4850 60  0000 C CNN
-F 1 "d_dff" H 12450 5000 60  0000 C CNN
-F 2 "" H 12450 4850 60  0000 C CNN
-F 3 "" H 12450 4850 60  0000 C CNN
-	1    12450 4850
-	1    0    0    -1  
-$EndComp
-Wire Wire Line
-	7900 3800 7900 2450
-Wire Wire Line
-	8000 3700 8000 2550
-Wire Wire Line
-	8100 3600 8100 2650
-Wire Wire Line
-	8200 2750 8200 3500
-Wire Wire Line
-	8200 2750 8900 2750
-Wire Wire Line
-	8100 2650 9300 2650
-Wire Wire Line
-	8000 2550 8900 2550
-Wire Wire Line
-	7900 2450 9300 2450
-Wire Wire Line
-	7800 2350 8900 2350
-Wire Wire Line
-	6500 2250 9300 2250
-Wire Wire Line
-	3900 2050 9300 2050
-$Comp
-L d_or U11
-U 1 1 5C942586
-P 3450 6100
-F 0 "U11" H 3450 6100 60  0000 C CNN
-F 1 "d_or" H 3450 6200 60  0000 C CNN
-F 2 "" H 3450 6100 60  0000 C CNN
-F 3 "" H 3450 6100 60  0000 C CNN
-	1    3450 6100
-	-1   0    0    1   
-$EndComp
-$Comp
-L d_or U14
-U 1 1 5C9425C0
-P 4550 6100
-F 0 "U14" H 4550 6100 60  0000 C CNN
-F 1 "d_or" H 4550 6200 60  0000 C CNN
-F 2 "" H 4550 6100 60  0000 C CNN
-F 3 "" H 4550 6100 60  0000 C CNN
-	1    4550 6100
-	-1   0    0    1   
-$EndComp
-$Comp
-L d_or U20
-U 1 1 5C942640
-P 6450 7450
-F 0 "U20" H 6450 7450 60  0000 C CNN
-F 1 "d_or" H 6450 7550 60  0000 C CNN
-F 2 "" H 6450 7450 60  0000 C CNN
-F 3 "" H 6450 7450 60  0000 C CNN
-	1    6450 7450
-	-1   0    0    1   
-$EndComp
-$Comp
-L d_and U10
-U 1 1 5C9427D3
-P 3300 6950
-F 0 "U10" H 3300 6950 60  0000 C CNN
-F 1 "d_and" H 3350 7050 60  0000 C CNN
-F 2 "" H 3300 6950 60  0000 C CNN
-F 3 "" H 3300 6950 60  0000 C CNN
-	1    3300 6950
-	0    -1   -1   0   
-$EndComp
-$Comp
-L d_and U8
-U 1 1 5C942854
-P 2950 6950
-F 0 "U8" H 2950 6950 60  0000 C CNN
-F 1 "d_and" H 3000 7050 60  0000 C CNN
-F 2 "" H 2950 6950 60  0000 C CNN
-F 3 "" H 2950 6950 60  0000 C CNN
-	1    2950 6950
-	0    -1   -1   0   
-$EndComp
-$Comp
-L d_inverter U7
-U 1 1 5C942F4F
-P 2850 7850
-F 0 "U7" H 2850 7750 60  0000 C CNN
-F 1 "d_inverter" H 2850 8000 60  0000 C CNN
-F 2 "" H 2900 7800 60  0000 C CNN
-F 3 "" H 2900 7800 60  0000 C CNN
-	1    2850 7850
-	0    -1   -1   0   
-$EndComp
-$Comp
-L d_and U13
-U 1 1 5C943518
-P 4350 6850
-F 0 "U13" H 4350 6850 60  0000 C CNN
-F 1 "d_and" H 4400 6950 60  0000 C CNN
-F 2 "" H 4350 6850 60  0000 C CNN
-F 3 "" H 4350 6850 60  0000 C CNN
-	1    4350 6850
-	0    -1   -1   0   
-$EndComp
-$Comp
-L d_and U16
-U 1 1 5C94358F
-P 4700 6850
-F 0 "U16" H 4700 6850 60  0000 C CNN
-F 1 "d_and" H 4750 6950 60  0000 C CNN
-F 2 "" H 4700 6850 60  0000 C CNN
-F 3 "" H 4700 6850 60  0000 C CNN
-	1    4700 6850
-	0    -1   -1   0   
-$EndComp
-$Comp
-L d_inverter U12
-U 1 1 5C944206
-P 4250 7850
-F 0 "U12" H 4250 7750 60  0000 C CNN
-F 1 "d_inverter" H 4250 8000 60  0000 C CNN
-F 2 "" H 4300 7800 60  0000 C CNN
-F 3 "" H 4300 7800 60  0000 C CNN
-	1    4250 7850
-	0    -1   -1   0   
-$EndComp
-$Comp
-L d_and U19
-U 1 1 5C947143
-P 6350 8200
-F 0 "U19" H 6350 8200 60  0000 C CNN
-F 1 "d_and" H 6400 8300 60  0000 C CNN
-F 2 "" H 6350 8200 60  0000 C CNN
-F 3 "" H 6350 8200 60  0000 C CNN
-	1    6350 8200
-	0    -1   -1   0   
-$EndComp
-$Comp
-L d_and U21
-U 1 1 5C9471B3
-P 6700 8200
-F 0 "U21" H 6700 8200 60  0000 C CNN
-F 1 "d_and" H 6750 8300 60  0000 C CNN
-F 2 "" H 6700 8200 60  0000 C CNN
-F 3 "" H 6700 8200 60  0000 C CNN
-	1    6700 8200
-	0    -1   -1   0   
-$EndComp
-$Comp
-L d_inverter U17
-U 1 1 5C94722C
-P 5950 8950
-F 0 "U17" H 5950 8850 60  0000 C CNN
-F 1 "d_inverter" H 5950 9100 60  0000 C CNN
-F 2 "" H 6000 8900 60  0000 C CNN
-F 3 "" H 6000 8900 60  0000 C CNN
-	1    5950 8950
-	1    0    0    -1  
-$EndComp
-$Comp
-L d_or U25
-U 1 1 5C94A04A
-P 7950 6250
-F 0 "U25" H 7950 6250 60  0000 C CNN
-F 1 "d_or" H 7950 6350 60  0000 C CNN
-F 2 "" H 7950 6250 60  0000 C CNN
-F 3 "" H 7950 6250 60  0000 C CNN
-	1    7950 6250
-	-1   0    0    1   
-$EndComp
-$Comp
-L d_and U23
-U 1 1 5C94A0C3
-P 7800 7050
-F 0 "U23" H 7800 7050 60  0000 C CNN
-F 1 "d_and" H 7850 7150 60  0000 C CNN
-F 2 "" H 7800 7050 60  0000 C CNN
-F 3 "" H 7800 7050 60  0000 C CNN
-	1    7800 7050
-	0    -1   -1   0   
-$EndComp
-$Comp
-L d_and U26
-U 1 1 5C94A14D
-P 8150 7050
-F 0 "U26" H 8150 7050 60  0000 C CNN
-F 1 "d_and" H 8200 7150 60  0000 C CNN
-F 2 "" H 8150 7050 60  0000 C CNN
-F 3 "" H 8150 7050 60  0000 C CNN
-	1    8150 7050
-	0    -1   -1   0   
-$EndComp
-$Comp
-L d_inverter U22
-U 1 1 5C94A510
-P 7700 8000
-F 0 "U22" H 7700 7900 60  0000 C CNN
-F 1 "d_inverter" H 7700 8150 60  0000 C CNN
-F 2 "" H 7750 7950 60  0000 C CNN
-F 3 "" H 7750 7950 60  0000 C CNN
-	1    7700 8000
-	0    -1   -1   0   
-$EndComp
-$Comp
-L d_or U29
-U 1 1 5C94E1FD
-P 9900 5850
-F 0 "U29" H 9900 5850 60  0000 C CNN
-F 1 "d_or" H 9900 5950 60  0000 C CNN
-F 2 "" H 9900 5850 60  0000 C CNN
-F 3 "" H 9900 5850 60  0000 C CNN
-	1    9900 5850
-	-1   0    0    1   
-$EndComp
-$Comp
-L d_and U28
-U 1 1 5C94E286
-P 9750 6650
-F 0 "U28" H 9750 6650 60  0000 C CNN
-F 1 "d_and" H 9800 6750 60  0000 C CNN
-F 2 "" H 9750 6650 60  0000 C CNN
-F 3 "" H 9750 6650 60  0000 C CNN
-	1    9750 6650
-	0    -1   -1   0   
-$EndComp
-$Comp
-L d_and U30
-U 1 1 5C94E302
-P 10100 6650
-F 0 "U30" H 10100 6650 60  0000 C CNN
-F 1 "d_and" H 10150 6750 60  0000 C CNN
-F 2 "" H 10100 6650 60  0000 C CNN
-F 3 "" H 10100 6650 60  0000 C CNN
-	1    10100 6650
-	0    -1   -1   0   
-$EndComp
-$Comp
-L d_inverter U27
-U 1 1 5C94E385
-P 9650 7600
-F 0 "U27" H 9650 7500 60  0000 C CNN
-F 1 "d_inverter" H 9650 7750 60  0000 C CNN
-F 2 "" H 9700 7550 60  0000 C CNN
-F 3 "" H 9700 7550 60  0000 C CNN
-	1    9650 7600
-	0    -1   -1   0   
-$EndComp
-$Comp
-L d_or U33
-U 1 1 5C94FC0A
-P 11150 5850
-F 0 "U33" H 11150 5850 60  0000 C CNN
-F 1 "d_or" H 11150 5950 60  0000 C CNN
-F 2 "" H 11150 5850 60  0000 C CNN
-F 3 "" H 11150 5850 60  0000 C CNN
-	1    11150 5850
-	-1   0    0    1   
-$EndComp
-$Comp
-L d_or U40
-U 1 1 5C94FC89
-P 12450 5850
-F 0 "U40" H 12450 5850 60  0000 C CNN
-F 1 "d_or" H 12450 5950 60  0000 C CNN
-F 2 "" H 12450 5850 60  0000 C CNN
-F 3 "" H 12450 5850 60  0000 C CNN
-	1    12450 5850
-	-1   0    0    1   
-$EndComp
-$Comp
-L d_and U32
-U 1 1 5C94FD1B
-P 11000 6650
-F 0 "U32" H 11000 6650 60  0000 C CNN
-F 1 "d_and" H 11050 6750 60  0000 C CNN
-F 2 "" H 11000 6650 60  0000 C CNN
-F 3 "" H 11000 6650 60  0000 C CNN
-	1    11000 6650
-	0    -1   -1   0   
-$EndComp
-$Comp
-L d_and U34
-U 1 1 5C94FDA6
-P 11350 6650
-F 0 "U34" H 11350 6650 60  0000 C CNN
-F 1 "d_and" H 11400 6750 60  0000 C CNN
-F 2 "" H 11350 6650 60  0000 C CNN
-F 3 "" H 11350 6650 60  0000 C CNN
-	1    11350 6650
-	0    -1   -1   0   
-$EndComp
-$Comp
-L d_and U38
-U 1 1 5C94FE38
-P 12300 6650
-F 0 "U38" H 12300 6650 60  0000 C CNN
-F 1 "d_and" H 12350 6750 60  0000 C CNN
-F 2 "" H 12300 6650 60  0000 C CNN
-F 3 "" H 12300 6650 60  0000 C CNN
-	1    12300 6650
-	0    -1   -1   0   
-$EndComp
-$Comp
-L d_and U42
-U 1 1 5C94FEC5
-P 12600 6650
-F 0 "U42" H 12600 6650 60  0000 C CNN
-F 1 "d_and" H 12650 6750 60  0000 C CNN
-F 2 "" H 12600 6650 60  0000 C CNN
-F 3 "" H 12600 6650 60  0000 C CNN
-	1    12600 6650
-	0    -1   -1   0   
-$EndComp
-$Comp
-L d_inverter U31
-U 1 1 5C95027B
-P 10900 7600
-F 0 "U31" H 10900 7500 60  0000 C CNN
-F 1 "d_inverter" H 10900 7750 60  0000 C CNN
-F 2 "" H 10950 7550 60  0000 C CNN
-F 3 "" H 10950 7550 60  0000 C CNN
-	1    10900 7600
-	0    -1   -1   0   
-$EndComp
-$Comp
-L d_inverter U37
-U 1 1 5C950310
-P 12200 7600
-F 0 "U37" H 12200 7500 60  0000 C CNN
-F 1 "d_inverter" H 12200 7750 60  0000 C CNN
-F 2 "" H 12250 7550 60  0000 C CNN
-F 3 "" H 12250 7550 60  0000 C CNN
-	1    12200 7600
-	0    -1   -1   0   
-$EndComp
-$Comp
-L d_or U39
-U 1 1 5C956491
-P 12350 3100
-F 0 "U39" H 12350 3100 60  0000 C CNN
-F 1 "d_or" H 12350 3200 60  0000 C CNN
-F 2 "" H 12350 3100 60  0000 C CNN
-F 3 "" H 12350 3100 60  0000 C CNN
-	1    12350 3100
-	-1   0    0    1   
-$EndComp
-$Comp
-L d_and U36
-U 1 1 5C956C09
-P 12200 2550
-F 0 "U36" H 12200 2550 60  0000 C CNN
-F 1 "d_and" H 12250 2650 60  0000 C CNN
-F 2 "" H 12200 2550 60  0000 C CNN
-F 3 "" H 12200 2550 60  0000 C CNN
-	1    12200 2550
-	0    1    1    0   
-$EndComp
-$Comp
-L d_and U41
-U 1 1 5C95766B
-P 12500 2550
-F 0 "U41" H 12500 2550 60  0000 C CNN
-F 1 "d_and" H 12550 2650 60  0000 C CNN
-F 2 "" H 12500 2550 60  0000 C CNN
-F 3 "" H 12500 2550 60  0000 C CNN
-	1    12500 2550
-	0    1    1    0   
-$EndComp
-Text Notes 10300 2100 0    60   ~ 0
-IN0
-Text Notes 12050 9000 0    60   ~ 0
-IN1
-Text Notes 10700 9000 0    60   ~ 0
-IN2
-Text Notes 9500 9000 0    60   ~ 0
-IN3
-Text Notes 7500 9050 0    60   ~ 0
-IN4
-Text Notes 6150 9050 0    60   ~ 0
-IN5
-Text Notes 4050 9100 0    60   ~ 0
-IN6
-Text Notes 2750 9050 0    60   ~ 0
-IN7
-Text Notes 12850 8650 0    60   ~ 0
-CI
-Text Notes 8700 2850 0    60   ~ 0
-O0
-Text Notes 8500 2750 0    60   ~ 0
-O1
-Text Notes 8700 2650 0    60   ~ 0
-O2
-Text Notes 8500 2550 0    60   ~ 0
-O3
-Text Notes 8700 2450 0    60   ~ 0
-O4
-Text Notes 8500 2350 0    60   ~ 0
-O5
-Text Notes 8700 2250 0    60   ~ 0
-O6
-Text Notes 8500 2150 0    60   ~ 0
-O7
-$Comp
-L d_dff U9
-U 1 1 5C92973B
-P 9850 4850
-F 0 "U9" H 9850 4850 60  0000 C CNN
-F 1 "d_dff" H 9850 5000 60  0000 C CNN
-F 2 "" H 9850 4850 60  0000 C CNN
-F 3 "" H 9850 4850 60  0000 C CNN
-	1    9850 4850
-	1    0    0    -1  
-$EndComp
-$Comp
-L d_inverter U35
-U 1 1 5C9582C3
-P 11500 2550
-F 0 "U35" H 11500 2450 60  0000 C CNN
-F 1 "d_inverter" H 11500 2700 60  0000 C CNN
-F 2 "" H 11550 2500 60  0000 C CNN
-F 3 "" H 11550 2500 60  0000 C CNN
-	1    11500 2550
-	0    1    1    0   
-$EndComp
-$Comp
-L d_dff U24
-U 1 1 5C95D8E8
-P 3350 3000
-F 0 "U24" H 3350 3000 60  0000 C CNN
-F 1 "d_dff" H 3350 3150 60  0000 C CNN
-F 2 "" H 3350 3000 60  0000 C CNN
-F 3 "" H 3350 3000 60  0000 C CNN
-	1    3350 3000
-	1    0    0    -1  
-$EndComp
-Wire Wire Line
-	3350 3600 3350 4200
-Wire Wire Line
-	2600 4000 12450 4000
-Wire Wire Line
-	12450 4000 12450 4200
-Connection ~ 11150 4000
-Wire Wire Line
-	11150 4200 11150 4000
-Wire Wire Line
-	9850 4200 9850 4000
-Connection ~ 9850 4000
-Wire Wire Line
-	8550 4200 8550 4000
-Connection ~ 8550 4000
-Wire Wire Line
-	5950 4200 5950 4000
-Connection ~ 5950 4000
-Wire Wire Line
-	7250 4200 7250 4000
-Connection ~ 7250 4000
-Wire Wire Line
-	4650 4200 4650 4000
-Connection ~ 4650 4000
-Wire Wire Line
-	3350 5450 3350 5600
-Wire Wire Line
-	2600 5600 12450 5600
-Wire Wire Line
-	4650 5600 4650 5450
-Wire Wire Line
-	5950 5600 5950 5450
-Connection ~ 4650 5600
-Wire Wire Line
-	7250 5600 7250 5450
-Connection ~ 5950 5600
-Wire Wire Line
-	8550 5600 8550 5450
-Connection ~ 7250 5600
-Wire Wire Line
-	9850 5600 9850 5450
-Connection ~ 8550 5600
-Wire Wire Line
-	11150 5600 11150 5450
-Connection ~ 9850 5600
-Wire Wire Line
-	12450 5600 12450 5450
-Connection ~ 11150 5600
-Wire Wire Line
-	2600 2050 2600 5600
-Connection ~ 3350 4000
-Connection ~ 3350 5600
-Connection ~ 2600 4000
-Wire Wire Line
-	3350 2350 3350 2250
-Wire Wire Line
-	3350 2250 2600 2250
-Wire Wire Line
-	2600 2050 2850 2050
-Connection ~ 2600 2250
-Wire Wire Line
-	2800 3300 2650 3300
-Wire Wire Line
-	2650 3300 2650 5500
-Wire Wire Line
-	2650 5150 2800 5150
-Wire Wire Line
-	2650 5500 11850 5500
-Wire Wire Line
-	4050 5500 4050 5150
-Wire Wire Line
-	4050 5150 4100 5150
-Connection ~ 2650 5150
-Wire Wire Line
-	5400 5150 5350 5150
-Wire Wire Line
-	5350 5150 5350 5500
-Connection ~ 4050 5500
-Wire Wire Line
-	6650 5500 6650 5150
-Wire Wire Line
-	6650 5150 6700 5150
-Connection ~ 5350 5500
-Wire Wire Line
-	7950 5500 7950 5150
-Wire Wire Line
-	7950 5150 8000 5150
-Connection ~ 6650 5500
-Wire Wire Line
-	9250 5500 9250 5150
-Wire Wire Line
-	9250 5150 9300 5150
-Connection ~ 7950 5500
-Wire Wire Line
-	10550 5500 10550 5150
-Wire Wire Line
-	10550 5150 10600 5150
-Connection ~ 9250 5500
-Wire Wire Line
-	11850 5500 11850 5150
-Wire Wire Line
-	11850 5150 11900 5150
-Connection ~ 10550 5500
-Wire Wire Line
-	2650 3500 3150 3500
-Wire Wire Line
-	3150 3500 3150 3650
-Connection ~ 2650 3500
-Wire Wire Line
-	3950 2650 3900 2650
-Wire Wire Line
-	3950 2250 3950 2650
-Wire Wire Line
-	3950 2250 3750 2250
-Wire Wire Line
-	3750 2250 3750 1950
-Text Notes 8700 2050 0    60   ~ 0
-O8
-Wire Wire Line
-	13000 4500 13100 4500
-Wire Wire Line
-	13100 4500 13100 3500
-Wire Wire Line
-	13100 3500 8200 3500
-Wire Wire Line
-	8100 3600 11750 3600
-Wire Wire Line
-	11750 3600 11750 4500
-Wire Wire Line
-	11750 4500 11700 4500
-Wire Wire Line
-	8000 3700 10450 3700
-Wire Wire Line
-	10450 3700 10450 4500
-Wire Wire Line
-	10450 4500 10400 4500
-Wire Wire Line
-	7900 3800 9150 3800
-Wire Wire Line
-	9150 3800 9150 4500
-Wire Wire Line
-	9150 4500 9100 4500
-Wire Wire Line
-	7800 2350 7800 4300
-Wire Wire Line
-	7800 4300 7850 4300
-Wire Wire Line
-	7850 4300 7850 4500
-Wire Wire Line
-	7850 4500 7800 4500
-Wire Wire Line
-	6500 2250 6500 4300
-Wire Wire Line
-	6500 4300 6550 4300
-Wire Wire Line
-	6550 4300 6550 4500
-Wire Wire Line
-	6550 4500 6500 4500
-Wire Wire Line
-	3900 2050 3900 2150
-Wire Wire Line
-	3900 2150 4100 2150
-Wire Wire Line
-	4100 2150 4100 4250
-Wire Wire Line
-	4100 4250 3950 4250
-Wire Wire Line
-	3950 4250 3950 4500
-Wire Wire Line
-	3950 4500 3900 4500
-$Comp
-L d_or U45
-U 1 1 5C9948BA
-P 4650 3350
-F 0 "U45" H 4650 3350 60  0000 C CNN
-F 1 "d_or" H 4650 3450 60  0000 C CNN
-F 2 "" H 4650 3350 60  0000 C CNN
-F 3 "" H 4650 3350 60  0000 C CNN
-	1    4650 3350
-	-1   0    0    1   
-$EndComp
-$Comp
-L d_and U46
-U 1 1 5C994A8D
-P 4850 2700
-F 0 "U46" H 4850 2700 60  0000 C CNN
-F 1 "d_and" H 4900 2800 60  0000 C CNN
-F 2 "" H 4850 2700 60  0000 C CNN
-F 3 "" H 4850 2700 60  0000 C CNN
-	1    4850 2700
-	0    1    1    0   
-$EndComp
-$Comp
-L d_and U44
-U 1 1 5C994B61
-P 4550 2700
-F 0 "U44" H 4550 2700 60  0000 C CNN
-F 1 "d_and" H 4600 2800 60  0000 C CNN
-F 2 "" H 4550 2700 60  0000 C CNN
-F 3 "" H 4550 2700 60  0000 C CNN
-	1    4550 2700
-	0    1    1    0   
-$EndComp
-$Comp
-L d_inverter U43
-U 1 1 5C994C4E
-P 4300 2650
-F 0 "U43" H 4300 2550 60  0000 C CNN
-F 1 "d_inverter" H 4300 2800 60  0000 C CNN
-F 2 "" H 4350 2600 60  0000 C CNN
-F 3 "" H 4350 2600 60  0000 C CNN
-	1    4300 2650
-	0    1    1    0   
-$EndComp
-Wire Wire Line
-	4300 2950 4400 2950
-Wire Wire Line
-	4400 2950 4400 2200
-Wire Wire Line
-	4400 2200 4550 2200
-Wire Wire Line
-	4550 2200 4550 2250
-Wire Wire Line
-	2850 7550 2850 7400
-Wire Wire Line
-	2850 8150 2850 8700
-Wire Wire Line
-	2850 8700 13000 8700
-Wire Wire Line
-	12200 7900 12200 8700
-Connection ~ 12200 8700
-Wire Wire Line
-	12200 7300 12200 7100
-Wire Wire Line
-	12500 7100 12500 8700
-Connection ~ 12500 8700
-Wire Wire Line
-	10900 7300 10900 7100
-Wire Wire Line
-	10900 7900 10900 8700
-Connection ~ 10900 8700
-Wire Wire Line
-	11250 7100 11250 8700
-Connection ~ 11250 8700
-Wire Wire Line
-	9650 7100 9650 7300
-Wire Wire Line
-	10000 7100 10000 8700
-Connection ~ 10000 8700
-Wire Wire Line
-	9650 7900 9650 8700
-Connection ~ 9650 8700
-Wire Wire Line
-	7700 7700 7700 7500
-Wire Wire Line
-	7700 8300 7700 8700
-Connection ~ 7700 8700
-Wire Wire Line
-	8050 7500 8050 8700
-Connection ~ 8050 8700
-Wire Wire Line
-	5650 8950 5650 8700
-Connection ~ 5650 8700
-Wire Wire Line
-	6250 8950 6250 8650
-Wire Wire Line
-	6600 8650 6600 8700
-Connection ~ 6600 8700
-Wire Wire Line
-	3200 7400 3200 8700
-Connection ~ 3200 8700
-Wire Wire Line
-	4250 8700 4250 8150
-Connection ~ 4250 8700
-Wire Wire Line
-	4250 7550 4250 7300
-Wire Wire Line
-	4600 7300 4600 8700
-Connection ~ 4600 8700
-Wire Wire Line
-	11500 2850 11500 2950
-Wire Wire Line
-	11500 2950 12050 2950
-Wire Wire Line
-	12050 2950 12050 2050
-Wire Wire Line
-	12050 2050 12200 2050
-Wire Wire Line
-	12200 2050 12200 2100
-Wire Wire Line
-	11500 2250 11300 2250
-Wire Wire Line
-	11300 1900 11300 3450
-Wire Wire Line
-	5650 3450 13250 3450
-Wire Wire Line
-	13250 3450 13250 8500
-Wire Wire Line
-	13250 8500 12750 8500
-Wire Wire Line
-	12750 8500 12750 8700
-Connection ~ 12750 8700
-Wire Wire Line
-	11300 1900 12500 1900
-Wire Wire Line
-	12500 1900 12500 2100
-Connection ~ 11300 2250
-Wire Wire Line
-	5650 2000 5650 3450
-Connection ~ 11300 3450
-Wire Wire Line
-	3750 1950 8900 1950
-Wire Wire Line
-	4300 2350 4300 2000
-Wire Wire Line
-	4300 2000 5650 2000
-Wire Wire Line
-	4850 2250 4850 2000
-Connection ~ 4850 2000
-Wire Wire Line
-	2800 2300 2800 2650
-Wire Wire Line
-	2800 2300 4050 2300
-Wire Wire Line
-	4050 2300 4050 3400
-Wire Wire Line
-	4050 3400 4200 3400
-Wire Wire Line
-	4600 3150 4600 3250
-Wire Wire Line
-	4600 3250 5100 3250
-Wire Wire Line
-	5100 3250 5100 3350
-Wire Wire Line
-	4900 3150 5150 3150
-Wire Wire Line
-	5150 3150 5150 3450
-Wire Wire Line
-	5150 3450 5100 3450
-Wire Wire Line
-	4650 2250 4650 2100
-Wire Wire Line
-	4650 2100 5450 2100
-Wire Wire Line
-	5450 2100 5450 2500
-Wire Wire Line
-	4950 2250 5100 2250
-Wire Wire Line
-	5100 2250 5100 3000
-Wire Wire Line
-	5100 3000 8200 3000
-Connection ~ 8200 3000
-Wire Wire Line
-	3950 2550 4000 2550
-Wire Wire Line
-	4000 2550 4000 7450
-Wire Wire Line
-	4000 7450 3300 7450
-Wire Wire Line
-	3300 7450 3300 7400
-Connection ~ 3950 2550
-Wire Wire Line
-	2800 4500 2750 4500
-Wire Wire Line
-	2750 4500 2750 6150
-Wire Wire Line
-	2750 6150 3000 6150
-Wire Wire Line
-	2900 6500 2900 6300
-Wire Wire Line
-	2900 6300 3900 6300
-Wire Wire Line
-	3900 6300 3900 6200
-Wire Wire Line
-	3900 6100 3950 6100
-Wire Wire Line
-	3950 6100 3950 6450
-Wire Wire Line
-	3950 6450 3250 6450
-Wire Wire Line
-	3250 6450 3250 6500
-Wire Wire Line
-	2950 7400 2950 9100
-Wire Wire Line
-	2950 9100 2700 9100
-Wire Wire Line
-	2700 9100 2700 9050
-Wire Wire Line
-	3950 9100 4350 9100
-Wire Wire Line
-	4350 9100 4350 7300
-Wire Wire Line
-	4100 4150 4400 4150
-Wire Wire Line
-	4400 4150 4400 5850
-Connection ~ 4100 4150
-Wire Wire Line
-	4400 5850 5300 5850
-Wire Wire Line
-	5300 5850 5300 7450
-Wire Wire Line
-	5300 7450 4700 7450
-Wire Wire Line
-	4700 7450 4700 7300
-Wire Wire Line
-	4650 6400 5150 6400
-Wire Wire Line
-	5150 6400 5150 6200
-Wire Wire Line
-	5150 6200 5000 6200
-Wire Wire Line
-	4100 6150 4100 5300
-Wire Wire Line
-	4100 5300 4200 5300
-Wire Wire Line
-	4200 5300 4200 4600
-Wire Wire Line
-	4200 4600 4050 4600
-Wire Wire Line
-	4050 4600 4050 4500
-Wire Wire Line
-	4050 4500 4100 4500
-Wire Wire Line
-	4300 6400 4300 6300
-Wire Wire Line
-	4300 6300 5100 6300
-Wire Wire Line
-	5100 6300 5100 6100
-Wire Wire Line
-	5100 6100 5000 6100
-Wire Wire Line
-	6350 8650 6350 9100
-Wire Wire Line
-	6350 9100 5850 9100
-Wire Wire Line
-	5400 4500 5350 4500
-Wire Wire Line
-	5350 4500 5350 5100
-Wire Wire Line
-	5350 5100 5300 5100
-Wire Wire Line
-	5300 5100 5300 5350
-Wire Wire Line
-	5300 5350 5600 5350
-Wire Wire Line
-	5600 5350 5600 7500
-Wire Wire Line
-	5600 7500 6000 7500
-Wire Wire Line
-	5250 4500 5200 4500
-Wire Wire Line
-	5200 2150 8900 2150
-Wire Wire Line
-	5200 2150 5200 4250
-Wire Wire Line
-	5200 4250 5250 4250
-Wire Wire Line
-	5250 4250 5250 4500
-Wire Wire Line
-	5250 4350 5750 4350
-Wire Wire Line
-	5750 4350 5750 7250
-Wire Wire Line
-	5750 7250 7250 7250
-Connection ~ 5250 4350
-Wire Wire Line
-	7250 7250 7250 8850
-Wire Wire Line
-	7250 8850 6700 8850
-Wire Wire Line
-	6700 8850 6700 8650
-Wire Wire Line
-	6650 7750 6650 7700
-Wire Wire Line
-	6650 7700 7050 7700
-Wire Wire Line
-	7050 7700 7050 7550
-Wire Wire Line
-	7050 7550 6900 7550
-Wire Wire Line
-	6300 7750 6300 7650
-Wire Wire Line
-	6300 7650 7150 7650
-Wire Wire Line
-	7150 7650 7150 7450
-Wire Wire Line
-	7150 7450 6900 7450
-Wire Wire Line
-	7450 9050 7800 9050
-Wire Wire Line
-	7800 9050 7800 7500
-Wire Wire Line
-	7750 6600 7750 6450
-Wire Wire Line
-	7750 6450 8550 6450
-Wire Wire Line
-	8550 6450 8550 6350
-Wire Wire Line
-	8550 6350 8400 6350
-Wire Wire Line
-	8400 6250 8600 6250
-Wire Wire Line
-	8600 6250 8600 6500
-Wire Wire Line
-	8600 6500 8100 6500
-Wire Wire Line
-	8100 6500 8100 6600
-Wire Wire Line
-	6600 4500 6700 4500
-Wire Wire Line
-	6600 4500 6600 6300
-Wire Wire Line
-	6600 6300 7500 6300
-Wire Wire Line
-	6500 4150 7100 4150
-Wire Wire Line
-	7100 4150 7100 6050
-Wire Wire Line
-	7100 6050 8800 6050
-Wire Wire Line
-	8800 6050 8800 7600
-Wire Wire Line
-	8800 7600 8150 7600
-Wire Wire Line
-	8150 7600 8150 7500
-Connection ~ 6500 4150
-Wire Wire Line
-	9750 7100 9750 9050
-Wire Wire Line
-	9750 9050 9400 9050
-Wire Wire Line
-	11000 7100 11000 9050
-Wire Wire Line
-	11000 9050 10650 9050
-Wire Wire Line
-	12300 7100 12300 9050
-Wire Wire Line
-	12300 9050 12050 9050
-Wire Wire Line
-	12250 6200 12250 6100
-Wire Wire Line
-	12250 6100 13000 6100
-Wire Wire Line
-	13000 6100 13000 5950
-Wire Wire Line
-	13000 5950 12900 5950
-Wire Wire Line
-	12900 5850 13100 5850
-Wire Wire Line
-	13100 5850 13100 6150
-Wire Wire Line
-	13100 6150 12550 6150
-Wire Wire Line
-	12550 6150 12550 6200
-Wire Wire Line
-	8000 4500 7900 4500
-Wire Wire Line
-	7900 4500 7900 5900
-Wire Wire Line
-	7900 5900 9450 5900
-Wire Wire Line
-	7800 4150 8400 4150
-Wire Wire Line
-	8400 4150 8400 5700
-Wire Wire Line
-	8400 5700 10550 5700
-Wire Wire Line
-	10550 5700 10550 7250
-Wire Wire Line
-	10550 7250 10100 7250
-Wire Wire Line
-	10100 7250 10100 7100
-Connection ~ 7800 4150
-Wire Wire Line
-	9700 6200 9700 6100
-Wire Wire Line
-	9700 6100 10450 6100
-Wire Wire Line
-	10450 6100 10450 5950
-Wire Wire Line
-	10450 5950 10350 5950
-Wire Wire Line
-	10350 5850 10500 5850
-Wire Wire Line
-	10500 5850 10500 6150
-Wire Wire Line
-	10500 6150 10050 6150
-Wire Wire Line
-	10050 6150 10050 6200
-Wire Wire Line
-	9300 4500 9200 4500
-Wire Wire Line
-	9200 4500 9200 5300
-Wire Wire Line
-	9200 5300 10650 5300
-Wire Wire Line
-	10650 5300 10650 5900
-Wire Wire Line
-	10650 5900 10700 5900
-Wire Wire Line
-	9150 4200 9650 4200
-Wire Wire Line
-	9650 4200 9650 4850
-Wire Wire Line
-	9650 4850 10450 4850
-Wire Wire Line
-	10450 4850 10450 5650
-Wire Wire Line
-	10450 5650 11750 5650
-Connection ~ 9150 4200
-Wire Wire Line
-	11750 5650 11750 7300
-Wire Wire Line
-	11750 7300 11350 7300
-Wire Wire Line
-	11350 7300 11350 7100
-Wire Wire Line
-	10950 6200 10950 6100
-Wire Wire Line
-	10950 6100 11650 6100
-Wire Wire Line
-	11650 6100 11650 5950
-Wire Wire Line
-	11650 5950 11600 5950
-Wire Wire Line
-	11600 5850 11700 5850
-Wire Wire Line
-	11700 5850 11700 6150
-Wire Wire Line
-	11700 6150 11300 6150
-Wire Wire Line
-	11300 6150 11300 6200
-Wire Wire Line
-	10600 4500 10600 4950
-Wire Wire Line
-	10600 4950 11350 4950
-Wire Wire Line
-	11350 4950 11350 5450
-Wire Wire Line
-	11350 5450 11950 5450
-Wire Wire Line
-	11950 5450 11950 5900
-Wire Wire Line
-	11950 5900 12000 5900
-Wire Wire Line
-	10450 4200 11000 4200
-Wire Wire Line
-	11000 4200 11000 4700
-Wire Wire Line
-	11000 4700 11800 4700
-Wire Wire Line
-	11800 4700 11800 5350
-Wire Wire Line
-	11800 5350 13150 5350
-Wire Wire Line
-	13150 5350 13150 7250
-Connection ~ 10450 4200
-Wire Wire Line
-	13150 7250 12600 7250
-Wire Wire Line
-	12600 7250 12600 7100
-Wire Wire Line
-	11900 4500 11800 4500
-Wire Wire Line
-	11800 4500 11800 3150
-Wire Wire Line
-	11800 3150 11900 3150
-Wire Wire Line
-	12550 3000 12900 3000
-Wire Wire Line
-	12900 3000 12900 3100
-Wire Wire Line
-	12900 3100 12800 3100
-Wire Wire Line
-	12250 3000 12400 3000
-Wire Wire Line
-	12400 3000 12400 2850
-Wire Wire Line
-	12400 2850 13200 2850
-Wire Wire Line
-	13200 2850 13200 3200
-Wire Wire Line
-	13200 3200 12800 3200
-Wire Wire Line
-	10200 2000 12300 2000
-Wire Wire Line
-	12300 2000 12300 2100
-Wire Wire Line
-	11650 3600 11650 1950
-Wire Wire Line
-	11650 1950 12600 1950
-Wire Wire Line
-	12600 1950 12600 2100
-Connection ~ 11650 3600
-$Comp
-L PORT U5
-U 12 1 5C982725
-P 9150 2750
-F 0 "U5" H 9200 2850 30  0000 C CNN
-F 1 "PORT" H 9150 2750 30  0000 C CNN
-F 2 "" H 9150 2750 60  0000 C CNN
-F 3 "" H 9150 2750 60  0000 C CNN
-	12   9150 2750
-	-1   0    0    1   
-$EndComp
-$Comp
-L PORT U5
-U 17 1 5C9827C2
-P 9550 2650
-F 0 "U5" H 9600 2750 30  0000 C CNN
-F 1 "PORT" H 9550 2650 30  0000 C CNN
-F 2 "" H 9550 2650 60  0000 C CNN
-F 3 "" H 9550 2650 60  0000 C CNN
-	17   9550 2650
-	-1   0    0    1   
-$EndComp
-$Comp
-L PORT U5
-U 11 1 5C98283D
-P 9150 2550
-F 0 "U5" H 9200 2650 30  0000 C CNN
-F 1 "PORT" H 9150 2550 30  0000 C CNN
-F 2 "" H 9150 2550 60  0000 C CNN
-F 3 "" H 9150 2550 60  0000 C CNN
-	11   9150 2550
-	-1   0    0    1   
-$EndComp
-$Comp
-L PORT U5
-U 16 1 5C9828CC
-P 9550 2450
-F 0 "U5" H 9600 2550 30  0000 C CNN
-F 1 "PORT" H 9550 2450 30  0000 C CNN
-F 2 "" H 9550 2450 60  0000 C CNN
-F 3 "" H 9550 2450 60  0000 C CNN
-	16   9550 2450
-	-1   0    0    1   
-$EndComp
-$Comp
-L PORT U5
-U 10 1 5C982957
-P 9150 2350
-F 0 "U5" H 9200 2450 30  0000 C CNN
-F 1 "PORT" H 9150 2350 30  0000 C CNN
-F 2 "" H 9150 2350 60  0000 C CNN
-F 3 "" H 9150 2350 60  0000 C CNN
-	10   9150 2350
-	-1   0    0    1   
-$EndComp
-$Comp
-L PORT U5
-U 15 1 5C9829D6
-P 9550 2250
-F 0 "U5" H 9600 2350 30  0000 C CNN
-F 1 "PORT" H 9550 2250 30  0000 C CNN
-F 2 "" H 9550 2250 60  0000 C CNN
-F 3 "" H 9550 2250 60  0000 C CNN
-	15   9550 2250
-	-1   0    0    1   
-$EndComp
-$Comp
-L PORT U5
-U 9 1 5C982A5D
-P 9150 2150
-F 0 "U5" H 9200 2250 30  0000 C CNN
-F 1 "PORT" H 9150 2150 30  0000 C CNN
-F 2 "" H 9150 2150 60  0000 C CNN
-F 3 "" H 9150 2150 60  0000 C CNN
-	9    9150 2150
-	-1   0    0    1   
-$EndComp
-$Comp
-L PORT U5
-U 14 1 5C982AE0
-P 9550 2050
-F 0 "U5" H 9600 2150 30  0000 C CNN
-F 1 "PORT" H 9550 2050 30  0000 C CNN
-F 2 "" H 9550 2050 60  0000 C CNN
-F 3 "" H 9550 2050 60  0000 C CNN
-	14   9550 2050
-	-1   0    0    1   
-$EndComp
-$Comp
-L PORT U5
-U 8 1 5C982B81
-P 9150 1950
-F 0 "U5" H 9200 2050 30  0000 C CNN
-F 1 "PORT" H 9150 1950 30  0000 C CNN
-F 2 "" H 9150 1950 60  0000 C CNN
-F 3 "" H 9150 1950 60  0000 C CNN
-	8    9150 1950
-	-1   0    0    1   
-$EndComp
-$Comp
-L PORT U5
-U 21 1 5C983602
-P 13250 8700
-F 0 "U5" H 13300 8800 30  0000 C CNN
-F 1 "PORT" H 13250 8700 30  0000 C CNN
-F 2 "" H 13250 8700 60  0000 C CNN
-F 3 "" H 13250 8700 60  0000 C CNN
-	21   13250 8700
-	-1   0    0    1   
-$EndComp
-$Comp
-L PORT U5
-U 18 1 5C983C2F
-P 9950 2000
-F 0 "U5" H 10000 2100 30  0000 C CNN
-F 1 "PORT" H 9950 2000 30  0000 C CNN
-F 2 "" H 9950 2000 60  0000 C CNN
-F 3 "" H 9950 2000 60  0000 C CNN
-	18   9950 2000
-	1    0    0    -1  
-$EndComp
-$Comp
-L PORT U5
-U 20 1 5C984048
-P 11800 9050
-F 0 "U5" H 11850 9150 30  0000 C CNN
-F 1 "PORT" H 11800 9050 30  0000 C CNN
-F 2 "" H 11800 9050 60  0000 C CNN
-F 3 "" H 11800 9050 60  0000 C CNN
-	20   11800 9050
-	1    0    0    -1  
-$EndComp
-$Comp
-L PORT U5
-U 19 1 5C9840D3
-P 10400 9050
-F 0 "U5" H 10450 9150 30  0000 C CNN
-F 1 "PORT" H 10400 9050 30  0000 C CNN
-F 2 "" H 10400 9050 60  0000 C CNN
-F 3 "" H 10400 9050 60  0000 C CNN
-	19   10400 9050
-	1    0    0    -1  
-$EndComp
-$Comp
-L PORT U5
-U 13 1 5C984164
-P 9150 9050
-F 0 "U5" H 9200 9150 30  0000 C CNN
-F 1 "PORT" H 9150 9050 30  0000 C CNN
-F 2 "" H 9150 9050 60  0000 C CNN
-F 3 "" H 9150 9050 60  0000 C CNN
-	13   9150 9050
-	1    0    0    -1  
-$EndComp
-$Comp
-L PORT U5
-U 7 1 5C985678
-P 7200 9050
-F 0 "U5" H 7250 9150 30  0000 C CNN
-F 1 "PORT" H 7200 9050 30  0000 C CNN
-F 2 "" H 7200 9050 60  0000 C CNN
-F 3 "" H 7200 9050 60  0000 C CNN
-	7    7200 9050
-	1    0    0    -1  
-$EndComp
-$Comp
-L PORT U5
-U 6 1 5C985709
-P 5600 9100
-F 0 "U5" H 5650 9200 30  0000 C CNN
-F 1 "PORT" H 5600 9100 30  0000 C CNN
-F 2 "" H 5600 9100 60  0000 C CNN
-F 3 "" H 5600 9100 60  0000 C CNN
-	6    5600 9100
-	1    0    0    -1  
-$EndComp
-$Comp
-L PORT U5
-U 4 1 5C98579A
-P 3700 9100
-F 0 "U5" H 3750 9200 30  0000 C CNN
-F 1 "PORT" H 3700 9100 30  0000 C CNN
-F 2 "" H 3700 9100 60  0000 C CNN
-F 3 "" H 3700 9100 60  0000 C CNN
-	4    3700 9100
-	1    0    0    -1  
-$EndComp
-$Comp
-L PORT U5
-U 1 1 5C98582D
-P 2700 8800
-F 0 "U5" H 2750 8900 30  0000 C CNN
-F 1 "PORT" H 2700 8800 30  0000 C CNN
-F 2 "" H 2700 8800 60  0000 C CNN
-F 3 "" H 2700 8800 60  0000 C CNN
-	1    2700 8800
-	0    1    1    0   
-$EndComp
-$Comp
-L PORT U5
-U 5 1 5C98694B
-P 5450 2750
-F 0 "U5" H 5500 2850 30  0000 C CNN
-F 1 "PORT" H 5450 2750 30  0000 C CNN
-F 2 "" H 5450 2750 60  0000 C CNN
-F 3 "" H 5450 2750 60  0000 C CNN
-	5    5450 2750
-	0    -1   -1   0   
-$EndComp
-Text Notes 5400 2450 1    60   ~ 0
-IN8
-Text Notes 2650 2000 0    60   ~ 0
-GND
-$Comp
-L PORT U5
-U 2 1 5C986B72
-P 3100 2050
-F 0 "U5" H 3150 2150 30  0000 C CNN
-F 1 "PORT" H 3100 2050 30  0000 C CNN
-F 2 "" H 3100 2050 60  0000 C CNN
-F 3 "" H 3100 2050 60  0000 C CNN
-	2    3100 2050
-	-1   0    0    1   
-$EndComp
-$Comp
-L PORT U5
-U 3 1 5C986C25
-P 3150 3900
-F 0 "U5" H 3200 4000 30  0000 C CNN
-F 1 "PORT" H 3150 3900 30  0000 C CNN
-F 2 "" H 3150 3900 60  0000 C CNN
-F 3 "" H 3150 3900 60  0000 C CNN
-	3    3150 3900
-	0    -1   -1   0   
-$EndComp
-Text Notes 2850 3600 0    60   ~ 0
-CLK
-$EndSCHEMATC
diff --git a/src/SubcircuitLibrary/9bit-Right_shift_register/9bit-Right_shift_register.sub b/src/SubcircuitLibrary/9bit-Right_shift_register/9bit-Right_shift_register.sub
deleted file mode 100644
index e94cb0f4..00000000
--- a/src/SubcircuitLibrary/9bit-Right_shift_register/9bit-Right_shift_register.sub
+++ /dev/null
@@ -1,186 +0,0 @@
-* Subcircuit 9bit-Right_shift_register

-.subckt 9bit-Right_shift_register net-_u5-pad1_ net-_u1-pad3_ net-_u1-pad2_ net-_u13-pad2_ net-_u44-pad1_ net-_u19-pad2_ net-_u23-pad2_ net-_u10-pad2_ net-_u2-pad5_ net-_u30-pad2_ net-_u42-pad2_ net-_u18-pad5_ net-_u28-pad2_ net-_u1-pad5_ net-_u26-pad2_ net-_u34-pad2_ net-_u15-pad5_ net-_u36-pad1_ net-_u32-pad2_ net-_u38-pad2_ net-_u10-pad1_ 

-* c:\esim\esim\src\subcircuitlibrary\9bit-right_shift_register\9bit-right_shift_register.cir

-* u3  net-_u20-pad3_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad3_ net-_u26-pad2_ ? d_dff

-* u4  net-_u25-pad3_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad3_ net-_u30-pad2_ ? d_dff

-* u6  net-_u29-pad3_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad3_ net-_u34-pad2_ ? d_dff

-* u15  net-_u15-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad3_ net-_u15-pad5_ ? d_dff

-* u2  net-_u14-pad3_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad3_ net-_u2-pad5_ ? d_dff

-* u1  net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad3_ net-_u1-pad5_ ? d_dff

-* u18  net-_u18-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad3_ net-_u18-pad5_ ? d_dff

-* u11  net-_u11-pad1_ net-_u10-pad3_ net-_u1-pad1_ d_or

-* u14  net-_u14-pad1_ net-_u13-pad3_ net-_u14-pad3_ d_or

-* u20  net-_u20-pad1_ net-_u19-pad3_ net-_u20-pad3_ d_or

-* u10  net-_u10-pad1_ net-_u10-pad2_ net-_u10-pad3_ d_and

-* u8  net-_u7-pad2_ net-_u5-pad1_ net-_u11-pad1_ d_and

-* u7  net-_u10-pad1_ net-_u7-pad2_ d_inverter

-* u13  net-_u12-pad2_ net-_u13-pad2_ net-_u13-pad3_ d_and

-* u16  net-_u10-pad1_ net-_u1-pad5_ net-_u14-pad1_ d_and

-* u12  net-_u10-pad1_ net-_u12-pad2_ d_inverter

-* u19  net-_u17-pad2_ net-_u19-pad2_ net-_u19-pad3_ d_and

-* u21  net-_u10-pad1_ net-_u2-pad5_ net-_u20-pad1_ d_and

-* u17  net-_u10-pad1_ net-_u17-pad2_ d_inverter

-* u25  net-_u23-pad3_ net-_u25-pad2_ net-_u25-pad3_ d_or

-* u23  net-_u22-pad2_ net-_u23-pad2_ net-_u23-pad3_ d_and

-* u26  net-_u10-pad1_ net-_u26-pad2_ net-_u25-pad2_ d_and

-* u22  net-_u10-pad1_ net-_u22-pad2_ d_inverter

-* u29  net-_u28-pad3_ net-_u29-pad2_ net-_u29-pad3_ d_or

-* u28  net-_u27-pad2_ net-_u28-pad2_ net-_u28-pad3_ d_and

-* u30  net-_u10-pad1_ net-_u30-pad2_ net-_u29-pad2_ d_and

-* u27  net-_u10-pad1_ net-_u27-pad2_ d_inverter

-* u33  net-_u32-pad3_ net-_u33-pad2_ net-_u33-pad3_ d_or

-* u40  net-_u38-pad3_ net-_u40-pad2_ net-_u15-pad1_ d_or

-* u32  net-_u31-pad2_ net-_u32-pad2_ net-_u32-pad3_ d_and

-* u34  net-_u10-pad1_ net-_u34-pad2_ net-_u33-pad2_ d_and

-* u38  net-_u37-pad2_ net-_u38-pad2_ net-_u38-pad3_ d_and

-* u42  net-_u10-pad1_ net-_u42-pad2_ net-_u40-pad2_ d_and

-* u31  net-_u10-pad1_ net-_u31-pad2_ d_inverter

-* u37  net-_u10-pad1_ net-_u37-pad2_ d_inverter

-* u39  net-_u36-pad3_ net-_u39-pad2_ net-_u18-pad1_ d_or

-* u36  net-_u36-pad1_ net-_u35-pad2_ net-_u36-pad3_ d_and

-* u41  net-_u15-pad5_ net-_u10-pad1_ net-_u39-pad2_ d_and

-* u9  net-_u33-pad3_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad3_ net-_u42-pad2_ ? d_dff

-* u35  net-_u10-pad1_ net-_u35-pad2_ d_inverter

-* u24  net-_u24-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad3_ net-_u10-pad2_ ? d_dff

-* u45  net-_u45-pad1_ net-_u44-pad3_ net-_u24-pad1_ d_or

-* u46  net-_u18-pad5_ net-_u10-pad1_ net-_u45-pad1_ d_and

-* u44  net-_u44-pad1_ net-_u43-pad2_ net-_u44-pad3_ d_and

-* u43  net-_u10-pad1_ net-_u43-pad2_ d_inverter

-a1 net-_u20-pad3_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad3_ net-_u26-pad2_ ? u3

-a2 net-_u25-pad3_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad3_ net-_u30-pad2_ ? u4

-a3 net-_u29-pad3_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad3_ net-_u34-pad2_ ? u6

-a4 net-_u15-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad3_ net-_u15-pad5_ ? u15

-a5 net-_u14-pad3_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad3_ net-_u2-pad5_ ? u2

-a6 net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad3_ net-_u1-pad5_ ? u1

-a7 net-_u18-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad3_ net-_u18-pad5_ ? u18

-a8 [net-_u11-pad1_ net-_u10-pad3_ ] net-_u1-pad1_ u11

-a9 [net-_u14-pad1_ net-_u13-pad3_ ] net-_u14-pad3_ u14

-a10 [net-_u20-pad1_ net-_u19-pad3_ ] net-_u20-pad3_ u20

-a11 [net-_u10-pad1_ net-_u10-pad2_ ] net-_u10-pad3_ u10

-a12 [net-_u7-pad2_ net-_u5-pad1_ ] net-_u11-pad1_ u8

-a13 net-_u10-pad1_ net-_u7-pad2_ u7

-a14 [net-_u12-pad2_ net-_u13-pad2_ ] net-_u13-pad3_ u13

-a15 [net-_u10-pad1_ net-_u1-pad5_ ] net-_u14-pad1_ u16

-a16 net-_u10-pad1_ net-_u12-pad2_ u12

-a17 [net-_u17-pad2_ net-_u19-pad2_ ] net-_u19-pad3_ u19

-a18 [net-_u10-pad1_ net-_u2-pad5_ ] net-_u20-pad1_ u21

-a19 net-_u10-pad1_ net-_u17-pad2_ u17

-a20 [net-_u23-pad3_ net-_u25-pad2_ ] net-_u25-pad3_ u25

-a21 [net-_u22-pad2_ net-_u23-pad2_ ] net-_u23-pad3_ u23

-a22 [net-_u10-pad1_ net-_u26-pad2_ ] net-_u25-pad2_ u26

-a23 net-_u10-pad1_ net-_u22-pad2_ u22

-a24 [net-_u28-pad3_ net-_u29-pad2_ ] net-_u29-pad3_ u29

-a25 [net-_u27-pad2_ net-_u28-pad2_ ] net-_u28-pad3_ u28

-a26 [net-_u10-pad1_ net-_u30-pad2_ ] net-_u29-pad2_ u30

-a27 net-_u10-pad1_ net-_u27-pad2_ u27

-a28 [net-_u32-pad3_ net-_u33-pad2_ ] net-_u33-pad3_ u33

-a29 [net-_u38-pad3_ net-_u40-pad2_ ] net-_u15-pad1_ u40

-a30 [net-_u31-pad2_ net-_u32-pad2_ ] net-_u32-pad3_ u32

-a31 [net-_u10-pad1_ net-_u34-pad2_ ] net-_u33-pad2_ u34

-a32 [net-_u37-pad2_ net-_u38-pad2_ ] net-_u38-pad3_ u38

-a33 [net-_u10-pad1_ net-_u42-pad2_ ] net-_u40-pad2_ u42

-a34 net-_u10-pad1_ net-_u31-pad2_ u31

-a35 net-_u10-pad1_ net-_u37-pad2_ u37

-a36 [net-_u36-pad3_ net-_u39-pad2_ ] net-_u18-pad1_ u39

-a37 [net-_u36-pad1_ net-_u35-pad2_ ] net-_u36-pad3_ u36

-a38 [net-_u15-pad5_ net-_u10-pad1_ ] net-_u39-pad2_ u41

-a39 net-_u33-pad3_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad3_ net-_u42-pad2_ ? u9

-a40 net-_u10-pad1_ net-_u35-pad2_ u35

-a41 net-_u24-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad3_ net-_u10-pad2_ ? u24

-a42 [net-_u45-pad1_ net-_u44-pad3_ ] net-_u24-pad1_ u45

-a43 [net-_u18-pad5_ net-_u10-pad1_ ] net-_u45-pad1_ u46

-a44 [net-_u44-pad1_ net-_u43-pad2_ ] net-_u44-pad3_ u44

-a45 net-_u10-pad1_ net-_u43-pad2_ u43

-* Schematic Name: d_dff, NgSpice Name: d_dff

-.model u3 d_dff(ic=0 set_delay=1.0e-9 set_load=1.0e-12 reset_load=1.0e-12 clk_delay=1.0e-9 clk_load=1.0e-12 reset_delay=1.0 data_load=1.0e-12 fall_delay=1.0e-9 rise_delay=1.0e-9 )

-* Schematic Name: d_dff, NgSpice Name: d_dff

-.model u4 d_dff(ic=0 set_delay=1.0e-9 set_load=1.0e-12 reset_load=1.0e-12 clk_delay=1.0e-9 clk_load=1.0e-12 reset_delay=1.0 data_load=1.0e-12 fall_delay=1.0e-9 rise_delay=1.0e-9 )

-* Schematic Name: d_dff, NgSpice Name: d_dff

-.model u6 d_dff(ic=0 set_delay=1.0e-9 set_load=1.0e-12 reset_load=1.0e-12 clk_delay=1.0e-9 clk_load=1.0e-12 reset_delay=1.0 data_load=1.0e-12 fall_delay=1.0e-9 rise_delay=1.0e-9 )

-* Schematic Name: d_dff, NgSpice Name: d_dff

-.model u15 d_dff(ic=0 set_delay=1.0e-9 set_load=1.0e-12 reset_load=1.0e-12 clk_delay=1.0e-9 clk_load=1.0e-12 reset_delay=1.0 data_load=1.0e-12 fall_delay=1.0e-9 rise_delay=1.0e-9 )

-* Schematic Name: d_dff, NgSpice Name: d_dff

-.model u2 d_dff(ic=0 set_delay=1.0e-9 set_load=1.0e-12 reset_load=1.0e-12 clk_delay=1.0e-9 clk_load=1.0e-12 reset_delay=1.0 data_load=1.0e-12 fall_delay=1.0e-9 rise_delay=1.0e-9 )

-* Schematic Name: d_dff, NgSpice Name: d_dff

-.model u1 d_dff(ic=0 set_delay=1.0e-9 set_load=1.0e-12 reset_load=1.0e-12 clk_delay=1.0e-9 clk_load=1.0e-12 reset_delay=1.0 data_load=1.0e-12 fall_delay=1.0e-9 rise_delay=1.0e-9 )

-* Schematic Name: d_dff, NgSpice Name: d_dff

-.model u18 d_dff(ic=0 set_delay=1.0e-9 set_load=1.0e-12 reset_load=1.0e-12 clk_delay=1.0e-9 clk_load=1.0e-12 reset_delay=1.0 data_load=1.0e-12 fall_delay=1.0e-9 rise_delay=1.0e-9 )

-* Schematic Name: d_or, NgSpice Name: d_or

-.model u11 d_or(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )

-* Schematic Name: d_or, NgSpice Name: d_or

-.model u14 d_or(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )

-* Schematic Name: d_or, NgSpice Name: d_or

-.model u20 d_or(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )

-* Schematic Name: d_and, NgSpice Name: d_and

-.model u10 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )

-* Schematic Name: d_and, NgSpice Name: d_and

-.model u8 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )

-* Schematic Name: d_inverter, NgSpice Name: d_inverter

-.model u7 d_inverter(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )

-* Schematic Name: d_and, NgSpice Name: d_and

-.model u13 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )

-* Schematic Name: d_and, NgSpice Name: d_and

-.model u16 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )

-* Schematic Name: d_inverter, NgSpice Name: d_inverter

-.model u12 d_inverter(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )

-* Schematic Name: d_and, NgSpice Name: d_and

-.model u19 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )

-* Schematic Name: d_and, NgSpice Name: d_and

-.model u21 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )

-* Schematic Name: d_inverter, NgSpice Name: d_inverter

-.model u17 d_inverter(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )

-* Schematic Name: d_or, NgSpice Name: d_or

-.model u25 d_or(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )

-* Schematic Name: d_and, NgSpice Name: d_and

-.model u23 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )

-* Schematic Name: d_and, NgSpice Name: d_and

-.model u26 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )

-* Schematic Name: d_inverter, NgSpice Name: d_inverter

-.model u22 d_inverter(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )

-* Schematic Name: d_or, NgSpice Name: d_or

-.model u29 d_or(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )

-* Schematic Name: d_and, NgSpice Name: d_and

-.model u28 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )

-* Schematic Name: d_and, NgSpice Name: d_and

-.model u30 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )

-* Schematic Name: d_inverter, NgSpice Name: d_inverter

-.model u27 d_inverter(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )

-* Schematic Name: d_or, NgSpice Name: d_or

-.model u33 d_or(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )

-* Schematic Name: d_or, NgSpice Name: d_or

-.model u40 d_or(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )

-* Schematic Name: d_and, NgSpice Name: d_and

-.model u32 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )

-* Schematic Name: d_and, NgSpice Name: d_and

-.model u34 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )

-* Schematic Name: d_and, NgSpice Name: d_and

-.model u38 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )

-* Schematic Name: d_and, NgSpice Name: d_and

-.model u42 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )

-* Schematic Name: d_inverter, NgSpice Name: d_inverter

-.model u31 d_inverter(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )

-* Schematic Name: d_inverter, NgSpice Name: d_inverter

-.model u37 d_inverter(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )

-* Schematic Name: d_or, NgSpice Name: d_or

-.model u39 d_or(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )

-* Schematic Name: d_and, NgSpice Name: d_and

-.model u36 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )

-* Schematic Name: d_and, NgSpice Name: d_and

-.model u41 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )

-* Schematic Name: d_dff, NgSpice Name: d_dff

-.model u9 d_dff(ic=0 set_delay=1.0e-9 set_load=1.0e-12 reset_load=1.0e-12 clk_delay=1.0e-9 clk_load=1.0e-12 reset_delay=1.0 data_load=1.0e-12 fall_delay=1.0e-9 rise_delay=1.0e-9 )

-* Schematic Name: d_inverter, NgSpice Name: d_inverter

-.model u35 d_inverter(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )

-* Schematic Name: d_dff, NgSpice Name: d_dff

-.model u24 d_dff(ic=0 set_delay=1.0e-9 set_load=1.0e-12 reset_load=1.0e-12 clk_delay=1.0e-9 clk_load=1.0e-12 reset_delay=1.0 data_load=1.0e-12 fall_delay=1.0e-9 rise_delay=1.0e-9 )

-* Schematic Name: d_or, NgSpice Name: d_or

-.model u45 d_or(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )

-* Schematic Name: d_and, NgSpice Name: d_and

-.model u46 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )

-* Schematic Name: d_and, NgSpice Name: d_and

-.model u44 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )

-* Schematic Name: d_inverter, NgSpice Name: d_inverter

-.model u43 d_inverter(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )

-* Control Statements

-

-.ends 9bit-Right_shift_register
\ No newline at end of file
diff --git a/src/SubcircuitLibrary/9bit-Right_shift_register/9bit-Right_shift_register_Previous_Values.xml b/src/SubcircuitLibrary/9bit-Right_shift_register/9bit-Right_shift_register_Previous_Values.xml
deleted file mode 100644
index 28c290d4..00000000
--- a/src/SubcircuitLibrary/9bit-Right_shift_register/9bit-Right_shift_register_Previous_Values.xml
+++ /dev/null
@@ -1 +0,0 @@
-<KicadtoNgspice><source /><model><u3 name="type">d_dff<field1 name="Enter IC (default=0)" /><field2 name="Enter Set Delay (default=1.0e-9)" /><field3 name="Enter value for Set Load (default=1.0e-12)" /><field4 name="Enter Clk Delay (default=1.0e-9)" /><field5 name="Enter value for Clk Load (default=1.0e-12)" /><field6 name="Enter Reset Delay (default=1.0)" /><field7 name="Enter value for Data Load (default=1.0e-12)" /><field8 name="Enter Fall Delay (default=1.0e-9)" /><field9 name="Enter value for Reset Load (default=1.0e-12)" /><field10 name="Enter Rise Delay (default=1.0e-9)" /></u3><u4 name="type">d_dff<field11 name="Enter IC (default=0)" /><field12 name="Enter Set Delay (default=1.0e-9)" /><field13 name="Enter value for Set Load (default=1.0e-12)" /><field14 name="Enter Clk Delay (default=1.0e-9)" /><field15 name="Enter value for Clk Load (default=1.0e-12)" /><field16 name="Enter Reset Delay (default=1.0)" /><field17 name="Enter value for Data Load (default=1.0e-12)" /><field18 name="Enter Fall Delay (default=1.0e-9)" /><field19 name="Enter value for Reset Load (default=1.0e-12)" /><field20 name="Enter Rise Delay (default=1.0e-9)" /></u4><u6 name="type">d_dff<field21 name="Enter IC (default=0)" /><field22 name="Enter Set Delay (default=1.0e-9)" /><field23 name="Enter value for Set Load (default=1.0e-12)" /><field24 name="Enter Clk Delay (default=1.0e-9)" /><field25 name="Enter value for Clk Load (default=1.0e-12)" /><field26 name="Enter Reset Delay (default=1.0)" /><field27 name="Enter value for Data Load (default=1.0e-12)" /><field28 name="Enter Fall Delay (default=1.0e-9)" /><field29 name="Enter value for Reset Load (default=1.0e-12)" /><field30 name="Enter Rise Delay (default=1.0e-9)" /></u6><u15 name="type">d_dff<field31 name="Enter IC (default=0)" /><field32 name="Enter Set Delay (default=1.0e-9)" /><field33 name="Enter value for Set Load (default=1.0e-12)" /><field34 name="Enter Clk Delay (default=1.0e-9)" /><field35 name="Enter value for Clk Load (default=1.0e-12)" /><field36 name="Enter Reset Delay (default=1.0)" /><field37 name="Enter value for Data Load (default=1.0e-12)" /><field38 name="Enter Fall Delay (default=1.0e-9)" /><field39 name="Enter value for Reset Load (default=1.0e-12)" /><field40 name="Enter Rise Delay (default=1.0e-9)" /></u15><u2 name="type">d_dff<field41 name="Enter IC (default=0)" /><field42 name="Enter Set Delay (default=1.0e-9)" /><field43 name="Enter value for Set Load (default=1.0e-12)" /><field44 name="Enter Clk Delay (default=1.0e-9)" /><field45 name="Enter value for Clk Load (default=1.0e-12)" /><field46 name="Enter Reset Delay (default=1.0)" /><field47 name="Enter value for Data Load (default=1.0e-12)" /><field48 name="Enter Fall Delay (default=1.0e-9)" /><field49 name="Enter value for Reset Load (default=1.0e-12)" /><field50 name="Enter Rise Delay (default=1.0e-9)" /></u2><u1 name="type">d_dff<field51 name="Enter IC (default=0)" /><field52 name="Enter Set Delay (default=1.0e-9)" /><field53 name="Enter value for Set Load (default=1.0e-12)" /><field54 name="Enter Clk Delay (default=1.0e-9)" /><field55 name="Enter value for Clk Load (default=1.0e-12)" /><field56 name="Enter Reset Delay (default=1.0)" /><field57 name="Enter value for Data Load (default=1.0e-12)" /><field58 name="Enter Fall Delay (default=1.0e-9)" /><field59 name="Enter value for Reset Load (default=1.0e-12)" /><field60 name="Enter Rise Delay (default=1.0e-9)" /></u1><u18 name="type">d_dff<field61 name="Enter IC (default=0)" /><field62 name="Enter Set Delay (default=1.0e-9)" /><field63 name="Enter value for Set Load (default=1.0e-12)" /><field64 name="Enter Clk Delay (default=1.0e-9)" /><field65 name="Enter value for Clk Load (default=1.0e-12)" /><field66 name="Enter Reset Delay (default=1.0)" /><field67 name="Enter value for Data Load (default=1.0e-12)" /><field68 name="Enter Fall Delay (default=1.0e-9)" /><field69 name="Enter value for Reset Load (default=1.0e-12)" /><field70 name="Enter Rise Delay (default=1.0e-9)" /></u18><u11 name="type">d_or<field71 name="Enter Fall Delay (default=1.0e-9)" /><field72 name="Enter Input Load (default=1.0e-12)" /><field73 name="Enter Rise Delay (default=1.0e-9)" /></u11><u14 name="type">d_or<field74 name="Enter Fall Delay (default=1.0e-9)" /><field75 name="Enter Input Load (default=1.0e-12)" /><field76 name="Enter Rise Delay (default=1.0e-9)" /></u14><u20 name="type">d_or<field77 name="Enter Fall Delay (default=1.0e-9)" /><field78 name="Enter Input Load (default=1.0e-12)" /><field79 name="Enter Rise Delay (default=1.0e-9)" /></u20><u10 name="type">d_and<field80 name="Enter Fall Delay (default=1.0e-9)" /><field81 name="Enter Input Load (default=1.0e-12)" /><field82 name="Enter Rise Delay (default=1.0e-9)" /></u10><u8 name="type">d_and<field83 name="Enter Fall Delay (default=1.0e-9)" /><field84 name="Enter Input Load (default=1.0e-12)" /><field85 name="Enter Rise Delay (default=1.0e-9)" /></u8><u7 name="type">d_inverter<field86 name="Enter Fall Delay (default=1.0e-9)" /><field87 name="Enter Input Load (default=1.0e-12)" /><field88 name="Enter Rise Delay (default=1.0e-9)" /></u7><u13 name="type">d_and<field89 name="Enter Fall Delay (default=1.0e-9)" /><field90 name="Enter Input Load (default=1.0e-12)" /><field91 name="Enter Rise Delay (default=1.0e-9)" /></u13><u16 name="type">d_and<field92 name="Enter Fall Delay (default=1.0e-9)" /><field93 name="Enter Input Load (default=1.0e-12)" /><field94 name="Enter Rise Delay (default=1.0e-9)" /></u16><u12 name="type">d_inverter<field95 name="Enter Fall Delay (default=1.0e-9)" /><field96 name="Enter Input Load (default=1.0e-12)" /><field97 name="Enter Rise Delay (default=1.0e-9)" /></u12><u19 name="type">d_and<field98 name="Enter Fall Delay (default=1.0e-9)" /><field99 name="Enter Input Load (default=1.0e-12)" /><field100 name="Enter Rise Delay (default=1.0e-9)" /></u19><u21 name="type">d_and<field101 name="Enter Fall Delay (default=1.0e-9)" /><field102 name="Enter Input Load (default=1.0e-12)" /><field103 name="Enter Rise Delay (default=1.0e-9)" /></u21><u17 name="type">d_inverter<field104 name="Enter Fall Delay (default=1.0e-9)" /><field105 name="Enter Input Load (default=1.0e-12)" /><field106 name="Enter Rise Delay (default=1.0e-9)" /></u17><u25 name="type">d_or<field107 name="Enter Fall Delay (default=1.0e-9)" /><field108 name="Enter Input Load (default=1.0e-12)" /><field109 name="Enter Rise Delay (default=1.0e-9)" /></u25><u23 name="type">d_and<field110 name="Enter Fall Delay (default=1.0e-9)" /><field111 name="Enter Input Load (default=1.0e-12)" /><field112 name="Enter Rise Delay (default=1.0e-9)" /></u23><u26 name="type">d_and<field113 name="Enter Fall Delay (default=1.0e-9)" /><field114 name="Enter Input Load (default=1.0e-12)" /><field115 name="Enter Rise Delay (default=1.0e-9)" /></u26><u22 name="type">d_inverter<field116 name="Enter Fall Delay (default=1.0e-9)" /><field117 name="Enter Input Load (default=1.0e-12)" /><field118 name="Enter Rise Delay (default=1.0e-9)" /></u22><u29 name="type">d_or<field119 name="Enter Fall Delay (default=1.0e-9)" /><field120 name="Enter Input Load (default=1.0e-12)" /><field121 name="Enter Rise Delay (default=1.0e-9)" /></u29><u28 name="type">d_and<field122 name="Enter Fall Delay (default=1.0e-9)" /><field123 name="Enter Input Load (default=1.0e-12)" /><field124 name="Enter Rise Delay (default=1.0e-9)" /></u28><u30 name="type">d_and<field125 name="Enter Fall Delay (default=1.0e-9)" /><field126 name="Enter Input Load (default=1.0e-12)" /><field127 name="Enter Rise Delay (default=1.0e-9)" /></u30><u27 name="type">d_inverter<field128 name="Enter Fall Delay (default=1.0e-9)" /><field129 name="Enter Input Load (default=1.0e-12)" /><field130 name="Enter Rise Delay (default=1.0e-9)" /></u27><u33 name="type">d_or<field131 name="Enter Fall Delay (default=1.0e-9)" /><field132 name="Enter Input Load (default=1.0e-12)" /><field133 name="Enter Rise Delay (default=1.0e-9)" /></u33><u40 name="type">d_or<field134 name="Enter Fall Delay (default=1.0e-9)" /><field135 name="Enter Input Load (default=1.0e-12)" /><field136 name="Enter Rise Delay (default=1.0e-9)" /></u40><u32 name="type">d_and<field137 name="Enter Fall Delay (default=1.0e-9)" /><field138 name="Enter Input Load (default=1.0e-12)" /><field139 name="Enter Rise Delay (default=1.0e-9)" /></u32><u34 name="type">d_and<field140 name="Enter Fall Delay (default=1.0e-9)" /><field141 name="Enter Input Load (default=1.0e-12)" /><field142 name="Enter Rise Delay (default=1.0e-9)" /></u34><u38 name="type">d_and<field143 name="Enter Fall Delay (default=1.0e-9)" /><field144 name="Enter Input Load (default=1.0e-12)" /><field145 name="Enter Rise Delay (default=1.0e-9)" /></u38><u42 name="type">d_and<field146 name="Enter Fall Delay (default=1.0e-9)" /><field147 name="Enter Input Load (default=1.0e-12)" /><field148 name="Enter Rise Delay (default=1.0e-9)" /></u42><u31 name="type">d_inverter<field149 name="Enter Fall Delay (default=1.0e-9)" /><field150 name="Enter Input Load (default=1.0e-12)" /><field151 name="Enter Rise Delay (default=1.0e-9)" /></u31><u37 name="type">d_inverter<field152 name="Enter Fall Delay (default=1.0e-9)" /><field153 name="Enter Input Load (default=1.0e-12)" /><field154 name="Enter Rise Delay (default=1.0e-9)" /></u37><u39 name="type">d_or<field155 name="Enter Fall Delay (default=1.0e-9)" /><field156 name="Enter Input Load (default=1.0e-12)" /><field157 name="Enter Rise Delay (default=1.0e-9)" /></u39><u36 name="type">d_and<field158 name="Enter Fall Delay (default=1.0e-9)" /><field159 name="Enter Input Load (default=1.0e-12)" /><field160 name="Enter Rise Delay (default=1.0e-9)" /></u36><u41 name="type">d_and<field161 name="Enter Fall Delay (default=1.0e-9)" /><field162 name="Enter Input Load (default=1.0e-12)" /><field163 name="Enter Rise Delay (default=1.0e-9)" /></u41><u9 name="type">d_dff<field164 name="Enter IC (default=0)" /><field165 name="Enter Set Delay (default=1.0e-9)" /><field166 name="Enter value for Set Load (default=1.0e-12)" /><field167 name="Enter Clk Delay (default=1.0e-9)" /><field168 name="Enter value for Clk Load (default=1.0e-12)" /><field169 name="Enter Reset Delay (default=1.0)" /><field170 name="Enter value for Data Load (default=1.0e-12)" /><field171 name="Enter Fall Delay (default=1.0e-9)" /><field172 name="Enter value for Reset Load (default=1.0e-12)" /><field173 name="Enter Rise Delay (default=1.0e-9)" /></u9><u35 name="type">d_inverter<field174 name="Enter Fall Delay (default=1.0e-9)" /><field175 name="Enter Input Load (default=1.0e-12)" /><field176 name="Enter Rise Delay (default=1.0e-9)" /></u35><u24 name="type">d_dff<field177 name="Enter IC (default=0)" /><field178 name="Enter Set Delay (default=1.0e-9)" /><field179 name="Enter value for Set Load (default=1.0e-12)" /><field180 name="Enter Clk Delay (default=1.0e-9)" /><field181 name="Enter value for Clk Load (default=1.0e-12)" /><field182 name="Enter Reset Delay (default=1.0)" /><field183 name="Enter value for Data Load (default=1.0e-12)" /><field184 name="Enter Fall Delay (default=1.0e-9)" /><field185 name="Enter value for Reset Load (default=1.0e-12)" /><field186 name="Enter Rise Delay (default=1.0e-9)" /></u24><u45 name="type">d_or<field187 name="Enter Fall Delay (default=1.0e-9)" /><field188 name="Enter Input Load (default=1.0e-12)" /><field189 name="Enter Rise Delay (default=1.0e-9)" /></u45><u46 name="type">d_and<field190 name="Enter Fall Delay (default=1.0e-9)" /><field191 name="Enter Input Load (default=1.0e-12)" /><field192 name="Enter Rise Delay (default=1.0e-9)" /></u46><u44 name="type">d_and<field193 name="Enter Fall Delay (default=1.0e-9)" /><field194 name="Enter Input Load (default=1.0e-12)" /><field195 name="Enter Rise Delay (default=1.0e-9)" /></u44><u43 name="type">d_inverter<field196 name="Enter Fall Delay (default=1.0e-9)" /><field197 name="Enter Input Load (default=1.0e-12)" /><field198 name="Enter Rise Delay (default=1.0e-9)" /></u43></model><devicemodel /><subcircuit /><analysis><ac><field1 name="Lin">true</field1><field2 name="Dec">false</field2><field3 name="Oct">false</field3><field4 name="Start Frequency" /><field5 name="Stop Frequency" /><field6 name="No. of points" /><field7 name="Start Fre Combo">Hz</field7><field8 name="Stop Fre Combo">Hz</field8></ac><dc><field1 name="Source 1" /><field2 name="Start" /><field3 name="Increment" /><field4 name="Stop" /><field5 name="Operating Point">0</field5><field6 name="Start Combo">Volts or Amperes</field6><field7 name="Increment Combo">Volts or Amperes</field7><field8 name="Stop Combo">Volts or Amperes</field8><field9 name="Source 2" /><field10 name="Start" /><field11 name="Increment" /><field12 name="Stop" /><field13 name="Start Combo">Volts or Amperes</field13><field14 name="Increment Combo">Volts or Amperes</field14><field15 name="Stop Combo">Volts or Amperes</field15></dc><tran><field1 name="Start Time" /><field2 name="Step Time" /><field3 name="Stop Time" /><field4 name="Start Combo">Sec</field4><field5 name="Step Combo">Sec</field5><field6 name="Stop Combo">Sec</field6></tran></analysis></KicadtoNgspice>
\ No newline at end of file
diff --git a/src/SubcircuitLibrary/AD620/AD620-cache.lib b/src/SubcircuitLibrary/AD620/AD620-cache.lib
deleted file mode 100644
index b2ef0045..00000000
--- a/src/SubcircuitLibrary/AD620/AD620-cache.lib
+++ /dev/null
@@ -1,82 +0,0 @@
-EESchema-LIBRARY Version 2.3
-#encoding utf-8
-#
-# PORT
-#
-DEF PORT U 0 40 Y Y 26 F N
-F0 "U" 50 100 30 H V C CNN
-F1 "PORT" 0 0 30 H V C CNN
-F2 "" 0 0 60 H V C CNN
-F3 "" 0 0 60 H V C CNN
-DRAW
-A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0
-A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50
-S -100 50 100 -50 0 1 0 N
-X ~ 1 250 0 100 L 30 30 1 1 B
-X ~ 2 250 0 100 L 30 30 2 1 B
-X ~ 3 250 0 100 L 30 30 3 1 B
-X ~ 4 250 0 100 L 30 30 4 1 B
-X ~ 5 250 0 100 L 30 30 5 1 B
-X ~ 6 250 0 100 L 30 30 6 1 B
-X ~ 7 250 0 100 L 30 30 7 1 B
-X ~ 8 250 0 100 L 30 30 8 1 B
-X ~ 9 250 0 100 L 30 30 9 1 B
-X ~ 10 250 0 100 L 30 30 10 1 B
-X ~ 11 250 0 100 L 30 30 11 1 B
-X ~ 12 250 0 100 L 30 30 12 1 B
-X ~ 13 250 0 100 L 30 30 13 1 B
-X ~ 14 250 0 100 L 30 30 14 1 B
-X ~ 15 250 0 100 L 30 30 15 1 B
-X ~ 16 250 0 100 L 30 30 16 1 B
-X ~ 17 250 0 100 L 30 30 17 1 B
-X ~ 18 250 0 100 L 30 30 18 1 B
-X ~ 19 250 0 100 L 30 30 19 1 B
-X ~ 20 250 0 100 L 30 30 20 1 B
-X ~ 21 250 0 100 L 30 30 21 1 B
-X ~ 22 250 0 100 L 30 30 22 1 B
-X ~ 23 250 0 100 L 30 30 23 1 B
-X ~ 24 250 0 100 L 30 30 24 1 B
-X ~ 25 250 0 100 L 30 30 25 1 B
-X ~ 26 250 0 100 L 30 30 26 1 B
-ENDDRAW
-ENDDEF
-#
-# eSim_R
-#
-DEF eSim_R R 0 0 N Y 1 F N
-F0 "R" 50 130 50 H V C CNN
-F1 "eSim_R" 50 50 50 H V C CNN
-F2 "" 50 -20 30 H V C CNN
-F3 "" 50 50 30 V V C CNN
-$FPLIST
- R_*
- Resistor_*
-$ENDFPLIST
-DRAW
-S 150 10 -50 90 0 1 10 N
-X ~ 1 -100 50 50 R 60 60 1 1 P
-X ~ 2 200 50 50 L 60 60 1 1 P
-ENDDRAW
-ENDDEF
-#
-# lm_741
-#
-DEF lm_741 X 0 40 Y Y 1 F N
-F0 "X" -200 0 60 H V C CNN
-F1 "lm_741" -350 400 60 H V C CNN
-F2 "" 0 0 60 H V C CNN
-F3 "" 0 0 60 H V C CNN
-DRAW
-P 4 0 1 0 -350 350 350 0 -350 -350 -350 350 N
-X off_null 1 -50 400 200 D 50 38 1 1 I
-X in- 2 -550 150 200 R 50 38 1 1 I
-X in+ 3 -550 -100 200 R 50 38 1 1 I
-X V- 4 -150 -450 200 U 50 38 1 1 I
-X off_null 5 50 350 200 D 50 38 1 1 I
-X out 6 550 0 200 L 50 38 1 1 O
-X V+ 7 -150 450 200 D 50 38 1 1 I
-X NC 8 150 -300 200 U 50 38 1 1 N
-ENDDRAW
-ENDDEF
-#
-#End Library
diff --git a/src/SubcircuitLibrary/AD620/AD620.cir b/src/SubcircuitLibrary/AD620/AD620.cir
deleted file mode 100644
index c82fdfd6..00000000
--- a/src/SubcircuitLibrary/AD620/AD620.cir
+++ /dev/null
@@ -1,26 +0,0 @@
-* C:\Users\malli\eSim\src\SubcircuitLibrary\AD620\AD620.cir

-

-* EESchema Netlist Version 1.1 (Spice format) creation date: 06/04/19 16:16:13

-

-* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N

-* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0

-

-* Sheet Name: /

-X2  Net-_R8-Pad1_ Net-_R1-Pad2_ Net-_U1-Pad2_ Net-_R10-Pad2_ Net-_R10-Pad1_ Net-_R1-Pad1_ Net-_U1-Pad7_ ? lm_741		

-X1  Net-_R7-Pad2_ Net-_R2-Pad1_ Net-_U1-Pad3_ Net-_R10-Pad2_ Net-_R9-Pad2_ Net-_R2-Pad2_ Net-_U1-Pad7_ ? lm_741		

-X3  Net-_R11-Pad2_ Net-_R4-Pad1_ Net-_R3-Pad1_ Net-_R10-Pad2_ Net-_R12-Pad2_ Net-_R6-Pad1_ Net-_U1-Pad7_ ? lm_741		

-R1  Net-_R1-Pad1_ Net-_R1-Pad2_ 24.7k		

-R2  Net-_R2-Pad1_ Net-_R2-Pad2_ 24.7k		

-R4  Net-_R4-Pad1_ Net-_R1-Pad1_ 10k		

-R3  Net-_R3-Pad1_ Net-_R2-Pad2_ 10k		

-R6  Net-_R6-Pad1_ Net-_R4-Pad1_ 10k		

-R5  Net-_R5-Pad1_ Net-_R3-Pad1_ 10k		

-U1  Net-_R1-Pad2_ Net-_U1-Pad2_ Net-_U1-Pad3_ Net-_R10-Pad2_ Net-_R5-Pad1_ Net-_R6-Pad1_ Net-_U1-Pad7_ Net-_R2-Pad1_ PORT		

-R8  Net-_R8-Pad1_ Net-_R10-Pad2_ 0.297k		

-R10  Net-_R10-Pad1_ Net-_R10-Pad2_ 1k		

-R7  Net-_R10-Pad2_ Net-_R7-Pad2_ 0.297k		

-R9  Net-_R10-Pad2_ Net-_R9-Pad2_ 1k		

-R12  Net-_R10-Pad2_ Net-_R12-Pad2_ 1k		

-R11  Net-_R10-Pad2_ Net-_R11-Pad2_ 0.75732k		

-

-.end

diff --git a/src/SubcircuitLibrary/AD620/AD620.cir.out b/src/SubcircuitLibrary/AD620/AD620.cir.out
deleted file mode 100644
index 082780e2..00000000
--- a/src/SubcircuitLibrary/AD620/AD620.cir.out
+++ /dev/null
@@ -1,28 +0,0 @@
-* c:\users\malli\esim\src\subcircuitlibrary\ad620\ad620.cir

-

-.include lm_741.sub

-x2 net-_r8-pad1_ net-_r1-pad2_ net-_u1-pad2_ net-_r10-pad2_ net-_r10-pad1_ net-_r1-pad1_ net-_u1-pad7_ ? lm_741

-x1 net-_r7-pad2_ net-_r2-pad1_ net-_u1-pad3_ net-_r10-pad2_ net-_r9-pad2_ net-_r2-pad2_ net-_u1-pad7_ ? lm_741

-x3 net-_r11-pad2_ net-_r4-pad1_ net-_r3-pad1_ net-_r10-pad2_ net-_r12-pad2_ net-_r6-pad1_ net-_u1-pad7_ ? lm_741

-r1  net-_r1-pad1_ net-_r1-pad2_ 24.7k

-r2  net-_r2-pad1_ net-_r2-pad2_ 24.7k

-r4  net-_r4-pad1_ net-_r1-pad1_ 10k

-r3  net-_r3-pad1_ net-_r2-pad2_ 10k

-r6  net-_r6-pad1_ net-_r4-pad1_ 10k

-r5  net-_r5-pad1_ net-_r3-pad1_ 10k

-* u1  net-_r1-pad2_ net-_u1-pad2_ net-_u1-pad3_ net-_r10-pad2_ net-_r5-pad1_ net-_r6-pad1_ net-_u1-pad7_ net-_r2-pad1_ port

-r8  net-_r8-pad1_ net-_r10-pad2_ 0.297k

-r10  net-_r10-pad1_ net-_r10-pad2_ 1k

-r7  net-_r10-pad2_ net-_r7-pad2_ 0.297k

-r9  net-_r10-pad2_ net-_r9-pad2_ 1k

-r12  net-_r10-pad2_ net-_r12-pad2_ 1k

-r11  net-_r10-pad2_ net-_r11-pad2_ 0.75732k

-.tran 0e-03 0e-00 0e-00

-

-* Control Statements 

-.control

-run

-print allv > plot_data_v.txt

-print alli > plot_data_i.txt

-.endc

-.end

diff --git a/src/SubcircuitLibrary/AD620/AD620.pro b/src/SubcircuitLibrary/AD620/AD620.pro
deleted file mode 100644
index 21e55e98..00000000
--- a/src/SubcircuitLibrary/AD620/AD620.pro
+++ /dev/null
@@ -1,44 +0,0 @@
-update=Thu Jun 27 12:48:03 2019
-version=1
-last_client=eeschema
-[general]
-version=1
-RootSch=
-BoardNm=
-[pcbnew]
-version=1
-LastNetListRead=
-UseCmpFile=1
-PadDrill=0.600000000000
-PadDrillOvalY=0.600000000000
-PadSizeH=1.500000000000
-PadSizeV=1.500000000000
-PcbTextSizeV=1.500000000000
-PcbTextSizeH=1.500000000000
-PcbTextThickness=0.300000000000
-ModuleTextSizeV=1.000000000000
-ModuleTextSizeH=1.000000000000
-ModuleTextSizeThickness=0.150000000000
-SolderMaskClearance=0.000000000000
-SolderMaskMinWidth=0.000000000000
-DrawSegmentWidth=0.200000000000
-BoardOutlineThickness=0.100000000000
-ModuleOutlineThickness=0.150000000000
-[cvpcb]
-version=1
-NetIExt=net
-[eeschema]
-version=1
-LibDir=/home/mallikarjuna/Downloads/eSim-1.1.2/kicadSchematicLibrary
-[eeschema/libraries]
-LibName1=power
-LibName2=eSim_Analog
-LibName3=eSim_Devices
-LibName4=eSim_Digital
-LibName5=eSim_Hybrid
-LibName6=eSim_Miscellaneous
-LibName7=eSim_Plot
-LibName8=eSim_Power
-LibName9=eSim_Sources
-LibName10=eSim_User
-LibName11=eSim_Subckt
diff --git a/src/SubcircuitLibrary/AD620/AD620.sch b/src/SubcircuitLibrary/AD620/AD620.sch
deleted file mode 100644
index 8724fe19..00000000
--- a/src/SubcircuitLibrary/AD620/AD620.sch
+++ /dev/null
@@ -1,424 +0,0 @@
-EESchema Schematic File Version 2
-LIBS:power
-LIBS:eSim_Analog
-LIBS:eSim_Devices
-LIBS:eSim_Digital
-LIBS:eSim_Hybrid
-LIBS:eSim_Miscellaneous
-LIBS:eSim_Plot
-LIBS:eSim_Power
-LIBS:eSim_Sources
-LIBS:eSim_User
-LIBS:eSim_Subckt
-LIBS:AD620-cache
-EELAYER 25 0
-EELAYER END
-$Descr A4 11693 8268
-encoding utf-8
-Sheet 1 1
-Title ""
-Date ""
-Rev ""
-Comp ""
-Comment1 ""
-Comment2 ""
-Comment3 ""
-Comment4 ""
-$EndDescr
-$Comp
-L lm_741 X2
-U 1 1 5CEE7415
-P 3800 2750
-F 0 "X2" H 3600 2750 60  0000 C CNN
-F 1 "lm_741" H 3700 2500 60  0000 C CNN
-F 2 "" H 3800 2750 60  0000 C CNN
-F 3 "" H 3800 2750 60  0000 C CNN
-	1    3800 2750
-	1    0    0    1   
-$EndComp
-$Comp
-L lm_741 X1
-U 1 1 5CEE7416
-P 3750 5650
-F 0 "X1" H 3550 5650 60  0000 C CNN
-F 1 "lm_741" H 3650 5400 60  0000 C CNN
-F 2 "" H 3750 5650 60  0000 C CNN
-F 3 "" H 3750 5650 60  0000 C CNN
-	1    3750 5650
-	1    0    0    -1  
-$EndComp
-$Comp
-L lm_741 X3
-U 1 1 5CEE7417
-P 6800 4050
-F 0 "X3" H 6600 4050 60  0000 C CNN
-F 1 "lm_741" H 6700 3800 60  0000 C CNN
-F 2 "" H 6800 4050 60  0000 C CNN
-F 3 "" H 6800 4050 60  0000 C CNN
-	1    6800 4050
-	1    0    0    -1  
-$EndComp
-Wire Wire Line
-	3600 7150 1700 7150
-Wire Wire Line
-	3600 6100 3600 7150
-Wire Wire Line
-	6650 6700 3600 6700
-Wire Wire Line
-	6650 4500 6650 6700
-Connection ~ 3600 6700
-$Comp
-L eSim_R R1
-U 1 1 5CEE741A
-P 4550 3350
-F 0 "R1" H 4600 3480 50  0000 C CNN
-F 1 "24.7k" H 4600 3400 50  0000 C CNN
-F 2 "" H 4600 3330 30  0000 C CNN
-F 3 "" V 4600 3400 30  0000 C CNN
-	1    4550 3350
-	0    1    1    0   
-$EndComp
-$Comp
-L eSim_R R2
-U 1 1 5CEE741C
-P 4550 5000
-F 0 "R2" H 4600 5130 50  0000 C CNN
-F 1 "24.7k" H 4600 5050 50  0000 C CNN
-F 2 "" H 4600 4980 30  0000 C CNN
-F 3 "" V 4600 5050 30  0000 C CNN
-	1    4550 5000
-	0    1    1    0   
-$EndComp
-Wire Wire Line
-	4600 5200 4600 5650
-Wire Wire Line
-	4300 5650 4900 5650
-Wire Wire Line
-	4600 4450 4600 4900
-Wire Wire Line
-	4600 3550 4600 4150
-Wire Wire Line
-	4600 3250 4600 2750
-Wire Wire Line
-	4350 2750 5000 2750
-Wire Wire Line
-	4600 3800 2900 3800
-Wire Wire Line
-	2900 3800 2900 2900
-Wire Wire Line
-	2900 2900 3250 2900
-Connection ~ 4600 3800
-Wire Wire Line
-	4600 4700 2900 4700
-Wire Wire Line
-	2900 4700 2900 5500
-Wire Wire Line
-	2900 5500 3200 5500
-Connection ~ 4600 4700
-$Comp
-L eSim_R R4
-U 1 1 5CEE741D
-P 5200 2700
-F 0 "R4" H 5250 2830 50  0000 C CNN
-F 1 "10k" H 5250 2750 50  0000 C CNN
-F 2 "" H 5250 2680 30  0000 C CNN
-F 3 "" V 5250 2750 30  0000 C CNN
-	1    5200 2700
-	-1   0    0    1   
-$EndComp
-$Comp
-L eSim_R R3
-U 1 1 5CEE741E
-P 5100 5600
-F 0 "R3" H 5150 5730 50  0000 C CNN
-F 1 "10k" H 5150 5650 50  0000 C CNN
-F 2 "" H 5150 5580 30  0000 C CNN
-F 3 "" V 5150 5650 30  0000 C CNN
-	1    5100 5600
-	-1   0    0    1   
-$EndComp
-Connection ~ 4600 5650
-Wire Wire Line
-	5200 5650 6200 5650
-Wire Wire Line
-	5950 5650 5950 4150
-Wire Wire Line
-	5950 4150 6250 4150
-Wire Wire Line
-	6250 3900 5950 3900
-Wire Wire Line
-	5950 3900 5950 2750
-Wire Wire Line
-	5300 2750 6450 2750
-Connection ~ 4600 2750
-$Comp
-L eSim_R R6
-U 1 1 5CEE741F
-P 6650 2700
-F 0 "R6" H 6700 2830 50  0000 C CNN
-F 1 "10k" H 6700 2750 50  0000 C CNN
-F 2 "" H 6700 2680 30  0000 C CNN
-F 3 "" V 6700 2750 30  0000 C CNN
-	1    6650 2700
-	-1   0    0    1   
-$EndComp
-$Comp
-L eSim_R R5
-U 1 1 5CEE7420
-P 6400 5600
-F 0 "R5" H 6450 5730 50  0000 C CNN
-F 1 "10k" H 6450 5650 50  0000 C CNN
-F 2 "" H 6450 5580 30  0000 C CNN
-F 3 "" V 6450 5650 30  0000 C CNN
-	1    6400 5600
-	-1   0    0    1   
-$EndComp
-Connection ~ 5950 5650
-Connection ~ 5950 2750
-Wire Wire Line
-	6750 2750 7650 2750
-Wire Wire Line
-	7350 4050 7850 4050
-Wire Wire Line
-	2200 1150 6300 1150
-Wire Wire Line
-	6300 1150 6300 3600
-Wire Wire Line
-	6300 3600 6650 3600
-Wire Wire Line
-	2700 1150 2700 3550
-Wire Wire Line
-	2700 3550 3650 3550
-Wire Wire Line
-	3650 3550 3650 3200
-Connection ~ 2700 1150
-Wire Wire Line
-	3600 5200 3600 3550
-Connection ~ 3600 3550
-Wire Wire Line
-	2000 1800 2000 7150
-Wire Wire Line
-	2000 1800 3650 1800
-Wire Wire Line
-	3650 1800 3650 2300
-Connection ~ 2000 7150
-Connection ~ 7650 4050
-Wire Wire Line
-	6500 5650 7200 5650
-Wire Wire Line
-	1850 2650 3250 2650
-$Comp
-L PORT U1
-U 2 1 5CEE7CF8
-P 1600 2650
-F 0 "U1" H 1650 2750 30  0000 C CNN
-F 1 "PORT" H 1600 2650 30  0000 C CNN
-F 2 "" H 1600 2650 60  0000 C CNN
-F 3 "" H 1600 2650 60  0000 C CNN
-	2    1600 2650
-	1    0    0    -1  
-$EndComp
-$Comp
-L PORT U1
-U 3 1 5CEE7E32
-P 1500 5800
-F 0 "U1" H 1550 5900 30  0000 C CNN
-F 1 "PORT" H 1500 5800 30  0000 C CNN
-F 2 "" H 1500 5800 60  0000 C CNN
-F 3 "" H 1500 5800 60  0000 C CNN
-	3    1500 5800
-	1    0    0    -1  
-$EndComp
-$Comp
-L PORT U1
-U 4 1 5CEE7FF8
-P 1450 7150
-F 0 "U1" H 1500 7250 30  0000 C CNN
-F 1 "PORT" H 1450 7150 30  0000 C CNN
-F 2 "" H 1450 7150 60  0000 C CNN
-F 3 "" H 1450 7150 60  0000 C CNN
-	4    1450 7150
-	1    0    0    -1  
-$EndComp
-$Comp
-L PORT U1
-U 7 1 5CEE80BC
-P 1950 1150
-F 0 "U1" H 2000 1250 30  0000 C CNN
-F 1 "PORT" H 1950 1150 30  0000 C CNN
-F 2 "" H 1950 1150 60  0000 C CNN
-F 3 "" H 1950 1150 60  0000 C CNN
-	7    1950 1150
-	1    0    0    -1  
-$EndComp
-$Comp
-L PORT U1
-U 1 1 5CEE8180
-P 4350 4150
-F 0 "U1" H 4400 4250 30  0000 C CNN
-F 1 "PORT" H 4350 4150 30  0000 C CNN
-F 2 "" H 4350 4150 60  0000 C CNN
-F 3 "" H 4350 4150 60  0000 C CNN
-	1    4350 4150
-	1    0    0    -1  
-$EndComp
-$Comp
-L PORT U1
-U 8 1 5CEE8456
-P 4350 4450
-F 0 "U1" H 4400 4550 30  0000 C CNN
-F 1 "PORT" H 4350 4450 30  0000 C CNN
-F 2 "" H 4350 4450 60  0000 C CNN
-F 3 "" H 4350 4450 60  0000 C CNN
-	8    4350 4450
-	1    0    0    -1  
-$EndComp
-$Comp
-L PORT U1
-U 5 1 5CEE84A1
-P 7450 5650
-F 0 "U1" H 7500 5750 30  0000 C CNN
-F 1 "PORT" H 7450 5650 30  0000 C CNN
-F 2 "" H 7450 5650 60  0000 C CNN
-F 3 "" H 7450 5650 60  0000 C CNN
-	5    7450 5650
-	-1   0    0    1   
-$EndComp
-Wire Wire Line
-	7650 2750 7650 4050
-$Comp
-L PORT U1
-U 6 1 5CEE8938
-P 8100 4050
-F 0 "U1" H 8150 4150 30  0000 C CNN
-F 1 "PORT" H 8100 4050 30  0000 C CNN
-F 2 "" H 8100 4050 60  0000 C CNN
-F 3 "" H 8100 4050 60  0000 C CNN
-	6    8100 4050
-	-1   0    0    1   
-$EndComp
-Wire Wire Line
-	1750 5800 3200 5800
-Wire Wire Line
-	3200 5800 3200 5750
-$Comp
-L eSim_R R8
-U 1 1 5CEFB54F
-P 3700 3350
-F 0 "R8" H 3750 3480 50  0000 C CNN
-F 1 "0.297k" H 3750 3400 50  0000 C CNN
-F 2 "" H 3750 3330 30  0000 C CNN
-F 3 "" V 3750 3400 30  0000 C CNN
-	1    3700 3350
-	0    1    1    0   
-$EndComp
-$Comp
-L eSim_R R10
-U 1 1 5CEFB5A3
-P 4000 3350
-F 0 "R10" H 4050 3480 50  0000 C CNN
-F 1 "1k" H 4050 3400 50  0000 C CNN
-F 2 "" H 4050 3330 30  0000 C CNN
-F 3 "" V 4050 3400 30  0000 C CNN
-	1    4000 3350
-	0    1    1    0   
-$EndComp
-Wire Wire Line
-	4050 3250 4050 3100
-Wire Wire Line
-	4050 3100 3850 3100
-Wire Wire Line
-	3750 3150 3750 3250
-Wire Wire Line
-	3750 3550 3750 3650
-Wire Wire Line
-	3750 3650 4050 3650
-Wire Wire Line
-	4050 3650 4050 3550
-Wire Wire Line
-	3900 3650 3900 3950
-Wire Wire Line
-	3900 3950 2000 3950
-Connection ~ 2000 3950
-Connection ~ 3900 3650
-$Comp
-L eSim_R R7
-U 1 1 5CEFB900
-P 3650 4950
-F 0 "R7" H 3700 5080 50  0000 C CNN
-F 1 "0.297k" H 3700 5000 50  0000 C CNN
-F 2 "" H 3700 4930 30  0000 C CNN
-F 3 "" V 3700 5000 30  0000 C CNN
-	1    3650 4950
-	0    1    1    0   
-$EndComp
-$Comp
-L eSim_R R9
-U 1 1 5CEFB962
-P 3950 4950
-F 0 "R9" H 4000 5080 50  0000 C CNN
-F 1 "1k" H 4000 5000 50  0000 C CNN
-F 2 "" H 4000 4930 30  0000 C CNN
-F 3 "" V 4000 5000 30  0000 C CNN
-	1    3950 4950
-	0    1    1    0   
-$EndComp
-Wire Wire Line
-	4000 4800 4000 4850
-Wire Wire Line
-	3700 4800 4000 4800
-Wire Wire Line
-	3700 4800 3700 4850
-Wire Wire Line
-	3700 5150 3700 5250
-Wire Wire Line
-	3800 5300 3800 5150
-Wire Wire Line
-	3800 5150 4000 5150
-Wire Wire Line
-	3900 4800 3900 4500
-Wire Wire Line
-	3900 4500 2000 4500
-Connection ~ 2000 4500
-Connection ~ 3900 4800
-$Comp
-L eSim_R R12
-U 1 1 5CEFB846
-P 7050 3350
-F 0 "R12" H 7100 3480 50  0000 C CNN
-F 1 "1k" H 7100 3400 50  0000 C CNN
-F 2 "" H 7100 3330 30  0000 C CNN
-F 3 "" V 7100 3400 30  0000 C CNN
-	1    7050 3350
-	0    1    1    0   
-$EndComp
-$Comp
-L eSim_R R11
-U 1 1 5CEFB8CA
-P 6700 3350
-F 0 "R11" H 6750 3480 50  0000 C CNN
-F 1 "0.75732k" H 6750 3400 50  0000 C CNN
-F 2 "" H 6750 3330 30  0000 C CNN
-F 3 "" V 6750 3400 30  0000 C CNN
-	1    6700 3350
-	0    1    1    0   
-$EndComp
-Wire Wire Line
-	6750 3550 6750 3650
-Wire Wire Line
-	6750 3250 6750 3100
-Wire Wire Line
-	6750 3100 7500 3100
-Wire Wire Line
-	7100 3100 7100 3250
-Wire Wire Line
-	7100 3550 7100 3700
-Wire Wire Line
-	7100 3700 6850 3700
-Wire Wire Line
-	7500 3100 7500 4650
-Wire Wire Line
-	7500 4650 6650 4650
-Connection ~ 6650 4650
-Connection ~ 7100 3100
-$EndSCHEMATC
diff --git a/src/SubcircuitLibrary/AD620/AD620.sub b/src/SubcircuitLibrary/AD620/AD620.sub
deleted file mode 100644
index 1be97dbd..00000000
--- a/src/SubcircuitLibrary/AD620/AD620.sub
+++ /dev/null
@@ -1,22 +0,0 @@
-* Subcircuit AD620

-.subckt AD620 net-_r1-pad2_ net-_u1-pad2_ net-_u1-pad3_ net-_r10-pad2_ net-_r5-pad1_ net-_r6-pad1_ net-_u1-pad7_ net-_r2-pad1_ 

-* c:\users\malli\esim\src\subcircuitlibrary\ad620\ad620.cir

-.include lm_741.sub

-x2 net-_r8-pad1_ net-_r1-pad2_ net-_u1-pad2_ net-_r10-pad2_ net-_r10-pad1_ net-_r1-pad1_ net-_u1-pad7_ ? lm_741

-x1 net-_r7-pad2_ net-_r2-pad1_ net-_u1-pad3_ net-_r10-pad2_ net-_r9-pad2_ net-_r2-pad2_ net-_u1-pad7_ ? lm_741

-x3 net-_r11-pad2_ net-_r4-pad1_ net-_r3-pad1_ net-_r10-pad2_ net-_r12-pad2_ net-_r6-pad1_ net-_u1-pad7_ ? lm_741

-r1  net-_r1-pad1_ net-_r1-pad2_ 24.7k

-r2  net-_r2-pad1_ net-_r2-pad2_ 24.7k

-r4  net-_r4-pad1_ net-_r1-pad1_ 10k

-r3  net-_r3-pad1_ net-_r2-pad2_ 10k

-r6  net-_r6-pad1_ net-_r4-pad1_ 10k

-r5  net-_r5-pad1_ net-_r3-pad1_ 10k

-r8  net-_r8-pad1_ net-_r10-pad2_ 0.297k

-r10  net-_r10-pad1_ net-_r10-pad2_ 1k

-r7  net-_r10-pad2_ net-_r7-pad2_ 0.297k

-r9  net-_r10-pad2_ net-_r9-pad2_ 1k

-r12  net-_r10-pad2_ net-_r12-pad2_ 1k

-r11  net-_r10-pad2_ net-_r11-pad2_ 0.75732k

-* Control Statements

-

-.ends AD620
\ No newline at end of file
diff --git a/src/SubcircuitLibrary/AD620/AD620_Previous_Values.xml b/src/SubcircuitLibrary/AD620/AD620_Previous_Values.xml
deleted file mode 100644
index 3a4f8217..00000000
--- a/src/SubcircuitLibrary/AD620/AD620_Previous_Values.xml
+++ /dev/null
@@ -1 +0,0 @@
-<KicadtoNgspice><source /><model /><devicemodel /><subcircuit><x2><field>C:\Users\malli\eSim\src\SubcircuitLibrary\lm_741</field></x2><x3><field>C:\Users\malli\eSim\src\SubcircuitLibrary\lm_741</field></x3><x1><field>C:\Users\malli\eSim\src\SubcircuitLibrary\lm_741</field></x1></subcircuit><analysis><ac><field1 name="Lin">true</field1><field2 name="Dec">false</field2><field3 name="Oct">false</field3><field4 name="Start Frequency" /><field5 name="Stop Frequency" /><field6 name="No. of points" /><field7 name="Start Fre Combo">Hz</field7><field8 name="Stop Fre Combo">Hz</field8></ac><dc><field1 name="Source 1" /><field2 name="Start" /><field3 name="Increment" /><field4 name="Stop" /><field5 name="Operating Point">0</field5><field6 name="Start Combo">Volts or Amperes</field6><field7 name="Increment Combo">Volts or Amperes</field7><field8 name="Stop Combo">Volts or Amperes</field8><field9 name="Source 2" /><field10 name="Start" /><field11 name="Increment" /><field12 name="Stop" /><field13 name="Start Combo">Volts or Amperes</field13><field14 name="Increment Combo">Volts or Amperes</field14><field15 name="Stop Combo">Volts or Amperes</field15></dc><tran><field1 name="Start Time" /><field2 name="Step Time" /><field3 name="Stop Time" /><field4 name="Start Combo">Sec</field4><field5 name="Step Combo">ms</field5><field6 name="Stop Combo">Sec</field6></tran></analysis></KicadtoNgspice>
\ No newline at end of file
diff --git a/src/SubcircuitLibrary/AD620/analysis b/src/SubcircuitLibrary/AD620/analysis
deleted file mode 100644
index cf94dd7f..00000000
--- a/src/SubcircuitLibrary/AD620/analysis
+++ /dev/null
@@ -1 +0,0 @@
-.tran 0e-03 0e-00 0e-00
\ No newline at end of file
diff --git a/src/SubcircuitLibrary/AD620/lm_741-cache.lib b/src/SubcircuitLibrary/AD620/lm_741-cache.lib
deleted file mode 100644
index 6e908886..00000000
--- a/src/SubcircuitLibrary/AD620/lm_741-cache.lib
+++ /dev/null
@@ -1,119 +0,0 @@
-EESchema-LIBRARY Version 2.3

-#encoding utf-8

-#

-# PORT

-#

-DEF PORT U 0 40 Y Y 26 F N

-F0 "U" 50 100 30 H V C CNN

-F1 "PORT" 0 0 30 H V C CNN

-F2 "" 0 0 60 H V C CNN

-F3 "" 0 0 60 H V C CNN

-DRAW

-A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0

-A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50

-S -100 50 100 -50 0 1 0 N

-X ~ 1 250 0 100 L 30 30 1 1 B

-X ~ 2 250 0 100 L 30 30 2 1 B

-X ~ 3 250 0 100 L 30 30 3 1 B

-X ~ 4 250 0 100 L 30 30 4 1 B

-X ~ 5 250 0 100 L 30 30 5 1 B

-X ~ 6 250 0 100 L 30 30 6 1 B

-X ~ 7 250 0 100 L 30 30 7 1 B

-X ~ 8 250 0 100 L 30 30 8 1 B

-X ~ 9 250 0 100 L 30 30 9 1 B

-X ~ 10 250 0 100 L 30 30 10 1 B

-X ~ 11 250 0 100 L 30 30 11 1 B

-X ~ 12 250 0 100 L 30 30 12 1 B

-X ~ 13 250 0 100 L 30 30 13 1 B

-X ~ 14 250 0 100 L 30 30 14 1 B

-X ~ 15 250 0 100 L 30 30 15 1 B

-X ~ 16 250 0 100 L 30 30 16 1 B

-X ~ 17 250 0 100 L 30 30 17 1 B

-X ~ 18 250 0 100 L 30 30 18 1 B

-X ~ 19 250 0 100 L 30 30 19 1 B

-X ~ 20 250 0 100 L 30 30 20 1 B

-X ~ 21 250 0 100 L 30 30 21 1 B

-X ~ 22 250 0 100 L 30 30 22 1 B

-X ~ 23 250 0 100 L 30 30 23 1 B

-X ~ 24 250 0 100 L 30 30 24 1 B

-X ~ 25 250 0 100 L 30 30 25 1 B

-X ~ 26 250 0 100 L 30 30 26 1 B

-ENDDRAW

-ENDDEF

-#

-# eSim_C

-#

-DEF eSim_C C 0 10 N Y 1 F N

-F0 "C" 25 100 50 H V L CNN

-F1 "eSim_C" 25 -100 50 H V L CNN

-F2 "" 38 -150 30 H V C CNN

-F3 "" 0 0 60 H V C CNN

-$FPLIST

- C_*

-$ENDFPLIST

-DRAW

-P 2 0 1 20  -80 -30  80 -30 N

-P 2 0 1 20  -80 30  80 30 N

-X ~ 1 0 150 110 D 40 40 1 1 P

-X ~ 2 0 -150 110 U 40 40 1 1 P

-ENDDRAW

-ENDDEF

-#

-# eSim_NPN

-#

-DEF eSim_NPN Q 0 0 Y N 1 F N

-F0 "Q" -100 50 50 H V R CNN

-F1 "eSim_NPN" -50 150 50 H V R CNN

-F2 "" 200 100 29 H V C CNN

-F3 "" 0 0 60 H V C CNN

-ALIAS BC547 Q2N2222

-DRAW

-C 50 0 111 0 1 10 N

-P 2 0 1 0  25 25  100 100 N

-P 3 0 1 0  25 -25  100 -100  100 -100 N

-P 3 0 1 20  25 75  25 -75  25 -75 N

-P 5 0 1 0  50 -70  70 -50  90 -90  50 -70  50 -70 F

-X C 1 100 200 100 D 50 50 1 1 C

-X B 2 -200 0 225 R 50 50 1 1 I

-X E 3 100 -200 100 U 50 50 1 1 E

-ENDDRAW

-ENDDEF

-#

-# eSim_PNP

-#

-DEF eSim_PNP Q 0 0 Y N 1 F N

-F0 "Q" -100 50 50 H V R CNN

-F1 "eSim_PNP" -50 150 50 H V R CNN

-F2 "" 200 100 29 H V C CNN

-F3 "" 0 0 60 H V C CNN

-DRAW

-C 50 0 111 0 1 10 N

-P 2 0 1 0  25 25  100 100 N

-P 3 0 1 0  25 -25  100 -100  100 -100 N

-P 3 0 1 20  25 75  25 -75  25 -75 N

-P 5 0 1 0  90 -70  70 -90  50 -50  90 -70  90 -70 F

-X C 1 100 200 100 D 50 50 1 1 C

-X B 2 -200 0 225 R 50 50 1 1 I

-X E 3 100 -200 100 U 50 50 1 1 E

-ENDDRAW

-ENDDEF

-#

-# eSim_R

-#

-DEF eSim_R R 0 0 N Y 1 F N

-F0 "R" 50 130 50 H V C CNN

-F1 "eSim_R" 50 50 50 H V C CNN

-F2 "" 50 -20 30 H V C CNN

-F3 "" 50 50 30 V V C CNN

-$FPLIST

- R_*

- Resistor_*

-$ENDFPLIST

-DRAW

-S 150 10 -50 90 0 1 10 N

-X ~ 1 -100 50 50 R 60 60 1 1 P

-X ~ 2 200 50 50 L 60 60 1 1 P

-ENDDRAW

-ENDDEF

-#

-#End Library

diff --git a/src/SubcircuitLibrary/AD620/lm_741.cir b/src/SubcircuitLibrary/AD620/lm_741.cir
deleted file mode 100644
index b7989199..00000000
--- a/src/SubcircuitLibrary/AD620/lm_741.cir
+++ /dev/null
@@ -1,43 +0,0 @@
-* C:\Users\malli\eSim\src\SubcircuitLibrary\lm_741\lm_741.cir

-

-* EESchema Netlist Version 1.1 (Spice format) creation date: 05/25/19 19:37:28

-

-* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N

-* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0

-

-* Sheet Name: /

-Q1  Net-_Q1-Pad1_ Net-_Q1-Pad2_ Net-_Q1-Pad3_ eSim_NPN		

-Q2  Net-_Q1-Pad1_ Net-_Q2-Pad2_ Net-_Q2-Pad3_ eSim_NPN		

-Q6  Net-_Q3-Pad2_ Net-_Q13-Pad1_ Net-_Q1-Pad3_ eSim_PNP		

-Q5  Net-_C1-Pad2_ Net-_Q13-Pad1_ Net-_Q2-Pad3_ eSim_PNP		

-Q3  Net-_Q10-Pad3_ Net-_Q3-Pad2_ Net-_Q3-Pad3_ eSim_NPN		

-Q4  Net-_Q1-Pad1_ Net-_Q1-Pad1_ Net-_Q10-Pad3_ eSim_PNP		

-Q9  Net-_Q13-Pad1_ Net-_Q1-Pad1_ Net-_Q10-Pad3_ eSim_PNP		

-Q8  Net-_C1-Pad2_ Net-_Q3-Pad3_ Net-_Q8-Pad3_ eSim_NPN		

-Q7  Net-_Q3-Pad2_ Net-_Q3-Pad3_ Net-_Q7-Pad3_ eSim_NPN		

-R1  Net-_Q7-Pad3_ Net-_Q12-Pad3_ 1k		

-R2  Net-_Q3-Pad3_ Net-_Q12-Pad3_ 50k		

-R3  Net-_Q8-Pad3_ Net-_Q12-Pad3_ 1k		

-Q12  Net-_Q12-Pad1_ Net-_Q12-Pad1_ Net-_Q12-Pad3_ eSim_NPN		

-Q13  Net-_Q13-Pad1_ Net-_Q12-Pad1_ Net-_Q13-Pad3_ eSim_NPN		

-R4  Net-_Q13-Pad3_ Net-_Q12-Pad3_ 5k		

-R11  Net-_Q10-Pad1_ Net-_Q12-Pad1_ 39k		

-Q10  Net-_Q10-Pad1_ Net-_Q10-Pad1_ Net-_Q10-Pad3_ eSim_PNP		

-Q11  Net-_C1-Pad1_ Net-_Q10-Pad1_ Net-_Q10-Pad3_ eSim_PNP		

-Q14  Net-_C1-Pad1_ Net-_Q14-Pad2_ Net-_Q14-Pad3_ eSim_NPN		

-R8  Net-_C1-Pad1_ Net-_Q14-Pad2_ 4.5k		

-R7  Net-_Q14-Pad3_ Net-_Q14-Pad2_ 7.5k		

-C1  Net-_C1-Pad1_ Net-_C1-Pad2_ 30p		

-Q16  Net-_Q14-Pad3_ Net-_C1-Pad2_ Net-_Q15-Pad2_ eSim_NPN		

-Q15  Net-_Q14-Pad3_ Net-_Q15-Pad2_ Net-_Q15-Pad3_ eSim_NPN		

-R5  Net-_Q15-Pad2_ Net-_Q12-Pad3_ 50k		

-R6  Net-_Q15-Pad3_ Net-_Q12-Pad3_ 50		

-Q17  Net-_C1-Pad2_ Net-_Q15-Pad3_ Net-_Q12-Pad3_ eSim_NPN		

-Q18  Net-_Q10-Pad3_ Net-_C1-Pad1_ Net-_Q18-Pad3_ eSim_NPN		

-Q20  Net-_C1-Pad1_ Net-_Q18-Pad3_ Net-_Q20-Pad3_ eSim_NPN		

-R9  Net-_Q18-Pad3_ Net-_Q20-Pad3_ 25		

-R10  Net-_Q20-Pad3_ Net-_Q19-Pad3_ 50		

-Q19  Net-_Q12-Pad3_ Net-_Q14-Pad3_ Net-_Q19-Pad3_ eSim_PNP		

-U1  Net-_Q7-Pad3_ Net-_Q2-Pad2_ Net-_Q1-Pad2_ Net-_Q12-Pad3_ Net-_Q8-Pad3_ Net-_Q20-Pad3_ Net-_Q10-Pad3_ ? PORT		

-

-.end

diff --git a/src/SubcircuitLibrary/AD620/lm_741.cir.out b/src/SubcircuitLibrary/AD620/lm_741.cir.out
deleted file mode 100644
index 0184209e..00000000
--- a/src/SubcircuitLibrary/AD620/lm_741.cir.out
+++ /dev/null
@@ -1,46 +0,0 @@
-* c:\users\malli\esim\src\subcircuitlibrary\lm_741\lm_741.cir

-

-.include npn_1.lib

-.include pnp_1.lib

-q1 net-_q1-pad1_ net-_q1-pad2_ net-_q1-pad3_ npn_1

-q2 net-_q1-pad1_ net-_q2-pad2_ net-_q2-pad3_ npn_1

-q6 net-_q3-pad2_ net-_q13-pad1_ net-_q1-pad3_ pnp_1

-q5 net-_c1-pad2_ net-_q13-pad1_ net-_q2-pad3_ pnp_1

-q3 net-_q10-pad3_ net-_q3-pad2_ net-_q3-pad3_ npn_1

-q4 net-_q1-pad1_ net-_q1-pad1_ net-_q10-pad3_ pnp_1

-q9 net-_q13-pad1_ net-_q1-pad1_ net-_q10-pad3_ pnp_1

-q8 net-_c1-pad2_ net-_q3-pad3_ net-_q8-pad3_ npn_1

-q7 net-_q3-pad2_ net-_q3-pad3_ net-_q7-pad3_ npn_1

-r1  net-_q7-pad3_ net-_q12-pad3_ 1k

-r2  net-_q3-pad3_ net-_q12-pad3_ 50k

-r3  net-_q8-pad3_ net-_q12-pad3_ 1k

-q12 net-_q12-pad1_ net-_q12-pad1_ net-_q12-pad3_ npn_1

-q13 net-_q13-pad1_ net-_q12-pad1_ net-_q13-pad3_ npn_1

-r4  net-_q13-pad3_ net-_q12-pad3_ 5k

-r11  net-_q10-pad1_ net-_q12-pad1_ 39k

-q10 net-_q10-pad1_ net-_q10-pad1_ net-_q10-pad3_ pnp_1

-q11 net-_c1-pad1_ net-_q10-pad1_ net-_q10-pad3_ pnp_1

-q14 net-_c1-pad1_ net-_q14-pad2_ net-_q14-pad3_ npn_1

-r8  net-_c1-pad1_ net-_q14-pad2_ 4.5k

-r7  net-_q14-pad3_ net-_q14-pad2_ 7.5k

-c1  net-_c1-pad1_ net-_c1-pad2_ 30p

-q16 net-_q14-pad3_ net-_c1-pad2_ net-_q15-pad2_ npn_1

-q15 net-_q14-pad3_ net-_q15-pad2_ net-_q15-pad3_ npn_1

-r5  net-_q15-pad2_ net-_q12-pad3_ 50k

-r6  net-_q15-pad3_ net-_q12-pad3_ 50

-q17 net-_c1-pad2_ net-_q15-pad3_ net-_q12-pad3_ npn_1

-q18 net-_q10-pad3_ net-_c1-pad1_ net-_q18-pad3_ npn_1

-q20 net-_c1-pad1_ net-_q18-pad3_ net-_q20-pad3_ npn_1

-r9  net-_q18-pad3_ net-_q20-pad3_ 25

-r10  net-_q20-pad3_ net-_q19-pad3_ 50

-q19 net-_q12-pad3_ net-_q14-pad3_ net-_q19-pad3_ pnp_1

-* u1  net-_q7-pad3_ net-_q2-pad2_ net-_q1-pad2_ net-_q12-pad3_ net-_q8-pad3_ net-_q20-pad3_ net-_q10-pad3_ ? port

-.tran 0e-00 0e-00 0e-00

-

-* Control Statements 

-.control

-run

-print allv > plot_data_v.txt

-print alli > plot_data_i.txt

-.endc

-.end

diff --git a/src/SubcircuitLibrary/AD620/lm_741.pro b/src/SubcircuitLibrary/AD620/lm_741.pro
deleted file mode 100644
index d7d4217f..00000000
--- a/src/SubcircuitLibrary/AD620/lm_741.pro
+++ /dev/null
@@ -1,45 +0,0 @@
-update=05/25/19 14:52:30

-version=1

-last_client=eeschema

-[general]

-version=1

-RootSch=

-BoardNm=

-[pcbnew]

-version=1

-LastNetListRead=

-UseCmpFile=1

-PadDrill=0.600000000000

-PadDrillOvalY=0.600000000000

-PadSizeH=1.500000000000

-PadSizeV=1.500000000000

-PcbTextSizeV=1.500000000000

-PcbTextSizeH=1.500000000000

-PcbTextThickness=0.300000000000

-ModuleTextSizeV=1.000000000000

-ModuleTextSizeH=1.000000000000

-ModuleTextSizeThickness=0.150000000000

-SolderMaskClearance=0.000000000000

-SolderMaskMinWidth=0.000000000000

-DrawSegmentWidth=0.200000000000

-BoardOutlineThickness=0.100000000000

-ModuleOutlineThickness=0.150000000000

-[cvpcb]

-version=1

-NetIExt=net

-[eeschema]

-version=1

-LibDir=

-[eeschema/libraries]

-LibName1=power

-LibName2=eSim_Analog

-LibName3=eSim_Devices

-LibName4=eSim_Digital

-LibName5=eSim_Hybrid

-LibName6=eSim_Miscellaneous

-LibName7=eSim_Plot

-LibName8=eSim_Power

-LibName9=eSim_PSpice

-LibName10=eSim_Sources

-LibName11=eSim_Subckt

-LibName12=eSim_User

diff --git a/src/SubcircuitLibrary/AD620/lm_741.sch b/src/SubcircuitLibrary/AD620/lm_741.sch
deleted file mode 100644
index 6a74cf22..00000000
--- a/src/SubcircuitLibrary/AD620/lm_741.sch
+++ /dev/null
@@ -1,697 +0,0 @@
-EESchema Schematic File Version 2

-LIBS:power

-LIBS:eSim_Analog

-LIBS:eSim_Devices

-LIBS:eSim_Digital

-LIBS:eSim_Hybrid

-LIBS:eSim_Miscellaneous

-LIBS:eSim_Plot

-LIBS:eSim_Power

-LIBS:eSim_PSpice

-LIBS:eSim_Sources

-LIBS:eSim_Subckt

-LIBS:eSim_User

-LIBS:lm_741-cache

-EELAYER 25 0

-EELAYER END

-$Descr A4 11693 8268

-encoding utf-8

-Sheet 1 1

-Title ""

-Date ""

-Rev ""

-Comp ""

-Comment1 ""

-Comment2 ""

-Comment3 ""

-Comment4 ""

-$EndDescr

-$Comp

-L eSim_NPN Q1

-U 1 1 5CE90A7B

-P 2650 2700

-F 0 "Q1" H 2550 2750 50  0000 R CNN

-F 1 "eSim_NPN" H 2600 2850 50  0000 R CNN

-F 2 "" H 2850 2800 29  0000 C CNN

-F 3 "" H 2650 2700 60  0000 C CNN

-	1    2650 2700

-	1    0    0    -1  

-$EndComp

-$Comp

-L eSim_NPN Q2

-U 1 1 5CE90A7C

-P 4300 2700

-F 0 "Q2" H 4200 2750 50  0000 R CNN

-F 1 "eSim_NPN" H 4250 2850 50  0000 R CNN

-F 2 "" H 4500 2800 29  0000 C CNN

-F 3 "" H 4300 2700 60  0000 C CNN

-	1    4300 2700

-	-1   0    0    -1  

-$EndComp

-$Comp

-L eSim_PNP Q6

-U 1 1 5CE90A7D

-P 3000 3200

-F 0 "Q6" H 2900 3250 50  0000 R CNN

-F 1 "eSim_PNP" H 2950 3350 50  0000 R CNN

-F 2 "" H 3200 3300 29  0000 C CNN

-F 3 "" H 3000 3200 60  0000 C CNN

-	1    3000 3200

-	-1   0    0    1   

-$EndComp

-$Comp

-L eSim_PNP Q5

-U 1 1 5CE90A7E

-P 3950 3200

-F 0 "Q5" H 3850 3250 50  0000 R CNN

-F 1 "eSim_PNP" H 3900 3350 50  0000 R CNN

-F 2 "" H 4150 3300 29  0000 C CNN

-F 3 "" H 3950 3200 60  0000 C CNN

-	1    3950 3200

-	1    0    0    1   

-$EndComp

-$Comp

-L eSim_NPN Q3

-U 1 1 5CE90A7F

-P 3300 4000

-F 0 "Q3" H 3200 4050 50  0000 R CNN

-F 1 "eSim_NPN" H 3250 4150 50  0000 R CNN

-F 2 "" H 3500 4100 29  0000 C CNN

-F 3 "" H 3300 4000 60  0000 C CNN

-	1    3300 4000

-	1    0    0    -1  

-$EndComp

-$Comp

-L eSim_PNP Q4

-U 1 1 5CE90A80

-P 3850 2000

-F 0 "Q4" H 3750 2050 50  0000 R CNN

-F 1 "eSim_PNP" H 3800 2150 50  0000 R CNN

-F 2 "" H 4050 2100 29  0000 C CNN

-F 3 "" H 3850 2000 60  0000 C CNN

-	1    3850 2000

-	-1   0    0    1   

-$EndComp

-$Comp

-L eSim_PNP Q9

-U 1 1 5CE90A81

-P 5200 2000

-F 0 "Q9" H 5100 2050 50  0000 R CNN

-F 1 "eSim_PNP" H 5150 2150 50  0000 R CNN

-F 2 "" H 5400 2100 29  0000 C CNN

-F 3 "" H 5200 2000 60  0000 C CNN

-	1    5200 2000

-	1    0    0    1   

-$EndComp

-$Comp

-L eSim_NPN Q8

-U 1 1 5CE90A82

-P 3950 4600

-F 0 "Q8" H 3850 4650 50  0000 R CNN

-F 1 "eSim_NPN" H 3900 4750 50  0000 R CNN

-F 2 "" H 4150 4700 29  0000 C CNN

-F 3 "" H 3950 4600 60  0000 C CNN

-	1    3950 4600

-	1    0    0    -1  

-$EndComp

-$Comp

-L eSim_NPN Q7

-U 1 1 5CE90A83

-P 3000 4600

-F 0 "Q7" H 2900 4650 50  0000 R CNN

-F 1 "eSim_NPN" H 2950 4750 50  0000 R CNN

-F 2 "" H 3200 4700 29  0000 C CNN

-F 3 "" H 3000 4600 60  0000 C CNN

-	1    3000 4600

-	-1   0    0    -1  

-$EndComp

-$Comp

-L eSim_R R1

-U 1 1 5CE90A84

-P 2850 5200

-F 0 "R1" H 2900 5330 50  0000 C CNN

-F 1 "1k" H 2900 5250 50  0000 C CNN

-F 2 "" H 2900 5180 30  0000 C CNN

-F 3 "" V 2900 5250 30  0000 C CNN

-	1    2850 5200

-	0    1    1    0   

-$EndComp

-$Comp

-L eSim_R R2

-U 1 1 5CE90A85

-P 3550 5200

-F 0 "R2" H 3600 5330 50  0000 C CNN

-F 1 "50k" H 3600 5250 50  0000 C CNN

-F 2 "" H 3600 5180 30  0000 C CNN

-F 3 "" V 3600 5250 30  0000 C CNN

-	1    3550 5200

-	0    1    1    0   

-$EndComp

-$Comp

-L eSim_R R3

-U 1 1 5CE90A86

-P 4000 5200

-F 0 "R3" H 4050 5330 50  0000 C CNN

-F 1 "1k" H 4050 5250 50  0000 C CNN

-F 2 "" H 4050 5180 30  0000 C CNN

-F 3 "" V 4050 5250 30  0000 C CNN

-	1    4000 5200

-	0    1    1    0   

-$EndComp

-$Comp

-L eSim_NPN Q12

-U 1 1 5CE90A87

-P 6300 4700

-F 0 "Q12" H 6200 4750 50  0000 R CNN

-F 1 "eSim_NPN" H 6250 4850 50  0000 R CNN

-F 2 "" H 6500 4800 29  0000 C CNN

-F 3 "" H 6300 4700 60  0000 C CNN

-	1    6300 4700

-	1    0    0    -1  

-$EndComp

-$Comp

-L eSim_NPN Q13

-U 1 1 5CE90A88

-P 5400 4700

-F 0 "Q13" H 5300 4750 50  0000 R CNN

-F 1 "eSim_NPN" H 5350 4850 50  0000 R CNN

-F 2 "" H 5600 4800 29  0000 C CNN

-F 3 "" H 5400 4700 60  0000 C CNN

-	1    5400 4700

-	-1   0    0    -1  

-$EndComp

-$Comp

-L eSim_R R4

-U 1 1 5CE90A89

-P 5250 5200

-F 0 "R4" H 5300 5330 50  0000 C CNN

-F 1 "5k" H 5300 5250 50  0000 C CNN

-F 2 "" H 5300 5180 30  0000 C CNN

-F 3 "" V 5300 5250 30  0000 C CNN

-	1    5250 5200

-	0    1    1    0   

-$EndComp

-$Comp

-L eSim_R R11

-U 1 1 5CE90A8A

-P 6350 2750

-F 0 "R11" H 6400 2880 50  0000 C CNN

-F 1 "39k" H 6400 2800 50  0000 C CNN

-F 2 "" H 6400 2730 30  0000 C CNN

-F 3 "" V 6400 2800 30  0000 C CNN

-	1    6350 2750

-	0    1    1    0   

-$EndComp

-$Comp

-L eSim_PNP Q10

-U 1 1 5CE90A8B

-P 6500 1950

-F 0 "Q10" H 6400 2000 50  0000 R CNN

-F 1 "eSim_PNP" H 6450 2100 50  0000 R CNN

-F 2 "" H 6700 2050 29  0000 C CNN

-F 3 "" H 6500 1950 60  0000 C CNN

-	1    6500 1950

-	-1   0    0    1   

-$EndComp

-$Comp

-L eSim_PNP Q11

-U 1 1 5CE90A8C

-P 7500 1950

-F 0 "Q11" H 7400 2000 50  0000 R CNN

-F 1 "eSim_PNP" H 7450 2100 50  0000 R CNN

-F 2 "" H 7700 2050 29  0000 C CNN

-F 3 "" H 7500 1950 60  0000 C CNN

-	1    7500 1950

-	1    0    0    1   

-$EndComp

-$Comp

-L eSim_NPN Q14

-U 1 1 5CE90A8D

-P 7500 3050

-F 0 "Q14" H 7400 3100 50  0000 R CNN

-F 1 "eSim_NPN" H 7450 3200 50  0000 R CNN

-F 2 "" H 7700 3150 29  0000 C CNN

-F 3 "" H 7500 3050 60  0000 C CNN

-	1    7500 3050

-	1    0    0    -1  

-$EndComp

-$Comp

-L eSim_R R8

-U 1 1 5CE90A8E

-P 7300 2600

-F 0 "R8" H 7350 2730 50  0000 C CNN

-F 1 "4.5k" H 7350 2650 50  0000 C CNN

-F 2 "" H 7350 2580 30  0000 C CNN

-F 3 "" V 7350 2650 30  0000 C CNN

-	1    7300 2600

-	-1   0    0    1   

-$EndComp

-$Comp

-L eSim_R R7

-U 1 1 5CE90A8F

-P 7300 3400

-F 0 "R7" H 7350 3530 50  0000 C CNN

-F 1 "7.5k" H 7350 3450 50  0000 C CNN

-F 2 "" H 7350 3380 30  0000 C CNN

-F 3 "" V 7350 3450 30  0000 C CNN

-	1    7300 3400

-	-1   0    0    1   

-$EndComp

-$Comp

-L eSim_C C1

-U 1 1 5CE90A90

-P 6600 3200

-F 0 "C1" H 6625 3300 50  0000 L CNN

-F 1 "30p" H 6625 3100 50  0000 L CNN

-F 2 "" H 6638 3050 30  0000 C CNN

-F 3 "" H 6600 3200 60  0000 C CNN

-	1    6600 3200

-	1    0    0    -1  

-$EndComp

-$Comp

-L eSim_NPN Q16

-U 1 1 5CE90A91

-P 7050 3950

-F 0 "Q16" H 6950 4000 50  0000 R CNN

-F 1 "eSim_NPN" H 7000 4100 50  0000 R CNN

-F 2 "" H 7250 4050 29  0000 C CNN

-F 3 "" H 7050 3950 60  0000 C CNN

-	1    7050 3950

-	1    0    0    -1  

-$EndComp

-$Comp

-L eSim_NPN Q15

-U 1 1 5CE90A92

-P 7500 4300

-F 0 "Q15" H 7400 4350 50  0000 R CNN

-F 1 "eSim_NPN" H 7450 4450 50  0000 R CNN

-F 2 "" H 7700 4400 29  0000 C CNN

-F 3 "" H 7500 4300 60  0000 C CNN

-	1    7500 4300

-	1    0    0    -1  

-$EndComp

-$Comp

-L eSim_R R5

-U 1 1 5CE90A93

-P 7100 5050

-F 0 "R5" H 7150 5180 50  0000 C CNN

-F 1 "50k" H 7150 5100 50  0000 C CNN

-F 2 "" H 7150 5030 30  0000 C CNN

-F 3 "" V 7150 5100 30  0000 C CNN

-	1    7100 5050

-	0    1    1    0   

-$EndComp

-$Comp

-L eSim_R R6

-U 1 1 5CE90A94

-P 7550 5050

-F 0 "R6" H 7600 5180 50  0000 C CNN

-F 1 "50" H 7600 5100 50  0000 C CNN

-F 2 "" H 7600 5030 30  0000 C CNN

-F 3 "" V 7600 5100 30  0000 C CNN

-	1    7550 5050

-	0    1    1    0   

-$EndComp

-$Comp

-L eSim_NPN Q17

-U 1 1 5CE90A95

-P 6800 4700

-F 0 "Q17" H 6700 4750 50  0000 R CNN

-F 1 "eSim_NPN" H 6750 4850 50  0000 R CNN

-F 2 "" H 7000 4800 29  0000 C CNN

-F 3 "" H 6800 4700 60  0000 C CNN

-	1    6800 4700

-	-1   0    0    -1  

-$EndComp

-$Comp

-L eSim_NPN Q18

-U 1 1 5CE90A96

-P 8800 2300

-F 0 "Q18" H 8700 2350 50  0000 R CNN

-F 1 "eSim_NPN" H 8750 2450 50  0000 R CNN

-F 2 "" H 9000 2400 29  0000 C CNN

-F 3 "" H 8800 2300 60  0000 C CNN

-	1    8800 2300

-	1    0    0    -1  

-$EndComp

-$Comp

-L eSim_NPN Q20

-U 1 1 5CE90A97

-P 8400 2750

-F 0 "Q20" H 8300 2800 50  0000 R CNN

-F 1 "eSim_NPN" H 8350 2900 50  0000 R CNN

-F 2 "" H 8600 2850 29  0000 C CNN

-F 3 "" H 8400 2750 60  0000 C CNN

-	1    8400 2750

-	-1   0    0    -1  

-$EndComp

-$Comp

-L eSim_R R9

-U 1 1 5CE90A98

-P 8850 3000

-F 0 "R9" H 8900 3130 50  0000 C CNN

-F 1 "25" H 8900 3050 50  0000 C CNN

-F 2 "" H 8900 2980 30  0000 C CNN

-F 3 "" V 8900 3050 30  0000 C CNN

-	1    8850 3000

-	0    1    1    0   

-$EndComp

-$Comp

-L eSim_R R10

-U 1 1 5CE90A99

-P 8850 3750

-F 0 "R10" H 8900 3880 50  0000 C CNN

-F 1 "50" H 8900 3800 50  0000 C CNN

-F 2 "" H 8900 3730 30  0000 C CNN

-F 3 "" V 8900 3800 30  0000 C CNN

-	1    8850 3750

-	0    1    1    0   

-$EndComp

-$Comp

-L eSim_PNP Q19

-U 1 1 5CE90A9A

-P 8800 4600

-F 0 "Q19" H 8700 4650 50  0000 R CNN

-F 1 "eSim_PNP" H 8750 4750 50  0000 R CNN

-F 2 "" H 9000 4700 29  0000 C CNN

-F 3 "" H 8800 4600 60  0000 C CNN

-	1    8800 4600

-	1    0    0    1   

-$EndComp

-$Comp

-L PORT U1

-U 3 1 5CE90A9B

-P 1900 1200

-F 0 "U1" H 1950 1300 30  0000 C CNN

-F 1 "PORT" H 1900 1200 30  0000 C CNN

-F 2 "" H 1900 1200 60  0000 C CNN

-F 3 "" H 1900 1200 60  0000 C CNN

-	3    1900 1200

-	1    0    0    -1  

-$EndComp

-$Comp

-L PORT U1

-U 2 1 5CE90A9C

-P 4500 1050

-F 0 "U1" H 4550 1150 30  0000 C CNN

-F 1 "PORT" H 4500 1050 30  0000 C CNN

-F 2 "" H 4500 1050 60  0000 C CNN

-F 3 "" H 4500 1050 60  0000 C CNN

-	2    4500 1050

-	1    0    0    -1  

-$EndComp

-$Comp

-L PORT U1

-U 7 1 5CE90A9D

-P 9750 1650

-F 0 "U1" H 9800 1750 30  0000 C CNN

-F 1 "PORT" H 9750 1650 30  0000 C CNN

-F 2 "" H 9750 1650 60  0000 C CNN

-F 3 "" H 9750 1650 60  0000 C CNN

-	7    9750 1650

-	-1   0    0    1   

-$EndComp

-$Comp

-L PORT U1

-U 6 1 5CE90A9E

-P 9750 3500

-F 0 "U1" H 9800 3600 30  0000 C CNN

-F 1 "PORT" H 9750 3500 30  0000 C CNN

-F 2 "" H 9750 3500 60  0000 C CNN

-F 3 "" H 9750 3500 60  0000 C CNN

-	6    9750 3500

-	-1   0    0    1   

-$EndComp

-$Comp

-L PORT U1

-U 4 1 5CE90A9F

-P 9700 5550

-F 0 "U1" H 9750 5650 30  0000 C CNN

-F 1 "PORT" H 9700 5550 30  0000 C CNN

-F 2 "" H 9700 5550 60  0000 C CNN

-F 3 "" H 9700 5550 60  0000 C CNN

-	4    9700 5550

-	-1   0    0    1   

-$EndComp

-Wire Wire Line

-	3200 3200 3750 3200

-Wire Wire Line

-	2750 2900 2750 2950

-Wire Wire Line

-	2750 2950 2900 2950

-Wire Wire Line

-	2900 2950 2900 3000

-Wire Wire Line

-	4200 2900 4200 2950

-Wire Wire Line

-	4200 2950 4050 2950

-Wire Wire Line

-	4050 2950 4050 3000

-Wire Wire Line

-	2900 3400 2900 4400

-Wire Wire Line

-	2900 4000 3100 4000

-Wire Wire Line

-	4200 2000 4200 2500

-Wire Wire Line

-	4200 2350 2750 2350

-Wire Wire Line

-	2750 2350 2750 2500

-Wire Wire Line

-	5000 2000 4050 2000

-Connection ~ 4200 2350

-Connection ~ 4200 2000

-Wire Wire Line

-	3750 2200 3750 2350

-Connection ~ 3750 2350

-Wire Wire Line

-	3750 1800 3750 1650

-Wire Wire Line

-	3400 1650 7600 1650

-Wire Wire Line

-	3400 1650 3400 3800

-Wire Wire Line

-	5300 1650 5300 1800

-Connection ~ 3750 1650

-Wire Wire Line

-	5300 2200 5300 4500

-Wire Wire Line

-	5300 3500 3650 3500

-Wire Wire Line

-	3650 3500 3650 3200

-Connection ~ 3650 3200

-Connection ~ 2900 4000

-Wire Wire Line

-	4050 4400 4050 3400

-Wire Wire Line

-	3400 4200 3400 4600

-Wire Wire Line

-	3200 4600 3750 4600

-Connection ~ 3400 4600

-Wire Wire Line

-	4050 5100 4050 4800

-Wire Wire Line

-	3600 5100 3600 4600

-Connection ~ 3600 4600

-Wire Wire Line

-	2900 5100 2900 4800

-Wire Wire Line

-	2900 5400 2900 5550

-Wire Wire Line

-	2900 5550 9450 5550

-Wire Wire Line

-	4050 5550 4050 5400

-Wire Wire Line

-	3600 5400 3600 5550

-Connection ~ 3600 5550

-Wire Wire Line

-	6100 4700 5600 4700

-Wire Wire Line

-	6400 2950 6400 4500

-Wire Wire Line

-	6400 4250 5900 4250

-Wire Wire Line

-	5900 4250 5900 4700

-Connection ~ 5900 4700

-Wire Wire Line

-	5300 5100 5300 4900

-Wire Wire Line

-	5300 5550 5300 5400

-Connection ~ 4050 5550

-Wire Wire Line

-	6400 5550 6400 4900

-Connection ~ 5300 5550

-Connection ~ 5300 3500

-Wire Wire Line

-	6400 1650 6400 1750

-Connection ~ 5300 1650

-Wire Wire Line

-	6400 2150 6400 2650

-Connection ~ 6400 4250

-Wire Wire Line

-	6700 1950 7300 1950

-Wire Wire Line

-	7000 1950 7000 2250

-Wire Wire Line

-	7000 2250 6400 2250

-Connection ~ 6400 2250

-Wire Wire Line

-	7600 1650 7600 1750

-Connection ~ 6400 1650

-Connection ~ 7000 1950

-Wire Wire Line

-	7600 3250 7600 4100

-Wire Wire Line

-	7600 3450 7400 3450

-Wire Wire Line

-	6900 3450 7100 3450

-Wire Wire Line

-	6900 2650 6900 3450

-Wire Wire Line

-	6900 3050 7300 3050

-Wire Wire Line

-	7600 2150 7600 2850

-Wire Wire Line

-	7600 2650 7400 2650

-Wire Wire Line

-	7100 2650 6900 2650

-Connection ~ 6900 3050

-Connection ~ 7600 2650

-Wire Wire Line

-	7300 4300 7150 4300

-Wire Wire Line

-	7150 4150 7150 4950

-Connection ~ 7600 3450

-Wire Wire Line

-	7600 3700 7150 3700

-Wire Wire Line

-	7150 3700 7150 3750

-Connection ~ 7600 3700

-Wire Wire Line

-	6600 3050 6600 2450

-Wire Wire Line

-	6600 2450 7600 2450

-Connection ~ 7600 2450

-Wire Wire Line

-	6600 3350 6600 3950

-Wire Wire Line

-	4050 3950 6850 3950

-Wire Wire Line

-	6700 3950 6700 4500

-Connection ~ 6700 3950

-Wire Wire Line

-	6700 4900 6700 5550

-Connection ~ 6400 5550

-Connection ~ 7150 4300

-Wire Wire Line

-	7600 4950 7600 4500

-Wire Wire Line

-	7000 4700 7600 4700

-Connection ~ 7600 4700

-Wire Wire Line

-	7600 5550 7600 5250

-Connection ~ 6700 5550

-Wire Wire Line

-	7150 5250 7150 5550

-Connection ~ 7150 5550

-Wire Wire Line

-	7600 2300 8600 2300

-Wire Wire Line

-	8300 2300 8300 2550

-Connection ~ 8300 2300

-Connection ~ 7600 2300

-Wire Wire Line

-	8900 2100 8900 1650

-Wire Wire Line

-	7550 1650 9500 1650

-Connection ~ 7550 1650

-Connection ~ 8900 1650

-Wire Wire Line

-	8900 2500 8900 2900

-Wire Wire Line

-	8900 2750 8600 2750

-Connection ~ 8900 2750

-Wire Wire Line

-	8300 2950 8300 3350

-Wire Wire Line

-	8300 3350 8900 3350

-Wire Wire Line

-	8900 3200 8900 3650

-Wire Wire Line

-	8900 4400 8900 3950

-Connection ~ 8900 3350

-Wire Wire Line

-	8900 3500 9500 3500

-Connection ~ 8900 3500

-Wire Wire Line

-	8900 5550 8900 4800

-Connection ~ 7600 5550

-Connection ~ 8900 5550

-Wire Wire Line

-	8600 4600 8100 4600

-Wire Wire Line

-	8100 4600 8100 3850

-Wire Wire Line

-	8100 3850 7600 3850

-Connection ~ 7600 3850

-Connection ~ 4050 3950

-Connection ~ 6600 3950

-Wire Wire Line

-	4500 2700 4750 2700

-Wire Wire Line

-	4750 2700 4750 1050

-Wire Wire Line

-	2450 2700 2150 2700

-Wire Wire Line

-	2150 2700 2150 1200

-$Comp

-L PORT U1

-U 5 1 5CE90AA0

-P 1850 4850

-F 0 "U1" H 1900 4950 30  0000 C CNN

-F 1 "PORT" H 1850 4850 30  0000 C CNN

-F 2 "" H 1850 4850 60  0000 C CNN

-F 3 "" H 1850 4850 60  0000 C CNN

-	5    1850 4850

-	1    0    0    -1  

-$EndComp

-$Comp

-L PORT U1

-U 1 1 5CE90AA1

-P 1850 5100

-F 0 "U1" H 1900 5200 30  0000 C CNN

-F 1 "PORT" H 1850 5100 30  0000 C CNN

-F 2 "" H 1850 5100 60  0000 C CNN

-F 3 "" H 1850 5100 60  0000 C CNN

-	1    1850 5100

-	1    0    0    -1  

-$EndComp

-Wire Wire Line

-	2100 5100 2700 5100

-Wire Wire Line

-	2700 5100 2700 5050

-Wire Wire Line

-	2700 5050 2900 5050

-Connection ~ 2900 5050

-Wire Wire Line

-	2100 4850 2550 4850

-Wire Wire Line

-	2550 4850 2550 4900

-Wire Wire Line

-	2550 4900 4050 4900

-Connection ~ 4050 4900

-$Comp

-L PORT U1

-U 8 1 5CE9368F

-P 9600 6050

-F 0 "U1" H 9650 6150 30  0000 C CNN

-F 1 "PORT" H 9600 6050 30  0000 C CNN

-F 2 "" H 9600 6050 60  0000 C CNN

-F 3 "" H 9600 6050 60  0000 C CNN

-	8    9600 6050

-	-1   0    0    1   

-$EndComp

-Wire Wire Line

-	9350 6050 9100 6050

-NoConn ~ 9100 6050

-$EndSCHEMATC

diff --git a/src/SubcircuitLibrary/AD620/lm_741.sub b/src/SubcircuitLibrary/AD620/lm_741.sub
deleted file mode 100644
index 3842c902..00000000
--- a/src/SubcircuitLibrary/AD620/lm_741.sub
+++ /dev/null
@@ -1,40 +0,0 @@
-* Subcircuit lm_741

-.subckt lm_741 net-_q7-pad3_ net-_q2-pad2_ net-_q1-pad2_ net-_q12-pad3_ net-_q8-pad3_ net-_q20-pad3_ net-_q10-pad3_ ? 

-* c:\users\malli\esim\src\subcircuitlibrary\lm_741\lm_741.cir

-.include npn_1.lib

-.include pnp_1.lib

-q1 net-_q1-pad1_ net-_q1-pad2_ net-_q1-pad3_ npn_1

-q2 net-_q1-pad1_ net-_q2-pad2_ net-_q2-pad3_ npn_1

-q6 net-_q3-pad2_ net-_q13-pad1_ net-_q1-pad3_ pnp_1

-q5 net-_c1-pad2_ net-_q13-pad1_ net-_q2-pad3_ pnp_1

-q3 net-_q10-pad3_ net-_q3-pad2_ net-_q3-pad3_ npn_1

-q4 net-_q1-pad1_ net-_q1-pad1_ net-_q10-pad3_ pnp_1

-q9 net-_q13-pad1_ net-_q1-pad1_ net-_q10-pad3_ pnp_1

-q8 net-_c1-pad2_ net-_q3-pad3_ net-_q8-pad3_ npn_1

-q7 net-_q3-pad2_ net-_q3-pad3_ net-_q7-pad3_ npn_1

-r1  net-_q7-pad3_ net-_q12-pad3_ 1k

-r2  net-_q3-pad3_ net-_q12-pad3_ 50k

-r3  net-_q8-pad3_ net-_q12-pad3_ 1k

-q12 net-_q12-pad1_ net-_q12-pad1_ net-_q12-pad3_ npn_1

-q13 net-_q13-pad1_ net-_q12-pad1_ net-_q13-pad3_ npn_1

-r4  net-_q13-pad3_ net-_q12-pad3_ 5k

-r11  net-_q10-pad1_ net-_q12-pad1_ 39k

-q10 net-_q10-pad1_ net-_q10-pad1_ net-_q10-pad3_ pnp_1

-q11 net-_c1-pad1_ net-_q10-pad1_ net-_q10-pad3_ pnp_1

-q14 net-_c1-pad1_ net-_q14-pad2_ net-_q14-pad3_ npn_1

-r8  net-_c1-pad1_ net-_q14-pad2_ 4.5k

-r7  net-_q14-pad3_ net-_q14-pad2_ 7.5k

-c1  net-_c1-pad1_ net-_c1-pad2_ 30p

-q16 net-_q14-pad3_ net-_c1-pad2_ net-_q15-pad2_ npn_1

-q15 net-_q14-pad3_ net-_q15-pad2_ net-_q15-pad3_ npn_1

-r5  net-_q15-pad2_ net-_q12-pad3_ 50k

-r6  net-_q15-pad3_ net-_q12-pad3_ 50

-q17 net-_c1-pad2_ net-_q15-pad3_ net-_q12-pad3_ npn_1

-q18 net-_q10-pad3_ net-_c1-pad1_ net-_q18-pad3_ npn_1

-q20 net-_c1-pad1_ net-_q18-pad3_ net-_q20-pad3_ npn_1

-r9  net-_q18-pad3_ net-_q20-pad3_ 25

-r10  net-_q20-pad3_ net-_q19-pad3_ 50

-q19 net-_q12-pad3_ net-_q14-pad3_ net-_q19-pad3_ pnp_1

-* Control Statements

-

-.ends lm_741
\ No newline at end of file
diff --git a/src/SubcircuitLibrary/AD620/npn_1.lib b/src/SubcircuitLibrary/AD620/npn_1.lib
deleted file mode 100644
index 4a863e3e..00000000
--- a/src/SubcircuitLibrary/AD620/npn_1.lib
+++ /dev/null
@@ -1,29 +0,0 @@
-.model npn_1 NPN(

-+ Vtf=1.7 

-+ Cjc=0.5p

-+ Nc=2 

-+ Tr=46.91n 

-+ Ne=1.307 

-+ Cje=0.5p

-+ Isc=0 

-+ Xtb=1.5 

-+ Rb=500

-+ Rc=1 

-+ Tf=411.1p 

-+ Xti=3 

-+ Ikr=0 

-+ Bf=125

-+ Fc=.5 

-+ Ise=14.34f 

-+ Br=6.092 

-+ Ikf=.2847 

-+ Mje=.377 

-+ Mjc=.3416 

-+ Vaf=74.03 

-+ Vjc=.75 

-+ Vje=.75 

-+ Xtf=3 

-+ Itf=.6 

-+ Is=14.34f 

-+ Eg=1.11 

-)
\ No newline at end of file
diff --git a/src/SubcircuitLibrary/AD620/pnp_1.lib b/src/SubcircuitLibrary/AD620/pnp_1.lib
deleted file mode 100644
index c486429f..00000000
--- a/src/SubcircuitLibrary/AD620/pnp_1.lib
+++ /dev/null
@@ -1,29 +0,0 @@
-.model pnp_1 PNP(

-+ Vtf=1.7 

-+ Cjc=1.5p

-+ Nc=2 

-+ Tr=46.91n 

-+ Ne=1.307 

-+ Cje=0.3p

-+ Isc=0 

-+ Xtb=1.5 

-+ Rb=250

-+ Rc=1 

-+ Tf=411.1p 

-+ Xti=3 

-+ Ikr=0 

-+ Bf=25

-+ Fc=.5 

-+ Ise=14.34f 

-+ Br=6.092 

-+ Ikf=.2847 

-+ Mje=.377 

-+ Mjc=.3416 

-+ Vaf=74.03 

-+ Vjc=.75 

-+ Vje=.75 

-+ Xtf=3 

-+ Itf=.6 

-+ Is=14.34f 

-+ Eg=1.11 

-)
\ No newline at end of file
diff --git a/src/SubcircuitLibrary/CA3096/CA3096-cache.lib b/src/SubcircuitLibrary/CA3096/CA3096-cache.lib
deleted file mode 100644
index 16f09ee3..00000000
--- a/src/SubcircuitLibrary/CA3096/CA3096-cache.lib
+++ /dev/null
@@ -1,83 +0,0 @@
-EESchema-LIBRARY Version 2.3
-#encoding utf-8
-#
-# PORT
-#
-DEF PORT U 0 40 Y Y 26 F N
-F0 "U" 50 100 30 H V C CNN
-F1 "PORT" 0 0 30 H V C CNN
-F2 "" 0 0 60 H V C CNN
-F3 "" 0 0 60 H V C CNN
-DRAW
-A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0
-A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50
-S -100 50 100 -50 0 1 0 N
-X ~ 1 250 0 100 L 30 30 1 1 B
-X ~ 2 250 0 100 L 30 30 2 1 B
-X ~ 3 250 0 100 L 30 30 3 1 B
-X ~ 4 250 0 100 L 30 30 4 1 B
-X ~ 5 250 0 100 L 30 30 5 1 B
-X ~ 6 250 0 100 L 30 30 6 1 B
-X ~ 7 250 0 100 L 30 30 7 1 B
-X ~ 8 250 0 100 L 30 30 8 1 B
-X ~ 9 250 0 100 L 30 30 9 1 B
-X ~ 10 250 0 100 L 30 30 10 1 B
-X ~ 11 250 0 100 L 30 30 11 1 B
-X ~ 12 250 0 100 L 30 30 12 1 B
-X ~ 13 250 0 100 L 30 30 13 1 B
-X ~ 14 250 0 100 L 30 30 14 1 B
-X ~ 15 250 0 100 L 30 30 15 1 B
-X ~ 16 250 0 100 L 30 30 16 1 B
-X ~ 17 250 0 100 L 30 30 17 1 B
-X ~ 18 250 0 100 L 30 30 18 1 B
-X ~ 19 250 0 100 L 30 30 19 1 B
-X ~ 20 250 0 100 L 30 30 20 1 B
-X ~ 21 250 0 100 L 30 30 21 1 B
-X ~ 22 250 0 100 L 30 30 22 1 B
-X ~ 23 250 0 100 L 30 30 23 1 B
-X ~ 24 250 0 100 L 30 30 24 1 B
-X ~ 25 250 0 100 L 30 30 25 1 B
-X ~ 26 250 0 100 L 30 30 26 1 B
-ENDDRAW
-ENDDEF
-#
-# eSim_NPN
-#
-DEF eSim_NPN Q 0 0 Y N 1 F N
-F0 "Q" -100 50 50 H V R CNN
-F1 "eSim_NPN" -50 150 50 H V R CNN
-F2 "" 200 100 29 H V C CNN
-F3 "" 0 0 60 H V C CNN
-ALIAS BC547 Q2N2222
-DRAW
-C 50 0 111 0 1 10 N
-P 2 0 1 0 25 25 100 100 N
-P 3 0 1 0 25 -25 100 -100 100 -100 N
-P 3 0 1 20 25 75 25 -75 25 -75 N
-P 5 0 1 0 50 -70 70 -50 90 -90 50 -70 50 -70 F
-X C 1 100 200 100 D 50 50 1 1 C
-X B 2 -200 0 225 R 50 50 1 1 I
-X E 3 100 -200 100 U 50 50 1 1 E
-ENDDRAW
-ENDDEF
-#
-# eSim_PNP
-#
-DEF eSim_PNP Q 0 0 Y N 1 F N
-F0 "Q" -100 50 50 H V R CNN
-F1 "eSim_PNP" -50 150 50 H V R CNN
-F2 "" 200 100 29 H V C CNN
-F3 "" 0 0 60 H V C CNN
-DRAW
-C 50 0 111 0 1 10 N
-P 2 0 1 0 25 25 100 100 N
-P 3 0 1 0 25 -25 100 -100 100 -100 N
-P 3 0 1 20 25 75 25 -75 25 -75 N
-P 5 0 1 0 90 -70 70 -90 50 -50 90 -70 90 -70 F
-X C 1 100 200 100 D 50 50 1 1 C
-X B 2 -200 0 225 R 50 50 1 1 I
-X E 3 100 -200 100 U 50 50 1 1 E
-ENDDRAW
-ENDDEF
-#
-#End Library
diff --git a/src/SubcircuitLibrary/CA3096/CA3096.cir b/src/SubcircuitLibrary/CA3096/CA3096.cir
deleted file mode 100644
index 5a3af0fb..00000000
--- a/src/SubcircuitLibrary/CA3096/CA3096.cir
+++ /dev/null
@@ -1,16 +0,0 @@
-* /home/bhargav/Downloads/eSim-1.1.2/src/SubcircuitLibrary/CA3096/CA3096.cir
-
-* EESchema Netlist Version 1.1 (Spice format) creation date: Sat Jun 22 12:00:17 2019
-
-* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N
-* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0
-
-* Sheet Name: /
-Q1  Net-_Q1-Pad1_ Net-_Q1-Pad2_ Net-_Q1-Pad3_ eSim_NPN		
-Q2  Net-_Q2-Pad1_ Net-_Q2-Pad2_ Net-_Q2-Pad3_ eSim_NPN		
-Q5  Net-_Q5-Pad1_ Net-_Q5-Pad2_ Net-_Q5-Pad3_ eSim_PNP		
-Q4  Net-_Q4-Pad1_ Net-_Q4-Pad2_ Net-_Q4-Pad3_ eSim_PNP		
-U1  Net-_Q1-Pad2_ Net-_Q1-Pad3_ Net-_Q1-Pad1_ Net-_Q2-Pad3_ Net-_Q2-Pad2_ Net-_Q2-Pad1_ Net-_Q3-Pad3_ Net-_Q3-Pad2_ Net-_Q3-Pad1_ Net-_Q4-Pad3_ Net-_Q5-Pad2_ Net-_Q5-Pad1_ Net-_Q5-Pad3_ Net-_Q4-Pad2_ Net-_Q4-Pad1_ ? PORT		
-Q3  Net-_Q3-Pad1_ Net-_Q3-Pad2_ Net-_Q3-Pad3_ eSim_NPN		
-
-.end
diff --git a/src/SubcircuitLibrary/CA3096/CA3096.cir.out b/src/SubcircuitLibrary/CA3096/CA3096.cir.out
deleted file mode 100644
index 89c57845..00000000
--- a/src/SubcircuitLibrary/CA3096/CA3096.cir.out
+++ /dev/null
@@ -1,19 +0,0 @@
-* /home/bhargav/downloads/esim-1.1.2/src/subcircuitlibrary/ca3096/ca3096.cir
-
-.include PNP.lib
-.include NPN.lib
-q1 net-_q1-pad1_ net-_q1-pad2_ net-_q1-pad3_ Q2N2222
-q2 net-_q2-pad1_ net-_q2-pad2_ net-_q2-pad3_ Q2N2222
-q5 net-_q5-pad1_ net-_q5-pad2_ net-_q5-pad3_ Q2N2907A
-q4 net-_q4-pad1_ net-_q4-pad2_ net-_q4-pad3_ Q2N2907A
-* u1  net-_q1-pad2_ net-_q1-pad3_ net-_q1-pad1_ net-_q2-pad3_ net-_q2-pad2_ net-_q2-pad1_ net-_q3-pad3_ net-_q3-pad2_ net-_q3-pad1_ net-_q4-pad3_ net-_q5-pad2_ net-_q5-pad1_ net-_q5-pad3_ net-_q4-pad2_ net-_q4-pad1_ ? port
-q3 net-_q3-pad1_ net-_q3-pad2_ net-_q3-pad3_ Q2N2222
-.tran 10e-03 100e-03 0e-00
-
-* Control Statements 
-.control
-run
-print allv > plot_data_v.txt
-print alli > plot_data_i.txt
-.endc
-.end
diff --git a/src/SubcircuitLibrary/CA3096/CA3096.pro b/src/SubcircuitLibrary/CA3096/CA3096.pro
deleted file mode 100644
index d91a953f..00000000
--- a/src/SubcircuitLibrary/CA3096/CA3096.pro
+++ /dev/null
@@ -1,82 +0,0 @@
-update=Sat Jun 22 11:58:40 2019
-version=1
-last_client=eeschema
-[general]
-version=1
-RootSch=
-BoardNm=
-[pcbnew]
-version=1
-LastNetListRead=
-UseCmpFile=1
-PadDrill=0.600000000000
-PadDrillOvalY=0.600000000000
-PadSizeH=1.500000000000
-PadSizeV=1.500000000000
-PcbTextSizeV=1.500000000000
-PcbTextSizeH=1.500000000000
-PcbTextThickness=0.300000000000
-ModuleTextSizeV=1.000000000000
-ModuleTextSizeH=1.000000000000
-ModuleTextSizeThickness=0.150000000000
-SolderMaskClearance=0.000000000000
-SolderMaskMinWidth=0.000000000000
-DrawSegmentWidth=0.200000000000
-BoardOutlineThickness=0.100000000000
-ModuleOutlineThickness=0.150000000000
-[cvpcb]
-version=1
-NetIExt=net
-[eeschema]
-version=1
-LibDir=../../../kicadSchematicLibrary
-[eeschema/libraries]
-LibName1=power
-LibName2=device
-LibName3=transistors
-LibName4=conn
-LibName5=linear
-LibName6=regul
-LibName7=74xx
-LibName8=cmos4000
-LibName9=adc-dac
-LibName10=memory
-LibName11=xilinx
-LibName12=microcontrollers
-LibName13=dsp
-LibName14=microchip
-LibName15=analog_switches
-LibName16=motorola
-LibName17=texas
-LibName18=intel
-LibName19=audio
-LibName20=interface
-LibName21=digital-audio
-LibName22=philips
-LibName23=display
-LibName24=cypress
-LibName25=siliconi
-LibName26=opto
-LibName27=atmel
-LibName28=contrib
-LibName29=valves
-LibName30=eSim_Analog
-LibName31=eSim_Devices
-LibName32=eSim_Digital
-LibName33=eSim_Hybrid
-LibName34=eSim_Miscellaneous
-LibName35=eSim_Plot
-LibName36=eSim_Power
-LibName37=eSim_Sources
-LibName38=eSim_Subckt
-LibName39=eSim_User
-LibName40=/home/bhargav/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_Analog
-LibName41=/home/bhargav/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_Devices
-LibName42=/home/bhargav/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_Digital
-LibName43=/home/bhargav/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_Hybrid
-LibName44=/home/bhargav/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_Miscellaneous
-LibName45=/home/bhargav/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_Plot
-LibName46=/home/bhargav/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_Power
-LibName47=/home/bhargav/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_Sources
-LibName48=/home/bhargav/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_Subckt
-LibName49=/home/bhargav/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_User
diff --git a/src/SubcircuitLibrary/CA3096/CA3096.sch b/src/SubcircuitLibrary/CA3096/CA3096.sch
deleted file mode 100644
index 3c08258c..00000000
--- a/src/SubcircuitLibrary/CA3096/CA3096.sch
+++ /dev/null
@@ -1,328 +0,0 @@
-EESchema Schematic File Version 2
-LIBS:power
-LIBS:device
-LIBS:transistors
-LIBS:conn
-LIBS:linear
-LIBS:regul
-LIBS:74xx
-LIBS:cmos4000
-LIBS:adc-dac
-LIBS:memory
-LIBS:xilinx
-LIBS:microcontrollers
-LIBS:dsp
-LIBS:microchip
-LIBS:analog_switches
-LIBS:motorola
-LIBS:texas
-LIBS:intel
-LIBS:audio
-LIBS:interface
-LIBS:digital-audio
-LIBS:philips
-LIBS:display
-LIBS:cypress
-LIBS:siliconi
-LIBS:opto
-LIBS:atmel
-LIBS:contrib
-LIBS:valves
-LIBS:eSim_Analog
-LIBS:eSim_Devices
-LIBS:eSim_Digital
-LIBS:eSim_Hybrid
-LIBS:eSim_Miscellaneous
-LIBS:eSim_Plot
-LIBS:eSim_Power
-LIBS:eSim_Sources
-LIBS:eSim_Subckt
-LIBS:eSim_User
-LIBS:CA3096-cache
-EELAYER 25 0
-EELAYER END
-$Descr A4 11693 8268
-encoding utf-8
-Sheet 1 1
-Title ""
-Date ""
-Rev ""
-Comp ""
-Comment1 ""
-Comment2 ""
-Comment3 ""
-Comment4 ""
-$EndDescr
-$Comp
-L eSim_NPN Q1
-U 1 1 5C98EEF5
-P 4150 4250
-F 0 "Q1" H 4050 4300 50  0000 R CNN
-F 1 "eSim_NPN" H 4100 4400 50  0000 R CNN
-F 2 "" H 4350 4350 29  0000 C CNN
-F 3 "" H 4150 4250 60  0000 C CNN
-	1    4150 4250
-	-1   0    0    1   
-$EndComp
-$Comp
-L eSim_NPN Q2
-U 1 1 5C98EFC9
-P 4250 4950
-F 0 "Q2" H 4150 5000 50  0000 R CNN
-F 1 "eSim_NPN" H 4200 5100 50  0000 R CNN
-F 2 "" H 4450 5050 29  0000 C CNN
-F 3 "" H 4250 4950 60  0000 C CNN
-	1    4250 4950
-	1    0    0    1   
-$EndComp
-$Comp
-L eSim_PNP Q5
-U 1 1 5C98F076
-P 5300 5400
-F 0 "Q5" H 5200 5450 50  0000 R CNN
-F 1 "eSim_PNP" H 5250 5550 50  0000 R CNN
-F 2 "" H 5500 5500 29  0000 C CNN
-F 3 "" H 5300 5400 60  0000 C CNN
-	1    5300 5400
-	-1   0    0    -1  
-$EndComp
-$Comp
-L eSim_PNP Q4
-U 1 1 5C98F0A7
-P 5300 4650
-F 0 "Q4" H 5200 4700 50  0000 R CNN
-F 1 "eSim_PNP" H 5250 4800 50  0000 R CNN
-F 2 "" H 5500 4750 29  0000 C CNN
-F 3 "" H 5300 4650 60  0000 C CNN
-	1    5300 4650
-	-1   0    0    -1  
-$EndComp
-Wire Wire Line
-	4350 3800 4350 4250
-Wire Wire Line
-	4350 5450 4350 5150
-Wire Wire Line
-	5200 5600 5200 5700
-Wire Wire Line
-	5200 4850 5200 4950
-Wire Wire Line
-	5200 4200 5200 4450
-$Comp
-L PORT U1
-U 1 1 5C98F1D4
-P 2950 3800
-F 0 "U1" H 3000 3900 30  0000 C CNN
-F 1 "PORT" H 2950 3800 30  0000 C CNN
-F 2 "" H 2950 3800 60  0000 C CNN
-F 3 "" H 2950 3800 60  0000 C CNN
-	1    2950 3800
-	1    0    0    -1  
-$EndComp
-$Comp
-L PORT U1
-U 3 1 5C98F222
-P 2950 4450
-F 0 "U1" H 3000 4550 30  0000 C CNN
-F 1 "PORT" H 2950 4450 30  0000 C CNN
-F 2 "" H 2950 4450 60  0000 C CNN
-F 3 "" H 2950 4450 60  0000 C CNN
-	3    2950 4450
-	1    0    0    -1  
-$EndComp
-$Comp
-L PORT U1
-U 5 1 5C98F272
-P 2950 4950
-F 0 "U1" H 3000 5050 30  0000 C CNN
-F 1 "PORT" H 2950 4950 30  0000 C CNN
-F 2 "" H 2950 4950 60  0000 C CNN
-F 3 "" H 2950 4950 60  0000 C CNN
-	5    2950 4950
-	1    0    0    -1  
-$EndComp
-$Comp
-L PORT U1
-U 6 1 5C98F29F
-P 2950 5450
-F 0 "U1" H 3000 5550 30  0000 C CNN
-F 1 "PORT" H 2950 5450 30  0000 C CNN
-F 2 "" H 2950 5450 60  0000 C CNN
-F 3 "" H 2950 5450 60  0000 C CNN
-	6    2950 5450
-	1    0    0    -1  
-$EndComp
-$Comp
-L PORT U1
-U 9 1 5C98F38F
-P 6150 6050
-F 0 "U1" H 6200 6150 30  0000 C CNN
-F 1 "PORT" H 6150 6050 30  0000 C CNN
-F 2 "" H 6150 6050 60  0000 C CNN
-F 3 "" H 6150 6050 60  0000 C CNN
-	9    6150 6050
-	-1   0    0    1   
-$EndComp
-$Comp
-L PORT U1
-U 11 1 5C98F4ED
-P 6150 5400
-F 0 "U1" H 6200 5500 30  0000 C CNN
-F 1 "PORT" H 6150 5400 30  0000 C CNN
-F 2 "" H 6150 5400 60  0000 C CNN
-F 3 "" H 6150 5400 60  0000 C CNN
-	11   6150 5400
-	-1   0    0    1   
-$EndComp
-$Comp
-L PORT U1
-U 12 1 5C98F52C
-P 6150 5200
-F 0 "U1" H 6200 5300 30  0000 C CNN
-F 1 "PORT" H 6150 5200 30  0000 C CNN
-F 2 "" H 6150 5200 60  0000 C CNN
-F 3 "" H 6150 5200 60  0000 C CNN
-	12   6150 5200
-	-1   0    0    1   
-$EndComp
-$Comp
-L PORT U1
-U 14 1 5C98F5BA
-P 6150 4650
-F 0 "U1" H 6200 4750 30  0000 C CNN
-F 1 "PORT" H 6150 4650 30  0000 C CNN
-F 2 "" H 6150 4650 60  0000 C CNN
-F 3 "" H 6150 4650 60  0000 C CNN
-	14   6150 4650
-	-1   0    0    1   
-$EndComp
-$Comp
-L PORT U1
-U 15 1 5C98F5FF
-P 6150 4200
-F 0 "U1" H 6200 4300 30  0000 C CNN
-F 1 "PORT" H 6150 4200 30  0000 C CNN
-F 2 "" H 6150 4200 60  0000 C CNN
-F 3 "" H 6150 4200 60  0000 C CNN
-	15   6150 4200
-	-1   0    0    1   
-$EndComp
-$Comp
-L PORT U1
-U 10 1 5C9C8B88
-P 6150 4950
-F 0 "U1" H 6200 5050 30  0000 C CNN
-F 1 "PORT" H 6150 4950 30  0000 C CNN
-F 2 "" H 6150 4950 60  0000 C CNN
-F 3 "" H 6150 4950 60  0000 C CNN
-	10   6150 4950
-	-1   0    0    1   
-$EndComp
-$Comp
-L PORT U1
-U 13 1 5C9C9E21
-P 6150 5700
-F 0 "U1" H 6200 5800 30  0000 C CNN
-F 1 "PORT" H 6150 5700 30  0000 C CNN
-F 2 "" H 6150 5700 60  0000 C CNN
-F 3 "" H 6150 5700 60  0000 C CNN
-	13   6150 5700
-	-1   0    0    1   
-$EndComp
-Wire Wire Line
-	3200 3800 4350 3800
-Wire Wire Line
-	3200 4450 4050 4450
-Wire Wire Line
-	3200 4750 4350 4750
-Wire Wire Line
-	3200 4950 4050 4950
-Wire Wire Line
-	3200 5450 4350 5450
-Wire Wire Line
-	4050 5850 3200 5850
-Wire Wire Line
-	3200 5650 4350 5650
-Wire Wire Line
-	5900 6050 4350 6050
-Wire Wire Line
-	5200 5700 5900 5700
-Wire Wire Line
-	5900 5400 5500 5400
-Wire Wire Line
-	5200 5200 5900 5200
-Wire Wire Line
-	5200 4950 5900 4950
-Wire Wire Line
-	5500 4650 5900 4650
-Wire Wire Line
-	5200 4200 5900 4200
-Wire Wire Line
-	4050 4050 3200 4050
-$Comp
-L PORT U1
-U 7 1 5C9CB60F
-P 2950 5650
-F 0 "U1" H 3000 5750 30  0000 C CNN
-F 1 "PORT" H 2950 5650 30  0000 C CNN
-F 2 "" H 2950 5650 60  0000 C CNN
-F 3 "" H 2950 5650 60  0000 C CNN
-	7    2950 5650
-	1    0    0    -1  
-$EndComp
-$Comp
-L PORT U1
-U 4 1 5C9CB58F
-P 2950 4750
-F 0 "U1" H 3000 4850 30  0000 C CNN
-F 1 "PORT" H 2950 4750 30  0000 C CNN
-F 2 "" H 2950 4750 60  0000 C CNN
-F 3 "" H 2950 4750 60  0000 C CNN
-	4    2950 4750
-	1    0    0    -1  
-$EndComp
-$Comp
-L PORT U1
-U 2 1 5C9CB511
-P 2950 4050
-F 0 "U1" H 3000 4150 30  0000 C CNN
-F 1 "PORT" H 2950 4050 30  0000 C CNN
-F 2 "" H 2950 4050 60  0000 C CNN
-F 3 "" H 2950 4050 60  0000 C CNN
-	2    2950 4050
-	1    0    0    -1  
-$EndComp
-$Comp
-L PORT U1
-U 8 1 5C9CBE1D
-P 2950 5850
-F 0 "U1" H 3000 5950 30  0000 C CNN
-F 1 "PORT" H 2950 5850 30  0000 C CNN
-F 2 "" H 2950 5850 60  0000 C CNN
-F 3 "" H 2950 5850 60  0000 C CNN
-	8    2950 5850
-	1    0    0    -1  
-$EndComp
-$Comp
-L PORT U1
-U 16 1 5D0DDF9F
-P 6200 3950
-F 0 "U1" H 6250 4050 30  0000 C CNN
-F 1 "PORT" H 6200 3950 30  0000 C CNN
-F 2 "" H 6200 3950 60  0000 C CNN
-F 3 "" H 6200 3950 60  0000 C CNN
-	16   6200 3950
-	-1   0    0    1   
-$EndComp
-NoConn ~ 5950 3950
-$Comp
-L eSim_NPN Q3
-U 1 1 5C98F006
-P 4250 5850
-F 0 "Q3" H 4150 5900 50  0000 R CNN
-F 1 "eSim_NPN" H 4200 6000 50  0000 R CNN
-F 2 "" H 4450 5950 29  0000 C CNN
-F 3 "" H 4250 5850 60  0000 C CNN
-	1    4250 5850
-	1    0    0    1   
-$EndComp
-$EndSCHEMATC
diff --git a/src/SubcircuitLibrary/CA3096/CA3096.sub b/src/SubcircuitLibrary/CA3096/CA3096.sub
deleted file mode 100644
index f79667b7..00000000
--- a/src/SubcircuitLibrary/CA3096/CA3096.sub
+++ /dev/null
@@ -1,13 +0,0 @@
-* Subcircuit CA3096
-.subckt CA3096 net-_q1-pad2_ net-_q1-pad3_ net-_q1-pad1_ net-_q2-pad3_ net-_q2-pad2_ net-_q2-pad1_ net-_q3-pad3_ net-_q3-pad2_ net-_q3-pad1_ net-_q4-pad3_ net-_q5-pad2_ net-_q5-pad1_ net-_q5-pad3_ net-_q4-pad2_ net-_q4-pad1_ ? 
-* /home/bhargav/downloads/esim-1.1.2/src/subcircuitlibrary/ca3096/ca3096.cir
-.include PNP.lib
-.include NPN.lib
-q1 net-_q1-pad1_ net-_q1-pad2_ net-_q1-pad3_ Q2N2222
-q2 net-_q2-pad1_ net-_q2-pad2_ net-_q2-pad3_ Q2N2222
-q5 net-_q5-pad1_ net-_q5-pad2_ net-_q5-pad3_ Q2N2907A
-q4 net-_q4-pad1_ net-_q4-pad2_ net-_q4-pad3_ Q2N2907A
-q3 net-_q3-pad1_ net-_q3-pad2_ net-_q3-pad3_ Q2N2222
-* Control Statements
-
-.ends CA3096
\ No newline at end of file
diff --git a/src/SubcircuitLibrary/CA3096/CA3096.xml b/src/SubcircuitLibrary/CA3096/CA3096.xml
deleted file mode 100644
index 24f50baa..00000000
--- a/src/SubcircuitLibrary/CA3096/CA3096.xml
+++ /dev/null
@@ -1,191 +0,0 @@
-<?xml version="1.0" encoding="UTF-8"?>
-<export version="D">
-  <design>
-    <source>C:/esim_1/eSim/src/SubcircuitLibrary/CA3096/CA3096.sch</source>
-    <date>03/31/19 09:48:27</date>
-    <tool>Eeschema 4.0.2-stable</tool>
-    <sheet number="1" name="/" tstamps="/">
-      <title_block>
-        <title/>
-        <company/>
-        <rev/>
-        <date/>
-        <source>CA3096.sch</source>
-        <comment number="1" value=""/>
-        <comment number="2" value=""/>
-        <comment number="3" value=""/>
-        <comment number="4" value=""/>
-      </title_block>
-    </sheet>
-  </design>
-  <components>
-    <comp ref="Q1">
-      <value>eSim_NPN</value>
-      <libsource lib="eSim_Devices" part="eSim_NPN"/>
-      <sheetpath names="/" tstamps="/"/>
-      <tstamp>5C98EEF5</tstamp>
-    </comp>
-    <comp ref="Q2">
-      <value>eSim_NPN</value>
-      <libsource lib="eSim_Devices" part="eSim_NPN"/>
-      <sheetpath names="/" tstamps="/"/>
-      <tstamp>5C98EFC9</tstamp>
-    </comp>
-    <comp ref="Q3">
-      <value>eSim_NPN</value>
-      <libsource lib="eSim_Devices" part="eSim_NPN"/>
-      <sheetpath names="/" tstamps="/"/>
-      <tstamp>5C98F006</tstamp>
-    </comp>
-    <comp ref="Q5">
-      <value>eSim_PNP</value>
-      <libsource lib="eSim_Devices" part="eSim_PNP"/>
-      <sheetpath names="/" tstamps="/"/>
-      <tstamp>5C98F076</tstamp>
-    </comp>
-    <comp ref="Q4">
-      <value>eSim_PNP</value>
-      <libsource lib="eSim_Devices" part="eSim_PNP"/>
-      <sheetpath names="/" tstamps="/"/>
-      <tstamp>5C98F0A7</tstamp>
-    </comp>
-    <comp ref="U1">
-      <value>PORT</value>
-      <libsource lib="eSim_Miscellaneous" part="PORT"/>
-      <sheetpath names="/" tstamps="/"/>
-      <tstamp>5C98F1D4</tstamp>
-    </comp>
-  </components>
-  <libparts>
-    <libpart lib="eSim_Miscellaneous" part="PORT">
-      <fields>
-        <field name="Reference">U</field>
-        <field name="Value">PORT</field>
-      </fields>
-      <pins>
-        <pin num="1" name="~" type="input"/>
-        <pin num="2" name="~" type="input"/>
-        <pin num="3" name="~" type="input"/>
-        <pin num="4" name="~" type="input"/>
-        <pin num="5" name="~" type="input"/>
-        <pin num="6" name="~" type="input"/>
-        <pin num="7" name="~" type="input"/>
-        <pin num="8" name="~" type="input"/>
-        <pin num="9" name="~" type="input"/>
-        <pin num="10" name="~" type="input"/>
-        <pin num="11" name="~" type="input"/>
-        <pin num="12" name="~" type="input"/>
-        <pin num="13" name="~" type="input"/>
-        <pin num="14" name="~" type="input"/>
-        <pin num="15" name="~" type="input"/>
-        <pin num="16" name="~" type="input"/>
-        <pin num="17" name="~" type="input"/>
-        <pin num="18" name="~" type="input"/>
-        <pin num="19" name="~" type="input"/>
-        <pin num="20" name="~" type="input"/>
-        <pin num="21" name="~" type="input"/>
-        <pin num="22" name="~" type="input"/>
-        <pin num="23" name="~" type="input"/>
-        <pin num="24" name="~" type="input"/>
-        <pin num="25" name="~" type="input"/>
-        <pin num="26" name="~" type="input"/>
-      </pins>
-    </libpart>
-    <libpart lib="eSim_Devices" part="eSim_NPN">
-      <aliases>
-        <alias>BC547</alias>
-        <alias>Q2N2222</alias>
-      </aliases>
-      <fields>
-        <field name="Reference">Q</field>
-        <field name="Value">eSim_NPN</field>
-      </fields>
-      <pins>
-        <pin num="1" name="C" type="openCol"/>
-        <pin num="2" name="B" type="input"/>
-        <pin num="3" name="E" type="openEm"/>
-      </pins>
-    </libpart>
-    <libpart lib="eSim_Devices" part="eSim_PNP">
-      <fields>
-        <field name="Reference">Q</field>
-        <field name="Value">eSim_PNP</field>
-      </fields>
-      <pins>
-        <pin num="1" name="C" type="openCol"/>
-        <pin num="2" name="B" type="input"/>
-        <pin num="3" name="E" type="openEm"/>
-      </pins>
-    </libpart>
-  </libparts>
-  <libraries>
-    <library logical="eSim_Devices">
-      <uri>C:\Program Files (x86)\KiCad\share\library\eSim_Devices.lib</uri>
-    </library>
-    <library logical="eSim_Miscellaneous">
-      <uri>C:\Program Files (x86)\KiCad\share\library\eSim_Miscellaneous.lib</uri>
-    </library>
-  </libraries>
-  <nets>
-    <net code="1" name="Net-(Q5-Pad2)">
-      <node ref="U1" pin="11"/>
-      <node ref="Q5" pin="2"/>
-    </net>
-    <net code="2" name="Net-(Q2-Pad2)">
-      <node ref="U1" pin="5"/>
-      <node ref="Q2" pin="2"/>
-    </net>
-    <net code="3" name="Net-(Q3-Pad2)">
-      <node ref="U1" pin="8"/>
-      <node ref="Q3" pin="2"/>
-    </net>
-    <net code="4" name="Net-(Q4-Pad2)">
-      <node ref="U1" pin="14"/>
-      <node ref="Q4" pin="2"/>
-    </net>
-    <net code="5" name="Net-(Q1-Pad1)">
-      <node ref="U1" pin="3"/>
-      <node ref="Q1" pin="1"/>
-    </net>
-    <net code="6" name="Net-(Q2-Pad3)">
-      <node ref="Q2" pin="3"/>
-      <node ref="U1" pin="4"/>
-    </net>
-    <net code="7" name="Net-(Q3-Pad3)">
-      <node ref="Q3" pin="3"/>
-      <node ref="U1" pin="7"/>
-    </net>
-    <net code="8" name="Net-(Q3-Pad1)">
-      <node ref="U1" pin="9"/>
-      <node ref="Q3" pin="1"/>
-    </net>
-    <net code="9" name="Net-(Q5-Pad1)">
-      <node ref="U1" pin="12"/>
-      <node ref="Q5" pin="1"/>
-    </net>
-    <net code="10" name="Net-(Q1-Pad2)">
-      <node ref="U1" pin="1"/>
-      <node ref="Q1" pin="2"/>
-    </net>
-    <net code="11" name="Net-(Q1-Pad3)">
-      <node ref="U1" pin="2"/>
-      <node ref="Q1" pin="3"/>
-    </net>
-    <net code="12" name="Net-(Q2-Pad1)">
-      <node ref="Q2" pin="1"/>
-      <node ref="U1" pin="6"/>
-    </net>
-    <net code="13" name="Net-(Q5-Pad3)">
-      <node ref="Q5" pin="3"/>
-      <node ref="U1" pin="13"/>
-    </net>
-    <net code="14" name="Net-(Q4-Pad1)">
-      <node ref="U1" pin="15"/>
-      <node ref="Q4" pin="1"/>
-    </net>
-    <net code="15" name="Net-(Q4-Pad3)">
-      <node ref="Q4" pin="3"/>
-      <node ref="U1" pin="10"/>
-    </net>
-  </nets>
-</export>
diff --git a/src/SubcircuitLibrary/CA3096/CA3096_Previous_Values.xml b/src/SubcircuitLibrary/CA3096/CA3096_Previous_Values.xml
deleted file mode 100644
index 82a40fb6..00000000
--- a/src/SubcircuitLibrary/CA3096/CA3096_Previous_Values.xml
+++ /dev/null
@@ -1 +0,0 @@
-<KicadtoNgspice><source /><model /><devicemodel><q1><field>/home/bhargav/Downloads/eSim-1.1.2/src/deviceModelLibrary/Transistor/NPN.lib</field></q1><q3><field>/home/bhargav/Downloads/eSim-1.1.2/src/deviceModelLibrary/Transistor/NPN.lib</field></q3><q2><field>/home/bhargav/Downloads/eSim-1.1.2/src/deviceModelLibrary/Transistor/NPN.lib</field></q2><q5><field>/home/bhargav/Downloads/eSim-1.1.2/src/deviceModelLibrary/Transistor/PNP.lib</field></q5><q4><field>/home/bhargav/Downloads/eSim-1.1.2/src/deviceModelLibrary/Transistor/PNP.lib</field></q4></devicemodel><subcircuit /><analysis><ac><field1 name="Lin">true</field1><field2 name="Dec">false</field2><field3 name="Oct">false</field3><field4 name="Start Frequency" /><field5 name="Stop Frequency" /><field6 name="No. of points" /><field7 name="Start Fre Combo">Hz</field7><field8 name="Stop Fre Combo">Hz</field8></ac><dc><field1 name="Source 1" /><field2 name="Start" /><field3 name="Increment" /><field4 name="Stop" /><field5 name="Operating Point">0</field5><field6 name="Start Combo">Volts or Amperes</field6><field7 name="Increment Combo">Volts or Amperes</field7><field8 name="Stop Combo">Volts or Amperes</field8><field9 name="Source 2" /><field10 name="Start" /><field11 name="Increment" /><field12 name="Stop" /><field13 name="Start Combo">Volts or Amperes</field13><field14 name="Increment Combo">Volts or Amperes</field14><field15 name="Stop Combo">Volts or Amperes</field15></dc><tran><field1 name="Start Time">0</field1><field2 name="Step Time">10</field2><field3 name="Stop Time">100</field3><field4 name="Start Combo">Sec</field4><field5 name="Step Combo">ms</field5><field6 name="Stop Combo">ms</field6></tran></analysis></KicadtoNgspice>
\ No newline at end of file
diff --git a/src/SubcircuitLibrary/CA3096/analysis b/src/SubcircuitLibrary/CA3096/analysis
deleted file mode 100644
index d5e13546..00000000
--- a/src/SubcircuitLibrary/CA3096/analysis
+++ /dev/null
@@ -1 +0,0 @@
-.tran 10e-03 100e-03 0e-00
\ No newline at end of file
diff --git a/src/SubcircuitLibrary/CSLA_BEC1_logic/CSLA_BEC1_logic-cache.lib b/src/SubcircuitLibrary/CSLA_BEC1_logic/CSLA_BEC1_logic-cache.lib
deleted file mode 100644
index f7d63760..00000000
--- a/src/SubcircuitLibrary/CSLA_BEC1_logic/CSLA_BEC1_logic-cache.lib
+++ /dev/null
@@ -1,185 +0,0 @@
-EESchema-LIBRARY Version 2.3
-#encoding utf-8
-#
-# DC
-#
-DEF DC v 0 40 Y Y 1 F N
-F0 "v" -200 100 60 H V C CNN
-F1 "DC" -200 -50 60 H V C CNN
-F2 "R1" -300 0 60 H V C CNN
-F3 "" 0 0 60 H V C CNN
-$FPLIST
- 1_pin
-$ENDFPLIST
-DRAW
-C 0 0 150 0 1 0 N
-X + 1 0 450 300 D 50 50 1 1 P
-X - 2 0 -450 300 U 50 50 1 1 P
-ENDDRAW
-ENDDEF
-#
-# Logic_adder
-#
-DEF Logic_adder X 0 40 Y Y 1 F N
-F0 "X" 0 -250 60 H V C CNN
-F1 "Logic_adder" 50 0 60 H V C CNN
-F2 "" 0 0 60 H V C CNN
-F3 "" 0 0 60 H V C CNN
-DRAW
-S -550 550 550 -600 0 1 0 N
-X IN1 1 -750 350 200 R 50 50 1 1 I
-X IN2 2 -750 -50 200 R 50 50 1 1 I
-X CIN 3 -750 -450 200 R 50 50 1 1 I
-X SUM 4 750 350 200 L 50 50 1 1 O
-X COUT 5 750 -300 200 L 50 50 1 1 O
-ENDDRAW
-ENDDEF
-#
-# MUX
-#
-DEF MUX X 0 40 Y Y 1 F N
-F0 "X" 0 0 60 H V C CNN
-F1 "MUX" 0 100 60 H V C CNN
-F2 "" 0 0 60 H I C CNN
-F3 "" 0 0 60 H I C CNN
-DRAW
-S -300 350 250 -150 0 1 0 N
-X sel 1 0 550 200 D 50 50 1 1 I
-X a0 2 -500 150 200 R 50 50 1 1 I
-X a1 3 -500 -50 200 R 50 50 1 1 I
-X y 4 450 100 200 L 50 50 1 1 O
-ENDDRAW
-ENDDEF
-#
-# PORT
-#
-DEF PORT U 0 40 Y Y 26 F N
-F0 "U" 50 100 30 H V C CNN
-F1 "PORT" 0 0 30 H V C CNN
-F2 "" 0 0 60 H V C CNN
-F3 "" 0 0 60 H V C CNN
-DRAW
-A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0
-A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50
-S -100 50 100 -50 0 1 0 N
-X ~ 1 250 0 100 L 30 30 1 1 B
-X ~ 2 250 0 100 L 30 30 2 1 B
-X ~ 3 250 0 100 L 30 30 3 1 B
-X ~ 4 250 0 100 L 30 30 4 1 B
-X ~ 5 250 0 100 L 30 30 5 1 B
-X ~ 6 250 0 100 L 30 30 6 1 B
-X ~ 7 250 0 100 L 30 30 7 1 B
-X ~ 8 250 0 100 L 30 30 8 1 B
-X ~ 9 250 0 100 L 30 30 9 1 B
-X ~ 10 250 0 100 L 30 30 10 1 B
-X ~ 11 250 0 100 L 30 30 11 1 B
-X ~ 12 250 0 100 L 30 30 12 1 B
-X ~ 13 250 0 100 L 30 30 13 1 B
-X ~ 14 250 0 100 L 30 30 14 1 B
-X ~ 15 250 0 100 L 30 30 15 1 B
-X ~ 16 250 0 100 L 30 30 16 1 B
-X ~ 17 250 0 100 L 30 30 17 1 B
-X ~ 18 250 0 100 L 30 30 18 1 B
-X ~ 19 250 0 100 L 30 30 19 1 B
-X ~ 20 250 0 100 L 30 30 20 1 B
-X ~ 21 250 0 100 L 30 30 21 1 B
-X ~ 22 250 0 100 L 30 30 22 1 B
-X ~ 23 250 0 100 L 30 30 23 1 B
-X ~ 24 250 0 100 L 30 30 24 1 B
-X ~ 25 250 0 100 L 30 30 25 1 B
-X ~ 26 250 0 100 L 30 30 26 1 B
-ENDDRAW
-ENDDEF
-#
-# PWR_FLAG
-#
-DEF PWR_FLAG #FLG 0 0 N N 1 F P
-F0 "#FLG" 0 75 50 H I C CNN
-F1 "PWR_FLAG" 0 150 50 H V C CNN
-F2 "" 0 0 50 H I C CNN
-F3 "" 0 0 50 H I C CNN
-DRAW
-X pwr 1 0 0 0 U 50 50 0 0 w
-P 6 0 1 0 0 0 0 50 -40 75 0 100 40 75 0 50 N
-ENDDRAW
-ENDDEF
-#
-# adc_bridge_1
-#
-DEF adc_bridge_1 U 0 40 Y Y 1 F N
-F0 "U" 0 0 60 H V C CNN
-F1 "adc_bridge_1" 0 150 60 H V C CNN
-F2 "" 0 0 60 H V C CNN
-F3 "" 0 0 60 H V C CNN
-DRAW
-S -400 200 350 -50 0 1 0 N
-X IN1 1 -600 50 200 R 50 50 1 1 I
-X OUT1 2 550 50 200 L 50 50 1 1 O
-ENDDRAW
-ENDDEF
-#
-# d_and
-#
-DEF d_and U 0 40 Y Y 1 F N
-F0 "U" 0 0 60 H V C CNN
-F1 "d_and" 50 100 60 H V C CNN
-F2 "" 0 0 60 H V C CNN
-F3 "" 0 0 60 H V C CNN
-DRAW
-A 149 50 100 -894 0 0 1 0 N 150 -50 250 50
-A 150 49 100 6 900 0 1 0 N 250 50 150 150
-P 4 0 1 0 150 -50 -250 -50 -250 150 150 150 N
-X IN1 1 -450 100 200 R 50 50 1 1 I
-X IN2 2 -450 0 200 R 50 50 1 1 I
-X OUT 3 450 50 200 L 50 50 1 1 O
-ENDDRAW
-ENDDEF
-#
-# d_inverter
-#
-DEF d_inverter U 0 40 Y Y 1 F N
-F0 "U" 0 -100 60 H V C CNN
-F1 "d_inverter" 0 150 60 H V C CNN
-F2 "" 50 -50 60 H V C CNN
-F3 "" 50 -50 60 H V C CNN
-DRAW
-P 4 0 1 0 -100 50 -100 -50 100 0 -100 50 N
-X ~ 1 -300 0 200 R 50 50 1 1 I
-X ~ 2 300 0 200 L 50 50 1 1 O I
-ENDDRAW
-ENDDEF
-#
-# d_xor
-#
-DEF d_xor U 0 40 Y Y 1 F N
-F0 "U" 0 0 60 H V C CNN
-F1 "d_xor" 50 100 47 H V C CNN
-F2 "" 0 0 60 H V C CNN
-F3 "" 0 0 60 H V C CNN
-DRAW
-A -450 50 224 266 -266 0 1 0 N -250 150 -250 -50
-A -350 50 180 -337 337 0 1 0 N -200 -50 -200 150
-A -25 -124 325 574 323 0 1 0 N 150 150 250 50
-A 74 125 191 -665 -231 0 1 0 N 150 -50 250 50
-P 2 0 1 0 150 -50 -200 -50 N
-P 2 0 1 0 150 150 -200 150 N
-X IN1 1 -450 100 215 R 50 43 1 1 I
-X IN2 2 -450 0 215 R 50 43 1 1 I
-X OUT 3 450 50 200 L 50 39 1 1 O
-ENDDRAW
-ENDDEF
-#
-# eSim_GND
-#
-DEF eSim_GND #PWR 0 0 Y Y 1 F P
-F0 "#PWR" 0 -250 50 H I C CNN
-F1 "eSim_GND" 0 -150 50 H V C CNN
-F2 "" 0 0 50 H I C CNN
-F3 "" 0 0 50 H I C CNN
-DRAW
-P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
-X GND 1 0 0 0 D 50 50 1 1 W N
-ENDDRAW
-ENDDEF
-#
-#End Library
diff --git a/src/SubcircuitLibrary/CSLA_BEC1_logic/CSLA_BEC1_logic.cir b/src/SubcircuitLibrary/CSLA_BEC1_logic/CSLA_BEC1_logic.cir
deleted file mode 100644
index fee511ed..00000000
--- a/src/SubcircuitLibrary/CSLA_BEC1_logic/CSLA_BEC1_logic.cir
+++ /dev/null
@@ -1,29 +0,0 @@
-* /home/mallikarjuna/Downloads/eSim-1.1.2/src/SubcircuitLibrary/CSLA_BEC1_logic/CSLA_BEC1_logic.cir
-
-* EESchema Netlist Version 1.1 (Spice format) creation date: Sat Jun  8 18:40:34 2019
-
-* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N
-* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0
-
-* Sheet Name: /
-U2  Net-_U2-Pad1_ Net-_U2-Pad2_ Net-_U2-Pad3_ d_and		
-U3  Net-_U3-Pad1_ Net-_U2-Pad3_ Net-_U3-Pad3_ d_and		
-U5  Net-_U2-Pad2_ Net-_U2-Pad1_ Net-_U5-Pad3_ d_xor		
-U6  Net-_U2-Pad3_ Net-_U3-Pad1_ Net-_U6-Pad3_ d_xor		
-U7  Net-_U3-Pad3_ Net-_U7-Pad2_ Net-_U7-Pad3_ d_xor		
-U8  Net-_U3-Pad3_ Net-_U8-Pad2_ Net-_U8-Pad3_ d_xor		
-U4  Net-_U2-Pad2_ Net-_U4-Pad2_ d_inverter		
-U1  Net-_U1-Pad1_ Net-_U1-Pad2_ Net-_U1-Pad3_ Net-_U1-Pad4_ Net-_U1-Pad5_ Net-_U1-Pad6_ Net-_U1-Pad7_ Net-_U1-Pad8_ Net-_U1-Pad9_ Net-_U1-Pad10_ Net-_U1-Pad11_ Net-_U1-Pad12_ Net-_U1-Pad13_ Net-_U1-Pad14_ PORT		
-X3  Net-_U1-Pad1_ Net-_U1-Pad5_ Net-_U9-Pad2_ Net-_U2-Pad2_ Net-_X1-Pad3_ Logic_adder		
-X1  Net-_U1-Pad2_ Net-_U1-Pad6_ Net-_X1-Pad3_ Net-_U2-Pad1_ Net-_X1-Pad5_ Logic_adder		
-X2  Net-_U1-Pad3_ Net-_U1-Pad7_ Net-_X1-Pad5_ Net-_U3-Pad1_ Net-_X2-Pad5_ Logic_adder		
-X4  Net-_U1-Pad4_ Net-_U1-Pad8_ Net-_X2-Pad5_ Net-_U7-Pad2_ Net-_U8-Pad2_ Logic_adder		
-X7  Net-_U1-Pad9_ Net-_U2-Pad2_ Net-_U4-Pad2_ Net-_U1-Pad10_ MUX		
-X5  Net-_U1-Pad9_ Net-_U2-Pad1_ Net-_U5-Pad3_ Net-_U1-Pad11_ MUX		
-X8  Net-_U1-Pad9_ Net-_U3-Pad1_ Net-_U6-Pad3_ Net-_U1-Pad12_ MUX		
-X6  Net-_U1-Pad9_ Net-_U7-Pad2_ Net-_U7-Pad3_ Net-_U1-Pad13_ MUX		
-X9  Net-_U1-Pad9_ Net-_U8-Pad2_ Net-_U8-Pad3_ Net-_U1-Pad14_ MUX		
-v1  Net-_U9-Pad1_ GND 0		
-U9  Net-_U9-Pad1_ Net-_U9-Pad2_ adc_bridge_1		
-
-.end
diff --git a/src/SubcircuitLibrary/CSLA_BEC1_logic/CSLA_BEC1_logic.cir.out b/src/SubcircuitLibrary/CSLA_BEC1_logic/CSLA_BEC1_logic.cir.out
deleted file mode 100644
index 9bfd2402..00000000
--- a/src/SubcircuitLibrary/CSLA_BEC1_logic/CSLA_BEC1_logic.cir.out
+++ /dev/null
@@ -1,56 +0,0 @@
-* /home/mallikarjuna/downloads/esim-1.1.2/src/subcircuitlibrary/csla_bec1_logic/csla_bec1_logic.cir
-
-.include LOGIC_ADDER.sub
-.include MUX.sub
-* u2  net-_u2-pad1_ net-_u2-pad2_ net-_u2-pad3_ d_and
-* u3  net-_u3-pad1_ net-_u2-pad3_ net-_u3-pad3_ d_and
-* u5  net-_u2-pad2_ net-_u2-pad1_ net-_u5-pad3_ d_xor
-* u6  net-_u2-pad3_ net-_u3-pad1_ net-_u6-pad3_ d_xor
-* u7  net-_u3-pad3_ net-_u7-pad2_ net-_u7-pad3_ d_xor
-* u8  net-_u3-pad3_ net-_u8-pad2_ net-_u8-pad3_ d_xor
-* u4  net-_u2-pad2_ net-_u4-pad2_ d_inverter
-* u1  net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ net-_u1-pad5_ net-_u1-pad6_ net-_u1-pad7_ net-_u1-pad8_ net-_u1-pad9_ net-_u1-pad10_ net-_u1-pad11_ net-_u1-pad12_ net-_u1-pad13_ net-_u1-pad14_ port
-x3 net-_u1-pad1_ net-_u1-pad5_ net-_u9-pad2_ net-_u2-pad2_ net-_x1-pad3_ LOGIC_ADDER
-x1 net-_u1-pad2_ net-_u1-pad6_ net-_x1-pad3_ net-_u2-pad1_ net-_x1-pad5_ LOGIC_ADDER
-x2 net-_u1-pad3_ net-_u1-pad7_ net-_x1-pad5_ net-_u3-pad1_ net-_x2-pad5_ LOGIC_ADDER
-x4 net-_u1-pad4_ net-_u1-pad8_ net-_x2-pad5_ net-_u7-pad2_ net-_u8-pad2_ LOGIC_ADDER
-x7 net-_u1-pad9_ net-_u2-pad2_ net-_u4-pad2_ net-_u1-pad10_ MUX
-x5 net-_u1-pad9_ net-_u2-pad1_ net-_u5-pad3_ net-_u1-pad11_ MUX
-x8 net-_u1-pad9_ net-_u3-pad1_ net-_u6-pad3_ net-_u1-pad12_ MUX
-x6 net-_u1-pad9_ net-_u7-pad2_ net-_u7-pad3_ net-_u1-pad13_ MUX
-x9 net-_u1-pad9_ net-_u8-pad2_ net-_u8-pad3_ net-_u1-pad14_ MUX
-v1  net-_u9-pad1_ gnd 0
-* u9  net-_u9-pad1_ net-_u9-pad2_ adc_bridge_1
-a1 [net-_u2-pad1_ net-_u2-pad2_ ] net-_u2-pad3_ u2
-a2 [net-_u3-pad1_ net-_u2-pad3_ ] net-_u3-pad3_ u3
-a3 [net-_u2-pad2_ net-_u2-pad1_ ] net-_u5-pad3_ u5
-a4 [net-_u2-pad3_ net-_u3-pad1_ ] net-_u6-pad3_ u6
-a5 [net-_u3-pad3_ net-_u7-pad2_ ] net-_u7-pad3_ u7
-a6 [net-_u3-pad3_ net-_u8-pad2_ ] net-_u8-pad3_ u8
-a7 net-_u2-pad2_ net-_u4-pad2_ u4
-a8 [net-_u9-pad1_ ] [net-_u9-pad2_ ] u9
-* Schematic Name: d_and, NgSpice Name: d_and
-.model u2 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 
-* Schematic Name: d_and, NgSpice Name: d_and
-.model u3 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 
-* Schematic Name: d_xor, NgSpice Name: d_xor
-.model u5 d_xor(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 
-* Schematic Name: d_xor, NgSpice Name: d_xor
-.model u6 d_xor(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 
-* Schematic Name: d_xor, NgSpice Name: d_xor
-.model u7 d_xor(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 
-* Schematic Name: d_xor, NgSpice Name: d_xor
-.model u8 d_xor(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 
-* Schematic Name: d_inverter, NgSpice Name: d_inverter
-.model u4 d_inverter(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 
-* Schematic Name: adc_bridge_1, NgSpice Name: adc_bridge
-.model u9 adc_bridge(fall_delay=1.0e-9 in_high=2.0 rise_delay=1.0e-9 in_low=1.0 ) 
-.tran 0e-00 0e-00 0e-00
-
-* Control Statements 
-.control
-run
-print allv > plot_data_v.txt
-print alli > plot_data_i.txt
-.endc
-.end
diff --git a/src/SubcircuitLibrary/CSLA_BEC1_logic/CSLA_BEC1_logic.pro b/src/SubcircuitLibrary/CSLA_BEC1_logic/CSLA_BEC1_logic.pro
deleted file mode 100644
index a546f71d..00000000
--- a/src/SubcircuitLibrary/CSLA_BEC1_logic/CSLA_BEC1_logic.pro
+++ /dev/null
@@ -1,46 +0,0 @@
-update=Sat Jun  8 13:24:24 2019
-version=1
-last_client=eeschema
-[general]
-version=1
-RootSch=
-BoardNm=
-[pcbnew]
-version=1
-LastNetListRead=
-UseCmpFile=1
-PadDrill=0.600000000000
-PadDrillOvalY=0.600000000000
-PadSizeH=1.500000000000
-PadSizeV=1.500000000000
-PcbTextSizeV=1.500000000000
-PcbTextSizeH=1.500000000000
-PcbTextThickness=0.300000000000
-ModuleTextSizeV=1.000000000000
-ModuleTextSizeH=1.000000000000
-ModuleTextSizeThickness=0.150000000000
-SolderMaskClearance=0.000000000000
-SolderMaskMinWidth=0.000000000000
-DrawSegmentWidth=0.200000000000
-BoardOutlineThickness=0.100000000000
-ModuleOutlineThickness=0.150000000000
-[cvpcb]
-version=1
-NetIExt=net
-[eeschema]
-version=1
-LibDir=../../../kicadSchematicLibrary
-[eeschema/libraries]
-LibName1=/home/mallikarjuna/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_Analog
-LibName2=/home/mallikarjuna/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_Devices
-LibName3=/home/mallikarjuna/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_Digital
-LibName4=/home/mallikarjuna/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_Hybrid
-LibName5=/home/mallikarjuna/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_Miscellaneous
-LibName6=/home/mallikarjuna/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_PSpice
-LibName7=/home/mallikarjuna/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_Plot
-LibName8=/home/mallikarjuna/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_Power
-LibName9=/home/mallikarjuna/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_Sources
-LibName10=/home/mallikarjuna/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_User
-LibName11=eSim_Subckt
-LibName12=power
-
diff --git a/src/SubcircuitLibrary/CSLA_BEC1_logic/CSLA_BEC1_logic.sch b/src/SubcircuitLibrary/CSLA_BEC1_logic/CSLA_BEC1_logic.sch
deleted file mode 100644
index e7eac906..00000000
--- a/src/SubcircuitLibrary/CSLA_BEC1_logic/CSLA_BEC1_logic.sch
+++ /dev/null
@@ -1,654 +0,0 @@
-EESchema Schematic File Version 2
-LIBS:eSim_Analog
-LIBS:eSim_Devices
-LIBS:eSim_Digital
-LIBS:eSim_Hybrid
-LIBS:eSim_Miscellaneous
-LIBS:eSim_PSpice
-LIBS:eSim_Plot
-LIBS:eSim_Power
-LIBS:eSim_Sources
-LIBS:eSim_User
-LIBS:eSim_Subckt
-LIBS:power
-LIBS:CSLA_BEC1_logic-cache
-EELAYER 25 0
-EELAYER END
-$Descr A4 11693 8268
-encoding utf-8
-Sheet 1 1
-Title ""
-Date ""
-Rev ""
-Comp ""
-Comment1 ""
-Comment2 ""
-Comment3 ""
-Comment4 ""
-$EndDescr
-$Comp
-L d_and U2
-U 1 1 5CFB5959
-P 4800 3500
-F 0 "U2" H 4800 3500 60  0000 C CNN
-F 1 "d_and" H 4850 3600 60  0000 C CNN
-F 2 "" H 4800 3500 60  0000 C CNN
-F 3 "" H 4800 3500 60  0000 C CNN
-	1    4800 3500
-	0    1    1    0   
-$EndComp
-$Comp
-L d_and U3
-U 1 1 5CFB595A
-P 4850 5350
-F 0 "U3" H 4850 5350 60  0000 C CNN
-F 1 "d_and" H 4900 5450 60  0000 C CNN
-F 2 "" H 4850 5350 60  0000 C CNN
-F 3 "" H 4850 5350 60  0000 C CNN
-	1    4850 5350
-	0    1    1    0   
-$EndComp
-$Comp
-L d_xor U5
-U 1 1 5CFB595B
-P 5750 2900
-F 0 "U5" H 5750 2900 60  0000 C CNN
-F 1 "d_xor" H 5800 3000 47  0000 C CNN
-F 2 "" H 5750 2900 60  0000 C CNN
-F 3 "" H 5750 2900 60  0000 C CNN
-	1    5750 2900
-	1    0    0    -1  
-$EndComp
-$Comp
-L d_xor U6
-U 1 1 5CFB595C
-P 5800 4450
-F 0 "U6" H 5800 4450 60  0000 C CNN
-F 1 "d_xor" H 5850 4550 47  0000 C CNN
-F 2 "" H 5800 4450 60  0000 C CNN
-F 3 "" H 5800 4450 60  0000 C CNN
-	1    5800 4450
-	1    0    0    -1  
-$EndComp
-$Comp
-L d_xor U7
-U 1 1 5CFB595D
-P 5900 5250
-F 0 "U7" H 5900 5250 60  0000 C CNN
-F 1 "d_xor" H 5950 5350 47  0000 C CNN
-F 2 "" H 5900 5250 60  0000 C CNN
-F 3 "" H 5900 5250 60  0000 C CNN
-	1    5900 5250
-	1    0    0    -1  
-$EndComp
-$Comp
-L d_xor U8
-U 1 1 5CFB595E
-P 5900 6700
-F 0 "U8" H 5900 6700 60  0000 C CNN
-F 1 "d_xor" H 5950 6800 47  0000 C CNN
-F 2 "" H 5900 6700 60  0000 C CNN
-F 3 "" H 5900 6700 60  0000 C CNN
-	1    5900 6700
-	1    0    0    -1  
-$EndComp
-$Comp
-L d_inverter U4
-U 1 1 5CFB595F
-P 5600 1300
-F 0 "U4" H 5600 1200 60  0000 C CNN
-F 1 "d_inverter" H 5600 1450 60  0000 C CNN
-F 2 "" H 5650 1250 60  0000 C CNN
-F 3 "" H 5650 1250 60  0000 C CNN
-	1    5600 1300
-	1    0    0    -1  
-$EndComp
-$Comp
-L PORT U1
-U 1 1 5CFB6267
-P 1950 1300
-F 0 "U1" H 2000 1400 30  0000 C CNN
-F 1 "PORT" H 1950 1300 30  0000 C CNN
-F 2 "" H 1950 1300 60  0000 C CNN
-F 3 "" H 1950 1300 60  0000 C CNN
-	1    1950 1300
-	1    0    0    -1  
-$EndComp
-$Comp
-L PORT U1
-U 5 1 5CFB62F5
-P 1950 1700
-F 0 "U1" H 2000 1800 30  0000 C CNN
-F 1 "PORT" H 1950 1700 30  0000 C CNN
-F 2 "" H 1950 1700 60  0000 C CNN
-F 3 "" H 1950 1700 60  0000 C CNN
-	5    1950 1700
-	1    0    0    -1  
-$EndComp
-$Comp
-L PORT U1
-U 9 1 5CFB6357
-P 1950 2100
-F 0 "U1" H 2000 2200 30  0000 C CNN
-F 1 "PORT" H 1950 2100 30  0000 C CNN
-F 2 "" H 1950 2100 60  0000 C CNN
-F 3 "" H 1950 2100 60  0000 C CNN
-	9    1950 2100
-	1    0    0    -1  
-$EndComp
-$Comp
-L PORT U1
-U 2 1 5CFB63B0
-P 2150 2900
-F 0 "U1" H 2200 3000 30  0000 C CNN
-F 1 "PORT" H 2150 2900 30  0000 C CNN
-F 2 "" H 2150 2900 60  0000 C CNN
-F 3 "" H 2150 2900 60  0000 C CNN
-	2    2150 2900
-	1    0    0    -1  
-$EndComp
-$Comp
-L PORT U1
-U 6 1 5CFB641E
-P 2300 3300
-F 0 "U1" H 2350 3400 30  0000 C CNN
-F 1 "PORT" H 2300 3300 30  0000 C CNN
-F 2 "" H 2300 3300 60  0000 C CNN
-F 3 "" H 2300 3300 60  0000 C CNN
-	6    2300 3300
-	1    0    0    -1  
-$EndComp
-$Comp
-L PORT U1
-U 3 1 5CFB647F
-P 1900 4450
-F 0 "U1" H 1950 4550 30  0000 C CNN
-F 1 "PORT" H 1900 4450 30  0000 C CNN
-F 2 "" H 1900 4450 60  0000 C CNN
-F 3 "" H 1900 4450 60  0000 C CNN
-	3    1900 4450
-	1    0    0    -1  
-$EndComp
-$Comp
-L PORT U1
-U 7 1 5CFB6565
-P 2150 4850
-F 0 "U1" H 2200 4950 30  0000 C CNN
-F 1 "PORT" H 2150 4850 30  0000 C CNN
-F 2 "" H 2150 4850 60  0000 C CNN
-F 3 "" H 2150 4850 60  0000 C CNN
-	7    2150 4850
-	1    0    0    -1  
-$EndComp
-$Comp
-L PORT U1
-U 4 1 5CFB65D4
-P 2000 5900
-F 0 "U1" H 2050 6000 30  0000 C CNN
-F 1 "PORT" H 2000 5900 30  0000 C CNN
-F 2 "" H 2000 5900 60  0000 C CNN
-F 3 "" H 2000 5900 60  0000 C CNN
-	4    2000 5900
-	1    0    0    -1  
-$EndComp
-$Comp
-L PORT U1
-U 8 1 5CFB6660
-P 2300 6300
-F 0 "U1" H 2350 6400 30  0000 C CNN
-F 1 "PORT" H 2300 6300 30  0000 C CNN
-F 2 "" H 2300 6300 60  0000 C CNN
-F 3 "" H 2300 6300 60  0000 C CNN
-	8    2300 6300
-	1    0    0    -1  
-$EndComp
-$Comp
-L PORT U1
-U 10 1 5CFB66D3
-P 8700 2250
-F 0 "U1" H 8750 2350 30  0000 C CNN
-F 1 "PORT" H 8700 2250 30  0000 C CNN
-F 2 "" H 8700 2250 60  0000 C CNN
-F 3 "" H 8700 2250 60  0000 C CNN
-	10   8700 2250
-	-1   0    0    1   
-$EndComp
-$Comp
-L PORT U1
-U 11 1 5CFB6922
-P 8700 2600
-F 0 "U1" H 8750 2700 30  0000 C CNN
-F 1 "PORT" H 8700 2600 30  0000 C CNN
-F 2 "" H 8700 2600 60  0000 C CNN
-F 3 "" H 8700 2600 60  0000 C CNN
-	11   8700 2600
-	-1   0    0    1   
-$EndComp
-$Comp
-L PORT U1
-U 12 1 5CFB6A11
-P 8700 3200
-F 0 "U1" H 8750 3300 30  0000 C CNN
-F 1 "PORT" H 8700 3200 30  0000 C CNN
-F 2 "" H 8700 3200 60  0000 C CNN
-F 3 "" H 8700 3200 60  0000 C CNN
-	12   8700 3200
-	-1   0    0    1   
-$EndComp
-$Comp
-L PORT U1
-U 13 1 5CFB6AE5
-P 8700 3500
-F 0 "U1" H 8750 3600 30  0000 C CNN
-F 1 "PORT" H 8700 3500 30  0000 C CNN
-F 2 "" H 8700 3500 60  0000 C CNN
-F 3 "" H 8700 3500 60  0000 C CNN
-	13   8700 3500
-	-1   0    0    1   
-$EndComp
-$Comp
-L PORT U1
-U 14 1 5CFB6B58
-P 8700 3800
-F 0 "U1" H 8750 3900 30  0000 C CNN
-F 1 "PORT" H 8700 3800 30  0000 C CNN
-F 2 "" H 8700 3800 60  0000 C CNN
-F 3 "" H 8700 3800 60  0000 C CNN
-	14   8700 3800
-	-1   0    0    1   
-$EndComp
-$Comp
-L Logic_adder X3
-U 1 1 5CFB6531
-P 3850 1650
-F 0 "X3" H 3850 1400 60  0000 C CNN
-F 1 "Logic_adder" H 3900 1650 60  0000 C CNN
-F 2 "" H 3850 1650 60  0000 C CNN
-F 3 "" H 3850 1650 60  0000 C CNN
-	1    3850 1650
-	1    0    0    -1  
-$EndComp
-$Comp
-L Logic_adder X1
-U 1 1 5CFB6824
-P 3750 3250
-F 0 "X1" H 3750 3000 60  0000 C CNN
-F 1 "Logic_adder" H 3800 3250 60  0000 C CNN
-F 2 "" H 3750 3250 60  0000 C CNN
-F 3 "" H 3750 3250 60  0000 C CNN
-	1    3750 3250
-	1    0    0    -1  
-$EndComp
-$Comp
-L Logic_adder X2
-U 1 1 5CFB691C
-P 3800 4800
-F 0 "X2" H 3800 4550 60  0000 C CNN
-F 1 "Logic_adder" H 3850 4800 60  0000 C CNN
-F 2 "" H 3800 4800 60  0000 C CNN
-F 3 "" H 3800 4800 60  0000 C CNN
-	1    3800 4800
-	1    0    0    -1  
-$EndComp
-$Comp
-L Logic_adder X4
-U 1 1 5CFB69DF
-P 3850 6250
-F 0 "X4" H 3850 6000 60  0000 C CNN
-F 1 "Logic_adder" H 3900 6250 60  0000 C CNN
-F 2 "" H 3850 6250 60  0000 C CNN
-F 3 "" H 3850 6250 60  0000 C CNN
-	1    3850 6250
-	1    0    0    -1  
-$EndComp
-$Comp
-L MUX X7
-U 1 1 5CFB6AF5
-P 7500 1450
-F 0 "X7" H 7500 1450 60  0000 C CNN
-F 1 "MUX" H 7500 1550 60  0000 C CNN
-F 2 "" H 7500 1450 60  0001 C CNN
-F 3 "" H 7500 1450 60  0001 C CNN
-	1    7500 1450
-	1    0    0    -1  
-$EndComp
-$Comp
-L MUX X5
-U 1 1 5CFB6BC8
-P 7450 2950
-F 0 "X5" H 7450 2950 60  0000 C CNN
-F 1 "MUX" H 7450 3050 60  0000 C CNN
-F 2 "" H 7450 2950 60  0001 C CNN
-F 3 "" H 7450 2950 60  0001 C CNN
-	1    7450 2950
-	1    0    0    -1  
-$EndComp
-$Comp
-L MUX X8
-U 1 1 5CFB6C73
-P 7500 4100
-F 0 "X8" H 7500 4100 60  0000 C CNN
-F 1 "MUX" H 7500 4200 60  0000 C CNN
-F 2 "" H 7500 4100 60  0001 C CNN
-F 3 "" H 7500 4100 60  0001 C CNN
-	1    7500 4100
-	1    0    0    -1  
-$EndComp
-$Comp
-L MUX X6
-U 1 1 5CFB6D3F
-P 7450 5250
-F 0 "X6" H 7450 5250 60  0000 C CNN
-F 1 "MUX" H 7450 5350 60  0000 C CNN
-F 2 "" H 7450 5250 60  0001 C CNN
-F 3 "" H 7450 5250 60  0001 C CNN
-	1    7450 5250
-	1    0    0    -1  
-$EndComp
-$Comp
-L MUX X9
-U 1 1 5CFB6E26
-P 7550 6200
-F 0 "X9" H 7550 6200 60  0000 C CNN
-F 1 "MUX" H 7550 6300 60  0000 C CNN
-F 2 "" H 7550 6200 60  0001 C CNN
-F 3 "" H 7550 6200 60  0001 C CNN
-	1    7550 6200
-	1    0    0    -1  
-$EndComp
-$Comp
-L eSim_GND #PWR01
-U 1 1 5CFBB921
-P 800 2450
-F 0 "#PWR01" H 800 2200 50  0001 C CNN
-F 1 "eSim_GND" H 800 2300 50  0000 C CNN
-F 2 "" H 800 2450 50  0001 C CNN
-F 3 "" H 800 2450 50  0001 C CNN
-	1    800  2450
-	1    0    0    -1  
-$EndComp
-$Comp
-L DC v1
-U 1 1 5CFBBABC
-P 1300 2300
-F 0 "v1" H 1100 2400 60  0000 C CNN
-F 1 "0" H 1100 2250 60  0000 C CNN
-F 2 "R1" H 1000 2300 60  0000 C CNN
-F 3 "" H 1300 2300 60  0000 C CNN
-	1    1300 2300
-	0    1    1    0   
-$EndComp
-$Comp
-L adc_bridge_1 U9
-U 1 1 5CFBB81E
-P 2500 2350
-F 0 "U9" H 2500 2350 60  0000 C CNN
-F 1 "adc_bridge_1" H 2500 2500 60  0000 C CNN
-F 2 "" H 2500 2350 60  0000 C CNN
-F 3 "" H 2500 2350 60  0000 C CNN
-	1    2500 2350
-	1    0    0    -1  
-$EndComp
-$Comp
-L PWR_FLAG #FLG02
-U 1 1 5CFBBCDC
-P 750 2350
-F 0 "#FLG02" H 750 2425 50  0001 C CNN
-F 1 "PWR_FLAG" H 750 2500 50  0000 C CNN
-F 2 "" H 750 2350 50  0001 C CNN
-F 3 "" H 750 2350 50  0001 C CNN
-	1    750  2350
-	1    0    0    -1  
-$EndComp
-Wire Wire Line
-	1750 2300 1900 2300
-Wire Wire Line
-	750  2400 850  2400
-Wire Wire Line
-	850  2300 850  2450
-Connection ~ 850  2400
-Wire Wire Line
-	850  2450 800  2450
-Wire Wire Line
-	750  2350 750  2400
-Wire Wire Line
-	3050 2300 3050 2100
-Wire Wire Line
-	3050 2100 3100 2100
-Connection ~ 6600 2100
-Connection ~ 6600 600 
-Wire Wire Line
-	6600 600  6600 5650
-Connection ~ 6600 3550
-Wire Wire Line
-	6600 2100 7450 2100
-Wire Wire Line
-	6600 3550 7500 3550
-Wire Wire Line
-	6600 4700 7450 4700
-Wire Wire Line
-	4600 3700 4550 3700
-Wire Wire Line
-	4700 2100 4650 2100
-Wire Wire Line
-	7050 6300 7050 6250
-Wire Wire Line
-	7050 6000 7050 6050
-Wire Wire Line
-	6950 5350 6950 5300
-Wire Wire Line
-	6950 5050 6950 5100
-Wire Wire Line
-	7000 4150 6900 4150
-Wire Wire Line
-	6900 3950 6900 3900
-Wire Wire Line
-	7000 3950 6900 3950
-Wire Wire Line
-	8150 4000 7950 4000
-Wire Wire Line
-	6950 3050 6850 3050
-Wire Wire Line
-	6950 3000 6950 3050
-Wire Wire Line
-	6950 2750 6950 2800
-Wire Wire Line
-	6950 1550 6900 1550
-Wire Wire Line
-	6950 1500 6950 1550
-Wire Wire Line
-	7000 1500 6950 1500
-Wire Wire Line
-	7000 1250 6900 1250
-Wire Wire Line
-	7000 1300 7000 1250
-Wire Wire Line
-	4500 3550 4600 3550
-Wire Wire Line
-	4700 6550 4600 6550
-Wire Wire Line
-	4550 5100 4650 5100
-Wire Wire Line
-	4700 1950 4600 1950
-Wire Wire Line
-	6600 5650 7550 5650
-Wire Wire Line
-	5400 6000 7050 6000
-Wire Wire Line
-	5350 5050 6950 5050
-Wire Wire Line
-	5350 5900 5350 5050
-Wire Wire Line
-	6400 5350 6950 5350
-Wire Wire Line
-	6400 5200 6400 5350
-Wire Wire Line
-	6650 6650 6650 6300
-Wire Wire Line
-	5400 6700 5400 6000
-Wire Wire Line
-	6900 3900 5350 3900
-Wire Wire Line
-	6900 4150 6900 4400
-Wire Wire Line
-	6900 4400 6250 4400
-Connection ~ 5200 2900
-Wire Wire Line
-	5200 2900 5200 2600
-Wire Wire Line
-	5200 2600 6350 2600
-Wire Wire Line
-	6350 2600 6350 2750
-Wire Wire Line
-	6350 2750 6950 2750
-Wire Wire Line
-	6850 3050 6850 2850
-Wire Wire Line
-	6850 2850 6200 2850
-Wire Wire Line
-	4550 4450 5350 4450
-Wire Wire Line
-	4600 1300 5300 1300
-Wire Wire Line
-	4500 2900 5300 2900
-Wire Wire Line
-	4700 1950 4700 2100
-Wire Wire Line
-	4600 3550 4600 3700
-Wire Wire Line
-	4650 5250 4600 5250
-Wire Wire Line
-	4650 5100 4650 5250
-Wire Wire Line
-	4600 5900 5450 5900
-Wire Wire Line
-	4700 6700 5450 6700
-Wire Wire Line
-	4700 6550 4700 6700
-Wire Wire Line
-	2200 1300 3100 1300
-Wire Wire Line
-	2200 1700 3100 1700
-Wire Wire Line
-	2700 2100 2700 600 
-Wire Wire Line
-	2550 3300 3000 3300
-Wire Wire Line
-	2400 2900 3000 2900
-Wire Wire Line
-	2200 2100 2700 2100
-Wire Wire Line
-	8000 6100 8450 6100
-Wire Wire Line
-	8450 6100 8450 3800
-Wire Wire Line
-	8300 3500 8450 3500
-Wire Wire Line
-	8300 5150 8300 3500
-Wire Wire Line
-	7900 5150 8300 5150
-Wire Wire Line
-	8150 3200 8450 3200
-Wire Wire Line
-	8300 2600 8450 2600
-Wire Wire Line
-	8300 2850 8300 2600
-Wire Wire Line
-	7900 2850 8300 2850
-Wire Wire Line
-	8450 1350 8450 2250
-Wire Wire Line
-	7950 1350 8450 1350
-Wire Wire Line
-	8150 3200 8150 4000
-Wire Wire Line
-	6650 6300 7050 6300
-Wire Wire Line
-	5350 4450 5350 3900
-Wire Wire Line
-	7450 2100 7450 2400
-Wire Wire Line
-	6900 1550 6900 1300
-Wire Wire Line
-	6900 1300 5900 1300
-Wire Wire Line
-	6900 1250 6900 1050
-Wire Wire Line
-	7500 600  7500 900 
-Wire Wire Line
-	6350 5200 6400 5200
-Wire Wire Line
-	2700 600  7500 600 
-Wire Wire Line
-	2250 5900 3100 5900
-Wire Wire Line
-	2550 6300 3100 6300
-Wire Wire Line
-	2400 4850 3050 4850
-Wire Wire Line
-	2150 4450 3050 4450
-Wire Wire Line
-	5450 5900 5450 5250
-Wire Wire Line
-	5400 5150 5450 5150
-Wire Wire Line
-	5400 5800 5400 5150
-Wire Wire Line
-	6350 6650 6650 6650
-Connection ~ 5350 5900
-Connection ~ 5400 6700
-Wire Wire Line
-	4900 6600 5450 6600
-Wire Wire Line
-	4900 5800 4900 6600
-Wire Wire Line
-	4900 5800 5400 5800
-Connection ~ 4950 4450
-Wire Wire Line
-	4950 4450 4950 4900
-Wire Wire Line
-	4850 3950 4850 4900
-Wire Wire Line
-	2800 6700 3100 6700
-Wire Wire Line
-	2800 5600 2800 6700
-Wire Wire Line
-	4600 5600 2800 5600
-Wire Wire Line
-	4600 5250 4600 5600
-Wire Wire Line
-	2750 5250 3050 5250
-Wire Wire Line
-	2750 4100 2750 5250
-Wire Wire Line
-	4550 4100 2750 4100
-Wire Wire Line
-	4550 3700 4550 4100
-Connection ~ 4850 4350
-Wire Wire Line
-	4850 4350 5350 4350
-Connection ~ 4900 2900
-Wire Wire Line
-	4900 2900 4900 3050
-Connection ~ 4800 2750
-Wire Wire Line
-	5300 2750 5300 2800
-Wire Wire Line
-	4800 2750 5300 2750
-Connection ~ 4800 1300
-Wire Wire Line
-	4800 1300 4800 3050
-Wire Wire Line
-	2700 3700 3000 3700
-Wire Wire Line
-	2700 2500 2700 3700
-Wire Wire Line
-	4650 2500 2700 2500
-Wire Wire Line
-	4650 2100 4650 2500
-Wire Wire Line
-	6900 1050 5300 1050
-Wire Wire Line
-	5300 1050 5300 1300
-Connection ~ 6600 4700
-$EndSCHEMATC
diff --git a/src/SubcircuitLibrary/CSLA_BEC1_logic/CSLA_BEC1_logic.sub b/src/SubcircuitLibrary/CSLA_BEC1_logic/CSLA_BEC1_logic.sub
deleted file mode 100644
index fd844be7..00000000
--- a/src/SubcircuitLibrary/CSLA_BEC1_logic/CSLA_BEC1_logic.sub
+++ /dev/null
@@ -1,50 +0,0 @@
-* Subcircuit CSLA_BEC1_logic
-.subckt CSLA_BEC1_logic net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ net-_u1-pad5_ net-_u1-pad6_ net-_u1-pad7_ net-_u1-pad8_ net-_u1-pad9_ net-_u1-pad10_ net-_u1-pad11_ net-_u1-pad12_ net-_u1-pad13_ net-_u1-pad14_ 
-* /home/mallikarjuna/downloads/esim-1.1.2/src/subcircuitlibrary/csla_bec1_logic/csla_bec1_logic.cir
-.include LOGIC_ADDER.sub
-.include MUX.sub
-* u2  net-_u2-pad1_ net-_u2-pad2_ net-_u2-pad3_ d_and
-* u3  net-_u3-pad1_ net-_u2-pad3_ net-_u3-pad3_ d_and
-* u5  net-_u2-pad2_ net-_u2-pad1_ net-_u5-pad3_ d_xor
-* u6  net-_u2-pad3_ net-_u3-pad1_ net-_u6-pad3_ d_xor
-* u7  net-_u3-pad3_ net-_u7-pad2_ net-_u7-pad3_ d_xor
-* u8  net-_u3-pad3_ net-_u8-pad2_ net-_u8-pad3_ d_xor
-* u4  net-_u2-pad2_ net-_u4-pad2_ d_inverter
-x3 net-_u1-pad1_ net-_u1-pad5_ net-_u9-pad2_ net-_u2-pad2_ net-_x1-pad3_ LOGIC_ADDER
-x1 net-_u1-pad2_ net-_u1-pad6_ net-_x1-pad3_ net-_u2-pad1_ net-_x1-pad5_ LOGIC_ADDER
-x2 net-_u1-pad3_ net-_u1-pad7_ net-_x1-pad5_ net-_u3-pad1_ net-_x2-pad5_ LOGIC_ADDER
-x4 net-_u1-pad4_ net-_u1-pad8_ net-_x2-pad5_ net-_u7-pad2_ net-_u8-pad2_ LOGIC_ADDER
-x7 net-_u1-pad9_ net-_u2-pad2_ net-_u4-pad2_ net-_u1-pad10_ MUX
-x5 net-_u1-pad9_ net-_u2-pad1_ net-_u5-pad3_ net-_u1-pad11_ MUX
-x8 net-_u1-pad9_ net-_u3-pad1_ net-_u6-pad3_ net-_u1-pad12_ MUX
-x6 net-_u1-pad9_ net-_u7-pad2_ net-_u7-pad3_ net-_u1-pad13_ MUX
-x9 net-_u1-pad9_ net-_u8-pad2_ net-_u8-pad3_ net-_u1-pad14_ MUX
-v1  net-_u9-pad1_ gnd 0
-* u9  net-_u9-pad1_ net-_u9-pad2_ adc_bridge_1
-a1 [net-_u2-pad1_ net-_u2-pad2_ ] net-_u2-pad3_ u2
-a2 [net-_u3-pad1_ net-_u2-pad3_ ] net-_u3-pad3_ u3
-a3 [net-_u2-pad2_ net-_u2-pad1_ ] net-_u5-pad3_ u5
-a4 [net-_u2-pad3_ net-_u3-pad1_ ] net-_u6-pad3_ u6
-a5 [net-_u3-pad3_ net-_u7-pad2_ ] net-_u7-pad3_ u7
-a6 [net-_u3-pad3_ net-_u8-pad2_ ] net-_u8-pad3_ u8
-a7 net-_u2-pad2_ net-_u4-pad2_ u4
-a8 [net-_u9-pad1_ ] [net-_u9-pad2_ ] u9
-* Schematic Name: d_and, NgSpice Name: d_and
-.model u2 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )
-* Schematic Name: d_and, NgSpice Name: d_and
-.model u3 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )
-* Schematic Name: d_xor, NgSpice Name: d_xor
-.model u5 d_xor(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )
-* Schematic Name: d_xor, NgSpice Name: d_xor
-.model u6 d_xor(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )
-* Schematic Name: d_xor, NgSpice Name: d_xor
-.model u7 d_xor(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )
-* Schematic Name: d_xor, NgSpice Name: d_xor
-.model u8 d_xor(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )
-* Schematic Name: d_inverter, NgSpice Name: d_inverter
-.model u4 d_inverter(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )
-* Schematic Name: adc_bridge_1, NgSpice Name: adc_bridge
-.model u9 adc_bridge(fall_delay=1.0e-9 in_high=2.0 rise_delay=1.0e-9 in_low=1.0 )
-* Control Statements
-
-.ends CSLA_BEC1_logic
\ No newline at end of file
diff --git a/src/SubcircuitLibrary/CSLA_BEC1_logic/CSLA_BEC1_logic_Previous_Values.xml b/src/SubcircuitLibrary/CSLA_BEC1_logic/CSLA_BEC1_logic_Previous_Values.xml
deleted file mode 100644
index 55dd75da..00000000
--- a/src/SubcircuitLibrary/CSLA_BEC1_logic/CSLA_BEC1_logic_Previous_Values.xml
+++ /dev/null
@@ -1 +0,0 @@
-<KicadtoNgspice><source><v1 name="Source type">0</v1></source><model><u2 name="type">d_and<field1 name="Enter Fall Delay (default=1.0e-9)" /><field2 name="Enter Input Load (default=1.0e-12)" /><field3 name="Enter Rise Delay (default=1.0e-9)" /></u2><u3 name="type">d_and<field4 name="Enter Fall Delay (default=1.0e-9)" /><field5 name="Enter Input Load (default=1.0e-12)" /><field6 name="Enter Rise Delay (default=1.0e-9)" /></u3><u5 name="type">d_xor<field7 name="Enter Fall Delay (default=1.0e-9)" /><field8 name="Enter Input Load (default=1.0e-12)" /><field9 name="Enter Rise Delay (default=1.0e-9)" /></u5><u6 name="type">d_xor<field10 name="Enter Fall Delay (default=1.0e-9)" /><field11 name="Enter Input Load (default=1.0e-12)" /><field12 name="Enter Rise Delay (default=1.0e-9)" /></u6><u7 name="type">d_xor<field13 name="Enter Fall Delay (default=1.0e-9)" /><field14 name="Enter Input Load (default=1.0e-12)" /><field15 name="Enter Rise Delay (default=1.0e-9)" /></u7><u8 name="type">d_xor<field16 name="Enter Fall Delay (default=1.0e-9)" /><field17 name="Enter Input Load (default=1.0e-12)" /><field18 name="Enter Rise Delay (default=1.0e-9)" /></u8><u4 name="type">d_inverter<field19 name="Enter Fall Delay (default=1.0e-9)" /><field20 name="Enter Input Load (default=1.0e-12)" /><field21 name="Enter Rise Delay (default=1.0e-9)" /></u4><u9 name="type">adc_bridge<field22 name="Enter Fall Delay (default=1.0e-9)" /><field23 name="Enter value for in_high (default=2.0)" /><field24 name="Enter Rise Delay (default=1.0e-9)" /><field25 name="Enter value for in_low (default=1.0)" /></u9></model><devicemodel /><subcircuit><x8><field>/home/mallikarjuna/Downloads/eSim-1.1.2/src/SubcircuitLibrary/MUX</field></x8><x9><field>/home/mallikarjuna/Downloads/eSim-1.1.2/src/SubcircuitLibrary/MUX</field></x9><x2><field>/home/mallikarjuna/Downloads/eSim-1.1.2/src/SubcircuitLibrary/LOGIC_ADDER</field></x2><x3><field>/home/mallikarjuna/Downloads/eSim-1.1.2/src/SubcircuitLibrary/LOGIC_ADDER</field></x3><x1><field>/home/mallikarjuna/Downloads/eSim-1.1.2/src/SubcircuitLibrary/LOGIC_ADDER</field></x1><x6><field>/home/mallikarjuna/Downloads/eSim-1.1.2/src/SubcircuitLibrary/MUX</field></x6><x7><field>/home/mallikarjuna/Downloads/eSim-1.1.2/src/SubcircuitLibrary/MUX</field></x7><x4><field>/home/mallikarjuna/Downloads/eSim-1.1.2/src/SubcircuitLibrary/LOGIC_ADDER</field></x4><x5><field>/home/mallikarjuna/Downloads/eSim-1.1.2/src/SubcircuitLibrary/MUX</field></x5></subcircuit><analysis><ac><field1 name="Lin">true</field1><field2 name="Dec">false</field2><field3 name="Oct">false</field3><field4 name="Start Frequency" /><field5 name="Stop Frequency" /><field6 name="No. of points" /><field7 name="Start Fre Combo">Hz</field7><field8 name="Stop Fre Combo">Hz</field8></ac><dc><field1 name="Source 1" /><field2 name="Start" /><field3 name="Increment" /><field4 name="Stop" /><field5 name="Operating Point">0</field5><field6 name="Start Combo">Volts or Amperes</field6><field7 name="Increment Combo">Volts or Amperes</field7><field8 name="Stop Combo">Volts or Amperes</field8><field9 name="Source 2" /><field10 name="Start" /><field11 name="Increment" /><field12 name="Stop" /><field13 name="Start Combo">Volts or Amperes</field13><field14 name="Increment Combo">Volts or Amperes</field14><field15 name="Stop Combo">Volts or Amperes</field15></dc><tran><field1 name="Start Time" /><field2 name="Step Time" /><field3 name="Stop Time" /><field4 name="Start Combo">Sec</field4><field5 name="Step Combo">Sec</field5><field6 name="Stop Combo">Sec</field6></tran></analysis></KicadtoNgspice>
\ No newline at end of file
diff --git a/src/SubcircuitLibrary/CSLA_BEC1_logic/LOGIC_ADDER-cache.lib b/src/SubcircuitLibrary/CSLA_BEC1_logic/LOGIC_ADDER-cache.lib
deleted file mode 100644
index 34588988..00000000
--- a/src/SubcircuitLibrary/CSLA_BEC1_logic/LOGIC_ADDER-cache.lib
+++ /dev/null
@@ -1,82 +0,0 @@
-EESchema-LIBRARY Version 2.3

-#encoding utf-8

-#

-# PORT

-#

-DEF PORT U 0 40 Y Y 8 F N

-F0 "U" 50 100 30 H V C CNN

-F1 "PORT" 0 0 30 H V C CNN

-F2 "" 0 0 60 H V C CNN

-F3 "" 0 0 60 H V C CNN

-DRAW

-A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0

-A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50

-S -100 50 100 -50 0 1 0 N

-X ~ 1 250 0 100 L 30 30 1 1 B

-X ~ 2 250 0 100 L 30 30 2 1 B

-X ~ 3 250 0 100 L 30 30 3 1 B

-X ~ 4 250 0 100 L 30 30 4 1 B

-X ~ 5 250 0 100 L 30 30 5 1 B

-X ~ 6 250 0 100 L 30 30 6 1 B

-X ~ 7 250 0 100 L 30 30 7 1 B

-X ~ 8 250 0 100 L 30 30 8 1 B

-ENDDRAW

-ENDDEF

-#

-# d_and

-#

-DEF d_and U 0 40 Y Y 1 F N

-F0 "U" 0 0 60 H V C CNN

-F1 "d_and" 50 100 60 H V C CNN

-F2 "" 0 0 60 H V C CNN

-F3 "" 0 0 60 H V C CNN

-DRAW

-A 149 50 100 -894 0 0 1 0 N 150 -50 250 50

-A 150 49 100 6 900 0 1 0 N 250 50 150 150

-P 4 0 1 0  150 -50  -250 -50  -250 150  150 150 N

-X IN1 1 -450 100 200 R 50 50 1 1 I

-X IN2 2 -450 0 200 R 50 50 1 1 I

-X OUT 3 450 50 200 L 50 50 1 1 O

-ENDDRAW

-ENDDEF

-#

-# d_or

-#

-DEF d_or U 0 40 Y Y 1 F N

-F0 "U" 0 0 60 H V C CNN

-F1 "d_or" 0 100 60 H V C CNN

-F2 "" 0 0 60 H V C CNN

-F3 "" 0 0 60 H V C CNN

-DRAW

-A -450 50 224 266 -266 0 1 0 N -250 150 -250 -50

-A -25 -124 325 574 323 0 1 0 N 150 150 250 50

-A 74 125 191 -665 -231 0 1 0 N 150 -50 250 50

-P 2 0 1 0  -250 -50  150 -50 N

-P 2 0 1 0  -250 150  150 150 N

-X IN1 1 -450 100 215 R 50 50 1 1 I

-X IN2 2 -450 0 215 R 50 50 1 1 I

-X OUT 3 450 50 200 L 50 50 1 1 O

-ENDDRAW

-ENDDEF

-#

-# d_xor

-#

-DEF d_xor U 0 40 Y Y 1 F N

-F0 "U" 0 0 60 H V C CNN

-F1 "d_xor" 50 100 47 H V C CNN

-F2 "" 0 0 60 H V C CNN

-F3 "" 0 0 60 H V C CNN

-DRAW

-A -450 50 224 266 -266 0 1 0 N -250 150 -250 -50

-A -350 50 180 -337 337 0 1 0 N -200 -50 -200 150

-A -25 -124 325 574 323 0 1 0 N 150 150 250 50

-A 74 125 191 -665 -231 0 1 0 N 150 -50 250 50

-P 2 0 1 0  150 -50  -200 -50 N

-P 2 0 1 0  150 150  -200 150 N

-X IN1 1 -450 100 215 R 50 43 1 1 I

-X IN2 2 -450 0 215 R 50 43 1 1 I

-X OUT 3 450 50 200 L 50 39 1 1 O

-ENDDRAW

-ENDDEF

-#

-#End Library

diff --git a/src/SubcircuitLibrary/CSLA_BEC1_logic/LOGIC_ADDER.cir b/src/SubcircuitLibrary/CSLA_BEC1_logic/LOGIC_ADDER.cir
deleted file mode 100644
index ec177d39..00000000
--- a/src/SubcircuitLibrary/CSLA_BEC1_logic/LOGIC_ADDER.cir
+++ /dev/null
@@ -1,16 +0,0 @@
-* C:\eSim\eSim\src\SubcircuitLibrary\LOGIC_ADDER\LOGIC_ADDER.cir

-

-* EESchema Netlist Version 1.1 (Spice format) creation date: 3/24/2018 7:23:20 PM

-

-* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N

-* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0

-

-* Sheet Name: /

-U2  A B Net-_U2-Pad3_ d_and		

-U4  Net-_U3-Pad3_ CIN Net-_U4-Pad3_ d_and		

-U3  A B Net-_U3-Pad3_ d_xor		

-U5  Net-_U3-Pad3_ CIN SUM d_xor		

-U6  Net-_U2-Pad3_ Net-_U4-Pad3_ CARRY d_or		

-U1  A B CIN SUM CARRY PORT		

-

-.end

diff --git a/src/SubcircuitLibrary/CSLA_BEC1_logic/LOGIC_ADDER.cir.out b/src/SubcircuitLibrary/CSLA_BEC1_logic/LOGIC_ADDER.cir.out
deleted file mode 100644
index df9bcde6..00000000
--- a/src/SubcircuitLibrary/CSLA_BEC1_logic/LOGIC_ADDER.cir.out
+++ /dev/null
@@ -1,32 +0,0 @@
-* c:\esim\esim\src\subcircuitlibrary\logic_adder\logic_adder.cir

-

-* u2  a b net-_u2-pad3_ d_and

-* u4  net-_u3-pad3_ cin net-_u4-pad3_ d_and

-* u3  a b net-_u3-pad3_ d_xor

-* u5  net-_u3-pad3_ cin sum d_xor

-* u6  net-_u2-pad3_ net-_u4-pad3_ carry d_or

-* u1  a b cin sum carry port

-a1 [a b ] net-_u2-pad3_ u2

-a2 [net-_u3-pad3_ cin ] net-_u4-pad3_ u4

-a3 [a b ] net-_u3-pad3_ u3

-a4 [net-_u3-pad3_ cin ] sum u5

-a5 [net-_u2-pad3_ net-_u4-pad3_ ] carry u6

-* Schematic Name: d_and, NgSpice Name: d_and

-.model u2 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 

-* Schematic Name: d_and, NgSpice Name: d_and

-.model u4 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 

-* Schematic Name: d_xor, NgSpice Name: d_xor

-.model u3 d_xor(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 

-* Schematic Name: d_xor, NgSpice Name: d_xor

-.model u5 d_xor(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 

-* Schematic Name: d_or, NgSpice Name: d_or

-.model u6 d_or(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 

-.tran 10e-03 100e-03 0e-00

-

-* Control Statements 

-.control

-run

-print allv > plot_data_v.txt

-print alli > plot_data_i.txt

-.endc

-.end

diff --git a/src/SubcircuitLibrary/CSLA_BEC1_logic/LOGIC_ADDER.pro b/src/SubcircuitLibrary/CSLA_BEC1_logic/LOGIC_ADDER.pro
deleted file mode 100644
index a2b9fa1f..00000000
--- a/src/SubcircuitLibrary/CSLA_BEC1_logic/LOGIC_ADDER.pro
+++ /dev/null
@@ -1,44 +0,0 @@
-update=Sat Jun  8 13:01:54 2019
-version=1
-last_client=eeschema
-[general]
-version=1
-RootSch=
-BoardNm=
-[pcbnew]
-version=1
-LastNetListRead=
-UseCmpFile=1
-PadDrill=0.600000000000
-PadDrillOvalY=0.600000000000
-PadSizeH=1.500000000000
-PadSizeV=1.500000000000
-PcbTextSizeV=1.500000000000
-PcbTextSizeH=1.500000000000
-PcbTextThickness=0.300000000000
-ModuleTextSizeV=1.000000000000
-ModuleTextSizeH=1.000000000000
-ModuleTextSizeThickness=0.150000000000
-SolderMaskClearance=0.000000000000
-SolderMaskMinWidth=0.000000000000
-DrawSegmentWidth=0.200000000000
-BoardOutlineThickness=0.100000000000
-ModuleOutlineThickness=0.150000000000
-[cvpcb]
-version=1
-NetIExt=net
-[eeschema]
-version=1
-LibDir=../../../kicadSchematicLibrary
-[eeschema/libraries]
-LibName1=/home/mallikarjuna/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_Analog
-LibName2=/home/mallikarjuna/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_Devices
-LibName3=/home/mallikarjuna/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_Digital
-LibName4=/home/mallikarjuna/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_Hybrid
-LibName5=/home/mallikarjuna/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_Miscellaneous
-LibName6=/home/mallikarjuna/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_PSpice
-LibName7=/home/mallikarjuna/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_Plot
-LibName8=/home/mallikarjuna/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_Power
-LibName9=/home/mallikarjuna/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_Sources
-LibName10=/home/mallikarjuna/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_Subckt
-LibName11=/home/mallikarjuna/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_User
diff --git a/src/SubcircuitLibrary/CSLA_BEC1_logic/LOGIC_ADDER.sch b/src/SubcircuitLibrary/CSLA_BEC1_logic/LOGIC_ADDER.sch
deleted file mode 100644
index d39a1b78..00000000
--- a/src/SubcircuitLibrary/CSLA_BEC1_logic/LOGIC_ADDER.sch
+++ /dev/null
@@ -1,245 +0,0 @@
-EESchema Schematic File Version 2

-LIBS:power

-LIBS:device

-LIBS:transistors

-LIBS:conn

-LIBS:linear

-LIBS:regul

-LIBS:74xx

-LIBS:cmos4000

-LIBS:adc-dac

-LIBS:memory

-LIBS:xilinx

-LIBS:microcontrollers

-LIBS:dsp

-LIBS:microchip

-LIBS:analog_switches

-LIBS:motorola

-LIBS:texas

-LIBS:intel

-LIBS:audio

-LIBS:interface

-LIBS:digital-audio

-LIBS:philips

-LIBS:display

-LIBS:cypress

-LIBS:siliconi

-LIBS:opto

-LIBS:atmel

-LIBS:contrib

-LIBS:valves

-LIBS:eSim_Analog

-LIBS:eSim_Devices

-LIBS:eSim_Digital

-LIBS:eSim_Hybrid

-LIBS:eSim_Miscellaneous

-LIBS:eSim_Plot

-LIBS:eSim_Power

-LIBS:eSim_Sources

-LIBS:eSim_Subckt

-LIBS:eSim_User

-LIBS:LOGIC_ADDER-cache

-EELAYER 25 0

-EELAYER END

-$Descr A4 11693 8268

-encoding utf-8

-Sheet 1 1

-Title ""

-Date ""

-Rev ""

-Comp ""

-Comment1 ""

-Comment2 ""

-Comment3 ""

-Comment4 ""

-$EndDescr

-$Comp

-L d_and U2

-U 1 1 5AB647D1

-P 4100 2200

-F 0 "U2" H 4100 2200 60  0000 C CNN

-F 1 "d_and" H 4150 2300 60  0000 C CNN

-F 2 "" H 4100 2200 60  0000 C CNN

-F 3 "" H 4100 2200 60  0000 C CNN

-	1    4100 2200

-	1    0    0    -1  

-$EndComp

-$Comp

-L d_and U4

-U 1 1 5AB648AD

-P 5250 2300

-F 0 "U4" H 5250 2300 60  0000 C CNN

-F 1 "d_and" H 5300 2400 60  0000 C CNN

-F 2 "" H 5250 2300 60  0000 C CNN

-F 3 "" H 5250 2300 60  0000 C CNN

-	1    5250 2300

-	1    0    0    -1  

-$EndComp

-$Comp

-L d_xor U3

-U 1 1 5AB648E7

-P 4100 2750

-F 0 "U3" H 4100 2750 60  0000 C CNN

-F 1 "d_xor" H 4150 2850 47  0000 C CNN

-F 2 "" H 4100 2750 60  0000 C CNN

-F 3 "" H 4100 2750 60  0000 C CNN

-	1    4100 2750

-	1    0    0    -1  

-$EndComp

-$Comp

-L d_xor U5

-U 1 1 5AB6498F

-P 5250 2600

-F 0 "U5" H 5250 2600 60  0000 C CNN

-F 1 "d_xor" H 5300 2700 47  0000 C CNN

-F 2 "" H 5250 2600 60  0000 C CNN

-F 3 "" H 5250 2600 60  0000 C CNN

-	1    5250 2600

-	1    0    0    -1  

-$EndComp

-$Comp

-L d_or U6

-U 1 1 5AB64A11

-P 6250 2250

-F 0 "U6" H 6250 2250 60  0000 C CNN

-F 1 "d_or" H 6250 2350 60  0000 C CNN

-F 2 "" H 6250 2250 60  0000 C CNN

-F 3 "" H 6250 2250 60  0000 C CNN

-	1    6250 2250

-	1    0    0    -1  

-$EndComp

-$Comp

-L PORT U1

-U 1 1 5AB64A78

-P 2650 2100

-F 0 "U1" H 2700 2200 30  0000 C CNN

-F 1 "PORT" H 2650 2100 30  0000 C CNN

-F 2 "" H 2650 2100 60  0000 C CNN

-F 3 "" H 2650 2100 60  0000 C CNN

-	1    2650 2100

-	1    0    0    -1  

-$EndComp

-$Comp

-L PORT U1

-U 2 1 5AB64BE9

-P 2650 2300

-F 0 "U1" H 2700 2400 30  0000 C CNN

-F 1 "PORT" H 2650 2300 30  0000 C CNN

-F 2 "" H 2650 2300 60  0000 C CNN

-F 3 "" H 2650 2300 60  0000 C CNN

-	2    2650 2300

-	1    0    0    -1  

-$EndComp

-$Comp

-L PORT U1

-U 4 1 5AB64C18

-P 6300 2550

-F 0 "U1" H 6350 2650 30  0000 C CNN

-F 1 "PORT" H 6300 2550 30  0000 C CNN

-F 2 "" H 6300 2550 60  0000 C CNN

-F 3 "" H 6300 2550 60  0000 C CNN

-	4    6300 2550

-	-1   0    0    1   

-$EndComp

-$Comp

-L PORT U1

-U 3 1 5AB64C59

-P 2650 2900

-F 0 "U1" H 2700 3000 30  0000 C CNN

-F 1 "PORT" H 2650 2900 30  0000 C CNN

-F 2 "" H 2650 2900 60  0000 C CNN

-F 3 "" H 2650 2900 60  0000 C CNN

-	3    2650 2900

-	1    0    0    -1  

-$EndComp

-$Comp

-L PORT U1

-U 5 1 5AB64C94

-P 7150 2200

-F 0 "U1" H 7200 2300 30  0000 C CNN

-F 1 "PORT" H 7150 2200 30  0000 C CNN

-F 2 "" H 7150 2200 60  0000 C CNN

-F 3 "" H 7150 2200 60  0000 C CNN

-	5    7150 2200

-	-1   0    0    1   

-$EndComp

-Wire Wire Line

-	2900 2100 3650 2100

-Wire Wire Line

-	2900 2250 3650 2250

-Wire Wire Line

-	3650 2250 3650 2200

-Wire Wire Line

-	3400 2100 3400 2650

-Wire Wire Line

-	3400 2650 3650 2650

-Connection ~ 3400 2100

-Wire Wire Line

-	3150 2250 3150 2750

-Wire Wire Line

-	3150 2750 3650 2750

-Connection ~ 3150 2250

-Wire Wire Line

-	4550 2700 4550 2500

-Wire Wire Line

-	4550 2500 4800 2500

-Wire Wire Line

-	2900 2900 4800 2900

-Wire Wire Line

-	4800 2900 4800 2600

-Wire Wire Line

-	4700 2500 4700 2200

-Wire Wire Line

-	4700 2200 4800 2200

-Connection ~ 4700 2500

-Wire Wire Line

-	4800 2300 4600 2300

-Wire Wire Line

-	4600 2300 4600 2900

-Connection ~ 4600 2900

-Wire Wire Line

-	5700 2250 5800 2250

-Wire Wire Line

-	4550 2150 4550 2000

-Wire Wire Line

-	4550 2000 5800 2000

-Wire Wire Line

-	5800 2000 5800 2150

-Wire Wire Line

-	5700 2550 6050 2550

-Wire Wire Line

-	6700 2200 6900 2200

-Wire Wire Line

-	2900 2250 2900 2300

-Text GLabel 3000 1850 0    60   Input ~ 0

-A

-Text GLabel 3000 2500 0    60   Input ~ 0

-B

-Text GLabel 3000 3250 0    60   Input ~ 0

-CIN

-Wire Wire Line

-	3000 3250 3050 3250

-Wire Wire Line

-	3050 3250 3050 2900

-Connection ~ 3050 2900

-Wire Wire Line

-	3000 1850 3100 1850

-Wire Wire Line

-	3100 1850 3100 2100

-Connection ~ 3100 2100

-Wire Wire Line

-	3000 2500 3000 2250

-Connection ~ 3000 2250

-Text GLabel 6750 1700 0    60   Output ~ 0

-CARRY

-Text GLabel 5950 2800 0    60   Output ~ 0

-SUM

-Wire Wire Line

-	6750 1700 6800 1700

-Wire Wire Line

-	6800 1700 6800 2200

-Connection ~ 6800 2200

-Wire Wire Line

-	5950 2550 5950 2800

-Connection ~ 5950 2550

-$EndSCHEMATC

diff --git a/src/SubcircuitLibrary/CSLA_BEC1_logic/LOGIC_ADDER.sub b/src/SubcircuitLibrary/CSLA_BEC1_logic/LOGIC_ADDER.sub
deleted file mode 100644
index a1e1cfac..00000000
--- a/src/SubcircuitLibrary/CSLA_BEC1_logic/LOGIC_ADDER.sub
+++ /dev/null
@@ -1,26 +0,0 @@
-* Subcircuit LOGIC_ADDER

-.subckt LOGIC_ADDER a b cin sum carry 

-* c:\esim\esim\src\subcircuitlibrary\logic_adder\logic_adder.cir

-* u2  a b net-_u2-pad3_ d_and

-* u4  net-_u3-pad3_ cin net-_u4-pad3_ d_and

-* u3  a b net-_u3-pad3_ d_xor

-* u5  net-_u3-pad3_ cin sum d_xor

-* u6  net-_u2-pad3_ net-_u4-pad3_ carry d_or

-a1 [a b ] net-_u2-pad3_ u2

-a2 [net-_u3-pad3_ cin ] net-_u4-pad3_ u4

-a3 [a b ] net-_u3-pad3_ u3

-a4 [net-_u3-pad3_ cin ] sum u5

-a5 [net-_u2-pad3_ net-_u4-pad3_ ] carry u6

-* Schematic Name: d_and, NgSpice Name: d_and

-.model u2 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )

-* Schematic Name: d_and, NgSpice Name: d_and

-.model u4 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )

-* Schematic Name: d_xor, NgSpice Name: d_xor

-.model u3 d_xor(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )

-* Schematic Name: d_xor, NgSpice Name: d_xor

-.model u5 d_xor(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )

-* Schematic Name: d_or, NgSpice Name: d_or

-.model u6 d_or(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )

-* Control Statements

-

-.ends LOGIC_ADDER
\ No newline at end of file
diff --git a/src/SubcircuitLibrary/CSLA_BEC1_logic/LOGIC_ADDER_Previous_Values.xml b/src/SubcircuitLibrary/CSLA_BEC1_logic/LOGIC_ADDER_Previous_Values.xml
deleted file mode 100644
index ab59f216..00000000
--- a/src/SubcircuitLibrary/CSLA_BEC1_logic/LOGIC_ADDER_Previous_Values.xml
+++ /dev/null
@@ -1 +0,0 @@
-<KicadtoNgspice><source /><model><u2 name="type">d_and<field1 name="Enter Fall Delay (default=1.0e-9)" /><field2 name="Enter Input Load (default=1.0e-12)" /><field3 name="Enter Rise Delay (default=1.0e-9)" /></u2><u4 name="type">d_and<field4 name="Enter Fall Delay (default=1.0e-9)" /><field5 name="Enter Input Load (default=1.0e-12)" /><field6 name="Enter Rise Delay (default=1.0e-9)" /></u4><u3 name="type">d_xor<field7 name="Enter Fall Delay (default=1.0e-9)" /><field8 name="Enter Input Load (default=1.0e-12)" /><field9 name="Enter Rise Delay (default=1.0e-9)" /></u3><u5 name="type">d_xor<field10 name="Enter Fall Delay (default=1.0e-9)" /><field11 name="Enter Input Load (default=1.0e-12)" /><field12 name="Enter Rise Delay (default=1.0e-9)" /></u5><u6 name="type">d_or<field13 name="Enter Fall Delay (default=1.0e-9)" /><field14 name="Enter Input Load (default=1.0e-12)" /><field15 name="Enter Rise Delay (default=1.0e-9)" /></u6></model><devicemodel /><subcircuit /><analysis><ac><field1 name="Lin">true</field1><field2 name="Dec">false</field2><field3 name="Oct">false</field3><field4 name="Start Frequency" /><field5 name="Stop Frequency" /><field6 name="No. of points" /><field7 name="Start Fre Combo">Hz</field7><field8 name="Stop Fre Combo">Hz</field8></ac><dc><field1 name="Source 1" /><field2 name="Start" /><field3 name="Increment" /><field4 name="Stop" /><field5 name="Operating Point">0</field5><field6 name="Start Combo">Volts or Amperes</field6><field7 name="Increment Combo">Volts or Amperes</field7><field8 name="Stop Combo">Volts or Amperes</field8><field9 name="Source 2" /><field10 name="Start" /><field11 name="Increment" /><field12 name="Stop" /><field13 name="Start Combo">Volts or Amperes</field13><field14 name="Increment Combo">Volts or Amperes</field14><field15 name="Stop Combo">Volts or Amperes</field15></dc><tran><field1 name="Start Time">0</field1><field2 name="Step Time">10</field2><field3 name="Stop Time">100</field3><field4 name="Start Combo">Sec</field4><field5 name="Step Combo">ms</field5><field6 name="Stop Combo">ms</field6></tran></analysis></KicadtoNgspice>
\ No newline at end of file
diff --git a/src/SubcircuitLibrary/CSLA_BEC1_logic/MUX-cache.lib b/src/SubcircuitLibrary/CSLA_BEC1_logic/MUX-cache.lib
deleted file mode 100644
index 9fa4b3f9..00000000
--- a/src/SubcircuitLibrary/CSLA_BEC1_logic/MUX-cache.lib
+++ /dev/null
@@ -1,76 +0,0 @@
-EESchema-LIBRARY Version 2.3

-#encoding utf-8

-#

-# PORT

-#

-DEF PORT U 0 40 Y Y 8 F N

-F0 "U" 50 100 30 H V C CNN

-F1 "PORT" 0 0 30 H V C CNN

-F2 "" 0 0 60 H V C CNN

-F3 "" 0 0 60 H V C CNN

-DRAW

-A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0

-A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50

-S -100 50 100 -50 0 1 0 N

-X ~ 1 250 0 100 L 30 30 1 1 B

-X ~ 2 250 0 100 L 30 30 2 1 B

-X ~ 3 250 0 100 L 30 30 3 1 B

-X ~ 4 250 0 100 L 30 30 4 1 B

-X ~ 5 250 0 100 L 30 30 5 1 B

-X ~ 6 250 0 100 L 30 30 6 1 B

-X ~ 7 250 0 100 L 30 30 7 1 B

-X ~ 8 250 0 100 L 30 30 8 1 B

-ENDDRAW

-ENDDEF

-#

-# d_and

-#

-DEF d_and U 0 40 Y Y 1 F N

-F0 "U" 0 0 60 H V C CNN

-F1 "d_and" 50 100 60 H V C CNN

-F2 "" 0 0 60 H V C CNN

-F3 "" 0 0 60 H V C CNN

-DRAW

-A 149 50 100 -894 0 0 1 0 N 150 -50 250 50

-A 150 49 100 6 900 0 1 0 N 250 50 150 150

-P 4 0 1 0  150 -50  -250 -50  -250 150  150 150 N

-X IN1 1 -450 100 200 R 50 50 1 1 I

-X IN2 2 -450 0 200 R 50 50 1 1 I

-X OUT 3 450 50 200 L 50 50 1 1 O

-ENDDRAW

-ENDDEF

-#

-# d_inverter

-#

-DEF d_inverter U 0 40 Y Y 1 F N

-F0 "U" 0 -100 60 H V C CNN

-F1 "d_inverter" 0 150 60 H V C CNN

-F2 "" 50 -50 60 H V C CNN

-F3 "" 50 -50 60 H V C CNN

-DRAW

-P 4 0 1 0  -100 50  -100 -50  100 0  -100 50 N

-X ~ 1 -300 0 200 R 50 50 1 1 I

-X ~ 2 300 0 200 L 50 50 1 1 O I

-ENDDRAW

-ENDDEF

-#

-# d_or

-#

-DEF d_or U 0 40 Y Y 1 F N

-F0 "U" 0 0 60 H V C CNN

-F1 "d_or" 0 100 60 H V C CNN

-F2 "" 0 0 60 H V C CNN

-F3 "" 0 0 60 H V C CNN

-DRAW

-A -450 50 224 266 -266 0 1 0 N -250 150 -250 -50

-A -25 -124 325 574 323 0 1 0 N 150 150 250 50

-A 74 125 191 -665 -231 0 1 0 N 150 -50 250 50

-P 2 0 1 0  -250 -50  150 -50 N

-P 2 0 1 0  -250 150  150 150 N

-X IN1 1 -450 100 215 R 50 50 1 1 I

-X IN2 2 -450 0 215 R 50 50 1 1 I

-X OUT 3 450 50 200 L 50 50 1 1 O

-ENDDRAW

-ENDDEF

-#

-#End Library

diff --git a/src/SubcircuitLibrary/CSLA_BEC1_logic/MUX.cir b/src/SubcircuitLibrary/CSLA_BEC1_logic/MUX.cir
deleted file mode 100644
index 8d97f9a1..00000000
--- a/src/SubcircuitLibrary/CSLA_BEC1_logic/MUX.cir
+++ /dev/null
@@ -1,15 +0,0 @@
-* C:\eSim\eSim\src\SubcircuitLibrary\MUX\MUX.cir

-

-* EESchema Netlist Version 1.1 (Spice format) creation date: 3/24/2018 7:29:10 PM

-

-* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N

-* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0

-

-* Sheet Name: /

-U3  Net-_U1-Pad2_ Net-_U2-Pad2_ Net-_U3-Pad3_ d_and		

-U4  Net-_U1-Pad1_ Net-_U1-Pad3_ Net-_U4-Pad3_ d_and		

-U5  Net-_U3-Pad3_ Net-_U4-Pad3_ Net-_U1-Pad4_ d_or		

-U2  Net-_U1-Pad1_ Net-_U2-Pad2_ d_inverter		

-U1  Net-_U1-Pad1_ Net-_U1-Pad2_ Net-_U1-Pad3_ Net-_U1-Pad4_ PORT		

-

-.end

diff --git a/src/SubcircuitLibrary/CSLA_BEC1_logic/MUX.cir.out b/src/SubcircuitLibrary/CSLA_BEC1_logic/MUX.cir.out
deleted file mode 100644
index 342293e7..00000000
--- a/src/SubcircuitLibrary/CSLA_BEC1_logic/MUX.cir.out
+++ /dev/null
@@ -1,28 +0,0 @@
-* c:\esim\esim\src\subcircuitlibrary\mux\mux.cir

-

-* u3  net-_u1-pad2_ net-_u2-pad2_ net-_u3-pad3_ d_and

-* u4  net-_u1-pad1_ net-_u1-pad3_ net-_u4-pad3_ d_and

-* u5  net-_u3-pad3_ net-_u4-pad3_ net-_u1-pad4_ d_or

-* u2  net-_u1-pad1_ net-_u2-pad2_ d_inverter

-* u1  net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ port

-a1 [net-_u1-pad2_ net-_u2-pad2_ ] net-_u3-pad3_ u3

-a2 [net-_u1-pad1_ net-_u1-pad3_ ] net-_u4-pad3_ u4

-a3 [net-_u3-pad3_ net-_u4-pad3_ ] net-_u1-pad4_ u5

-a4 net-_u1-pad1_ net-_u2-pad2_ u2

-* Schematic Name: d_and, NgSpice Name: d_and

-.model u3 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 

-* Schematic Name: d_and, NgSpice Name: d_and

-.model u4 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 

-* Schematic Name: d_or, NgSpice Name: d_or

-.model u5 d_or(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 

-* Schematic Name: d_inverter, NgSpice Name: d_inverter

-.model u2 d_inverter(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 

-.tran 10e-03 100e-03 0e-00

-

-* Control Statements 

-.control

-run

-print allv > plot_data_v.txt

-print alli > plot_data_i.txt

-.endc

-.end

diff --git a/src/SubcircuitLibrary/CSLA_BEC1_logic/MUX.pro b/src/SubcircuitLibrary/CSLA_BEC1_logic/MUX.pro
deleted file mode 100644
index 07f53b67..00000000
--- a/src/SubcircuitLibrary/CSLA_BEC1_logic/MUX.pro
+++ /dev/null
@@ -1,43 +0,0 @@
-update=Sat Jun  8 12:53:13 2019
-version=1
-last_client=eeschema
-[general]
-version=1
-RootSch=
-BoardNm=
-[pcbnew]
-version=1
-LastNetListRead=
-UseCmpFile=1
-PadDrill=0.600000000000
-PadDrillOvalY=0.600000000000
-PadSizeH=1.500000000000
-PadSizeV=1.500000000000
-PcbTextSizeV=1.500000000000
-PcbTextSizeH=1.500000000000
-PcbTextThickness=0.300000000000
-ModuleTextSizeV=1.000000000000
-ModuleTextSizeH=1.000000000000
-ModuleTextSizeThickness=0.150000000000
-SolderMaskClearance=0.000000000000
-SolderMaskMinWidth=0.000000000000
-DrawSegmentWidth=0.200000000000
-BoardOutlineThickness=0.100000000000
-ModuleOutlineThickness=0.150000000000
-[cvpcb]
-version=1
-NetIExt=net
-[eeschema]
-version=1
-LibDir=../../../kicadSchematicLibrary
-[eeschema/libraries]
-LibName1=/home/mallikarjuna/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_Analog
-LibName2=/home/mallikarjuna/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_Devices
-LibName3=/home/mallikarjuna/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_Digital
-LibName4=/home/mallikarjuna/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_Hybrid
-LibName5=/home/mallikarjuna/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_Miscellaneous
-LibName6=/home/mallikarjuna/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_Plot
-LibName7=/home/mallikarjuna/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_Power
-LibName8=/home/mallikarjuna/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_Sources
-LibName9=/home/mallikarjuna/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_Subckt
-LibName10=/home/mallikarjuna/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_User
diff --git a/src/SubcircuitLibrary/CSLA_BEC1_logic/MUX.sch b/src/SubcircuitLibrary/CSLA_BEC1_logic/MUX.sch
deleted file mode 100644
index eb095e0e..00000000
--- a/src/SubcircuitLibrary/CSLA_BEC1_logic/MUX.sch
+++ /dev/null
@@ -1,172 +0,0 @@
-EESchema Schematic File Version 2

-LIBS:power

-LIBS:device

-LIBS:transistors

-LIBS:conn

-LIBS:linear

-LIBS:regul

-LIBS:74xx

-LIBS:cmos4000

-LIBS:adc-dac

-LIBS:memory

-LIBS:xilinx

-LIBS:microcontrollers

-LIBS:dsp

-LIBS:microchip

-LIBS:analog_switches

-LIBS:motorola

-LIBS:texas

-LIBS:intel

-LIBS:audio

-LIBS:interface

-LIBS:digital-audio

-LIBS:philips

-LIBS:display

-LIBS:cypress

-LIBS:siliconi

-LIBS:opto

-LIBS:atmel

-LIBS:contrib

-LIBS:valves

-LIBS:eSim_Analog

-LIBS:eSim_Devices

-LIBS:eSim_Digital

-LIBS:eSim_Hybrid

-LIBS:eSim_Miscellaneous

-LIBS:eSim_Plot

-LIBS:eSim_Power

-LIBS:eSim_Sources

-LIBS:eSim_Subckt

-LIBS:eSim_User

-EELAYER 25 0

-EELAYER END

-$Descr A4 11693 8268

-encoding utf-8

-Sheet 1 1

-Title ""

-Date ""

-Rev ""

-Comp ""

-Comment1 ""

-Comment2 ""

-Comment3 ""

-Comment4 ""

-$EndDescr

-$Comp

-L d_and U3

-U 1 1 5AB62CE3

-P 5050 2550

-F 0 "U3" H 5050 2550 60  0000 C CNN

-F 1 "d_and" H 5100 2650 60  0000 C CNN

-F 2 "" H 5050 2550 60  0000 C CNN

-F 3 "" H 5050 2550 60  0000 C CNN

-	1    5050 2550

-	1    0    0    -1  

-$EndComp

-$Comp

-L d_and U4

-U 1 1 5AB62D59

-P 5050 3400

-F 0 "U4" H 5050 3400 60  0000 C CNN

-F 1 "d_and" H 5100 3500 60  0000 C CNN

-F 2 "" H 5050 3400 60  0000 C CNN

-F 3 "" H 5050 3400 60  0000 C CNN

-	1    5050 3400

-	1    0    0    -1  

-$EndComp

-$Comp

-L d_or U5

-U 1 1 5AB62DBD

-P 6300 2950

-F 0 "U5" H 6300 2950 60  0000 C CNN

-F 1 "d_or" H 6300 3050 60  0000 C CNN

-F 2 "" H 6300 2950 60  0000 C CNN

-F 3 "" H 6300 2950 60  0000 C CNN

-	1    6300 2950

-	1    0    0    -1  

-$EndComp

-Wire Wire Line

-	5500 2500 5550 2500

-Wire Wire Line

-	5550 2500 5550 2850

-Wire Wire Line

-	5550 2850 5850 2850

-Wire Wire Line

-	5500 3350 5550 3350

-Wire Wire Line

-	5550 3350 5550 2950

-Wire Wire Line

-	5550 2950 5850 2950

-$Comp

-L d_inverter U2

-U 1 1 5AB62FFA

-P 4200 2550

-F 0 "U2" H 4200 2450 60  0000 C CNN

-F 1 "d_inverter" H 4200 2700 60  0000 C CNN

-F 2 "" H 4250 2500 60  0000 C CNN

-F 3 "" H 4250 2500 60  0000 C CNN

-	1    4200 2550

-	1    0    0    -1  

-$EndComp

-Wire Wire Line

-	4500 2550 4600 2550

-$Comp

-L PORT U1

-U 1 1 5AB6307B

-P 3450 3300

-F 0 "U1" H 3500 3400 30  0000 C CNN

-F 1 "PORT" H 3450 3300 30  0000 C CNN

-F 2 "" H 3450 3300 60  0000 C CNN

-F 3 "" H 3450 3300 60  0000 C CNN

-	1    3450 3300

-	1    0    0    -1  

-$EndComp

-Wire Wire Line

-	3900 2550 3900 3300

-Wire Wire Line

-	3700 3300 4600 3300

-Connection ~ 3900 3300

-$Comp

-L PORT U1

-U 2 1 5AB631BF

-P 4100 2050

-F 0 "U1" H 4150 2150 30  0000 C CNN

-F 1 "PORT" H 4100 2050 30  0000 C CNN

-F 2 "" H 4100 2050 60  0000 C CNN

-F 3 "" H 4100 2050 60  0000 C CNN

-	2    4100 2050

-	1    0    0    -1  

-$EndComp

-Wire Wire Line

-	4350 2050 4600 2050

-Wire Wire Line

-	4600 2050 4600 2450

-$Comp

-L PORT U1

-U 3 1 5AB6340B

-P 4200 3850

-F 0 "U1" H 4250 3950 30  0000 C CNN

-F 1 "PORT" H 4200 3850 30  0000 C CNN

-F 2 "" H 4200 3850 60  0000 C CNN

-F 3 "" H 4200 3850 60  0000 C CNN

-	3    4200 3850

-	1    0    0    -1  

-$EndComp

-Wire Wire Line

-	4600 3400 4600 3850

-Wire Wire Line

-	4600 3850 4450 3850

-$Comp

-L PORT U1

-U 4 1 5AB63737

-P 7100 2900

-F 0 "U1" H 7150 3000 30  0000 C CNN

-F 1 "PORT" H 7100 2900 30  0000 C CNN

-F 2 "" H 7100 2900 60  0000 C CNN

-F 3 "" H 7100 2900 60  0000 C CNN

-	4    7100 2900

-	-1   0    0    1   

-$EndComp

-Wire Wire Line

-	6750 2900 6850 2900

-$EndSCHEMATC

diff --git a/src/SubcircuitLibrary/CSLA_BEC1_logic/MUX.sub b/src/SubcircuitLibrary/CSLA_BEC1_logic/MUX.sub
deleted file mode 100644
index 473dc907..00000000
--- a/src/SubcircuitLibrary/CSLA_BEC1_logic/MUX.sub
+++ /dev/null
@@ -1,22 +0,0 @@
-* Subcircuit MUX

-.subckt MUX net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ 

-* c:\esim\esim\src\subcircuitlibrary\mux\mux.cir

-* u3  net-_u1-pad2_ net-_u2-pad2_ net-_u3-pad3_ d_and

-* u4  net-_u1-pad1_ net-_u1-pad3_ net-_u4-pad3_ d_and

-* u5  net-_u3-pad3_ net-_u4-pad3_ net-_u1-pad4_ d_or

-* u2  net-_u1-pad1_ net-_u2-pad2_ d_inverter

-a1 [net-_u1-pad2_ net-_u2-pad2_ ] net-_u3-pad3_ u3

-a2 [net-_u1-pad1_ net-_u1-pad3_ ] net-_u4-pad3_ u4

-a3 [net-_u3-pad3_ net-_u4-pad3_ ] net-_u1-pad4_ u5

-a4 net-_u1-pad1_ net-_u2-pad2_ u2

-* Schematic Name: d_and, NgSpice Name: d_and

-.model u3 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )

-* Schematic Name: d_and, NgSpice Name: d_and

-.model u4 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )

-* Schematic Name: d_or, NgSpice Name: d_or

-.model u5 d_or(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )

-* Schematic Name: d_inverter, NgSpice Name: d_inverter

-.model u2 d_inverter(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )

-* Control Statements

-

-.ends MUX
\ No newline at end of file
diff --git a/src/SubcircuitLibrary/CSLA_BEC1_logic/MUX_Previous_Values.xml b/src/SubcircuitLibrary/CSLA_BEC1_logic/MUX_Previous_Values.xml
deleted file mode 100644
index 6f43d20b..00000000
--- a/src/SubcircuitLibrary/CSLA_BEC1_logic/MUX_Previous_Values.xml
+++ /dev/null
@@ -1 +0,0 @@
-<KicadtoNgspice><analysis><ac><field1 name="Lin">true</field1><field2 name="Dec">false</field2><field3 name="Oct">false</field3><field4 name="Start Frequency" /><field5 name="Stop Frequency" /><field6 name="No. of points" /><field7 name="Start Fre Combo">Hz</field7><field8 name="Stop Fre Combo">Hz</field8></ac><dc><field1 name="Source 1" /><field2 name="Start" /><field3 name="Increment" /><field4 name="Stop" /><field5 name="Operating Point">0</field5><field6 name="Start Combo">Volts or Amperes</field6><field7 name="Increment Combo">Volts or Amperes</field7><field8 name="Stop Combo">Volts or Amperes</field8><field9 name="Source 2" /><field10 name="Start" /><field11 name="Increment" /><field12 name="Stop" /><field13 name="Start Combo">Volts or Amperes</field13><field14 name="Increment Combo">Volts or Amperes</field14><field15 name="Stop Combo">Volts or Amperes</field15></dc><tran><field1 name="Start Time">0</field1><field2 name="Step Time">10</field2><field3 name="Stop Time">100</field3><field4 name="Start Combo">Sec</field4><field5 name="Step Combo">ms</field5><field6 name="Stop Combo">ms</field6></tran></analysis><source /><model><u3 name="type">d_and<field1 name="Enter Fall Delay (default=1.0e-9)" /><field2 name="Enter Input Load (default=1.0e-12)" /><field3 name="Enter Rise Delay (default=1.0e-9)" /></u3><u4 name="type">d_and<field4 name="Enter Fall Delay (default=1.0e-9)" /><field5 name="Enter Input Load (default=1.0e-12)" /><field6 name="Enter Rise Delay (default=1.0e-9)" /></u4><u5 name="type">d_or<field7 name="Enter Fall Delay (default=1.0e-9)" /><field8 name="Enter Input Load (default=1.0e-12)" /><field9 name="Enter Rise Delay (default=1.0e-9)" /></u5><u2 name="type">d_inverter<field10 name="Enter Fall Delay (default=1.0e-9)" /><field11 name="Enter Input Load (default=1.0e-12)" /><field12 name="Enter Rise Delay (default=1.0e-9)" /></u2></model><devicemodel /><subcircuit /></KicadtoNgspice>
\ No newline at end of file
diff --git a/src/SubcircuitLibrary/CSLA_BEC1_logic/analysis b/src/SubcircuitLibrary/CSLA_BEC1_logic/analysis
deleted file mode 100644
index ebd5c0a9..00000000
--- a/src/SubcircuitLibrary/CSLA_BEC1_logic/analysis
+++ /dev/null
@@ -1 +0,0 @@
-.tran 0e-00 0e-00 0e-00
\ No newline at end of file
diff --git a/src/SubcircuitLibrary/IB3858/IB3858-cache.lib b/src/SubcircuitLibrary/IB3858/IB3858-cache.lib
deleted file mode 100644
index df4966f4..00000000
--- a/src/SubcircuitLibrary/IB3858/IB3858-cache.lib
+++ /dev/null
@@ -1,79 +0,0 @@
-EESchema-LIBRARY Version 2.3
-#encoding utf-8
-#
-# PORT
-#
-DEF PORT U 0 40 Y Y 8 F N
-F0 "U" 50 100 30 H V C CNN
-F1 "PORT" 0 0 30 H V C CNN
-F2 "" 0 0 60 H V C CNN
-F3 "" 0 0 60 H V C CNN
-DRAW
-A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0
-A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50
-S -100 50 100 -50 0 1 0 N
-X ~ 1 250 0 100 L 30 30 1 1 B
-X ~ 2 250 0 100 L 30 30 2 1 B
-X ~ 3 250 0 100 L 30 30 3 1 B
-X ~ 4 250 0 100 L 30 30 4 1 B
-X ~ 5 250 0 100 L 30 30 5 1 B
-X ~ 6 250 0 100 L 30 30 6 1 B
-X ~ 7 250 0 100 L 30 30 7 1 B
-X ~ 8 250 0 100 L 30 30 8 1 B
-ENDDRAW
-ENDDEF
-#
-# eSim_C
-#
-DEF eSim_C C 0 10 N Y 1 F N
-F0 "C" 25 100 50 H V L CNN
-F1 "eSim_C" 25 -100 50 H V L CNN
-F2 "" 38 -150 30 H V C CNN
-F3 "" 0 0 60 H V C CNN
-$FPLIST
- C_*
-$ENDFPLIST
-DRAW
-P 2 0 1 20 -80 -30 80 -30 N
-P 2 0 1 20 -80 30 80 30 N
-X ~ 1 0 150 110 D 40 40 1 1 P
-X ~ 2 0 -150 110 U 40 40 1 1 P
-ENDDRAW
-ENDDEF
-#
-# eSim_L
-#
-DEF eSim_L L 0 40 N N 1 F N
-F0 "L" 1950 500 50 H V C CNN
-F1 "eSim_L" 1950 650 50 H V C CNN
-F2 "" 1950 550 60 V V C CNN
-F3 "" 1950 550 60 V V C CNN
-DRAW
-A 1802 550 48 11 1789 0 1 0 N 1849 551 1754 551
-A 1899 550 51 11 1789 0 1 0 N 1949 551 1848 551
-A 1999 550 51 11 1789 0 1 0 N 2049 551 1948 551
-A 2100 550 50 11 1789 0 1 0 N 2149 551 2050 551
-X 1 1 1650 550 100 R 70 70 1 1 P
-X 2 2 2250 550 100 L 70 70 1 1 P
-ENDDRAW
-ENDDEF
-#
-# eSim_R
-#
-DEF eSim_R R 0 0 N Y 1 F N
-F0 "R" 50 130 50 H V C CNN
-F1 "eSim_R" 50 50 50 H V C CNN
-F2 "" 50 -20 30 H V C CNN
-F3 "" 50 50 30 V V C CNN
-$FPLIST
- R_*
- Resistor_*
-$ENDFPLIST
-DRAW
-S 150 10 -50 90 0 1 10 N
-X ~ 1 -100 50 50 R 60 60 1 1 P
-X ~ 2 200 50 50 L 60 60 1 1 P
-ENDDRAW
-ENDDEF
-#
-#End Library
diff --git a/src/SubcircuitLibrary/IB3858/IB3858.cir b/src/SubcircuitLibrary/IB3858/IB3858.cir
deleted file mode 100644
index e89f69e1..00000000
--- a/src/SubcircuitLibrary/IB3858/IB3858.cir
+++ /dev/null
@@ -1,16 +0,0 @@
-* /home/bhargav/Downloads/eSim-1.1.2/src/SubcircuitLibrary/IB3858/IB3858.cir
-
-* EESchema Netlist Version 1.1 (Spice format) creation date: Mon Jun 24 16:30:15 2019
-
-* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N
-* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0
-
-* Sheet Name: /
-R1  Net-_R1-Pad1_ Net-_L1-Pad1_ 5.2		
-L1  Net-_L1-Pad1_ Net-_C1-Pad1_ 3.08m		
-L2  Net-_C1-Pad1_ Net-_C1-Pad2_ 61.100458m		
-C1  Net-_C1-Pad1_ Net-_C1-Pad2_ 896.8481u		
-R2  Net-_C1-Pad1_ Net-_C1-Pad2_ 73.6254		
-U1  Net-_R1-Pad1_ Net-_C1-Pad2_ PORT		
-
-.end
diff --git a/src/SubcircuitLibrary/IB3858/IB3858.cir.out b/src/SubcircuitLibrary/IB3858/IB3858.cir.out
deleted file mode 100644
index 3b84dfd6..00000000
--- a/src/SubcircuitLibrary/IB3858/IB3858.cir.out
+++ /dev/null
@@ -1,17 +0,0 @@
-* /home/bhargav/downloads/esim-1.1.2/src/subcircuitlibrary/ib3858/ib3858.cir
-
-r1  net-_r1-pad1_ net-_l1-pad1_ 5.2
-l1  net-_l1-pad1_ net-_c1-pad1_ 3.08m
-l2  net-_c1-pad1_ net-_c1-pad2_ 61.100458m
-c1  net-_c1-pad1_ net-_c1-pad2_ 896.8481u
-r2  net-_c1-pad1_ net-_c1-pad2_ 73.6254
-* u1  net-_r1-pad1_ net-_c1-pad2_ port
-.tran 0e-00 0e-00 0e-00
-
-* Control Statements 
-.control
-run
-print allv > plot_data_v.txt
-print alli > plot_data_i.txt
-.endc
-.end
diff --git a/src/SubcircuitLibrary/IB3858/IB3858.pro b/src/SubcircuitLibrary/IB3858/IB3858.pro
deleted file mode 100644
index 148e9ed5..00000000
--- a/src/SubcircuitLibrary/IB3858/IB3858.pro
+++ /dev/null
@@ -1,73 +0,0 @@
-update=22/05/2015 07:44:53
-version=1
-last_client=kicad
-[general]
-version=1
-RootSch=
-BoardNm=
-[pcbnew]
-version=1
-LastNetListRead=
-UseCmpFile=1
-PadDrill=0.600000000000
-PadDrillOvalY=0.600000000000
-PadSizeH=1.500000000000
-PadSizeV=1.500000000000
-PcbTextSizeV=1.500000000000
-PcbTextSizeH=1.500000000000
-PcbTextThickness=0.300000000000
-ModuleTextSizeV=1.000000000000
-ModuleTextSizeH=1.000000000000
-ModuleTextSizeThickness=0.150000000000
-SolderMaskClearance=0.000000000000
-SolderMaskMinWidth=0.000000000000
-DrawSegmentWidth=0.200000000000
-BoardOutlineThickness=0.100000000000
-ModuleOutlineThickness=0.150000000000
-[cvpcb]
-version=1
-NetIExt=net
-[eeschema]
-version=1
-LibDir=
-[eeschema/libraries]
-LibName1=adc-dac
-LibName2=memory
-LibName3=xilinx
-LibName4=microcontrollers
-LibName5=dsp
-LibName6=microchip
-LibName7=analog_switches
-LibName8=motorola
-LibName9=texas
-LibName10=intel
-LibName11=audio
-LibName12=interface
-LibName13=digital-audio
-LibName14=philips
-LibName15=display
-LibName16=cypress
-LibName17=siliconi
-LibName18=opto
-LibName19=atmel
-LibName20=contrib
-LibName21=power
-LibName22=device
-LibName23=transistors
-LibName24=conn
-LibName25=linear
-LibName26=regul
-LibName27=74xx
-LibName28=cmos4000
-LibName29=eSim_Analog
-LibName30=eSim_Devices
-LibName31=eSim_Digital
-LibName32=eSim_Hybrid
-LibName33=eSim_Miscellaneous
-LibName34=eSim_Power
-LibName35=eSim_Sources
-LibName36=eSim_Subckt
-LibName37=eSim_User
-LibName38=eSim_Plot
-LibName39=eSim_PSpice
-
diff --git a/src/SubcircuitLibrary/IB3858/IB3858.sch b/src/SubcircuitLibrary/IB3858/IB3858.sch
deleted file mode 100644
index bbc79e75..00000000
--- a/src/SubcircuitLibrary/IB3858/IB3858.sch
+++ /dev/null
@@ -1,157 +0,0 @@
-EESchema Schematic File Version 2
-LIBS:adc-dac
-LIBS:memory
-LIBS:xilinx
-LIBS:microcontrollers
-LIBS:dsp
-LIBS:microchip
-LIBS:analog_switches
-LIBS:motorola
-LIBS:texas
-LIBS:intel
-LIBS:audio
-LIBS:interface
-LIBS:digital-audio
-LIBS:philips
-LIBS:display
-LIBS:cypress
-LIBS:siliconi
-LIBS:opto
-LIBS:atmel
-LIBS:contrib
-LIBS:power
-LIBS:device
-LIBS:transistors
-LIBS:conn
-LIBS:linear
-LIBS:regul
-LIBS:74xx
-LIBS:cmos4000
-LIBS:eSim_Analog
-LIBS:eSim_Devices
-LIBS:eSim_Digital
-LIBS:eSim_Hybrid
-LIBS:eSim_Miscellaneous
-LIBS:eSim_Power
-LIBS:eSim_Sources
-LIBS:eSim_Subckt
-LIBS:eSim_User
-LIBS:eSim_Plot
-LIBS:eSim_PSpice
-LIBS:speaker-cache
-EELAYER 25 0
-EELAYER END
-$Descr A4 11693 8268
-encoding utf-8
-Sheet 1 1
-Title ""
-Date ""
-Rev ""
-Comp ""
-Comment1 ""
-Comment2 ""
-Comment3 ""
-Comment4 ""
-$EndDescr
-$Comp
-L eSim_R R1
-U 1 1 5D10AD49
-P 6050 3150
-F 0 "R1" H 6100 3280 50  0000 C CNN
-F 1 "5.2" H 6100 3200 50  0000 C CNN
-F 2 "" H 6100 3130 30  0000 C CNN
-F 3 "" V 6100 3200 30  0000 C CNN
-	1    6050 3150
-	1    0    0    -1  
-$EndComp
-$Comp
-L eSim_L L1
-U 1 1 5D10AD4A
-P 4800 3650
-F 0 "L1" H 6750 4150 50  0000 C CNN
-F 1 "3.08m" H 6750 4300 50  0000 C CNN
-F 2 "" V 6750 4200 60  0000 C CNN
-F 3 "" V 6750 4200 60  0000 C CNN
-	1    4800 3650
-	1    0    0    -1  
-$EndComp
-$Comp
-L eSim_L L2
-U 1 1 5D10AD4B
-P 7300 1750
-F 0 "L2" H 9250 2250 50  0000 C CNN
-F 1 "61.100458m" H 9250 2400 50  0000 C CNN
-F 2 "" V 9250 2300 60  0000 C CNN
-F 3 "" V 9250 2300 60  0000 C CNN
-	1    7300 1750
-	0    1    1    0   
-$EndComp
-$Comp
-L eSim_C C1
-U 1 1 5D10AD4C
-P 7350 3700
-F 0 "C1" H 7375 3800 50  0000 L CNN
-F 1 "896.8481u" H 7375 3600 50  0000 L CNN
-F 2 "" H 7388 3550 30  0000 C CNN
-F 3 "" H 7350 3700 60  0000 C CNN
-	1    7350 3700
-	1    0    0    -1  
-$EndComp
-$Comp
-L eSim_R R2
-U 1 1 5D10AD4D
-P 8450 3700
-F 0 "R2" H 8500 3830 50  0000 C CNN
-F 1 "73.6254" H 8500 3750 50  0000 C CNN
-F 2 "" H 8500 3680 30  0000 C CNN
-F 3 "" V 8500 3750 30  0000 C CNN
-	1    8450 3700
-	0    1    1    0   
-$EndComp
-Wire Wire Line
-	7350 3850 7350 4350
-Connection ~ 7850 4350
-Wire Wire Line
-	7850 4000 7850 4350
-Wire Wire Line
-	8500 4350 8500 3900
-Connection ~ 7850 3100
-Wire Wire Line
-	8500 3100 8500 3600
-Connection ~ 7350 3100
-Wire Wire Line
-	7850 3100 7850 3400
-Wire Wire Line
-	7350 3100 7350 3550
-Wire Wire Line
-	7050 3100 8500 3100
-Wire Wire Line
-	6250 3100 6450 3100
-Wire Wire Line
-	7050 4350 8500 4350
-$Comp
-L PORT U1
-U 1 1 5D10B0D2
-P 5250 3100
-F 0 "U1" H 5300 3200 30  0000 C CNN
-F 1 "PORT" H 5250 3100 30  0000 C CNN
-F 2 "" H 5250 3100 60  0000 C CNN
-F 3 "" H 5250 3100 60  0000 C CNN
-	1    5250 3100
-	1    0    0    -1  
-$EndComp
-$Comp
-L PORT U1
-U 2 1 5D10B10F
-P 6800 4350
-F 0 "U1" H 6850 4450 30  0000 C CNN
-F 1 "PORT" H 6800 4350 30  0000 C CNN
-F 2 "" H 6800 4350 60  0000 C CNN
-F 3 "" H 6800 4350 60  0000 C CNN
-	2    6800 4350
-	1    0    0    -1  
-$EndComp
-Wire Wire Line
-	5950 3100 5500 3100
-Connection ~ 7350 4350
-$EndSCHEMATC
diff --git a/src/SubcircuitLibrary/IB3858/IB3858.sub b/src/SubcircuitLibrary/IB3858/IB3858.sub
deleted file mode 100644
index cc9a9809..00000000
--- a/src/SubcircuitLibrary/IB3858/IB3858.sub
+++ /dev/null
@@ -1,11 +0,0 @@
-* Subcircuit IB3858
-.subckt IB3858 net-_r1-pad1_ net-_c1-pad2_ 
-* /home/bhargav/downloads/esim-1.1.2/src/subcircuitlibrary/ib3858/ib3858.cir
-r1  net-_r1-pad1_ net-_l1-pad1_ 5.2
-l1  net-_l1-pad1_ net-_c1-pad1_ 3.08m
-l2  net-_c1-pad1_ net-_c1-pad2_ 61.100458m
-c1  net-_c1-pad1_ net-_c1-pad2_ 896.8481u
-r2  net-_c1-pad1_ net-_c1-pad2_ 73.6254
-* Control Statements
-
-.ends IB3858
\ No newline at end of file
diff --git a/src/SubcircuitLibrary/IB3858/IB3858_Previous_Values.xml b/src/SubcircuitLibrary/IB3858/IB3858_Previous_Values.xml
deleted file mode 100644
index 56ce5d3f..00000000
--- a/src/SubcircuitLibrary/IB3858/IB3858_Previous_Values.xml
+++ /dev/null
@@ -1 +0,0 @@
-<KicadtoNgspice><analysis><ac><field1 name="Lin">true</field1><field2 name="Dec">false</field2><field3 name="Oct">false</field3><field4 name="Start Frequency" /><field5 name="Stop Frequency" /><field6 name="No. of points" /><field7 name="Start Fre Combo">Hz</field7><field8 name="Stop Fre Combo">Hz</field8></ac><dc><field1 name="Source 1" /><field2 name="Start" /><field3 name="Increment" /><field4 name="Stop" /><field5 name="Operating Point">0</field5><field6 name="Start Combo">Volts or Amperes</field6><field7 name="Increment Combo">Volts or Amperes</field7><field8 name="Stop Combo">Volts or Amperes</field8><field9 name="Source 2" /><field10 name="Start" /><field11 name="Increment" /><field12 name="Stop" /><field13 name="Start Combo">Volts or Amperes</field13><field14 name="Increment Combo">Volts or Amperes</field14><field15 name="Stop Combo">Volts or Amperes</field15></dc><tran><field1 name="Start Time" /><field2 name="Step Time" /><field3 name="Stop Time" /><field4 name="Start Combo">Sec</field4><field5 name="Step Combo">Sec</field5><field6 name="Stop Combo">Sec</field6></tran></analysis><source /><model /><devicemodel /><subcircuit /></KicadtoNgspice>
\ No newline at end of file
diff --git a/src/SubcircuitLibrary/IB3858/analysis b/src/SubcircuitLibrary/IB3858/analysis
deleted file mode 100644
index ebd5c0a9..00000000
--- a/src/SubcircuitLibrary/IB3858/analysis
+++ /dev/null
@@ -1 +0,0 @@
-.tran 0e-00 0e-00 0e-00
\ No newline at end of file
diff --git a/src/SubcircuitLibrary/LM108/LM108-cache.lib b/src/SubcircuitLibrary/LM108/LM108-cache.lib
deleted file mode 100644
index 1d0c038e..00000000
--- a/src/SubcircuitLibrary/LM108/LM108-cache.lib
+++ /dev/null
@@ -1,120 +0,0 @@
-EESchema-LIBRARY Version 2.3

-#encoding utf-8

-#

-# PORT

-#

-DEF PORT U 0 40 Y Y 26 F N

-F0 "U" 50 100 30 H V C CNN

-F1 "PORT" 0 0 30 H V C CNN

-F2 "" 0 0 60 H V C CNN

-F3 "" 0 0 60 H V C CNN

-DRAW

-A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0

-A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50

-S -100 50 100 -50 0 1 0 N

-X ~ 1 250 0 100 L 30 30 1 1 I

-X ~ 2 250 0 100 L 30 30 2 1 I

-X ~ 3 250 0 100 L 30 30 3 1 I

-X ~ 4 250 0 100 L 30 30 4 1 I

-X ~ 5 250 0 100 L 30 30 5 1 I

-X ~ 6 250 0 100 L 30 30 6 1 I

-X ~ 7 250 0 100 L 30 30 7 1 I

-X ~ 8 250 0 100 L 30 30 8 1 I

-X ~ 9 250 0 100 L 30 30 9 1 I

-X ~ 10 250 0 100 L 30 30 10 1 I

-X ~ 11 250 0 100 L 30 30 11 1 I

-X ~ 12 250 0 100 L 30 30 12 1 I

-X ~ 13 250 0 100 L 30 30 13 1 I

-X ~ 14 250 0 100 L 30 30 14 1 I

-X ~ 15 250 0 100 L 30 30 15 1 I

-X ~ 16 250 0 100 L 30 30 16 1 I

-X ~ 17 250 0 100 L 30 30 17 1 I

-X ~ 18 250 0 100 L 30 30 18 1 I

-X ~ 19 250 0 100 L 30 30 19 1 I

-X ~ 20 250 0 100 L 30 30 20 1 I

-X ~ 21 250 0 100 L 30 30 21 1 I

-X ~ 22 250 0 100 L 30 30 22 1 I

-X ~ 23 250 0 100 L 30 30 23 1 I

-X ~ 24 250 0 100 L 30 30 24 1 I

-X ~ 25 250 0 100 L 30 30 25 1 I

-X ~ 26 250 0 100 L 30 30 26 1 I

-ENDDRAW

-ENDDEF

-#

-# eSim_NJF

-#

-DEF eSim_NJF J 0 0 Y N 1 F N

-F0 "J" -100 50 50 H V R CNN

-F1 "eSim_NJF" -50 150 50 H V R CNN

-F2 "" 200 100 29 H V C CNN

-F3 "" 0 0 60 H V C CNN

-DRAW

-C 50 0 111 0 1 10 N

-P 3 0 1 10  10 75  10 -75  10 -75 N

-P 3 0 1 0  100 -100  100 -50  10 -50 N

-P 3 0 1 0  100 100  100 55  10 55 N

-P 4 0 1 0  0 0  -40 15  -40 -15  0 0 F

-X D 1 100 200 100 D 50 50 1 1 C

-X G 2 -200 0 210 R 50 50 1 1 I

-X S 3 100 -200 100 U 50 50 1 1 E

-ENDDRAW

-ENDDEF

-#

-# eSim_NPN

-#

-DEF eSim_NPN Q 0 0 Y N 1 F N

-F0 "Q" -100 50 50 H V R CNN

-F1 "eSim_NPN" -50 150 50 H V R CNN

-F2 "" 200 100 29 H V C CNN

-F3 "" 0 0 60 H V C CNN

-ALIAS BC547 Q2N2222

-DRAW

-C 50 0 111 0 1 10 N

-P 2 0 1 0  25 25  100 100 N

-P 3 0 1 0  25 -25  100 -100  100 -100 N

-P 3 0 1 20  25 75  25 -75  25 -75 N

-P 5 0 1 0  50 -70  70 -50  90 -90  50 -70  50 -70 F

-X C 1 100 200 100 D 50 50 1 1 C

-X B 2 -200 0 225 R 50 50 1 1 I

-X E 3 100 -200 100 U 50 50 1 1 E

-ENDDRAW

-ENDDEF

-#

-# eSim_PNP

-#

-DEF eSim_PNP Q 0 0 Y N 1 F N

-F0 "Q" -100 50 50 H V R CNN

-F1 "eSim_PNP" -50 150 50 H V R CNN

-F2 "" 200 100 29 H V C CNN

-F3 "" 0 0 60 H V C CNN

-DRAW

-C 50 0 111 0 1 10 N

-P 2 0 1 0  25 25  100 100 N

-P 3 0 1 0  25 -25  100 -100  100 -100 N

-P 3 0 1 20  25 75  25 -75  25 -75 N

-P 5 0 1 0  90 -70  70 -90  50 -50  90 -70  90 -70 F

-X C 1 100 200 100 D 50 50 1 1 C

-X B 2 -200 0 225 R 50 50 1 1 I

-X E 3 100 -200 100 U 50 50 1 1 E

-ENDDRAW

-ENDDEF

-#

-# eSim_R

-#

-DEF eSim_R R 0 0 N Y 1 F N

-F0 "R" 50 130 50 H V C CNN

-F1 "eSim_R" 50 50 50 H V C CNN

-F2 "" 50 -20 30 H V C CNN

-F3 "" 50 50 30 V V C CNN

-$FPLIST

- R_*

- Resistor_*

-$ENDFPLIST

-DRAW

-S 150 10 -50 90 0 1 10 N

-X ~ 1 -100 50 50 R 60 60 1 1 P

-X ~ 2 200 50 50 L 60 60 1 1 P

-ENDDRAW

-ENDDEF

-#

-#End Library

diff --git a/src/SubcircuitLibrary/LM108/LM108.cir b/src/SubcircuitLibrary/LM108/LM108.cir
deleted file mode 100644
index f8d793b5..00000000
--- a/src/SubcircuitLibrary/LM108/LM108.cir
+++ /dev/null
@@ -1,59 +0,0 @@
-* C:\esim_1\eSim\src\SubcircuitLibrary\LM108\LM108.cir

-

-* EESchema Netlist Version 1.1 (Spice format) creation date: 03/31/19 16:57:39

-

-* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N

-* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0

-

-* Sheet Name: /

-R2  v+ Net-_Q2-Pad3_ 20k		

-Q2  Net-_Q2-Pad1_ Net-_Q2-Pad1_ Net-_Q2-Pad3_ eSim_PNP		

-Q5  Net-_Q13-Pad1_ Net-_Q2-Pad1_ Net-_Q11-Pad3_ eSim_PNP		

-Q3  Net-_Q2-Pad1_ Net-_Q14-Pad1_ Net-_Q1-Pad1_ eSim_NPN		

-Q7  CompensationA Net-_Q14-Pad1_ Net-_Q7-Pad3_ eSim_NPN		

-Q9  CompensationA CompensationA Net-_Q9-Pad3_ eSim_PNP		

-Q11  Net-_Q11-Pad1_ CompensationA Net-_Q11-Pad3_ eSim_PNP		

-R3  v+ Net-_Q9-Pad3_ 20K		

-R7  v+ Net-_Q11-Pad3_ 10K		

-Q1  Net-_Q1-Pad1_ Input- Net-_Q1-Pad3_ eSim_NPN		

-Q4  Net-_Q4-Pad1_ Input+ Input- eSim_NPN		

-Q6  Net-_Q4-Pad1_ Input- Input+ eSim_NPN		

-R1  Net-_Q1-Pad3_ Net-_Q10-Pad1_ 2K		

-R5  Net-_Q4-Pad1_ Net-_Q12-Pad3_ 50K		

-Q8  Net-_Q7-Pad3_ Input+ Net-_Q8-Pad3_ eSim_NPN		

-R8  v+ Net-_Q15-Pad3_ 10K		

-Q15  Net-_Q14-Pad1_ Net-_J1-Pad3_ Net-_Q15-Pad3_ eSim_PNP		

-R12  CompensationB Net-_Q11-Pad1_ 5.6k		

-Q13  Net-_Q13-Pad1_ Net-_Q13-Pad1_ Net-_Q13-Pad3_ eSim_NPN		

-Q17  Net-_Q11-Pad1_ Net-_Q13-Pad1_ Net-_Q13-Pad3_ eSim_NPN		

-Q14  Net-_Q14-Pad1_ Net-_Q14-Pad1_ Net-_Q12-Pad3_ eSim_NPN		

-R4  Net-_Q8-Pad3_ Net-_Q10-Pad1_ 2k		

-Q12  V- Net-_Q10-Pad1_ Net-_Q12-Pad3_ eSim_PNP		

-Q10  Net-_Q10-Pad1_ Net-_Q10-Pad2_ Net-_Q10-Pad3_ eSim_NPN		

-Q18  Net-_J1-Pad3_ Net-_J1-Pad1_ Net-_Q18-Pad3_ eSim_NPN		

-J1  Net-_J1-Pad1_ V- Net-_J1-Pad3_ eSim_NJF		

-R13  Net-_J1-Pad1_ Net-_Q16-Pad2_ 940		

-R14  Net-_Q18-Pad3_ Net-_Q24-Pad2_ 20k		

-Q24  Net-_Q13-Pad3_ Net-_Q24-Pad2_ Net-_Q24-Pad3_ eSim_NPN		

-R6  Net-_Q10-Pad3_ Net-_R10-Pad1_ 6.4K		

-R9  Net-_Q10-Pad2_ Net-_R10-Pad1_ 60K		

-R11  Net-_Q18-Pad3_ Net-_Q19-Pad3_ 20K		

-R10  Net-_R10-Pad1_ Net-_Q19-Pad3_ 500		

-R15  Net-_Q19-Pad3_ V- 1K		

-Q19  Net-_Q16-Pad2_ Net-_Q18-Pad3_ Net-_Q19-Pad3_ eSim_NPN		

-R17  Net-_Q24-Pad3_ V- 820		

-Q21  v+ Net-_J1-Pad3_ Net-_Q20-Pad1_ eSim_NPN		

-Q20  Net-_Q20-Pad1_ Net-_Q11-Pad1_ Net-_Q13-Pad3_ eSim_NPN		

-R16  Net-_J1-Pad3_ Net-_Q23-Pad1_ 2K		

-Q23  Net-_Q23-Pad1_ Net-_J1-Pad3_ Net-_Q22-Pad3_ eSim_NPN		

-Q26  v+ Net-_Q23-Pad1_ Net-_Q25-Pad2_ eSim_NPN		

-Q25  Net-_Q23-Pad1_ Net-_Q25-Pad2_ Output eSim_NPN		

-Q22  V- Net-_Q13-Pad3_ Net-_Q22-Pad3_ eSim_PNP		

-Q27  V- Net-_Q13-Pad3_ Net-_Q27-Pad3_ eSim_PNP		

-R18  Net-_Q25-Pad2_ Net-_Q27-Pad3_ 240		

-R19  Net-_Q25-Pad2_ Output 90		

-U1  CompensationA Input+ Input- V- Output v+ CompensationB PORT		

-Q29  Net-_J1-Pad3_ Net-_J1-Pad3_ v+ eSim_PNP		

-Q16  Net-_J1-Pad3_ Net-_Q16-Pad2_ Net-_Q10-Pad2_ eSim_NPN		

-

-.end

diff --git a/src/SubcircuitLibrary/LM108/LM108.cir.out b/src/SubcircuitLibrary/LM108/LM108.cir.out
deleted file mode 100644
index 6e2ff4a1..00000000
--- a/src/SubcircuitLibrary/LM108/LM108.cir.out
+++ /dev/null
@@ -1,63 +0,0 @@
-* c:\esim_1\esim\src\subcircuitlibrary\lm108\lm108.cir

-

-.include PNP.lib

-.include NJF.lib

-.include NPN.lib

-r2  v+ net-_q2-pad3_ 20k

-q2 net-_q2-pad1_ net-_q2-pad1_ net-_q2-pad3_ Q2N2907A

-q5 net-_q13-pad1_ net-_q2-pad1_ net-_q11-pad3_ Q2N2907A

-q3 net-_q2-pad1_ net-_q14-pad1_ net-_q1-pad1_ Q2N2222

-q7 compensationa net-_q14-pad1_ net-_q7-pad3_ Q2N2222

-q9 compensationa compensationa net-_q9-pad3_ Q2N2907A

-q11 net-_q11-pad1_ compensationa net-_q11-pad3_ Q2N2907A

-r3  v+ net-_q9-pad3_ 20k

-r7  v+ net-_q11-pad3_ 10k

-q1 net-_q1-pad1_ input- net-_q1-pad3_ Q2N2222

-q4 net-_q4-pad1_ input+ input- Q2N2222

-q6 net-_q4-pad1_ input- input+ Q2N2222

-r1  net-_q1-pad3_ net-_q10-pad1_ 2k

-r5  net-_q4-pad1_ net-_q12-pad3_ 50k

-q8 net-_q7-pad3_ input+ net-_q8-pad3_ Q2N2222

-r8  v+ net-_q15-pad3_ 10k

-q15 net-_q14-pad1_ net-_j1-pad3_ net-_q15-pad3_ Q2N2907A

-r12  compensationb net-_q11-pad1_ 5.6k

-q13 net-_q13-pad1_ net-_q13-pad1_ net-_q13-pad3_ Q2N2222

-q17 net-_q11-pad1_ net-_q13-pad1_ net-_q13-pad3_ Q2N2222

-q14 net-_q14-pad1_ net-_q14-pad1_ net-_q12-pad3_ Q2N2222

-r4  net-_q8-pad3_ net-_q10-pad1_ 2k

-q12 v- net-_q10-pad1_ net-_q12-pad3_ Q2N2907A

-q10 net-_q10-pad1_ net-_q10-pad2_ net-_q10-pad3_ Q2N2222

-q18 net-_j1-pad3_ net-_j1-pad1_ net-_q18-pad3_ Q2N2222

-j1 net-_j1-pad1_ v- net-_j1-pad3_ J2N3819

-r13  net-_j1-pad1_ net-_q16-pad2_ 940

-r14  net-_q18-pad3_ net-_q24-pad2_ 20k

-q24 net-_q13-pad3_ net-_q24-pad2_ net-_q24-pad3_ Q2N2222

-r6  net-_q10-pad3_ net-_r10-pad1_ 6.4k

-r9  net-_q10-pad2_ net-_r10-pad1_ 60k

-r11  net-_q18-pad3_ net-_q19-pad3_ 20k

-r10  net-_r10-pad1_ net-_q19-pad3_ 500

-r15  net-_q19-pad3_ v- 1k

-q19 net-_q16-pad2_ net-_q18-pad3_ net-_q19-pad3_ Q2N2222

-r17  net-_q24-pad3_ v- 820

-q21 v+ net-_j1-pad3_ net-_q20-pad1_ Q2N2222

-q20 net-_q20-pad1_ net-_q11-pad1_ net-_q13-pad3_ Q2N2222

-r16  net-_j1-pad3_ net-_q23-pad1_ 2k

-q23 net-_q23-pad1_ net-_j1-pad3_ net-_q22-pad3_ Q2N2222

-q26 v+ net-_q23-pad1_ net-_q25-pad2_ Q2N2222

-q25 net-_q23-pad1_ net-_q25-pad2_ output Q2N2222

-q22 v- net-_q13-pad3_ net-_q22-pad3_ Q2N2907A

-q27 v- net-_q13-pad3_ net-_q27-pad3_ Q2N2907A

-r18  net-_q25-pad2_ net-_q27-pad3_ 240

-r19  net-_q25-pad2_ output 90

-* u1  compensationa input+ input- v- output v+ compensationb port

-q29 net-_j1-pad3_ net-_j1-pad3_ v+ Q2N2907A

-q16 net-_j1-pad3_ net-_q16-pad2_ net-_q10-pad2_ Q2N2222

-.tran 10e-03 100e-03 0e-00

-

-* Control Statements 

-.control

-run

-print allv > plot_data_v.txt

-print alli > plot_data_i.txt

-.endc

-.end

diff --git a/src/SubcircuitLibrary/LM108/LM108.pro b/src/SubcircuitLibrary/LM108/LM108.pro
deleted file mode 100644
index c76222d6..00000000
--- a/src/SubcircuitLibrary/LM108/LM108.pro
+++ /dev/null
@@ -1,83 +0,0 @@
-update=03/31/19 17:48:06

-version=1

-last_client=eeschema

-[general]

-version=1

-RootSch=

-BoardNm=

-[pcbnew]

-version=1

-LastNetListRead=

-UseCmpFile=1

-PadDrill=0.600000000000

-PadDrillOvalY=0.600000000000

-PadSizeH=1.500000000000

-PadSizeV=1.500000000000

-PcbTextSizeV=1.500000000000

-PcbTextSizeH=1.500000000000

-PcbTextThickness=0.300000000000

-ModuleTextSizeV=1.000000000000

-ModuleTextSizeH=1.000000000000

-ModuleTextSizeThickness=0.150000000000

-SolderMaskClearance=0.000000000000

-SolderMaskMinWidth=0.000000000000

-DrawSegmentWidth=0.200000000000

-BoardOutlineThickness=0.100000000000

-ModuleOutlineThickness=0.150000000000

-[cvpcb]

-version=1

-NetIExt=net

-[eeschema]

-version=1

-LibDir=../../../../../Program Files (x86)/KiCad/share/library

-[eeschema/libraries]

-LibName1=power

-LibName2=device

-LibName3=transistors

-LibName4=conn

-LibName5=linear

-LibName6=regul

-LibName7=74xx

-LibName8=cmos4000

-LibName9=adc-dac

-LibName10=memory

-LibName11=xilinx

-LibName12=microcontrollers

-LibName13=dsp

-LibName14=microchip

-LibName15=analog_switches

-LibName16=motorola

-LibName17=texas

-LibName18=intel

-LibName19=audio

-LibName20=interface

-LibName21=digital-audio

-LibName22=philips

-LibName23=display

-LibName24=cypress

-LibName25=siliconi

-LibName26=opto

-LibName27=atmel

-LibName28=contrib

-LibName29=valves

-LibName30=eSim_Analog

-LibName31=eSim_Devices

-LibName32=eSim_Digital

-LibName33=eSim_Hybrid

-LibName34=eSim_Miscellaneous

-LibName35=eSim_Plot

-LibName36=eSim_Power

-LibName37=eSim_PSpice

-LibName38=eSim_Sources

-LibName39=eSim_User

-LibName40=eSim_Subckt

-[schematic_editor]

-version=1

-PageLayoutDescrFile=

-PlotDirectoryName=

-SubpartIdSeparator=0

-SubpartFirstId=65

-NetFmtName=Spice

-SpiceForceRefPrefix=0

-SpiceUseNetNumbers=0

-LabSize=60

diff --git a/src/SubcircuitLibrary/LM108/LM108.sch b/src/SubcircuitLibrary/LM108/LM108.sch
deleted file mode 100644
index a9735ce5..00000000
--- a/src/SubcircuitLibrary/LM108/LM108.sch
+++ /dev/null
@@ -1,1013 +0,0 @@
-EESchema Schematic File Version 2

-LIBS:power

-LIBS:device

-LIBS:transistors

-LIBS:conn

-LIBS:linear

-LIBS:regul

-LIBS:74xx

-LIBS:cmos4000

-LIBS:adc-dac

-LIBS:memory

-LIBS:xilinx

-LIBS:microcontrollers

-LIBS:dsp

-LIBS:microchip

-LIBS:analog_switches

-LIBS:motorola

-LIBS:texas

-LIBS:intel

-LIBS:audio

-LIBS:interface

-LIBS:digital-audio

-LIBS:philips

-LIBS:display

-LIBS:cypress

-LIBS:siliconi

-LIBS:opto

-LIBS:atmel

-LIBS:contrib

-LIBS:valves

-LIBS:eSim_Analog

-LIBS:eSim_Devices

-LIBS:eSim_Digital

-LIBS:eSim_Hybrid

-LIBS:eSim_Miscellaneous

-LIBS:eSim_Plot

-LIBS:eSim_Power

-LIBS:eSim_PSpice

-LIBS:eSim_Sources

-LIBS:eSim_User

-LIBS:eSim_Subckt

-LIBS:LM108-cache

-EELAYER 25 0

-EELAYER END

-$Descr A4 11693 8268

-encoding utf-8

-Sheet 1 1

-Title ""

-Date ""

-Rev ""

-Comp ""

-Comment1 ""

-Comment2 ""

-Comment3 ""

-Comment4 ""

-$EndDescr

-$Comp

-L eSim_R R2

-U 1 1 5C9DB838

-P 2750 1400

-F 0 "R2" H 2800 1530 50  0000 C CNN

-F 1 "20k" H 2800 1450 50  0000 C CNN

-F 2 "" H 2800 1380 30  0000 C CNN

-F 3 "" V 2800 1450 30  0000 C CNN

-	1    2750 1400

-	0    1    1    0   

-$EndComp

-$Comp

-L eSim_PNP Q2

-U 1 1 5C9DB867

-P 2900 1975

-F 0 "Q2" H 2800 2025 50  0000 R CNN

-F 1 "eSim_PNP" H 2850 2125 50  0000 R CNN

-F 2 "" H 3100 2075 29  0000 C CNN

-F 3 "" H 2900 1975 60  0000 C CNN

-	1    2900 1975

-	-1   0    0    1   

-$EndComp

-$Comp

-L eSim_PNP Q5

-U 1 1 5C9DB8A6

-P 3350 1975

-F 0 "Q5" H 3250 2025 50  0000 R CNN

-F 1 "eSim_PNP" H 3300 2125 50  0000 R CNN

-F 2 "" H 3550 2075 29  0000 C CNN

-F 3 "" H 3350 1975 60  0000 C CNN

-	1    3350 1975

-	1    0    0    1   

-$EndComp

-$Comp

-L eSim_NPN Q3

-U 1 1 5C9DB912

-P 2900 2625

-F 0 "Q3" H 2800 2675 50  0000 R CNN

-F 1 "eSim_NPN" H 2850 2775 50  0000 R CNN

-F 2 "" H 3100 2725 29  0000 C CNN

-F 3 "" H 2900 2625 60  0000 C CNN

-	1    2900 2625

-	-1   0    0    -1  

-$EndComp

-$Comp

-L eSim_NPN Q7

-U 1 1 5C9DB94B

-P 3600 2625

-F 0 "Q7" H 3500 2675 50  0000 R CNN

-F 1 "eSim_NPN" H 3550 2775 50  0000 R CNN

-F 2 "" H 3800 2725 29  0000 C CNN

-F 3 "" H 3600 2625 60  0000 C CNN

-	1    3600 2625

-	1    0    0    -1  

-$EndComp

-$Comp

-L eSim_PNP Q9

-U 1 1 5C9DB994

-P 3800 2075

-F 0 "Q9" H 3700 2125 50  0000 R CNN

-F 1 "eSim_PNP" H 3750 2225 50  0000 R CNN

-F 2 "" H 4000 2175 29  0000 C CNN

-F 3 "" H 3800 2075 60  0000 C CNN

-	1    3800 2075

-	-1   0    0    1   

-$EndComp

-$Comp

-L eSim_PNP Q11

-U 1 1 5C9DB9EF

-P 4275 2075

-F 0 "Q11" H 4175 2125 50  0000 R CNN

-F 1 "eSim_PNP" H 4225 2225 50  0000 R CNN

-F 2 "" H 4475 2175 29  0000 C CNN

-F 3 "" H 4275 2075 60  0000 C CNN

-	1    4275 2075

-	1    0    0    1   

-$EndComp

-Wire Wire Line

-	2800 1600 2800 1775

-Wire Wire Line

-	3100 1975 3150 1975

-Wire Wire Line

-	3125 1975 3125 2225

-Wire Wire Line

-	3125 2225 2800 2225

-Wire Wire Line

-	2800 2175 2800 2425

-Connection ~ 3125 1975

-Wire Wire Line

-	4000 2075 4075 2075

-Wire Wire Line

-	3700 2275 3700 2425

-Wire Wire Line

-	4050 1100 4050 2325

-Wire Wire Line

-	4050 2325 3700 2325

-Connection ~ 3700 2325

-Connection ~ 4050 2075

-Connection ~ 2800 2225

-Wire Wire Line

-	3100 2625 3400 2625

-$Comp

-L eSim_R R3

-U 1 1 5C9DBD46

-P 3650 1400

-F 0 "R3" H 3700 1530 50  0000 C CNN

-F 1 "20K" H 3700 1450 50  0000 C CNN

-F 2 "" H 3700 1380 30  0000 C CNN

-F 3 "" V 3700 1450 30  0000 C CNN

-	1    3650 1400

-	0    1    1    0   

-$EndComp

-$Comp

-L eSim_R R7

-U 1 1 5C9DBD83

-P 4325 1400

-F 0 "R7" H 4375 1530 50  0000 C CNN

-F 1 "10K" H 4375 1450 50  0000 C CNN

-F 2 "" H 4375 1380 30  0000 C CNN

-F 3 "" V 4375 1450 30  0000 C CNN

-	1    4325 1400

-	0    1    1    0   

-$EndComp

-Wire Wire Line

-	3700 1600 3700 1875

-Wire Wire Line

-	4375 1600 4375 1875

-Wire Wire Line

-	3450 1775 3450 1700

-Wire Wire Line

-	3450 1700 4375 1700

-Connection ~ 4375 1700

-Wire Wire Line

-	2800 1300 2800 1225

-Wire Wire Line

-	2800 1225 7575 1225

-Wire Wire Line

-	3700 1225 3700 1300

-Wire Wire Line

-	4375 1225 4375 1300

-Connection ~ 3700 1225

-$Comp

-L eSim_NPN Q1

-U 1 1 5C9DBEE9

-P 2650 3375

-F 0 "Q1" H 2550 3425 50  0000 R CNN

-F 1 "eSim_NPN" H 2600 3525 50  0000 R CNN

-F 2 "" H 2850 3475 29  0000 C CNN

-F 3 "" H 2650 3375 60  0000 C CNN

-	1    2650 3375

-	1    0    0    -1  

-$EndComp

-Wire Wire Line

-	2750 3175 2750 2825

-Wire Wire Line

-	2750 2825 2800 2825

-Wire Wire Line

-	2450 3375 2375 3375

-$Comp

-L eSim_NPN Q4

-U 1 1 5C9DBF74

-P 2950 3975

-F 0 "Q4" H 2850 4025 50  0000 R CNN

-F 1 "eSim_NPN" H 2900 4125 50  0000 R CNN

-F 2 "" H 3150 4075 29  0000 C CNN

-F 3 "" H 2950 3975 60  0000 C CNN

-	1    2950 3975

-	-1   0    0    -1  

-$EndComp

-$Comp

-L eSim_NPN Q6

-U 1 1 5C9DBFBB

-P 3500 3975

-F 0 "Q6" H 3400 4025 50  0000 R CNN

-F 1 "eSim_NPN" H 3450 4125 50  0000 R CNN

-F 2 "" H 3700 4075 29  0000 C CNN

-F 3 "" H 3500 3975 60  0000 C CNN

-	1    3500 3975

-	1    0    0    -1  

-$EndComp

-Wire Wire Line

-	3600 3775 3600 3650

-Wire Wire Line

-	2850 3650 4050 3650

-Wire Wire Line

-	2850 3650 2850 3775

-Wire Wire Line

-	3150 3975 3150 4175

-Wire Wire Line

-	3150 4175 3600 4175

-Wire Wire Line

-	3300 4250 3300 3975

-Wire Wire Line

-	2450 4250 3300 4250

-Wire Wire Line

-	2850 4250 2850 4175

-Wire Wire Line

-	2450 4250 2450 3375

-Connection ~ 2850 4250

-$Comp

-L eSim_R R1

-U 1 1 5C9DC222

-P 2700 5000

-F 0 "R1" H 2750 5130 50  0000 C CNN

-F 1 "2K" H 2750 5050 50  0000 C CNN

-F 2 "" H 2750 4980 30  0000 C CNN

-F 3 "" V 2750 5050 30  0000 C CNN

-	1    2700 5000

-	0    1    1    0   

-$EndComp

-Wire Wire Line

-	2750 3575 2750 4900

-$Comp

-L eSim_R R5

-U 1 1 5C9DC2A7

-P 4150 3700

-F 0 "R5" H 4200 3830 50  0000 C CNN

-F 1 "50K" H 4200 3750 50  0000 C CNN

-F 2 "" H 4200 3680 30  0000 C CNN

-F 3 "" V 4200 3750 30  0000 C CNN

-	1    4150 3700

-	1    0    0    -1  

-$EndComp

-Connection ~ 3600 3650

-$Comp

-L eSim_NPN Q8

-U 1 1 5C9DC459

-P 3625 4425

-F 0 "Q8" H 3525 4475 50  0000 R CNN

-F 1 "eSim_NPN" H 3575 4575 50  0000 R CNN

-F 2 "" H 3825 4525 29  0000 C CNN

-F 3 "" H 3625 4425 60  0000 C CNN

-	1    3625 4425

-	1    0    0    -1  

-$EndComp

-Wire Wire Line

-	3400 4425 3400 4175

-Wire Wire Line

-	2400 4425 3425 4425

-Connection ~ 3400 4175

-Wire Wire Line

-	3725 4225 3725 2825

-Wire Wire Line

-	3725 2825 3700 2825

-$Comp

-L eSim_R R8

-U 1 1 5C9DCB0B

-P 4575 1400

-F 0 "R8" H 4625 1530 50  0000 C CNN

-F 1 "10K" H 4625 1450 50  0000 C CNN

-F 2 "" H 4625 1380 30  0000 C CNN

-F 3 "" V 4625 1450 30  0000 C CNN

-	1    4575 1400

-	0    1    1    0   

-$EndComp

-Wire Wire Line

-	4625 1225 4625 1300

-Connection ~ 4375 1225

-$Comp

-L eSim_PNP Q15

-U 1 1 5C9DCBA9

-P 4775 1850

-F 0 "Q15" H 4675 1900 50  0000 R CNN

-F 1 "eSim_PNP" H 4725 2000 50  0000 R CNN

-F 2 "" H 4975 1950 29  0000 C CNN

-F 3 "" H 4775 1850 60  0000 C CNN

-	1    4775 1850

-	-1   0    0    1   

-$EndComp

-Wire Wire Line

-	4675 1650 4625 1650

-Wire Wire Line

-	4625 1650 4625 1600

-Connection ~ 4625 1225

-$Comp

-L eSim_R R12

-U 1 1 5C9DC058

-P 5550 1925

-F 0 "R12" H 5600 2055 50  0000 C CNN

-F 1 "5.6k" H 5600 1975 50  0000 C CNN

-F 2 "" H 5600 1905 30  0000 C CNN

-F 3 "" V 5600 1975 30  0000 C CNN

-	1    5550 1925

-	0    1    1    0   

-$EndComp

-Wire Wire Line

-	5600 2125 5600 2550

-Wire Wire Line

-	4375 2275 5725 2275

-$Comp

-L eSim_NPN Q13

-U 1 1 5C9DC257

-P 4525 2750

-F 0 "Q13" H 4425 2800 50  0000 R CNN

-F 1 "eSim_NPN" H 4475 2900 50  0000 R CNN

-F 2 "" H 4725 2850 29  0000 C CNN

-F 3 "" H 4525 2750 60  0000 C CNN

-	1    4525 2750

-	-1   0    0    -1  

-$EndComp

-$Comp

-L eSim_NPN Q17

-U 1 1 5C9DC2B6

-P 5500 2750

-F 0 "Q17" H 5400 2800 50  0000 R CNN

-F 1 "eSim_NPN" H 5450 2900 50  0000 R CNN

-F 2 "" H 5700 2850 29  0000 C CNN

-F 3 "" H 5500 2750 60  0000 C CNN

-	1    5500 2750

-	1    0    0    -1  

-$EndComp

-Connection ~ 5600 2275

-Wire Wire Line

-	4725 2750 5300 2750

-Wire Wire Line

-	3450 2175 3450 2400

-Wire Wire Line

-	3450 2400 5050 2400

-Wire Wire Line

-	4425 2400 4425 2550

-Wire Wire Line

-	5050 2400 5050 2750

-Connection ~ 5050 2750

-Connection ~ 4425 2400

-Wire Wire Line

-	4425 2950 4425 3075

-Wire Wire Line

-	4425 3075 7275 3075

-Wire Wire Line

-	5600 3075 5600 2950

-$Comp

-L eSim_NPN Q14

-U 1 1 5C9DC732

-P 4525 3400

-F 0 "Q14" H 4425 3450 50  0000 R CNN

-F 1 "eSim_NPN" H 4475 3550 50  0000 R CNN

-F 2 "" H 4725 3500 29  0000 C CNN

-F 3 "" H 4525 3400 60  0000 C CNN

-	1    4525 3400

-	-1   0    0    -1  

-$EndComp

-Wire Wire Line

-	3200 3200 4725 3200

-Wire Wire Line

-	4725 2225 4725 3400

-Wire Wire Line

-	4725 2225 4675 2225

-Wire Wire Line

-	4675 2225 4675 2050

-Connection ~ 4725 3200

-Wire Wire Line

-	3200 3200 3200 2625

-Connection ~ 3200 2625

-Connection ~ 4425 3200

-Wire Wire Line

-	4425 3600 4425 5125

-Wire Wire Line

-	4425 3650 4350 3650

-$Comp

-L eSim_R R4

-U 1 1 5C9DCD74

-P 3675 5000

-F 0 "R4" H 3725 5130 50  0000 C CNN

-F 1 "2k" H 3725 5050 50  0000 C CNN

-F 2 "" H 3725 4980 30  0000 C CNN

-F 3 "" V 3725 5050 30  0000 C CNN

-	1    3675 5000

-	0    1    1    0   

-$EndComp

-Wire Wire Line

-	3725 4625 3725 4900

-Wire Wire Line

-	3725 5200 3725 5600

-Wire Wire Line

-	2750 5325 4125 5325

-Wire Wire Line

-	2750 5325 2750 5200

-$Comp

-L eSim_PNP Q12

-U 1 1 5C9DD197

-P 4325 5325

-F 0 "Q12" H 4225 5375 50  0000 R CNN

-F 1 "eSim_PNP" H 4275 5475 50  0000 R CNN

-F 2 "" H 4525 5425 29  0000 C CNN

-F 3 "" H 4325 5325 60  0000 C CNN

-	1    4325 5325

-	1    0    0    1   

-$EndComp

-Connection ~ 3725 5325

-Connection ~ 4425 3650

-$Comp

-L eSim_NPN Q10

-U 1 1 5C9DD5DD

-P 3825 5800

-F 0 "Q10" H 3725 5850 50  0000 R CNN

-F 1 "eSim_NPN" H 3775 5950 50  0000 R CNN

-F 2 "" H 4025 5900 29  0000 C CNN

-F 3 "" H 3825 5800 60  0000 C CNN

-	1    3825 5800

-	-1   0    0    -1  

-$EndComp

-Wire Wire Line

-	4825 5225 4825 5875

-Wire Wire Line

-	4825 5800 4025 5800

-$Comp

-L eSim_NPN Q18

-U 1 1 5C9DDBBA

-P 5650 4175

-F 0 "Q18" H 5550 4225 50  0000 R CNN

-F 1 "eSim_NPN" H 5600 4325 50  0000 R CNN

-F 2 "" H 5850 4275 29  0000 C CNN

-F 3 "" H 5650 4175 60  0000 C CNN

-	1    5650 4175

-	-1   0    0    -1  

-$EndComp

-$Comp

-L eSim_NJF J1

-U 1 1 5C9DDDE9

-P 6400 4100

-F 0 "J1" H 6300 4150 50  0000 R CNN

-F 1 "eSim_NJF" H 6350 4250 50  0000 R CNN

-F 2 "" H 6600 4200 29  0000 C CNN

-F 3 "" H 6400 4100 60  0000 C CNN

-	1    6400 4100

-	-1   0    0    1   

-$EndComp

-$Comp

-L eSim_R R13

-U 1 1 5C9DFBCC

-P 6250 4625

-F 0 "R13" H 6300 4755 50  0000 C CNN

-F 1 "940" H 6300 4675 50  0000 C CNN

-F 2 "" H 6300 4605 30  0000 C CNN

-F 3 "" V 6300 4675 30  0000 C CNN

-	1    6250 4625

-	0    1    1    0   

-$EndComp

-Wire Wire Line

-	6300 4300 6300 4525

-Wire Wire Line

-	5125 5025 6300 5025

-Wire Wire Line

-	6300 4825 6300 5475

-$Comp

-L eSim_R R14

-U 1 1 5C9DFE3D

-P 6500 4550

-F 0 "R14" H 6550 4680 50  0000 C CNN

-F 1 "20k" H 6550 4600 50  0000 C CNN

-F 2 "" H 6550 4530 30  0000 C CNN

-F 3 "" V 6550 4600 30  0000 C CNN

-	1    6500 4550

-	1    0    0    -1  

-$EndComp

-Wire Wire Line

-	6400 4500 5550 4500

-Wire Wire Line

-	5550 4375 5550 5875

-Wire Wire Line

-	4425 5525 6850 5525

-Wire Wire Line

-	6850 4100 6850 6250

-Wire Wire Line

-	6850 4100 6600 4100

-$Comp

-L eSim_NPN Q24

-U 1 1 5C9E055D

-P 7225 4500

-F 0 "Q24" H 7125 4550 50  0000 R CNN

-F 1 "eSim_NPN" H 7175 4650 50  0000 R CNN

-F 2 "" H 7425 4600 29  0000 C CNN

-F 3 "" H 7225 4500 60  0000 C CNN

-	1    7225 4500

-	1    0    0    -1  

-$EndComp

-Wire Wire Line

-	7025 4500 6700 4500

-$Comp

-L eSim_R R6

-U 1 1 5C9E0948

-P 4225 6300

-F 0 "R6" H 4275 6430 50  0000 C CNN

-F 1 "6.4K" H 4275 6350 50  0000 C CNN

-F 2 "" H 4275 6280 30  0000 C CNN

-F 3 "" V 4275 6350 30  0000 C CNN

-	1    4225 6300

-	1    0    0    -1  

-$EndComp

-$Comp

-L eSim_R R9

-U 1 1 5C9E09B9

-P 4775 5975

-F 0 "R9" H 4825 6105 50  0000 C CNN

-F 1 "60K" H 4825 6025 50  0000 C CNN

-F 2 "" H 4825 5955 30  0000 C CNN

-F 3 "" V 4825 6025 30  0000 C CNN

-	1    4775 5975

-	0    1    1    0   

-$EndComp

-$Comp

-L eSim_R R11

-U 1 1 5C9E0B22

-P 5500 5975

-F 0 "R11" H 5550 6105 50  0000 C CNN

-F 1 "20K" H 5550 6025 50  0000 C CNN

-F 2 "" H 5550 5955 30  0000 C CNN

-F 3 "" V 5550 6025 30  0000 C CNN

-	1    5500 5975

-	0    1    1    0   

-$EndComp

-$Comp

-L eSim_R R10

-U 1 1 5C9E0B8F

-P 5125 6300

-F 0 "R10" H 5175 6430 50  0000 C CNN

-F 1 "500" H 5175 6350 50  0000 C CNN

-F 2 "" H 5175 6280 30  0000 C CNN

-F 3 "" V 5175 6350 30  0000 C CNN

-	1    5125 6300

-	1    0    0    -1  

-$EndComp

-$Comp

-L eSim_R R15

-U 1 1 5C9E0BFA

-P 6500 6300

-F 0 "R15" H 6550 6430 50  0000 C CNN

-F 1 "1K" H 6550 6350 50  0000 C CNN

-F 2 "" H 6550 6280 30  0000 C CNN

-F 3 "" V 6550 6350 30  0000 C CNN

-	1    6500 6300

-	1    0    0    -1  

-$EndComp

-$Comp

-L eSim_NPN Q19

-U 1 1 5C9E0C83

-P 5750 5675

-F 0 "Q19" H 5650 5725 50  0000 R CNN

-F 1 "eSim_NPN" H 5700 5825 50  0000 R CNN

-F 2 "" H 5950 5775 29  0000 C CNN

-F 3 "" H 5750 5675 60  0000 C CNN

-	1    5750 5675

-	1    0    0    -1  

-$EndComp

-Connection ~ 5550 4500

-Connection ~ 5550 5675

-Wire Wire Line

-	5550 6175 5550 6250

-Wire Wire Line

-	5325 6250 6400 6250

-Wire Wire Line

-	4425 6250 5025 6250

-Wire Wire Line

-	4825 6250 4825 6175

-Connection ~ 4825 6250

-Connection ~ 4825 5800

-Wire Wire Line

-	4125 6250 3725 6250

-Wire Wire Line

-	3725 6250 3725 6000

-Connection ~ 5550 6250

-Wire Wire Line

-	5850 5875 6225 5875

-Wire Wire Line

-	6225 5875 6225 6250

-Connection ~ 6225 6250

-Wire Wire Line

-	6700 6250 8600 6250

-Connection ~ 6850 5525

-Wire Wire Line

-	6300 5475 5850 5475

-Connection ~ 6300 5025

-$Comp

-L eSim_R R17

-U 1 1 5C9E17A1

-P 7275 5325

-F 0 "R17" H 7325 5455 50  0000 C CNN

-F 1 "820" H 7325 5375 50  0000 C CNN

-F 2 "" H 7325 5305 30  0000 C CNN

-F 3 "" V 7325 5375 30  0000 C CNN

-	1    7275 5325

-	0    1    1    0   

-$EndComp

-Wire Wire Line

-	7325 4700 7325 5225

-Wire Wire Line

-	7325 6250 7325 5525

-Connection ~ 6850 6250

-$Comp

-L eSim_NPN Q21

-U 1 1 5C9E2938

-P 6125 1525

-F 0 "Q21" H 6025 1575 50  0000 R CNN

-F 1 "eSim_NPN" H 6075 1675 50  0000 R CNN

-F 2 "" H 6325 1625 29  0000 C CNN

-F 3 "" H 6125 1525 60  0000 C CNN

-	1    6125 1525

-	-1   0    0    -1  

-$EndComp

-$Comp

-L eSim_NPN Q20

-U 1 1 5C9E29AB

-P 5925 2275

-F 0 "Q20" H 5825 2325 50  0000 R CNN

-F 1 "eSim_NPN" H 5875 2425 50  0000 R CNN

-F 2 "" H 6125 2375 29  0000 C CNN

-F 3 "" H 5925 2275 60  0000 C CNN

-	1    5925 2275

-	1    0    0    -1  

-$EndComp

-Wire Wire Line

-	6025 1725 6025 2075

-Wire Wire Line

-	5700 1300 5700 1675

-Wire Wire Line

-	7575 1300 8450 1300

-Wire Wire Line

-	6375 1300 6375 1800

-Wire Wire Line

-	6325 1525 6675 1525

-$Comp

-L eSim_R R16

-U 1 1 5C9E2CC0

-P 6775 1575

-F 0 "R16" H 6825 1705 50  0000 C CNN

-F 1 "2K" H 6825 1625 50  0000 C CNN

-F 2 "" H 6825 1555 30  0000 C CNN

-F 3 "" V 6825 1625 30  0000 C CNN

-	1    6775 1575

-	1    0    0    -1  

-$EndComp

-Connection ~ 6375 1525

-$Comp

-L eSim_NPN Q23

-U 1 1 5C9E2F0C

-P 6875 1800

-F 0 "Q23" H 6775 1850 50  0000 R CNN

-F 1 "eSim_NPN" H 6825 1950 50  0000 R CNN

-F 2 "" H 7075 1900 29  0000 C CNN

-F 3 "" H 6875 1800 60  0000 C CNN

-	1    6875 1800

-	1    0    0    -1  

-$EndComp

-Wire Wire Line

-	6975 1525 6975 1600

-Wire Wire Line

-	6375 1800 6675 1800

-$Comp

-L eSim_NPN Q26

-U 1 1 5C9E318C

-P 7475 1525

-F 0 "Q26" H 7375 1575 50  0000 R CNN

-F 1 "eSim_NPN" H 7425 1675 50  0000 R CNN

-F 2 "" H 7675 1625 29  0000 C CNN

-F 3 "" H 7475 1525 60  0000 C CNN

-	1    7475 1525

-	1    0    0    -1  

-$EndComp

-Wire Wire Line

-	6975 1525 7275 1525

-$Comp

-L eSim_NPN Q25

-U 1 1 5C9E32C5

-P 7300 1800

-F 0 "Q25" H 7200 1850 50  0000 R CNN

-F 1 "eSim_NPN" H 7250 1950 50  0000 R CNN

-F 2 "" H 7500 1900 29  0000 C CNN

-F 3 "" H 7300 1800 60  0000 C CNN

-	1    7300 1800

-	-1   0    0    -1  

-$EndComp

-Wire Wire Line

-	7200 1600 7200 1525

-Connection ~ 7200 1525

-Wire Wire Line

-	7575 1725 7575 2275

-Wire Wire Line

-	7500 1800 7825 1800

-Wire Wire Line

-	7575 1225 7575 1325

-$Comp

-L eSim_PNP Q22

-U 1 1 5C9E36C9

-P 6850 2775

-F 0 "Q22" H 6750 2825 50  0000 R CNN

-F 1 "eSim_PNP" H 6800 2925 50  0000 R CNN

-F 2 "" H 7050 2875 29  0000 C CNN

-F 3 "" H 6850 2775 60  0000 C CNN

-	1    6850 2775

-	1    0    0    1   

-$EndComp

-Wire Wire Line

-	6975 2000 6975 2575

-Wire Wire Line

-	6975 2575 6950 2575

-Connection ~ 5600 3075

-Wire Wire Line

-	6025 3075 6025 2475

-Wire Wire Line

-	6650 2775 6650 3325

-Connection ~ 6025 3075

-$Comp

-L eSim_PNP Q27

-U 1 1 5C9E3F8C

-P 7475 3075

-F 0 "Q27" H 7375 3125 50  0000 R CNN

-F 1 "eSim_PNP" H 7425 3225 50  0000 R CNN

-F 2 "" H 7675 3175 29  0000 C CNN

-F 3 "" H 7475 3075 60  0000 C CNN

-	1    7475 3075

-	1    0    0    1   

-$EndComp

-Connection ~ 6650 3075

-$Comp

-L eSim_R R18

-U 1 1 5C9E431A

-P 7525 2375

-F 0 "R18" H 7575 2505 50  0000 C CNN

-F 1 "240" H 7575 2425 50  0000 C CNN

-F 2 "" H 7575 2355 30  0000 C CNN

-F 3 "" V 7575 2425 30  0000 C CNN

-	1    7525 2375

-	0    1    1    0   

-$EndComp

-Connection ~ 7575 1800

-Wire Wire Line

-	7575 2575 7575 2875

-$Comp

-L eSim_R R19

-U 1 1 5C9E45DF

-P 7925 1850

-F 0 "R19" H 7975 1980 50  0000 C CNN

-F 1 "90" H 7975 1900 50  0000 C CNN

-F 2 "" H 7975 1830 30  0000 C CNN

-F 3 "" V 7975 1900 30  0000 C CNN

-	1    7925 1850

-	1    0    0    -1  

-$EndComp

-Wire Wire Line

-	7200 2000 8250 2000

-Wire Wire Line

-	8250 2000 8250 1800

-Wire Wire Line

-	8125 1800 8475 1800

-Wire Wire Line

-	7325 4300 7325 3325

-Wire Wire Line

-	7325 3325 6650 3325

-Wire Wire Line

-	6950 2975 7300 2975

-Wire Wire Line

-	7300 2975 7300 2750

-Wire Wire Line

-	7300 2750 7875 2750

-Wire Wire Line

-	7875 2750 7875 6250

-Connection ~ 7325 6250

-Wire Wire Line

-	7575 3275 7575 6250

-Connection ~ 7575 6250

-Connection ~ 7875 6250

-Connection ~ 8250 1800

-Connection ~ 7575 1300

-$Comp

-L PORT U1

-U 7 1 5C9EBDC2

-P 8700 1300

-F 0 "U1" H 8750 1400 30  0000 C CNN

-F 1 "PORT" H 8700 1300 30  0000 C CNN

-F 2 "" H 8700 1300 60  0000 C CNN

-F 3 "" H 8700 1300 60  0000 C CNN

-	7    8700 1300

-	-1   0    0    1   

-$EndComp

-$Comp

-L PORT U1

-U 6 1 5C9EBE57

-P 8725 1800

-F 0 "U1" H 8775 1900 30  0000 C CNN

-F 1 "PORT" H 8725 1800 30  0000 C CNN

-F 2 "" H 8725 1800 60  0000 C CNN

-F 3 "" H 8725 1800 60  0000 C CNN

-	6    8725 1800

-	-1   0    0    1   

-$EndComp

-$Comp

-L PORT U1

-U 4 1 5C9EC714

-P 8850 6250

-F 0 "U1" H 8900 6350 30  0000 C CNN

-F 1 "PORT" H 8850 6250 30  0000 C CNN

-F 2 "" H 8850 6250 60  0000 C CNN

-F 3 "" H 8850 6250 60  0000 C CNN

-	4    8850 6250

-	-1   0    0    1   

-$EndComp

-$Comp

-L PORT U1

-U 2 1 5C9ED09C

-P 2125 3375

-F 0 "U1" H 2175 3475 30  0000 C CNN

-F 1 "PORT" H 2125 3375 30  0000 C CNN

-F 2 "" H 2125 3375 60  0000 C CNN

-F 3 "" H 2125 3375 60  0000 C CNN

-	2    2125 3375

-	1    0    0    -1  

-$EndComp

-$Comp

-L PORT U1

-U 3 1 5C9ED12F

-P 2150 4425

-F 0 "U1" H 2200 4525 30  0000 C CNN

-F 1 "PORT" H 2150 4425 30  0000 C CNN

-F 2 "" H 2150 4425 60  0000 C CNN

-F 3 "" H 2150 4425 60  0000 C CNN

-	3    2150 4425

-	1    0    0    -1  

-$EndComp

-Connection ~ 3400 4425

-Text GLabel 8425 1075 0    60   Input ~ 0

-v+

-Wire Wire Line

-	8425 1075 8450 1075

-Wire Wire Line

-	8450 1075 8450 1300

-Text GLabel 8475 1675 0    60   Input ~ 0

-Output

-Wire Wire Line

-	8475 1800 8475 1675

-Text GLabel 8600 6150 0    60   Input ~ 0

-V-

-Wire Wire Line

-	8600 6250 8600 6150

-Text GLabel 2375 4600 0    60   Input ~ 0

-Input+

-Wire Wire Line

-	2375 4600 2450 4600

-Wire Wire Line

-	2450 4600 2450 4425

-Connection ~ 2450 4425

-Text GLabel 2350 3525 0    60   Input ~ 0

-Input-

-Wire Wire Line

-	2350 3525 2375 3525

-Wire Wire Line

-	2375 3525 2375 3375

-Wire Wire Line

-	6025 1225 6025 1325

-Connection ~ 6025 1225

-Wire Wire Line

-	5700 1300 6375 1300

-Wire Wire Line

-	5600 1825 5600 1125

-$Comp

-L PORT U1

-U 1 1 5C9FE719

-P 4050 850

-F 0 "U1" H 4100 950 30  0000 C CNN

-F 1 "PORT" H 4050 850 30  0000 C CNN

-F 2 "" H 4050 850 60  0000 C CNN

-F 3 "" H 4050 850 60  0000 C CNN

-	1    4050 850 

-	0    1    1    0   

-$EndComp

-$Comp

-L PORT U1

-U 8 1 5C9FF058

-P 5600 875

-F 0 "U1" H 5650 975 30  0000 C CNN

-F 1 "PORT" H 5600 875 30  0000 C CNN

-F 2 "" H 5600 875 60  0000 C CNN

-F 3 "" H 5600 875 60  0000 C CNN

-	8    5600 875 

-	0    1    1    0   

-$EndComp

-Text GLabel 5500 1125 0    60   Input ~ 0

-CompensationB

-Wire Wire Line

-	5600 1125 5500 1125

-Text GLabel 3875 1075 0    60   Input ~ 0

-CompensationA

-Wire Wire Line

-	3875 1075 3975 1075

-Wire Wire Line

-	3975 1075 3975 1150

-Wire Wire Line

-	3975 1150 4050 1150

-Connection ~ 4050 1150

-Wire Wire Line

-	5850 4175 5850 4375

-Wire Wire Line

-	5850 4375 6300 4375

-Connection ~ 6300 4375

-$Comp

-L eSim_PNP Q28

-U 1 1 5CA09126

-P 5075 1475

-F 0 "Q28" H 4975 1525 50  0000 R CNN

-F 1 "eSim_PNP" H 5025 1625 50  0000 R CNN

-F 2 "" H 5275 1575 29  0000 C CNN

-F 3 "" H 5075 1475 60  0000 C CNN

-	1    5075 1475

-	1    0    0    1   

-$EndComp

-$Comp

-L eSim_PNP Q29

-U 1 1 5CA091C3

-P 5400 1475

-F 0 "Q29" H 5300 1525 50  0000 R CNN

-F 1 "eSim_PNP" H 5350 1625 50  0000 R CNN

-F 2 "" H 5600 1575 29  0000 C CNN

-F 3 "" H 5400 1475 60  0000 C CNN

-	1    5400 1475

-	1    0    0    1   

-$EndComp

-Wire Wire Line

-	5500 1275 5500 1225

-Connection ~ 5500 1225

-Wire Wire Line

-	4875 1475 4875 1675

-Wire Wire Line

-	4875 1675 4975 1675

-Wire Wire Line

-	5175 1675 5175 1850

-Wire Wire Line

-	5700 1675 5500 1675

-$Comp

-L eSim_NPN Q16

-U 1 1 5CA0B93F

-P 4925 5025

-F 0 "Q16" H 4825 5075 50  0000 R CNN

-F 1 "eSim_NPN" H 4875 5175 50  0000 R CNN

-F 2 "" H 5125 5125 29  0000 C CNN

-F 3 "" H 4925 5025 60  0000 C CNN

-	1    4925 5025

-	-1   0    0    -1  

-$EndComp

-Wire Wire Line

-	5200 1475 5200 1275

-Wire Wire Line

-	5200 1275 5175 1275

-Wire Wire Line

-	5175 1850 4975 1850

-Wire Wire Line

-	4975 1675 4975 3975

-Wire Wire Line

-	4825 3975 6100 3975

-Connection ~ 4975 1850

-Wire Wire Line

-	6100 3975 6100 3900

-Wire Wire Line

-	6100 3900 6300 3900

-Connection ~ 5550 3975

-Wire Wire Line

-	4825 3975 4825 4825

-Connection ~ 4975 3975

-$EndSCHEMATC

diff --git a/src/SubcircuitLibrary/LM108/LM108.sub b/src/SubcircuitLibrary/LM108/LM108.sub
deleted file mode 100644
index b04676f7..00000000
--- a/src/SubcircuitLibrary/LM108/LM108.sub
+++ /dev/null
@@ -1,57 +0,0 @@
-* Subcircuit LM108

-.subckt LM108 compensationa input+ input- v- output v+ compensationb 

-* c:\esim_1\esim\src\subcircuitlibrary\lm108\lm108.cir

-.include PNP.lib

-.include NJF.lib

-.include NPN.lib

-r2  v+ net-_q2-pad3_ 20k

-q2 net-_q2-pad1_ net-_q2-pad1_ net-_q2-pad3_ Q2N2907A

-q5 net-_q13-pad1_ net-_q2-pad1_ net-_q11-pad3_ Q2N2907A

-q3 net-_q2-pad1_ net-_q14-pad1_ net-_q1-pad1_ Q2N2222

-q7 compensationa net-_q14-pad1_ net-_q7-pad3_ Q2N2222

-q9 compensationa compensationa net-_q9-pad3_ Q2N2907A

-q11 net-_q11-pad1_ compensationa net-_q11-pad3_ Q2N2907A

-r3  v+ net-_q9-pad3_ 20k

-r7  v+ net-_q11-pad3_ 10k

-q1 net-_q1-pad1_ input- net-_q1-pad3_ Q2N2222

-q4 net-_q4-pad1_ input+ input- Q2N2222

-q6 net-_q4-pad1_ input- input+ Q2N2222

-r1  net-_q1-pad3_ net-_q10-pad1_ 2k

-r5  net-_q4-pad1_ net-_q12-pad3_ 50k

-q8 net-_q7-pad3_ input+ net-_q8-pad3_ Q2N2222

-r8  v+ net-_q15-pad3_ 10k

-q15 net-_q14-pad1_ net-_j1-pad3_ net-_q15-pad3_ Q2N2907A

-r12  compensationb net-_q11-pad1_ 5.6k

-q13 net-_q13-pad1_ net-_q13-pad1_ net-_q13-pad3_ Q2N2222

-q17 net-_q11-pad1_ net-_q13-pad1_ net-_q13-pad3_ Q2N2222

-q14 net-_q14-pad1_ net-_q14-pad1_ net-_q12-pad3_ Q2N2222

-r4  net-_q8-pad3_ net-_q10-pad1_ 2k

-q12 v- net-_q10-pad1_ net-_q12-pad3_ Q2N2907A

-q10 net-_q10-pad1_ net-_q10-pad2_ net-_q10-pad3_ Q2N2222

-q18 net-_j1-pad3_ net-_j1-pad1_ net-_q18-pad3_ Q2N2222

-j1 net-_j1-pad1_ v- net-_j1-pad3_ J2N3819

-r13  net-_j1-pad1_ net-_q16-pad2_ 940

-r14  net-_q18-pad3_ net-_q24-pad2_ 20k

-q24 net-_q13-pad3_ net-_q24-pad2_ net-_q24-pad3_ Q2N2222

-r6  net-_q10-pad3_ net-_r10-pad1_ 6.4k

-r9  net-_q10-pad2_ net-_r10-pad1_ 60k

-r11  net-_q18-pad3_ net-_q19-pad3_ 20k

-r10  net-_r10-pad1_ net-_q19-pad3_ 500

-r15  net-_q19-pad3_ v- 1k

-q19 net-_q16-pad2_ net-_q18-pad3_ net-_q19-pad3_ Q2N2222

-r17  net-_q24-pad3_ v- 820

-q21 v+ net-_j1-pad3_ net-_q20-pad1_ Q2N2222

-q20 net-_q20-pad1_ net-_q11-pad1_ net-_q13-pad3_ Q2N2222

-r16  net-_j1-pad3_ net-_q23-pad1_ 2k

-q23 net-_q23-pad1_ net-_j1-pad3_ net-_q22-pad3_ Q2N2222

-q26 v+ net-_q23-pad1_ net-_q25-pad2_ Q2N2222

-q25 net-_q23-pad1_ net-_q25-pad2_ output Q2N2222

-q22 v- net-_q13-pad3_ net-_q22-pad3_ Q2N2907A

-q27 v- net-_q13-pad3_ net-_q27-pad3_ Q2N2907A

-r18  net-_q25-pad2_ net-_q27-pad3_ 240

-r19  net-_q25-pad2_ output 90

-q29 net-_j1-pad3_ net-_j1-pad3_ v+ Q2N2907A

-q16 net-_j1-pad3_ net-_q16-pad2_ net-_q10-pad2_ Q2N2222

-* Control Statements

-

-.ends LM108
\ No newline at end of file
diff --git a/src/SubcircuitLibrary/LM108/LM108_Previous_Values.xml b/src/SubcircuitLibrary/LM108/LM108_Previous_Values.xml
deleted file mode 100644
index c3161654..00000000
--- a/src/SubcircuitLibrary/LM108/LM108_Previous_Values.xml
+++ /dev/null
@@ -1 +0,0 @@
-<KicadtoNgspice><source /><model /><devicemodel><j1><field>C:/esim_1/eSim/src/deviceModelLibrary/JFET/NJF.lib</field></j1><q20><field>C:/esim_1/eSim/src/deviceModelLibrary/Transistor/NPN.lib</field></q20><q21><field>C:/esim_1/eSim/src/deviceModelLibrary/Transistor/NPN.lib</field></q21><q22><field>C:/esim_1/eSim/src/deviceModelLibrary/Transistor/PNP.lib</field></q22><q23><field>C:/esim_1/eSim/src/deviceModelLibrary/Transistor/NPN.lib</field></q23><q24><field>C:/esim_1/eSim/src/deviceModelLibrary/Transistor/NPN.lib</field></q24><q25><field>C:/esim_1/eSim/src/deviceModelLibrary/Transistor/NPN.lib</field></q25><q26><field>C:/esim_1/eSim/src/deviceModelLibrary/Transistor/NPN.lib</field></q26><q27><field>C:/esim_1/eSim/src/deviceModelLibrary/Transistor/PNP.lib</field></q27><q29><field>C:/esim_1/eSim/src/deviceModelLibrary/Transistor/PNP.lib</field></q29><q1><field>C:/esim_1/eSim/src/deviceModelLibrary/Transistor/NPN.lib</field></q1><q3><field>C:/esim_1/eSim/src/deviceModelLibrary/Transistor/NPN.lib</field></q3><q2><field>C:/esim_1/eSim/src/deviceModelLibrary/Transistor/PNP.lib</field></q2><q5><field>C:/esim_1/eSim/src/deviceModelLibrary/Transistor/PNP.lib</field></q5><q4><field>C:/esim_1/eSim/src/deviceModelLibrary/Transistor/NPN.lib</field></q4><q7><field>C:/esim_1/eSim/src/deviceModelLibrary/Transistor/NPN.lib</field></q7><q6><field>C:/esim_1/eSim/src/deviceModelLibrary/Transistor/NPN.lib</field></q6><q9><field>C:/esim_1/eSim/src/deviceModelLibrary/Transistor/PNP.lib</field></q9><q8><field>C:/esim_1/eSim/src/deviceModelLibrary/Transistor/NPN.lib</field></q8><q15><field>C:/esim_1/eSim/src/deviceModelLibrary/Transistor/PNP.lib</field></q15><q14><field>C:/esim_1/eSim/src/deviceModelLibrary/Transistor/NPN.lib</field></q14><q17><field>C:/esim_1/eSim/src/deviceModelLibrary/Transistor/NPN.lib</field></q17><q16><field>C:/esim_1/eSim/src/deviceModelLibrary/Transistor/NPN.lib</field></q16><q11><field>C:/esim_1/eSim/src/deviceModelLibrary/Transistor/PNP.lib</field></q11><q10><field>C:/esim_1/eSim/src/deviceModelLibrary/Transistor/NPN.lib</field></q10><q13><field>C:/esim_1/eSim/src/deviceModelLibrary/Transistor/NPN.lib</field></q13><q12><field>C:/esim_1/eSim/src/deviceModelLibrary/Transistor/PNP.lib</field></q12><q19><field>C:/esim_1/eSim/src/deviceModelLibrary/Transistor/NPN.lib</field></q19><q18><field>C:/esim_1/eSim/src/deviceModelLibrary/Transistor/NPN.lib</field></q18></devicemodel><subcircuit /><analysis><ac><field1 name="Lin">true</field1><field2 name="Dec">false</field2><field3 name="Oct">false</field3><field4 name="Start Frequency" /><field5 name="Stop Frequency" /><field6 name="No. of points" /><field7 name="Start Fre Combo">Hz</field7><field8 name="Stop Fre Combo">Hz</field8></ac><dc><field1 name="Source 1" /><field2 name="Start" /><field3 name="Increment" /><field4 name="Stop" /><field5 name="Operating Point">0</field5><field6 name="Start Combo">Volts or Amperes</field6><field7 name="Increment Combo">Volts or Amperes</field7><field8 name="Stop Combo">Volts or Amperes</field8><field9 name="Source 2" /><field10 name="Start" /><field11 name="Increment" /><field12 name="Stop" /><field13 name="Start Combo">Volts or Amperes</field13><field14 name="Increment Combo">Volts or Amperes</field14><field15 name="Stop Combo">Volts or Amperes</field15></dc><tran><field1 name="Start Time">0</field1><field2 name="Step Time">10</field2><field3 name="Stop Time">100</field3><field4 name="Start Combo">Sec</field4><field5 name="Step Combo">ms</field5><field6 name="Stop Combo">ms</field6></tran></analysis></KicadtoNgspice>
\ No newline at end of file
diff --git a/src/SubcircuitLibrary/LM3046/LM3046-cache.lib b/src/SubcircuitLibrary/LM3046/LM3046-cache.lib
deleted file mode 100644
index 27505ab7..00000000
--- a/src/SubcircuitLibrary/LM3046/LM3046-cache.lib
+++ /dev/null
@@ -1,77 +0,0 @@
-EESchema-LIBRARY Version 2.3
-#encoding utf-8
-#
-# PORT
-#
-DEF PORT U 0 40 Y Y 26 F N
-F0 "U" 50 100 30 H V C CNN
-F1 "PORT" 0 0 30 H V C CNN
-F2 "" 0 0 60 H V C CNN
-F3 "" 0 0 60 H V C CNN
-DRAW
-A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0
-A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50
-S -100 50 100 -50 0 1 0 N
-X ~ 1 250 0 100 L 30 30 1 1 B
-X ~ 2 250 0 100 L 30 30 2 1 B
-X ~ 3 250 0 100 L 30 30 3 1 B
-X ~ 4 250 0 100 L 30 30 4 1 B
-X ~ 5 250 0 100 L 30 30 5 1 B
-X ~ 6 250 0 100 L 30 30 6 1 B
-X ~ 7 250 0 100 L 30 30 7 1 B
-X ~ 8 250 0 100 L 30 30 8 1 B
-X ~ 9 250 0 100 L 30 30 9 1 B
-X ~ 10 250 0 100 L 30 30 10 1 B
-X ~ 11 250 0 100 L 30 30 11 1 B
-X ~ 12 250 0 100 L 30 30 12 1 B
-X ~ 13 250 0 100 L 30 30 13 1 B
-X ~ 14 250 0 100 L 30 30 14 1 B
-X ~ 15 250 0 100 L 30 30 15 1 B
-X ~ 16 250 0 100 L 30 30 16 1 B
-X ~ 17 250 0 100 L 30 30 17 1 B
-X ~ 18 250 0 100 L 30 30 18 1 B
-X ~ 19 250 0 100 L 30 30 19 1 B
-X ~ 20 250 0 100 L 30 30 20 1 B
-X ~ 21 250 0 100 L 30 30 21 1 B
-X ~ 22 250 0 100 L 30 30 22 1 B
-X ~ 23 250 0 100 L 30 30 23 1 B
-X ~ 24 250 0 100 L 30 30 24 1 B
-X ~ 25 250 0 100 L 30 30 25 1 B
-X ~ 26 250 0 100 L 30 30 26 1 B
-ENDDRAW
-ENDDEF
-#
-# PWR_FLAG
-#
-DEF PWR_FLAG #FLG 0 0 N N 1 F P
-F0 "#FLG" 0 75 50 H I C CNN
-F1 "PWR_FLAG" 0 150 50 H V C CNN
-F2 "" 0 0 50 H I C CNN
-F3 "" 0 0 50 H I C CNN
-DRAW
-X pwr 1 0 0 0 U 50 50 0 0 w
-P 6 0 1 0 0 0 0 50 -40 75 0 100 40 75 0 50 N
-ENDDRAW
-ENDDEF
-#
-# eSim_NPN
-#
-DEF eSim_NPN Q 0 0 Y N 1 F N
-F0 "Q" -100 50 50 H V R CNN
-F1 "eSim_NPN" -50 150 50 H V R CNN
-F2 "" 200 100 29 H V C CNN
-F3 "" 0 0 60 H V C CNN
-ALIAS BC547 Q2N2222
-DRAW
-C 50 0 111 0 1 10 N
-P 2 0 1 0 25 25 100 100 N
-P 3 0 1 0 25 -25 100 -100 100 -100 N
-P 3 0 1 20 25 75 25 -75 25 -75 N
-P 5 0 1 0 50 -70 70 -50 90 -90 50 -70 50 -70 F
-X C 1 100 200 100 D 50 50 1 1 C
-X B 2 -200 0 225 R 50 50 1 1 I
-X E 3 100 -200 100 U 50 50 1 1 E
-ENDDRAW
-ENDDEF
-#
-#End Library
diff --git a/src/SubcircuitLibrary/LM3046/LM3046.cir b/src/SubcircuitLibrary/LM3046/LM3046.cir
deleted file mode 100644
index f9716c63..00000000
--- a/src/SubcircuitLibrary/LM3046/LM3046.cir
+++ /dev/null
@@ -1,16 +0,0 @@
-* /home/bhargav/Downloads/eSim-1.1.2/src/SubcircuitLibrary/LM3046/LM3046.cir
-
-* EESchema Netlist Version 1.1 (Spice format) creation date: Sat Jun 22 11:57:18 2019
-
-* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N
-* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0
-
-* Sheet Name: /
-Q1  Net-_Q1-Pad1_ Net-_Q1-Pad2_ Net-_Q1-Pad3_ eSim_NPN		
-Q2  Net-_Q2-Pad1_ Net-_Q2-Pad2_ Net-_Q2-Pad3_ eSim_NPN		
-Q4  Net-_Q4-Pad1_ Net-_Q4-Pad2_ Net-_Q4-Pad3_ eSim_NPN		
-Q5  Net-_Q5-Pad1_ Net-_Q5-Pad2_ Net-_Q5-Pad3_ eSim_NPN		
-Q3  Net-_Q3-Pad1_ Net-_Q3-Pad2_ Net-_Q1-Pad3_ eSim_NPN		
-U1  Net-_Q1-Pad1_ Net-_Q1-Pad2_ Net-_Q1-Pad3_ Net-_Q3-Pad2_ Net-_Q3-Pad1_ Net-_Q5-Pad2_ Net-_Q5-Pad3_ Net-_Q5-Pad1_ Net-_Q4-Pad2_ Net-_Q4-Pad3_ Net-_Q4-Pad1_ Net-_Q2-Pad2_ Net-_Q2-Pad3_ Net-_Q2-Pad1_ PORT		
-
-.end
diff --git a/src/SubcircuitLibrary/LM3046/LM3046.cir.out b/src/SubcircuitLibrary/LM3046/LM3046.cir.out
deleted file mode 100644
index 801e68d2..00000000
--- a/src/SubcircuitLibrary/LM3046/LM3046.cir.out
+++ /dev/null
@@ -1,18 +0,0 @@
-* /home/bhargav/downloads/esim-1.1.2/src/subcircuitlibrary/lm3046/lm3046.cir
-
-.include NPN.lib
-q1 net-_q1-pad1_ net-_q1-pad2_ net-_q1-pad3_ Q2N2222
-q2 net-_q2-pad1_ net-_q2-pad2_ net-_q2-pad3_ Q2N2222
-q4 net-_q4-pad1_ net-_q4-pad2_ net-_q4-pad3_ Q2N2222
-q5 net-_q5-pad1_ net-_q5-pad2_ net-_q5-pad3_ Q2N2222
-q3 net-_q3-pad1_ net-_q3-pad2_ net-_q1-pad3_ Q2N2222
-* u1  net-_q1-pad1_ net-_q1-pad2_ net-_q1-pad3_ net-_q3-pad2_ net-_q3-pad1_ net-_q5-pad2_ net-_q5-pad3_ net-_q5-pad1_ net-_q4-pad2_ net-_q4-pad3_ net-_q4-pad1_ net-_q2-pad2_ net-_q2-pad3_ net-_q2-pad1_ port
-.tran 10e-03 100e-03 0e-00
-
-* Control Statements 
-.control
-run
-print allv > plot_data_v.txt
-print alli > plot_data_i.txt
-.endc
-.end
diff --git a/src/SubcircuitLibrary/LM3046/LM3046.pro b/src/SubcircuitLibrary/LM3046/LM3046.pro
deleted file mode 100644
index 38ae7a8e..00000000
--- a/src/SubcircuitLibrary/LM3046/LM3046.pro
+++ /dev/null
@@ -1,73 +0,0 @@
-update=Fri Jun 21 16:28:59 2019
-version=1
-last_client=eeschema
-[general]
-version=1
-RootSch=
-BoardNm=
-[pcbnew]
-version=1
-LastNetListRead=
-UseCmpFile=1
-PadDrill=0.600000000000
-PadDrillOvalY=0.600000000000
-PadSizeH=1.500000000000
-PadSizeV=1.500000000000
-PcbTextSizeV=1.500000000000
-PcbTextSizeH=1.500000000000
-PcbTextThickness=0.300000000000
-ModuleTextSizeV=1.000000000000
-ModuleTextSizeH=1.000000000000
-ModuleTextSizeThickness=0.150000000000
-SolderMaskClearance=0.000000000000
-SolderMaskMinWidth=0.000000000000
-DrawSegmentWidth=0.200000000000
-BoardOutlineThickness=0.100000000000
-ModuleOutlineThickness=0.150000000000
-[cvpcb]
-version=1
-NetIExt=net
-[eeschema]
-version=1
-LibDir=../../../eSim-1.1.2/kicadSchematicLibrary
-[eeschema/libraries]
-LibName1=power
-LibName2=device
-LibName3=transistors
-LibName4=conn
-LibName5=linear
-LibName6=regul
-LibName7=74xx
-LibName8=cmos4000
-LibName9=adc-dac
-LibName10=memory
-LibName11=xilinx
-LibName12=microcontrollers
-LibName13=dsp
-LibName14=microchip
-LibName15=analog_switches
-LibName16=motorola
-LibName17=texas
-LibName18=intel
-LibName19=audio
-LibName20=interface
-LibName21=digital-audio
-LibName22=philips
-LibName23=display
-LibName24=cypress
-LibName25=siliconi
-LibName26=opto
-LibName27=atmel
-LibName28=contrib
-LibName29=valves
-LibName30=eSim_Analog
-LibName31=eSim_Devices
-LibName32=eSim_Digital
-LibName33=eSim_Hybrid
-LibName34=eSim_Plot
-LibName35=eSim_Power
-LibName36=eSim_PSpice
-LibName37=eSim_Sources
-LibName38=eSim_Subckt
-LibName39=eSim_User
-LibName40=/home/bhargav/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_Miscellaneous
diff --git a/src/SubcircuitLibrary/LM3046/LM3046.sch b/src/SubcircuitLibrary/LM3046/LM3046.sch
deleted file mode 100644
index 3ba1a18a..00000000
--- a/src/SubcircuitLibrary/LM3046/LM3046.sch
+++ /dev/null
@@ -1,326 +0,0 @@
-EESchema Schematic File Version 2
-LIBS:power
-LIBS:device
-LIBS:transistors
-LIBS:conn
-LIBS:linear
-LIBS:regul
-LIBS:74xx
-LIBS:cmos4000
-LIBS:adc-dac
-LIBS:memory
-LIBS:xilinx
-LIBS:microcontrollers
-LIBS:dsp
-LIBS:microchip
-LIBS:analog_switches
-LIBS:motorola
-LIBS:texas
-LIBS:intel
-LIBS:audio
-LIBS:interface
-LIBS:digital-audio
-LIBS:philips
-LIBS:display
-LIBS:cypress
-LIBS:siliconi
-LIBS:opto
-LIBS:atmel
-LIBS:contrib
-LIBS:valves
-LIBS:eSim_Analog
-LIBS:eSim_Devices
-LIBS:eSim_Digital
-LIBS:eSim_Hybrid
-LIBS:eSim_Plot
-LIBS:eSim_Power
-LIBS:eSim_PSpice
-LIBS:eSim_Sources
-LIBS:eSim_Subckt
-LIBS:eSim_User
-LIBS:eSim_Miscellaneous
-LIBS:LM3046-cache
-EELAYER 25 0
-EELAYER END
-$Descr A4 11693 8268
-encoding utf-8
-Sheet 1 1
-Title ""
-Date ""
-Rev ""
-Comp ""
-Comment1 ""
-Comment2 ""
-Comment3 ""
-Comment4 ""
-$EndDescr
-$Comp
-L eSim_NPN Q1
-U 1 1 5C98EC0E
-P 4150 3500
-F 0 "Q1" H 4050 3550 50  0000 R CNN
-F 1 "eSim_NPN" H 4100 3650 50  0000 R CNN
-F 2 "" H 4350 3600 29  0000 C CNN
-F 3 "" H 4150 3500 60  0000 C CNN
-	1    4150 3500
-	1    0    0    -1  
-$EndComp
-$Comp
-L eSim_NPN Q2
-U 1 1 5C98EC83
-P 4200 2400
-F 0 "Q2" H 4100 2450 50  0000 R CNN
-F 1 "eSim_NPN" H 4150 2550 50  0000 R CNN
-F 2 "" H 4400 2500 29  0000 C CNN
-F 3 "" H 4200 2400 60  0000 C CNN
-	1    4200 2400
-	-1   0    0    1   
-$EndComp
-$Comp
-L eSim_NPN Q4
-U 1 1 5C98ECC0
-P 5400 2400
-F 0 "Q4" H 5300 2450 50  0000 R CNN
-F 1 "eSim_NPN" H 5350 2550 50  0000 R CNN
-F 2 "" H 5600 2500 29  0000 C CNN
-F 3 "" H 5400 2400 60  0000 C CNN
-	1    5400 2400
-	-1   0    0    1   
-$EndComp
-$Comp
-L eSim_NPN Q5
-U 1 1 5C98ED6B
-P 6350 3450
-F 0 "Q5" H 6250 3500 50  0000 R CNN
-F 1 "eSim_NPN" H 6300 3600 50  0000 R CNN
-F 2 "" H 6550 3550 29  0000 C CNN
-F 3 "" H 6350 3450 60  0000 C CNN
-	1    6350 3450
-	1    0    0    -1  
-$EndComp
-$Comp
-L eSim_NPN Q3
-U 1 1 5C98EDA0
-P 5150 3500
-F 0 "Q3" H 5050 3550 50  0000 R CNN
-F 1 "eSim_NPN" H 5100 3650 50  0000 R CNN
-F 2 "" H 5350 3600 29  0000 C CNN
-F 3 "" H 5150 3500 60  0000 C CNN
-	1    5150 3500
-	-1   0    0    -1  
-$EndComp
-Wire Wire Line
-	4250 3700 5050 3700
-Wire Wire Line
-	4650 3700 4650 4250
-Connection ~ 4650 3700
-Wire Wire Line
-	5350 3500 5350 4250
-Wire Wire Line
-	5050 3300 5700 3300
-Wire Wire Line
-	5700 3300 5700 4250
-Wire Wire Line
-	6150 3450 6000 3450
-Wire Wire Line
-	6000 3450 6000 4250
-Wire Wire Line
-	6450 3250 6450 1700
-Wire Wire Line
-	6450 3650 6450 4250
-Wire Wire Line
-	3950 3500 3950 4250
-Wire Wire Line
-	4250 3300 4250 3200
-Wire Wire Line
-	4250 3200 3500 3200
-Wire Wire Line
-	3500 3200 3500 4250
-Wire Wire Line
-	4100 2200 4100 1700
-Wire Wire Line
-	4100 2600 3500 2600
-Wire Wire Line
-	3500 2600 3500 1700
-Wire Wire Line
-	4400 2400 4400 1700
-Wire Wire Line
-	5300 2200 5300 1700
-Wire Wire Line
-	5300 2600 4800 2600
-Wire Wire Line
-	4800 2600 4800 1700
-Wire Wire Line
-	5600 2400 5900 2400
-Wire Wire Line
-	5900 2400 5900 1700
-$Comp
-L PORT U1
-U 1 1 5C98EEE0
-P 3500 4500
-F 0 "U1" H 3550 4600 30  0000 C CNN
-F 1 "PORT" H 3500 4500 30  0000 C CNN
-F 2 "" H 3500 4500 60  0000 C CNN
-F 3 "" H 3500 4500 60  0000 C CNN
-	1    3500 4500
-	0    -1   -1   0   
-$EndComp
-$Comp
-L PORT U1
-U 2 1 5C98EF2D
-P 3950 4500
-F 0 "U1" H 4000 4600 30  0000 C CNN
-F 1 "PORT" H 3950 4500 30  0000 C CNN
-F 2 "" H 3950 4500 60  0000 C CNN
-F 3 "" H 3950 4500 60  0000 C CNN
-	2    3950 4500
-	0    -1   -1   0   
-$EndComp
-$Comp
-L PORT U1
-U 3 1 5C98EF86
-P 4650 4500
-F 0 "U1" H 4700 4600 30  0000 C CNN
-F 1 "PORT" H 4650 4500 30  0000 C CNN
-F 2 "" H 4650 4500 60  0000 C CNN
-F 3 "" H 4650 4500 60  0000 C CNN
-	3    4650 4500
-	0    -1   -1   0   
-$EndComp
-$Comp
-L PORT U1
-U 4 1 5C98EFBD
-P 5350 4500
-F 0 "U1" H 5400 4600 30  0000 C CNN
-F 1 "PORT" H 5350 4500 30  0000 C CNN
-F 2 "" H 5350 4500 60  0000 C CNN
-F 3 "" H 5350 4500 60  0000 C CNN
-	4    5350 4500
-	0    -1   -1   0   
-$EndComp
-$Comp
-L PORT U1
-U 5 1 5C98EFF0
-P 5700 4500
-F 0 "U1" H 5750 4600 30  0000 C CNN
-F 1 "PORT" H 5700 4500 30  0000 C CNN
-F 2 "" H 5700 4500 60  0000 C CNN
-F 3 "" H 5700 4500 60  0000 C CNN
-	5    5700 4500
-	0    -1   -1   0   
-$EndComp
-$Comp
-L PORT U1
-U 6 1 5C98F02D
-P 6000 4500
-F 0 "U1" H 6050 4600 30  0000 C CNN
-F 1 "PORT" H 6000 4500 30  0000 C CNN
-F 2 "" H 6000 4500 60  0000 C CNN
-F 3 "" H 6000 4500 60  0000 C CNN
-	6    6000 4500
-	0    -1   -1   0   
-$EndComp
-$Comp
-L PORT U1
-U 7 1 5C98F05E
-P 6450 4500
-F 0 "U1" H 6500 4600 30  0000 C CNN
-F 1 "PORT" H 6450 4500 30  0000 C CNN
-F 2 "" H 6450 4500 60  0000 C CNN
-F 3 "" H 6450 4500 60  0000 C CNN
-	7    6450 4500
-	0    -1   -1   0   
-$EndComp
-$Comp
-L PORT U1
-U 8 1 5C98F0C3
-P 6450 1450
-F 0 "U1" H 6500 1550 30  0000 C CNN
-F 1 "PORT" H 6450 1450 30  0000 C CNN
-F 2 "" H 6450 1450 60  0000 C CNN
-F 3 "" H 6450 1450 60  0000 C CNN
-	8    6450 1450
-	0    1    1    0   
-$EndComp
-$Comp
-L PWR_FLAG #FLG01
-U 1 1 5C9CD7BF
-P 6050 4250
-F 0 "#FLG01" H 6050 4345 50  0001 C CNN
-F 1 "PWR_FLAG" H 6050 4430 50  0000 C CNN
-F 2 "" H 6050 4250 50  0000 C CNN
-F 3 "" H 6050 4250 50  0000 C CNN
-	1    6050 4250
-	0    1    1    0   
-$EndComp
-Wire Wire Line
-	6000 4250 6050 4250
-Wire Wire Line
-	5600 2450 5600 2400
-$Comp
-L PORT U1
-U 9 1 5D0CBFBB
-P 5900 1450
-F 0 "U1" H 5950 1550 30  0000 C CNN
-F 1 "PORT" H 5900 1450 30  0000 C CNN
-F 2 "" H 5900 1450 60  0000 C CNN
-F 3 "" H 5900 1450 60  0000 C CNN
-	9    5900 1450
-	0    1    1    0   
-$EndComp
-$Comp
-L PORT U1
-U 10 1 5D0CC62F
-P 5300 1450
-F 0 "U1" H 5350 1550 30  0000 C CNN
-F 1 "PORT" H 5300 1450 30  0000 C CNN
-F 2 "" H 5300 1450 60  0000 C CNN
-F 3 "" H 5300 1450 60  0000 C CNN
-	10   5300 1450
-	0    1    1    0   
-$EndComp
-$Comp
-L PORT U1
-U 11 1 5D0CC70E
-P 4800 1450
-F 0 "U1" H 4850 1550 30  0000 C CNN
-F 1 "PORT" H 4800 1450 30  0000 C CNN
-F 2 "" H 4800 1450 60  0000 C CNN
-F 3 "" H 4800 1450 60  0000 C CNN
-	11   4800 1450
-	0    1    1    0   
-$EndComp
-$Comp
-L PORT U1
-U 12 1 5D0CC84E
-P 4400 1450
-F 0 "U1" H 4450 1550 30  0000 C CNN
-F 1 "PORT" H 4400 1450 30  0000 C CNN
-F 2 "" H 4400 1450 60  0000 C CNN
-F 3 "" H 4400 1450 60  0000 C CNN
-	12   4400 1450
-	0    1    1    0   
-$EndComp
-$Comp
-L PORT U1
-U 14 1 5D0CC96F
-P 3500 1450
-F 0 "U1" H 3550 1550 30  0000 C CNN
-F 1 "PORT" H 3500 1450 30  0000 C CNN
-F 2 "" H 3500 1450 60  0000 C CNN
-F 3 "" H 3500 1450 60  0000 C CNN
-	14   3500 1450
-	0    1    1    0   
-$EndComp
-$Comp
-L PORT U1
-U 13 1 5D0CC9BD
-P 4100 1450
-F 0 "U1" H 4150 1550 30  0000 C CNN
-F 1 "PORT" H 4100 1450 30  0000 C CNN
-F 2 "" H 4100 1450 60  0000 C CNN
-F 3 "" H 4100 1450 60  0000 C CNN
-	13   4100 1450
-	0    1    1    0   
-$EndComp
-$EndSCHEMATC
diff --git a/src/SubcircuitLibrary/LM3046/LM3046.sub b/src/SubcircuitLibrary/LM3046/LM3046.sub
deleted file mode 100644
index 251364bb..00000000
--- a/src/SubcircuitLibrary/LM3046/LM3046.sub
+++ /dev/null
@@ -1,12 +0,0 @@
-* Subcircuit LM3046
-.subckt LM3046 net-_q1-pad1_ net-_q1-pad2_ net-_q1-pad3_ net-_q3-pad2_ net-_q3-pad1_ net-_q5-pad2_ net-_q5-pad3_ net-_q5-pad1_ net-_q4-pad2_ net-_q4-pad3_ net-_q4-pad1_ net-_q2-pad2_ net-_q2-pad3_ net-_q2-pad1_ 
-* /home/bhargav/downloads/esim-1.1.2/src/subcircuitlibrary/lm3046/lm3046.cir
-.include NPN.lib
-q1 net-_q1-pad1_ net-_q1-pad2_ net-_q1-pad3_ Q2N2222
-q2 net-_q2-pad1_ net-_q2-pad2_ net-_q2-pad3_ Q2N2222
-q4 net-_q4-pad1_ net-_q4-pad2_ net-_q4-pad3_ Q2N2222
-q5 net-_q5-pad1_ net-_q5-pad2_ net-_q5-pad3_ Q2N2222
-q3 net-_q3-pad1_ net-_q3-pad2_ net-_q1-pad3_ Q2N2222
-* Control Statements
-
-.ends LM3046
\ No newline at end of file
diff --git a/src/SubcircuitLibrary/LM3046/LM3046.xml b/src/SubcircuitLibrary/LM3046/LM3046.xml
deleted file mode 100644
index 94884e43..00000000
--- a/src/SubcircuitLibrary/LM3046/LM3046.xml
+++ /dev/null
@@ -1,177 +0,0 @@
-<?xml version="1.0" encoding="UTF-8"?>
-<export version="D">
-  <design>
-    <source>C:/esim_1/eSim/src/SubcircuitLibrary/LM3046/LM3046.sch</source>
-    <date>03/27/19 23:15:04</date>
-    <tool>Eeschema 4.0.2-stable</tool>
-    <sheet number="1" name="/" tstamps="/">
-      <title_block>
-        <title/>
-        <company/>
-        <rev/>
-        <date/>
-        <source>LM3046.sch</source>
-        <comment number="1" value=""/>
-        <comment number="2" value=""/>
-        <comment number="3" value=""/>
-        <comment number="4" value=""/>
-      </title_block>
-    </sheet>
-  </design>
-  <components>
-    <comp ref="Q1">
-      <value>eSim_NPN</value>
-      <libsource lib="eSim_Devices" part="eSim_NPN"/>
-      <sheetpath names="/" tstamps="/"/>
-      <tstamp>5C98EC0E</tstamp>
-    </comp>
-    <comp ref="Q2">
-      <value>eSim_NPN</value>
-      <libsource lib="eSim_Devices" part="eSim_NPN"/>
-      <sheetpath names="/" tstamps="/"/>
-      <tstamp>5C98EC83</tstamp>
-    </comp>
-    <comp ref="Q4">
-      <value>eSim_NPN</value>
-      <libsource lib="eSim_Devices" part="eSim_NPN"/>
-      <sheetpath names="/" tstamps="/"/>
-      <tstamp>5C98ECC0</tstamp>
-    </comp>
-    <comp ref="Q5">
-      <value>eSim_NPN</value>
-      <libsource lib="eSim_Devices" part="eSim_NPN"/>
-      <sheetpath names="/" tstamps="/"/>
-      <tstamp>5C98ED6B</tstamp>
-    </comp>
-    <comp ref="Q3">
-      <value>eSim_NPN</value>
-      <libsource lib="eSim_Devices" part="eSim_NPN"/>
-      <sheetpath names="/" tstamps="/"/>
-      <tstamp>5C98EDA0</tstamp>
-    </comp>
-    <comp ref="U1">
-      <value>PORT</value>
-      <libsource lib="eSim_Miscellaneous" part="PORT"/>
-      <sheetpath names="/" tstamps="/"/>
-      <tstamp>5C98EEE0</tstamp>
-    </comp>
-  </components>
-  <libparts>
-    <libpart lib="eSim_Miscellaneous" part="PORT">
-      <fields>
-        <field name="Reference">U</field>
-        <field name="Value">PORT</field>
-      </fields>
-      <pins>
-        <pin num="1" name="~" type="BiDi"/>
-        <pin num="2" name="~" type="BiDi"/>
-        <pin num="3" name="~" type="BiDi"/>
-        <pin num="4" name="~" type="BiDi"/>
-        <pin num="5" name="~" type="BiDi"/>
-        <pin num="6" name="~" type="BiDi"/>
-        <pin num="7" name="~" type="BiDi"/>
-        <pin num="8" name="~" type="BiDi"/>
-        <pin num="9" name="~" type="BiDi"/>
-        <pin num="10" name="~" type="BiDi"/>
-        <pin num="11" name="~" type="BiDi"/>
-        <pin num="12" name="~" type="BiDi"/>
-        <pin num="13" name="~" type="BiDi"/>
-        <pin num="14" name="~" type="BiDi"/>
-        <pin num="15" name="~" type="BiDi"/>
-        <pin num="16" name="~" type="BiDi"/>
-        <pin num="17" name="~" type="BiDi"/>
-        <pin num="18" name="~" type="BiDi"/>
-        <pin num="19" name="~" type="BiDi"/>
-        <pin num="20" name="~" type="BiDi"/>
-        <pin num="21" name="~" type="BiDi"/>
-        <pin num="22" name="~" type="BiDi"/>
-        <pin num="23" name="~" type="BiDi"/>
-        <pin num="24" name="~" type="BiDi"/>
-        <pin num="25" name="~" type="BiDi"/>
-        <pin num="26" name="~" type="BiDi"/>
-      </pins>
-    </libpart>
-    <libpart lib="eSim_Devices" part="eSim_NPN">
-      <aliases>
-        <alias>BC547</alias>
-        <alias>Q2N2222</alias>
-      </aliases>
-      <fields>
-        <field name="Reference">Q</field>
-        <field name="Value">eSim_NPN</field>
-      </fields>
-      <pins>
-        <pin num="1" name="C" type="openCol"/>
-        <pin num="2" name="B" type="input"/>
-        <pin num="3" name="E" type="openEm"/>
-      </pins>
-    </libpart>
-  </libparts>
-  <libraries>
-    <library logical="eSim_Miscellaneous">
-      <uri>C:\Program Files (x86)\KiCad\share\library\eSim_Miscellaneous.lib</uri>
-    </library>
-    <library logical="eSim_Devices">
-      <uri>C:\Program Files (x86)\KiCad\share\library\eSim_Devices.lib</uri>
-    </library>
-  </libraries>
-  <nets>
-    <net code="1" name="Net-(Q1-Pad1)">
-      <node ref="Q1" pin="1"/>
-      <node ref="U1" pin="1"/>
-    </net>
-    <net code="2" name="Net-(Q2-Pad3)">
-      <node ref="Q2" pin="3"/>
-      <node ref="U1" pin="13"/>
-    </net>
-    <net code="3" name="Net-(Q2-Pad1)">
-      <node ref="Q2" pin="1"/>
-      <node ref="U1" pin="14"/>
-    </net>
-    <net code="4" name="Net-(Q2-Pad2)">
-      <node ref="Q2" pin="2"/>
-      <node ref="U1" pin="12"/>
-    </net>
-    <net code="5" name="Net-(Q4-Pad3)">
-      <node ref="Q4" pin="3"/>
-      <node ref="U1" pin="10"/>
-    </net>
-    <net code="6" name="Net-(Q4-Pad1)">
-      <node ref="Q4" pin="1"/>
-      <node ref="U1" pin="11"/>
-    </net>
-    <net code="7" name="Net-(Q4-Pad2)">
-      <node ref="Q4" pin="2"/>
-      <node ref="U1" pin="9"/>
-    </net>
-    <net code="8" name="Net-(Q1-Pad3)">
-      <node ref="Q3" pin="3"/>
-      <node ref="Q1" pin="3"/>
-      <node ref="U1" pin="3"/>
-    </net>
-    <net code="9" name="Net-(Q3-Pad2)">
-      <node ref="Q3" pin="2"/>
-      <node ref="U1" pin="4"/>
-    </net>
-    <net code="10" name="Net-(Q1-Pad2)">
-      <node ref="Q1" pin="2"/>
-      <node ref="U1" pin="2"/>
-    </net>
-    <net code="11" name="Net-(Q5-Pad1)">
-      <node ref="Q5" pin="1"/>
-      <node ref="U1" pin="8"/>
-    </net>
-    <net code="12" name="Net-(Q5-Pad2)">
-      <node ref="U1" pin="6"/>
-      <node ref="Q5" pin="2"/>
-    </net>
-    <net code="13" name="Net-(Q5-Pad3)">
-      <node ref="U1" pin="7"/>
-      <node ref="Q5" pin="3"/>
-    </net>
-    <net code="14" name="Net-(Q3-Pad1)">
-      <node ref="U1" pin="5"/>
-      <node ref="Q3" pin="1"/>
-    </net>
-  </nets>
-</export>
diff --git a/src/SubcircuitLibrary/LM3046/LM3046_Previous_Values.xml b/src/SubcircuitLibrary/LM3046/LM3046_Previous_Values.xml
deleted file mode 100644
index 0b34a8e5..00000000
--- a/src/SubcircuitLibrary/LM3046/LM3046_Previous_Values.xml
+++ /dev/null
@@ -1 +0,0 @@
-<KicadtoNgspice><source /><model /><devicemodel><q1><field>/home/bhargav/Downloads/eSim-1.1.2/src/deviceModelLibrary/Transistor/NPN.lib</field></q1><q3><field>/home/bhargav/Downloads/eSim-1.1.2/src/deviceModelLibrary/Transistor/NPN.lib</field></q3><q2><field>/home/bhargav/Downloads/eSim-1.1.2/src/deviceModelLibrary/Transistor/NPN.lib</field></q2><q5><field>/home/bhargav/Downloads/eSim-1.1.2/src/deviceModelLibrary/Transistor/NPN.lib</field></q5><q4><field>/home/bhargav/Downloads/eSim-1.1.2/src/deviceModelLibrary/Transistor/NPN.lib</field></q4></devicemodel><subcircuit /><analysis><ac><field1 name="Lin">true</field1><field2 name="Dec">false</field2><field3 name="Oct">false</field3><field4 name="Start Frequency" /><field5 name="Stop Frequency" /><field6 name="No. of points" /><field7 name="Start Fre Combo">Hz</field7><field8 name="Stop Fre Combo">Hz</field8></ac><dc><field1 name="Source 1" /><field2 name="Start" /><field3 name="Increment" /><field4 name="Stop" /><field5 name="Operating Point">0</field5><field6 name="Start Combo">Volts or Amperes</field6><field7 name="Increment Combo">Volts or Amperes</field7><field8 name="Stop Combo">Volts or Amperes</field8><field9 name="Source 2" /><field10 name="Start" /><field11 name="Increment" /><field12 name="Stop" /><field13 name="Start Combo">Volts or Amperes</field13><field14 name="Increment Combo">Volts or Amperes</field14><field15 name="Stop Combo">Volts or Amperes</field15></dc><tran><field1 name="Start Time">0</field1><field2 name="Step Time">10</field2><field3 name="Stop Time">100</field3><field4 name="Start Combo">Sec</field4><field5 name="Step Combo">ms</field5><field6 name="Stop Combo">ms</field6></tran></analysis></KicadtoNgspice>
\ No newline at end of file
diff --git a/src/SubcircuitLibrary/LM3046/analysis b/src/SubcircuitLibrary/LM3046/analysis
deleted file mode 100644
index d5e13546..00000000
--- a/src/SubcircuitLibrary/LM3046/analysis
+++ /dev/null
@@ -1 +0,0 @@
-.tran 10e-03 100e-03 0e-00
\ No newline at end of file
diff --git a/src/SubcircuitLibrary/LM565/LM565-cache.lib b/src/SubcircuitLibrary/LM565/LM565-cache.lib
deleted file mode 100644
index dd2449b9..00000000
--- a/src/SubcircuitLibrary/LM565/LM565-cache.lib
+++ /dev/null
@@ -1,114 +0,0 @@
-EESchema-LIBRARY Version 2.3

-#encoding utf-8

-#

-# PORT

-#

-DEF PORT U 0 40 Y Y 26 F N

-F0 "U" 50 100 30 H V C CNN

-F1 "PORT" 0 0 30 H V C CNN

-F2 "" 0 0 60 H V C CNN

-F3 "" 0 0 60 H V C CNN

-DRAW

-A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0

-A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50

-S -100 50 100 -50 0 1 0 N

-X ~ 1 250 0 100 L 30 30 1 1 I

-X ~ 2 250 0 100 L 30 30 2 1 I

-X ~ 3 250 0 100 L 30 30 3 1 I

-X ~ 4 250 0 100 L 30 30 4 1 I

-X ~ 5 250 0 100 L 30 30 5 1 I

-X ~ 6 250 0 100 L 30 30 6 1 I

-X ~ 7 250 0 100 L 30 30 7 1 I

-X ~ 8 250 0 100 L 30 30 8 1 I

-X ~ 9 250 0 100 L 30 30 9 1 I

-X ~ 10 250 0 100 L 30 30 10 1 I

-X ~ 11 250 0 100 L 30 30 11 1 I

-X ~ 12 250 0 100 L 30 30 12 1 I

-X ~ 13 250 0 100 L 30 30 13 1 I

-X ~ 14 250 0 100 L 30 30 14 1 I

-X ~ 15 250 0 100 L 30 30 15 1 I

-X ~ 16 250 0 100 L 30 30 16 1 I

-X ~ 17 250 0 100 L 30 30 17 1 I

-X ~ 18 250 0 100 L 30 30 18 1 I

-X ~ 19 250 0 100 L 30 30 19 1 I

-X ~ 20 250 0 100 L 30 30 20 1 I

-X ~ 21 250 0 100 L 30 30 21 1 I

-X ~ 22 250 0 100 L 30 30 22 1 I

-X ~ 23 250 0 100 L 30 30 23 1 I

-X ~ 24 250 0 100 L 30 30 24 1 I

-X ~ 25 250 0 100 L 30 30 25 1 I

-X ~ 26 250 0 100 L 30 30 26 1 I

-ENDDRAW

-ENDDEF

-#

-# PWR_FLAG

-#

-DEF PWR_FLAG #FLG 0 0 N N 1 F P

-F0 "#FLG" 0 95 50 H I C CNN

-F1 "PWR_FLAG" 0 180 50 H V C CNN

-F2 "" 0 0 50 H V C CNN

-F3 "" 0 0 50 H V C CNN

-DRAW

-X pwr 1 0 0 0 U 20 20 0 0 w

-P 6 0 1 0  0 0  0 50  -75 100  0 150  75 100  0 50 N

-ENDDRAW

-ENDDEF

-#

-# eSim_NPN

-#

-DEF eSim_NPN Q 0 0 Y N 1 F N

-F0 "Q" -100 50 50 H V R CNN

-F1 "eSim_NPN" -50 150 50 H V R CNN

-F2 "" 200 100 29 H V C CNN

-F3 "" 0 0 60 H V C CNN

-ALIAS BC547 Q2N2222

-DRAW

-C 50 0 111 0 1 10 N

-P 2 0 1 0  25 25  100 100 N

-P 3 0 1 0  25 -25  100 -100  100 -100 N

-P 3 0 1 20  25 75  25 -75  25 -75 N

-P 5 0 1 0  50 -70  70 -50  90 -90  50 -70  50 -70 F

-X C 1 100 200 100 D 50 50 1 1 C

-X B 2 -200 0 225 R 50 50 1 1 I

-X E 3 100 -200 100 U 50 50 1 1 E

-ENDDRAW

-ENDDEF

-#

-# eSim_PNP

-#

-DEF eSim_PNP Q 0 0 Y N 1 F N

-F0 "Q" -100 50 50 H V R CNN

-F1 "eSim_PNP" -50 150 50 H V R CNN

-F2 "" 200 100 29 H V C CNN

-F3 "" 0 0 60 H V C CNN

-DRAW

-C 50 0 111 0 1 10 N

-P 2 0 1 0  25 25  100 100 N

-P 3 0 1 0  25 -25  100 -100  100 -100 N

-P 3 0 1 20  25 75  25 -75  25 -75 N

-P 5 0 1 0  90 -70  70 -90  50 -50  90 -70  90 -70 F

-X C 1 100 200 100 D 50 50 1 1 C

-X B 2 -200 0 225 R 50 50 1 1 I

-X E 3 100 -200 100 U 50 50 1 1 E

-ENDDRAW

-ENDDEF

-#

-# eSim_R

-#

-DEF eSim_R R 0 0 N Y 1 F N

-F0 "R" 50 130 50 H V C CNN

-F1 "eSim_R" 50 50 50 H V C CNN

-F2 "" 50 -20 30 H V C CNN

-F3 "" 50 50 30 V V C CNN

-$FPLIST

- R_*

- Resistor_*

-$ENDFPLIST

-DRAW

-S 150 10 -50 90 0 1 10 N

-X ~ 1 -100 50 50 R 60 60 1 1 P

-X ~ 2 200 50 50 L 60 60 1 1 P

-ENDDRAW

-ENDDEF

-#

-#End Library

diff --git a/src/SubcircuitLibrary/LM565/LM565.cir b/src/SubcircuitLibrary/LM565/LM565.cir
deleted file mode 100644
index c1f63f94..00000000
--- a/src/SubcircuitLibrary/LM565/LM565.cir
+++ /dev/null
@@ -1,78 +0,0 @@
-* C:\esim_1\eSim\src\SubcircuitLibrary\LM565\LM565.cir

-

-* EESchema Netlist Version 1.1 (Spice format) creation date: 03/31/19 18:47:10

-

-* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N

-* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0

-

-* Sheet Name: /

-R1  +Vcc Net-_Q1-Pad1_ 7.2k		

-R3  +Vcc Net-_Q14-Pad2_ 7.2k		

-Q4  Net-_Q14-Pad2_ Net-_Q14-Pad2_ Net-_Q1-Pad1_ eSim_NPN		

-Q5  Net-_Q1-Pad1_ Net-_Q1-Pad1_ Net-_Q14-Pad2_ eSim_NPN		

-Q10  Net-_Q10-Pad1_ Net-_Q10-Pad1_ +Vcc eSim_NPN		

-R4  +Vcc Net-_Q3-Pad2_ 5.7k		

-R6  +Vcc Reference_output 1.75k		

-R7  Reference_output Net-_Q1-Pad2_ 3.8k		

-Q12  +Vcc Net-_Q1-Pad1_ Net-_Q12-Pad3_ eSim_NPN		

-Q14  Vco_control_voltage Net-_Q14-Pad2_ Net-_Q14-Pad3_ eSim_NPN		

-R12  +Vcc Vco_control_voltage 3.6K		

-Q1  Net-_Q1-Pad1_ Net-_Q1-Pad2_ Net-_Q1-Pad3_ eSim_NPN		

-Q3  Net-_Q14-Pad2_ Net-_Q3-Pad2_ Net-_Q1-Pad3_ eSim_NPN		

-Q7  Net-_Q1-Pad1_ Net-_Q3-Pad2_ Net-_Q7-Pad3_ eSim_NPN		

-Q9  Net-_Q14-Pad2_ Net-_Q1-Pad2_ Net-_Q7-Pad3_ eSim_NPN		

-R5  Net-_Q3-Pad2_ -Vcc 13k		

-Q2  Net-_Q1-Pad3_ Input Net-_Q2-Pad3_ eSim_NPN		

-Q8  Net-_Q7-Pad3_ Input Net-_Q2-Pad3_ eSim_NPN		

-Q6  Net-_Q2-Pad3_ Net-_Q11-Pad1_ Net-_Q6-Pad3_ eSim_NPN		

-R2  Net-_Q6-Pad3_ -Vcc 200		

-R8  Net-_Q1-Pad2_ Net-_Q11-Pad1_ 8.1K		

-R10  Net-_Q12-Pad3_ Net-_Q13-Pad1_ 1K		

-R13  Net-_Q14-Pad3_ Net-_Q13-Pad1_ 1K		

-Q13  Net-_Q13-Pad1_ Net-_Q11-Pad1_ Net-_Q13-Pad3_ eSim_NPN		

-Q11  Net-_Q11-Pad1_ Net-_Q11-Pad1_ Net-_Q11-Pad3_ eSim_NPN		

-R9  Net-_Q11-Pad3_ -Vcc 200		

-R11  Net-_Q13-Pad3_ -Vcc 205		

-Q16  Timming_resistor Vco_control_voltage Net-_Q15-Pad2_ eSim_NPN		

-Q18  Net-_Q15-Pad2_ Net-_Q18-Pad2_ Net-_Q17-Pad1_ eSim_NPN		

-Q20  Net-_Q18-Pad2_ Net-_Q18-Pad2_ Net-_Q17-Pad1_ eSim_NPN		

-Q17  Net-_Q17-Pad1_ Net-_Q17-Pad1_ Net-_Q17-Pad3_ eSim_NPN		

-Q21  Timing_capacitor Timing_capacitor Net-_Q17-Pad1_ eSim_PNP		

-Q22  Timing_capacitor Net-_Q17-Pad3_ Net-_Q19-Pad2_ eSim_NPN		

-Q19  Net-_Q17-Pad3_ Net-_Q19-Pad2_ Net-_Q19-Pad3_ eSim_NPN		

-Q23  Net-_Q19-Pad2_ Net-_Q19-Pad2_ Net-_Q23-Pad3_ eSim_NPN		

-R14  Net-_Q19-Pad3_ Net-_Q24-Pad1_ 530		

-R15  Net-_Q23-Pad3_ Net-_Q24-Pad1_ 530		

-Q25  +Vcc Timing_capacitor Net-_Q25-Pad3_ eSim_NPN		

-R17  +Vcc Net-_Q28-Pad1_ 6.5K		

-Q28  Net-_Q28-Pad1_ Net-_Q28-Pad1_ Net-_Q25-Pad3_ eSim_PNP		

-Q27  ? Net-_Q25-Pad3_ Net-_Q27-Pad3_ eSim_NPN		

-Q30  Net-_Q28-Pad1_ Net-_Q27-Pad3_ Net-_Q30-Pad3_ eSim_NPN		

-Q31  ? Net-_Q28-Pad1_ Net-_Q31-Pad3_ eSim_NPN		

-Q32  Net-_Q32-Pad1_ Net-_Q32-Pad1_ Net-_Q28-Pad1_ eSim_PNP		

-R19  +Vcc Net-_Q32-Pad1_ 4.7k		

-Q33  Net-_Q32-Pad1_ Net-_Q31-Pad3_ Net-_Q30-Pad3_ eSim_NPN		

-R18  Net-_Q31-Pad3_ Net-_Q30-Pad3_ 8.4K		

-Q35  +Vcc Net-_Q32-Pad1_ Vco_output eSim_NPN		

-R20  Net-_Q30-Pad3_ -Vcc 2.6K		

-R22  Vco_output -Vcc 4.8K		

-Q24  Net-_Q24-Pad1_ Net-_Q24-Pad2_ -Vcc eSim_NPN		

-Q26  Net-_Q24-Pad1_ Net-_Q24-Pad1_ Net-_Q26-Pad3_ eSim_PNP		

-R16  Net-_Q24-Pad2_ -Vcc 7K		

-Q29  Net-_Q26-Pad3_ Net-_Q26-Pad3_ Net-_Q24-Pad2_ eSim_NPN		

-Q34  Net-_Q25-Pad3_ Net-_Q11-Pad1_ Net-_Q34-Pad3_ eSim_NPN		

-R21  Net-_Q34-Pad3_ -Vcc 2.4K		

-Q36  -Vcc Vco_output Net-_Q36-Pad3_ eSim_PNP		

-Q38  Net-_Q37-Pad2_ Net-_Q38-Pad2_ Net-_Q36-Pad3_ eSim_PNP		

-R23  +Vcc Net-_Q36-Pad3_ 16K		

-R24  Net-_Q37-Pad2_ Net-_Q26-Pad3_ 5.8k		

-Q37  Net-_Q36-Pad3_ Net-_Q37-Pad2_ Net-_Q26-Pad3_ eSim_NPN		

-Q40  Net-_Q38-Pad2_ Net-_Q11-Pad1_ Net-_Q40-Pad3_ eSim_NPN		

-R26  Net-_Q40-Pad3_ -Vcc 200		

-R25  +Vcc Net-_Q38-Pad2_ 4.3k		

-Q39  ? Net-_Q38-Pad2_ +Vcc eSim_NPN		

-U1  -Vcc Input Input Vco_output +Vcc Reference_output Vco_control_voltage Timming_resistor Timing_capacitor +Vcc PORT		

-Q15  ? Net-_Q15-Pad2_ Vco_control_voltage eSim_NPN		

-Q41  Net-_Q18-Pad2_ Net-_Q15-Pad2_ Timming_resistor eSim_PNP		

-

-.end

diff --git a/src/SubcircuitLibrary/LM565/LM565.cir.out b/src/SubcircuitLibrary/LM565/LM565.cir.out
deleted file mode 100644
index e39ed5f4..00000000
--- a/src/SubcircuitLibrary/LM565/LM565.cir.out
+++ /dev/null
@@ -1,81 +0,0 @@
-* c:\esim_1\esim\src\subcircuitlibrary\lm565\lm565.cir

-

-.include PNP.lib

-.include NPN.lib

-r1  +vcc net-_q1-pad1_ 7.2k

-r3  +vcc net-_q14-pad2_ 7.2k

-q4 net-_q14-pad2_ net-_q14-pad2_ net-_q1-pad1_ Q2N2222

-q5 net-_q1-pad1_ net-_q1-pad1_ net-_q14-pad2_ Q2N2222

-q10 net-_q10-pad1_ net-_q10-pad1_ +vcc Q2N2222

-r4  +vcc net-_q3-pad2_ 5.7k

-r6  +vcc reference_output 1.75k

-r7  reference_output net-_q1-pad2_ 3.8k

-q12 +vcc net-_q1-pad1_ net-_q12-pad3_ Q2N2222

-q14 vco_control_voltage net-_q14-pad2_ net-_q14-pad3_ Q2N2222

-r12  +vcc vco_control_voltage 3.6k

-q1 net-_q1-pad1_ net-_q1-pad2_ net-_q1-pad3_ Q2N2222

-q3 net-_q14-pad2_ net-_q3-pad2_ net-_q1-pad3_ Q2N2222

-q7 net-_q1-pad1_ net-_q3-pad2_ net-_q7-pad3_ Q2N2222

-q9 net-_q14-pad2_ net-_q1-pad2_ net-_q7-pad3_ Q2N2222

-r5  net-_q3-pad2_ -vcc 13k

-q2 net-_q1-pad3_ input net-_q2-pad3_ Q2N2222

-q8 net-_q7-pad3_ input net-_q2-pad3_ Q2N2222

-q6 net-_q2-pad3_ net-_q11-pad1_ net-_q6-pad3_ Q2N2222

-r2  net-_q6-pad3_ -vcc 200

-r8  net-_q1-pad2_ net-_q11-pad1_ 8.1k

-r10  net-_q12-pad3_ net-_q13-pad1_ 1k

-r13  net-_q14-pad3_ net-_q13-pad1_ 1k

-q13 net-_q13-pad1_ net-_q11-pad1_ net-_q13-pad3_ Q2N2222

-q11 net-_q11-pad1_ net-_q11-pad1_ net-_q11-pad3_ Q2N2222

-r9  net-_q11-pad3_ -vcc 200

-r11  net-_q13-pad3_ -vcc 205

-q16 timming_resistor vco_control_voltage net-_q15-pad2_ Q2N2222

-q18 net-_q15-pad2_ net-_q18-pad2_ net-_q17-pad1_ Q2N2222

-q20 net-_q18-pad2_ net-_q18-pad2_ net-_q17-pad1_ Q2N2222

-q17 net-_q17-pad1_ net-_q17-pad1_ net-_q17-pad3_ Q2N2222

-q21 timing_capacitor timing_capacitor net-_q17-pad1_ Q2N2907A

-q22 timing_capacitor net-_q17-pad3_ net-_q19-pad2_ Q2N2222

-q19 net-_q17-pad3_ net-_q19-pad2_ net-_q19-pad3_ Q2N2222

-q23 net-_q19-pad2_ net-_q19-pad2_ net-_q23-pad3_ Q2N2222

-r14  net-_q19-pad3_ net-_q24-pad1_ 530

-r15  net-_q23-pad3_ net-_q24-pad1_ 530

-q25 +vcc timing_capacitor net-_q25-pad3_ Q2N2222

-r17  +vcc net-_q28-pad1_ 6.5k

-q28 net-_q28-pad1_ net-_q28-pad1_ net-_q25-pad3_ Q2N2907A

-q27 ? net-_q25-pad3_ net-_q27-pad3_ Q2N2222

-q30 net-_q28-pad1_ net-_q27-pad3_ net-_q30-pad3_ Q2N2222

-q31 ? net-_q28-pad1_ net-_q31-pad3_ Q2N2222

-q32 net-_q32-pad1_ net-_q32-pad1_ net-_q28-pad1_ Q2N2907A

-r19  +vcc net-_q32-pad1_ 4.7k

-q33 net-_q32-pad1_ net-_q31-pad3_ net-_q30-pad3_ Q2N2222

-r18  net-_q31-pad3_ net-_q30-pad3_ 8.4k

-q35 +vcc net-_q32-pad1_ vco_output Q2N2222

-r20  net-_q30-pad3_ -vcc 2.6k

-r22  vco_output -vcc 4.8k

-q24 net-_q24-pad1_ net-_q24-pad2_ -vcc Q2N2222

-q26 net-_q24-pad1_ net-_q24-pad1_ net-_q26-pad3_ Q2N2907A

-r16  net-_q24-pad2_ -vcc 7k

-q29 net-_q26-pad3_ net-_q26-pad3_ net-_q24-pad2_ Q2N2222

-q34 net-_q25-pad3_ net-_q11-pad1_ net-_q34-pad3_ Q2N2222

-r21  net-_q34-pad3_ -vcc 2.4k

-q36 -vcc vco_output net-_q36-pad3_ Q2N2907A

-q38 net-_q37-pad2_ net-_q38-pad2_ net-_q36-pad3_ Q2N2907A

-r23  +vcc net-_q36-pad3_ 16k

-r24  net-_q37-pad2_ net-_q26-pad3_ 5.8k

-q37 net-_q36-pad3_ net-_q37-pad2_ net-_q26-pad3_ Q2N2222

-q40 net-_q38-pad2_ net-_q11-pad1_ net-_q40-pad3_ Q2N2222

-r26  net-_q40-pad3_ -vcc 200

-r25  +vcc net-_q38-pad2_ 4.3k

-q39 ? net-_q38-pad2_ +vcc Q2N2222

-* u1  -vcc input input vco_output +vcc reference_output vco_control_voltage timming_resistor timing_capacitor +vcc port

-q15 ? net-_q15-pad2_ vco_control_voltage Q2N2222

-q41 net-_q18-pad2_ net-_q15-pad2_ timming_resistor Q2N2907A

-.tran 10e-03 100e-03 0e-00

-

-* Control Statements 

-.control

-run

-print allv > plot_data_v.txt

-print alli > plot_data_i.txt

-.endc

-.end

diff --git a/src/SubcircuitLibrary/LM565/LM565.pro b/src/SubcircuitLibrary/LM565/LM565.pro
deleted file mode 100644
index 94072b3e..00000000
--- a/src/SubcircuitLibrary/LM565/LM565.pro
+++ /dev/null
@@ -1,83 +0,0 @@
-update=03/31/19 19:39:59

-version=1

-last_client=eeschema

-[general]

-version=1

-RootSch=

-BoardNm=

-[pcbnew]

-version=1

-LastNetListRead=

-UseCmpFile=1

-PadDrill=0.600000000000

-PadDrillOvalY=0.600000000000

-PadSizeH=1.500000000000

-PadSizeV=1.500000000000

-PcbTextSizeV=1.500000000000

-PcbTextSizeH=1.500000000000

-PcbTextThickness=0.300000000000

-ModuleTextSizeV=1.000000000000

-ModuleTextSizeH=1.000000000000

-ModuleTextSizeThickness=0.150000000000

-SolderMaskClearance=0.000000000000

-SolderMaskMinWidth=0.000000000000

-DrawSegmentWidth=0.200000000000

-BoardOutlineThickness=0.100000000000

-ModuleOutlineThickness=0.150000000000

-[cvpcb]

-version=1

-NetIExt=net

-[eeschema]

-version=1

-LibDir=../../../../../Program Files (x86)/KiCad/share/library

-[eeschema/libraries]

-LibName1=power

-LibName2=device

-LibName3=transistors

-LibName4=conn

-LibName5=linear

-LibName6=regul

-LibName7=74xx

-LibName8=cmos4000

-LibName9=adc-dac

-LibName10=memory

-LibName11=xilinx

-LibName12=microcontrollers

-LibName13=dsp

-LibName14=microchip

-LibName15=analog_switches

-LibName16=motorola

-LibName17=texas

-LibName18=intel

-LibName19=audio

-LibName20=interface

-LibName21=digital-audio

-LibName22=philips

-LibName23=display

-LibName24=cypress

-LibName25=siliconi

-LibName26=opto

-LibName27=atmel

-LibName28=contrib

-LibName29=valves

-LibName30=eSim_Analog

-LibName31=eSim_Devices

-LibName32=eSim_Digital

-LibName33=eSim_Hybrid

-LibName34=eSim_Miscellaneous

-LibName35=eSim_Plot

-LibName36=eSim_Power

-LibName37=eSim_PSpice

-LibName38=eSim_Sources

-LibName39=eSim_Subckt

-LibName40=eSim_User

-[schematic_editor]

-version=1

-PageLayoutDescrFile=

-PlotDirectoryName=

-SubpartIdSeparator=0

-SubpartFirstId=65

-NetFmtName=

-SpiceForceRefPrefix=0

-SpiceUseNetNumbers=0

-LabSize=60

diff --git a/src/SubcircuitLibrary/LM565/LM565.sch b/src/SubcircuitLibrary/LM565/LM565.sch
deleted file mode 100644
index 9f5ad21c..00000000
--- a/src/SubcircuitLibrary/LM565/LM565.sch
+++ /dev/null
@@ -1,1365 +0,0 @@
-EESchema Schematic File Version 2

-LIBS:power

-LIBS:device

-LIBS:transistors

-LIBS:conn

-LIBS:linear

-LIBS:regul

-LIBS:74xx

-LIBS:cmos4000

-LIBS:adc-dac

-LIBS:memory

-LIBS:xilinx

-LIBS:microcontrollers

-LIBS:dsp

-LIBS:microchip

-LIBS:analog_switches

-LIBS:motorola

-LIBS:texas

-LIBS:intel

-LIBS:audio

-LIBS:interface

-LIBS:digital-audio

-LIBS:philips

-LIBS:display

-LIBS:cypress

-LIBS:siliconi

-LIBS:opto

-LIBS:atmel

-LIBS:contrib

-LIBS:valves

-LIBS:eSim_Analog

-LIBS:eSim_Devices

-LIBS:eSim_Digital

-LIBS:eSim_Hybrid

-LIBS:eSim_Miscellaneous

-LIBS:eSim_Plot

-LIBS:eSim_Power

-LIBS:eSim_PSpice

-LIBS:eSim_Sources

-LIBS:eSim_Subckt

-LIBS:eSim_User

-LIBS:LM565-cache

-EELAYER 25 0

-EELAYER END

-$Descr A4 11693 8268

-encoding utf-8

-Sheet 1 1

-Title ""

-Date ""

-Rev ""

-Comp ""

-Comment1 ""

-Comment2 ""

-Comment3 ""

-Comment4 ""

-$EndDescr

-$Comp

-L eSim_R R1

-U 1 1 5C9D9F95

-P 850 975

-F 0 "R1" H 900 1105 50  0000 C CNN

-F 1 "7.2k" H 900 1025 50  0000 C CNN

-F 2 "" H 900 955 30  0000 C CNN

-F 3 "" V 900 1025 30  0000 C CNN

-	1    850  975 

-	0    1    1    0   

-$EndComp

-$Comp

-L eSim_R R3

-U 1 1 5C9D9FE0

-P 1550 975

-F 0 "R3" H 1600 1105 50  0000 C CNN

-F 1 "7.2k" H 1600 1025 50  0000 C CNN

-F 2 "" H 1600 955 30  0000 C CNN

-F 3 "" V 1600 1025 30  0000 C CNN

-	1    1550 975 

-	0    1    1    0   

-$EndComp

-$Comp

-L eSim_NPN Q4

-U 1 1 5C9DA013

-P 1250 1500

-F 0 "Q4" H 1150 1550 50  0000 R CNN

-F 1 "eSim_NPN" H 1200 1650 50  0000 R CNN

-F 2 "" H 1450 1600 29  0000 C CNN

-F 3 "" H 1250 1500 60  0000 C CNN

-	1    1250 1500

-	0    1    -1   0   

-$EndComp

-$Comp

-L eSim_NPN Q5

-U 1 1 5C9DA091

-P 1250 2200

-F 0 "Q5" H 1150 2250 50  0000 R CNN

-F 1 "eSim_NPN" H 1200 2350 50  0000 R CNN

-F 2 "" H 1450 2300 29  0000 C CNN

-F 3 "" H 1250 2200 60  0000 C CNN

-	1    1250 2200

-	0    -1   1    0   

-$EndComp

-$Comp

-L eSim_NPN Q10

-U 1 1 5C9DA0EA

-P 2125 1075

-F 0 "Q10" H 2025 1125 50  0000 R CNN

-F 1 "eSim_NPN" H 2075 1225 50  0000 R CNN

-F 2 "" H 2325 1175 29  0000 C CNN

-F 3 "" H 2125 1075 60  0000 C CNN

-	1    2125 1075

-	1    0    0    1   

-$EndComp

-$Comp

-L eSim_R R4

-U 1 1 5C9DA12E

-P 2425 975

-F 0 "R4" H 2475 1105 50  0000 C CNN

-F 1 "5.7k" H 2475 1025 50  0000 C CNN

-F 2 "" H 2475 955 30  0000 C CNN

-F 3 "" V 2475 1025 30  0000 C CNN

-	1    2425 975 

-	0    1    1    0   

-$EndComp

-$Comp

-L eSim_R R6

-U 1 1 5C9DA17B

-P 2925 975

-F 0 "R6" H 2975 1105 50  0000 C CNN

-F 1 "1.75k" H 2975 1025 50  0000 C CNN

-F 2 "" H 2975 955 30  0000 C CNN

-F 3 "" V 2975 1025 30  0000 C CNN

-	1    2925 975 

-	0    1    1    0   

-$EndComp

-$Comp

-L eSim_R R7

-U 1 1 5C9DA25C

-P 2925 2100

-F 0 "R7" H 2975 2230 50  0000 C CNN

-F 1 "3.8k" H 2975 2150 50  0000 C CNN

-F 2 "" H 2975 2080 30  0000 C CNN

-F 3 "" V 2975 2150 30  0000 C CNN

-	1    2925 2100

-	0    1    1    0   

-$EndComp

-$Comp

-L eSim_NPN Q12

-U 1 1 5C9DA38D

-P 3175 2525

-F 0 "Q12" H 3075 2575 50  0000 R CNN

-F 1 "eSim_NPN" H 3125 2675 50  0000 R CNN

-F 2 "" H 3375 2625 29  0000 C CNN

-F 3 "" H 3175 2525 60  0000 C CNN

-	1    3175 2525

-	1    0    0    -1  

-$EndComp

-$Comp

-L eSim_NPN Q14

-U 1 1 5C9DA3C8

-P 3850 2525

-F 0 "Q14" H 3750 2575 50  0000 R CNN

-F 1 "eSim_NPN" H 3800 2675 50  0000 R CNN

-F 2 "" H 4050 2625 29  0000 C CNN

-F 3 "" H 3850 2525 60  0000 C CNN

-	1    3850 2525

-	-1   0    0    -1  

-$EndComp

-$Comp

-L eSim_R R12

-U 1 1 5C9DA421

-P 3700 1000

-F 0 "R12" H 3750 1130 50  0000 C CNN

-F 1 "3.6K" H 3750 1050 50  0000 C CNN

-F 2 "" H 3750 980 30  0000 C CNN

-F 3 "" V 3750 1050 30  0000 C CNN

-	1    3700 1000

-	0    1    1    0   

-$EndComp

-$Comp

-L eSim_NPN Q1

-U 1 1 5C9DA843

-P 800 3100

-F 0 "Q1" H 700 3150 50  0000 R CNN

-F 1 "eSim_NPN" H 750 3250 50  0000 R CNN

-F 2 "" H 1000 3200 29  0000 C CNN

-F 3 "" H 800 3100 60  0000 C CNN

-	1    800  3100

-	1    0    0    -1  

-$EndComp

-$Comp

-L eSim_NPN Q3

-U 1 1 5C9DA87E

-P 1200 3100

-F 0 "Q3" H 1100 3150 50  0000 R CNN

-F 1 "eSim_NPN" H 1150 3250 50  0000 R CNN

-F 2 "" H 1400 3200 29  0000 C CNN

-F 3 "" H 1200 3100 60  0000 C CNN

-	1    1200 3100

-	-1   0    0    -1  

-$EndComp

-$Comp

-L eSim_NPN Q7

-U 1 1 5C9DA8BB

-P 1625 3100

-F 0 "Q7" H 1525 3150 50  0000 R CNN

-F 1 "eSim_NPN" H 1575 3250 50  0000 R CNN

-F 2 "" H 1825 3200 29  0000 C CNN

-F 3 "" H 1625 3100 60  0000 C CNN

-	1    1625 3100

-	1    0    0    -1  

-$EndComp

-$Comp

-L eSim_NPN Q9

-U 1 1 5C9DAACB

-P 2050 3100

-F 0 "Q9" H 1950 3150 50  0000 R CNN

-F 1 "eSim_NPN" H 2000 3250 50  0000 R CNN

-F 2 "" H 2250 3200 29  0000 C CNN

-F 3 "" H 2050 3100 60  0000 C CNN

-	1    2050 3100

-	-1   0    0    -1  

-$EndComp

-$Comp

-L eSim_R R5

-U 1 1 5C9DAE75

-P 2425 3300

-F 0 "R5" H 2475 3430 50  0000 C CNN

-F 1 "13k" H 2475 3350 50  0000 C CNN

-F 2 "" H 2475 3280 30  0000 C CNN

-F 3 "" V 2475 3350 30  0000 C CNN

-	1    2425 3300

-	0    1    1    0   

-$EndComp

-$Comp

-L eSim_NPN Q2

-U 1 1 5C9DBA96

-P 925 3950

-F 0 "Q2" H 825 4000 50  0000 R CNN

-F 1 "eSim_NPN" H 875 4100 50  0000 R CNN

-F 2 "" H 1125 4050 29  0000 C CNN

-F 3 "" H 925 3950 60  0000 C CNN

-	1    925  3950

-	1    0    0    -1  

-$EndComp

-$Comp

-L eSim_NPN Q8

-U 1 1 5C9DBADD

-P 1950 3950

-F 0 "Q8" H 1850 4000 50  0000 R CNN

-F 1 "eSim_NPN" H 1900 4100 50  0000 R CNN

-F 2 "" H 2150 4050 29  0000 C CNN

-F 3 "" H 1950 3950 60  0000 C CNN

-	1    1950 3950

-	-1   0    0    -1  

-$EndComp

-$Comp

-L eSim_NPN Q6

-U 1 1 5C9DBDEB

-P 1525 4850

-F 0 "Q6" H 1425 4900 50  0000 R CNN

-F 1 "eSim_NPN" H 1475 5000 50  0000 R CNN

-F 2 "" H 1725 4950 29  0000 C CNN

-F 3 "" H 1525 4850 60  0000 C CNN

-	1    1525 4850

-	-1   0    0    -1  

-$EndComp

-$Comp

-L eSim_R R2

-U 1 1 5C9DBE93

-P 1375 5300

-F 0 "R2" H 1425 5430 50  0000 C CNN

-F 1 "200" H 1425 5350 50  0000 C CNN

-F 2 "" H 1425 5280 30  0000 C CNN

-F 3 "" V 1425 5350 30  0000 C CNN

-	1    1375 5300

-	0    1    1    0   

-$EndComp

-$Comp

-L eSim_R R8

-U 1 1 5C9DC899

-P 2925 3200

-F 0 "R8" H 2975 3330 50  0000 C CNN

-F 1 "8.1K" H 2975 3250 50  0000 C CNN

-F 2 "" H 2975 3180 30  0000 C CNN

-F 3 "" V 2975 3250 30  0000 C CNN

-	1    2925 3200

-	0    1    1    0   

-$EndComp

-$Comp

-L eSim_R R10

-U 1 1 5C9DD1D1

-P 3225 3150

-F 0 "R10" H 3275 3280 50  0000 C CNN

-F 1 "1K" H 3275 3200 50  0000 C CNN

-F 2 "" H 3275 3130 30  0000 C CNN

-F 3 "" V 3275 3200 30  0000 C CNN

-	1    3225 3150

-	0    1    1    0   

-$EndComp

-$Comp

-L eSim_R R13

-U 1 1 5C9DD2D0

-P 3700 3150

-F 0 "R13" H 3750 3280 50  0000 C CNN

-F 1 "1K" H 3750 3200 50  0000 C CNN

-F 2 "" H 3750 3130 30  0000 C CNN

-F 3 "" V 3750 3200 30  0000 C CNN

-	1    3700 3150

-	0    1    1    0   

-$EndComp

-$Comp

-L eSim_NPN Q13

-U 1 1 5C9DCD03

-P 3450 4850

-F 0 "Q13" H 3350 4900 50  0000 R CNN

-F 1 "eSim_NPN" H 3400 5000 50  0000 R CNN

-F 2 "" H 3650 4950 29  0000 C CNN

-F 3 "" H 3450 4850 60  0000 C CNN

-	1    3450 4850

-	1    0    0    -1  

-$EndComp

-$Comp

-L eSim_NPN Q11

-U 1 1 5C9DCCAE

-P 2875 4850

-F 0 "Q11" H 2775 4900 50  0000 R CNN

-F 1 "eSim_NPN" H 2825 5000 50  0000 R CNN

-F 2 "" H 3075 4950 29  0000 C CNN

-F 3 "" H 2875 4850 60  0000 C CNN

-	1    2875 4850

-	1    0    0    -1  

-$EndComp

-$Comp

-L eSim_R R9

-U 1 1 5C9DDAF5

-P 2925 5375

-F 0 "R9" H 2975 5505 50  0000 C CNN

-F 1 "200" H 2975 5425 50  0000 C CNN

-F 2 "" H 2975 5355 30  0000 C CNN

-F 3 "" V 2975 5425 30  0000 C CNN

-	1    2925 5375

-	0    1    1    0   

-$EndComp

-$Comp

-L eSim_R R11

-U 1 1 5C9DDB52

-P 3500 5400

-F 0 "R11" H 3550 5530 50  0000 C CNN

-F 1 "205" H 3550 5450 50  0000 C CNN

-F 2 "" H 3550 5380 30  0000 C CNN

-F 3 "" V 3550 5450 30  0000 C CNN

-	1    3500 5400

-	0    1    1    0   

-$EndComp

-$Comp

-L eSim_NPN Q16

-U 1 1 5C9DE652

-P 4525 1150

-F 0 "Q16" H 4425 1200 50  0000 R CNN

-F 1 "eSim_NPN" H 4475 1300 50  0000 R CNN

-F 2 "" H 4725 1250 29  0000 C CNN

-F 3 "" H 4525 1150 60  0000 C CNN

-	1    4525 1150

-	1    0    0    -1  

-$EndComp

-$Comp

-L eSim_NPN Q18

-U 1 1 5C9DF30A

-P 4725 2200

-F 0 "Q18" H 4625 2250 50  0000 R CNN

-F 1 "eSim_NPN" H 4675 2350 50  0000 R CNN

-F 2 "" H 4925 2300 29  0000 C CNN

-F 3 "" H 4725 2200 60  0000 C CNN

-	1    4725 2200

-	-1   0    0    -1  

-$EndComp

-$Comp

-L eSim_NPN Q20

-U 1 1 5C9DF387

-P 5150 2200

-F 0 "Q20" H 5050 2250 50  0000 R CNN

-F 1 "eSim_NPN" H 5100 2350 50  0000 R CNN

-F 2 "" H 5350 2300 29  0000 C CNN

-F 3 "" H 5150 2200 60  0000 C CNN

-	1    5150 2200

-	1    0    0    -1  

-$EndComp

-NoConn ~ 4200 1550

-$Comp

-L eSim_NPN Q17

-U 1 1 5C9E05DE

-P 4525 2900

-F 0 "Q17" H 4425 2950 50  0000 R CNN

-F 1 "eSim_NPN" H 4475 3050 50  0000 R CNN

-F 2 "" H 4725 3000 29  0000 C CNN

-F 3 "" H 4525 2900 60  0000 C CNN

-	1    4525 2900

-	1    0    0    -1  

-$EndComp

-$Comp

-L eSim_PNP Q21

-U 1 1 5C9E063F

-P 5150 2900

-F 0 "Q21" H 5050 2950 50  0000 R CNN

-F 1 "eSim_PNP" H 5100 3050 50  0000 R CNN

-F 2 "" H 5350 3000 29  0000 C CNN

-F 3 "" H 5150 2900 60  0000 C CNN

-	1    5150 2900

-	1    0    0    1   

-$EndComp

-Wire Wire Line

-	900  1175 900  2900

-Wire Wire Line

-	900  1400 1050 1400

-Wire Wire Line

-	1450 1400 4050 1400

-Wire Wire Line

-	1600 1400 1600 1175

-Wire Wire Line

-	900  2000 1250 2000

-Connection ~ 900  1400

-Wire Wire Line

-	900  2300 1050 2300

-Connection ~ 900  2000

-Wire Wire Line

-	900  875  2975 875 

-Connection ~ 2475 875 

-Connection ~ 2225 875 

-Connection ~ 1600 875 

-Wire Wire Line

-	1925 1075 1925 1275

-Wire Wire Line

-	1925 1275 2475 1275

-Wire Wire Line

-	2475 1175 2475 3200

-Connection ~ 2225 1275

-Wire Wire Line

-	2975 1175 2975 2000

-Wire Wire Line

-	2975 1325 2725 1325

-Wire Wire Line

-	2725 1325 2725 775 

-Connection ~ 2975 1325

-Wire Wire Line

-	2225 875  2225 775 

-Wire Wire Line

-	3275 2325 3275 875 

-Wire Wire Line

-	2950 875  9575 875 

-Connection ~ 2950 875 

-Wire Wire Line

-	3750 875  3750 900 

-Connection ~ 3275 875 

-Wire Wire Line

-	3750 1200 3750 2325

-Wire Wire Line

-	4050 1400 4050 2525

-Connection ~ 1600 1400

-Wire Wire Line

-	1250 1700 1800 1700

-Wire Wire Line

-	1800 1400 1800 2650

-Connection ~ 1800 1400

-Wire Wire Line

-	1800 2300 1450 2300

-Connection ~ 1800 1700

-Wire Wire Line

-	900  2525 2975 2525

-Connection ~ 900  2300

-Wire Wire Line

-	1425 3100 1400 3100

-Wire Wire Line

-	1725 3300 1950 3300

-Wire Wire Line

-	900  3300 1100 3300

-Connection ~ 900  2525

-Wire Wire Line

-	1800 2650 1950 2650

-Wire Wire Line

-	1950 2650 1950 2900

-Connection ~ 1800 2300

-Wire Wire Line

-	1800 2600 1100 2600

-Wire Wire Line

-	1100 2600 1100 2900

-Connection ~ 1800 2600

-Wire Wire Line

-	1725 2900 1725 2525

-Connection ~ 1725 2525

-Wire Wire Line

-	1425 2800 2475 2800

-Wire Wire Line

-	1425 2800 1425 3100

-Connection ~ 2475 2800

-Wire Wire Line

-	2250 3100 2350 3100

-Wire Wire Line

-	2350 2975 2350 3525

-Wire Wire Line

-	2350 3525 525  3525

-Wire Wire Line

-	525  3525 525  3100

-Wire Wire Line

-	525  3100 600  3100

-Wire Wire Line

-	1025 3750 1025 3300

-Connection ~ 1025 3300

-Wire Wire Line

-	1850 3750 1850 3300

-Connection ~ 1850 3300

-Wire Wire Line

-	1025 4150 1850 4150

-Wire Wire Line

-	2150 3950 2150 4425

-Wire Wire Line

-	1425 4650 1425 4150

-Connection ~ 1425 4150

-Wire Wire Line

-	1425 5050 1425 5200

-Wire Wire Line

-	2475 3500 2475 6000

-Wire Wire Line

-	1425 6000 9575 6000

-Wire Wire Line

-	1425 6000 1425 5500

-Wire Wire Line

-	2975 2300 2975 3100

-Wire Wire Line

-	2975 2975 2350 2975

-Connection ~ 2350 3100

-Connection ~ 2975 2975

-Wire Wire Line

-	3750 3050 3750 2725

-Wire Wire Line

-	3275 2725 3275 3050

-Wire Wire Line

-	3275 3350 3275 3450

-Wire Wire Line

-	3275 3450 3750 3450

-Wire Wire Line

-	3750 3450 3750 3350

-Connection ~ 3550 3450

-Wire Wire Line

-	3550 3450 3550 4650

-Connection ~ 2975 4525

-Wire Wire Line

-	2675 4850 2675 4525

-Wire Wire Line

-	2675 4525 2975 4525

-Wire Wire Line

-	2975 3400 2975 4650

-Connection ~ 2675 4850

-Wire Wire Line

-	1725 4850 3250 4850

-Wire Wire Line

-	2975 5050 2975 5275

-Wire Wire Line

-	3550 5050 3550 5300

-Wire Wire Line

-	2975 6000 2975 5575

-Connection ~ 2475 6000

-Wire Wire Line

-	3550 6000 3550 5600

-Connection ~ 2975 6000

-Wire Wire Line

-	4500 1350 4950 1350

-Wire Wire Line

-	3950 1150 4325 1150

-Wire Wire Line

-	3950 800  3950 1225

-Wire Wire Line

-	3950 1225 3750 1225

-Connection ~ 3750 1225

-Connection ~ 4200 1150

-Connection ~ 3950 1150

-Wire Wire Line

-	4625 950  5250 950 

-Connection ~ 4625 1350

-Wire Wire Line

-	4900 950  4900 800 

-Connection ~ 4900 950 

-Wire Wire Line

-	4950 2200 4925 2200

-Wire Wire Line

-	5250 950  5250 1150

-Wire Wire Line

-	5250 1550 5250 2000

-Wire Wire Line

-	4625 1350 4625 2000

-Wire Wire Line

-	5250 1800 4925 1800

-Wire Wire Line

-	4925 1800 4925 2200

-Connection ~ 5250 1800

-Wire Wire Line

-	4625 2400 4625 2700

-Wire Wire Line

-	5250 2400 5250 2700

-Wire Wire Line

-	4225 2550 5250 2550

-Connection ~ 4625 2550

-Connection ~ 5250 2550

-Wire Wire Line

-	4225 2550 4225 2900

-Wire Wire Line

-	4225 2900 4325 2900

-Wire Wire Line

-	5250 3100 5250 3525

-Wire Wire Line

-	5575 3200 4900 3200

-Wire Wire Line

-	4900 3200 4900 2900

-Wire Wire Line

-	4900 2900 4950 2900

-Wire Wire Line

-	5575 800  5575 3200

-Connection ~ 5250 3200

-$Comp

-L eSim_NPN Q22

-U 1 1 5C9E12AB

-P 5150 3725

-F 0 "Q22" H 5050 3775 50  0000 R CNN

-F 1 "eSim_NPN" H 5100 3875 50  0000 R CNN

-F 2 "" H 5350 3825 29  0000 C CNN

-F 3 "" H 5150 3725 60  0000 C CNN

-	1    5150 3725

-	1    0    0    -1  

-$EndComp

-Wire Wire Line

-	4950 3725 4625 3725

-Wire Wire Line

-	4625 3100 4625 4625

-$Comp

-L eSim_NPN Q19

-U 1 1 5C9E1696

-P 4725 4825

-F 0 "Q19" H 4625 4875 50  0000 R CNN

-F 1 "eSim_NPN" H 4675 4975 50  0000 R CNN

-F 2 "" H 4925 4925 29  0000 C CNN

-F 3 "" H 4725 4825 60  0000 C CNN

-	1    4725 4825

-	-1   0    0    -1  

-$EndComp

-Connection ~ 4625 3725

-$Comp

-L eSim_NPN Q23

-U 1 1 5C9E190B

-P 5150 4825

-F 0 "Q23" H 5050 4875 50  0000 R CNN

-F 1 "eSim_NPN" H 5100 4975 50  0000 R CNN

-F 2 "" H 5350 4925 29  0000 C CNN

-F 3 "" H 5150 4825 60  0000 C CNN

-	1    5150 4825

-	1    0    0    -1  

-$EndComp

-Wire Wire Line

-	4950 4825 4925 4825

-Wire Wire Line

-	5250 3925 5250 4625

-Wire Wire Line

-	5250 4275 4925 4275

-Wire Wire Line

-	4925 4275 4925 4825

-Connection ~ 5250 4275

-$Comp

-L eSim_R R14

-U 1 1 5C9E1F6D

-P 4575 5350

-F 0 "R14" H 4625 5480 50  0000 C CNN

-F 1 "530" H 4625 5400 50  0000 C CNN

-F 2 "" H 4625 5330 30  0000 C CNN

-F 3 "" V 4625 5400 30  0000 C CNN

-	1    4575 5350

-	0    1    1    0   

-$EndComp

-$Comp

-L eSim_R R15

-U 1 1 5C9E219A

-P 5200 5350

-F 0 "R15" H 5250 5480 50  0000 C CNN

-F 1 "530" H 5250 5400 50  0000 C CNN

-F 2 "" H 5250 5330 30  0000 C CNN

-F 3 "" V 5250 5400 30  0000 C CNN

-	1    5200 5350

-	0    1    1    0   

-$EndComp

-$Comp

-L eSim_NPN Q25

-U 1 1 5C9E2EDE

-P 6050 1400

-F 0 "Q25" H 5950 1450 50  0000 R CNN

-F 1 "eSim_NPN" H 6000 1550 50  0000 R CNN

-F 2 "" H 6250 1500 29  0000 C CNN

-F 3 "" H 6050 1400 60  0000 C CNN

-	1    6050 1400

-	1    0    0    -1  

-$EndComp

-Wire Wire Line

-	5850 1400 5575 1400

-Connection ~ 5575 1400

-$Comp

-L eSim_R R17

-U 1 1 5C9E3164

-P 6800 1350

-F 0 "R17" H 6850 1480 50  0000 C CNN

-F 1 "6.5K" H 6850 1400 50  0000 C CNN

-F 2 "" H 6850 1330 30  0000 C CNN

-F 3 "" V 6850 1400 30  0000 C CNN

-	1    6800 1350

-	0    1    1    0   

-$EndComp

-Wire Wire Line

-	6850 800  6850 1250

-Wire Wire Line

-	6850 975  6150 975 

-Wire Wire Line

-	6150 975  6150 1200

-Connection ~ 6850 975 

-Connection ~ 6850 875 

-Connection ~ 3750 875 

-$Comp

-L eSim_PNP Q28

-U 1 1 5C9E3F7F

-P 6525 1875

-F 0 "Q28" H 6425 1925 50  0000 R CNN

-F 1 "eSim_PNP" H 6475 2025 50  0000 R CNN

-F 2 "" H 6725 1975 29  0000 C CNN

-F 3 "" H 6525 1875 60  0000 C CNN

-	1    6525 1875

-	0    1    -1   0   

-$EndComp

-Wire Wire Line

-	6325 1775 6150 1775

-Wire Wire Line

-	6150 1600 6150 4625

-$Comp

-L eSim_NPN Q27

-U 1 1 5C9E4448

-P 6350 2500

-F 0 "Q27" H 6250 2550 50  0000 R CNN

-F 1 "eSim_NPN" H 6300 2650 50  0000 R CNN

-F 2 "" H 6550 2600 29  0000 C CNN

-F 3 "" H 6350 2500 60  0000 C CNN

-	1    6350 2500

-	1    0    0    -1  

-$EndComp

-$Comp

-L eSim_NPN Q30

-U 1 1 5C9E4653

-P 6750 2750

-F 0 "Q30" H 6650 2800 50  0000 R CNN

-F 1 "eSim_NPN" H 6700 2900 50  0000 R CNN

-F 2 "" H 6950 2850 29  0000 C CNN

-F 3 "" H 6750 2750 60  0000 C CNN

-	1    6750 2750

-	1    0    0    -1  

-$EndComp

-Wire Wire Line

-	6550 2750 6450 2750

-Wire Wire Line

-	6450 2750 6450 2700

-Connection ~ 6150 1775

-$Comp

-L eSim_NPN Q31

-U 1 1 5C9E49F3

-P 7075 2350

-F 0 "Q31" H 6975 2400 50  0000 R CNN

-F 1 "eSim_NPN" H 7025 2500 50  0000 R CNN

-F 2 "" H 7275 2450 29  0000 C CNN

-F 3 "" H 7075 2350 60  0000 C CNN

-	1    7075 2350

-	1    0    0    -1  

-$EndComp

-$Comp

-L eSim_PNP Q32

-U 1 1 5C9E4B46

-P 7125 1875

-F 0 "Q32" H 7025 1925 50  0000 R CNN

-F 1 "eSim_PNP" H 7075 2025 50  0000 R CNN

-F 2 "" H 7325 1975 29  0000 C CNN

-F 3 "" H 7125 1875 60  0000 C CNN

-	1    7125 1875

-	0    1    -1   0   

-$EndComp

-Wire Wire Line

-	6850 1550 6850 2550

-Wire Wire Line

-	6725 1775 6925 1775

-Connection ~ 6850 1775

-$Comp

-L eSim_R R19

-U 1 1 5C9E5284

-P 7400 1225

-F 0 "R19" H 7450 1355 50  0000 C CNN

-F 1 "4.7k" H 7450 1275 50  0000 C CNN

-F 2 "" H 7450 1205 30  0000 C CNN

-F 3 "" V 7450 1275 30  0000 C CNN

-	1    7400 1225

-	0    1    1    0   

-$EndComp

-Wire Wire Line

-	7450 1425 7450 2350

-Wire Wire Line

-	7325 1775 7625 1775

-Wire Wire Line

-	7450 2075 7125 2075

-Connection ~ 7450 1775

-$Comp

-L eSim_NPN Q33

-U 1 1 5C9E59CA

-P 7375 2725

-F 0 "Q33" H 7275 2775 50  0000 R CNN

-F 1 "eSim_NPN" H 7325 2875 50  0000 R CNN

-F 2 "" H 7575 2825 29  0000 C CNN

-F 3 "" H 7375 2725 60  0000 C CNN

-	1    7375 2725

-	1    0    0    -1  

-$EndComp

-Wire Wire Line

-	7450 2350 7475 2350

-Wire Wire Line

-	7475 2350 7475 2525

-Connection ~ 7450 2075

-Wire Wire Line

-	7175 2550 7175 3000

-$Comp

-L eSim_R R18

-U 1 1 5C9E62BC

-P 7125 3100

-F 0 "R18" H 7175 3230 50  0000 C CNN

-F 1 "8.4K" H 7175 3150 50  0000 C CNN

-F 2 "" H 7175 3080 30  0000 C CNN

-F 3 "" V 7175 3150 30  0000 C CNN

-	1    7125 3100

-	0    1    1    0   

-$EndComp

-Connection ~ 7175 2725

-Wire Wire Line

-	6850 2950 6850 3300

-Wire Wire Line

-	6850 3300 7475 3300

-Wire Wire Line

-	7475 2925 7475 3600

-Connection ~ 7175 3300

-Wire Wire Line

-	7450 875  7450 1125

-$Comp

-L eSim_NPN Q35

-U 1 1 5C9E6F03

-P 7825 1775

-F 0 "Q35" H 7725 1825 50  0000 R CNN

-F 1 "eSim_NPN" H 7775 1925 50  0000 R CNN

-F 2 "" H 8025 1875 29  0000 C CNN

-F 3 "" H 7825 1775 60  0000 C CNN

-	1    7825 1775

-	1    0    0    -1  

-$EndComp

-Wire Wire Line

-	7925 875  7925 1575

-Connection ~ 7450 875 

-$Comp

-L eSim_R R20

-U 1 1 5C9E7FB4

-P 7425 3700

-F 0 "R20" H 7475 3830 50  0000 C CNN

-F 1 "2.6K" H 7475 3750 50  0000 C CNN

-F 2 "" H 7475 3680 30  0000 C CNN

-F 3 "" V 7475 3750 30  0000 C CNN

-	1    7425 3700

-	0    1    1    0   

-$EndComp

-$Comp

-L eSim_R R22

-U 1 1 5C9E803D

-P 7875 3675

-F 0 "R22" H 7925 3805 50  0000 C CNN

-F 1 "4.8K" H 7925 3725 50  0000 C CNN

-F 2 "" H 7925 3655 30  0000 C CNN

-F 3 "" V 7925 3725 30  0000 C CNN

-	1    7875 3675

-	0    1    1    0   

-$EndComp

-Wire Wire Line

-	7925 1975 7925 3575

-Connection ~ 7475 3300

-$Comp

-L eSim_NPN Q24

-U 1 1 5C9E8FD5

-P 5650 5800

-F 0 "Q24" H 5550 5850 50  0000 R CNN

-F 1 "eSim_NPN" H 5600 5950 50  0000 R CNN

-F 2 "" H 5850 5900 29  0000 C CNN

-F 3 "" H 5650 5800 60  0000 C CNN

-	1    5650 5800

-	-1   0    0    -1  

-$EndComp

-Wire Wire Line

-	5250 5025 5250 5250

-Wire Wire Line

-	4625 5025 4625 5250

-Wire Wire Line

-	5250 5550 5250 5650

-Wire Wire Line

-	5250 5650 4625 5650

-Wire Wire Line

-	4625 5650 4625 5550

-Connection ~ 3550 6000

-Wire Wire Line

-	5550 5600 5250 5600

-Connection ~ 5250 5600

-$Comp

-L eSim_PNP Q26

-U 1 1 5C9EA5DE

-P 6150 4925

-F 0 "Q26" H 6050 4975 50  0000 R CNN

-F 1 "eSim_PNP" H 6100 5075 50  0000 R CNN

-F 2 "" H 6350 5025 29  0000 C CNN

-F 3 "" H 6150 4925 60  0000 C CNN

-	1    6150 4925

-	0    -1   -1   0   

-$EndComp

-Wire Wire Line

-	5950 4825 5550 4825

-Wire Wire Line

-	5550 4825 5550 5600

-Wire Wire Line

-	6150 5125 6150 5250

-Wire Wire Line

-	6150 5250 5550 5250

-Connection ~ 5550 5250

-$Comp

-L eSim_R R16

-U 1 1 5C9EA881

-P 6100 5800

-F 0 "R16" H 6150 5930 50  0000 C CNN

-F 1 "7K" H 6150 5850 50  0000 C CNN

-F 2 "" H 6150 5780 30  0000 C CNN

-F 3 "" V 6150 5850 30  0000 C CNN

-	1    6100 5800

-	0    1    1    0   

-$EndComp

-Connection ~ 5550 6000

-Wire Wire Line

-	5850 5800 5850 5575

-Wire Wire Line

-	5850 5575 6150 5575

-Wire Wire Line

-	6150 5575 6150 5700

-$Comp

-L eSim_NPN Q29

-U 1 1 5C9EAB2D

-P 6725 5400

-F 0 "Q29" H 6625 5450 50  0000 R CNN

-F 1 "eSim_NPN" H 6675 5550 50  0000 R CNN

-F 2 "" H 6925 5500 29  0000 C CNN

-F 3 "" H 6725 5400 60  0000 C CNN

-	1    6725 5400

-	-1   0    0    -1  

-$EndComp

-Wire Wire Line

-	6625 5600 6150 5600

-Connection ~ 6150 5600

-Wire Wire Line

-	6625 5200 6625 4825

-Wire Wire Line

-	6350 4825 9075 4825

-Wire Wire Line

-	6925 5400 7000 5400

-Wire Wire Line

-	7000 5400 7000 4825

-Connection ~ 6625 4825

-$Comp

-L eSim_NPN Q34

-U 1 1 5C9EB3F8

-P 7625 5075

-F 0 "Q34" H 7525 5125 50  0000 R CNN

-F 1 "eSim_NPN" H 7575 5225 50  0000 R CNN

-F 2 "" H 7825 5175 29  0000 C CNN

-F 3 "" H 7625 5075 60  0000 C CNN

-	1    7625 5075

-	-1   0    0    -1  

-$EndComp

-$Comp

-L eSim_R R21

-U 1 1 5C9EB4C7

-P 7475 5750

-F 0 "R21" H 7525 5880 50  0000 C CNN

-F 1 "2.4K" H 7525 5800 50  0000 C CNN

-F 2 "" H 7525 5730 30  0000 C CNN

-F 3 "" V 7525 5800 30  0000 C CNN

-	1    7475 5750

-	0    1    1    0   

-$EndComp

-Wire Wire Line

-	7525 5275 7525 5650

-Wire Wire Line

-	7525 6000 7525 5950

-Connection ~ 6150 6000

-Wire Wire Line

-	7525 4875 7525 4625

-Wire Wire Line

-	7525 4625 6150 4625

-Connection ~ 6150 2500

-NoConn ~ 6450 2300

-NoConn ~ 7175 2150

-Wire Wire Line

-	7475 3900 7475 4425

-Wire Wire Line

-	7475 4425 7875 4425

-Wire Wire Line

-	7875 4425 7875 6000

-Connection ~ 7525 6000

-Wire Wire Line

-	7925 6000 7925 3875

-Connection ~ 7875 6000

-$Comp

-L eSim_PNP Q36

-U 1 1 5C9EEDA4

-P 8475 2300

-F 0 "Q36" H 8375 2350 50  0000 R CNN

-F 1 "eSim_PNP" H 8425 2450 50  0000 R CNN

-F 2 "" H 8675 2400 29  0000 C CNN

-F 3 "" H 8475 2300 60  0000 C CNN

-	1    8475 2300

-	1    0    0    1   

-$EndComp

-Wire Wire Line

-	7925 2300 8275 2300

-Connection ~ 7925 2300

-Wire Wire Line

-	8575 2500 8575 6275

-Connection ~ 7925 6000

-$Comp

-L eSim_PNP Q38

-U 1 1 5C9F04CE

-P 9175 2300

-F 0 "Q38" H 9075 2350 50  0000 R CNN

-F 1 "eSim_PNP" H 9125 2450 50  0000 R CNN

-F 2 "" H 9375 2400 29  0000 C CNN

-F 3 "" H 9175 2300 60  0000 C CNN

-	1    9175 2300

-	-1   0    0    1   

-$EndComp

-Wire Wire Line

-	8575 2100 9075 2100

-$Comp

-L eSim_R R23

-U 1 1 5C9F0909

-P 8800 1275

-F 0 "R23" H 8850 1405 50  0000 C CNN

-F 1 "16K" H 8850 1325 50  0000 C CNN

-F 2 "" H 8850 1255 30  0000 C CNN

-F 3 "" V 8850 1325 30  0000 C CNN

-	1    8800 1275

-	0    1    1    0   

-$EndComp

-Wire Wire Line

-	8850 1475 8850 2625

-Connection ~ 8850 2100

-Wire Wire Line

-	8850 875  8850 1175

-Connection ~ 7925 875 

-Wire Wire Line

-	8175 2300 8175 800 

-Connection ~ 8175 2300

-$Comp

-L eSim_R R24

-U 1 1 5C9F1F80

-P 9025 3775

-F 0 "R24" H 9075 3905 50  0000 C CNN

-F 1 "5.8k" H 9075 3825 50  0000 C CNN

-F 2 "" H 9075 3755 30  0000 C CNN

-F 3 "" V 9075 3825 30  0000 C CNN

-	1    9025 3775

-	0    1    1    0   

-$EndComp

-Wire Wire Line

-	9075 2500 9075 3675

-Connection ~ 8575 6000

-$Comp

-L eSim_NPN Q37

-U 1 1 5C9F3715

-P 8850 3025

-F 0 "Q37" H 8750 3075 50  0000 R CNN

-F 1 "eSim_NPN" H 8800 3175 50  0000 R CNN

-F 2 "" H 9050 3125 29  0000 C CNN

-F 3 "" H 8850 3025 60  0000 C CNN

-	1    8850 3025

-	-1   0    0    -1  

-$EndComp

-Wire Wire Line

-	8750 2825 8750 2625

-Wire Wire Line

-	8750 2625 8850 2625

-Wire Wire Line

-	9075 3025 9050 3025

-Connection ~ 9075 3025

-Wire Wire Line

-	9075 4825 9075 3975

-Connection ~ 7000 4825

-Wire Wire Line

-	8750 3225 8750 4825

-Connection ~ 8750 4825

-$Comp

-L eSim_NPN Q40

-U 1 1 5C9F5A03

-P 9475 5100

-F 0 "Q40" H 9375 5150 50  0000 R CNN

-F 1 "eSim_NPN" H 9425 5250 50  0000 R CNN

-F 2 "" H 9675 5200 29  0000 C CNN

-F 3 "" H 9475 5100 60  0000 C CNN

-	1    9475 5100

-	1    0    0    -1  

-$EndComp

-Wire Wire Line

-	7825 5100 9275 5100

-Wire Wire Line

-	7825 5100 7825 5075

-$Comp

-L eSim_R R26

-U 1 1 5C9F5D68

-P 9525 5600

-F 0 "R26" H 9575 5730 50  0000 C CNN

-F 1 "200" H 9575 5650 50  0000 C CNN

-F 2 "" H 9575 5580 30  0000 C CNN

-F 3 "" V 9575 5650 30  0000 C CNN

-	1    9525 5600

-	0    1    1    0   

-$EndComp

-Wire Wire Line

-	9575 5300 9575 5500

-Wire Wire Line

-	9575 6000 9575 5800

-Wire Wire Line

-	9575 1300 9575 4900

-Wire Wire Line

-	9575 2300 9375 2300

-$Comp

-L eSim_R R25

-U 1 1 5C9F78A7

-P 9525 1100

-F 0 "R25" H 9575 1230 50  0000 C CNN

-F 1 "4.3k" H 9575 1150 50  0000 C CNN

-F 2 "" H 9575 1080 30  0000 C CNN

-F 3 "" V 9575 1150 30  0000 C CNN

-	1    9525 1100

-	0    1    1    0   

-$EndComp

-Wire Wire Line

-	9575 875  9575 1000

-Connection ~ 8850 875 

-Connection ~ 9575 2300

-$Comp

-L eSim_NPN Q39

-U 1 1 5C9F7E6C

-P 9300 1325

-F 0 "Q39" H 9200 1375 50  0000 R CNN

-F 1 "eSim_NPN" H 9250 1475 50  0000 R CNN

-F 2 "" H 9500 1425 29  0000 C CNN

-F 3 "" H 9300 1325 60  0000 C CNN

-	1    9300 1325

-	-1   0    0    1   

-$EndComp

-Wire Wire Line

-	9200 1125 9200 875 

-Connection ~ 9200 875 

-Wire Wire Line

-	9500 1325 9575 1325

-Connection ~ 9575 1325

-NoConn ~ 9200 1525

-Wire Wire Line

-	8375 5100 8375 6275

-Wire Wire Line

-	8375 6275 1975 6275

-Wire Wire Line

-	1975 6275 1975 4850

-Connection ~ 1975 4850

-Connection ~ 8375 5100

-$Comp

-L PORT U1

-U 1 1 5C9FA174

-P 8575 6525

-F 0 "U1" H 8625 6625 30  0000 C CNN

-F 1 "PORT" H 8575 6525 30  0000 C CNN

-F 2 "" H 8575 6525 60  0000 C CNN

-F 3 "" H 8575 6525 60  0000 C CNN

-	1    8575 6525

-	0    -1   -1   0   

-$EndComp

-$Comp

-L PORT U1

-U 3 1 5C9FBFA4

-P 475 3950

-F 0 "U1" H 525 4050 30  0000 C CNN

-F 1 "PORT" H 475 3950 30  0000 C CNN

-F 2 "" H 475 3950 60  0000 C CNN

-F 3 "" H 475 3950 60  0000 C CNN

-	3    475  3950

-	1    0    0    -1  

-$EndComp

-$Comp

-L PORT U1

-U 2 1 5C9FC1B0

-P 600 4425

-F 0 "U1" H 650 4525 30  0000 C CNN

-F 1 "PORT" H 600 4425 30  0000 C CNN

-F 2 "" H 600 4425 60  0000 C CNN

-F 3 "" H 600 4425 60  0000 C CNN

-	2    600  4425

-	1    0    0    -1  

-$EndComp

-Wire Wire Line

-	2150 4425 850  4425

-$Comp

-L PORT U1

-U 5 1 5C9FD8AC

-P 2225 525

-F 0 "U1" H 2275 625 30  0000 C CNN

-F 1 "PORT" H 2225 525 30  0000 C CNN

-F 2 "" H 2225 525 60  0000 C CNN

-F 3 "" H 2225 525 60  0000 C CNN

-	5    2225 525 

-	0    1    1    0   

-$EndComp

-$Comp

-L PORT U1

-U 6 1 5C9FD96B

-P 2725 525

-F 0 "U1" H 2775 625 30  0000 C CNN

-F 1 "PORT" H 2725 525 30  0000 C CNN

-F 2 "" H 2725 525 60  0000 C CNN

-F 3 "" H 2725 525 60  0000 C CNN

-	6    2725 525 

-	0    1    1    0   

-$EndComp

-$Comp

-L PORT U1

-U 7 1 5C9FDA44

-P 3950 550

-F 0 "U1" H 4000 650 30  0000 C CNN

-F 1 "PORT" H 3950 550 30  0000 C CNN

-F 2 "" H 3950 550 60  0000 C CNN

-F 3 "" H 3950 550 60  0000 C CNN

-	7    3950 550 

-	0    1    1    0   

-$EndComp

-$Comp

-L PORT U1

-U 8 1 5C9FDAFF

-P 4900 550

-F 0 "U1" H 4950 650 30  0000 C CNN

-F 1 "PORT" H 4900 550 30  0000 C CNN

-F 2 "" H 4900 550 60  0000 C CNN

-F 3 "" H 4900 550 60  0000 C CNN

-	8    4900 550 

-	0    1    1    0   

-$EndComp

-$Comp

-L PORT U1

-U 9 1 5C9FDBB4

-P 5575 550

-F 0 "U1" H 5625 650 30  0000 C CNN

-F 1 "PORT" H 5575 550 30  0000 C CNN

-F 2 "" H 5575 550 60  0000 C CNN

-F 3 "" H 5575 550 60  0000 C CNN

-	9    5575 550 

-	0    1    1    0   

-$EndComp

-$Comp

-L PORT U1

-U 10 1 5C9FDC77

-P 6850 550

-F 0 "U1" H 6900 650 30  0000 C CNN

-F 1 "PORT" H 6850 550 30  0000 C CNN

-F 2 "" H 6850 550 60  0000 C CNN

-F 3 "" H 6850 550 60  0000 C CNN

-	10   6850 550 

-	0    1    1    0   

-$EndComp

-$Comp

-L PORT U1

-U 4 1 5C9FE0D8

-P 8175 550

-F 0 "U1" H 8225 650 30  0000 C CNN

-F 1 "PORT" H 8175 550 30  0000 C CNN

-F 2 "" H 8175 550 60  0000 C CNN

-F 3 "" H 8175 550 60  0000 C CNN

-	4    8175 550 

-	0    1    1    0   

-$EndComp

-Text GLabel 2125 775  0    60   Input ~ 0

-Phase_comparator_vco_input

-Wire Wire Line

-	2225 775  2125 775 

-Text GLabel 2775 775  2    60   Input ~ 0

-Reference_output

-Wire Wire Line

-	2725 775  2775 775 

-Text GLabel 3975 800  2    55   Input ~ 0

-Vco_control_voltage

-Wire Wire Line

-	3975 800  3950 800 

-Text GLabel 4900 800  2    39   Input ~ 0

-Timming_resistor

-Text GLabel 5575 800  2    39   Input ~ 0

-Timing_capacitor

-Text GLabel 6850 800  0    39   Input ~ 0

-+Vcc

-Text GLabel 8175 800  0    39   Input ~ 0

-Vco_output

-Text GLabel 8575 6275 2    39   Input ~ 0

--Vcc

-Text GLabel 675  4075 0    39   Input ~ 0

-Input

-Wire Wire Line

-	675  4075 725  4075

-Wire Wire Line

-	725  4075 725  3950

-Text GLabel 850  4250 0    39   Input ~ 0

-Input

-Wire Wire Line

-	850  4250 875  4250

-Wire Wire Line

-	875  4250 875  4425

-Connection ~ 875  4425

-Wire Wire Line

-	6525 2350 6525 2075

-Wire Wire Line

-	6525 2350 6875 2350

-Connection ~ 6850 2350

-$Comp

-L eSim_NPN Q15

-U 1 1 5CA0DF1A

-P 4300 1350

-F 0 "Q15" H 4200 1400 50  0000 R CNN

-F 1 "eSim_NPN" H 4250 1500 50  0000 R CNN

-F 2 "" H 4500 1450 29  0000 C CNN

-F 3 "" H 4300 1350 60  0000 C CNN

-	1    4300 1350

-	-1   0    0    1   

-$EndComp

-$Comp

-L eSim_PNP Q41

-U 1 1 5CA0E6BE

-P 5150 1350

-F 0 "Q41" H 5050 1400 50  0000 R CNN

-F 1 "eSim_PNP" H 5100 1500 50  0000 R CNN

-F 2 "" H 5350 1450 29  0000 C CNN

-F 3 "" H 5150 1350 60  0000 C CNN

-	1    5150 1350

-	1    0    0    1   

-$EndComp

-$Comp

-L PWR_FLAG #FLG01

-U 1 1 5CA131E0

-P 2300 3950

-F 0 "#FLG01" H 2300 4045 50  0001 C CNN

-F 1 "PWR_FLAG" H 2300 4130 50  0000 C CNN

-F 2 "" H 2300 3950 50  0000 C CNN

-F 3 "" H 2300 3950 50  0000 C CNN

-	1    2300 3950

-	1    0    0    -1  

-$EndComp

-Wire Wire Line

-	2150 3950 2300 3950

-$EndSCHEMATC

diff --git a/src/SubcircuitLibrary/LM565/LM565.sub b/src/SubcircuitLibrary/LM565/LM565.sub
deleted file mode 100644
index 31747d1e..00000000
--- a/src/SubcircuitLibrary/LM565/LM565.sub
+++ /dev/null
@@ -1,75 +0,0 @@
-* Subcircuit LM565

-.subckt LM565 -vcc input input vco_output +vcc reference_output vco_control_voltage timming_resistor timing_capacitor +vcc 

-* c:\esim_1\esim\src\subcircuitlibrary\lm565\lm565.cir

-.include PNP.lib

-.include NPN.lib

-r1  +vcc net-_q1-pad1_ 7.2k

-r3  +vcc net-_q14-pad2_ 7.2k

-q4 net-_q14-pad2_ net-_q14-pad2_ net-_q1-pad1_ Q2N2222

-q5 net-_q1-pad1_ net-_q1-pad1_ net-_q14-pad2_ Q2N2222

-q10 net-_q10-pad1_ net-_q10-pad1_ +vcc Q2N2222

-r4  +vcc net-_q3-pad2_ 5.7k

-r6  +vcc reference_output 1.75k

-r7  reference_output net-_q1-pad2_ 3.8k

-q12 +vcc net-_q1-pad1_ net-_q12-pad3_ Q2N2222

-q14 vco_control_voltage net-_q14-pad2_ net-_q14-pad3_ Q2N2222

-r12  +vcc vco_control_voltage 3.6k

-q1 net-_q1-pad1_ net-_q1-pad2_ net-_q1-pad3_ Q2N2222

-q3 net-_q14-pad2_ net-_q3-pad2_ net-_q1-pad3_ Q2N2222

-q7 net-_q1-pad1_ net-_q3-pad2_ net-_q7-pad3_ Q2N2222

-q9 net-_q14-pad2_ net-_q1-pad2_ net-_q7-pad3_ Q2N2222

-r5  net-_q3-pad2_ -vcc 13k

-q2 net-_q1-pad3_ input net-_q2-pad3_ Q2N2222

-q8 net-_q7-pad3_ input net-_q2-pad3_ Q2N2222

-q6 net-_q2-pad3_ net-_q11-pad1_ net-_q6-pad3_ Q2N2222

-r2  net-_q6-pad3_ -vcc 200

-r8  net-_q1-pad2_ net-_q11-pad1_ 8.1k

-r10  net-_q12-pad3_ net-_q13-pad1_ 1k

-r13  net-_q14-pad3_ net-_q13-pad1_ 1k

-q13 net-_q13-pad1_ net-_q11-pad1_ net-_q13-pad3_ Q2N2222

-q11 net-_q11-pad1_ net-_q11-pad1_ net-_q11-pad3_ Q2N2222

-r9  net-_q11-pad3_ -vcc 200

-r11  net-_q13-pad3_ -vcc 205

-q16 timming_resistor vco_control_voltage net-_q15-pad2_ Q2N2222

-q18 net-_q15-pad2_ net-_q18-pad2_ net-_q17-pad1_ Q2N2222

-q20 net-_q18-pad2_ net-_q18-pad2_ net-_q17-pad1_ Q2N2222

-q17 net-_q17-pad1_ net-_q17-pad1_ net-_q17-pad3_ Q2N2222

-q21 timing_capacitor timing_capacitor net-_q17-pad1_ Q2N2907A

-q22 timing_capacitor net-_q17-pad3_ net-_q19-pad2_ Q2N2222

-q19 net-_q17-pad3_ net-_q19-pad2_ net-_q19-pad3_ Q2N2222

-q23 net-_q19-pad2_ net-_q19-pad2_ net-_q23-pad3_ Q2N2222

-r14  net-_q19-pad3_ net-_q24-pad1_ 530

-r15  net-_q23-pad3_ net-_q24-pad1_ 530

-q25 +vcc timing_capacitor net-_q25-pad3_ Q2N2222

-r17  +vcc net-_q28-pad1_ 6.5k

-q28 net-_q28-pad1_ net-_q28-pad1_ net-_q25-pad3_ Q2N2907A

-q27 ? net-_q25-pad3_ net-_q27-pad3_ Q2N2222

-q30 net-_q28-pad1_ net-_q27-pad3_ net-_q30-pad3_ Q2N2222

-q31 ? net-_q28-pad1_ net-_q31-pad3_ Q2N2222

-q32 net-_q32-pad1_ net-_q32-pad1_ net-_q28-pad1_ Q2N2907A

-r19  +vcc net-_q32-pad1_ 4.7k

-q33 net-_q32-pad1_ net-_q31-pad3_ net-_q30-pad3_ Q2N2222

-r18  net-_q31-pad3_ net-_q30-pad3_ 8.4k

-q35 +vcc net-_q32-pad1_ vco_output Q2N2222

-r20  net-_q30-pad3_ -vcc 2.6k

-r22  vco_output -vcc 4.8k

-q24 net-_q24-pad1_ net-_q24-pad2_ -vcc Q2N2222

-q26 net-_q24-pad1_ net-_q24-pad1_ net-_q26-pad3_ Q2N2907A

-r16  net-_q24-pad2_ -vcc 7k

-q29 net-_q26-pad3_ net-_q26-pad3_ net-_q24-pad2_ Q2N2222

-q34 net-_q25-pad3_ net-_q11-pad1_ net-_q34-pad3_ Q2N2222

-r21  net-_q34-pad3_ -vcc 2.4k

-q36 -vcc vco_output net-_q36-pad3_ Q2N2907A

-q38 net-_q37-pad2_ net-_q38-pad2_ net-_q36-pad3_ Q2N2907A

-r23  +vcc net-_q36-pad3_ 16k

-r24  net-_q37-pad2_ net-_q26-pad3_ 5.8k

-q37 net-_q36-pad3_ net-_q37-pad2_ net-_q26-pad3_ Q2N2222

-q40 net-_q38-pad2_ net-_q11-pad1_ net-_q40-pad3_ Q2N2222

-r26  net-_q40-pad3_ -vcc 200

-r25  +vcc net-_q38-pad2_ 4.3k

-q39 ? net-_q38-pad2_ +vcc Q2N2222

-q15 ? net-_q15-pad2_ vco_control_voltage Q2N2222

-q41 net-_q18-pad2_ net-_q15-pad2_ timming_resistor Q2N2907A

-* Control Statements

-

-.ends LM565
\ No newline at end of file
diff --git a/src/SubcircuitLibrary/LM565/LM565_Previous_Values.xml b/src/SubcircuitLibrary/LM565/LM565_Previous_Values.xml
deleted file mode 100644
index c60f46f5..00000000
--- a/src/SubcircuitLibrary/LM565/LM565_Previous_Values.xml
+++ /dev/null
@@ -1 +0,0 @@
-<KicadtoNgspice><source /><model /><devicemodel><q35><field>C:/esim_1/eSim/src/deviceModelLibrary/Transistor/NPN.lib</field></q35><q40><field>C:/esim_1/eSim/src/deviceModelLibrary/Transistor/NPN.lib</field></q40><q41><field>C:/esim_1/eSim/src/deviceModelLibrary/Transistor/PNP.lib</field></q41><q34><field>C:/esim_1/eSim/src/deviceModelLibrary/Transistor/NPN.lib</field></q34><q20><field>C:/esim_1/eSim/src/deviceModelLibrary/Transistor/NPN.lib</field></q20><q21><field>C:/esim_1/eSim/src/deviceModelLibrary/Transistor/PNP.lib</field></q21><q22><field>C:/esim_1/eSim/src/deviceModelLibrary/Transistor/NPN.lib</field></q22><q23><field>C:/esim_1/eSim/src/deviceModelLibrary/Transistor/NPN.lib</field></q23><q24><field>C:/esim_1/eSim/src/deviceModelLibrary/Transistor/NPN.lib</field></q24><q25><field>C:/esim_1/eSim/src/deviceModelLibrary/Transistor/NPN.lib</field></q25><q26><field>C:/esim_1/eSim/src/deviceModelLibrary/Transistor/PNP.lib</field></q26><q27><field>C:/esim_1/eSim/src/deviceModelLibrary/Transistor/NPN.lib</field></q27><q28><field>C:/esim_1/eSim/src/deviceModelLibrary/Transistor/PNP.lib</field></q28><q29><field>C:/esim_1/eSim/src/deviceModelLibrary/Transistor/NPN.lib</field></q29><q1><field>C:/esim_1/eSim/src/deviceModelLibrary/Transistor/NPN.lib</field></q1><q3><field>C:/esim_1/eSim/src/deviceModelLibrary/Transistor/NPN.lib</field></q3><q2><field>C:/esim_1/eSim/src/deviceModelLibrary/Transistor/NPN.lib</field></q2><q5><field>C:/esim_1/eSim/src/deviceModelLibrary/Transistor/NPN.lib</field></q5><q4><field>C:/esim_1/eSim/src/deviceModelLibrary/Transistor/NPN.lib</field></q4><q7><field>C:/esim_1/eSim/src/deviceModelLibrary/Transistor/NPN.lib</field></q7><q6><field>C:/esim_1/eSim/src/deviceModelLibrary/Transistor/NPN.lib</field></q6><q9><field>C:/esim_1/eSim/src/deviceModelLibrary/Transistor/NPN.lib</field></q9><q8><field>C:/esim_1/eSim/src/deviceModelLibrary/Transistor/NPN.lib</field></q8><q33><field>C:/esim_1/eSim/src/deviceModelLibrary/Transistor/NPN.lib</field></q33><q14><field>C:/esim_1/eSim/src/deviceModelLibrary/Transistor/NPN.lib</field></q14><q17><field>C:/esim_1/eSim/src/deviceModelLibrary/Transistor/NPN.lib</field></q17><q16><field>C:/esim_1/eSim/src/deviceModelLibrary/Transistor/NPN.lib</field></q16><q11><field>C:/esim_1/eSim/src/deviceModelLibrary/Transistor/NPN.lib</field></q11><q10><field>C:/esim_1/eSim/src/deviceModelLibrary/Transistor/NPN.lib</field></q10><q13><field>C:/esim_1/eSim/src/deviceModelLibrary/Transistor/NPN.lib</field></q13><q12><field>C:/esim_1/eSim/src/deviceModelLibrary/Transistor/NPN.lib</field></q12><q39><field>C:/esim_1/eSim/src/deviceModelLibrary/Transistor/NPN.lib</field></q39><q38><field>C:/esim_1/eSim/src/deviceModelLibrary/Transistor/PNP.lib</field></q38><q19><field>C:/esim_1/eSim/src/deviceModelLibrary/Transistor/NPN.lib</field></q19><q18><field>C:/esim_1/eSim/src/deviceModelLibrary/Transistor/NPN.lib</field></q18><q15><field>C:/esim_1/eSim/src/deviceModelLibrary/Transistor/NPN.lib</field></q15><q32><field>C:/esim_1/eSim/src/deviceModelLibrary/Transistor/PNP.lib</field></q32><q31><field>C:/esim_1/eSim/src/deviceModelLibrary/Transistor/NPN.lib</field></q31><q30><field>C:/esim_1/eSim/src/deviceModelLibrary/Transistor/NPN.lib</field></q30><q37><field>C:/esim_1/eSim/src/deviceModelLibrary/Transistor/NPN.lib</field></q37><q36><field>C:/esim_1/eSim/src/deviceModelLibrary/Transistor/PNP.lib</field></q36></devicemodel><subcircuit /><analysis><ac><field1 name="Lin">true</field1><field2 name="Dec">false</field2><field3 name="Oct">false</field3><field4 name="Start Frequency" /><field5 name="Stop Frequency" /><field6 name="No. of points" /><field7 name="Start Fre Combo">Hz</field7><field8 name="Stop Fre Combo">Hz</field8></ac><dc><field1 name="Source 1" /><field2 name="Start" /><field3 name="Increment" /><field4 name="Stop" /><field5 name="Operating Point">0</field5><field6 name="Start Combo">Volts or Amperes</field6><field7 name="Increment Combo">Volts or Amperes</field7><field8 name="Stop Combo">Volts or Amperes</field8><field9 name="Source 2" /><field10 name="Start" /><field11 name="Increment" /><field12 name="Stop" /><field13 name="Start Combo">Volts or Amperes</field13><field14 name="Increment Combo">Volts or Amperes</field14><field15 name="Stop Combo">Volts or Amperes</field15></dc><tran><field1 name="Start Time">0</field1><field2 name="Step Time">10</field2><field3 name="Stop Time">100</field3><field4 name="Start Combo">Sec</field4><field5 name="Step Combo">ms</field5><field6 name="Stop Combo">ms</field6></tran></analysis></KicadtoNgspice>
\ No newline at end of file
diff --git a/src/SubcircuitLibrary/LM7812/analysis b/src/SubcircuitLibrary/LM7812/analysis
deleted file mode 100644
index ebd5c0a9..00000000
--- a/src/SubcircuitLibrary/LM7812/analysis
+++ /dev/null
@@ -1 +0,0 @@
-.tran 0e-00 0e-00 0e-00
\ No newline at end of file
diff --git a/src/SubcircuitLibrary/LOGIC_ADDER/LOGIC_ADDER-cache.lib b/src/SubcircuitLibrary/LOGIC_ADDER/LOGIC_ADDER-cache.lib
deleted file mode 100644
index 34588988..00000000
--- a/src/SubcircuitLibrary/LOGIC_ADDER/LOGIC_ADDER-cache.lib
+++ /dev/null
@@ -1,82 +0,0 @@
-EESchema-LIBRARY Version 2.3

-#encoding utf-8

-#

-# PORT

-#

-DEF PORT U 0 40 Y Y 8 F N

-F0 "U" 50 100 30 H V C CNN

-F1 "PORT" 0 0 30 H V C CNN

-F2 "" 0 0 60 H V C CNN

-F3 "" 0 0 60 H V C CNN

-DRAW

-A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0

-A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50

-S -100 50 100 -50 0 1 0 N

-X ~ 1 250 0 100 L 30 30 1 1 B

-X ~ 2 250 0 100 L 30 30 2 1 B

-X ~ 3 250 0 100 L 30 30 3 1 B

-X ~ 4 250 0 100 L 30 30 4 1 B

-X ~ 5 250 0 100 L 30 30 5 1 B

-X ~ 6 250 0 100 L 30 30 6 1 B

-X ~ 7 250 0 100 L 30 30 7 1 B

-X ~ 8 250 0 100 L 30 30 8 1 B

-ENDDRAW

-ENDDEF

-#

-# d_and

-#

-DEF d_and U 0 40 Y Y 1 F N

-F0 "U" 0 0 60 H V C CNN

-F1 "d_and" 50 100 60 H V C CNN

-F2 "" 0 0 60 H V C CNN

-F3 "" 0 0 60 H V C CNN

-DRAW

-A 149 50 100 -894 0 0 1 0 N 150 -50 250 50

-A 150 49 100 6 900 0 1 0 N 250 50 150 150

-P 4 0 1 0  150 -50  -250 -50  -250 150  150 150 N

-X IN1 1 -450 100 200 R 50 50 1 1 I

-X IN2 2 -450 0 200 R 50 50 1 1 I

-X OUT 3 450 50 200 L 50 50 1 1 O

-ENDDRAW

-ENDDEF

-#

-# d_or

-#

-DEF d_or U 0 40 Y Y 1 F N

-F0 "U" 0 0 60 H V C CNN

-F1 "d_or" 0 100 60 H V C CNN

-F2 "" 0 0 60 H V C CNN

-F3 "" 0 0 60 H V C CNN

-DRAW

-A -450 50 224 266 -266 0 1 0 N -250 150 -250 -50

-A -25 -124 325 574 323 0 1 0 N 150 150 250 50

-A 74 125 191 -665 -231 0 1 0 N 150 -50 250 50

-P 2 0 1 0  -250 -50  150 -50 N

-P 2 0 1 0  -250 150  150 150 N

-X IN1 1 -450 100 215 R 50 50 1 1 I

-X IN2 2 -450 0 215 R 50 50 1 1 I

-X OUT 3 450 50 200 L 50 50 1 1 O

-ENDDRAW

-ENDDEF

-#

-# d_xor

-#

-DEF d_xor U 0 40 Y Y 1 F N

-F0 "U" 0 0 60 H V C CNN

-F1 "d_xor" 50 100 47 H V C CNN

-F2 "" 0 0 60 H V C CNN

-F3 "" 0 0 60 H V C CNN

-DRAW

-A -450 50 224 266 -266 0 1 0 N -250 150 -250 -50

-A -350 50 180 -337 337 0 1 0 N -200 -50 -200 150

-A -25 -124 325 574 323 0 1 0 N 150 150 250 50

-A 74 125 191 -665 -231 0 1 0 N 150 -50 250 50

-P 2 0 1 0  150 -50  -200 -50 N

-P 2 0 1 0  150 150  -200 150 N

-X IN1 1 -450 100 215 R 50 43 1 1 I

-X IN2 2 -450 0 215 R 50 43 1 1 I

-X OUT 3 450 50 200 L 50 39 1 1 O

-ENDDRAW

-ENDDEF

-#

-#End Library

diff --git a/src/SubcircuitLibrary/LOGIC_ADDER/LOGIC_ADDER.cir b/src/SubcircuitLibrary/LOGIC_ADDER/LOGIC_ADDER.cir
deleted file mode 100644
index ec177d39..00000000
--- a/src/SubcircuitLibrary/LOGIC_ADDER/LOGIC_ADDER.cir
+++ /dev/null
@@ -1,16 +0,0 @@
-* C:\eSim\eSim\src\SubcircuitLibrary\LOGIC_ADDER\LOGIC_ADDER.cir

-

-* EESchema Netlist Version 1.1 (Spice format) creation date: 3/24/2018 7:23:20 PM

-

-* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N

-* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0

-

-* Sheet Name: /

-U2  A B Net-_U2-Pad3_ d_and		

-U4  Net-_U3-Pad3_ CIN Net-_U4-Pad3_ d_and		

-U3  A B Net-_U3-Pad3_ d_xor		

-U5  Net-_U3-Pad3_ CIN SUM d_xor		

-U6  Net-_U2-Pad3_ Net-_U4-Pad3_ CARRY d_or		

-U1  A B CIN SUM CARRY PORT		

-

-.end

diff --git a/src/SubcircuitLibrary/LOGIC_ADDER/LOGIC_ADDER.cir.out b/src/SubcircuitLibrary/LOGIC_ADDER/LOGIC_ADDER.cir.out
deleted file mode 100644
index df9bcde6..00000000
--- a/src/SubcircuitLibrary/LOGIC_ADDER/LOGIC_ADDER.cir.out
+++ /dev/null
@@ -1,32 +0,0 @@
-* c:\esim\esim\src\subcircuitlibrary\logic_adder\logic_adder.cir

-

-* u2  a b net-_u2-pad3_ d_and

-* u4  net-_u3-pad3_ cin net-_u4-pad3_ d_and

-* u3  a b net-_u3-pad3_ d_xor

-* u5  net-_u3-pad3_ cin sum d_xor

-* u6  net-_u2-pad3_ net-_u4-pad3_ carry d_or

-* u1  a b cin sum carry port

-a1 [a b ] net-_u2-pad3_ u2

-a2 [net-_u3-pad3_ cin ] net-_u4-pad3_ u4

-a3 [a b ] net-_u3-pad3_ u3

-a4 [net-_u3-pad3_ cin ] sum u5

-a5 [net-_u2-pad3_ net-_u4-pad3_ ] carry u6

-* Schematic Name: d_and, NgSpice Name: d_and

-.model u2 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 

-* Schematic Name: d_and, NgSpice Name: d_and

-.model u4 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 

-* Schematic Name: d_xor, NgSpice Name: d_xor

-.model u3 d_xor(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 

-* Schematic Name: d_xor, NgSpice Name: d_xor

-.model u5 d_xor(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 

-* Schematic Name: d_or, NgSpice Name: d_or

-.model u6 d_or(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 

-.tran 10e-03 100e-03 0e-00

-

-* Control Statements 

-.control

-run

-print allv > plot_data_v.txt

-print alli > plot_data_i.txt

-.endc

-.end

diff --git a/src/SubcircuitLibrary/LOGIC_ADDER/LOGIC_ADDER.pro b/src/SubcircuitLibrary/LOGIC_ADDER/LOGIC_ADDER.pro
deleted file mode 100644
index a2b9fa1f..00000000
--- a/src/SubcircuitLibrary/LOGIC_ADDER/LOGIC_ADDER.pro
+++ /dev/null
@@ -1,44 +0,0 @@
-update=Sat Jun  8 13:01:54 2019
-version=1
-last_client=eeschema
-[general]
-version=1
-RootSch=
-BoardNm=
-[pcbnew]
-version=1
-LastNetListRead=
-UseCmpFile=1
-PadDrill=0.600000000000
-PadDrillOvalY=0.600000000000
-PadSizeH=1.500000000000
-PadSizeV=1.500000000000
-PcbTextSizeV=1.500000000000
-PcbTextSizeH=1.500000000000
-PcbTextThickness=0.300000000000
-ModuleTextSizeV=1.000000000000
-ModuleTextSizeH=1.000000000000
-ModuleTextSizeThickness=0.150000000000
-SolderMaskClearance=0.000000000000
-SolderMaskMinWidth=0.000000000000
-DrawSegmentWidth=0.200000000000
-BoardOutlineThickness=0.100000000000
-ModuleOutlineThickness=0.150000000000
-[cvpcb]
-version=1
-NetIExt=net
-[eeschema]
-version=1
-LibDir=../../../kicadSchematicLibrary
-[eeschema/libraries]
-LibName1=/home/mallikarjuna/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_Analog
-LibName2=/home/mallikarjuna/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_Devices
-LibName3=/home/mallikarjuna/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_Digital
-LibName4=/home/mallikarjuna/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_Hybrid
-LibName5=/home/mallikarjuna/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_Miscellaneous
-LibName6=/home/mallikarjuna/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_PSpice
-LibName7=/home/mallikarjuna/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_Plot
-LibName8=/home/mallikarjuna/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_Power
-LibName9=/home/mallikarjuna/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_Sources
-LibName10=/home/mallikarjuna/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_Subckt
-LibName11=/home/mallikarjuna/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_User
diff --git a/src/SubcircuitLibrary/LOGIC_ADDER/LOGIC_ADDER.sch b/src/SubcircuitLibrary/LOGIC_ADDER/LOGIC_ADDER.sch
deleted file mode 100644
index d39a1b78..00000000
--- a/src/SubcircuitLibrary/LOGIC_ADDER/LOGIC_ADDER.sch
+++ /dev/null
@@ -1,245 +0,0 @@
-EESchema Schematic File Version 2

-LIBS:power

-LIBS:device

-LIBS:transistors

-LIBS:conn

-LIBS:linear

-LIBS:regul

-LIBS:74xx

-LIBS:cmos4000

-LIBS:adc-dac

-LIBS:memory

-LIBS:xilinx

-LIBS:microcontrollers

-LIBS:dsp

-LIBS:microchip

-LIBS:analog_switches

-LIBS:motorola

-LIBS:texas

-LIBS:intel

-LIBS:audio

-LIBS:interface

-LIBS:digital-audio

-LIBS:philips

-LIBS:display

-LIBS:cypress

-LIBS:siliconi

-LIBS:opto

-LIBS:atmel

-LIBS:contrib

-LIBS:valves

-LIBS:eSim_Analog

-LIBS:eSim_Devices

-LIBS:eSim_Digital

-LIBS:eSim_Hybrid

-LIBS:eSim_Miscellaneous

-LIBS:eSim_Plot

-LIBS:eSim_Power

-LIBS:eSim_Sources

-LIBS:eSim_Subckt

-LIBS:eSim_User

-LIBS:LOGIC_ADDER-cache

-EELAYER 25 0

-EELAYER END

-$Descr A4 11693 8268

-encoding utf-8

-Sheet 1 1

-Title ""

-Date ""

-Rev ""

-Comp ""

-Comment1 ""

-Comment2 ""

-Comment3 ""

-Comment4 ""

-$EndDescr

-$Comp

-L d_and U2

-U 1 1 5AB647D1

-P 4100 2200

-F 0 "U2" H 4100 2200 60  0000 C CNN

-F 1 "d_and" H 4150 2300 60  0000 C CNN

-F 2 "" H 4100 2200 60  0000 C CNN

-F 3 "" H 4100 2200 60  0000 C CNN

-	1    4100 2200

-	1    0    0    -1  

-$EndComp

-$Comp

-L d_and U4

-U 1 1 5AB648AD

-P 5250 2300

-F 0 "U4" H 5250 2300 60  0000 C CNN

-F 1 "d_and" H 5300 2400 60  0000 C CNN

-F 2 "" H 5250 2300 60  0000 C CNN

-F 3 "" H 5250 2300 60  0000 C CNN

-	1    5250 2300

-	1    0    0    -1  

-$EndComp

-$Comp

-L d_xor U3

-U 1 1 5AB648E7

-P 4100 2750

-F 0 "U3" H 4100 2750 60  0000 C CNN

-F 1 "d_xor" H 4150 2850 47  0000 C CNN

-F 2 "" H 4100 2750 60  0000 C CNN

-F 3 "" H 4100 2750 60  0000 C CNN

-	1    4100 2750

-	1    0    0    -1  

-$EndComp

-$Comp

-L d_xor U5

-U 1 1 5AB6498F

-P 5250 2600

-F 0 "U5" H 5250 2600 60  0000 C CNN

-F 1 "d_xor" H 5300 2700 47  0000 C CNN

-F 2 "" H 5250 2600 60  0000 C CNN

-F 3 "" H 5250 2600 60  0000 C CNN

-	1    5250 2600

-	1    0    0    -1  

-$EndComp

-$Comp

-L d_or U6

-U 1 1 5AB64A11

-P 6250 2250

-F 0 "U6" H 6250 2250 60  0000 C CNN

-F 1 "d_or" H 6250 2350 60  0000 C CNN

-F 2 "" H 6250 2250 60  0000 C CNN

-F 3 "" H 6250 2250 60  0000 C CNN

-	1    6250 2250

-	1    0    0    -1  

-$EndComp

-$Comp

-L PORT U1

-U 1 1 5AB64A78

-P 2650 2100

-F 0 "U1" H 2700 2200 30  0000 C CNN

-F 1 "PORT" H 2650 2100 30  0000 C CNN

-F 2 "" H 2650 2100 60  0000 C CNN

-F 3 "" H 2650 2100 60  0000 C CNN

-	1    2650 2100

-	1    0    0    -1  

-$EndComp

-$Comp

-L PORT U1

-U 2 1 5AB64BE9

-P 2650 2300

-F 0 "U1" H 2700 2400 30  0000 C CNN

-F 1 "PORT" H 2650 2300 30  0000 C CNN

-F 2 "" H 2650 2300 60  0000 C CNN

-F 3 "" H 2650 2300 60  0000 C CNN

-	2    2650 2300

-	1    0    0    -1  

-$EndComp

-$Comp

-L PORT U1

-U 4 1 5AB64C18

-P 6300 2550

-F 0 "U1" H 6350 2650 30  0000 C CNN

-F 1 "PORT" H 6300 2550 30  0000 C CNN

-F 2 "" H 6300 2550 60  0000 C CNN

-F 3 "" H 6300 2550 60  0000 C CNN

-	4    6300 2550

-	-1   0    0    1   

-$EndComp

-$Comp

-L PORT U1

-U 3 1 5AB64C59

-P 2650 2900

-F 0 "U1" H 2700 3000 30  0000 C CNN

-F 1 "PORT" H 2650 2900 30  0000 C CNN

-F 2 "" H 2650 2900 60  0000 C CNN

-F 3 "" H 2650 2900 60  0000 C CNN

-	3    2650 2900

-	1    0    0    -1  

-$EndComp

-$Comp

-L PORT U1

-U 5 1 5AB64C94

-P 7150 2200

-F 0 "U1" H 7200 2300 30  0000 C CNN

-F 1 "PORT" H 7150 2200 30  0000 C CNN

-F 2 "" H 7150 2200 60  0000 C CNN

-F 3 "" H 7150 2200 60  0000 C CNN

-	5    7150 2200

-	-1   0    0    1   

-$EndComp

-Wire Wire Line

-	2900 2100 3650 2100

-Wire Wire Line

-	2900 2250 3650 2250

-Wire Wire Line

-	3650 2250 3650 2200

-Wire Wire Line

-	3400 2100 3400 2650

-Wire Wire Line

-	3400 2650 3650 2650

-Connection ~ 3400 2100

-Wire Wire Line

-	3150 2250 3150 2750

-Wire Wire Line

-	3150 2750 3650 2750

-Connection ~ 3150 2250

-Wire Wire Line

-	4550 2700 4550 2500

-Wire Wire Line

-	4550 2500 4800 2500

-Wire Wire Line

-	2900 2900 4800 2900

-Wire Wire Line

-	4800 2900 4800 2600

-Wire Wire Line

-	4700 2500 4700 2200

-Wire Wire Line

-	4700 2200 4800 2200

-Connection ~ 4700 2500

-Wire Wire Line

-	4800 2300 4600 2300

-Wire Wire Line

-	4600 2300 4600 2900

-Connection ~ 4600 2900

-Wire Wire Line

-	5700 2250 5800 2250

-Wire Wire Line

-	4550 2150 4550 2000

-Wire Wire Line

-	4550 2000 5800 2000

-Wire Wire Line

-	5800 2000 5800 2150

-Wire Wire Line

-	5700 2550 6050 2550

-Wire Wire Line

-	6700 2200 6900 2200

-Wire Wire Line

-	2900 2250 2900 2300

-Text GLabel 3000 1850 0    60   Input ~ 0

-A

-Text GLabel 3000 2500 0    60   Input ~ 0

-B

-Text GLabel 3000 3250 0    60   Input ~ 0

-CIN

-Wire Wire Line

-	3000 3250 3050 3250

-Wire Wire Line

-	3050 3250 3050 2900

-Connection ~ 3050 2900

-Wire Wire Line

-	3000 1850 3100 1850

-Wire Wire Line

-	3100 1850 3100 2100

-Connection ~ 3100 2100

-Wire Wire Line

-	3000 2500 3000 2250

-Connection ~ 3000 2250

-Text GLabel 6750 1700 0    60   Output ~ 0

-CARRY

-Text GLabel 5950 2800 0    60   Output ~ 0

-SUM

-Wire Wire Line

-	6750 1700 6800 1700

-Wire Wire Line

-	6800 1700 6800 2200

-Connection ~ 6800 2200

-Wire Wire Line

-	5950 2550 5950 2800

-Connection ~ 5950 2550

-$EndSCHEMATC

diff --git a/src/SubcircuitLibrary/LOGIC_ADDER/LOGIC_ADDER.sub b/src/SubcircuitLibrary/LOGIC_ADDER/LOGIC_ADDER.sub
deleted file mode 100644
index a1e1cfac..00000000
--- a/src/SubcircuitLibrary/LOGIC_ADDER/LOGIC_ADDER.sub
+++ /dev/null
@@ -1,26 +0,0 @@
-* Subcircuit LOGIC_ADDER

-.subckt LOGIC_ADDER a b cin sum carry 

-* c:\esim\esim\src\subcircuitlibrary\logic_adder\logic_adder.cir

-* u2  a b net-_u2-pad3_ d_and

-* u4  net-_u3-pad3_ cin net-_u4-pad3_ d_and

-* u3  a b net-_u3-pad3_ d_xor

-* u5  net-_u3-pad3_ cin sum d_xor

-* u6  net-_u2-pad3_ net-_u4-pad3_ carry d_or

-a1 [a b ] net-_u2-pad3_ u2

-a2 [net-_u3-pad3_ cin ] net-_u4-pad3_ u4

-a3 [a b ] net-_u3-pad3_ u3

-a4 [net-_u3-pad3_ cin ] sum u5

-a5 [net-_u2-pad3_ net-_u4-pad3_ ] carry u6

-* Schematic Name: d_and, NgSpice Name: d_and

-.model u2 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )

-* Schematic Name: d_and, NgSpice Name: d_and

-.model u4 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )

-* Schematic Name: d_xor, NgSpice Name: d_xor

-.model u3 d_xor(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )

-* Schematic Name: d_xor, NgSpice Name: d_xor

-.model u5 d_xor(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )

-* Schematic Name: d_or, NgSpice Name: d_or

-.model u6 d_or(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )

-* Control Statements

-

-.ends LOGIC_ADDER
\ No newline at end of file
diff --git a/src/SubcircuitLibrary/LOGIC_ADDER/LOGIC_ADDER_Previous_Values.xml b/src/SubcircuitLibrary/LOGIC_ADDER/LOGIC_ADDER_Previous_Values.xml
deleted file mode 100644
index ab59f216..00000000
--- a/src/SubcircuitLibrary/LOGIC_ADDER/LOGIC_ADDER_Previous_Values.xml
+++ /dev/null
@@ -1 +0,0 @@
-<KicadtoNgspice><source /><model><u2 name="type">d_and<field1 name="Enter Fall Delay (default=1.0e-9)" /><field2 name="Enter Input Load (default=1.0e-12)" /><field3 name="Enter Rise Delay (default=1.0e-9)" /></u2><u4 name="type">d_and<field4 name="Enter Fall Delay (default=1.0e-9)" /><field5 name="Enter Input Load (default=1.0e-12)" /><field6 name="Enter Rise Delay (default=1.0e-9)" /></u4><u3 name="type">d_xor<field7 name="Enter Fall Delay (default=1.0e-9)" /><field8 name="Enter Input Load (default=1.0e-12)" /><field9 name="Enter Rise Delay (default=1.0e-9)" /></u3><u5 name="type">d_xor<field10 name="Enter Fall Delay (default=1.0e-9)" /><field11 name="Enter Input Load (default=1.0e-12)" /><field12 name="Enter Rise Delay (default=1.0e-9)" /></u5><u6 name="type">d_or<field13 name="Enter Fall Delay (default=1.0e-9)" /><field14 name="Enter Input Load (default=1.0e-12)" /><field15 name="Enter Rise Delay (default=1.0e-9)" /></u6></model><devicemodel /><subcircuit /><analysis><ac><field1 name="Lin">true</field1><field2 name="Dec">false</field2><field3 name="Oct">false</field3><field4 name="Start Frequency" /><field5 name="Stop Frequency" /><field6 name="No. of points" /><field7 name="Start Fre Combo">Hz</field7><field8 name="Stop Fre Combo">Hz</field8></ac><dc><field1 name="Source 1" /><field2 name="Start" /><field3 name="Increment" /><field4 name="Stop" /><field5 name="Operating Point">0</field5><field6 name="Start Combo">Volts or Amperes</field6><field7 name="Increment Combo">Volts or Amperes</field7><field8 name="Stop Combo">Volts or Amperes</field8><field9 name="Source 2" /><field10 name="Start" /><field11 name="Increment" /><field12 name="Stop" /><field13 name="Start Combo">Volts or Amperes</field13><field14 name="Increment Combo">Volts or Amperes</field14><field15 name="Stop Combo">Volts or Amperes</field15></dc><tran><field1 name="Start Time">0</field1><field2 name="Step Time">10</field2><field3 name="Stop Time">100</field3><field4 name="Start Combo">Sec</field4><field5 name="Step Combo">ms</field5><field6 name="Stop Combo">ms</field6></tran></analysis></KicadtoNgspice>
\ No newline at end of file
diff --git a/src/SubcircuitLibrary/LOGIC_ADDER/analysis b/src/SubcircuitLibrary/LOGIC_ADDER/analysis
deleted file mode 100644
index d5e13546..00000000
--- a/src/SubcircuitLibrary/LOGIC_ADDER/analysis
+++ /dev/null
@@ -1 +0,0 @@
-.tran 10e-03 100e-03 0e-00
\ No newline at end of file
diff --git a/src/SubcircuitLibrary/NE566/NE566-cache.lib b/src/SubcircuitLibrary/NE566/NE566-cache.lib
deleted file mode 100644
index db4e06a4..00000000
--- a/src/SubcircuitLibrary/NE566/NE566-cache.lib
+++ /dev/null
@@ -1,125 +0,0 @@
-EESchema-LIBRARY Version 2.3

-#encoding utf-8

-#

-# PORT

-#

-DEF PORT U 0 40 Y Y 26 F N

-F0 "U" 50 100 30 H V C CNN

-F1 "PORT" 0 0 30 H V C CNN

-F2 "" 0 0 60 H V C CNN

-F3 "" 0 0 60 H V C CNN

-DRAW

-A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0

-A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50

-S -100 50 100 -50 0 1 0 N

-X ~ 1 250 0 100 L 30 30 1 1 I

-X ~ 2 250 0 100 L 30 30 2 1 I

-X ~ 3 250 0 100 L 30 30 3 1 I

-X ~ 4 250 0 100 L 30 30 4 1 I

-X ~ 5 250 0 100 L 30 30 5 1 I

-X ~ 6 250 0 100 L 30 30 6 1 I

-X ~ 7 250 0 100 L 30 30 7 1 I

-X ~ 8 250 0 100 L 30 30 8 1 I

-X ~ 9 250 0 100 L 30 30 9 1 I

-X ~ 10 250 0 100 L 30 30 10 1 I

-X ~ 11 250 0 100 L 30 30 11 1 I

-X ~ 12 250 0 100 L 30 30 12 1 I

-X ~ 13 250 0 100 L 30 30 13 1 I

-X ~ 14 250 0 100 L 30 30 14 1 I

-X ~ 15 250 0 100 L 30 30 15 1 I

-X ~ 16 250 0 100 L 30 30 16 1 I

-X ~ 17 250 0 100 L 30 30 17 1 I

-X ~ 18 250 0 100 L 30 30 18 1 I

-X ~ 19 250 0 100 L 30 30 19 1 I

-X ~ 20 250 0 100 L 30 30 20 1 I

-X ~ 21 250 0 100 L 30 30 21 1 I

-X ~ 22 250 0 100 L 30 30 22 1 I

-X ~ 23 250 0 100 L 30 30 23 1 I

-X ~ 24 250 0 100 L 30 30 24 1 I

-X ~ 25 250 0 100 L 30 30 25 1 I

-X ~ 26 250 0 100 L 30 30 26 1 I

-ENDDRAW

-ENDDEF

-#

-# eSim_Diode

-#

-DEF eSim_Diode D 0 40 N N 1 F N

-F0 "D" 0 100 50 H V C CNN

-F1 "eSim_Diode" 0 -100 50 H V C CNN

-F2 "" 0 0 60 H V C CNN

-F3 "" 0 0 60 H V C CNN

-$FPLIST

- TO-???*

- *SingleDiode

- *_Diode_*

- *SingleDiode*

- D_*

-$ENDFPLIST

-DRAW

-T 0 -100 50 60 0 0 0 A  Normal 0 C C

-T 0 100 50 60 0 0 0 K  Normal 0 C C

-P 2 0 1 6  50 50  50 -50 N

-P 3 0 1 0  -50 50  50 0  -50 -50 F

-X A 1 -150 0 100 R 40 40 1 1 P

-X K 2 150 0 100 L 40 40 1 1 P

-ENDDRAW

-ENDDEF

-#

-# eSim_NPN

-#

-DEF eSim_NPN Q 0 0 Y N 1 F N

-F0 "Q" -100 50 50 H V R CNN

-F1 "eSim_NPN" -50 150 50 H V R CNN

-F2 "" 200 100 29 H V C CNN

-F3 "" 0 0 60 H V C CNN

-ALIAS BC547 Q2N2222

-DRAW

-C 50 0 111 0 1 10 N

-P 2 0 1 0  25 25  100 100 N

-P 3 0 1 0  25 -25  100 -100  100 -100 N

-P 3 0 1 20  25 75  25 -75  25 -75 N

-P 5 0 1 0  50 -70  70 -50  90 -90  50 -70  50 -70 F

-X C 1 100 200 100 D 50 50 1 1 C

-X B 2 -200 0 225 R 50 50 1 1 I

-X E 3 100 -200 100 U 50 50 1 1 E

-ENDDRAW

-ENDDEF

-#

-# eSim_PNP

-#

-DEF eSim_PNP Q 0 0 Y N 1 F N

-F0 "Q" -100 50 50 H V R CNN

-F1 "eSim_PNP" -50 150 50 H V R CNN

-F2 "" 200 100 29 H V C CNN

-F3 "" 0 0 60 H V C CNN

-DRAW

-C 50 0 111 0 1 10 N

-P 2 0 1 0  25 25  100 100 N

-P 3 0 1 0  25 -25  100 -100  100 -100 N

-P 3 0 1 20  25 75  25 -75  25 -75 N

-P 5 0 1 0  90 -70  70 -90  50 -50  90 -70  90 -70 F

-X C 1 100 200 100 D 50 50 1 1 C

-X B 2 -200 0 225 R 50 50 1 1 I

-X E 3 100 -200 100 U 50 50 1 1 E

-ENDDRAW

-ENDDEF

-#

-# eSim_R

-#

-DEF eSim_R R 0 0 N Y 1 F N

-F0 "R" 50 130 50 H V C CNN

-F1 "eSim_R" 50 50 50 H V C CNN

-F2 "" 50 -20 30 H V C CNN

-F3 "" 50 50 30 V V C CNN

-$FPLIST

- R_*

- Resistor_*

-$ENDFPLIST

-DRAW

-S 150 10 -50 90 0 1 10 N

-X ~ 1 -100 50 50 R 60 60 1 1 P

-X ~ 2 200 50 50 L 60 60 1 1 P

-ENDDRAW

-ENDDEF

-#

-#End Library

diff --git a/src/SubcircuitLibrary/NE566/NE566.cir b/src/SubcircuitLibrary/NE566/NE566.cir
deleted file mode 100644
index 4d52179b..00000000
--- a/src/SubcircuitLibrary/NE566/NE566.cir
+++ /dev/null
@@ -1,57 +0,0 @@
-* C:\esim_1\eSim\src\SubcircuitLibrary\NE566\NE566.cir

-

-* EESchema Netlist Version 1.1 (Spice format) creation date: 03/31/19 13:55:47

-

-* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N

-* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0

-

-* Sheet Name: /

-Q1  Net-_Q1-Pad1_ Net-_D10-Pad2_ Net-_D10-Pad1_ eSim_NPN		

-Q2  Net-_D10-Pad1_ Net-_Q2-Pad2_ Net-_D1-Pad1_ eSim_NPN		

-Q5  Net-_Q2-Pad2_ Net-_Q2-Pad2_ Net-_D1-Pad1_ eSim_NPN		

-D1  Net-_D1-Pad1_ Net-_D1-Pad2_ eSim_Diode		

-D3  Net-_D1-Pad1_ Net-_D3-Pad2_ eSim_Diode		

-Q6  Net-_D3-Pad2_ Net-_D1-Pad2_ Net-_Q3-Pad2_ eSim_NPN		

-Q8  Net-_D9-Pad2_ Net-_D3-Pad2_ Net-_D5-Pad1_ eSim_NPN		

-Q7  Net-_Q3-Pad2_ Net-_Q3-Pad2_ Net-_Q7-Pad3_ eSim_NPN		

-Q3  Net-_D1-Pad2_ Net-_Q3-Pad2_ Net-_Q3-Pad3_ eSim_NPN		

-R1  Net-_Q3-Pad3_ Net-_D4-Pad2_ 5k		

-R3  Net-_Q7-Pad3_ Net-_D4-Pad2_ 5k		

-D4  Net-_D2-Pad1_ Net-_D4-Pad2_ eSim_Diode		

-Q4  Net-_D4-Pad2_ Net-_D2-Pad2_ Net-_Q15-Pad1_ eSim_NPN		

-D2  Net-_D2-Pad1_ Net-_D2-Pad2_ eSim_Diode		

-R2  Net-_D2-Pad2_ Net-_Q15-Pad1_ 5k		

-R4  Net-_Q9-Pad3_ Net-_Q15-Pad1_ 5k		

-Q10  Net-_D9-Pad2_ Net-_D5-Pad1_ Net-_Q10-Pad3_ eSim_NPN		

-Q9  Net-_D5-Pad1_ Net-_Q11-Pad2_ Net-_Q9-Pad3_ eSim_NPN		

-Q11  Net-_Q10-Pad3_ Net-_Q11-Pad2_ Net-_Q11-Pad3_ eSim_NPN		

-D5  Net-_D5-Pad1_ Net-_D5-Pad2_ eSim_Diode		

-D6  Net-_D5-Pad1_ Net-_D6-Pad2_ eSim_Diode		

-Q12  Net-_D5-Pad2_ Net-_D6-Pad2_ Net-_Q12-Pad3_ eSim_NPN		

-D8  Net-_D5-Pad2_ Net-_D8-Pad2_ eSim_Diode		

-D7  Net-_D5-Pad2_ Net-_D7-Pad2_ eSim_Diode		

-R6  Net-_D9-Pad2_ Net-_D5-Pad2_ 5k		

-R8  Net-_D9-Pad2_ Net-_D8-Pad2_ 5k		

-Q14  Net-_D9-Pad2_ Net-_D8-Pad2_ Net-_Q14-Pad3_ eSim_NPN		

-Q13  Net-_D8-Pad2_ Net-_D7-Pad2_ Net-_Q12-Pad3_ eSim_NPN		

-R7  Net-_D7-Pad2_ Net-_Q12-Pad3_ 5k		

-Q15  Net-_Q15-Pad1_ Net-_Q14-Pad3_ Net-_Q15-Pad3_ eSim_PNP		

-Q16  Net-_Q15-Pad3_ Net-_Q16-Pad2_ Net-_D2-Pad1_ eSim_PNP		

-Q17  Net-_Q16-Pad2_ Net-_D9-Pad1_ Net-_Q15-Pad3_ eSim_PNP		

-R13  Net-_D9-Pad2_ Net-_D9-Pad1_ 5k		

-D9  Net-_D9-Pad1_ Net-_D9-Pad2_ eSim_Diode		

-R15  Net-_D9-Pad2_ Net-_Q11-Pad2_ 5k		

-R12  Net-_Q16-Pad2_ Net-_D2-Pad1_ 5k		

-R5  Net-_Q11-Pad3_ Net-_Q15-Pad1_ 5k		

-R9  Net-_Q12-Pad3_ Net-_Q15-Pad1_ 5k		

-R10  Net-_Q14-Pad3_ Net-_Q15-Pad1_ 5k		

-Q18  Net-_D9-Pad1_ Net-_Q11-Pad2_ Net-_Q18-Pad3_ eSim_NPN		

-Q19  Net-_Q11-Pad2_ Net-_Q11-Pad2_ Net-_Q19-Pad3_ eSim_NPN		

-R14  Net-_Q18-Pad3_ Net-_Q15-Pad1_ 5k		

-R16  Net-_Q19-Pad3_ Net-_Q15-Pad1_ 5k		

-U1  Net-_Q15-Pad1_ Net-_Q14-Pad3_ Net-_Q10-Pad3_ Net-_D10-Pad2_ Net-_Q1-Pad1_ Net-_D3-Pad2_ Net-_D9-Pad2_ PORT		

-R11  Net-_D9-Pad2_ Net-_Q15-Pad3_ 5k		

-D10  Net-_D10-Pad1_ Net-_D10-Pad2_ eSim_Diode		

-Q20  Net-_Q2-Pad2_ Net-_D10-Pad1_ Net-_Q1-Pad1_ eSim_PNP		

-

-.end

diff --git a/src/SubcircuitLibrary/NE566/NE566.cir.out b/src/SubcircuitLibrary/NE566/NE566.cir.out
deleted file mode 100644
index c83f8b00..00000000
--- a/src/SubcircuitLibrary/NE566/NE566.cir.out
+++ /dev/null
@@ -1,61 +0,0 @@
-* c:\esim_1\esim\src\subcircuitlibrary\ne566\ne566.cir

-

-.include PNP.lib

-.include D.lib

-.include NPN.lib

-q1 net-_q1-pad1_ net-_d10-pad2_ net-_d10-pad1_ Q2N2222

-q2 net-_d10-pad1_ net-_q2-pad2_ net-_d1-pad1_ Q2N2222

-q5 net-_q2-pad2_ net-_q2-pad2_ net-_d1-pad1_ Q2N2222

-d1 net-_d1-pad1_ net-_d1-pad2_ 1N4148

-d3 net-_d1-pad1_ net-_d3-pad2_ 1N4148

-q6 net-_d3-pad2_ net-_d1-pad2_ net-_q3-pad2_ Q2N2222

-q8 net-_d9-pad2_ net-_d3-pad2_ net-_d5-pad1_ Q2N2222

-q7 net-_q3-pad2_ net-_q3-pad2_ net-_q7-pad3_ Q2N2222

-q3 net-_d1-pad2_ net-_q3-pad2_ net-_q3-pad3_ Q2N2222

-r1  net-_q3-pad3_ net-_d4-pad2_ 5k

-r3  net-_q7-pad3_ net-_d4-pad2_ 5k

-d4 net-_d2-pad1_ net-_d4-pad2_ 1N4148

-q4 net-_d4-pad2_ net-_d2-pad2_ net-_q15-pad1_ Q2N2222

-d2 net-_d2-pad1_ net-_d2-pad2_ 1N4148

-r2  net-_d2-pad2_ net-_q15-pad1_ 5k

-r4  net-_q9-pad3_ net-_q15-pad1_ 5k

-q10 net-_d9-pad2_ net-_d5-pad1_ net-_q10-pad3_ Q2N2222

-q9 net-_d5-pad1_ net-_q11-pad2_ net-_q9-pad3_ Q2N2222

-q11 net-_q10-pad3_ net-_q11-pad2_ net-_q11-pad3_ Q2N2222

-d5 net-_d5-pad1_ net-_d5-pad2_ 1N4148

-d6 net-_d5-pad1_ net-_d6-pad2_ 1N4148

-q12 net-_d5-pad2_ net-_d6-pad2_ net-_q12-pad3_ Q2N2222

-d8 net-_d5-pad2_ net-_d8-pad2_ 1N4148

-d7 net-_d5-pad2_ net-_d7-pad2_ 1N4148

-r6  net-_d9-pad2_ net-_d5-pad2_ 5k

-r8  net-_d9-pad2_ net-_d8-pad2_ 5k

-q14 net-_d9-pad2_ net-_d8-pad2_ net-_q14-pad3_ Q2N2222

-q13 net-_d8-pad2_ net-_d7-pad2_ net-_q12-pad3_ Q2N2222

-r7  net-_d7-pad2_ net-_q12-pad3_ 5k

-q15 net-_q15-pad1_ net-_q14-pad3_ net-_q15-pad3_ Q2N2907A

-q16 net-_q15-pad3_ net-_q16-pad2_ net-_d2-pad1_ Q2N2222

-q17 net-_q16-pad2_ net-_d9-pad1_ net-_q15-pad3_ Q2N2222

-r13  net-_d9-pad2_ net-_d9-pad1_ 5k

-d9 net-_d9-pad1_ net-_d9-pad2_ 1N4148

-r15  net-_d9-pad2_ net-_q11-pad2_ 5k

-r12  net-_q16-pad2_ net-_d2-pad1_ 5k

-r5  net-_q11-pad3_ net-_q15-pad1_ 5k

-r9  net-_q12-pad3_ net-_q15-pad1_ 5k

-r10  net-_q14-pad3_ net-_q15-pad1_ 5k

-q18 net-_d9-pad1_ net-_q11-pad2_ net-_q18-pad3_ Q2N2222

-q19 net-_q11-pad2_ net-_q11-pad2_ net-_q19-pad3_ Q2N2222

-r14  net-_q18-pad3_ net-_q15-pad1_ 5k

-r16  net-_q19-pad3_ net-_q15-pad1_ 5k

-* u1  net-_q15-pad1_ net-_q14-pad3_ net-_q10-pad3_ net-_d10-pad2_ net-_q1-pad1_ net-_d3-pad2_ net-_d9-pad2_ port

-r11  net-_d9-pad2_ net-_q15-pad3_ 5k

-d10 net-_d10-pad1_ net-_d10-pad2_ 1N4148

-q20 net-_q2-pad2_ net-_d10-pad1_ net-_q1-pad1_ Q2N2222

-.tran 10e-03 100e-03 0e-00

-

-* Control Statements 

-.control

-run

-print allv > plot_data_v.txt

-print alli > plot_data_i.txt

-.endc

-.end

diff --git a/src/SubcircuitLibrary/NE566/NE566.pro b/src/SubcircuitLibrary/NE566/NE566.pro
deleted file mode 100644
index 4b1e556f..00000000
--- a/src/SubcircuitLibrary/NE566/NE566.pro
+++ /dev/null
@@ -1,83 +0,0 @@
-update=03/31/19 14:14:07

-version=1

-last_client=eeschema

-[general]

-version=1

-RootSch=

-BoardNm=

-[pcbnew]

-version=1

-LastNetListRead=

-UseCmpFile=1

-PadDrill=0.600000000000

-PadDrillOvalY=0.600000000000

-PadSizeH=1.500000000000

-PadSizeV=1.500000000000

-PcbTextSizeV=1.500000000000

-PcbTextSizeH=1.500000000000

-PcbTextThickness=0.300000000000

-ModuleTextSizeV=1.000000000000

-ModuleTextSizeH=1.000000000000

-ModuleTextSizeThickness=0.150000000000

-SolderMaskClearance=0.000000000000

-SolderMaskMinWidth=0.000000000000

-DrawSegmentWidth=0.200000000000

-BoardOutlineThickness=0.100000000000

-ModuleOutlineThickness=0.150000000000

-[cvpcb]

-version=1

-NetIExt=net

-[eeschema]

-version=1

-LibDir=../../../../../Users/hp/AppData/Roaming/SPB_Data/eSim-Workspace/Function_generator_using_NE566

-[eeschema/libraries]

-LibName1=power

-LibName2=device

-LibName3=transistors

-LibName4=conn

-LibName5=linear

-LibName6=regul

-LibName7=74xx

-LibName8=cmos4000

-LibName9=adc-dac

-LibName10=memory

-LibName11=xilinx

-LibName12=microcontrollers

-LibName13=dsp

-LibName14=microchip

-LibName15=analog_switches

-LibName16=motorola

-LibName17=texas

-LibName18=intel

-LibName19=audio

-LibName20=interface

-LibName21=digital-audio

-LibName22=philips

-LibName23=display

-LibName24=cypress

-LibName25=siliconi

-LibName26=opto

-LibName27=atmel

-LibName28=contrib

-LibName29=valves

-LibName30=eSim_Analog

-LibName31=eSim_Devices

-LibName32=eSim_Digital

-LibName33=eSim_Hybrid

-LibName34=eSim_Miscellaneous

-LibName35=eSim_Plot

-LibName36=eSim_Power

-LibName37=eSim_PSpice

-LibName38=eSim_Sources

-LibName39=eSim_Subckt

-LibName40=eSim_User

-[schematic_editor]

-version=1

-PageLayoutDescrFile=

-PlotDirectoryName=

-SubpartIdSeparator=0

-SubpartFirstId=65

-NetFmtName=

-SpiceForceRefPrefix=0

-SpiceUseNetNumbers=0

-LabSize=60

diff --git a/src/SubcircuitLibrary/NE566/NE566.sch b/src/SubcircuitLibrary/NE566/NE566.sch
deleted file mode 100644
index f4c9144d..00000000
--- a/src/SubcircuitLibrary/NE566/NE566.sch
+++ /dev/null
@@ -1,920 +0,0 @@
-EESchema Schematic File Version 2

-LIBS:power

-LIBS:device

-LIBS:transistors

-LIBS:conn

-LIBS:linear

-LIBS:regul

-LIBS:74xx

-LIBS:cmos4000

-LIBS:adc-dac

-LIBS:memory

-LIBS:xilinx

-LIBS:microcontrollers

-LIBS:dsp

-LIBS:microchip

-LIBS:analog_switches

-LIBS:motorola

-LIBS:texas

-LIBS:intel

-LIBS:audio

-LIBS:interface

-LIBS:digital-audio

-LIBS:philips

-LIBS:display

-LIBS:cypress

-LIBS:siliconi

-LIBS:opto

-LIBS:atmel

-LIBS:contrib

-LIBS:valves

-LIBS:eSim_Analog

-LIBS:eSim_Devices

-LIBS:eSim_Digital

-LIBS:eSim_Hybrid

-LIBS:eSim_Miscellaneous

-LIBS:eSim_Plot

-LIBS:eSim_Power

-LIBS:eSim_PSpice

-LIBS:eSim_Sources

-LIBS:eSim_Subckt

-LIBS:eSim_User

-LIBS:NE566-cache

-EELAYER 25 0

-EELAYER END

-$Descr A4 11693 8268

-encoding utf-8

-Sheet 1 1

-Title ""

-Date ""

-Rev ""

-Comp ""

-Comment1 ""

-Comment2 ""

-Comment3 ""

-Comment4 ""

-$EndDescr

-$Comp

-L eSim_NPN Q1

-U 1 1 5C9D1243

-P 1650 1650

-F 0 "Q1" H 1550 1700 50  0000 R CNN

-F 1 "eSim_NPN" H 1600 1800 50  0000 R CNN

-F 2 "" H 1850 1750 29  0000 C CNN

-F 3 "" H 1650 1650 60  0000 C CNN

-	1    1650 1650

-	1    0    0    -1  

-$EndComp

-$Comp

-L eSim_NPN Q2

-U 1 1 5C9D1262

-P 1850 2450

-F 0 "Q2" H 1750 2500 50  0000 R CNN

-F 1 "eSim_NPN" H 1800 2600 50  0000 R CNN

-F 2 "" H 2050 2550 29  0000 C CNN

-F 3 "" H 1850 2450 60  0000 C CNN

-	1    1850 2450

-	-1   0    0    -1  

-$EndComp

-$Comp

-L eSim_NPN Q5

-U 1 1 5C9D1293

-P 2650 2450

-F 0 "Q5" H 2550 2500 50  0000 R CNN

-F 1 "eSim_NPN" H 2600 2600 50  0000 R CNN

-F 2 "" H 2850 2550 29  0000 C CNN

-F 3 "" H 2650 2450 60  0000 C CNN

-	1    2650 2450

-	1    0    0    -1  

-$EndComp

-$Comp

-L eSim_Diode D1

-U 1 1 5C9D12F5

-P 1750 3150

-F 0 "D1" H 1750 3250 50  0000 C CNN

-F 1 "eSim_Diode" H 1750 3050 50  0000 C CNN

-F 2 "" H 1750 3150 60  0000 C CNN

-F 3 "" H 1750 3150 60  0000 C CNN

-	1    1750 3150

-	0    1    1    0   

-$EndComp

-$Comp

-L eSim_Diode D3

-U 1 1 5C9D136F

-P 2750 3150

-F 0 "D3" H 2750 3250 50  0000 C CNN

-F 1 "eSim_Diode" H 2750 3050 50  0000 C CNN

-F 2 "" H 2750 3150 60  0000 C CNN

-F 3 "" H 2750 3150 60  0000 C CNN

-	1    2750 3150

-	0    1    1    0   

-$EndComp

-$Comp

-L eSim_NPN Q6

-U 1 1 5C9D13AA

-P 2650 4100

-F 0 "Q6" H 2550 4150 50  0000 R CNN

-F 1 "eSim_NPN" H 2600 4250 50  0000 R CNN

-F 2 "" H 2850 4200 29  0000 C CNN

-F 3 "" H 2650 4100 60  0000 C CNN

-	1    2650 4100

-	1    0    0    -1  

-$EndComp

-$Comp

-L eSim_NPN Q8

-U 1 1 5C9D13D9

-P 3550 3550

-F 0 "Q8" H 3450 3600 50  0000 R CNN

-F 1 "eSim_NPN" H 3500 3700 50  0000 R CNN

-F 2 "" H 3750 3650 29  0000 C CNN

-F 3 "" H 3550 3550 60  0000 C CNN

-	1    3550 3550

-	1    0    0    -1  

-$EndComp

-$Comp

-L eSim_NPN Q7

-U 1 1 5C9D13FE

-P 2650 4900

-F 0 "Q7" H 2550 4950 50  0000 R CNN

-F 1 "eSim_NPN" H 2600 5050 50  0000 R CNN

-F 2 "" H 2850 5000 29  0000 C CNN

-F 3 "" H 2650 4900 60  0000 C CNN

-	1    2650 4900

-	1    0    0    -1  

-$EndComp

-$Comp

-L eSim_NPN Q3

-U 1 1 5C9D142B

-P 1850 4900

-F 0 "Q3" H 1750 4950 50  0000 R CNN

-F 1 "eSim_NPN" H 1800 5050 50  0000 R CNN

-F 2 "" H 2050 5000 29  0000 C CNN

-F 3 "" H 1850 4900 60  0000 C CNN

-	1    1850 4900

-	-1   0    0    -1  

-$EndComp

-$Comp

-L eSim_R R1

-U 1 1 5C9D148A

-P 1700 5550

-F 0 "R1" H 1750 5680 50  0000 C CNN

-F 1 "5k" H 1750 5600 50  0000 C CNN

-F 2 "" H 1750 5530 30  0000 C CNN

-F 3 "" V 1750 5600 30  0000 C CNN

-	1    1700 5550

-	0    1    1    0   

-$EndComp

-$Comp

-L eSim_R R3

-U 1 1 5C9D14C1

-P 2700 5500

-F 0 "R3" H 2750 5630 50  0000 C CNN

-F 1 "5k" H 2750 5550 50  0000 C CNN

-F 2 "" H 2750 5480 30  0000 C CNN

-F 3 "" V 2750 5550 30  0000 C CNN

-	1    2700 5500

-	0    1    1    0   

-$EndComp

-$Comp

-L eSim_Diode D4

-U 1 1 5C9D153A

-P 2750 6100

-F 0 "D4" H 2750 6200 50  0000 C CNN

-F 1 "eSim_Diode" H 2750 6000 50  0000 C CNN

-F 2 "" H 2750 6100 60  0000 C CNN

-F 3 "" H 2750 6100 60  0000 C CNN

-	1    2750 6100

-	0    -1   -1   0   

-$EndComp

-$Comp

-L eSim_NPN Q4

-U 1 1 5C9D156F

-P 1850 6500

-F 0 "Q4" H 1750 6550 50  0000 R CNN

-F 1 "eSim_NPN" H 1800 6650 50  0000 R CNN

-F 2 "" H 2050 6600 29  0000 C CNN

-F 3 "" H 1850 6500 60  0000 C CNN

-	1    1850 6500

-	-1   0    0    -1  

-$EndComp

-$Comp

-L eSim_Diode D2

-U 1 1 5C9D15BE

-P 2500 6500

-F 0 "D2" H 2500 6600 50  0000 C CNN

-F 1 "eSim_Diode" H 2500 6400 50  0000 C CNN

-F 2 "" H 2500 6500 60  0000 C CNN

-F 3 "" H 2500 6500 60  0000 C CNN

-	1    2500 6500

-	-1   0    0    1   

-$EndComp

-$Comp

-L eSim_R R2

-U 1 1 5C9D1601

-P 2150 6750

-F 0 "R2" H 2200 6880 50  0000 C CNN

-F 1 "5k" H 2200 6800 50  0000 C CNN

-F 2 "" H 2200 6730 30  0000 C CNN

-F 3 "" V 2200 6800 30  0000 C CNN

-	1    2150 6750

-	0    1    1    0   

-$EndComp

-$Comp

-L eSim_R R4

-U 1 1 5C9D163C

-P 3600 6750

-F 0 "R4" H 3650 6880 50  0000 C CNN

-F 1 "5k" H 3650 6800 50  0000 C CNN

-F 2 "" H 3650 6730 30  0000 C CNN

-F 3 "" V 3650 6800 30  0000 C CNN

-	1    3600 6750

-	0    1    1    0   

-$EndComp

-$Comp

-L eSim_NPN Q10

-U 1 1 5C9D172D

-P 3850 4600

-F 0 "Q10" H 3750 4650 50  0000 R CNN

-F 1 "eSim_NPN" H 3800 4750 50  0000 R CNN

-F 2 "" H 4050 4700 29  0000 C CNN

-F 3 "" H 3850 4600 60  0000 C CNN

-	1    3850 4600

-	1    0    0    -1  

-$EndComp

-$Comp

-L eSim_NPN Q9

-U 1 1 5C9D17A2

-P 3750 5900

-F 0 "Q9" H 3650 5950 50  0000 R CNN

-F 1 "eSim_NPN" H 3700 6050 50  0000 R CNN

-F 2 "" H 3950 6000 29  0000 C CNN

-F 3 "" H 3750 5900 60  0000 C CNN

-	1    3750 5900

-	-1   0    0    -1  

-$EndComp

-$Comp

-L eSim_NPN Q11

-U 1 1 5C9D17FB

-P 4600 5900

-F 0 "Q11" H 4500 5950 50  0000 R CNN

-F 1 "eSim_NPN" H 4550 6050 50  0000 R CNN

-F 2 "" H 4800 6000 29  0000 C CNN

-F 3 "" H 4600 5900 60  0000 C CNN

-	1    4600 5900

-	-1   0    0    -1  

-$EndComp

-$Comp

-L eSim_Diode D5

-U 1 1 5C9D183E

-P 4300 2950

-F 0 "D5" H 4300 3050 50  0000 C CNN

-F 1 "eSim_Diode" H 4300 2850 50  0000 C CNN

-F 2 "" H 4300 2950 60  0000 C CNN

-F 3 "" H 4300 2950 60  0000 C CNN

-	1    4300 2950

-	1    0    0    -1  

-$EndComp

-$Comp

-L eSim_Diode D6

-U 1 1 5C9D18B3

-P 4300 3950

-F 0 "D6" H 4300 4050 50  0000 C CNN

-F 1 "eSim_Diode" H 4300 3850 50  0000 C CNN

-F 2 "" H 4300 3950 60  0000 C CNN

-F 3 "" H 4300 3950 60  0000 C CNN

-	1    4300 3950

-	1    0    0    -1  

-$EndComp

-$Comp

-L eSim_NPN Q12

-U 1 1 5C9D1968

-P 4850 3950

-F 0 "Q12" H 4750 4000 50  0000 R CNN

-F 1 "eSim_NPN" H 4800 4100 50  0000 R CNN

-F 2 "" H 5050 4050 29  0000 C CNN

-F 3 "" H 4850 3950 60  0000 C CNN

-	1    4850 3950

-	1    0    0    -1  

-$EndComp

-$Comp

-L eSim_Diode D8

-U 1 1 5C9D19B5

-P 5150 2350

-F 0 "D8" H 5150 2450 50  0000 C CNN

-F 1 "eSim_Diode" H 5150 2250 50  0000 C CNN

-F 2 "" H 5150 2350 60  0000 C CNN

-F 3 "" H 5150 2350 60  0000 C CNN

-	1    5150 2350

-	1    0    0    -1  

-$EndComp

-$Comp

-L eSim_Diode D7

-U 1 1 5C9D1A10

-P 5200 3300

-F 0 "D7" H 5200 3400 50  0000 C CNN

-F 1 "eSim_Diode" H 5200 3200 50  0000 C CNN

-F 2 "" H 5200 3300 60  0000 C CNN

-F 3 "" H 5200 3300 60  0000 C CNN

-	1    5200 3300

-	1    0    0    -1  

-$EndComp

-$Comp

-L eSim_R R6

-U 1 1 5C9D1A5F

-P 4900 1250

-F 0 "R6" H 4950 1380 50  0000 C CNN

-F 1 "5k" H 4950 1300 50  0000 C CNN

-F 2 "" H 4950 1230 30  0000 C CNN

-F 3 "" V 4950 1300 30  0000 C CNN

-	1    4900 1250

-	0    1    1    0   

-$EndComp

-$Comp

-L eSim_R R8

-U 1 1 5C9D1ABE

-P 5900 1250

-F 0 "R8" H 5950 1380 50  0000 C CNN

-F 1 "5k" H 5950 1300 50  0000 C CNN

-F 2 "" H 5950 1230 30  0000 C CNN

-F 3 "" V 5950 1300 30  0000 C CNN

-	1    5900 1250

-	0    1    1    0   

-$EndComp

-$Comp

-L eSim_NPN Q14

-U 1 1 5C9D1B3D

-P 6400 1850

-F 0 "Q14" H 6300 1900 50  0000 R CNN

-F 1 "eSim_NPN" H 6350 2000 50  0000 R CNN

-F 2 "" H 6600 1950 29  0000 C CNN

-F 3 "" H 6400 1850 60  0000 C CNN

-	1    6400 1850

-	1    0    0    -1  

-$EndComp

-$Comp

-L eSim_NPN Q13

-U 1 1 5C9D1C1E

-P 5850 3300

-F 0 "Q13" H 5750 3350 50  0000 R CNN

-F 1 "eSim_NPN" H 5800 3450 50  0000 R CNN

-F 2 "" H 6050 3400 29  0000 C CNN

-F 3 "" H 5850 3300 60  0000 C CNN

-	1    5850 3300

-	1    0    0    -1  

-$EndComp

-$Comp

-L eSim_R R7

-U 1 1 5C9D1C7F

-P 5450 3550

-F 0 "R7" H 5500 3680 50  0000 C CNN

-F 1 "5k" H 5500 3600 50  0000 C CNN

-F 2 "" H 5500 3530 30  0000 C CNN

-F 3 "" V 5500 3600 30  0000 C CNN

-	1    5450 3550

-	0    1    1    0   

-$EndComp

-$Comp

-L eSim_PNP Q15

-U 1 1 5C9D1DA7

-P 7100 2750

-F 0 "Q15" H 7000 2800 50  0000 R CNN

-F 1 "eSim_PNP" H 7050 2900 50  0000 R CNN

-F 2 "" H 7300 2850 29  0000 C CNN

-F 3 "" H 7100 2750 60  0000 C CNN

-	1    7100 2750

-	1    0    0    1   

-$EndComp

-$Comp

-L eSim_PNP Q16

-U 1 1 5C9D1E16

-P 8000 2750

-F 0 "Q16" H 7900 2800 50  0000 R CNN

-F 1 "eSim_PNP" H 7950 2900 50  0000 R CNN

-F 2 "" H 8200 2850 29  0000 C CNN

-F 3 "" H 8000 2750 60  0000 C CNN

-	1    8000 2750

-	-1   0    0    -1  

-$EndComp

-$Comp

-L eSim_PNP Q17

-U 1 1 5C9D1EFF

-P 8650 2650

-F 0 "Q17" H 8550 2700 50  0000 R CNN

-F 1 "eSim_PNP" H 8600 2800 50  0000 R CNN

-F 2 "" H 8850 2750 29  0000 C CNN

-F 3 "" H 8650 2650 60  0000 C CNN

-	1    8650 2650

-	-1   0    0    1   

-$EndComp

-$Comp

-L eSim_R R13

-U 1 1 5C9D1FB4

-P 9000 1400

-F 0 "R13" H 9050 1530 50  0000 C CNN

-F 1 "5k" H 9050 1450 50  0000 C CNN

-F 2 "" H 9050 1380 30  0000 C CNN

-F 3 "" V 9050 1450 30  0000 C CNN

-	1    9000 1400

-	0    1    1    0   

-$EndComp

-$Comp

-L eSim_Diode D9

-U 1 1 5C9D2065

-P 8500 1450

-F 0 "D9" H 8500 1550 50  0000 C CNN

-F 1 "eSim_Diode" H 8500 1350 50  0000 C CNN

-F 2 "" H 8500 1450 60  0000 C CNN

-F 3 "" H 8500 1450 60  0000 C CNN

-	1    8500 1450

-	0    -1   -1   0   

-$EndComp

-$Comp

-L eSim_R R15

-U 1 1 5C9D20D8

-P 10450 1750

-F 0 "R15" H 10500 1880 50  0000 C CNN

-F 1 "5k" H 10500 1800 50  0000 C CNN

-F 2 "" H 10500 1730 30  0000 C CNN

-F 3 "" V 10500 1800 30  0000 C CNN

-	1    10450 1750

-	0    1    1    0   

-$EndComp

-$Comp

-L eSim_R R12

-U 1 1 5C9D215D

-P 8500 4200

-F 0 "R12" H 8550 4330 50  0000 C CNN

-F 1 "5k" H 8550 4250 50  0000 C CNN

-F 2 "" H 8550 4180 30  0000 C CNN

-F 3 "" V 8550 4250 30  0000 C CNN

-	1    8500 4200

-	0    1    1    0   

-$EndComp

-$Comp

-L eSim_R R5

-U 1 1 5C9D2300

-P 4450 6750

-F 0 "R5" H 4500 6880 50  0000 C CNN

-F 1 "5k" H 4500 6800 50  0000 C CNN

-F 2 "" H 4500 6730 30  0000 C CNN

-F 3 "" V 4500 6800 30  0000 C CNN

-	1    4450 6750

-	0    1    1    0   

-$EndComp

-$Comp

-L eSim_R R9

-U 1 1 5C9D2395

-P 5950 6750

-F 0 "R9" H 6000 6880 50  0000 C CNN

-F 1 "5k" H 6000 6800 50  0000 C CNN

-F 2 "" H 6000 6730 30  0000 C CNN

-F 3 "" V 6000 6800 30  0000 C CNN

-	1    5950 6750

-	0    1    1    0   

-$EndComp

-$Comp

-L eSim_R R10

-U 1 1 5C9D242E

-P 6450 6750

-F 0 "R10" H 6500 6880 50  0000 C CNN

-F 1 "5k" H 6500 6800 50  0000 C CNN

-F 2 "" H 6500 6730 30  0000 C CNN

-F 3 "" V 6500 6800 30  0000 C CNN

-	1    6450 6750

-	0    1    1    0   

-$EndComp

-$Comp

-L eSim_NPN Q18

-U 1 1 5C9D24BF

-P 9650 5900

-F 0 "Q18" H 9550 5950 50  0000 R CNN

-F 1 "eSim_NPN" H 9600 6050 50  0000 R CNN

-F 2 "" H 9850 6000 29  0000 C CNN

-F 3 "" H 9650 5900 60  0000 C CNN

-	1    9650 5900

-	-1   0    0    -1  

-$EndComp

-$Comp

-L eSim_NPN Q19

-U 1 1 5C9D2540

-P 10350 5900

-F 0 "Q19" H 10250 5950 50  0000 R CNN

-F 1 "eSim_NPN" H 10300 6050 50  0000 R CNN

-F 2 "" H 10550 6000 29  0000 C CNN

-F 3 "" H 10350 5900 60  0000 C CNN

-	1    10350 5900

-	1    0    0    -1  

-$EndComp

-$Comp

-L eSim_R R14

-U 1 1 5C9D25BD

-P 9500 6750

-F 0 "R14" H 9550 6880 50  0000 C CNN

-F 1 "5k" H 9550 6800 50  0000 C CNN

-F 2 "" H 9550 6730 30  0000 C CNN

-F 3 "" V 9550 6800 30  0000 C CNN

-	1    9500 6750

-	0    1    1    0   

-$EndComp

-$Comp

-L eSim_R R16

-U 1 1 5C9D2650

-P 10450 6750

-F 0 "R16" H 10500 6880 50  0000 C CNN

-F 1 "5k" H 10500 6800 50  0000 C CNN

-F 2 "" H 10500 6730 30  0000 C CNN

-F 3 "" V 10500 6800 30  0000 C CNN

-	1    10450 6750

-	0    1    1    0   

-$EndComp

-$Comp

-L PORT U1

-U 5 1 5C9D2BB3

-P 650 1650

-F 0 "U1" H 700 1750 30  0000 C CNN

-F 1 "PORT" H 650 1650 30  0000 C CNN

-F 2 "" H 650 1650 60  0000 C CNN

-F 3 "" H 650 1650 60  0000 C CNN

-	5    650  1650

-	1    0    0    -1  

-$EndComp

-$Comp

-L PORT U1

-U 6 1 5C9D68D0

-P 2100 800

-F 0 "U1" H 2150 900 30  0000 C CNN

-F 1 "PORT" H 2100 800 30  0000 C CNN

-F 2 "" H 2100 800 60  0000 C CNN

-F 3 "" H 2100 800 60  0000 C CNN

-	6    2100 800 

-	-1   0    0    1   

-$EndComp

-$Comp

-L eSim_R R11

-U 1 1 5C9D8B9B

-P 7150 1350

-F 0 "R11" H 7200 1480 50  0000 C CNN

-F 1 "5k" H 7200 1400 50  0000 C CNN

-F 2 "" H 7200 1330 30  0000 C CNN

-F 3 "" V 7200 1400 30  0000 C CNN

-	1    7150 1350

-	0    1    1    0   

-$EndComp

-$Comp

-L PORT U1

-U 8 1 5C9D98CB

-P 3650 550

-F 0 "U1" H 3700 650 30  0000 C CNN

-F 1 "PORT" H 3650 550 30  0000 C CNN

-F 2 "" H 3650 550 60  0000 C CNN

-F 3 "" H 3650 550 60  0000 C CNN

-	8    3650 550 

-	0    1    1    0   

-$EndComp

-$Comp

-L PORT U1

-U 7 1 5C9E5DF3

-P 3150 3950

-F 0 "U1" H 3200 4050 30  0000 C CNN

-F 1 "PORT" H 3150 3950 30  0000 C CNN

-F 2 "" H 3150 3950 60  0000 C CNN

-F 3 "" H 3150 3950 60  0000 C CNN

-	7    3150 3950

-	0    -1   -1   0   

-$EndComp

-$Comp

-L PORT U1

-U 4 1 5C9E625B

-P 4950 5150

-F 0 "U1" H 5000 5250 30  0000 C CNN

-F 1 "PORT" H 4950 5150 30  0000 C CNN

-F 2 "" H 4950 5150 60  0000 C CNN

-F 3 "" H 4950 5150 60  0000 C CNN

-	4    4950 5150

-	-1   0    0    1   

-$EndComp

-$Comp

-L PORT U1

-U 3 1 5C9E6ECC

-P 6800 5100

-F 0 "U1" H 6850 5200 30  0000 C CNN

-F 1 "PORT" H 6800 5100 30  0000 C CNN

-F 2 "" H 6800 5100 60  0000 C CNN

-F 3 "" H 6800 5100 60  0000 C CNN

-	3    6800 5100

-	-1   0    0    1   

-$EndComp

-$Comp

-L PORT U1

-U 1 1 5C9E7FDD

-P 11100 7250

-F 0 "U1" H 11150 7350 30  0000 C CNN

-F 1 "PORT" H 11100 7250 30  0000 C CNN

-F 2 "" H 11100 7250 60  0000 C CNN

-F 3 "" H 11100 7250 60  0000 C CNN

-	1    11100 7250

-	0    -1   -1   0   

-$EndComp

-Text Notes 500  1450 0    79   ~ 0

-Modulation Input\n

-Text Notes 2200 800  0    79   ~ 0

-R1(External)

-Text Notes 3300 5750 1    79   ~ 0

-C1(External)\n

-Text Notes 4500 5050 0    79   ~ 0

-Triangle Wave Output

-Text Notes 6500 5000 0    79   ~ 0

-Square Wave Output\n

-Text Notes 10950 7000 0    79   ~ 0

-GND\n

-Text Notes 3425 625  0    79   ~ 0

-V+\n

-$Comp

-L eSim_Diode D10

-U 1 1 5C9F4364

-P 1300 1850

-F 0 "D10" H 1300 1950 50  0000 C CNN

-F 1 "eSim_Diode" H 1300 1750 50  0000 C CNN

-F 2 "" H 1300 1850 60  0000 C CNN

-F 3 "" H 1300 1850 60  0000 C CNN

-	1    1300 1850

-	0    -1   -1   0   

-$EndComp

-Text Notes 950  1650 0    79   ~ 0

-Vc\n

-Wire Wire Line

-	1750 1850 1750 2250

-Wire Wire Line

-	900  1650 1450 1650

-Wire Wire Line

-	2750 2000 2750 2250

-Wire Wire Line

-	2050 2450 2450 2450

-Wire Wire Line

-	2750 2200 2250 2200

-Wire Wire Line

-	2250 2200 2250 2450

-Connection ~ 2250 2450

-Connection ~ 2750 2200

-Wire Wire Line

-	2100 1800 2450 1800

-Wire Wire Line

-	2100 2000 2100 1800

-Wire Wire Line

-	1300 2000 2100 2000

-Connection ~ 1750 2000

-Wire Wire Line

-	2750 1450 1750 1450

-Wire Wire Line

-	2750 2650 2750 3000

-Wire Wire Line

-	1750 2650 1750 3000

-Wire Wire Line

-	2750 2850 1750 2850

-Connection ~ 1750 2850

-Connection ~ 2750 2850

-Wire Wire Line

-	2750 3300 2750 3900

-Wire Wire Line

-	2450 4100 1750 4100

-Wire Wire Line

-	1750 3300 1750 4700

-Connection ~ 1750 4100

-Wire Wire Line

-	2750 4300 2750 4700

-Wire Wire Line

-	2050 4900 2450 4900

-Wire Wire Line

-	2750 3550 3350 3550

-Connection ~ 2750 3550

-Wire Wire Line

-	2750 4500 2250 4500

-Wire Wire Line

-	2250 4500 2250 4900

-Connection ~ 2250 4900

-Connection ~ 2750 4500

-Wire Wire Line

-	2750 5100 2750 5400

-Wire Wire Line

-	2750 5700 2750 5950

-Wire Wire Line

-	1750 5100 1750 5450

-Wire Wire Line

-	1750 5750 1750 6300

-Wire Wire Line

-	1750 5900 2750 5900

-Connection ~ 2750 5900

-Connection ~ 1750 5900

-Wire Wire Line

-	2750 6250 2750 6500

-Wire Wire Line

-	2650 6500 8550 6500

-Wire Wire Line

-	1750 6700 1750 7000

-Wire Wire Line

-	2050 6500 2350 6500

-Wire Wire Line

-	2200 6500 2200 6650

-Connection ~ 2200 6500

-Wire Wire Line

-	1750 7000 11100 7000

-Wire Wire Line

-	2200 7000 2200 6950

-Connection ~ 2200 7000

-Wire Wire Line

-	4500 6950 4500 7000

-Connection ~ 4500 7000

-Wire Wire Line

-	6000 7000 6000 6950

-Wire Wire Line

-	9550 6950 9550 7000

-Connection ~ 9550 7000

-Wire Wire Line

-	10500 6950 10500 7000

-Connection ~ 10500 7000

-Wire Wire Line

-	4500 6100 4500 6650

-Wire Wire Line

-	3650 3750 3650 5700

-Connection ~ 3650 4600

-Wire Wire Line

-	3950 4800 4500 4800

-Wire Wire Line

-	4500 4800 4500 5700

-Wire Wire Line

-	1750 1450 1750 800 

-Wire Wire Line

-	1750 800  1850 800 

-Wire Wire Line

-	3650 800  10500 800 

-Wire Wire Line

-	10500 1950 10500 5700

-Wire Wire Line

-	10500 5700 10450 5700

-Wire Wire Line

-	9850 5900 10150 5900

-Wire Wire Line

-	10500 5550 10000 5550

-Wire Wire Line

-	10000 5550 10000 5900

-Connection ~ 10000 5900

-Connection ~ 10500 5550

-Wire Wire Line

-	10450 6100 10450 6650

-Wire Wire Line

-	10450 6650 10500 6650

-Wire Wire Line

-	9550 6100 9550 6650

-Wire Wire Line

-	9550 1600 9550 5700

-Wire Wire Line

-	8500 1600 9550 1600

-Wire Wire Line

-	9050 800  9050 1300

-Connection ~ 9050 800 

-Connection ~ 9050 1600

-Wire Wire Line

-	8500 1300 8500 800 

-Connection ~ 8500 800 

-Wire Wire Line

-	9550 2650 8850 2650

-Connection ~ 9550 2650

-Wire Wire Line

-	7200 2450 8550 2450

-Wire Wire Line

-	7900 2450 7900 2550

-Wire Wire Line

-	7200 1550 7200 2550

-Connection ~ 7900 2450

-Wire Wire Line

-	7200 800  7200 1250

-Connection ~ 7200 800 

-Connection ~ 7200 2450

-Wire Wire Line

-	3650 3350 3650 800 

-Connection ~ 3650 800 

-Wire Wire Line

-	3950 4400 3950 800 

-Connection ~ 3950 800 

-Wire Wire Line

-	4950 1150 4950 800 

-Connection ~ 4950 800 

-Wire Wire Line

-	5950 1150 5950 800 

-Connection ~ 5950 800 

-Wire Wire Line

-	6200 1850 5950 1850

-Wire Wire Line

-	5950 1450 5950 3100

-Wire Wire Line

-	4950 1450 4950 3750

-Wire Wire Line

-	4950 2350 5000 2350

-Wire Wire Line

-	5950 2350 5300 2350

-Connection ~ 5950 1850

-Wire Wire Line

-	3650 3950 4150 3950

-Connection ~ 3650 3950

-Wire Wire Line

-	4150 2950 3850 2950

-Wire Wire Line

-	3850 2950 3850 3950

-Connection ~ 3850 3950

-Wire Wire Line

-	4950 2950 4450 2950

-Connection ~ 4950 2350

-Connection ~ 4950 2950

-Wire Wire Line

-	4650 3950 4450 3950

-Wire Wire Line

-	3650 6950 3650 7000

-Connection ~ 3650 7000

-Wire Wire Line

-	3650 6650 3650 6100

-Wire Wire Line

-	10000 5900 3950 5900

-Connection ~ 4800 5900

-Wire Wire Line

-	8550 6500 8550 4400

-Connection ~ 2750 6500

-Wire Wire Line

-	8550 2850 8550 4100

-Wire Wire Line

-	8200 2750 8350 2750

-Wire Wire Line

-	8350 2750 8350 3000

-Wire Wire Line

-	8350 3000 8550 3000

-Connection ~ 8550 3000

-Wire Wire Line

-	7900 2950 7900 6500

-Connection ~ 7900 6500

-Wire Wire Line

-	7200 2950 7200 7000

-Wire Wire Line

-	6500 1650 6500 800 

-Connection ~ 6500 800 

-Connection ~ 7200 7000

-Connection ~ 6000 7000

-Wire Wire Line

-	6500 6950 6500 7000

-Connection ~ 6500 7000

-Wire Wire Line

-	5350 3300 5650 3300

-Wire Wire Line

-	5500 3300 5500 3450

-Connection ~ 5500 3300

-Wire Wire Line

-	4950 4150 6000 4150

-Wire Wire Line

-	5950 4150 5950 3500

-Wire Wire Line

-	5500 3750 5500 4150

-Connection ~ 5500 4150

-Wire Wire Line

-	6000 4150 6000 6650

-Connection ~ 5950 4150

-Connection ~ 5950 2350

-Wire Wire Line

-	3150 3550 3150 3700

-Connection ~ 3150 3550

-Wire Wire Line

-	4700 5150 4500 5150

-Connection ~ 4500 5150

-Wire Notes Line

-	2200 800  2900 800 

-Wire Notes Line

-	3150 4050 3150 7000

-Wire Wire Line

-	1300 1700 1300 1650

-Connection ~ 1300 1650

-Wire Wire Line

-	5050 3300 4950 3300

-Connection ~ 4950 3300

-$Comp

-L eSim_PNP Q20

-U 1 1 5CA087B6

-P 2650 1800

-F 0 "Q20" H 2550 1850 50  0000 R CNN

-F 1 "eSim_PNP" H 2600 1950 50  0000 R CNN

-F 2 "" H 2850 1900 29  0000 C CNN

-F 3 "" H 2650 1800 60  0000 C CNN

-	1    2650 1800

-	1    0    0    1   

-$EndComp

-Wire Wire Line

-	2750 1450 2750 1600

-Wire Notes Line

-	2925 800  3600 800 

-Wire Wire Line

-	10500 800  10500 1650

-Wire Wire Line

-	6500 2050 6500 6650

-Wire Wire Line

-	6500 5100 6550 5100

-Connection ~ 6500 5100

-Wire Wire Line

-	6900 2750 6500 2750

-Connection ~ 6500 2750

-$EndSCHEMATC

diff --git a/src/SubcircuitLibrary/NE566/NE566.sub b/src/SubcircuitLibrary/NE566/NE566.sub
deleted file mode 100644
index 5b2fc943..00000000
--- a/src/SubcircuitLibrary/NE566/NE566.sub
+++ /dev/null
@@ -1,55 +0,0 @@
-* Subcircuit NE566

-.subckt NE566 net-_q15-pad1_ net-_q14-pad3_ net-_q10-pad3_ net-_d10-pad2_ net-_q1-pad1_ net-_d3-pad2_ net-_d9-pad2_ 

-* c:\esim_1\esim\src\subcircuitlibrary\ne566\ne566.cir

-.include PNP.lib

-.include D.lib

-.include NPN.lib

-q1 net-_q1-pad1_ net-_d10-pad2_ net-_d10-pad1_ Q2N2222

-q2 net-_d10-pad1_ net-_q2-pad2_ net-_d1-pad1_ Q2N2222

-q5 net-_q2-pad2_ net-_q2-pad2_ net-_d1-pad1_ Q2N2222

-d1 net-_d1-pad1_ net-_d1-pad2_ 1N4148

-d3 net-_d1-pad1_ net-_d3-pad2_ 1N4148

-q6 net-_d3-pad2_ net-_d1-pad2_ net-_q3-pad2_ Q2N2222

-q8 net-_d9-pad2_ net-_d3-pad2_ net-_d5-pad1_ Q2N2222

-q7 net-_q3-pad2_ net-_q3-pad2_ net-_q7-pad3_ Q2N2222

-q3 net-_d1-pad2_ net-_q3-pad2_ net-_q3-pad3_ Q2N2222

-r1  net-_q3-pad3_ net-_d4-pad2_ 5k

-r3  net-_q7-pad3_ net-_d4-pad2_ 5k

-d4 net-_d2-pad1_ net-_d4-pad2_ 1N4148

-q4 net-_d4-pad2_ net-_d2-pad2_ net-_q15-pad1_ Q2N2222

-d2 net-_d2-pad1_ net-_d2-pad2_ 1N4148

-r2  net-_d2-pad2_ net-_q15-pad1_ 5k

-r4  net-_q9-pad3_ net-_q15-pad1_ 5k

-q10 net-_d9-pad2_ net-_d5-pad1_ net-_q10-pad3_ Q2N2222

-q9 net-_d5-pad1_ net-_q11-pad2_ net-_q9-pad3_ Q2N2222

-q11 net-_q10-pad3_ net-_q11-pad2_ net-_q11-pad3_ Q2N2222

-d5 net-_d5-pad1_ net-_d5-pad2_ 1N4148

-d6 net-_d5-pad1_ net-_d6-pad2_ 1N4148

-q12 net-_d5-pad2_ net-_d6-pad2_ net-_q12-pad3_ Q2N2222

-d8 net-_d5-pad2_ net-_d8-pad2_ 1N4148

-d7 net-_d5-pad2_ net-_d7-pad2_ 1N4148

-r6  net-_d9-pad2_ net-_d5-pad2_ 5k

-r8  net-_d9-pad2_ net-_d8-pad2_ 5k

-q14 net-_d9-pad2_ net-_d8-pad2_ net-_q14-pad3_ Q2N2222

-q13 net-_d8-pad2_ net-_d7-pad2_ net-_q12-pad3_ Q2N2222

-r7  net-_d7-pad2_ net-_q12-pad3_ 5k

-q15 net-_q15-pad1_ net-_q14-pad3_ net-_q15-pad3_ Q2N2907A

-q16 net-_q15-pad3_ net-_q16-pad2_ net-_d2-pad1_ Q2N2222

-q17 net-_q16-pad2_ net-_d9-pad1_ net-_q15-pad3_ Q2N2222

-r13  net-_d9-pad2_ net-_d9-pad1_ 5k

-d9 net-_d9-pad1_ net-_d9-pad2_ 1N4148

-r15  net-_d9-pad2_ net-_q11-pad2_ 5k

-r12  net-_q16-pad2_ net-_d2-pad1_ 5k

-r5  net-_q11-pad3_ net-_q15-pad1_ 5k

-r9  net-_q12-pad3_ net-_q15-pad1_ 5k

-r10  net-_q14-pad3_ net-_q15-pad1_ 5k

-q18 net-_d9-pad1_ net-_q11-pad2_ net-_q18-pad3_ Q2N2222

-q19 net-_q11-pad2_ net-_q11-pad2_ net-_q19-pad3_ Q2N2222

-r14  net-_q18-pad3_ net-_q15-pad1_ 5k

-r16  net-_q19-pad3_ net-_q15-pad1_ 5k

-r11  net-_d9-pad2_ net-_q15-pad3_ 5k

-d10 net-_d10-pad1_ net-_d10-pad2_ 1N4148

-q20 net-_q2-pad2_ net-_d10-pad1_ net-_q1-pad1_ Q2N2222

-* Control Statements

-

-.ends NE566
\ No newline at end of file
diff --git a/src/SubcircuitLibrary/NE566/NE566_Previous_Values.xml b/src/SubcircuitLibrary/NE566/NE566_Previous_Values.xml
deleted file mode 100644
index cd7c0b08..00000000
--- a/src/SubcircuitLibrary/NE566/NE566_Previous_Values.xml
+++ /dev/null
@@ -1 +0,0 @@
-<KicadtoNgspice><source /><model /><devicemodel><q20><field>C:/esim_1/eSim/src/deviceModelLibrary/Transistor/PNP.lib</field></q20><d8><field>C:/esim_1/eSim/src/deviceModelLibrary/Diode/D.lib</field></d8><d9><field>C:/esim_1/eSim/src/deviceModelLibrary/Diode/D.lib</field></d9><d6><field>C:/esim_1/eSim/src/deviceModelLibrary/Diode/D.lib</field></d6><d7><field>C:/esim_1/eSim/src/deviceModelLibrary/Diode/D.lib</field></d7><d4><field>C:/esim_1/eSim/src/deviceModelLibrary/Diode/D.lib</field></d4><d5><field>C:/esim_1/eSim/src/deviceModelLibrary/Diode/D.lib</field></d5><d2><field>C:/esim_1/eSim/src/deviceModelLibrary/Diode/D.lib</field></d2><d3><field>C:/esim_1/eSim/src/deviceModelLibrary/Diode/D.lib</field></d3><d1><field>C:/esim_1/eSim/src/deviceModelLibrary/Diode/D.lib</field></d1><q1><field>C:/esim_1/eSim/src/deviceModelLibrary/Transistor/NPN.lib</field></q1><q3><field>C:/esim_1/eSim/src/deviceModelLibrary/Transistor/NPN.lib</field></q3><q2><field>C:/esim_1/eSim/src/deviceModelLibrary/Transistor/NPN.lib</field></q2><q5><field>C:/esim_1/eSim/src/deviceModelLibrary/Transistor/NPN.lib</field></q5><q4><field>C:/esim_1/eSim/src/deviceModelLibrary/Transistor/NPN.lib</field></q4><q7><field>C:/esim_1/eSim/src/deviceModelLibrary/Transistor/NPN.lib</field></q7><q6><field>C:/esim_1/eSim/src/deviceModelLibrary/Transistor/NPN.lib</field></q6><q9><field>C:/esim_1/eSim/src/deviceModelLibrary/Transistor/NPN.lib</field></q9><q8><field>C:/esim_1/eSim/src/deviceModelLibrary/Transistor/NPN.lib</field></q8><q15><field>C:/esim_1/eSim/src/deviceModelLibrary/Transistor/PNP.lib</field></q15><q14><field>C:/esim_1/eSim/src/deviceModelLibrary/Transistor/NPN.lib</field></q14><q17><field>C:/esim_1/eSim/src/deviceModelLibrary/Transistor/PNP.lib</field></q17><q16><field>C:/esim_1/eSim/src/deviceModelLibrary/Transistor/PNP.lib</field></q16><q11><field>C:/esim_1/eSim/src/deviceModelLibrary/Transistor/NPN.lib</field></q11><q10><field>C:/esim_1/eSim/src/deviceModelLibrary/Transistor/NPN.lib</field></q10><q13><field>C:/esim_1/eSim/src/deviceModelLibrary/Transistor/NPN.lib</field></q13><q12><field>C:/esim_1/eSim/src/deviceModelLibrary/Transistor/NPN.lib</field></q12><d10><field>C:/esim_1/eSim/src/deviceModelLibrary/Diode/D.lib</field></d10><q19><field>C:/esim_1/eSim/src/deviceModelLibrary/Transistor/NPN.lib</field></q19><q18><field>C:/esim_1/eSim/src/deviceModelLibrary/Transistor/NPN.lib</field></q18></devicemodel><subcircuit /><analysis><ac><field1 name="Lin">true</field1><field2 name="Dec">false</field2><field3 name="Oct">false</field3><field4 name="Start Frequency" /><field5 name="Stop Frequency" /><field6 name="No. of points" /><field7 name="Start Fre Combo">Hz</field7><field8 name="Stop Fre Combo">Hz</field8></ac><dc><field1 name="Source 1" /><field2 name="Start" /><field3 name="Increment" /><field4 name="Stop" /><field5 name="Operating Point">0</field5><field6 name="Start Combo">Volts or Amperes</field6><field7 name="Increment Combo">Volts or Amperes</field7><field8 name="Stop Combo">Volts or Amperes</field8><field9 name="Source 2" /><field10 name="Start" /><field11 name="Increment" /><field12 name="Stop" /><field13 name="Start Combo">Volts or Amperes</field13><field14 name="Increment Combo">Volts or Amperes</field14><field15 name="Stop Combo">Volts or Amperes</field15></dc><tran><field1 name="Start Time">0</field1><field2 name="Step Time">10</field2><field3 name="Stop Time">100</field3><field4 name="Start Combo">Sec</field4><field5 name="Step Combo">ms</field5><field6 name="Stop Combo">ms</field6></tran></analysis></KicadtoNgspice>
\ No newline at end of file
diff --git a/src/SubcircuitLibrary/diac/analysis b/src/SubcircuitLibrary/diac/analysis
deleted file mode 100644
index ebd5c0a9..00000000
--- a/src/SubcircuitLibrary/diac/analysis
+++ /dev/null
@@ -1 +0,0 @@
-.tran 0e-00 0e-00 0e-00
\ No newline at end of file
diff --git a/src/SubcircuitLibrary/diac/diac.cir b/src/SubcircuitLibrary/diac/diac.cir
deleted file mode 100644
index 91629b91..00000000
--- a/src/SubcircuitLibrary/diac/diac.cir
+++ /dev/null
@@ -1,13 +0,0 @@
-* /opt/eSim/src/SubcircuitLibrary/diac/diac.cir
-
-* EESchema Netlist Version 1.1 (Spice format) creation date: Tue Dec  8 15:35:49 2015
-
-* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N
-* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0
-
-* Sheet Name: /
-U3  1 2 PORT		
-U1  1 1 2 aswitch		
-U2  1 1 2 aswitch		
-
-.end
diff --git a/src/SubcircuitLibrary/diac/diac.cir.out b/src/SubcircuitLibrary/diac/diac.cir.out
deleted file mode 100644
index a1e31f14..00000000
--- a/src/SubcircuitLibrary/diac/diac.cir.out
+++ /dev/null
@@ -1,21 +0,0 @@
-* /opt/esim/src/subcircuitlibrary/diac/diac.cir
-
-* u3  1 2 port
-* u1  1 1 2 aswitch
-* u2  1 1 2 aswitch
-a1 1 (1 2)  u1
-a2 1 (1 2)  u2
-* Schematic Name: aswitch, NgSpice Name: aswitch
-.model u1 aswitch(log=TRUE cntl_off=0.1 cntl_on=25 r_on=0.0125 r_off=1000000 ) 
-* Schematic Name: aswitch, NgSpice Name: aswitch
-.model u2 aswitch(log=TRUE cntl_off=-0.1 cntl_on=-25 r_on=0.0125 r_off=1000000 ) 
- 
-.tran 0e-00 0e-00 0e-00
-
-* Control Statements 
-.control
-run
-print allv > plot_data_v.txt
-print alli > plot_data_i.txt
-.endc
-.end
diff --git a/src/SubcircuitLibrary/diac/diac.pro b/src/SubcircuitLibrary/diac/diac.pro
deleted file mode 100644
index c8563047..00000000
--- a/src/SubcircuitLibrary/diac/diac.pro
+++ /dev/null
@@ -1,45 +0,0 @@
-update=Tue Dec  8 14:06:36 2015
-last_client=eeschema
-[eeschema]
-version=1
-LibDir=
-[eeschema/libraries]
-LibName1=power
-LibName2=device
-LibName3=transistors
-LibName4=conn
-LibName5=linear
-LibName6=regul
-LibName7=74xx
-LibName8=cmos4000
-LibName9=adc-dac
-LibName10=memory
-LibName11=xilinx
-LibName12=special
-LibName13=microcontrollers
-LibName14=dsp
-LibName15=microchip
-LibName16=analog_switches
-LibName17=motorola
-LibName18=texas
-LibName19=intel
-LibName20=audio
-LibName21=interface
-LibName22=digital-audio
-LibName23=philips
-LibName24=display
-LibName25=cypress
-LibName26=siliconi
-LibName27=opto
-LibName28=atmel
-LibName29=contrib
-LibName30=valves
-LibName31=analogSpice
-LibName32=eSim_Analog
-LibName33=eSim_Devices
-LibName34=eSim_Digital
-LibName35=eSim_Hybrid
-LibName36=eSim_Miscellaneous
-LibName37=eSim_Sources
-LibName38=eSim_Subckt
-LibName39=eSim_User
diff --git a/src/SubcircuitLibrary/diac/diac.sch b/src/SubcircuitLibrary/diac/diac.sch
deleted file mode 100644
index 163665e7..00000000
--- a/src/SubcircuitLibrary/diac/diac.sch
+++ /dev/null
@@ -1,148 +0,0 @@
-EESchema Schematic File Version 2
-LIBS:power
-LIBS:device
-LIBS:transistors
-LIBS:conn
-LIBS:linear
-LIBS:regul
-LIBS:74xx
-LIBS:cmos4000
-LIBS:adc-dac
-LIBS:memory
-LIBS:xilinx
-LIBS:microcontrollers
-LIBS:dsp
-LIBS:microchip
-LIBS:analog_switches
-LIBS:motorola
-LIBS:texas
-LIBS:intel
-LIBS:audio
-LIBS:interface
-LIBS:digital-audio
-LIBS:philips
-LIBS:display
-LIBS:cypress
-LIBS:siliconi
-LIBS:opto
-LIBS:atmel
-LIBS:contrib
-LIBS:valves
-LIBS:analogSpice
-LIBS:eSim_Analog
-LIBS:eSim_Devices
-LIBS:eSim_Digital
-LIBS:eSim_Hybrid
-LIBS:eSim_Miscellaneous
-LIBS:eSim_Sources
-LIBS:eSim_Subckt
-LIBS:eSim_User
-EELAYER 25 0
-EELAYER END
-$Descr A4 11693 8268
-encoding utf-8
-Sheet 1 1
-Title ""
-Date "22 sep 2014"
-Rev ""
-Comp ""
-Comment1 ""
-Comment2 ""
-Comment3 ""
-Comment4 ""
-$EndDescr
-Wire Wire Line
-	4150 2750 4150 4300
-Connection ~ 4400 3750
-Wire Wire Line
-	4400 4450 5050 4450
-Wire Wire Line
-	4400 4450 4400 3450
-Wire Wire Line
-	5500 3350 5500 4050
-Connection ~ 4600 3400
-Wire Wire Line
-	4600 4050 4600 2750
-Wire Wire Line
-	4600 2750 4150 2750
-Wire Wire Line
-	4400 3450 4150 3450
-Connection ~ 4150 3450
-Wire Wire Line
-	4400 3750 5050 3750
-$Comp
-L PWR_FLAG #FLG01
-U 1 1 5417D647
-P 4150 4300
-F 0 "#FLG01" H 4150 4570 30  0001 C CNN
-F 1 "PWR_FLAG" H 4150 4530 30  0000 C CNN
-F 2 "" H 4150 4300 60  0001 C CNN
-F 3 "" H 4150 4300 60  0001 C CNN
-	1    4150 4300
-	0    1    1    0   
-$EndComp
-$Comp
-L PORT U3
-U 2 1 5417D62C
-P 5750 3350
-F 0 "U3" H 5750 3300 30  0000 C CNN
-F 1 "PORT" H 5750 3350 30  0000 C CNN
-F 2 "" H 5750 3350 60  0001 C CNN
-F 3 "" H 5750 3350 60  0001 C CNN
-	2    5750 3350
-	-1   0    0    1   
-$EndComp
-$Comp
-L PORT U3
-U 1 1 5417D624
-P 4150 2500
-F 0 "U3" H 4150 2450 30  0000 C CNN
-F 1 "PORT" H 4150 2500 30  0000 C CNN
-F 2 "" H 4150 2500 60  0001 C CNN
-F 3 "" H 4150 2500 60  0001 C CNN
-	1    4150 2500
-	0    1    1    0   
-$EndComp
-$Comp
-L GND #PWR02
-U 1 1 5417D5DC
-P 4150 4300
-F 0 "#PWR02" H 4150 4300 30  0001 C CNN
-F 1 "GND" H 4150 4230 30  0001 C CNN
-F 2 "" H 4150 4300 60  0001 C CNN
-F 3 "" H 4150 4300 60  0001 C CNN
-	1    4150 4300
-	1    0    0    -1  
-$EndComp
-$Comp
-L aswitch U1
-U 1 1 56669812
-P 4600 3550
-F 0 "U1" H 5050 3850 60  0000 C CNN
-F 1 "aswitch" H 5050 3750 60  0000 C CNN
-F 2 "" H 5050 3650 60  0000 C CNN
-F 3 "" H 5050 3650 60  0000 C CNN
-	1    4600 3550
-	1    0    0    -1  
-$EndComp
-$Comp
-L aswitch U2
-U 1 1 5666987C
-P 4600 4200
-F 0 "U2" H 5050 4500 60  0000 C CNN
-F 1 "aswitch" H 5050 4400 60  0000 C CNN
-F 2 "" H 5050 4300 60  0000 C CNN
-F 3 "" H 5050 4300 60  0000 C CNN
-	1    4600 4200
-	1    0    0    -1  
-$EndComp
-Wire Wire Line
-	5050 4450 5050 4300
-Wire Wire Line
-	5050 3750 5050 3650
-Wire Wire Line
-	5500 4050 5450 4050
-Wire Wire Line
-	5500 3400 5450 3400
-Connection ~ 5500 3400
-$EndSCHEMATC
diff --git a/src/SubcircuitLibrary/diac/diac.sub b/src/SubcircuitLibrary/diac/diac.sub
deleted file mode 100644
index 7f28ecc2..00000000
--- a/src/SubcircuitLibrary/diac/diac.sub
+++ /dev/null
@@ -1,15 +0,0 @@
-* Subcircuit diac
-.subckt diac 1 2 
-* /opt/esim/src/subcircuitlibrary/diac/diac.cir
-* u1  1 1 2 aswitch
-* u2  1 1 2 aswitch
-a1 1 (1 2)  u1
-a2 1 (1 2)  u2
-* Schematic Name: aswitch, NgSpice Name: aswitch
-.model u1 aswitch(log=TRUE cntl_off=0.1 cntl_on=25 r_on=0.0125 r_off=1000000 )
-* Schematic Name: aswitch, NgSpice Name: aswitch
-.model u2 aswitch(log=TRUE cntl_off=-0.1 cntl_on=-25 r_on=0.0125 r_off=1000000 )
-
-* Control Statements
-
-.ends diac
diff --git a/src/SubcircuitLibrary/diac/diac_Previous_Values.xml b/src/SubcircuitLibrary/diac/diac_Previous_Values.xml
deleted file mode 100644
index 96df431c..00000000
--- a/src/SubcircuitLibrary/diac/diac_Previous_Values.xml
+++ /dev/null
@@ -1 +0,0 @@
-<KicadtoNgspice><source /><model><u1 name="type">aswitch<field1 name="Enter Log (default=TRUE)" /><field2 name="Enter Control OFF value (default=0.0)">0.1</field2><field3 name="Enter OFF Resistance (default=1.0e12)">1000000</field3><field4 name="Enter ON Resistance (default=1.0)">0.0125</field4><field5 name="Enter Control ON value(default=1.0)">25</field5></u1><u2 name="type">aswitch<field6 name="Enter Log (default=TRUE)" /><field7 name="Enter Control OFF value (default=0.0)">-0.1</field7><field8 name="Enter OFF Resistance (default=1.0e12)">1000000</field8><field9 name="Enter ON Resistance (default=1.0)">0.0125</field9><field10 name="Enter Control ON value(default=1.0)">-25</field10></u2></model><devicemodel /><subcircuit /><analysis><ac><field1 name="Lin">true</field1><field2 name="Dec">false</field2><field3 name="Oct">false</field3><field4 name="Start Frequency" /><field5 name="Stop Frequency" /><field6 name="No. of points" /><field7 name="Start Fre Combo">Hz</field7><field8 name="Stop Fre Combo">Hz</field8></ac><dc><field1 name="Source Name" /><field2 name="Start" /><field3 name="Increment" /><field4 name="Stop" /><field5 name="Operating Point">0</field5><field6 name="Start Combo">Volts or Amperes</field6><field7 name="Increment Combo">Volts or Amperes</field7><field8 name="Stop Combo">Volts or Amperes</field8></dc><tran><field1 name="Start Time" /><field2 name="Step Time" /><field3 name="Stop Time" /><field4 name="Start Combo">Sec</field4><field5 name="Step Combo">Sec</field5><field6 name="Stop Combo">Sec</field6></tran></analysis></KicadtoNgspice>
\ No newline at end of file
diff --git a/src/SubcircuitLibrary/half_adder/analysis b/src/SubcircuitLibrary/half_adder/analysis
deleted file mode 100644
index 52ccc5ec..00000000
--- a/src/SubcircuitLibrary/half_adder/analysis
+++ /dev/null
@@ -1 +0,0 @@
-.ac lin 0 0Hz 0Hz
\ No newline at end of file
diff --git a/src/SubcircuitLibrary/lm555n/NPN.lib b/src/SubcircuitLibrary/lm555n/NPN.lib
deleted file mode 100644
index 6509fe7a..00000000
--- a/src/SubcircuitLibrary/lm555n/NPN.lib
+++ /dev/null
@@ -1,4 +0,0 @@
-.model Q2N2222  NPN( Is=14.34f Xti=3 Eg=1.11 Vaf=74.03 Bf=400 Ne=1.307 
-+ Ise=14.34f Ikf=.2847 Xtb=1.5 Br=6.092 Nc=2 Isc=0 Ikr=0 Rc=1 Cjc=7.306p 
-+ Mjc=.3416 Vjc=.75 Fc=.5 Cje=22.01p Mje=.377 Vje=.75 Tr=46.91n Tf=411.1p 
-+ Itf=.6 Vtf=1.7 Xtf=3 Rb=10) 
diff --git a/src/SubcircuitLibrary/lm7805/NPN.lib b/src/SubcircuitLibrary/lm7805/NPN.lib
deleted file mode 100644
index 6509fe7a..00000000
--- a/src/SubcircuitLibrary/lm7805/NPN.lib
+++ /dev/null
@@ -1,4 +0,0 @@
-.model Q2N2222  NPN( Is=14.34f Xti=3 Eg=1.11 Vaf=74.03 Bf=400 Ne=1.307 
-+ Ise=14.34f Ikf=.2847 Xtb=1.5 Br=6.092 Nc=2 Isc=0 Ikr=0 Rc=1 Cjc=7.306p 
-+ Mjc=.3416 Vjc=.75 Fc=.5 Cje=22.01p Mje=.377 Vje=.75 Tr=46.91n Tf=411.1p 
-+ Itf=.6 Vtf=1.7 Xtf=3 Rb=10) 
diff --git a/src/SubcircuitLibrary/lm7805/PNP.lib b/src/SubcircuitLibrary/lm7805/PNP.lib
deleted file mode 100644
index 7edda0ea..00000000
--- a/src/SubcircuitLibrary/lm7805/PNP.lib
+++ /dev/null
@@ -1,4 +0,0 @@
-.model Q2N2907A PNP(Is=650.6E-18 Xti=3 Eg=1.11 Vaf=115.7 Bf=231.7 Ne=1.829
-+		Ise=54.81f Ikf=1.079 Xtb=1.5 Br=3.563 Nc=2 Isc=0 Ikr=0 Rc=.715
-+		Cjc=14.76p Mjc=.5383 Vjc=.75 Fc=.5 Cje=19.82p Mje=.3357 Vje=.75
-+		Tr=111.3n Tf=603.7p Itf=.65 Vtf=5 Xtf=1.7 Rb=10)
diff --git a/src/SubcircuitLibrary/lm7805/analysis b/src/SubcircuitLibrary/lm7805/analysis
deleted file mode 100644
index ebd5c0a9..00000000
--- a/src/SubcircuitLibrary/lm7805/analysis
+++ /dev/null
@@ -1 +0,0 @@
-.tran 0e-00 0e-00 0e-00
\ No newline at end of file
diff --git a/src/SubcircuitLibrary/lm_741/NPN.lib b/src/SubcircuitLibrary/lm_741/NPN.lib
deleted file mode 100644
index 6509fe7a..00000000
--- a/src/SubcircuitLibrary/lm_741/NPN.lib
+++ /dev/null
@@ -1,4 +0,0 @@
-.model Q2N2222  NPN( Is=14.34f Xti=3 Eg=1.11 Vaf=74.03 Bf=400 Ne=1.307 
-+ Ise=14.34f Ikf=.2847 Xtb=1.5 Br=6.092 Nc=2 Isc=0 Ikr=0 Rc=1 Cjc=7.306p 
-+ Mjc=.3416 Vjc=.75 Fc=.5 Cje=22.01p Mje=.377 Vje=.75 Tr=46.91n Tf=411.1p 
-+ Itf=.6 Vtf=1.7 Xtf=3 Rb=10) 
diff --git a/src/SubcircuitLibrary/lm_741/PNP.lib b/src/SubcircuitLibrary/lm_741/PNP.lib
deleted file mode 100644
index 7edda0ea..00000000
--- a/src/SubcircuitLibrary/lm_741/PNP.lib
+++ /dev/null
@@ -1,4 +0,0 @@
-.model Q2N2907A PNP(Is=650.6E-18 Xti=3 Eg=1.11 Vaf=115.7 Bf=231.7 Ne=1.829
-+		Ise=54.81f Ikf=1.079 Xtb=1.5 Br=3.563 Nc=2 Isc=0 Ikr=0 Rc=.715
-+		Cjc=14.76p Mjc=.5383 Vjc=.75 Fc=.5 Cje=19.82p Mje=.3357 Vje=.75
-+		Tr=111.3n Tf=603.7p Itf=.65 Vtf=5 Xtf=1.7 Rb=10)
diff --git a/src/SubcircuitLibrary/lm_741/analysis b/src/SubcircuitLibrary/lm_741/analysis
deleted file mode 100644
index ebd5c0a9..00000000
--- a/src/SubcircuitLibrary/lm_741/analysis
+++ /dev/null
@@ -1 +0,0 @@
-.tran 0e-00 0e-00 0e-00
\ No newline at end of file
diff --git a/src/SubcircuitLibrary/lm_741/lm_741_Previous_Values.xml b/src/SubcircuitLibrary/lm_741/lm_741_Previous_Values.xml
deleted file mode 100644
index b61322bb..00000000
--- a/src/SubcircuitLibrary/lm_741/lm_741_Previous_Values.xml
+++ /dev/null
@@ -1 +0,0 @@
-<KicadtoNgspice><source /><model /><devicemodel><q1><field>C:/Users/malli/eSim/src/deviceModelLibrary/Transistor/npn_1.lib</field></q1><q20><field>C:/Users/malli/eSim/src/deviceModelLibrary/Transistor/npn_1.lib</field></q20><q3><field>C:/Users/malli/eSim/src/deviceModelLibrary/Transistor/npn_1.lib</field></q3><q2><field>C:/Users/malli/eSim/src/deviceModelLibrary/Transistor/npn_1.lib</field></q2><q5><field>C:/Users/malli/eSim/src/deviceModelLibrary/Transistor/pnp_1.lib</field></q5><q4><field>C:/Users/malli/eSim/src/deviceModelLibrary/Transistor/pnp_1.lib</field></q4><q7><field>C:/Users/malli/eSim/src/deviceModelLibrary/Transistor/npn_1.lib</field></q7><q6><field>C:/Users/malli/eSim/src/deviceModelLibrary/Transistor/pnp_1.lib</field></q6><q9><field>C:/Users/malli/eSim/src/deviceModelLibrary/Transistor/pnp_1.lib</field></q9><q8><field>C:/Users/malli/eSim/src/deviceModelLibrary/Transistor/npn_1.lib</field></q8><q15><field>C:/Users/malli/eSim/src/deviceModelLibrary/Transistor/npn_1.lib</field></q15><q14><field>C:/Users/malli/eSim/src/deviceModelLibrary/Transistor/npn_1.lib</field></q14><q17><field>C:/Users/malli/eSim/src/deviceModelLibrary/Transistor/npn_1.lib</field></q17><q16><field>C:/Users/malli/eSim/src/deviceModelLibrary/Transistor/npn_1.lib</field></q16><q11><field>C:/Users/malli/eSim/src/deviceModelLibrary/Transistor/pnp_1.lib</field></q11><q10><field>C:/Users/malli/eSim/src/deviceModelLibrary/Transistor/pnp_1.lib</field></q10><q13><field>C:/Users/malli/eSim/src/deviceModelLibrary/Transistor/npn_1.lib</field></q13><q12><field>C:/Users/malli/eSim/src/deviceModelLibrary/Transistor/npn_1.lib</field></q12><q19><field>C:/Users/malli/eSim/src/deviceModelLibrary/Transistor/pnp_1.lib</field></q19><q18><field>C:/Users/malli/eSim/src/deviceModelLibrary/Transistor/npn_1.lib</field></q18></devicemodel><subcircuit /><analysis><ac><field1 name="Lin">true</field1><field2 name="Dec">false</field2><field3 name="Oct">false</field3><field4 name="Start Frequency" /><field5 name="Stop Frequency" /><field6 name="No. of points" /><field7 name="Start Fre Combo">Hz</field7><field8 name="Stop Fre Combo">Hz</field8></ac><dc><field1 name="Source 1" /><field2 name="Start" /><field3 name="Increment" /><field4 name="Stop" /><field5 name="Operating Point">0</field5><field6 name="Start Combo">Volts or Amperes</field6><field7 name="Increment Combo">Volts or Amperes</field7><field8 name="Stop Combo">Volts or Amperes</field8><field9 name="Source 2" /><field10 name="Start" /><field11 name="Increment" /><field12 name="Stop" /><field13 name="Start Combo">Volts or Amperes</field13><field14 name="Increment Combo">Volts or Amperes</field14><field15 name="Stop Combo">Volts or Amperes</field15></dc><tran><field1 name="Start Time" /><field2 name="Step Time" /><field3 name="Stop Time" /><field4 name="Start Combo">Sec</field4><field5 name="Step Combo">Sec</field5><field6 name="Stop Combo">Sec</field6></tran></analysis></KicadtoNgspice>
\ No newline at end of file
diff --git a/src/SubcircuitLibrary/opto_isolator_switch/analysis b/src/SubcircuitLibrary/opto_isolator_switch/analysis
deleted file mode 100644
index ebd5c0a9..00000000
--- a/src/SubcircuitLibrary/opto_isolator_switch/analysis
+++ /dev/null
@@ -1 +0,0 @@
-.tran 0e-00 0e-00 0e-00
\ No newline at end of file
diff --git a/src/SubcircuitLibrary/opto_isolator_switch/opto_isolator_switch-cache.lib b/src/SubcircuitLibrary/opto_isolator_switch/opto_isolator_switch-cache.lib
deleted file mode 100644
index 88d58478..00000000
--- a/src/SubcircuitLibrary/opto_isolator_switch/opto_isolator_switch-cache.lib
+++ /dev/null
@@ -1,99 +0,0 @@
-EESchema-LIBRARY Version 2.3
-#encoding utf-8
-#
-# CCCS
-#
-DEF CCCS F 0 40 Y Y 1 F N
-F0 "F" 0 150 50 H V C CNN
-F1 "CCCS" -200 -50 50 H V C CNN
-F2 "" 0 0 60 H V C CNN
-F3 "" 0 0 60 H V C CNN
-$FPLIST
- 1_pin
-$ENDFPLIST
-DRAW
-S -100 100 100 -100 0 1 0 N
-X + 1 -300 50 200 R 35 35 1 1 P
-X - 2 300 50 200 L 35 35 1 1 P
-X +c 3 -50 -200 100 U 35 35 1 1 P
-X -c 4 50 -200 100 U 35 35 1 1 P
-ENDDRAW
-ENDDEF
-#
-# PORT
-#
-DEF PORT U 0 40 Y Y 26 F N
-F0 "U" 50 100 30 H V C CNN
-F1 "PORT" 0 0 30 H V C CNN
-F2 "" 0 0 60 H V C CNN
-F3 "" 0 0 60 H V C CNN
-DRAW
-A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0
-A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50
-S -100 50 100 -50 0 1 0 N
-X ~ 1 250 0 100 L 30 30 1 1 B
-X ~ 2 250 0 100 L 30 30 2 1 B
-X ~ 3 250 0 100 L 30 30 3 1 B
-X ~ 4 250 0 100 L 30 30 4 1 B
-X ~ 5 250 0 100 L 30 30 5 1 B
-X ~ 6 250 0 100 L 30 30 6 1 B
-X ~ 7 250 0 100 L 30 30 7 1 B
-X ~ 8 250 0 100 L 30 30 8 1 B
-X ~ 9 250 0 100 L 30 30 9 1 B
-X ~ 10 250 0 100 L 30 30 10 1 B
-X ~ 11 250 0 100 L 30 30 11 1 B
-X ~ 12 250 0 100 L 30 30 12 1 B
-X ~ 13 250 0 100 L 30 30 13 1 B
-X ~ 14 250 0 100 L 30 30 14 1 B
-X ~ 15 250 0 100 L 30 30 15 1 B
-X ~ 16 250 0 100 L 30 30 16 1 B
-X ~ 17 250 0 100 L 30 30 17 1 B
-X ~ 18 250 0 100 L 30 30 18 1 B
-X ~ 19 250 0 100 L 30 30 19 1 B
-X ~ 20 250 0 100 L 30 30 20 1 B
-X ~ 21 250 0 100 L 30 30 21 1 B
-X ~ 22 250 0 100 L 30 30 22 1 B
-X ~ 23 250 0 100 L 30 30 23 1 B
-X ~ 24 250 0 100 L 30 30 24 1 B
-X ~ 25 250 0 100 L 30 30 25 1 B
-X ~ 26 250 0 100 L 30 30 26 1 B
-ENDDRAW
-ENDDEF
-#
-# eSim_C
-#
-DEF eSim_C C 0 10 N Y 1 F N
-F0 "C" 25 100 50 H V L CNN
-F1 "eSim_C" 25 -100 50 H V L CNN
-F2 "" 38 -150 30 H V C CNN
-F3 "" 0 0 60 H V C CNN
-$FPLIST
- C_*
-$ENDFPLIST
-DRAW
-P 2 0 1 20 -80 -30 80 -30 N
-P 2 0 1 20 -80 30 80 30 N
-X ~ 1 0 150 110 D 40 40 1 1 P
-X ~ 2 0 -150 110 U 40 40 1 1 P
-ENDDRAW
-ENDDEF
-#
-# eSim_R
-#
-DEF eSim_R R 0 0 N Y 1 F N
-F0 "R" 50 130 50 H V C CNN
-F1 "eSim_R" 50 50 50 H V C CNN
-F2 "" 50 -20 30 H V C CNN
-F3 "" 50 50 30 V V C CNN
-$FPLIST
- R_*
- Resistor_*
-$ENDFPLIST
-DRAW
-S 150 10 -50 90 0 1 10 N
-X ~ 1 -100 50 50 R 60 60 1 1 P
-X ~ 2 200 50 50 L 60 60 1 1 P
-ENDDRAW
-ENDDEF
-#
-#End Library
diff --git a/src/SubcircuitLibrary/opto_isolator_switch/opto_isolator_switch.cir b/src/SubcircuitLibrary/opto_isolator_switch/opto_isolator_switch.cir
deleted file mode 100644
index 5fc9dd50..00000000
--- a/src/SubcircuitLibrary/opto_isolator_switch/opto_isolator_switch.cir
+++ /dev/null
@@ -1,15 +0,0 @@
-* /home/bhargav/Downloads/eSim-1.1.2/src/SubcircuitLibrary/opto_isolator_switch/opto_isolator_switch.cir
-
-* EESchema Netlist Version 1.1 (Spice format) creation date: Thu Jun 20 15:52:58 2019
-
-* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N
-* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0
-
-* Sheet Name: /
-R1  Net-_R1-Pad1_ Net-_F1-Pad3_ 1000		
-F1  Net-_C1-Pad1_ Net-_C1-Pad2_ Net-_F1-Pad3_ Net-_F1-Pad4_ 3		
-R2  Net-_C1-Pad2_ Net-_F1-Pad4_ 1000		
-U1  Net-_R1-Pad1_ Net-_F1-Pad4_ Net-_C1-Pad1_ Net-_C1-Pad2_ PORT		
-C1  Net-_C1-Pad1_ Net-_C1-Pad2_ 14n		
-
-.end
diff --git a/src/SubcircuitLibrary/opto_isolator_switch/opto_isolator_switch.cir.out b/src/SubcircuitLibrary/opto_isolator_switch/opto_isolator_switch.cir.out
deleted file mode 100644
index afeeaa02..00000000
--- a/src/SubcircuitLibrary/opto_isolator_switch/opto_isolator_switch.cir.out
+++ /dev/null
@@ -1,18 +0,0 @@
-* /home/bhargav/downloads/esim-1.1.2/src/subcircuitlibrary/opto_isolator_switch/opto_isolator_switch.cir
-
-r1  net-_r1-pad1_ net-_f1-pad3_ 1000
-* f1
-r2  net-_c1-pad2_ net-_f1-pad4_ 1000
-* u1  net-_r1-pad1_ net-_f1-pad4_ net-_c1-pad1_ net-_c1-pad2_ port
-c1  net-_c1-pad1_ net-_c1-pad2_ 14n
-Vf1 net-_f1-pad3_ net-_f1-pad4_ 0
-f1 net-_c1-pad1_ net-_c1-pad2_ Vf1 3
-.tran 0e-00 0e-00 0e-00
-
-* Control Statements 
-.control
-run
-print allv > plot_data_v.txt
-print alli > plot_data_i.txt
-.endc
-.end
diff --git a/src/SubcircuitLibrary/opto_isolator_switch/opto_isolator_switch.pro b/src/SubcircuitLibrary/opto_isolator_switch/opto_isolator_switch.pro
deleted file mode 100644
index 47ae9917..00000000
--- a/src/SubcircuitLibrary/opto_isolator_switch/opto_isolator_switch.pro
+++ /dev/null
@@ -1,83 +0,0 @@
-update=Thu Jun 20 15:32:48 2019
-version=1
-last_client=eeschema
-[general]
-version=1
-RootSch=
-BoardNm=
-[pcbnew]
-version=1
-LastNetListRead=
-UseCmpFile=1
-PadDrill=0.600000000000
-PadDrillOvalY=0.600000000000
-PadSizeH=1.500000000000
-PadSizeV=1.500000000000
-PcbTextSizeV=1.500000000000
-PcbTextSizeH=1.500000000000
-PcbTextThickness=0.300000000000
-ModuleTextSizeV=1.000000000000
-ModuleTextSizeH=1.000000000000
-ModuleTextSizeThickness=0.150000000000
-SolderMaskClearance=0.000000000000
-SolderMaskMinWidth=0.000000000000
-DrawSegmentWidth=0.200000000000
-BoardOutlineThickness=0.100000000000
-ModuleOutlineThickness=0.150000000000
-[cvpcb]
-version=1
-NetIExt=net
-[eeschema]
-version=1
-LibDir=../../../kicadSchematicLibrary
-[eeschema/libraries]
-LibName1=adc-dac
-LibName2=memory
-LibName3=xilinx
-LibName4=microcontrollers
-LibName5=dsp
-LibName6=microchip
-LibName7=analog_switches
-LibName8=motorola
-LibName9=texas
-LibName10=intel
-LibName11=audio
-LibName12=interface
-LibName13=digital-audio
-LibName14=philips
-LibName15=display
-LibName16=cypress
-LibName17=siliconi
-LibName18=opto
-LibName19=atmel
-LibName20=contrib
-LibName21=power
-LibName22=device
-LibName23=transistors
-LibName24=conn
-LibName25=linear
-LibName26=regul
-LibName27=74xx
-LibName28=cmos4000
-LibName29=eSim_Analog
-LibName30=eSim_Devices
-LibName31=eSim_Digital
-LibName32=eSim_Hybrid
-LibName33=eSim_Miscellaneous
-LibName34=eSim_Power
-LibName35=eSim_Sources
-LibName36=eSim_Subckt
-LibName37=eSim_User
-LibName38=eSim_Plot
-LibName39=eSim_PSpice
-LibName40=/home/bhargav/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_Analog
-LibName41=/home/bhargav/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_Devices
-LibName42=/home/bhargav/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_Digital
-LibName43=/home/bhargav/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_Hybrid
-LibName44=/home/bhargav/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_Miscellaneous
-LibName45=/home/bhargav/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_Plot
-LibName46=/home/bhargav/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_Power
-LibName47=/home/bhargav/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_Sources
-LibName48=/home/bhargav/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_Subckt
-LibName49=/home/bhargav/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_User
-
diff --git a/src/SubcircuitLibrary/opto_isolator_switch/opto_isolator_switch.sch b/src/SubcircuitLibrary/opto_isolator_switch/opto_isolator_switch.sch
deleted file mode 100644
index 3f1c7298..00000000
--- a/src/SubcircuitLibrary/opto_isolator_switch/opto_isolator_switch.sch
+++ /dev/null
@@ -1,178 +0,0 @@
-EESchema Schematic File Version 2
-LIBS:adc-dac
-LIBS:memory
-LIBS:xilinx
-LIBS:microcontrollers
-LIBS:dsp
-LIBS:microchip
-LIBS:analog_switches
-LIBS:motorola
-LIBS:texas
-LIBS:intel
-LIBS:audio
-LIBS:interface
-LIBS:digital-audio
-LIBS:philips
-LIBS:display
-LIBS:cypress
-LIBS:siliconi
-LIBS:opto
-LIBS:atmel
-LIBS:contrib
-LIBS:power
-LIBS:device
-LIBS:transistors
-LIBS:conn
-LIBS:linear
-LIBS:regul
-LIBS:74xx
-LIBS:cmos4000
-LIBS:eSim_Analog
-LIBS:eSim_Devices
-LIBS:eSim_Digital
-LIBS:eSim_Hybrid
-LIBS:eSim_Miscellaneous
-LIBS:eSim_Power
-LIBS:eSim_Sources
-LIBS:eSim_Subckt
-LIBS:eSim_User
-LIBS:eSim_Plot
-LIBS:eSim_PSpice
-LIBS:opto_isolator_switch-cache
-EELAYER 25 0
-EELAYER END
-$Descr A4 11693 8268
-encoding utf-8
-Sheet 1 1
-Title ""
-Date ""
-Rev ""
-Comp ""
-Comment1 ""
-Comment2 ""
-Comment3 ""
-Comment4 ""
-$EndDescr
-$Comp
-L eSim_R R1
-U 1 1 5D0B5974
-P 4350 3450
-F 0 "R1" H 4400 3580 50  0000 C CNN
-F 1 "1000" H 4400 3500 50  0000 C CNN
-F 2 "" H 4400 3430 30  0000 C CNN
-F 3 "" V 4400 3500 30  0000 C CNN
-	1    4350 3450
-	1    0    0    -1  
-$EndComp
-$Comp
-L CCCS F1
-U 1 1 5D0B59A2
-P 5200 3450
-F 0 "F1" H 5200 3600 50  0000 C CNN
-F 1 "3" H 5000 3400 50  0000 C CNN
-F 2 "" H 5200 3450 60  0000 C CNN
-F 3 "" H 5200 3450 60  0000 C CNN
-	1    5200 3450
-	0    1    1    0   
-$EndComp
-$Comp
-L eSim_R R2
-U 1 1 5D0B59D5
-P 5200 4050
-F 0 "R2" H 5250 4180 50  0000 C CNN
-F 1 "1000" H 5250 4100 50  0000 C CNN
-F 2 "" H 5250 4030 30  0000 C CNN
-F 3 "" V 5250 4100 30  0000 C CNN
-	1    5200 4050
-	0    1    1    0   
-$EndComp
-Wire Wire Line
-	4550 3400 5000 3400
-Wire Wire Line
-	5000 3500 4750 3500
-Wire Wire Line
-	4750 3500 4750 3700
-Wire Wire Line
-	5250 3950 5250 3750
-Wire Wire Line
-	5250 3150 5250 3000
-Wire Wire Line
-	5250 3000 5650 3000
-Wire Wire Line
-	5650 3000 5650 3350
-Wire Wire Line
-	5650 3350 5700 3350
-Wire Wire Line
-	5250 4250 5250 4350
-Wire Wire Line
-	4250 3400 4000 3400
-$Comp
-L PORT U1
-U 1 1 5D0B5AC7
-P 3750 3400
-F 0 "U1" H 3800 3500 30  0000 C CNN
-F 1 "PORT" H 3750 3400 30  0000 C CNN
-F 2 "" H 3750 3400 60  0000 C CNN
-F 3 "" H 3750 3400 60  0000 C CNN
-	1    3750 3400
-	1    0    0    -1  
-$EndComp
-$Comp
-L PORT U1
-U 2 1 5D0B5B16
-P 4750 3950
-F 0 "U1" H 4800 4050 30  0000 C CNN
-F 1 "PORT" H 4750 3950 30  0000 C CNN
-F 2 "" H 4750 3950 60  0000 C CNN
-F 3 "" H 4750 3950 60  0000 C CNN
-	2    4750 3950
-	0    -1   -1   0   
-$EndComp
-$Comp
-L PORT U1
-U 4 1 5D0B5B84
-P 6050 3800
-F 0 "U1" H 6100 3900 30  0000 C CNN
-F 1 "PORT" H 6050 3800 30  0000 C CNN
-F 2 "" H 6050 3800 60  0000 C CNN
-F 3 "" H 6050 3800 60  0000 C CNN
-	4    6050 3800
-	-1   0    0    1   
-$EndComp
-$Comp
-L PORT U1
-U 3 1 5D0B5BF0
-P 5950 3350
-F 0 "U1" H 6000 3450 30  0000 C CNN
-F 1 "PORT" H 5950 3350 30  0000 C CNN
-F 2 "" H 5950 3350 60  0000 C CNN
-F 3 "" H 5950 3350 60  0000 C CNN
-	3    5950 3350
-	-1   0    0    1   
-$EndComp
-$Comp
-L eSim_C C1
-U 1 1 5D0B5EB6
-P 5500 3350
-F 0 "C1" H 5525 3450 50  0000 L CNN
-F 1 "14n" H 5525 3250 50  0000 L CNN
-F 2 "" H 5538 3200 30  0000 C CNN
-F 3 "" H 5500 3350 60  0000 C CNN
-	1    5500 3350
-	1    0    0    -1  
-$EndComp
-Wire Wire Line
-	5500 3200 5500 3000
-Connection ~ 5500 3000
-Wire Wire Line
-	5500 3500 5500 3800
-Wire Wire Line
-	5250 3800 5800 3800
-Connection ~ 5250 3800
-Connection ~ 5500 3800
-Wire Wire Line
-	5250 4350 4900 4350
-Wire Wire Line
-	4900 4350 4900 3500
-Connection ~ 4900 3500
-$EndSCHEMATC
diff --git a/src/SubcircuitLibrary/opto_isolator_switch/opto_isolator_switch.sub b/src/SubcircuitLibrary/opto_isolator_switch/opto_isolator_switch.sub
deleted file mode 100644
index 4f386a6f..00000000
--- a/src/SubcircuitLibrary/opto_isolator_switch/opto_isolator_switch.sub
+++ /dev/null
@@ -1,12 +0,0 @@
-* Subcircuit opto_isolator_switch
-.subckt opto_isolator_switch net-_r1-pad1_ net-_f1-pad4_ net-_c1-pad1_ net-_c1-pad2_ 
-* /home/bhargav/downloads/esim-1.1.2/src/subcircuitlibrary/opto_isolator_switch/opto_isolator_switch.cir
-r1  net-_r1-pad1_ net-_f1-pad3_ 1000
-* f1
-r2  net-_c1-pad2_ net-_f1-pad4_ 1000
-c1  net-_c1-pad1_ net-_c1-pad2_ 14n
-Vf1 net-_f1-pad3_ net-_f1-pad4_ 0
-f1 net-_c1-pad1_ net-_c1-pad2_ Vf1 3
-* Control Statements
-
-.ends opto_isolator_switch
\ No newline at end of file
diff --git a/src/SubcircuitLibrary/opto_isolator_switch/opto_isolator_switch_Previous_Values.xml b/src/SubcircuitLibrary/opto_isolator_switch/opto_isolator_switch_Previous_Values.xml
deleted file mode 100644
index 2c2d65c1..00000000
--- a/src/SubcircuitLibrary/opto_isolator_switch/opto_isolator_switch_Previous_Values.xml
+++ /dev/null
@@ -1 +0,0 @@
-<KicadtoNgspice><source /><model /><devicemodel /><subcircuit /><analysis><ac><field1 name="Lin">true</field1><field2 name="Dec">false</field2><field3 name="Oct">false</field3><field4 name="Start Frequency" /><field5 name="Stop Frequency" /><field6 name="No. of points" /><field7 name="Start Fre Combo">Hz</field7><field8 name="Stop Fre Combo">Hz</field8></ac><dc><field1 name="Source 1" /><field2 name="Start" /><field3 name="Increment" /><field4 name="Stop" /><field5 name="Operating Point">0</field5><field6 name="Start Combo">Volts or Amperes</field6><field7 name="Increment Combo">Volts or Amperes</field7><field8 name="Stop Combo">Volts or Amperes</field8><field9 name="Source 2" /><field10 name="Start" /><field11 name="Increment" /><field12 name="Stop" /><field13 name="Start Combo">Volts or Amperes</field13><field14 name="Increment Combo">Volts or Amperes</field14><field15 name="Stop Combo">Volts or Amperes</field15></dc><tran><field1 name="Start Time" /><field2 name="Step Time" /><field3 name="Stop Time" /><field4 name="Start Combo">Sec</field4><field5 name="Step Combo">Sec</field5><field6 name="Stop Combo">Sec</field6></tran></analysis></KicadtoNgspice>
\ No newline at end of file
diff --git a/src/SubcircuitLibrary/scr/userDiode.lib b/src/SubcircuitLibrary/scr/userDiode.lib
deleted file mode 100644
index 89b96f4a..00000000
--- a/src/SubcircuitLibrary/scr/userDiode.lib
+++ /dev/null
@@ -1 +0,0 @@
-.MODEL D1N750 D( Vj=.75 Nbvl=14.976 Cjo=175p Rs=.25 Isr=1.859n Eg=1.11 M=.5516 Nbv=1.6989 N=1 Tbv1=-21.277u Bv=8.1 Fc=.5 Ikf=0 Nr=2 Ibv=20.245m Is=880.5E-18 Xti=3 Ibvl=1.9556m )
diff --git a/src/SubcircuitLibrary/triac/PowerDiode.lib b/src/SubcircuitLibrary/triac/PowerDiode.lib
deleted file mode 100644
index d6fb6469..00000000
--- a/src/SubcircuitLibrary/triac/PowerDiode.lib
+++ /dev/null
@@ -1 +0,0 @@
-.MODEL PowerDiode D( Vj=.75 Nbvl=14.976 Cjo=175p Rs=.25 Isr=1.859n Eg=1.11 M=.5516 Nbv=1.6989 N=1 Tbv1=-21.277u bv=1800 Fc=.5 Ikf=0 Nr=2 Ibv=20.245m Is=2.2E-15 Xti=3 Ibvl=1.9556m )
diff --git a/src/SubcircuitLibrary/triac/analysis b/src/SubcircuitLibrary/triac/analysis
deleted file mode 100644
index ebd5c0a9..00000000
--- a/src/SubcircuitLibrary/triac/analysis
+++ /dev/null
@@ -1 +0,0 @@
-.tran 0e-00 0e-00 0e-00
\ No newline at end of file
diff --git a/src/SubcircuitLibrary/triac/triac-cache.lib b/src/SubcircuitLibrary/triac/triac-cache.lib
deleted file mode 100644
index 0466a3e6..00000000
--- a/src/SubcircuitLibrary/triac/triac-cache.lib
+++ /dev/null
@@ -1,139 +0,0 @@
-EESchema-LIBRARY Version 2.3
-#encoding utf-8
-#
-# C
-#
-DEF C C 0 10 N Y 1 F N
-F0 "C" 25 100 50 H V L CNN
-F1 "C" 25 -100 50 H V L CNN
-F2 "" 38 -150 30 H V C CNN
-F3 "" 0 0 60 H V C CNN
-$FPLIST
- C?
- C_????_*
- C_????
- SMD*_c
- Capacitor*
-$ENDFPLIST
-DRAW
-P 2 0 1 20  -80 -30  80 -30 N
-P 2 0 1 20  -80 30  80 30 N
-X ~ 1 0 150 110 D 40 40 1 1 P
-X ~ 2 0 -150 110 U 40 40 1 1 P
-ENDDRAW
-ENDDEF
-#
-# CCCS
-#
-DEF CCCS F 0 40 Y Y 1 F N
-F0 "F" 0 150 50 H V C CNN
-F1 "CCCS" -200 -50 50 H V C CNN
-F2 "" 0 0 60 H V C CNN
-F3 "" 0 0 60 H V C CNN
-$FPLIST
- 1_pin
-$ENDFPLIST
-DRAW
-S -100 100 100 -100 0 1 0 N
-X + 1 -300 50 200 R 35 35 1 1 P
-X - 2 300 50 200 L 35 35 1 1 P
-X +c 3 -50 -200 100 U 35 35 1 1 P
-X -c 4 50 -200 100 U 35 35 1 1 P
-ENDDRAW
-ENDDEF
-#
-# D
-#
-DEF D D 0 40 N N 1 F N
-F0 "D" 0 100 50 H V C CNN
-F1 "D" 0 -100 50 H V C CNN
-F2 "" 0 0 60 H V C CNN
-F3 "" 0 0 60 H V C CNN
-$FPLIST
- Diode_*
- D-Pak_TO252AA
- *SingleDiode
- *_Diode_*
- *SingleDiode*
-$ENDFPLIST
-DRAW
-P 2 0 1 6  50 50  50 -50 N
-P 3 0 1 0  -50 50  50 0  -50 -50 F
-X A 1 -150 0 100 R 40 40 1 1 P
-X K 2 150 0 100 L 40 40 1 1 P
-ENDDRAW
-ENDDEF
-#
-# DC
-#
-DEF DC v 0 40 Y Y 1 F N
-F0 "v" -200 100 60 H V C CNN
-F1 "DC" -200 -50 60 H V C CNN
-F2 "R1" -300 0 60 H V C CNN
-F3 "" 0 0 60 H V C CNN
-$FPLIST
- 1_pin
-$ENDFPLIST
-DRAW
-C 0 0 150 0 1 0 N
-X + 1 0 450 300 D 50 50 1 1 P
-X - 2 0 -450 300 U 50 50 1 1 P
-ENDDRAW
-ENDDEF
-#
-# PORT
-#
-DEF PORT U 0 40 Y Y 8 F N
-F0 "U" 50 100 30 H V C CNN
-F1 "PORT" 0 0 30 H V C CNN
-F2 "" 0 0 60 H V C CNN
-F3 "" 0 0 60 H V C CNN
-DRAW
-A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0
-A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50
-S -100 50 100 -50 0 1 0 N
-X ~ 1 250 0 100 L 30 30 1 1 B
-X ~ 2 250 0 100 L 30 30 2 1 B
-X ~ 3 250 0 100 L 30 30 3 1 B
-X ~ 4 250 0 100 L 30 30 4 1 B
-X ~ 5 250 0 100 L 30 30 5 1 B
-X ~ 6 250 0 100 L 30 30 6 1 B
-X ~ 7 250 0 100 L 30 30 7 1 B
-X ~ 8 250 0 100 L 30 30 8 1 B
-ENDDRAW
-ENDDEF
-#
-# R
-#
-DEF R R 0 0 N Y 1 F N
-F0 "R" 50 130 50 H V C CNN
-F1 "R" 50 50 50 H V C CNN
-F2 "" 50 -20 30 H V C CNN
-F3 "" 50 50 30 V V C CNN
-$FPLIST
- R_*
- Resistor_*
-$ENDFPLIST
-DRAW
-S 150 10 -50 90 0 1 10 N
-X ~ 1 -100 50 50 R 60 60 1 1 P
-X ~ 2 200 50 50 L 60 60 1 1 P
-ENDDRAW
-ENDDEF
-#
-# aswitch
-#
-DEF aswitch U 0 40 Y Y 1 F N
-F0 "U" 450 300 60 H V C CNN
-F1 "aswitch" 450 200 60 H V C CNN
-F2 "" 450 100 60 H V C CNN
-F3 "" 450 100 60 H V C CNN
-DRAW
-S 200 250 650 100 0 1 0 N
-X ~ 2 0 150 200 R 50 50 1 1 O
-X ~ 3 850 150 200 L 50 50 1 1 O
-X ~ 1_IN 450 -100 200 U 50 20 1 1 I
-ENDDRAW
-ENDDEF
-#
-#End Library
diff --git a/src/SubcircuitLibrary/triac/triac.cir b/src/SubcircuitLibrary/triac/triac.cir
deleted file mode 100644
index c533d42f..00000000
--- a/src/SubcircuitLibrary/triac/triac.cir
+++ /dev/null
@@ -1,23 +0,0 @@
-* /opt/eSim/src/SubcircuitLibrary/triac/triac.cir
-
-* EESchema Netlist Version 1.1 (Spice format) creation date: Tue Dec  8 15:32:06 2015
-
-* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N
-* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0
-
-* Sheet Name: /
-U3  8 11 10 PORT		
-F3  8 9 1 8 10		
-v3  7 2 DC		
-F2  8 9 3 5 10		
-v2  6 3 DC		
-C1  8 9 10u		
-F1  8 9 4 8 100		
-v1  10 4 DC		
-U1  9 11 6 aswitch		
-U2  9 2 11 aswitch		
-R1  8 9 1		
-D1  5 8 D		
-D2  1 7 D		
-
-.end
diff --git a/src/SubcircuitLibrary/triac/triac.cir.out b/src/SubcircuitLibrary/triac/triac.cir.out
deleted file mode 100644
index d2eb7c77..00000000
--- a/src/SubcircuitLibrary/triac/triac.cir.out
+++ /dev/null
@@ -1,38 +0,0 @@
-* /opt/esim/src/subcircuitlibrary/triac/triac.cir
-
-.include PowerDiode.lib
-* u3  8 11 10 port
-* f3
-v3 7 2  dc 0
-* f2
-v2 6 3  dc 0
-c1  8 9 10u
-* f1
-v1 10 4  dc 0
-* u1  9 11 6 aswitch
-* u2  9 2 11 aswitch
-r1  8 9 1
-d1 5 8 PowerDiode
-d2 1 7 PowerDiode
-Vf3 1 8 0
-f3 8 9 Vf3 10
-Vf2 3 5 0
-f2 8 9 Vf2 10
-Vf1 4 8 0
-f1 8 9 Vf1 100
-a1 9 (11 6)  u1
-a2 9 (2 11)  u2
-* Schematic Name: aswitch, NgSpice Name: aswitch
-.model u1 aswitch(log=TRUE cntl_off=0.1 cntl_on=1 r_on=0.0125 r_off=1000000 ) 
-* Schematic Name: aswitch, NgSpice Name: aswitch
-.model u2 aswitch(log=TRUE cntl_off=-0.1 cntl_on=-1 r_on=0.0125 r_off=1000000 ) 
-
-.tran 0e-00 0e-00 0e-00
-
-* Control Statements 
-.control
-run
-print allv > plot_data_v.txt
-print alli > plot_data_i.txt
-.endc
-.end
diff --git a/src/SubcircuitLibrary/triac/triac.pro b/src/SubcircuitLibrary/triac/triac.pro
deleted file mode 100644
index 5b1f5f89..00000000
--- a/src/SubcircuitLibrary/triac/triac.pro
+++ /dev/null
@@ -1,44 +0,0 @@
-update=Tue Dec  8 14:16:32 2015
-last_client=eeschema
-[eeschema]
-version=1
-LibDir=
-[eeschema/libraries]
-LibName1=eSim_Analog
-LibName2=eSim_Devices
-LibName3=eSim_Digital
-LibName4=eSim_Hybrid
-LibName5=eSim_Miscellaneous
-LibName6=eSim_Sources
-LibName7=eSim_Subckt
-LibName8=eSim_User
-LibName9=power
-LibName10=device
-LibName11=transistors
-LibName12=conn
-LibName13=linear
-LibName14=regul
-LibName15=74xx
-LibName16=cmos4000
-LibName17=adc-dac
-LibName18=memory
-LibName19=xilinx
-LibName20=special
-LibName21=microcontrollers
-LibName22=dsp
-LibName23=microchip
-LibName24=analog_switches
-LibName25=motorola
-LibName26=texas
-LibName27=intel
-LibName28=audio
-LibName29=interface
-LibName30=digital-audio
-LibName31=philips
-LibName32=display
-LibName33=cypress
-LibName34=siliconi
-LibName35=opto
-LibName36=atmel
-LibName37=contrib
-LibName38=valves
diff --git a/src/SubcircuitLibrary/triac/triac.sch b/src/SubcircuitLibrary/triac/triac.sch
deleted file mode 100644
index f30533a0..00000000
--- a/src/SubcircuitLibrary/triac/triac.sch
+++ /dev/null
@@ -1,308 +0,0 @@
-EESchema Schematic File Version 2
-LIBS:eSim_Analog
-LIBS:eSim_Devices
-LIBS:eSim_Digital
-LIBS:eSim_Hybrid
-LIBS:eSim_Miscellaneous
-LIBS:eSim_Sources
-LIBS:eSim_Subckt
-LIBS:eSim_User
-LIBS:power
-LIBS:device
-LIBS:transistors
-LIBS:conn
-LIBS:linear
-LIBS:regul
-LIBS:74xx
-LIBS:cmos4000
-LIBS:adc-dac
-LIBS:memory
-LIBS:xilinx
-LIBS:microcontrollers
-LIBS:dsp
-LIBS:microchip
-LIBS:analog_switches
-LIBS:motorola
-LIBS:texas
-LIBS:intel
-LIBS:audio
-LIBS:interface
-LIBS:digital-audio
-LIBS:philips
-LIBS:display
-LIBS:cypress
-LIBS:siliconi
-LIBS:opto
-LIBS:atmel
-LIBS:contrib
-LIBS:valves
-LIBS:triac-cache
-EELAYER 25 0
-EELAYER END
-$Descr A4 11693 8268
-encoding utf-8
-Sheet 1 1
-Title ""
-Date "22 sep 2014"
-Rev ""
-Comp ""
-Comment1 ""
-Comment2 ""
-Comment3 ""
-Comment4 ""
-$EndDescr
-$Comp
-L PORT U3
-U 3 1 541D1606
-P 1250 1750
-F 0 "U3" H 1250 1700 30  0000 C CNN
-F 1 "PORT" H 1250 1750 30  0000 C CNN
-F 2 "" H 1250 1750 60  0001 C CNN
-F 3 "" H 1250 1750 60  0001 C CNN
-	3    1250 1750
-	1    0    0    -1  
-$EndComp
-$Comp
-L PORT U3
-U 2 1 541D1601
-P 1300 900
-F 0 "U3" H 1300 850 30  0000 C CNN
-F 1 "PORT" H 1300 900 30  0000 C CNN
-F 2 "" H 1300 900 60  0001 C CNN
-F 3 "" H 1300 900 60  0001 C CNN
-	2    1300 900 
-	1    0    0    -1  
-$EndComp
-$Comp
-L PORT U3
-U 1 1 541D15F6
-P 1150 4050
-F 0 "U3" H 1150 4000 30  0000 C CNN
-F 1 "PORT" H 1150 4050 30  0000 C CNN
-F 2 "" H 1150 4050 60  0001 C CNN
-F 3 "" H 1150 4050 60  0001 C CNN
-	1    1150 4050
-	1    0    0    -1  
-$EndComp
-$Comp
-L CCCS F3
-U 1 1 541D1417
-P 6250 3100
-F 0 "F3" H 6050 3200 50  0000 C CNN
-F 1 "10" H 6050 3050 50  0000 C CNN
-F 2 "" H 6250 3100 60  0001 C CNN
-F 3 "" H 6250 3100 60  0001 C CNN
-	1    6250 3100
-	0    1    1    0   
-$EndComp
-$Comp
-L DC v3
-U 1 1 541D13FB
-P 6050 1950
-F 0 "v3" H 5850 2050 60  0000 C CNN
-F 1 "DC" H 5850 1900 60  0000 C CNN
-F 2 "R1" H 5750 1950 60  0000 C CNN
-F 3 "" H 6050 1950 60  0001 C CNN
-	1    6050 1950
-	-1   0    0    1   
-$EndComp
-$Comp
-L CCCS F2
-U 1 1 541D13A3
-P 3900 2550
-F 0 "F2" H 3700 2650 50  0000 C CNN
-F 1 "10" H 3700 2500 50  0000 C CNN
-F 2 "" H 3900 2550 60  0001 C CNN
-F 3 "" H 3900 2550 60  0001 C CNN
-	1    3900 2550
-	0    1    1    0   
-$EndComp
-$Comp
-L DC v2
-U 1 1 541D1398
-P 3700 1850
-F 0 "v2" H 3500 1950 60  0000 C CNN
-F 1 "DC" H 3500 1800 60  0000 C CNN
-F 2 "R1" H 3400 1850 60  0000 C CNN
-F 3 "" H 3700 1850 60  0001 C CNN
-	1    3700 1850
-	1    0    0    -1  
-$EndComp
-$Comp
-L C C1
-U 1 1 541D137C
-P 3300 4350
-F 0 "C1" H 3350 4450 50  0000 L CNN
-F 1 "10u" H 3350 4250 50  0000 L CNN
-F 2 "" H 3300 4350 60  0001 C CNN
-F 3 "" H 3300 4350 60  0001 C CNN
-	1    3300 4350
-	1    0    0    -1  
-$EndComp
-$Comp
-L CCCS F1
-U 1 1 541D1363
-P 2100 3600
-F 0 "F1" H 1900 3700 50  0000 C CNN
-F 1 "100" H 1900 3550 50  0000 C CNN
-F 2 "" H 2100 3600 60  0001 C CNN
-F 3 "" H 2100 3600 60  0001 C CNN
-	1    2100 3600
-	0    1    1    0   
-$EndComp
-$Comp
-L DC v1
-U 1 1 541D1357
-P 1900 2900
-F 0 "v1" H 1700 3000 60  0000 C CNN
-F 1 "DC" H 1700 2850 60  0000 C CNN
-F 2 "R1" H 1600 2900 60  0000 C CNN
-F 3 "" H 1900 2900 60  0001 C CNN
-	1    1900 2900
-	1    0    0    -1  
-$EndComp
-$Comp
-L aswitch U1
-U 1 1 56669B8A
-P 4600 1100
-F 0 "U1" H 5050 1400 60  0000 C CNN
-F 1 "aswitch" H 5050 1300 60  0000 C CNN
-F 2 "" H 5050 1200 60  0000 C CNN
-F 3 "" H 5050 1200 60  0000 C CNN
-	1    4600 1100
-	-1   0    0    1   
-$EndComp
-$Comp
-L aswitch U2
-U 1 1 56669DB5
-P 6400 1350
-F 0 "U2" H 6850 1650 60  0000 C CNN
-F 1 "aswitch" H 6850 1550 60  0000 C CNN
-F 2 "" H 6850 1450 60  0000 C CNN
-F 3 "" H 6850 1450 60  0000 C CNN
-	1    6400 1350
-	1    0    0    -1  
-$EndComp
-Connection ~ 4600 900 
-Wire Wire Line
-	4600 1250 4600 900 
-Wire Wire Line
-	1900 1750 1500 1750
-Connection ~ 6300 4900
-Wire Wire Line
-	6300 3400 6300 4900
-Connection ~ 3950 4900
-Wire Wire Line
-	3950 2850 3950 4900
-Connection ~ 2700 4050
-Wire Wire Line
-	2700 3300 2700 4050
-Wire Wire Line
-	2150 3300 2700 3300
-Connection ~ 3300 4900
-Wire Wire Line
-	7450 4900 7450 700 
-Connection ~ 3700 4050
-Wire Wire Line
-	6050 4050 6050 3150
-Wire Wire Line
-	6050 2400 6050 2500
-Wire Wire Line
-	3700 1250 3750 1250
-Wire Wire Line
-	3700 1400 3700 1250
-Wire Wire Line
-	3700 2850 3700 2600
-Connection ~ 2750 4050
-Wire Wire Line
-	2750 4050 2750 4150
-Wire Wire Line
-	1900 3350 1900 3550
-Wire Wire Line
-	1900 2450 1900 1750
-Wire Wire Line
-	1900 4050 1900 3650
-Wire Wire Line
-	3300 4050 3300 4200
-Wire Wire Line
-	3700 3150 3700 4050
-Connection ~ 3300 4050
-Wire Wire Line
-	3700 2500 3700 2300
-Wire Wire Line
-	6050 1200 6050 1500
-Wire Wire Line
-	6400 1200 6050 1200
-Wire Wire Line
-	6050 2800 6050 3050
-Wire Wire Line
-	2750 4450 2750 4900
-Wire Wire Line
-	3300 4500 3300 4900
-Connection ~ 7450 1400
-Wire Wire Line
-	2150 4900 2150 3900
-Wire Wire Line
-	2150 4900 7450 4900
-Connection ~ 2750 4900
-Wire Wire Line
-	4450 2250 3950 2250
-Wire Wire Line
-	4450 4050 4450 2250
-Connection ~ 4450 4050
-Wire Wire Line
-	6650 2800 6300 2800
-Wire Wire Line
-	6650 4050 6650 2800
-Connection ~ 6050 4050
-Wire Wire Line
-	1550 900  7250 900 
-Wire Wire Line
-	1400 4050 6650 4050
-Connection ~ 1900 4050
-Wire Wire Line
-	7450 700  4150 700 
-Wire Wire Line
-	4150 700  4150 1000
-Wire Wire Line
-	6850 1450 7350 1450
-Wire Wire Line
-	7350 1450 7350 1400
-Wire Wire Line
-	7350 1400 7450 1400
-Wire Wire Line
-	7250 900  7250 1200
-$Comp
-L R R1
-U 1 1 5666A886
-P 2700 4250
-F 0 "R1" H 2750 4380 50  0000 C CNN
-F 1 "1" H 2750 4300 50  0000 C CNN
-F 2 "" H 2750 4230 30  0000 C CNN
-F 3 "" V 2750 4300 30  0000 C CNN
-	1    2700 4250
-	0    1    1    0   
-$EndComp
-$Comp
-L D D1
-U 1 1 5666A9A7
-P 3700 3000
-F 0 "D1" H 3700 3100 50  0000 C CNN
-F 1 "D" H 3700 2900 50  0000 C CNN
-F 2 "" H 3700 3000 60  0000 C CNN
-F 3 "" H 3700 3000 60  0000 C CNN
-	1    3700 3000
-	0    1    1    0   
-$EndComp
-$Comp
-L D D2
-U 1 1 5666A9E4
-P 6050 2650
-F 0 "D2" H 6050 2750 50  0000 C CNN
-F 1 "D" H 6050 2550 50  0000 C CNN
-F 2 "" H 6050 2650 60  0000 C CNN
-F 3 "" H 6050 2650 60  0000 C CNN
-	1    6050 2650
-	0    -1   -1   0   
-$EndComp
-$EndSCHEMATC
diff --git a/src/SubcircuitLibrary/triac/triac.sub b/src/SubcircuitLibrary/triac/triac.sub
deleted file mode 100644
index 760908b0..00000000
--- a/src/SubcircuitLibrary/triac/triac.sub
+++ /dev/null
@@ -1,32 +0,0 @@
-* Subcircuit triac
-.subckt triac 8 11 10 
-* /opt/esim/src/subcircuitlibrary/triac/triac.cir
-.include PowerDiode.lib
-* f3
-v3 7 2  dc 0
-* f2
-v2 6 3  dc 0
-c1  8 9 10u
-* f1
-v1 10 4  dc 0
-* u1  9 11 6 aswitch
-* u2  9 2 11 aswitch
-r1  8 9 1
-d1 5 8 PowerDiode
-d2 1 7 PowerDiode
-Vf3 1 8 0
-f3 8 9 Vf3 10
-Vf2 3 5 0
-f2 8 9 Vf2 10
-Vf1 4 8 0
-f1 8 9 Vf1 100
-a1 9 (11 6)  u1
-a2 9 (2 11)  u2
-* Schematic Name: aswitch, NgSpice Name: aswitch
-.model u1 aswitch(log=TRUE cntl_off=0.1 cntl_on=1 r_on=0.0125 r_off=1000000 )
-* Schematic Name: aswitch, NgSpice Name: aswitch
-.model u2 aswitch(log=TRUE cntl_off=-0.1 cntl_on=-1 r_on=0.0125 r_off=1000000 )
-
-* Control Statements
-
-.ends triac
diff --git a/src/SubcircuitLibrary/triac/triac_Previous_Values.xml b/src/SubcircuitLibrary/triac/triac_Previous_Values.xml
deleted file mode 100644
index 80da52b3..00000000
--- a/src/SubcircuitLibrary/triac/triac_Previous_Values.xml
+++ /dev/null
@@ -1 +0,0 @@
-<KicadtoNgspice><source><v3 name="Source type">dc<field1 name="Value">0</field1></v3><v2 name="Source type">dc<field1 name="Value">0</field1></v2><v1 name="Source type">dc<field1 name="Value">0</field1></v1></source><model><u1 name="type">aswitch<field1 name="Enter Log (default=TRUE)" /><field2 name="Enter Control OFF value (default=0.0)">0.1</field2><field3 name="Enter OFF Resistance (default=1.0e12)">1000000</field3><field4 name="Enter ON Resistance (default=1.0)">0.0125</field4><field5 name="Enter Control ON value(default=1.0)">1</field5></u1><u2 name="type">aswitch<field6 name="Enter Log (default=TRUE)" /><field7 name="Enter Control OFF value (default=0.0)">-0.1</field7><field8 name="Enter OFF Resistance (default=1.0e12)">1000000</field8><field9 name="Enter ON Resistance (default=1.0)">0.0125</field9><field10 name="Enter Control ON value(default=1.0)">-1</field10></u2></model><devicemodel><d2><field>/opt/eSim/src/deviceModelLibrary/Diode/PowerDiode.lib</field></d2><d1><field>/opt/eSim/src/deviceModelLibrary/Diode/PowerDiode.lib</field></d1></devicemodel><subcircuit /><analysis><ac><field1 name="Lin">true</field1><field2 name="Dec">false</field2><field3 name="Oct">false</field3><field4 name="Start Frequency" /><field5 name="Stop Frequency" /><field6 name="No. of points" /><field7 name="Start Fre Combo">Hz</field7><field8 name="Stop Fre Combo">Hz</field8></ac><dc><field1 name="Source Name" /><field2 name="Start" /><field3 name="Increment" /><field4 name="Stop" /><field5 name="Operating Point">0</field5><field6 name="Start Combo">Volts or Amperes</field6><field7 name="Increment Combo">Volts or Amperes</field7><field8 name="Stop Combo">Volts or Amperes</field8></dc><tran><field1 name="Start Time" /><field2 name="Step Time" /><field3 name="Stop Time" /><field4 name="Start Combo">Sec</field4><field5 name="Step Combo">Sec</field5><field6 name="Stop Combo">Sec</field6></tran></analysis></KicadtoNgspice>
\ No newline at end of file
diff --git a/src/SubcircuitLibrary/ua741/analysis b/src/SubcircuitLibrary/ua741/analysis
deleted file mode 100644
index 52ccc5ec..00000000
--- a/src/SubcircuitLibrary/ua741/analysis
+++ /dev/null
@@ -1 +0,0 @@
-.ac lin 0 0Hz 0Hz
\ No newline at end of file
diff --git a/src/SubcircuitLibrary/ua741/ua741-cache.lib b/src/SubcircuitLibrary/ua741/ua741-cache.lib
deleted file mode 100644
index 9114d342..00000000
--- a/src/SubcircuitLibrary/ua741/ua741-cache.lib
+++ /dev/null
@@ -1,100 +0,0 @@
-EESchema-LIBRARY Version 2.3  Date: Saturday 17 November 2012 08:10:48 AM IST
-#encoding utf-8
-#
-# C
-#
-DEF C C 0 10 N Y 1 F N
-F0 "C" 50 100 50 H V L CNN
-F1 "C" 50 -100 50 H V L CNN
-$FPLIST
- SM*
- C?
- C1-1
-$ENDFPLIST
-DRAW
-P 2 0 1 10  -100 -30  100 -30 N
-P 2 0 1 10  -100 30  100 30 N
-X ~ 1 0 200 170 D 40 40 1 1 P
-X ~ 2 0 -200 170 U 40 40 1 1 P
-ENDDRAW
-ENDDEF
-#
-# GND
-#
-DEF ~GND #PWR 0 0 Y Y 1 F P
-F0 "#PWR" 0 0 30 H I C CNN
-F1 "GND" 0 -70 30 H I C CNN
-DRAW
-P 4 0 1 0  -50 0  0 -50  50 0  -50 0 N
-X GND 1 0 0 0 U 30 30 1 1 W N
-ENDDRAW
-ENDDEF
-#
-# PORT
-#
-DEF PORT U 0 40 Y Y 8 F N
-F0 "U" 0 -50 30 H V C CNN
-F1 "PORT" 0 0 30 H V C CNN
-DRAW
-A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0
-A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50
-S -100 50 100 -50 0 1 0 N
-X ~ 1 250 0 100 L 30 30 1 1 I
-X ~ 2 250 0 100 L 30 30 2 1 I
-X ~ 3 250 0 100 L 30 30 3 1 I
-X ~ 4 250 0 100 L 30 30 4 1 I
-X ~ 5 250 0 100 L 30 30 5 1 I
-X ~ 6 250 0 100 L 30 30 6 1 I
-X ~ 7 250 0 100 L 30 30 7 1 I
-X ~ 8 250 0 100 L 30 30 8 1 I
-ENDDRAW
-ENDDEF
-#
-# PWR_FLAG
-#
-DEF PWR_FLAG #FLG 0 0 N N 1 F P
-F0 "#FLG" 0 270 30 H I C CNN
-F1 "PWR_FLAG" 0 230 30 H V C CNN
-DRAW
-X pwr 1 0 0 0 U 20 20 0 0 w
-P 3 0 1 0  0 0  0 100  0 100 N
-P 5 0 1 0  0 100  -100 150  0 200  100 150  0 100 N
-ENDDRAW
-ENDDEF
-#
-# R
-#
-DEF R R 0 0 N Y 1 F N
-F0 "R" 80 0 50 V V C CNN
-F1 "R" 0 0 50 V V C CNN
-$FPLIST
- R?
- SM0603
- SM0805
- R?-*
-$ENDFPLIST
-DRAW
-S -40 150 40 -150 0 1 12 N
-X ~ 1 0 250 100 D 60 60 1 1 P
-X ~ 2 0 -250 100 U 60 60 1 1 P
-ENDDRAW
-ENDDEF
-#
-# VCVS
-#
-DEF VCVS E 0 40 Y Y 1 F N
-F0 "E" -200 100 50 H V C CNN
-F1 "VCVS" -200 -50 50 H V C CNN
-$FPLIST
- 1_pin
-$ENDFPLIST
-DRAW
-S -100 100 100 -100 0 1 0 N
-X + 1 -300 50 200 R 35 35 1 1 P
-X - 2 300 50 200 L 35 35 1 1 P
-X +c 3 -50 -200 100 U 35 35 1 1 P
-X -c 4 50 -200 100 U 35 35 1 1 P
-ENDDRAW
-ENDDEF
-#
-#End Library
diff --git a/src/SubcircuitLibrary/ua741/ua741_Previous_Values.xml b/src/SubcircuitLibrary/ua741/ua741_Previous_Values.xml
deleted file mode 100644
index 9c7bb530..00000000
--- a/src/SubcircuitLibrary/ua741/ua741_Previous_Values.xml
+++ /dev/null
@@ -1 +0,0 @@
-<KicadtoNgspice><source /><model /><devicemodel /><analysis><ac><field1 name="Lin">true</field1><field2 name="Dec">false</field2><field3 name="Oct">false</field3><field4 name="Start Frequency" /><field5 name="Stop Frequency" /><field6 name="No. of points" /><field7 name="Start Fre Combo">Hz</field7><field8 name="Stop Fre Combo">Hz</field8></ac><dc><field1 name="Source Name" /><field2 name="Start" /><field3 name="Increment" /><field4 name="Stop" /><field5 name="Operating Point">False</field5><field6 name="Start Combo">Volts or Amperes</field6><field7 name="Increment Combo">Volts or Amperes</field7><field8 name="Stop Combo">Volts or Amperes</field8></dc><tran><field1 name="Start Time" /><field2 name="Step Time" /><field3 name="Stop Time" /><field4 name="Start Combo">Sec</field4><field5 name="Step Combo">Sec</field5><field6 name="Stop Combo">Sec</field6></tran></analysis></KicadtoNgspice>
\ No newline at end of file
diff --git a/src/SubcircuitLibrary/ujt/plot_data_i.txt b/src/SubcircuitLibrary/ujt/plot_data_i.txt
deleted file mode 100644
index e69de29b..00000000
--- a/src/SubcircuitLibrary/ujt/plot_data_i.txt
+++ /dev/null
diff --git a/src/SubcircuitLibrary/ujt/plot_data_v.txt b/src/SubcircuitLibrary/ujt/plot_data_v.txt
deleted file mode 100644
index e69de29b..00000000
--- a/src/SubcircuitLibrary/ujt/plot_data_v.txt
+++ /dev/null
diff --git a/src/deviceModelLibrary/Templates/D.lib b/src/deviceModelLibrary/Templates/D.lib
deleted file mode 100644
index 8a7fb4da..00000000
--- a/src/deviceModelLibrary/Templates/D.lib
+++ /dev/null
@@ -1,2 +0,0 @@
-.model 1n4148 D(is=2.495E-09 rs=4.755E-01 n=1.679E+00 tt=3.030E-09 cjo=1.700E-12 vj=1 m=1.959E-01 bv=1.000E+02 ibv=1.000E-04)
-
diff --git a/src/deviceModelLibrary/Templates/NJF.lib b/src/deviceModelLibrary/Templates/NJF.lib
deleted file mode 100644
index dbb2cbae..00000000
--- a/src/deviceModelLibrary/Templates/NJF.lib
+++ /dev/null
@@ -1,4 +0,0 @@
-.model J2N3819	NJF(Beta=1.304m Betatce=-.5 Rd=1 Rs=1 Lambda=2.25m Vto=-3
-+		Vtotc=-2.5m Is=33.57f Isr=322.4f N=1 Nr=2 Xti=3 Alpha=311.7u
-+		Vk=243.6 Cgd=1.6p M=.3622 Pb=1 Fc=.5 Cgs=2.414p Kf=9.882E-18
-+		Af=1)
diff --git a/src/deviceModelLibrary/Templates/NPN.lib b/src/deviceModelLibrary/Templates/NPN.lib
deleted file mode 100644
index 6509fe7a..00000000
--- a/src/deviceModelLibrary/Templates/NPN.lib
+++ /dev/null
@@ -1,4 +0,0 @@
-.model Q2N2222  NPN( Is=14.34f Xti=3 Eg=1.11 Vaf=74.03 Bf=400 Ne=1.307 
-+ Ise=14.34f Ikf=.2847 Xtb=1.5 Br=6.092 Nc=2 Isc=0 Ikr=0 Rc=1 Cjc=7.306p 
-+ Mjc=.3416 Vjc=.75 Fc=.5 Cje=22.01p Mje=.377 Vje=.75 Tr=46.91n Tf=411.1p 
-+ Itf=.6 Vtf=1.7 Xtf=3 Rb=10) 
diff --git a/src/deviceModelLibrary/Templates/PNP.lib b/src/deviceModelLibrary/Templates/PNP.lib
deleted file mode 100644
index 7edda0ea..00000000
--- a/src/deviceModelLibrary/Templates/PNP.lib
+++ /dev/null
@@ -1,4 +0,0 @@
-.model Q2N2907A PNP(Is=650.6E-18 Xti=3 Eg=1.11 Vaf=115.7 Bf=231.7 Ne=1.829
-+		Ise=54.81f Ikf=1.079 Xtb=1.5 Br=3.563 Nc=2 Isc=0 Ikr=0 Rc=.715
-+		Cjc=14.76p Mjc=.5383 Vjc=.75 Fc=.5 Cje=19.82p Mje=.3357 Vje=.75
-+		Tr=111.3n Tf=603.7p Itf=.65 Vtf=5 Xtf=1.7 Rb=10)
diff --git a/src/deviceModelLibrary/Transistor/NPN.lib b/src/deviceModelLibrary/Transistor/NPN.lib
deleted file mode 100644
index 6509fe7a..00000000
--- a/src/deviceModelLibrary/Transistor/NPN.lib
+++ /dev/null
@@ -1,4 +0,0 @@
-.model Q2N2222  NPN( Is=14.34f Xti=3 Eg=1.11 Vaf=74.03 Bf=400 Ne=1.307 
-+ Ise=14.34f Ikf=.2847 Xtb=1.5 Br=6.092 Nc=2 Isc=0 Ikr=0 Rc=1 Cjc=7.306p 
-+ Mjc=.3416 Vjc=.75 Fc=.5 Cje=22.01p Mje=.377 Vje=.75 Tr=46.91n Tf=411.1p 
-+ Itf=.6 Vtf=1.7 Xtf=3 Rb=10) 
diff --git a/src/deviceModelLibrary/Transistor/PNP.lib b/src/deviceModelLibrary/Transistor/PNP.lib
deleted file mode 100644
index 7edda0ea..00000000
--- a/src/deviceModelLibrary/Transistor/PNP.lib
+++ /dev/null
@@ -1,4 +0,0 @@
-.model Q2N2907A PNP(Is=650.6E-18 Xti=3 Eg=1.11 Vaf=115.7 Bf=231.7 Ne=1.829
-+		Ise=54.81f Ikf=1.079 Xtb=1.5 Br=3.563 Nc=2 Isc=0 Ikr=0 Rc=.715
-+		Cjc=14.76p Mjc=.5383 Vjc=.75 Fc=.5 Cje=19.82p Mje=.3357 Vje=.75
-+		Tr=111.3n Tf=603.7p Itf=.65 Vtf=5 Xtf=1.7 Rb=10)
diff --git a/src/deviceModelLibrary/User Libraries/IN4002.lib b/src/deviceModelLibrary/User Libraries/IN4002.lib
deleted file mode 100644
index 35beac9e..00000000
--- a/src/deviceModelLibrary/User Libraries/IN4002.lib
+++ /dev/null
@@ -1,5 +0,0 @@
-***************************************************************************************************************************************

-*SRC=1N4001G;DI_1N4001G;Diodes;Si;  50.0V  1.00A  2.00us   Diodes Inc. Glass Passivated Rectifier

-.MODEL DI_1N4001G D  ( IS=65.4p RS=42.2m BV=50.0 IBV=5.00u

-+ CJO=14.8p  M=0.333 N=1.36 TT=2.88u )

-***************************************************************************************************************************************
\ No newline at end of file
diff --git a/src/deviceModelLibrary/User Libraries/IN4002.xml b/src/deviceModelLibrary/User Libraries/IN4002.xml
deleted file mode 100644
index e72d83d7..00000000
--- a/src/deviceModelLibrary/User Libraries/IN4002.xml
+++ /dev/null
@@ -1 +0,0 @@
-<library><model_name>D</model_name><ref_model>DI_1N4001G</ref_model><param><CJO>14.8p</CJO><RS>42.2m</RS><IS>65.4p</IS><M>0.333</M><N>1.36</N><BV>50.0</BV><TT>2.88u</TT><IBV>5.00u
</IBV></param></library>
\ No newline at end of file
diff --git a/src/deviceModelLibrary/User Libraries/ddnpn.lib b/src/deviceModelLibrary/User Libraries/ddnpn.lib
deleted file mode 100644
index 2e46a2f5..00000000
--- a/src/deviceModelLibrary/User Libraries/ddnpn.lib
+++ /dev/null
@@ -1,29 +0,0 @@
-.MODEL ddnpn NPN(
-+  Vtf=10
-+  Cjc=2p
-+  Nc=2 
-+  Tr=10n
-+  Ne=1.5
-+  Cje=5p
-+  Vjc=.75 
-+  Xtb=1.5 
-+  Rc=0
-+  Tf=1n
-+  Xti=3 
-+  Ikr=0 
-+  Bf=400 
-+  Fc=.5 
-+  Ikf=0
-+  Br=1
-+  Mje=.3333
-+  Mjc=.3333
-+  Vaf=100
-+  Var=100
-+  Isc=0 
-+  Ise=0
-+  Xtf=0
-+  Vje=.75 
-+  Is=10f
-+  Itf=1
-+  Eg=1.11 
-)
\ No newline at end of file
diff --git a/src/deviceModelLibrary/User Libraries/ddnpn.xml b/src/deviceModelLibrary/User Libraries/ddnpn.xml
deleted file mode 100644
index 767c1e41..00000000
--- a/src/deviceModelLibrary/User Libraries/ddnpn.xml
+++ /dev/null
@@ -1 +0,0 @@
-<library><model_name>NPN</model_name><ref_model>ddnpn</ref_model><param><Vtf>10</Vtf><Cjc>2p</Cjc><Nc>2 </Nc><Tr>10n</Tr><Ne>1.5</Ne><Cje>5p</Cje><Vjc>.75 </Vjc><Xtb>1.5 </Xtb><Rc>0</Rc><Tf>1n</Tf><Xti>3 </Xti><Ikr>0 </Ikr><Bf>400 </Bf><Fc>.5 </Fc><Ikf>0</Ikf><Br>1</Br><Mje>.3333</Mje><Mjc>.3333</Mjc><Vaf>100</Vaf><Var>100</Var><Isc>0 </Isc><Ise>0</Ise><Xtf>0</Xtf><Vje>.75 </Vje><Is>10f</Is><Itf>1</Itf><Eg>1.11 </Eg></param></library>
\ No newline at end of file
diff --git a/src/deviceModelLibrary/User Libraries/ddpnp.lib b/src/deviceModelLibrary/User Libraries/ddpnp.lib
deleted file mode 100644
index b2ab39b1..00000000
--- a/src/deviceModelLibrary/User Libraries/ddpnp.lib
+++ /dev/null
@@ -1,29 +0,0 @@
-.MODEL ddpnp PNP(
-+  Vtf=10
-+  Cjc=2p
-+  Nc=2 
-+  Tr=10n
-+  Ne=1.5
-+  Cje=5p
-+  Vjc=.75 
-+  Xtb=1.5 
-+  Rc=0
-+  Tf=1n
-+  Xti=3 
-+  Ikr=0
-+  Bf=200
-+  Fc=.5 
-+  Ikf=0
-+  Br=1
-+  Mje=.3333
-+  Mjc=.3333
-+  Vaf=100
-+  Var=100
-+  Isc=0 
-+  Ise=0
-+  Xtf=0
-+  Vje=.75
-+  Is=10f
-+  Itf=1
-+  Eg=1.11 
-)
\ No newline at end of file
diff --git a/src/deviceModelLibrary/User Libraries/ddpnp.xml b/src/deviceModelLibrary/User Libraries/ddpnp.xml
deleted file mode 100644
index da0a1608..00000000
--- a/src/deviceModelLibrary/User Libraries/ddpnp.xml
+++ /dev/null
@@ -1 +0,0 @@
-<library><model_name>PNP</model_name><ref_model>ddpnp</ref_model><param><Vtf>10</Vtf><Cjc>2p</Cjc><Nc>2 </Nc><Tr>10n</Tr><Ne>1.5</Ne><Cje>5p</Cje><Vjc>.75 </Vjc><Xtb>1.5 </Xtb><Rc>0</Rc><Tf>1n</Tf><Xti>3 </Xti><Ikr>0</Ikr><Bf>200</Bf><Fc>.5 </Fc><Ikf>0</Ikf><Br>1</Br><Mje>.3333</Mje><Mjc>.3333</Mjc><Vaf>100</Vaf><Var>100</Var><Isc>0 </Isc><Ise>0</Ise><Xtf>0</Xtf><Vje>.75</Vje><Is>10f</Is><Itf>1</Itf><Eg>1.11 </Eg></param></library>
\ No newline at end of file
diff --git a/src/deviceModelLibrary/User Libraries/emitter.lib b/src/deviceModelLibrary/User Libraries/emitter.lib
deleted file mode 100644
index 3af759f4..00000000
--- a/src/deviceModelLibrary/User Libraries/emitter.lib
+++ /dev/null
@@ -1,4 +0,0 @@
-.MODEL emitter D(
-+  Is=21.3P
-+  N=1.8
-)
\ No newline at end of file
diff --git a/src/deviceModelLibrary/User Libraries/emitter.xml b/src/deviceModelLibrary/User Libraries/emitter.xml
deleted file mode 100644
index 4774fb7f..00000000
--- a/src/deviceModelLibrary/User Libraries/emitter.xml
+++ /dev/null
@@ -1 +0,0 @@
-<library><model_name>D</model_name><ref_model>emitter</ref_model><param><Is>21.3P</Is><N>1.8</N></param></library>
\ No newline at end of file
diff --git a/src/deviceModelLibrary/User Libraries/npn_1.lib b/src/deviceModelLibrary/User Libraries/npn_1.lib
deleted file mode 100644
index 4a863e3e..00000000
--- a/src/deviceModelLibrary/User Libraries/npn_1.lib
+++ /dev/null
@@ -1,29 +0,0 @@
-.model npn_1 NPN(

-+ Vtf=1.7 

-+ Cjc=0.5p

-+ Nc=2 

-+ Tr=46.91n 

-+ Ne=1.307 

-+ Cje=0.5p

-+ Isc=0 

-+ Xtb=1.5 

-+ Rb=500

-+ Rc=1 

-+ Tf=411.1p 

-+ Xti=3 

-+ Ikr=0 

-+ Bf=125

-+ Fc=.5 

-+ Ise=14.34f 

-+ Br=6.092 

-+ Ikf=.2847 

-+ Mje=.377 

-+ Mjc=.3416 

-+ Vaf=74.03 

-+ Vjc=.75 

-+ Vje=.75 

-+ Xtf=3 

-+ Itf=.6 

-+ Is=14.34f 

-+ Eg=1.11 

-)
\ No newline at end of file
diff --git a/src/deviceModelLibrary/User Libraries/pnp_1.lib b/src/deviceModelLibrary/User Libraries/pnp_1.lib
deleted file mode 100644
index c486429f..00000000
--- a/src/deviceModelLibrary/User Libraries/pnp_1.lib
+++ /dev/null
@@ -1,29 +0,0 @@
-.model pnp_1 PNP(

-+ Vtf=1.7 

-+ Cjc=1.5p

-+ Nc=2 

-+ Tr=46.91n 

-+ Ne=1.307 

-+ Cje=0.3p

-+ Isc=0 

-+ Xtb=1.5 

-+ Rb=250

-+ Rc=1 

-+ Tf=411.1p 

-+ Xti=3 

-+ Ikr=0 

-+ Bf=25

-+ Fc=.5 

-+ Ise=14.34f 

-+ Br=6.092 

-+ Ikf=.2847 

-+ Mje=.377 

-+ Mjc=.3416 

-+ Vaf=74.03 

-+ Vjc=.75 

-+ Vje=.75 

-+ Xtf=3 

-+ Itf=.6 

-+ Is=14.34f 

-+ Eg=1.11 

-)
\ No newline at end of file