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authorfahim-oscad2016-05-06 14:26:14 +0530
committerfahim-oscad2016-05-06 14:26:14 +0530
commit6c73f608fd6b4b3fec92cdc6c4842a5afc0a9d6f (patch)
tree1055bcef2249d8012bd09d30f7ab866963b8f497 /src
parentc5a108d361ea264cbe33b8486e8ad0b6b32d252b (diff)
downloadeSim-6c73f608fd6b4b3fec92cdc6c4842a5afc0a9d6f.tar.gz
eSim-6c73f608fd6b4b3fec92cdc6c4842a5afc0a9d6f.tar.bz2
eSim-6c73f608fd6b4b3fec92cdc6c4842a5afc0a9d6f.zip
Mapping for JFET is done
Diffstat (limited to 'src')
-rw-r--r--src/ngspicetoModelica/Mapping.json57
-rw-r--r--src/ngspicetoModelica/NgspicetoModelica.py8
2 files changed, 33 insertions, 32 deletions
diff --git a/src/ngspicetoModelica/Mapping.json b/src/ngspicetoModelica/Mapping.json
index 2600d65a..a75a8280 100644
--- a/src/ngspicetoModelica/Mapping.json
+++ b/src/ngspicetoModelica/Mapping.json
@@ -122,36 +122,39 @@
},
"j":{
- "import":"Analog.Semiconductors",
+ "import":"Modelica.Electrical.Spice3.Semiconductors",
"mapping":{
- "bf":"Bf",
- "br":"Br",
- "is":"Is",
- "vak":"Vak",
- "tf":"Tauf",
- "tr":"Taur",
- "cjs":"Ccs",
- "cje":"Cje",
- "cjc":"Cjc",
- "vje":"Phie",
- "mje":"Me",
- "vjc":"Phic",
- "mjc":"Mc"
+ "kf":"KF",
+ "rs":"RS",
+ "is":"IS",
+ "cgd":"CGD",
+ "vto":"VTO",
+ "rd":"RD",
+ "pb":"PB",
+ "beta":"BETA",
+ "fc":"FC",
+ "af":"AF",
+ "cgs":"CGS",
+ "lambda":"LAMBDA",
+ "b" : "B"
+
+
},
"default":{
- "Bf":"50",
- "Br":"0.1",
- "Is":"1e-16",
- "Tauf":"1.2e-10",
- "Taur":"5e-9",
- "Vak":"0.02",
- "Ccs":"1e-12",
- "Cje":"4e-12",
- "Cjc":"5e-13",
- "Phie":"0.8",
- "Me":"0.4",
- "Phic":"0.8",
- "Mc":"0.333"
+ "KF":"0",
+ "RS":"0",
+ "IS":"1e-14",
+ "CGD":"0",
+ "VTO":"-2",
+ "RD":"0",
+ "PB":"1",
+ "BETA":"1e-4",
+ "FC":"0.5",
+ "AF":"1",
+ "CGS":"0",
+ "LAMBDA":"0",
+ "B":"1"
+
}
diff --git a/src/ngspicetoModelica/NgspicetoModelica.py b/src/ngspicetoModelica/NgspicetoModelica.py
index 1e67c07b..df165fa0 100644
--- a/src/ngspicetoModelica/NgspicetoModelica.py
+++ b/src/ngspicetoModelica/NgspicetoModelica.py
@@ -74,7 +74,6 @@ class NgMoConverter:
self.ifMOS = True
schematicInfo.append(eachline)
self.deviceDetail.append(eachline)
- print "Device Detail--------->",self.deviceDetail
elif eachline[0]=='x' or eachline[0]=='X':
schematicInfo.append(eachline)
self.subCktDetail.append(eachline)
@@ -172,7 +171,7 @@ class NgMoConverter:
modelInfo[refModelName][info[0]] = info[1]
f.close()
- print "Model Info----->",modelInfo
+
return modelName, modelInfo, subcktName, paramInfo ,transInfo,inbuiltModelDict
@@ -513,12 +512,11 @@ class NgMoConverter:
modelicaCompInit.append(stat)
elif deviceName=='j':
- print "TransInfo---->",transInfo
trans = transInfo[words[4]]
if trans == 'njf':
- start = self.mappingData["Devices"][deviceName]["import"]+".NJF"
+ start = self.mappingData["Devices"][deviceName]["import"]+".J_NJFJFET"
elif trans == 'pjf':
- start = self.mappingData["Devices"][deviceName]["import"]+".PJF"
+ start = self.mappingData["Devices"][deviceName]["import"]+".J_PJFJFET"
else:
print "JFET "+str(trans)+" Not found"
sys.exit(1)