diff options
author | fahim-oscad | 2016-03-28 10:09:17 +0530 |
---|---|---|
committer | fahim-oscad | 2016-03-28 10:09:17 +0530 |
commit | c32dbc8033fbabbf7ae8291eef05e5da11ecfadf (patch) | |
tree | ebe91336a72195f2f789caec4ea31ba15bac60ed /src | |
parent | 35e169f59e7d7ba8da89c944f205f9c092b21960 (diff) | |
download | eSim-c32dbc8033fbabbf7ae8291eef05e5da11ecfadf.tar.gz eSim-c32dbc8033fbabbf7ae8291eef05e5da11ecfadf.tar.bz2 eSim-c32dbc8033fbabbf7ae8291eef05e5da11ecfadf.zip |
Added intial Mapping.json
Diffstat (limited to 'src')
-rw-r--r-- | src/ngspicetoModelica/Mapping.json | 38 |
1 files changed, 38 insertions, 0 deletions
diff --git a/src/ngspicetoModelica/Mapping.json b/src/ngspicetoModelica/Mapping.json new file mode 100644 index 00000000..68359d80 --- /dev/null +++ b/src/ngspicetoModelica/Mapping.json @@ -0,0 +1,38 @@ +{ + "Components":{ + "R" : "Analog.Basic.Resistor", + "C" : "Analog.Basic.Capacitor", + "L" : "Analog.Basic.Inductor", + "e" : "Analog.Basic.VCV", + "g" : "Analog.Basic.VCC", + "f" : "Analog.Basic.CCC", + "h" : "Analog.Basic.CCV", + "0" : "Analog.Basic.Ground", + "gnd" : "Analog.Basic.Ground" + + }, + "Sources":{ + "pulse":"Analog.Sources.TrapezoidVoltage", + "sine":"Analog.Sources.SineVoltage", + "pwl" : "Analog.Sources.TableVoltage", + "dc" : "Analog.Sources.ConstantVoltage" + }, + "Devices":{ + "d" : "Analog.Semiconductors.Diode", + "D" : "Analog.Semiconductors.Diode" + }, + + "Units":{ + "k":"e3", + "u":"e-6", + "p":"e-12", + "t":"e12", + "g":"e9", + "m":"e-3", + "me":"e6", + "n":"e-9", + "f":"e-15" + + } + +}
\ No newline at end of file |