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| author | nilshah98 | 2019-07-02 16:42:20 +0530 |
|---|---|---|
| committer | nilshah98 | 2019-07-02 16:46:12 +0530 |
| commit | b085a3df519debbc99acf4ded7e118a1690d6665 (patch) | |
| tree | 0fc3e5389c2a77a97d1a065875fe87ddee2c23f4 /src/SubcircuitLibrary/ujt/ujt.cir | |
| parent | e7cd941bc4a48ff8684e4db6b9dff0efeb51fa6e (diff) | |
| download | eSim-b085a3df519debbc99acf4ded7e118a1690d6665.tar.gz eSim-b085a3df519debbc99acf4ded7e118a1690d6665.tar.bz2 eSim-b085a3df519debbc99acf4ded7e118a1690d6665.zip | |
Subcircuit added by ECE fellows 2019
Diffstat (limited to 'src/SubcircuitLibrary/ujt/ujt.cir')
| -rw-r--r-- | src/SubcircuitLibrary/ujt/ujt.cir | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/src/SubcircuitLibrary/ujt/ujt.cir b/src/SubcircuitLibrary/ujt/ujt.cir new file mode 100644 index 00000000..017c4845 --- /dev/null +++ b/src/SubcircuitLibrary/ujt/ujt.cir @@ -0,0 +1,18 @@ +* /home/bhargav/Downloads/eSim-1.1.2/src/SubcircuitLibrary/ujt/ujt.cir + +* EESchema Netlist Version 1.1 (Spice format) creation date: Sun Jun 16 10:51:40 2019 + +* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N +* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +* Sheet Name: / +R3 GND 6 1000k +C1 5 7 35p +R1 7 2 38.15 +R2 3 5 2.518k +U1 1 2 3 PORT +B1 5 7 I=0.00028*V(5,7)+0.00575*V(5,7)*V(6) +D1 1 4 eSim_Diode +H1 6 GND 4 5 1k + +.end |